V2021 board is now working

diff --git a/STM32CubeMX/2021/Src/fmc.c b/STM32CubeMX/2021/Src/fmc.c
index 995fd15dcb35c9137bac64df83981544733cb3f4..56e0f7c337e2c3690dac5882de8fdab4045639f2 100644 (file)
--- a/STM32CubeMX/2021/Src/fmc.c
+++ b/STM32CubeMX/2021/Src/fmc.c
@@ -54,8 +54,8 @@ void MX_FMC_Init(void)
   /* Timing */
 
   // 1 clock to read the address, + 1 for synchroniser skew
-  Timing.AddressSetupTime = 2;
-  Timing.AddressHoldTime = 1;
+  Timing.AddressSetupTime = 4;
+  Timing.AddressHoldTime = 2;
 
   // Writes to device:
   //   1 for synchroniser skew (dbx also delayed)
@@ -65,12 +65,12 @@ void MX_FMC_Init(void)
   // Reads from device:
   //   3 for syncroniser
   //   1 to write back to fsmc bus.
-  Timing.DataSetupTime = 4;
+  Timing.DataSetupTime = 8;
 
   // Allow a clock for us to release signals
   // Need to avoid both devices acting as outputs
   // on the multiplexed lines at the same time.
-  Timing.BusTurnAroundDuration = 1;
+  Timing.BusTurnAroundDuration = 2;
 
   Timing.CLKDivision = 16; // Ignored for async
   Timing.DataLatency = 17; // Ignored for async

diff --git a/src/firmware/scsiPhy.c b/src/firmware/scsiPhy.c
index 3eeeaee3dfdacdee0933d6e338b6fcb987cc307a..2f925fff3611059f392f112ff57747b592cb0d30 100755 (executable)
--- a/src/firmware/scsiPhy.c
+++ b/src/firmware/scsiPhy.c
@@ -155,8 +155,14 @@ scsiSetDataCount(uint32_t count)
 int scsiFifoReady(void)\r
 {\r
        __NOP();\r
+#ifdef STM32F4xx\r
+       __NOP();\r
+#endif\r
        HAL_GPIO_ReadPin(GPIOE, FPGA_GPIO3_Pin);\r
        __NOP();\r
+#ifdef STM32F4xx\r
+       __NOP();\r
+#endif\r
        return HAL_GPIO_ReadPin(GPIOE, FPGA_GPIO3_Pin) != 0;\r
 }\r
 \r
@@ -167,6 +173,7 @@ scsiReadByte(void)
 \r
        // Ready immediately. setDataCount resets fifos\r
 \r
+       __disable_irq();\r
        while (!scsiPhyComplete() && likely(!scsiDev.resetFlag))\r
        {\r
                __WFI(); // Wait for interrupt\r