\r
#include <string.h>\r
\r
-static const uint16_t FIRMWARE_VERSION = 0x0644;\r
+static const uint16_t FIRMWARE_VERSION = 0x0645;\r
\r
// Optional static config\r
extern uint8_t* __fixed_config;\r
}\r
}\r
\r
- if ((prep - i) > 0)\r
+ if (((prep - i) > 0) &&\r
+ scsiFifoReady())\r
{\r
int dmaBytes = SD_SECTOR_SIZE;\r
if ((i % sdPerScsi) == (sdPerScsi - 1))\r
phaseChangeDelayUs = 0;\r
}\r
\r
+ // Wait for the SD transfer to complete before we disable IRQs.\r
+ // (Otherwise some cards will cause an error if we don't sent the\r
+ // stop transfer command via the DMA complete handler in time)\r
+ while (HAL_SD_GetState(&hsd) == HAL_SD_STATE_BUSY)\r
+ {\r
+ // Wait while keeping BSY.\r
+ }\r
+\r
// We've finished transferring the data to the FPGA, now wait until it's\r
// written to he SCSI bus.\r
- __disable_irq();\r
while (!scsiPhyComplete() &&\r
likely(scsiDev.phase == DATA_IN) &&\r
likely(!scsiDev.resetFlag))\r
{\r
- __WFI();\r
- }\r
- __enable_irq();\r
-\r
- while (HAL_SD_GetState(&hsd) == HAL_SD_STATE_BUSY)\r
- {\r
- // Wait while keeping BSY.\r
+ __disable_irq();\r
+ if (!scsiPhyComplete() && likely(!scsiDev.resetFlag))\r
+ {\r
+ __WFI();\r
+ }\r
+ __enable_irq();\r
}\r
\r
if (scsiDev.phase == DATA_IN)\r
\r
scsiReadPIO(data + i, chunk, parityError);\r
\r
- __disable_irq();\r
while (!scsiPhyComplete() && likely(!scsiDev.resetFlag))\r
{\r
- __WFI();\r
+ __disable_irq();\r
+ if (!scsiPhyComplete() && likely(!scsiDev.resetFlag))\r
+ {\r
+ __WFI();\r
+ }\r
+ __enable_irq();\r
}\r
- __enable_irq();\r
\r
i += chunk;\r
}\r
\r
scsiWritePIO(data + i, chunk);\r
\r
- __disable_irq();\r
while (!scsiPhyComplete() && likely(!scsiDev.resetFlag))\r
{\r
- __WFI();\r
+ __disable_irq();\r
+ if (!scsiPhyComplete() && likely(!scsiDev.resetFlag))\r
+ {\r
+ __WFI();\r
+ }\r
+ __enable_irq();\r
}\r
- __enable_irq();\r
\r
i += chunk;\r
}\r