\r
#include <string.h>\r
\r
-static const uint16_t FIRMWARE_VERSION = 0x0481;\r
+static const uint16_t FIRMWARE_VERSION = 0x0482;\r
\r
// 1 flash row\r
static const uint8_t DEFAULT_CONFIG[256] =\r
/*******************************************************************************\r
* File Name: cydevice.h\r
* OBSOLETE: Do not use this file. Use the _trm version instead.\r
-* PSoC Creator 4.1\r
+* PSoC Creator 4.2\r
*\r
* Description:\r
* This file provides all of the address values for the entire PSoC device.\r
* This file is automatically generated by PSoC Creator.\r
*\r
********************************************************************************\r
-* Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.\r
+* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.\r
* You may use this file only in accordance with the license, terms, conditions, \r
* disclaimers, and limitations in the end user license agreement accompanying \r
* the software package with which this file was provided.\r
/*******************************************************************************\r
* File Name: cydevice_trm.h\r
* \r
-* PSoC Creator 4.1\r
+* PSoC Creator 4.2\r
*\r
* Description:\r
* This file provides all of the address values for the entire PSoC device.\r
* This file is automatically generated by PSoC Creator.\r
*\r
********************************************************************************\r
-* Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.\r
+* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.\r
* You may use this file only in accordance with the license, terms, conditions, \r
* disclaimers, and limitations in the end user license agreement accompanying \r
* the software package with which this file was provided.\r
/*******************************************************************************\r
* File Name: cydevicegnu.inc\r
* OBSOLETE: Do not use this file. Use the _trm version instead.\r
-* PSoC Creator 4.1\r
+* PSoC Creator 4.2\r
*\r
* Description:\r
* This file provides all of the address values for the entire PSoC device.\r
* This file is automatically generated by PSoC Creator.\r
*\r
********************************************************************************\r
-* Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.\r
+* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.\r
* You may use this file only in accordance with the license, terms, conditions, \r
* disclaimers, and limitations in the end user license agreement accompanying \r
* the software package with which this file was provided.\r
/*******************************************************************************\r
* File Name: cydevicegnu_trm.inc\r
* \r
-* PSoC Creator 4.1\r
+* PSoC Creator 4.2\r
*\r
* Description:\r
* This file provides all of the address values for the entire PSoC device.\r
* This file is automatically generated by PSoC Creator.\r
*\r
********************************************************************************\r
-* Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.\r
+* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.\r
* You may use this file only in accordance with the license, terms, conditions, \r
* disclaimers, and limitations in the end user license agreement accompanying \r
* the software package with which this file was provided.\r
;\r
; File Name: cydeviceiar.inc\r
; OBSOLETE: Do not use this file. Use the _trm version instead.\r
-; PSoC Creator 4.1\r
+; PSoC Creator 4.2\r
;\r
; Description:\r
; This file provides all of the address values for the entire PSoC device.\r
;\r
;-------------------------------------------------------------------------------\r
-; Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.\r
+; Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.\r
; You may use this file only in accordance with the license, terms, conditions, \r
; disclaimers, and limitations in the end user license agreement accompanying \r
; the software package with which this file was provided.\r
;\r
; File Name: cydeviceiar_trm.inc\r
; \r
-; PSoC Creator 4.1\r
+; PSoC Creator 4.2\r
;\r
; Description:\r
; This file provides all of the address values for the entire PSoC device.\r
;\r
;-------------------------------------------------------------------------------\r
-; Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.\r
+; Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.\r
; You may use this file only in accordance with the license, terms, conditions, \r
; disclaimers, and limitations in the end user license agreement accompanying \r
; the software package with which this file was provided.\r
;\r
; File Name: cydevicerv.inc\r
; OBSOLETE: Do not use this file. Use the _trm version instead.\r
-; PSoC Creator 4.1\r
+; PSoC Creator 4.2\r
;\r
; Description:\r
; This file provides all of the address values for the entire PSoC device.\r
;\r
;-------------------------------------------------------------------------------\r
-; Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.\r
+; Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.\r
; You may use this file only in accordance with the license, terms, conditions, \r
; disclaimers, and limitations in the end user license agreement accompanying \r
; the software package with which this file was provided.\r
;\r
; File Name: cydevicerv_trm.inc\r
; \r
-; PSoC Creator 4.1\r
+; PSoC Creator 4.2\r
;\r
; Description:\r
; This file provides all of the address values for the entire PSoC device.\r
;\r
;-------------------------------------------------------------------------------\r
-; Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.\r
+; Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.\r
; You may use this file only in accordance with the license, terms, conditions, \r
; disclaimers, and limitations in the end user license agreement accompanying \r
; the software package with which this file was provided.\r
/*******************************************************************************\r
* File Name: cyfitter.h\r
* \r
-* PSoC Creator 4.1\r
+* PSoC Creator 4.2\r
*\r
* Description:\r
* \r
* This file is automatically generated by PSoC Creator.\r
*\r
********************************************************************************\r
-* Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.\r
+* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.\r
* You may use this file only in accordance with the license, terms, conditions, \r
* disclaimers, and limitations in the end user license agreement accompanying \r
* the software package with which this file was provided.\r
#include "cydevice.h"\r
#include "cydevice_trm.h"\r
\r
-/* Debug_Timer_Interrupt */\r
-#define Debug_Timer_Interrupt__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0\r
-#define Debug_Timer_Interrupt__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0\r
-#define Debug_Timer_Interrupt__INTC_MASK 0x01u\r
-#define Debug_Timer_Interrupt__INTC_NUMBER 0u\r
-#define Debug_Timer_Interrupt__INTC_PRIOR_NUM 7u\r
-#define Debug_Timer_Interrupt__INTC_PRIOR_REG CYREG_NVIC_PRI_0\r
-#define Debug_Timer_Interrupt__INTC_SET_EN_REG CYREG_NVIC_SETENA0\r
-#define Debug_Timer_Interrupt__INTC_SET_PD_REG CYREG_NVIC_SETPEND0\r
-\r
-/* Debug_Timer_TimerHW */\r
-#define Debug_Timer_TimerHW__CAP0 CYREG_TMR0_CAP0\r
-#define Debug_Timer_TimerHW__CAP1 CYREG_TMR0_CAP1\r
-#define Debug_Timer_TimerHW__CFG0 CYREG_TMR0_CFG0\r
-#define Debug_Timer_TimerHW__CFG1 CYREG_TMR0_CFG1\r
-#define Debug_Timer_TimerHW__CFG2 CYREG_TMR0_CFG2\r
-#define Debug_Timer_TimerHW__CNT_CMP0 CYREG_TMR0_CNT_CMP0\r
-#define Debug_Timer_TimerHW__CNT_CMP1 CYREG_TMR0_CNT_CMP1\r
-#define Debug_Timer_TimerHW__PER0 CYREG_TMR0_PER0\r
-#define Debug_Timer_TimerHW__PER1 CYREG_TMR0_PER1\r
-#define Debug_Timer_TimerHW__PM_ACT_CFG CYREG_PM_ACT_CFG3\r
-#define Debug_Timer_TimerHW__PM_ACT_MSK 0x01u\r
-#define Debug_Timer_TimerHW__PM_STBY_CFG CYREG_PM_STBY_CFG3\r
-#define Debug_Timer_TimerHW__PM_STBY_MSK 0x01u\r
-#define Debug_Timer_TimerHW__RT0 CYREG_TMR0_RT0\r
-#define Debug_Timer_TimerHW__RT1 CYREG_TMR0_RT1\r
-#define Debug_Timer_TimerHW__SR0 CYREG_TMR0_SR0\r
-\r
-/* EXTLED */\r
-#define EXTLED__0__INTTYPE CYREG_PICU0_INTTYPE0\r
-#define EXTLED__0__MASK 0x01u\r
-#define EXTLED__0__PC CYREG_PRT0_PC0\r
-#define EXTLED__0__PORT 0u\r
-#define EXTLED__0__SHIFT 0u\r
-#define EXTLED__AG CYREG_PRT0_AG\r
-#define EXTLED__AMUX CYREG_PRT0_AMUX\r
-#define EXTLED__BIE CYREG_PRT0_BIE\r
-#define EXTLED__BIT_MASK CYREG_PRT0_BIT_MASK\r
-#define EXTLED__BYP CYREG_PRT0_BYP\r
-#define EXTLED__CTL CYREG_PRT0_CTL\r
-#define EXTLED__DM0 CYREG_PRT0_DM0\r
-#define EXTLED__DM1 CYREG_PRT0_DM1\r
-#define EXTLED__DM2 CYREG_PRT0_DM2\r
-#define EXTLED__DR CYREG_PRT0_DR\r
-#define EXTLED__INP_DIS CYREG_PRT0_INP_DIS\r
-#define EXTLED__INTTYPE_BASE CYDEV_PICU_INTTYPE_PICU0_BASE\r
-#define EXTLED__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
-#define EXTLED__LCD_EN CYREG_PRT0_LCD_EN\r
-#define EXTLED__MASK 0x01u\r
-#define EXTLED__PORT 0u\r
-#define EXTLED__PRT CYREG_PRT0_PRT\r
-#define EXTLED__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
-#define EXTLED__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
-#define EXTLED__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
-#define EXTLED__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
-#define EXTLED__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
-#define EXTLED__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
-#define EXTLED__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
-#define EXTLED__PS CYREG_PRT0_PS\r
-#define EXTLED__SHIFT 0u\r
-#define EXTLED__SLW CYREG_PRT0_SLW\r
-\r
/* LED1 */\r
#define LED1__0__INTTYPE CYREG_PICU0_INTTYPE1\r
#define LED1__0__MASK 0x02u\r
#define LED1__SHIFT 1u\r
#define LED1__SLW CYREG_PRT0_SLW\r
\r
-/* SCSI_CLK */\r
-#define SCSI_CLK__CFG0 CYREG_CLKDIST_DCFG1_CFG0\r
-#define SCSI_CLK__CFG1 CYREG_CLKDIST_DCFG1_CFG1\r
-#define SCSI_CLK__CFG2 CYREG_CLKDIST_DCFG1_CFG2\r
-#define SCSI_CLK__CFG2_SRC_SEL_MASK 0x07u\r
-#define SCSI_CLK__INDEX 0x01u\r
-#define SCSI_CLK__PM_ACT_CFG CYREG_PM_ACT_CFG2\r
-#define SCSI_CLK__PM_ACT_MSK 0x02u\r
-#define SCSI_CLK__PM_STBY_CFG CYREG_PM_STBY_CFG2\r
-#define SCSI_CLK__PM_STBY_MSK 0x02u\r
-\r
-/* SCSI_CTL_PHASE */\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__0__MASK 0x01u\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__0__POS 0\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__1__MASK 0x02u\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__1__POS 1\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG CYREG_B0_UDB06_07_ACTL\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG CYREG_B0_UDB06_07_CTL\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG CYREG_B0_UDB06_07_CTL\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG CYREG_B0_UDB06_07_CTL\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG CYREG_B0_UDB06_07_CTL\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_MASK_REG CYREG_B0_UDB06_07_MSK\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG CYREG_B0_UDB06_07_MSK\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG CYREG_B0_UDB06_07_MSK\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG CYREG_B0_UDB06_07_MSK\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__2__MASK 0x04u\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__2__POS 2\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_AUX_CTL_REG CYREG_B0_UDB06_ACTL\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_REG CYREG_B0_UDB06_CTL\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_ST_REG CYREG_B0_UDB06_ST_CTL\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_REG CYREG_B0_UDB06_CTL\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_ST_REG CYREG_B0_UDB06_ST_CTL\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__MASK 0x07u\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG CYREG_B0_UDB06_MSK_ACTL\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG CYREG_B0_UDB06_MSK_ACTL\r
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__PERIOD_REG CYREG_B0_UDB06_MSK\r
-\r
-/* SCSI_Filtered */\r
-#define SCSI_Filtered_sts_sts_reg__0__MASK 0x01u\r
-#define SCSI_Filtered_sts_sts_reg__0__POS 0\r
-#define SCSI_Filtered_sts_sts_reg__1__MASK 0x02u\r
-#define SCSI_Filtered_sts_sts_reg__1__POS 1\r
-#define SCSI_Filtered_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG CYREG_B0_UDB11_12_ACTL\r
-#define SCSI_Filtered_sts_sts_reg__16BIT_STATUS_REG CYREG_B0_UDB11_12_ST\r
-#define SCSI_Filtered_sts_sts_reg__2__MASK 0x04u\r
-#define SCSI_Filtered_sts_sts_reg__2__POS 2\r
-#define SCSI_Filtered_sts_sts_reg__3__MASK 0x08u\r
-#define SCSI_Filtered_sts_sts_reg__3__POS 3\r
-#define SCSI_Filtered_sts_sts_reg__4__MASK 0x10u\r
-#define SCSI_Filtered_sts_sts_reg__4__POS 4\r
-#define SCSI_Filtered_sts_sts_reg__MASK 0x1Fu\r
-#define SCSI_Filtered_sts_sts_reg__MASK_REG CYREG_B0_UDB11_MSK\r
-#define SCSI_Filtered_sts_sts_reg__STATUS_AUX_CTL_REG CYREG_B0_UDB11_ACTL\r
-#define SCSI_Filtered_sts_sts_reg__STATUS_REG CYREG_B0_UDB11_ST\r
+/* SD_CD */\r
+#define SD_CD__0__INTTYPE CYREG_PICU3_INTTYPE5\r
+#define SD_CD__0__MASK 0x20u\r
+#define SD_CD__0__PC CYREG_PRT3_PC5\r
+#define SD_CD__0__PORT 3u\r
+#define SD_CD__0__SHIFT 5u\r
+#define SD_CD__AG CYREG_PRT3_AG\r
+#define SD_CD__AMUX CYREG_PRT3_AMUX\r
+#define SD_CD__BIE CYREG_PRT3_BIE\r
+#define SD_CD__BIT_MASK CYREG_PRT3_BIT_MASK\r
+#define SD_CD__BYP CYREG_PRT3_BYP\r
+#define SD_CD__CTL CYREG_PRT3_CTL\r
+#define SD_CD__DM0 CYREG_PRT3_DM0\r
+#define SD_CD__DM1 CYREG_PRT3_DM1\r
+#define SD_CD__DM2 CYREG_PRT3_DM2\r
+#define SD_CD__DR CYREG_PRT3_DR\r
+#define SD_CD__INP_DIS CYREG_PRT3_INP_DIS\r
+#define SD_CD__INTTYPE_BASE CYDEV_PICU_INTTYPE_PICU3_BASE\r
+#define SD_CD__LCD_COM_SEG CYREG_PRT3_LCD_COM_SEG\r
+#define SD_CD__LCD_EN CYREG_PRT3_LCD_EN\r
+#define SD_CD__MASK 0x20u\r
+#define SD_CD__PORT 3u\r
+#define SD_CD__PRT CYREG_PRT3_PRT\r
+#define SD_CD__PRTDSI__CAPS_SEL CYREG_PRT3_CAPS_SEL\r
+#define SD_CD__PRTDSI__DBL_SYNC_IN CYREG_PRT3_DBL_SYNC_IN\r
+#define SD_CD__PRTDSI__OE_SEL0 CYREG_PRT3_OE_SEL0\r
+#define SD_CD__PRTDSI__OE_SEL1 CYREG_PRT3_OE_SEL1\r
+#define SD_CD__PRTDSI__OUT_SEL0 CYREG_PRT3_OUT_SEL0\r
+#define SD_CD__PRTDSI__OUT_SEL1 CYREG_PRT3_OUT_SEL1\r
+#define SD_CD__PRTDSI__SYNC_OUT CYREG_PRT3_SYNC_OUT\r
+#define SD_CD__PS CYREG_PRT3_PS\r
+#define SD_CD__SHIFT 5u\r
+#define SD_CD__SLW CYREG_PRT3_SLW\r
\r
-/* SCSI_Glitch_Ctl */\r
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__0__MASK 0x01u\r
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__0__POS 0\r
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG CYREG_B0_UDB04_05_ACTL\r
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG CYREG_B0_UDB04_05_CTL\r
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG CYREG_B0_UDB04_05_CTL\r
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG CYREG_B0_UDB04_05_CTL\r
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG CYREG_B0_UDB04_05_CTL\r
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG CYREG_B0_UDB04_05_MSK\r
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG CYREG_B0_UDB04_05_MSK\r
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG CYREG_B0_UDB04_05_MSK\r
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG CYREG_B0_UDB04_05_MSK\r
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG CYREG_B0_UDB04_ACTL\r
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_REG CYREG_B0_UDB04_CTL\r
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_ST_REG CYREG_B0_UDB04_ST_CTL\r
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__COUNT_REG CYREG_B0_UDB04_CTL\r
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__COUNT_ST_REG CYREG_B0_UDB04_ST_CTL\r
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__MASK 0x01u\r
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG CYREG_B0_UDB04_MSK_ACTL\r
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG CYREG_B0_UDB04_MSK_ACTL\r
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__PERIOD_REG CYREG_B0_UDB04_MSK\r
-\r
-/* SCSI_In */\r
-#define SCSI_In__0__AG CYREG_PRT2_AG\r
-#define SCSI_In__0__AMUX CYREG_PRT2_AMUX\r
-#define SCSI_In__0__BIE CYREG_PRT2_BIE\r
-#define SCSI_In__0__BIT_MASK CYREG_PRT2_BIT_MASK\r
-#define SCSI_In__0__BYP CYREG_PRT2_BYP\r
-#define SCSI_In__0__CTL CYREG_PRT2_CTL\r
-#define SCSI_In__0__DM0 CYREG_PRT2_DM0\r
-#define SCSI_In__0__DM1 CYREG_PRT2_DM1\r
-#define SCSI_In__0__DM2 CYREG_PRT2_DM2\r
-#define SCSI_In__0__DR CYREG_PRT2_DR\r
-#define SCSI_In__0__INP_DIS CYREG_PRT2_INP_DIS\r
-#define SCSI_In__0__INTTYPE CYREG_PICU2_INTTYPE1\r
-#define SCSI_In__0__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG\r
-#define SCSI_In__0__LCD_EN CYREG_PRT2_LCD_EN\r
-#define SCSI_In__0__MASK 0x02u\r
-#define SCSI_In__0__PC CYREG_PRT2_PC1\r
-#define SCSI_In__0__PORT 2u\r
-#define SCSI_In__0__PRT CYREG_PRT2_PRT\r
-#define SCSI_In__0__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL\r
-#define SCSI_In__0__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN\r
-#define SCSI_In__0__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0\r
-#define SCSI_In__0__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1\r
-#define SCSI_In__0__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0\r
-#define SCSI_In__0__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1\r
-#define SCSI_In__0__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT\r
-#define SCSI_In__0__PS CYREG_PRT2_PS\r
-#define SCSI_In__0__SHIFT 1u\r
-#define SCSI_In__0__SLW CYREG_PRT2_SLW\r
-#define SCSI_In__1__AG CYREG_PRT4_AG\r
-#define SCSI_In__1__AMUX CYREG_PRT4_AMUX\r
-#define SCSI_In__1__BIE CYREG_PRT4_BIE\r
-#define SCSI_In__1__BIT_MASK CYREG_PRT4_BIT_MASK\r
-#define SCSI_In__1__BYP CYREG_PRT4_BYP\r
-#define SCSI_In__1__CTL CYREG_PRT4_CTL\r
-#define SCSI_In__1__DM0 CYREG_PRT4_DM0\r
-#define SCSI_In__1__DM1 CYREG_PRT4_DM1\r
-#define SCSI_In__1__DM2 CYREG_PRT4_DM2\r
-#define SCSI_In__1__DR CYREG_PRT4_DR\r
-#define SCSI_In__1__INP_DIS CYREG_PRT4_INP_DIS\r
-#define SCSI_In__1__INTTYPE CYREG_PICU4_INTTYPE6\r
-#define SCSI_In__1__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG\r
-#define SCSI_In__1__LCD_EN CYREG_PRT4_LCD_EN\r
-#define SCSI_In__1__MASK 0x40u\r
-#define SCSI_In__1__PC CYREG_PRT4_PC6\r
-#define SCSI_In__1__PORT 4u\r
-#define SCSI_In__1__PRT CYREG_PRT4_PRT\r
-#define SCSI_In__1__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL\r
-#define SCSI_In__1__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN\r
-#define SCSI_In__1__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0\r
-#define SCSI_In__1__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1\r
-#define SCSI_In__1__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0\r
-#define SCSI_In__1__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1\r
-#define SCSI_In__1__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT\r
-#define SCSI_In__1__PS CYREG_PRT4_PS\r
-#define SCSI_In__1__SHIFT 6u\r
-#define SCSI_In__1__SLW CYREG_PRT4_SLW\r
-#define SCSI_In__2__AG CYREG_PRT4_AG\r
-#define SCSI_In__2__AMUX CYREG_PRT4_AMUX\r
-#define SCSI_In__2__BIE CYREG_PRT4_BIE\r
-#define SCSI_In__2__BIT_MASK CYREG_PRT4_BIT_MASK\r
-#define SCSI_In__2__BYP CYREG_PRT4_BYP\r
-#define SCSI_In__2__CTL CYREG_PRT4_CTL\r
-#define SCSI_In__2__DM0 CYREG_PRT4_DM0\r
-#define SCSI_In__2__DM1 CYREG_PRT4_DM1\r
-#define SCSI_In__2__DM2 CYREG_PRT4_DM2\r
-#define SCSI_In__2__DR CYREG_PRT4_DR\r
-#define SCSI_In__2__INP_DIS CYREG_PRT4_INP_DIS\r
-#define SCSI_In__2__INTTYPE CYREG_PICU4_INTTYPE2\r
-#define SCSI_In__2__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG\r
-#define SCSI_In__2__LCD_EN CYREG_PRT4_LCD_EN\r
-#define SCSI_In__2__MASK 0x04u\r
-#define SCSI_In__2__PC CYREG_PRT4_PC2\r
-#define SCSI_In__2__PORT 4u\r
-#define SCSI_In__2__PRT CYREG_PRT4_PRT\r
-#define SCSI_In__2__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL\r
-#define SCSI_In__2__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN\r
-#define SCSI_In__2__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0\r
-#define SCSI_In__2__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1\r
-#define SCSI_In__2__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0\r
-#define SCSI_In__2__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1\r
-#define SCSI_In__2__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT\r
-#define SCSI_In__2__PS CYREG_PRT4_PS\r
-#define SCSI_In__2__SHIFT 2u\r
-#define SCSI_In__2__SLW CYREG_PRT4_SLW\r
-#define SCSI_In__3__AG CYREG_PRT0_AG\r
-#define SCSI_In__3__AMUX CYREG_PRT0_AMUX\r
-#define SCSI_In__3__BIE CYREG_PRT0_BIE\r
-#define SCSI_In__3__BIT_MASK CYREG_PRT0_BIT_MASK\r
-#define SCSI_In__3__BYP CYREG_PRT0_BYP\r
-#define SCSI_In__3__CTL CYREG_PRT0_CTL\r
-#define SCSI_In__3__DM0 CYREG_PRT0_DM0\r
-#define SCSI_In__3__DM1 CYREG_PRT0_DM1\r
-#define SCSI_In__3__DM2 CYREG_PRT0_DM2\r
-#define SCSI_In__3__DR CYREG_PRT0_DR\r
-#define SCSI_In__3__INP_DIS CYREG_PRT0_INP_DIS\r
-#define SCSI_In__3__INTTYPE CYREG_PICU0_INTTYPE5\r
-#define SCSI_In__3__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
-#define SCSI_In__3__LCD_EN CYREG_PRT0_LCD_EN\r
-#define SCSI_In__3__MASK 0x20u\r
-#define SCSI_In__3__PC CYREG_PRT0_PC5\r
-#define SCSI_In__3__PORT 0u\r
-#define SCSI_In__3__PRT CYREG_PRT0_PRT\r
-#define SCSI_In__3__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
-#define SCSI_In__3__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
-#define SCSI_In__3__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
-#define SCSI_In__3__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
-#define SCSI_In__3__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
-#define SCSI_In__3__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
-#define SCSI_In__3__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
-#define SCSI_In__3__PS CYREG_PRT0_PS\r
-#define SCSI_In__3__SHIFT 5u\r
-#define SCSI_In__3__SLW CYREG_PRT0_SLW\r
-#define SCSI_In__4__AG CYREG_PRT0_AG\r
-#define SCSI_In__4__AMUX CYREG_PRT0_AMUX\r
-#define SCSI_In__4__BIE CYREG_PRT0_BIE\r
-#define SCSI_In__4__BIT_MASK CYREG_PRT0_BIT_MASK\r
-#define SCSI_In__4__BYP CYREG_PRT0_BYP\r
-#define SCSI_In__4__CTL CYREG_PRT0_CTL\r
-#define SCSI_In__4__DM0 CYREG_PRT0_DM0\r
-#define SCSI_In__4__DM1 CYREG_PRT0_DM1\r
-#define SCSI_In__4__DM2 CYREG_PRT0_DM2\r
-#define SCSI_In__4__DR CYREG_PRT0_DR\r
-#define SCSI_In__4__INP_DIS CYREG_PRT0_INP_DIS\r
-#define SCSI_In__4__INTTYPE CYREG_PICU0_INTTYPE4\r
-#define SCSI_In__4__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
-#define SCSI_In__4__LCD_EN CYREG_PRT0_LCD_EN\r
-#define SCSI_In__4__MASK 0x10u\r
-#define SCSI_In__4__PC CYREG_PRT0_PC4\r
-#define SCSI_In__4__PORT 0u\r
-#define SCSI_In__4__PRT CYREG_PRT0_PRT\r
-#define SCSI_In__4__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
-#define SCSI_In__4__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
-#define SCSI_In__4__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
-#define SCSI_In__4__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
-#define SCSI_In__4__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
-#define SCSI_In__4__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
-#define SCSI_In__4__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
-#define SCSI_In__4__PS CYREG_PRT0_PS\r
-#define SCSI_In__4__SHIFT 4u\r
-#define SCSI_In__4__SLW CYREG_PRT0_SLW\r
-#define SCSI_In__CD__AG CYREG_PRT4_AG\r
-#define SCSI_In__CD__AMUX CYREG_PRT4_AMUX\r
-#define SCSI_In__CD__BIE CYREG_PRT4_BIE\r
-#define SCSI_In__CD__BIT_MASK CYREG_PRT4_BIT_MASK\r
-#define SCSI_In__CD__BYP CYREG_PRT4_BYP\r
-#define SCSI_In__CD__CTL CYREG_PRT4_CTL\r
-#define SCSI_In__CD__DM0 CYREG_PRT4_DM0\r
-#define SCSI_In__CD__DM1 CYREG_PRT4_DM1\r
-#define SCSI_In__CD__DM2 CYREG_PRT4_DM2\r
-#define SCSI_In__CD__DR CYREG_PRT4_DR\r
-#define SCSI_In__CD__INP_DIS CYREG_PRT4_INP_DIS\r
-#define SCSI_In__CD__INTTYPE CYREG_PICU4_INTTYPE2\r
-#define SCSI_In__CD__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG\r
-#define SCSI_In__CD__LCD_EN CYREG_PRT4_LCD_EN\r
-#define SCSI_In__CD__MASK 0x04u\r
-#define SCSI_In__CD__PC CYREG_PRT4_PC2\r
-#define SCSI_In__CD__PORT 4u\r
-#define SCSI_In__CD__PRT CYREG_PRT4_PRT\r
-#define SCSI_In__CD__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL\r
-#define SCSI_In__CD__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN\r
-#define SCSI_In__CD__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0\r
-#define SCSI_In__CD__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1\r
-#define SCSI_In__CD__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0\r
-#define SCSI_In__CD__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1\r
-#define SCSI_In__CD__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT\r
-#define SCSI_In__CD__PS CYREG_PRT4_PS\r
-#define SCSI_In__CD__SHIFT 2u\r
-#define SCSI_In__CD__SLW CYREG_PRT4_SLW\r
-#define SCSI_In__DBP__AG CYREG_PRT2_AG\r
-#define SCSI_In__DBP__AMUX CYREG_PRT2_AMUX\r
-#define SCSI_In__DBP__BIE CYREG_PRT2_BIE\r
-#define SCSI_In__DBP__BIT_MASK CYREG_PRT2_BIT_MASK\r
-#define SCSI_In__DBP__BYP CYREG_PRT2_BYP\r
-#define SCSI_In__DBP__CTL CYREG_PRT2_CTL\r
-#define SCSI_In__DBP__DM0 CYREG_PRT2_DM0\r
-#define SCSI_In__DBP__DM1 CYREG_PRT2_DM1\r
-#define SCSI_In__DBP__DM2 CYREG_PRT2_DM2\r
-#define SCSI_In__DBP__DR CYREG_PRT2_DR\r
-#define SCSI_In__DBP__INP_DIS CYREG_PRT2_INP_DIS\r
-#define SCSI_In__DBP__INTTYPE CYREG_PICU2_INTTYPE1\r
-#define SCSI_In__DBP__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG\r
-#define SCSI_In__DBP__LCD_EN CYREG_PRT2_LCD_EN\r
-#define SCSI_In__DBP__MASK 0x02u\r
-#define SCSI_In__DBP__PC CYREG_PRT2_PC1\r
-#define SCSI_In__DBP__PORT 2u\r
-#define SCSI_In__DBP__PRT CYREG_PRT2_PRT\r
-#define SCSI_In__DBP__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL\r
-#define SCSI_In__DBP__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN\r
-#define SCSI_In__DBP__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0\r
-#define SCSI_In__DBP__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1\r
-#define SCSI_In__DBP__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0\r
-#define SCSI_In__DBP__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1\r
-#define SCSI_In__DBP__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT\r
-#define SCSI_In__DBP__PS CYREG_PRT2_PS\r
-#define SCSI_In__DBP__SHIFT 1u\r
-#define SCSI_In__DBP__SLW CYREG_PRT2_SLW\r
-#define SCSI_In__IO__AG CYREG_PRT0_AG\r
-#define SCSI_In__IO__AMUX CYREG_PRT0_AMUX\r
-#define SCSI_In__IO__BIE CYREG_PRT0_BIE\r
-#define SCSI_In__IO__BIT_MASK CYREG_PRT0_BIT_MASK\r
-#define SCSI_In__IO__BYP CYREG_PRT0_BYP\r
-#define SCSI_In__IO__CTL CYREG_PRT0_CTL\r
-#define SCSI_In__IO__DM0 CYREG_PRT0_DM0\r
-#define SCSI_In__IO__DM1 CYREG_PRT0_DM1\r
-#define SCSI_In__IO__DM2 CYREG_PRT0_DM2\r
-#define SCSI_In__IO__DR CYREG_PRT0_DR\r
-#define SCSI_In__IO__INP_DIS CYREG_PRT0_INP_DIS\r
-#define SCSI_In__IO__INTTYPE CYREG_PICU0_INTTYPE4\r
-#define SCSI_In__IO__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
-#define SCSI_In__IO__LCD_EN CYREG_PRT0_LCD_EN\r
-#define SCSI_In__IO__MASK 0x10u\r
-#define SCSI_In__IO__PC CYREG_PRT0_PC4\r
-#define SCSI_In__IO__PORT 0u\r
-#define SCSI_In__IO__PRT CYREG_PRT0_PRT\r
-#define SCSI_In__IO__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
-#define SCSI_In__IO__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
-#define SCSI_In__IO__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
-#define SCSI_In__IO__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
-#define SCSI_In__IO__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
-#define SCSI_In__IO__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
-#define SCSI_In__IO__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
-#define SCSI_In__IO__PS CYREG_PRT0_PS\r
-#define SCSI_In__IO__SHIFT 4u\r
-#define SCSI_In__IO__SLW CYREG_PRT0_SLW\r
-#define SCSI_In__MSG__AG CYREG_PRT4_AG\r
-#define SCSI_In__MSG__AMUX CYREG_PRT4_AMUX\r
-#define SCSI_In__MSG__BIE CYREG_PRT4_BIE\r
-#define SCSI_In__MSG__BIT_MASK CYREG_PRT4_BIT_MASK\r
-#define SCSI_In__MSG__BYP CYREG_PRT4_BYP\r
-#define SCSI_In__MSG__CTL CYREG_PRT4_CTL\r
-#define SCSI_In__MSG__DM0 CYREG_PRT4_DM0\r
-#define SCSI_In__MSG__DM1 CYREG_PRT4_DM1\r
-#define SCSI_In__MSG__DM2 CYREG_PRT4_DM2\r
-#define SCSI_In__MSG__DR CYREG_PRT4_DR\r
-#define SCSI_In__MSG__INP_DIS CYREG_PRT4_INP_DIS\r
-#define SCSI_In__MSG__INTTYPE CYREG_PICU4_INTTYPE6\r
-#define SCSI_In__MSG__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG\r
-#define SCSI_In__MSG__LCD_EN CYREG_PRT4_LCD_EN\r
-#define SCSI_In__MSG__MASK 0x40u\r
-#define SCSI_In__MSG__PC CYREG_PRT4_PC6\r
-#define SCSI_In__MSG__PORT 4u\r
-#define SCSI_In__MSG__PRT CYREG_PRT4_PRT\r
-#define SCSI_In__MSG__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL\r
-#define SCSI_In__MSG__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN\r
-#define SCSI_In__MSG__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0\r
-#define SCSI_In__MSG__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1\r
-#define SCSI_In__MSG__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0\r
-#define SCSI_In__MSG__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1\r
-#define SCSI_In__MSG__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT\r
-#define SCSI_In__MSG__PS CYREG_PRT4_PS\r
-#define SCSI_In__MSG__SHIFT 6u\r
-#define SCSI_In__MSG__SLW CYREG_PRT4_SLW\r
-#define SCSI_In__REQ__AG CYREG_PRT0_AG\r
-#define SCSI_In__REQ__AMUX CYREG_PRT0_AMUX\r
-#define SCSI_In__REQ__BIE CYREG_PRT0_BIE\r
-#define SCSI_In__REQ__BIT_MASK CYREG_PRT0_BIT_MASK\r
-#define SCSI_In__REQ__BYP CYREG_PRT0_BYP\r
-#define SCSI_In__REQ__CTL CYREG_PRT0_CTL\r
-#define SCSI_In__REQ__DM0 CYREG_PRT0_DM0\r
-#define SCSI_In__REQ__DM1 CYREG_PRT0_DM1\r
-#define SCSI_In__REQ__DM2 CYREG_PRT0_DM2\r
-#define SCSI_In__REQ__DR CYREG_PRT0_DR\r
-#define SCSI_In__REQ__INP_DIS CYREG_PRT0_INP_DIS\r
-#define SCSI_In__REQ__INTTYPE CYREG_PICU0_INTTYPE5\r
-#define SCSI_In__REQ__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
-#define SCSI_In__REQ__LCD_EN CYREG_PRT0_LCD_EN\r
-#define SCSI_In__REQ__MASK 0x20u\r
-#define SCSI_In__REQ__PC CYREG_PRT0_PC5\r
-#define SCSI_In__REQ__PORT 0u\r
-#define SCSI_In__REQ__PRT CYREG_PRT0_PRT\r
-#define SCSI_In__REQ__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
-#define SCSI_In__REQ__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
-#define SCSI_In__REQ__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
-#define SCSI_In__REQ__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
-#define SCSI_In__REQ__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
-#define SCSI_In__REQ__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
-#define SCSI_In__REQ__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
-#define SCSI_In__REQ__PS CYREG_PRT0_PS\r
-#define SCSI_In__REQ__SHIFT 5u\r
-#define SCSI_In__REQ__SLW CYREG_PRT0_SLW\r
-#define SCSI_In_DBx__0__AG CYREG_PRT5_AG\r
-#define SCSI_In_DBx__0__AMUX CYREG_PRT5_AMUX\r
-#define SCSI_In_DBx__0__BIE CYREG_PRT5_BIE\r
-#define SCSI_In_DBx__0__BIT_MASK CYREG_PRT5_BIT_MASK\r
-#define SCSI_In_DBx__0__BYP CYREG_PRT5_BYP\r
-#define SCSI_In_DBx__0__CTL CYREG_PRT5_CTL\r
-#define SCSI_In_DBx__0__DM0 CYREG_PRT5_DM0\r
-#define SCSI_In_DBx__0__DM1 CYREG_PRT5_DM1\r
-#define SCSI_In_DBx__0__DM2 CYREG_PRT5_DM2\r
-#define SCSI_In_DBx__0__DR CYREG_PRT5_DR\r
-#define SCSI_In_DBx__0__INP_DIS CYREG_PRT5_INP_DIS\r
-#define SCSI_In_DBx__0__INTTYPE CYREG_PICU5_INTTYPE3\r
-#define SCSI_In_DBx__0__LCD_COM_SEG CYREG_PRT5_LCD_COM_SEG\r
-#define SCSI_In_DBx__0__LCD_EN CYREG_PRT5_LCD_EN\r
-#define SCSI_In_DBx__0__MASK 0x08u\r
-#define SCSI_In_DBx__0__PC CYREG_PRT5_PC3\r
-#define SCSI_In_DBx__0__PORT 5u\r
-#define SCSI_In_DBx__0__PRT CYREG_PRT5_PRT\r
-#define SCSI_In_DBx__0__PRTDSI__CAPS_SEL CYREG_PRT5_CAPS_SEL\r
-#define SCSI_In_DBx__0__PRTDSI__DBL_SYNC_IN CYREG_PRT5_DBL_SYNC_IN\r
-#define SCSI_In_DBx__0__PRTDSI__OE_SEL0 CYREG_PRT5_OE_SEL0\r
-#define SCSI_In_DBx__0__PRTDSI__OE_SEL1 CYREG_PRT5_OE_SEL1\r
-#define SCSI_In_DBx__0__PRTDSI__OUT_SEL0 CYREG_PRT5_OUT_SEL0\r
-#define SCSI_In_DBx__0__PRTDSI__OUT_SEL1 CYREG_PRT5_OUT_SEL1\r
-#define SCSI_In_DBx__0__PRTDSI__SYNC_OUT CYREG_PRT5_SYNC_OUT\r
-#define SCSI_In_DBx__0__PS CYREG_PRT5_PS\r
-#define SCSI_In_DBx__0__SHIFT 3u\r
-#define SCSI_In_DBx__0__SLW CYREG_PRT5_SLW\r
-#define SCSI_In_DBx__1__AG CYREG_PRT5_AG\r
-#define SCSI_In_DBx__1__AMUX CYREG_PRT5_AMUX\r
-#define SCSI_In_DBx__1__BIE CYREG_PRT5_BIE\r
-#define SCSI_In_DBx__1__BIT_MASK CYREG_PRT5_BIT_MASK\r
-#define SCSI_In_DBx__1__BYP CYREG_PRT5_BYP\r
-#define SCSI_In_DBx__1__CTL CYREG_PRT5_CTL\r
-#define SCSI_In_DBx__1__DM0 CYREG_PRT5_DM0\r
-#define SCSI_In_DBx__1__DM1 CYREG_PRT5_DM1\r
-#define SCSI_In_DBx__1__DM2 CYREG_PRT5_DM2\r
-#define SCSI_In_DBx__1__DR CYREG_PRT5_DR\r
-#define SCSI_In_DBx__1__INP_DIS CYREG_PRT5_INP_DIS\r
-#define SCSI_In_DBx__1__INTTYPE CYREG_PICU5_INTTYPE2\r
-#define SCSI_In_DBx__1__LCD_COM_SEG CYREG_PRT5_LCD_COM_SEG\r
-#define SCSI_In_DBx__1__LCD_EN CYREG_PRT5_LCD_EN\r
-#define SCSI_In_DBx__1__MASK 0x04u\r
-#define SCSI_In_DBx__1__PC CYREG_PRT5_PC2\r
-#define SCSI_In_DBx__1__PORT 5u\r
-#define SCSI_In_DBx__1__PRT CYREG_PRT5_PRT\r
-#define SCSI_In_DBx__1__PRTDSI__CAPS_SEL CYREG_PRT5_CAPS_SEL\r
-#define SCSI_In_DBx__1__PRTDSI__DBL_SYNC_IN CYREG_PRT5_DBL_SYNC_IN\r
-#define SCSI_In_DBx__1__PRTDSI__OE_SEL0 CYREG_PRT5_OE_SEL0\r
-#define SCSI_In_DBx__1__PRTDSI__OE_SEL1 CYREG_PRT5_OE_SEL1\r
-#define SCSI_In_DBx__1__PRTDSI__OUT_SEL0 CYREG_PRT5_OUT_SEL0\r
-#define SCSI_In_DBx__1__PRTDSI__OUT_SEL1 CYREG_PRT5_OUT_SEL1\r
-#define SCSI_In_DBx__1__PRTDSI__SYNC_OUT CYREG_PRT5_SYNC_OUT\r
-#define SCSI_In_DBx__1__PS CYREG_PRT5_PS\r
-#define SCSI_In_DBx__1__SHIFT 2u\r
-#define SCSI_In_DBx__1__SLW CYREG_PRT5_SLW\r
-#define SCSI_In_DBx__2__AG CYREG_PRT6_AG\r
-#define SCSI_In_DBx__2__AMUX CYREG_PRT6_AMUX\r
-#define SCSI_In_DBx__2__BIE CYREG_PRT6_BIE\r
-#define SCSI_In_DBx__2__BIT_MASK CYREG_PRT6_BIT_MASK\r
-#define SCSI_In_DBx__2__BYP CYREG_PRT6_BYP\r
-#define SCSI_In_DBx__2__CTL CYREG_PRT6_CTL\r
-#define SCSI_In_DBx__2__DM0 CYREG_PRT6_DM0\r
-#define SCSI_In_DBx__2__DM1 CYREG_PRT6_DM1\r
-#define SCSI_In_DBx__2__DM2 CYREG_PRT6_DM2\r
-#define SCSI_In_DBx__2__DR CYREG_PRT6_DR\r
-#define SCSI_In_DBx__2__INP_DIS CYREG_PRT6_INP_DIS\r
-#define SCSI_In_DBx__2__INTTYPE CYREG_PICU6_INTTYPE7\r
-#define SCSI_In_DBx__2__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
-#define SCSI_In_DBx__2__LCD_EN CYREG_PRT6_LCD_EN\r
-#define SCSI_In_DBx__2__MASK 0x80u\r
-#define SCSI_In_DBx__2__PC CYREG_PRT6_PC7\r
-#define SCSI_In_DBx__2__PORT 6u\r
-#define SCSI_In_DBx__2__PRT CYREG_PRT6_PRT\r
-#define SCSI_In_DBx__2__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
-#define SCSI_In_DBx__2__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
-#define SCSI_In_DBx__2__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
-#define SCSI_In_DBx__2__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
-#define SCSI_In_DBx__2__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
-#define SCSI_In_DBx__2__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
-#define SCSI_In_DBx__2__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
-#define SCSI_In_DBx__2__PS CYREG_PRT6_PS\r
-#define SCSI_In_DBx__2__SHIFT 7u\r
-#define SCSI_In_DBx__2__SLW CYREG_PRT6_SLW\r
-#define SCSI_In_DBx__3__AG CYREG_PRT6_AG\r
-#define SCSI_In_DBx__3__AMUX CYREG_PRT6_AMUX\r
-#define SCSI_In_DBx__3__BIE CYREG_PRT6_BIE\r
-#define SCSI_In_DBx__3__BIT_MASK CYREG_PRT6_BIT_MASK\r
-#define SCSI_In_DBx__3__BYP CYREG_PRT6_BYP\r
-#define SCSI_In_DBx__3__CTL CYREG_PRT6_CTL\r
-#define SCSI_In_DBx__3__DM0 CYREG_PRT6_DM0\r
-#define SCSI_In_DBx__3__DM1 CYREG_PRT6_DM1\r
-#define SCSI_In_DBx__3__DM2 CYREG_PRT6_DM2\r
-#define SCSI_In_DBx__3__DR CYREG_PRT6_DR\r
-#define SCSI_In_DBx__3__INP_DIS CYREG_PRT6_INP_DIS\r
-#define SCSI_In_DBx__3__INTTYPE CYREG_PICU6_INTTYPE6\r
-#define SCSI_In_DBx__3__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
-#define SCSI_In_DBx__3__LCD_EN CYREG_PRT6_LCD_EN\r
-#define SCSI_In_DBx__3__MASK 0x40u\r
-#define SCSI_In_DBx__3__PC CYREG_PRT6_PC6\r
-#define SCSI_In_DBx__3__PORT 6u\r
-#define SCSI_In_DBx__3__PRT CYREG_PRT6_PRT\r
-#define SCSI_In_DBx__3__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
-#define SCSI_In_DBx__3__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
-#define SCSI_In_DBx__3__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
-#define SCSI_In_DBx__3__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
-#define SCSI_In_DBx__3__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
-#define SCSI_In_DBx__3__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
-#define SCSI_In_DBx__3__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
-#define SCSI_In_DBx__3__PS CYREG_PRT6_PS\r
-#define SCSI_In_DBx__3__SHIFT 6u\r
-#define SCSI_In_DBx__3__SLW CYREG_PRT6_SLW\r
-#define SCSI_In_DBx__4__AG CYREG_PRT12_AG\r
-#define SCSI_In_DBx__4__BIE CYREG_PRT12_BIE\r
-#define SCSI_In_DBx__4__BIT_MASK CYREG_PRT12_BIT_MASK\r
-#define SCSI_In_DBx__4__BYP CYREG_PRT12_BYP\r
-#define SCSI_In_DBx__4__DM0 CYREG_PRT12_DM0\r
-#define SCSI_In_DBx__4__DM1 CYREG_PRT12_DM1\r
-#define SCSI_In_DBx__4__DM2 CYREG_PRT12_DM2\r
-#define SCSI_In_DBx__4__DR CYREG_PRT12_DR\r
-#define SCSI_In_DBx__4__INP_DIS CYREG_PRT12_INP_DIS\r
-#define SCSI_In_DBx__4__INTTYPE CYREG_PICU12_INTTYPE5\r
-#define SCSI_In_DBx__4__MASK 0x20u\r
-#define SCSI_In_DBx__4__PC CYREG_PRT12_PC5\r
-#define SCSI_In_DBx__4__PORT 12u\r
-#define SCSI_In_DBx__4__PRT CYREG_PRT12_PRT\r
-#define SCSI_In_DBx__4__PRTDSI__DBL_SYNC_IN CYREG_PRT12_DBL_SYNC_IN\r
-#define SCSI_In_DBx__4__PRTDSI__OE_SEL0 CYREG_PRT12_OE_SEL0\r
-#define SCSI_In_DBx__4__PRTDSI__OE_SEL1 CYREG_PRT12_OE_SEL1\r
-#define SCSI_In_DBx__4__PRTDSI__OUT_SEL0 CYREG_PRT12_OUT_SEL0\r
-#define SCSI_In_DBx__4__PRTDSI__OUT_SEL1 CYREG_PRT12_OUT_SEL1\r
-#define SCSI_In_DBx__4__PRTDSI__SYNC_OUT CYREG_PRT12_SYNC_OUT\r
-#define SCSI_In_DBx__4__PS CYREG_PRT12_PS\r
-#define SCSI_In_DBx__4__SHIFT 5u\r
-#define SCSI_In_DBx__4__SIO_CFG CYREG_PRT12_SIO_CFG\r
-#define SCSI_In_DBx__4__SIO_DIFF CYREG_PRT12_SIO_DIFF\r
-#define SCSI_In_DBx__4__SIO_HYST_EN CYREG_PRT12_SIO_HYST_EN\r
-#define SCSI_In_DBx__4__SIO_REG_HIFREQ CYREG_PRT12_SIO_REG_HIFREQ\r
-#define SCSI_In_DBx__4__SLW CYREG_PRT12_SLW\r
-#define SCSI_In_DBx__5__AG CYREG_PRT12_AG\r
-#define SCSI_In_DBx__5__BIE CYREG_PRT12_BIE\r
-#define SCSI_In_DBx__5__BIT_MASK CYREG_PRT12_BIT_MASK\r
-#define SCSI_In_DBx__5__BYP CYREG_PRT12_BYP\r
-#define SCSI_In_DBx__5__DM0 CYREG_PRT12_DM0\r
-#define SCSI_In_DBx__5__DM1 CYREG_PRT12_DM1\r
-#define SCSI_In_DBx__5__DM2 CYREG_PRT12_DM2\r
-#define SCSI_In_DBx__5__DR CYREG_PRT12_DR\r
-#define SCSI_In_DBx__5__INP_DIS CYREG_PRT12_INP_DIS\r
-#define SCSI_In_DBx__5__INTTYPE CYREG_PICU12_INTTYPE4\r
-#define SCSI_In_DBx__5__MASK 0x10u\r
-#define SCSI_In_DBx__5__PC CYREG_PRT12_PC4\r
-#define SCSI_In_DBx__5__PORT 12u\r
-#define SCSI_In_DBx__5__PRT CYREG_PRT12_PRT\r
-#define SCSI_In_DBx__5__PRTDSI__DBL_SYNC_IN CYREG_PRT12_DBL_SYNC_IN\r
-#define SCSI_In_DBx__5__PRTDSI__OE_SEL0 CYREG_PRT12_OE_SEL0\r
-#define SCSI_In_DBx__5__PRTDSI__OE_SEL1 CYREG_PRT12_OE_SEL1\r
-#define SCSI_In_DBx__5__PRTDSI__OUT_SEL0 CYREG_PRT12_OUT_SEL0\r
-#define SCSI_In_DBx__5__PRTDSI__OUT_SEL1 CYREG_PRT12_OUT_SEL1\r
-#define SCSI_In_DBx__5__PRTDSI__SYNC_OUT CYREG_PRT12_SYNC_OUT\r
-#define SCSI_In_DBx__5__PS CYREG_PRT12_PS\r
-#define SCSI_In_DBx__5__SHIFT 4u\r
-#define SCSI_In_DBx__5__SIO_CFG CYREG_PRT12_SIO_CFG\r
-#define SCSI_In_DBx__5__SIO_DIFF CYREG_PRT12_SIO_DIFF\r
-#define SCSI_In_DBx__5__SIO_HYST_EN CYREG_PRT12_SIO_HYST_EN\r
-#define SCSI_In_DBx__5__SIO_REG_HIFREQ CYREG_PRT12_SIO_REG_HIFREQ\r
-#define SCSI_In_DBx__5__SLW CYREG_PRT12_SLW\r
-#define SCSI_In_DBx__6__AG CYREG_PRT2_AG\r
-#define SCSI_In_DBx__6__AMUX CYREG_PRT2_AMUX\r
-#define SCSI_In_DBx__6__BIE CYREG_PRT2_BIE\r
-#define SCSI_In_DBx__6__BIT_MASK CYREG_PRT2_BIT_MASK\r
-#define SCSI_In_DBx__6__BYP CYREG_PRT2_BYP\r
-#define SCSI_In_DBx__6__CTL CYREG_PRT2_CTL\r
-#define SCSI_In_DBx__6__DM0 CYREG_PRT2_DM0\r
-#define SCSI_In_DBx__6__DM1 CYREG_PRT2_DM1\r
-#define SCSI_In_DBx__6__DM2 CYREG_PRT2_DM2\r
-#define SCSI_In_DBx__6__DR CYREG_PRT2_DR\r
-#define SCSI_In_DBx__6__INP_DIS CYREG_PRT2_INP_DIS\r
-#define SCSI_In_DBx__6__INTTYPE CYREG_PICU2_INTTYPE5\r
-#define SCSI_In_DBx__6__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG\r
-#define SCSI_In_DBx__6__LCD_EN CYREG_PRT2_LCD_EN\r
-#define SCSI_In_DBx__6__MASK 0x20u\r
-#define SCSI_In_DBx__6__PC CYREG_PRT2_PC5\r
-#define SCSI_In_DBx__6__PORT 2u\r
-#define SCSI_In_DBx__6__PRT CYREG_PRT2_PRT\r
-#define SCSI_In_DBx__6__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL\r
-#define SCSI_In_DBx__6__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN\r
-#define SCSI_In_DBx__6__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0\r
-#define SCSI_In_DBx__6__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1\r
-#define SCSI_In_DBx__6__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0\r
-#define SCSI_In_DBx__6__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1\r
-#define SCSI_In_DBx__6__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT\r
-#define SCSI_In_DBx__6__PS CYREG_PRT2_PS\r
-#define SCSI_In_DBx__6__SHIFT 5u\r
-#define SCSI_In_DBx__6__SLW CYREG_PRT2_SLW\r
-#define SCSI_In_DBx__7__AG CYREG_PRT2_AG\r
-#define SCSI_In_DBx__7__AMUX CYREG_PRT2_AMUX\r
-#define SCSI_In_DBx__7__BIE CYREG_PRT2_BIE\r
-#define SCSI_In_DBx__7__BIT_MASK CYREG_PRT2_BIT_MASK\r
-#define SCSI_In_DBx__7__BYP CYREG_PRT2_BYP\r
-#define SCSI_In_DBx__7__CTL CYREG_PRT2_CTL\r
-#define SCSI_In_DBx__7__DM0 CYREG_PRT2_DM0\r
-#define SCSI_In_DBx__7__DM1 CYREG_PRT2_DM1\r
-#define SCSI_In_DBx__7__DM2 CYREG_PRT2_DM2\r
-#define SCSI_In_DBx__7__DR CYREG_PRT2_DR\r
-#define SCSI_In_DBx__7__INP_DIS CYREG_PRT2_INP_DIS\r
-#define SCSI_In_DBx__7__INTTYPE CYREG_PICU2_INTTYPE4\r
-#define SCSI_In_DBx__7__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG\r
-#define SCSI_In_DBx__7__LCD_EN CYREG_PRT2_LCD_EN\r
-#define SCSI_In_DBx__7__MASK 0x10u\r
-#define SCSI_In_DBx__7__PC CYREG_PRT2_PC4\r
-#define SCSI_In_DBx__7__PORT 2u\r
-#define SCSI_In_DBx__7__PRT CYREG_PRT2_PRT\r
-#define SCSI_In_DBx__7__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL\r
-#define SCSI_In_DBx__7__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN\r
-#define SCSI_In_DBx__7__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0\r
-#define SCSI_In_DBx__7__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1\r
-#define SCSI_In_DBx__7__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0\r
-#define SCSI_In_DBx__7__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1\r
-#define SCSI_In_DBx__7__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT\r
-#define SCSI_In_DBx__7__PS CYREG_PRT2_PS\r
-#define SCSI_In_DBx__7__SHIFT 4u\r
-#define SCSI_In_DBx__7__SLW CYREG_PRT2_SLW\r
-#define SCSI_In_DBx__DB0__AG CYREG_PRT5_AG\r
-#define SCSI_In_DBx__DB0__AMUX CYREG_PRT5_AMUX\r
-#define SCSI_In_DBx__DB0__BIE CYREG_PRT5_BIE\r
-#define SCSI_In_DBx__DB0__BIT_MASK CYREG_PRT5_BIT_MASK\r
-#define SCSI_In_DBx__DB0__BYP CYREG_PRT5_BYP\r
-#define SCSI_In_DBx__DB0__CTL CYREG_PRT5_CTL\r
-#define SCSI_In_DBx__DB0__DM0 CYREG_PRT5_DM0\r
-#define SCSI_In_DBx__DB0__DM1 CYREG_PRT5_DM1\r
-#define SCSI_In_DBx__DB0__DM2 CYREG_PRT5_DM2\r
-#define SCSI_In_DBx__DB0__DR CYREG_PRT5_DR\r
-#define SCSI_In_DBx__DB0__INP_DIS CYREG_PRT5_INP_DIS\r
-#define SCSI_In_DBx__DB0__INTTYPE CYREG_PICU5_INTTYPE3\r
-#define SCSI_In_DBx__DB0__LCD_COM_SEG CYREG_PRT5_LCD_COM_SEG\r
-#define SCSI_In_DBx__DB0__LCD_EN CYREG_PRT5_LCD_EN\r
-#define SCSI_In_DBx__DB0__MASK 0x08u\r
-#define SCSI_In_DBx__DB0__PC CYREG_PRT5_PC3\r
-#define SCSI_In_DBx__DB0__PORT 5u\r
-#define SCSI_In_DBx__DB0__PRT CYREG_PRT5_PRT\r
-#define SCSI_In_DBx__DB0__PRTDSI__CAPS_SEL CYREG_PRT5_CAPS_SEL\r
-#define SCSI_In_DBx__DB0__PRTDSI__DBL_SYNC_IN CYREG_PRT5_DBL_SYNC_IN\r
-#define SCSI_In_DBx__DB0__PRTDSI__OE_SEL0 CYREG_PRT5_OE_SEL0\r
-#define SCSI_In_DBx__DB0__PRTDSI__OE_SEL1 CYREG_PRT5_OE_SEL1\r
-#define SCSI_In_DBx__DB0__PRTDSI__OUT_SEL0 CYREG_PRT5_OUT_SEL0\r
-#define SCSI_In_DBx__DB0__PRTDSI__OUT_SEL1 CYREG_PRT5_OUT_SEL1\r
-#define SCSI_In_DBx__DB0__PRTDSI__SYNC_OUT CYREG_PRT5_SYNC_OUT\r
-#define SCSI_In_DBx__DB0__PS CYREG_PRT5_PS\r
-#define SCSI_In_DBx__DB0__SHIFT 3u\r
-#define SCSI_In_DBx__DB0__SLW CYREG_PRT5_SLW\r
-#define SCSI_In_DBx__DB1__AG CYREG_PRT5_AG\r
-#define SCSI_In_DBx__DB1__AMUX CYREG_PRT5_AMUX\r
-#define SCSI_In_DBx__DB1__BIE CYREG_PRT5_BIE\r
-#define SCSI_In_DBx__DB1__BIT_MASK CYREG_PRT5_BIT_MASK\r
-#define SCSI_In_DBx__DB1__BYP CYREG_PRT5_BYP\r
-#define SCSI_In_DBx__DB1__CTL CYREG_PRT5_CTL\r
-#define SCSI_In_DBx__DB1__DM0 CYREG_PRT5_DM0\r
-#define SCSI_In_DBx__DB1__DM1 CYREG_PRT5_DM1\r
-#define SCSI_In_DBx__DB1__DM2 CYREG_PRT5_DM2\r
-#define SCSI_In_DBx__DB1__DR CYREG_PRT5_DR\r
-#define SCSI_In_DBx__DB1__INP_DIS CYREG_PRT5_INP_DIS\r
-#define SCSI_In_DBx__DB1__INTTYPE CYREG_PICU5_INTTYPE2\r
-#define SCSI_In_DBx__DB1__LCD_COM_SEG CYREG_PRT5_LCD_COM_SEG\r
-#define SCSI_In_DBx__DB1__LCD_EN CYREG_PRT5_LCD_EN\r
-#define SCSI_In_DBx__DB1__MASK 0x04u\r
-#define SCSI_In_DBx__DB1__PC CYREG_PRT5_PC2\r
-#define SCSI_In_DBx__DB1__PORT 5u\r
-#define SCSI_In_DBx__DB1__PRT CYREG_PRT5_PRT\r
-#define SCSI_In_DBx__DB1__PRTDSI__CAPS_SEL CYREG_PRT5_CAPS_SEL\r
-#define SCSI_In_DBx__DB1__PRTDSI__DBL_SYNC_IN CYREG_PRT5_DBL_SYNC_IN\r
-#define SCSI_In_DBx__DB1__PRTDSI__OE_SEL0 CYREG_PRT5_OE_SEL0\r
-#define SCSI_In_DBx__DB1__PRTDSI__OE_SEL1 CYREG_PRT5_OE_SEL1\r
-#define SCSI_In_DBx__DB1__PRTDSI__OUT_SEL0 CYREG_PRT5_OUT_SEL0\r
-#define SCSI_In_DBx__DB1__PRTDSI__OUT_SEL1 CYREG_PRT5_OUT_SEL1\r
-#define SCSI_In_DBx__DB1__PRTDSI__SYNC_OUT CYREG_PRT5_SYNC_OUT\r
-#define SCSI_In_DBx__DB1__PS CYREG_PRT5_PS\r
-#define SCSI_In_DBx__DB1__SHIFT 2u\r
-#define SCSI_In_DBx__DB1__SLW CYREG_PRT5_SLW\r
-#define SCSI_In_DBx__DB2__AG CYREG_PRT6_AG\r
-#define SCSI_In_DBx__DB2__AMUX CYREG_PRT6_AMUX\r
-#define SCSI_In_DBx__DB2__BIE CYREG_PRT6_BIE\r
-#define SCSI_In_DBx__DB2__BIT_MASK CYREG_PRT6_BIT_MASK\r
-#define SCSI_In_DBx__DB2__BYP CYREG_PRT6_BYP\r
-#define SCSI_In_DBx__DB2__CTL CYREG_PRT6_CTL\r
-#define SCSI_In_DBx__DB2__DM0 CYREG_PRT6_DM0\r
-#define SCSI_In_DBx__DB2__DM1 CYREG_PRT6_DM1\r
-#define SCSI_In_DBx__DB2__DM2 CYREG_PRT6_DM2\r
-#define SCSI_In_DBx__DB2__DR CYREG_PRT6_DR\r
-#define SCSI_In_DBx__DB2__INP_DIS CYREG_PRT6_INP_DIS\r
-#define SCSI_In_DBx__DB2__INTTYPE CYREG_PICU6_INTTYPE7\r
-#define SCSI_In_DBx__DB2__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
-#define SCSI_In_DBx__DB2__LCD_EN CYREG_PRT6_LCD_EN\r
-#define SCSI_In_DBx__DB2__MASK 0x80u\r
-#define SCSI_In_DBx__DB2__PC CYREG_PRT6_PC7\r
-#define SCSI_In_DBx__DB2__PORT 6u\r
-#define SCSI_In_DBx__DB2__PRT CYREG_PRT6_PRT\r
-#define SCSI_In_DBx__DB2__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
-#define SCSI_In_DBx__DB2__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
-#define SCSI_In_DBx__DB2__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
-#define SCSI_In_DBx__DB2__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
-#define SCSI_In_DBx__DB2__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
-#define SCSI_In_DBx__DB2__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
-#define SCSI_In_DBx__DB2__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
-#define SCSI_In_DBx__DB2__PS CYREG_PRT6_PS\r
-#define SCSI_In_DBx__DB2__SHIFT 7u\r
-#define SCSI_In_DBx__DB2__SLW CYREG_PRT6_SLW\r
-#define SCSI_In_DBx__DB3__AG CYREG_PRT6_AG\r
-#define SCSI_In_DBx__DB3__AMUX CYREG_PRT6_AMUX\r
-#define SCSI_In_DBx__DB3__BIE CYREG_PRT6_BIE\r
-#define SCSI_In_DBx__DB3__BIT_MASK CYREG_PRT6_BIT_MASK\r
-#define SCSI_In_DBx__DB3__BYP CYREG_PRT6_BYP\r
-#define SCSI_In_DBx__DB3__CTL CYREG_PRT6_CTL\r
-#define SCSI_In_DBx__DB3__DM0 CYREG_PRT6_DM0\r
-#define SCSI_In_DBx__DB3__DM1 CYREG_PRT6_DM1\r
-#define SCSI_In_DBx__DB3__DM2 CYREG_PRT6_DM2\r
-#define SCSI_In_DBx__DB3__DR CYREG_PRT6_DR\r
-#define SCSI_In_DBx__DB3__INP_DIS CYREG_PRT6_INP_DIS\r
-#define SCSI_In_DBx__DB3__INTTYPE CYREG_PICU6_INTTYPE6\r
-#define SCSI_In_DBx__DB3__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
-#define SCSI_In_DBx__DB3__LCD_EN CYREG_PRT6_LCD_EN\r
-#define SCSI_In_DBx__DB3__MASK 0x40u\r
-#define SCSI_In_DBx__DB3__PC CYREG_PRT6_PC6\r
-#define SCSI_In_DBx__DB3__PORT 6u\r
-#define SCSI_In_DBx__DB3__PRT CYREG_PRT6_PRT\r
-#define SCSI_In_DBx__DB3__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
-#define SCSI_In_DBx__DB3__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
-#define SCSI_In_DBx__DB3__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
-#define SCSI_In_DBx__DB3__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
-#define SCSI_In_DBx__DB3__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
-#define SCSI_In_DBx__DB3__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
-#define SCSI_In_DBx__DB3__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
-#define SCSI_In_DBx__DB3__PS CYREG_PRT6_PS\r
-#define SCSI_In_DBx__DB3__SHIFT 6u\r
-#define SCSI_In_DBx__DB3__SLW CYREG_PRT6_SLW\r
-#define SCSI_In_DBx__DB4__AG CYREG_PRT12_AG\r
-#define SCSI_In_DBx__DB4__BIE CYREG_PRT12_BIE\r
-#define SCSI_In_DBx__DB4__BIT_MASK CYREG_PRT12_BIT_MASK\r
-#define SCSI_In_DBx__DB4__BYP CYREG_PRT12_BYP\r
-#define SCSI_In_DBx__DB4__DM0 CYREG_PRT12_DM0\r
-#define SCSI_In_DBx__DB4__DM1 CYREG_PRT12_DM1\r
-#define SCSI_In_DBx__DB4__DM2 CYREG_PRT12_DM2\r
-#define SCSI_In_DBx__DB4__DR CYREG_PRT12_DR\r
-#define SCSI_In_DBx__DB4__INP_DIS CYREG_PRT12_INP_DIS\r
-#define SCSI_In_DBx__DB4__INTTYPE CYREG_PICU12_INTTYPE5\r
-#define SCSI_In_DBx__DB4__MASK 0x20u\r
-#define SCSI_In_DBx__DB4__PC CYREG_PRT12_PC5\r
-#define SCSI_In_DBx__DB4__PORT 12u\r
-#define SCSI_In_DBx__DB4__PRT CYREG_PRT12_PRT\r
-#define SCSI_In_DBx__DB4__PRTDSI__DBL_SYNC_IN CYREG_PRT12_DBL_SYNC_IN\r
-#define SCSI_In_DBx__DB4__PRTDSI__OE_SEL0 CYREG_PRT12_OE_SEL0\r
-#define SCSI_In_DBx__DB4__PRTDSI__OE_SEL1 CYREG_PRT12_OE_SEL1\r
-#define SCSI_In_DBx__DB4__PRTDSI__OUT_SEL0 CYREG_PRT12_OUT_SEL0\r
-#define SCSI_In_DBx__DB4__PRTDSI__OUT_SEL1 CYREG_PRT12_OUT_SEL1\r
-#define SCSI_In_DBx__DB4__PRTDSI__SYNC_OUT CYREG_PRT12_SYNC_OUT\r
-#define SCSI_In_DBx__DB4__PS CYREG_PRT12_PS\r
-#define SCSI_In_DBx__DB4__SHIFT 5u\r
-#define SCSI_In_DBx__DB4__SIO_CFG CYREG_PRT12_SIO_CFG\r
-#define SCSI_In_DBx__DB4__SIO_DIFF CYREG_PRT12_SIO_DIFF\r
-#define SCSI_In_DBx__DB4__SIO_HYST_EN CYREG_PRT12_SIO_HYST_EN\r
-#define SCSI_In_DBx__DB4__SIO_REG_HIFREQ CYREG_PRT12_SIO_REG_HIFREQ\r
-#define SCSI_In_DBx__DB4__SLW CYREG_PRT12_SLW\r
-#define SCSI_In_DBx__DB5__AG CYREG_PRT12_AG\r
-#define SCSI_In_DBx__DB5__BIE CYREG_PRT12_BIE\r
-#define SCSI_In_DBx__DB5__BIT_MASK CYREG_PRT12_BIT_MASK\r
-#define SCSI_In_DBx__DB5__BYP CYREG_PRT12_BYP\r
-#define SCSI_In_DBx__DB5__DM0 CYREG_PRT12_DM0\r
-#define SCSI_In_DBx__DB5__DM1 CYREG_PRT12_DM1\r
-#define SCSI_In_DBx__DB5__DM2 CYREG_PRT12_DM2\r
-#define SCSI_In_DBx__DB5__DR CYREG_PRT12_DR\r
-#define SCSI_In_DBx__DB5__INP_DIS CYREG_PRT12_INP_DIS\r
-#define SCSI_In_DBx__DB5__INTTYPE CYREG_PICU12_INTTYPE4\r
-#define SCSI_In_DBx__DB5__MASK 0x10u\r
-#define SCSI_In_DBx__DB5__PC CYREG_PRT12_PC4\r
-#define SCSI_In_DBx__DB5__PORT 12u\r
-#define SCSI_In_DBx__DB5__PRT CYREG_PRT12_PRT\r
-#define SCSI_In_DBx__DB5__PRTDSI__DBL_SYNC_IN CYREG_PRT12_DBL_SYNC_IN\r
-#define SCSI_In_DBx__DB5__PRTDSI__OE_SEL0 CYREG_PRT12_OE_SEL0\r
-#define SCSI_In_DBx__DB5__PRTDSI__OE_SEL1 CYREG_PRT12_OE_SEL1\r
-#define SCSI_In_DBx__DB5__PRTDSI__OUT_SEL0 CYREG_PRT12_OUT_SEL0\r
-#define SCSI_In_DBx__DB5__PRTDSI__OUT_SEL1 CYREG_PRT12_OUT_SEL1\r
-#define SCSI_In_DBx__DB5__PRTDSI__SYNC_OUT CYREG_PRT12_SYNC_OUT\r
-#define SCSI_In_DBx__DB5__PS CYREG_PRT12_PS\r
-#define SCSI_In_DBx__DB5__SHIFT 4u\r
-#define SCSI_In_DBx__DB5__SIO_CFG CYREG_PRT12_SIO_CFG\r
-#define SCSI_In_DBx__DB5__SIO_DIFF CYREG_PRT12_SIO_DIFF\r
-#define SCSI_In_DBx__DB5__SIO_HYST_EN CYREG_PRT12_SIO_HYST_EN\r
-#define SCSI_In_DBx__DB5__SIO_REG_HIFREQ CYREG_PRT12_SIO_REG_HIFREQ\r
-#define SCSI_In_DBx__DB5__SLW CYREG_PRT12_SLW\r
-#define SCSI_In_DBx__DB6__AG CYREG_PRT2_AG\r
-#define SCSI_In_DBx__DB6__AMUX CYREG_PRT2_AMUX\r
-#define SCSI_In_DBx__DB6__BIE CYREG_PRT2_BIE\r
-#define SCSI_In_DBx__DB6__BIT_MASK CYREG_PRT2_BIT_MASK\r
-#define SCSI_In_DBx__DB6__BYP CYREG_PRT2_BYP\r
-#define SCSI_In_DBx__DB6__CTL CYREG_PRT2_CTL\r
-#define SCSI_In_DBx__DB6__DM0 CYREG_PRT2_DM0\r
-#define SCSI_In_DBx__DB6__DM1 CYREG_PRT2_DM1\r
-#define SCSI_In_DBx__DB6__DM2 CYREG_PRT2_DM2\r
-#define SCSI_In_DBx__DB6__DR CYREG_PRT2_DR\r
-#define SCSI_In_DBx__DB6__INP_DIS CYREG_PRT2_INP_DIS\r
-#define SCSI_In_DBx__DB6__INTTYPE CYREG_PICU2_INTTYPE5\r
-#define SCSI_In_DBx__DB6__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG\r
-#define SCSI_In_DBx__DB6__LCD_EN CYREG_PRT2_LCD_EN\r
-#define SCSI_In_DBx__DB6__MASK 0x20u\r
-#define SCSI_In_DBx__DB6__PC CYREG_PRT2_PC5\r
-#define SCSI_In_DBx__DB6__PORT 2u\r
-#define SCSI_In_DBx__DB6__PRT CYREG_PRT2_PRT\r
-#define SCSI_In_DBx__DB6__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL\r
-#define SCSI_In_DBx__DB6__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN\r
-#define SCSI_In_DBx__DB6__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0\r
-#define SCSI_In_DBx__DB6__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1\r
-#define SCSI_In_DBx__DB6__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0\r
-#define SCSI_In_DBx__DB6__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1\r
-#define SCSI_In_DBx__DB6__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT\r
-#define SCSI_In_DBx__DB6__PS CYREG_PRT2_PS\r
-#define SCSI_In_DBx__DB6__SHIFT 5u\r
-#define SCSI_In_DBx__DB6__SLW CYREG_PRT2_SLW\r
-#define SCSI_In_DBx__DB7__AG CYREG_PRT2_AG\r
-#define SCSI_In_DBx__DB7__AMUX CYREG_PRT2_AMUX\r
-#define SCSI_In_DBx__DB7__BIE CYREG_PRT2_BIE\r
-#define SCSI_In_DBx__DB7__BIT_MASK CYREG_PRT2_BIT_MASK\r
-#define SCSI_In_DBx__DB7__BYP CYREG_PRT2_BYP\r
-#define SCSI_In_DBx__DB7__CTL CYREG_PRT2_CTL\r
-#define SCSI_In_DBx__DB7__DM0 CYREG_PRT2_DM0\r
-#define SCSI_In_DBx__DB7__DM1 CYREG_PRT2_DM1\r
-#define SCSI_In_DBx__DB7__DM2 CYREG_PRT2_DM2\r
-#define SCSI_In_DBx__DB7__DR CYREG_PRT2_DR\r
-#define SCSI_In_DBx__DB7__INP_DIS CYREG_PRT2_INP_DIS\r
-#define SCSI_In_DBx__DB7__INTTYPE CYREG_PICU2_INTTYPE4\r
-#define SCSI_In_DBx__DB7__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG\r
-#define SCSI_In_DBx__DB7__LCD_EN CYREG_PRT2_LCD_EN\r
-#define SCSI_In_DBx__DB7__MASK 0x10u\r
-#define SCSI_In_DBx__DB7__PC CYREG_PRT2_PC4\r
-#define SCSI_In_DBx__DB7__PORT 2u\r
-#define SCSI_In_DBx__DB7__PRT CYREG_PRT2_PRT\r
-#define SCSI_In_DBx__DB7__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL\r
-#define SCSI_In_DBx__DB7__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN\r
-#define SCSI_In_DBx__DB7__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0\r
-#define SCSI_In_DBx__DB7__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1\r
-#define SCSI_In_DBx__DB7__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0\r
-#define SCSI_In_DBx__DB7__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1\r
-#define SCSI_In_DBx__DB7__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT\r
-#define SCSI_In_DBx__DB7__PS CYREG_PRT2_PS\r
-#define SCSI_In_DBx__DB7__SHIFT 4u\r
-#define SCSI_In_DBx__DB7__SLW CYREG_PRT2_SLW\r
-\r
-/* SCSI_Noise */\r
-#define SCSI_Noise__0__AG CYREG_PRT2_AG\r
-#define SCSI_Noise__0__AMUX CYREG_PRT2_AMUX\r
-#define SCSI_Noise__0__BIE CYREG_PRT2_BIE\r
-#define SCSI_Noise__0__BIT_MASK CYREG_PRT2_BIT_MASK\r
-#define SCSI_Noise__0__BYP CYREG_PRT2_BYP\r
-#define SCSI_Noise__0__CTL CYREG_PRT2_CTL\r
-#define SCSI_Noise__0__DM0 CYREG_PRT2_DM0\r
-#define SCSI_Noise__0__DM1 CYREG_PRT2_DM1\r
-#define SCSI_Noise__0__DM2 CYREG_PRT2_DM2\r
-#define SCSI_Noise__0__DR CYREG_PRT2_DR\r
-#define SCSI_Noise__0__INP_DIS CYREG_PRT2_INP_DIS\r
-#define SCSI_Noise__0__INTTYPE CYREG_PICU2_INTTYPE0\r
-#define SCSI_Noise__0__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG\r
-#define SCSI_Noise__0__LCD_EN CYREG_PRT2_LCD_EN\r
-#define SCSI_Noise__0__MASK 0x01u\r
-#define SCSI_Noise__0__PC CYREG_PRT2_PC0\r
-#define SCSI_Noise__0__PORT 2u\r
-#define SCSI_Noise__0__PRT CYREG_PRT2_PRT\r
-#define SCSI_Noise__0__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL\r
-#define SCSI_Noise__0__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN\r
-#define SCSI_Noise__0__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0\r
-#define SCSI_Noise__0__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1\r
-#define SCSI_Noise__0__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0\r
-#define SCSI_Noise__0__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1\r
-#define SCSI_Noise__0__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT\r
-#define SCSI_Noise__0__PS CYREG_PRT2_PS\r
-#define SCSI_Noise__0__SHIFT 0u\r
-#define SCSI_Noise__0__SLW CYREG_PRT2_SLW\r
-#define SCSI_Noise__1__AG CYREG_PRT6_AG\r
-#define SCSI_Noise__1__AMUX CYREG_PRT6_AMUX\r
-#define SCSI_Noise__1__BIE CYREG_PRT6_BIE\r
-#define SCSI_Noise__1__BIT_MASK CYREG_PRT6_BIT_MASK\r
-#define SCSI_Noise__1__BYP CYREG_PRT6_BYP\r
-#define SCSI_Noise__1__CTL CYREG_PRT6_CTL\r
-#define SCSI_Noise__1__DM0 CYREG_PRT6_DM0\r
-#define SCSI_Noise__1__DM1 CYREG_PRT6_DM1\r
-#define SCSI_Noise__1__DM2 CYREG_PRT6_DM2\r
-#define SCSI_Noise__1__DR CYREG_PRT6_DR\r
-#define SCSI_Noise__1__INP_DIS CYREG_PRT6_INP_DIS\r
-#define SCSI_Noise__1__INTTYPE CYREG_PICU6_INTTYPE3\r
-#define SCSI_Noise__1__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
-#define SCSI_Noise__1__LCD_EN CYREG_PRT6_LCD_EN\r
-#define SCSI_Noise__1__MASK 0x08u\r
-#define SCSI_Noise__1__PC CYREG_PRT6_PC3\r
-#define SCSI_Noise__1__PORT 6u\r
-#define SCSI_Noise__1__PRT CYREG_PRT6_PRT\r
-#define SCSI_Noise__1__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
-#define SCSI_Noise__1__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
-#define SCSI_Noise__1__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
-#define SCSI_Noise__1__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
-#define SCSI_Noise__1__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
-#define SCSI_Noise__1__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
-#define SCSI_Noise__1__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
-#define SCSI_Noise__1__PS CYREG_PRT6_PS\r
-#define SCSI_Noise__1__SHIFT 3u\r
-#define SCSI_Noise__1__SLW CYREG_PRT6_SLW\r
-#define SCSI_Noise__2__AG CYREG_PRT4_AG\r
-#define SCSI_Noise__2__AMUX CYREG_PRT4_AMUX\r
-#define SCSI_Noise__2__BIE CYREG_PRT4_BIE\r
-#define SCSI_Noise__2__BIT_MASK CYREG_PRT4_BIT_MASK\r
-#define SCSI_Noise__2__BYP CYREG_PRT4_BYP\r
-#define SCSI_Noise__2__CTL CYREG_PRT4_CTL\r
-#define SCSI_Noise__2__DM0 CYREG_PRT4_DM0\r
-#define SCSI_Noise__2__DM1 CYREG_PRT4_DM1\r
-#define SCSI_Noise__2__DM2 CYREG_PRT4_DM2\r
-#define SCSI_Noise__2__DR CYREG_PRT4_DR\r
-#define SCSI_Noise__2__INP_DIS CYREG_PRT4_INP_DIS\r
-#define SCSI_Noise__2__INTTYPE CYREG_PICU4_INTTYPE3\r
-#define SCSI_Noise__2__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG\r
-#define SCSI_Noise__2__LCD_EN CYREG_PRT4_LCD_EN\r
-#define SCSI_Noise__2__MASK 0x08u\r
-#define SCSI_Noise__2__PC CYREG_PRT4_PC3\r
-#define SCSI_Noise__2__PORT 4u\r
-#define SCSI_Noise__2__PRT CYREG_PRT4_PRT\r
-#define SCSI_Noise__2__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL\r
-#define SCSI_Noise__2__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN\r
-#define SCSI_Noise__2__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0\r
-#define SCSI_Noise__2__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1\r
-#define SCSI_Noise__2__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0\r
-#define SCSI_Noise__2__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1\r
-#define SCSI_Noise__2__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT\r
-#define SCSI_Noise__2__PS CYREG_PRT4_PS\r
-#define SCSI_Noise__2__SHIFT 3u\r
-#define SCSI_Noise__2__SLW CYREG_PRT4_SLW\r
-#define SCSI_Noise__3__AG CYREG_PRT4_AG\r
-#define SCSI_Noise__3__AMUX CYREG_PRT4_AMUX\r
-#define SCSI_Noise__3__BIE CYREG_PRT4_BIE\r
-#define SCSI_Noise__3__BIT_MASK CYREG_PRT4_BIT_MASK\r
-#define SCSI_Noise__3__BYP CYREG_PRT4_BYP\r
-#define SCSI_Noise__3__CTL CYREG_PRT4_CTL\r
-#define SCSI_Noise__3__DM0 CYREG_PRT4_DM0\r
-#define SCSI_Noise__3__DM1 CYREG_PRT4_DM1\r
-#define SCSI_Noise__3__DM2 CYREG_PRT4_DM2\r
-#define SCSI_Noise__3__DR CYREG_PRT4_DR\r
-#define SCSI_Noise__3__INP_DIS CYREG_PRT4_INP_DIS\r
-#define SCSI_Noise__3__INTTYPE CYREG_PICU4_INTTYPE7\r
-#define SCSI_Noise__3__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG\r
-#define SCSI_Noise__3__LCD_EN CYREG_PRT4_LCD_EN\r
-#define SCSI_Noise__3__MASK 0x80u\r
-#define SCSI_Noise__3__PC CYREG_PRT4_PC7\r
-#define SCSI_Noise__3__PORT 4u\r
-#define SCSI_Noise__3__PRT CYREG_PRT4_PRT\r
-#define SCSI_Noise__3__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL\r
-#define SCSI_Noise__3__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN\r
-#define SCSI_Noise__3__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0\r
-#define SCSI_Noise__3__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1\r
-#define SCSI_Noise__3__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0\r
-#define SCSI_Noise__3__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1\r
-#define SCSI_Noise__3__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT\r
-#define SCSI_Noise__3__PS CYREG_PRT4_PS\r
-#define SCSI_Noise__3__SHIFT 7u\r
-#define SCSI_Noise__3__SLW CYREG_PRT4_SLW\r
-#define SCSI_Noise__4__AG CYREG_PRT6_AG\r
-#define SCSI_Noise__4__AMUX CYREG_PRT6_AMUX\r
-#define SCSI_Noise__4__BIE CYREG_PRT6_BIE\r
-#define SCSI_Noise__4__BIT_MASK CYREG_PRT6_BIT_MASK\r
-#define SCSI_Noise__4__BYP CYREG_PRT6_BYP\r
-#define SCSI_Noise__4__CTL CYREG_PRT6_CTL\r
-#define SCSI_Noise__4__DM0 CYREG_PRT6_DM0\r
-#define SCSI_Noise__4__DM1 CYREG_PRT6_DM1\r
-#define SCSI_Noise__4__DM2 CYREG_PRT6_DM2\r
-#define SCSI_Noise__4__DR CYREG_PRT6_DR\r
-#define SCSI_Noise__4__INP_DIS CYREG_PRT6_INP_DIS\r
-#define SCSI_Noise__4__INTTYPE CYREG_PICU6_INTTYPE2\r
-#define SCSI_Noise__4__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
-#define SCSI_Noise__4__LCD_EN CYREG_PRT6_LCD_EN\r
-#define SCSI_Noise__4__MASK 0x04u\r
-#define SCSI_Noise__4__PC CYREG_PRT6_PC2\r
-#define SCSI_Noise__4__PORT 6u\r
-#define SCSI_Noise__4__PRT CYREG_PRT6_PRT\r
-#define SCSI_Noise__4__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
-#define SCSI_Noise__4__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
-#define SCSI_Noise__4__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
-#define SCSI_Noise__4__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
-#define SCSI_Noise__4__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
-#define SCSI_Noise__4__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
-#define SCSI_Noise__4__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
-#define SCSI_Noise__4__PS CYREG_PRT6_PS\r
-#define SCSI_Noise__4__SHIFT 2u\r
-#define SCSI_Noise__4__SLW CYREG_PRT6_SLW\r
-#define SCSI_Noise__ACK__AG CYREG_PRT6_AG\r
-#define SCSI_Noise__ACK__AMUX CYREG_PRT6_AMUX\r
-#define SCSI_Noise__ACK__BIE CYREG_PRT6_BIE\r
-#define SCSI_Noise__ACK__BIT_MASK CYREG_PRT6_BIT_MASK\r
-#define SCSI_Noise__ACK__BYP CYREG_PRT6_BYP\r
-#define SCSI_Noise__ACK__CTL CYREG_PRT6_CTL\r
-#define SCSI_Noise__ACK__DM0 CYREG_PRT6_DM0\r
-#define SCSI_Noise__ACK__DM1 CYREG_PRT6_DM1\r
-#define SCSI_Noise__ACK__DM2 CYREG_PRT6_DM2\r
-#define SCSI_Noise__ACK__DR CYREG_PRT6_DR\r
-#define SCSI_Noise__ACK__INP_DIS CYREG_PRT6_INP_DIS\r
-#define SCSI_Noise__ACK__INTTYPE CYREG_PICU6_INTTYPE2\r
-#define SCSI_Noise__ACK__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
-#define SCSI_Noise__ACK__LCD_EN CYREG_PRT6_LCD_EN\r
-#define SCSI_Noise__ACK__MASK 0x04u\r
-#define SCSI_Noise__ACK__PC CYREG_PRT6_PC2\r
-#define SCSI_Noise__ACK__PORT 6u\r
-#define SCSI_Noise__ACK__PRT CYREG_PRT6_PRT\r
-#define SCSI_Noise__ACK__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
-#define SCSI_Noise__ACK__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
-#define SCSI_Noise__ACK__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
-#define SCSI_Noise__ACK__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
-#define SCSI_Noise__ACK__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
-#define SCSI_Noise__ACK__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
-#define SCSI_Noise__ACK__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
-#define SCSI_Noise__ACK__PS CYREG_PRT6_PS\r
-#define SCSI_Noise__ACK__SHIFT 2u\r
-#define SCSI_Noise__ACK__SLW CYREG_PRT6_SLW\r
-#define SCSI_Noise__ATN__AG CYREG_PRT2_AG\r
-#define SCSI_Noise__ATN__AMUX CYREG_PRT2_AMUX\r
-#define SCSI_Noise__ATN__BIE CYREG_PRT2_BIE\r
-#define SCSI_Noise__ATN__BIT_MASK CYREG_PRT2_BIT_MASK\r
-#define SCSI_Noise__ATN__BYP CYREG_PRT2_BYP\r
-#define SCSI_Noise__ATN__CTL CYREG_PRT2_CTL\r
-#define SCSI_Noise__ATN__DM0 CYREG_PRT2_DM0\r
-#define SCSI_Noise__ATN__DM1 CYREG_PRT2_DM1\r
-#define SCSI_Noise__ATN__DM2 CYREG_PRT2_DM2\r
-#define SCSI_Noise__ATN__DR CYREG_PRT2_DR\r
-#define SCSI_Noise__ATN__INP_DIS CYREG_PRT2_INP_DIS\r
-#define SCSI_Noise__ATN__INTTYPE CYREG_PICU2_INTTYPE0\r
-#define SCSI_Noise__ATN__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG\r
-#define SCSI_Noise__ATN__LCD_EN CYREG_PRT2_LCD_EN\r
-#define SCSI_Noise__ATN__MASK 0x01u\r
-#define SCSI_Noise__ATN__PC CYREG_PRT2_PC0\r
-#define SCSI_Noise__ATN__PORT 2u\r
-#define SCSI_Noise__ATN__PRT CYREG_PRT2_PRT\r
-#define SCSI_Noise__ATN__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL\r
-#define SCSI_Noise__ATN__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN\r
-#define SCSI_Noise__ATN__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0\r
-#define SCSI_Noise__ATN__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1\r
-#define SCSI_Noise__ATN__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0\r
-#define SCSI_Noise__ATN__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1\r
-#define SCSI_Noise__ATN__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT\r
-#define SCSI_Noise__ATN__PS CYREG_PRT2_PS\r
-#define SCSI_Noise__ATN__SHIFT 0u\r
-#define SCSI_Noise__ATN__SLW CYREG_PRT2_SLW\r
-#define SCSI_Noise__BSY__AG CYREG_PRT6_AG\r
-#define SCSI_Noise__BSY__AMUX CYREG_PRT6_AMUX\r
-#define SCSI_Noise__BSY__BIE CYREG_PRT6_BIE\r
-#define SCSI_Noise__BSY__BIT_MASK CYREG_PRT6_BIT_MASK\r
-#define SCSI_Noise__BSY__BYP CYREG_PRT6_BYP\r
-#define SCSI_Noise__BSY__CTL CYREG_PRT6_CTL\r
-#define SCSI_Noise__BSY__DM0 CYREG_PRT6_DM0\r
-#define SCSI_Noise__BSY__DM1 CYREG_PRT6_DM1\r
-#define SCSI_Noise__BSY__DM2 CYREG_PRT6_DM2\r
-#define SCSI_Noise__BSY__DR CYREG_PRT6_DR\r
-#define SCSI_Noise__BSY__INP_DIS CYREG_PRT6_INP_DIS\r
-#define SCSI_Noise__BSY__INTTYPE CYREG_PICU6_INTTYPE3\r
-#define SCSI_Noise__BSY__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
-#define SCSI_Noise__BSY__LCD_EN CYREG_PRT6_LCD_EN\r
-#define SCSI_Noise__BSY__MASK 0x08u\r
-#define SCSI_Noise__BSY__PC CYREG_PRT6_PC3\r
-#define SCSI_Noise__BSY__PORT 6u\r
-#define SCSI_Noise__BSY__PRT CYREG_PRT6_PRT\r
-#define SCSI_Noise__BSY__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
-#define SCSI_Noise__BSY__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
-#define SCSI_Noise__BSY__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
-#define SCSI_Noise__BSY__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
-#define SCSI_Noise__BSY__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
-#define SCSI_Noise__BSY__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
-#define SCSI_Noise__BSY__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
-#define SCSI_Noise__BSY__PS CYREG_PRT6_PS\r
-#define SCSI_Noise__BSY__SHIFT 3u\r
-#define SCSI_Noise__BSY__SLW CYREG_PRT6_SLW\r
-#define SCSI_Noise__RST__AG CYREG_PRT4_AG\r
-#define SCSI_Noise__RST__AMUX CYREG_PRT4_AMUX\r
-#define SCSI_Noise__RST__BIE CYREG_PRT4_BIE\r
-#define SCSI_Noise__RST__BIT_MASK CYREG_PRT4_BIT_MASK\r
-#define SCSI_Noise__RST__BYP CYREG_PRT4_BYP\r
-#define SCSI_Noise__RST__CTL CYREG_PRT4_CTL\r
-#define SCSI_Noise__RST__DM0 CYREG_PRT4_DM0\r
-#define SCSI_Noise__RST__DM1 CYREG_PRT4_DM1\r
-#define SCSI_Noise__RST__DM2 CYREG_PRT4_DM2\r
-#define SCSI_Noise__RST__DR CYREG_PRT4_DR\r
-#define SCSI_Noise__RST__INP_DIS CYREG_PRT4_INP_DIS\r
-#define SCSI_Noise__RST__INTTYPE CYREG_PICU4_INTTYPE7\r
-#define SCSI_Noise__RST__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG\r
-#define SCSI_Noise__RST__LCD_EN CYREG_PRT4_LCD_EN\r
-#define SCSI_Noise__RST__MASK 0x80u\r
-#define SCSI_Noise__RST__PC CYREG_PRT4_PC7\r
-#define SCSI_Noise__RST__PORT 4u\r
-#define SCSI_Noise__RST__PRT CYREG_PRT4_PRT\r
-#define SCSI_Noise__RST__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL\r
-#define SCSI_Noise__RST__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN\r
-#define SCSI_Noise__RST__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0\r
-#define SCSI_Noise__RST__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1\r
-#define SCSI_Noise__RST__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0\r
-#define SCSI_Noise__RST__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1\r
-#define SCSI_Noise__RST__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT\r
-#define SCSI_Noise__RST__PS CYREG_PRT4_PS\r
-#define SCSI_Noise__RST__SHIFT 7u\r
-#define SCSI_Noise__RST__SLW CYREG_PRT4_SLW\r
-#define SCSI_Noise__SEL__AG CYREG_PRT4_AG\r
-#define SCSI_Noise__SEL__AMUX CYREG_PRT4_AMUX\r
-#define SCSI_Noise__SEL__BIE CYREG_PRT4_BIE\r
-#define SCSI_Noise__SEL__BIT_MASK CYREG_PRT4_BIT_MASK\r
-#define SCSI_Noise__SEL__BYP CYREG_PRT4_BYP\r
-#define SCSI_Noise__SEL__CTL CYREG_PRT4_CTL\r
-#define SCSI_Noise__SEL__DM0 CYREG_PRT4_DM0\r
-#define SCSI_Noise__SEL__DM1 CYREG_PRT4_DM1\r
-#define SCSI_Noise__SEL__DM2 CYREG_PRT4_DM2\r
-#define SCSI_Noise__SEL__DR CYREG_PRT4_DR\r
-#define SCSI_Noise__SEL__INP_DIS CYREG_PRT4_INP_DIS\r
-#define SCSI_Noise__SEL__INTTYPE CYREG_PICU4_INTTYPE3\r
-#define SCSI_Noise__SEL__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG\r
-#define SCSI_Noise__SEL__LCD_EN CYREG_PRT4_LCD_EN\r
-#define SCSI_Noise__SEL__MASK 0x08u\r
-#define SCSI_Noise__SEL__PC CYREG_PRT4_PC3\r
-#define SCSI_Noise__SEL__PORT 4u\r
-#define SCSI_Noise__SEL__PRT CYREG_PRT4_PRT\r
-#define SCSI_Noise__SEL__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL\r
-#define SCSI_Noise__SEL__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN\r
-#define SCSI_Noise__SEL__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0\r
-#define SCSI_Noise__SEL__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1\r
-#define SCSI_Noise__SEL__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0\r
-#define SCSI_Noise__SEL__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1\r
-#define SCSI_Noise__SEL__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT\r
-#define SCSI_Noise__SEL__PS CYREG_PRT4_PS\r
-#define SCSI_Noise__SEL__SHIFT 3u\r
-#define SCSI_Noise__SEL__SLW CYREG_PRT4_SLW\r
-\r
-/* SCSI_Out */\r
-#define SCSI_Out__0__AG CYREG_PRT15_AG\r
-#define SCSI_Out__0__AMUX CYREG_PRT15_AMUX\r
-#define SCSI_Out__0__BIE CYREG_PRT15_BIE\r
-#define SCSI_Out__0__BIT_MASK CYREG_PRT15_BIT_MASK\r
-#define SCSI_Out__0__BYP CYREG_PRT15_BYP\r
-#define SCSI_Out__0__CTL CYREG_PRT15_CTL\r
-#define SCSI_Out__0__DM0 CYREG_PRT15_DM0\r
-#define SCSI_Out__0__DM1 CYREG_PRT15_DM1\r
-#define SCSI_Out__0__DM2 CYREG_PRT15_DM2\r
-#define SCSI_Out__0__DR CYREG_PRT15_DR\r
-#define SCSI_Out__0__INP_DIS CYREG_PRT15_INP_DIS\r
-#define SCSI_Out__0__INTTYPE CYREG_PICU15_INTTYPE5\r
-#define SCSI_Out__0__LCD_COM_SEG CYREG_PRT15_LCD_COM_SEG\r
-#define SCSI_Out__0__LCD_EN CYREG_PRT15_LCD_EN\r
-#define SCSI_Out__0__MASK 0x20u\r
-#define SCSI_Out__0__PC CYREG_IO_PC_PRT15_PC5\r
-#define SCSI_Out__0__PORT 15u\r
-#define SCSI_Out__0__PRT CYREG_PRT15_PRT\r
-#define SCSI_Out__0__PRTDSI__CAPS_SEL CYREG_PRT15_CAPS_SEL\r
-#define SCSI_Out__0__PRTDSI__DBL_SYNC_IN CYREG_PRT15_DBL_SYNC_IN\r
-#define SCSI_Out__0__PRTDSI__OE_SEL0 CYREG_PRT15_OE_SEL0\r
-#define SCSI_Out__0__PRTDSI__OE_SEL1 CYREG_PRT15_OE_SEL1\r
-#define SCSI_Out__0__PRTDSI__OUT_SEL0 CYREG_PRT15_OUT_SEL0\r
-#define SCSI_Out__0__PRTDSI__OUT_SEL1 CYREG_PRT15_OUT_SEL1\r
-#define SCSI_Out__0__PRTDSI__SYNC_OUT CYREG_PRT15_SYNC_OUT\r
-#define SCSI_Out__0__PS CYREG_PRT15_PS\r
-#define SCSI_Out__0__SHIFT 5u\r
-#define SCSI_Out__0__SLW CYREG_PRT15_SLW\r
-#define SCSI_Out__1__AG CYREG_PRT15_AG\r
-#define SCSI_Out__1__AMUX CYREG_PRT15_AMUX\r
-#define SCSI_Out__1__BIE CYREG_PRT15_BIE\r
-#define SCSI_Out__1__BIT_MASK CYREG_PRT15_BIT_MASK\r
-#define SCSI_Out__1__BYP CYREG_PRT15_BYP\r
-#define SCSI_Out__1__CTL CYREG_PRT15_CTL\r
-#define SCSI_Out__1__DM0 CYREG_PRT15_DM0\r
-#define SCSI_Out__1__DM1 CYREG_PRT15_DM1\r
-#define SCSI_Out__1__DM2 CYREG_PRT15_DM2\r
-#define SCSI_Out__1__DR CYREG_PRT15_DR\r
-#define SCSI_Out__1__INP_DIS CYREG_PRT15_INP_DIS\r
-#define SCSI_Out__1__INTTYPE CYREG_PICU15_INTTYPE4\r
-#define SCSI_Out__1__LCD_COM_SEG CYREG_PRT15_LCD_COM_SEG\r
-#define SCSI_Out__1__LCD_EN CYREG_PRT15_LCD_EN\r
-#define SCSI_Out__1__MASK 0x10u\r
-#define SCSI_Out__1__PC CYREG_IO_PC_PRT15_PC4\r
-#define SCSI_Out__1__PORT 15u\r
-#define SCSI_Out__1__PRT CYREG_PRT15_PRT\r
-#define SCSI_Out__1__PRTDSI__CAPS_SEL CYREG_PRT15_CAPS_SEL\r
-#define SCSI_Out__1__PRTDSI__DBL_SYNC_IN CYREG_PRT15_DBL_SYNC_IN\r
-#define SCSI_Out__1__PRTDSI__OE_SEL0 CYREG_PRT15_OE_SEL0\r
-#define SCSI_Out__1__PRTDSI__OE_SEL1 CYREG_PRT15_OE_SEL1\r
-#define SCSI_Out__1__PRTDSI__OUT_SEL0 CYREG_PRT15_OUT_SEL0\r
-#define SCSI_Out__1__PRTDSI__OUT_SEL1 CYREG_PRT15_OUT_SEL1\r
-#define SCSI_Out__1__PRTDSI__SYNC_OUT CYREG_PRT15_SYNC_OUT\r
-#define SCSI_Out__1__PS CYREG_PRT15_PS\r
-#define SCSI_Out__1__SHIFT 4u\r
-#define SCSI_Out__1__SLW CYREG_PRT15_SLW\r
-#define SCSI_Out__2__AG CYREG_PRT6_AG\r
-#define SCSI_Out__2__AMUX CYREG_PRT6_AMUX\r
-#define SCSI_Out__2__BIE CYREG_PRT6_BIE\r
-#define SCSI_Out__2__BIT_MASK CYREG_PRT6_BIT_MASK\r
-#define SCSI_Out__2__BYP CYREG_PRT6_BYP\r
-#define SCSI_Out__2__CTL CYREG_PRT6_CTL\r
-#define SCSI_Out__2__DM0 CYREG_PRT6_DM0\r
-#define SCSI_Out__2__DM1 CYREG_PRT6_DM1\r
-#define SCSI_Out__2__DM2 CYREG_PRT6_DM2\r
-#define SCSI_Out__2__DR CYREG_PRT6_DR\r
-#define SCSI_Out__2__INP_DIS CYREG_PRT6_INP_DIS\r
-#define SCSI_Out__2__INTTYPE CYREG_PICU6_INTTYPE1\r
-#define SCSI_Out__2__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
-#define SCSI_Out__2__LCD_EN CYREG_PRT6_LCD_EN\r
-#define SCSI_Out__2__MASK 0x02u\r
-#define SCSI_Out__2__PC CYREG_PRT6_PC1\r
-#define SCSI_Out__2__PORT 6u\r
-#define SCSI_Out__2__PRT CYREG_PRT6_PRT\r
-#define SCSI_Out__2__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
-#define SCSI_Out__2__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
-#define SCSI_Out__2__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
-#define SCSI_Out__2__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
-#define SCSI_Out__2__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
-#define SCSI_Out__2__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
-#define SCSI_Out__2__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
-#define SCSI_Out__2__PS CYREG_PRT6_PS\r
-#define SCSI_Out__2__SHIFT 1u\r
-#define SCSI_Out__2__SLW CYREG_PRT6_SLW\r
-#define SCSI_Out__3__AG CYREG_PRT6_AG\r
-#define SCSI_Out__3__AMUX CYREG_PRT6_AMUX\r
-#define SCSI_Out__3__BIE CYREG_PRT6_BIE\r
-#define SCSI_Out__3__BIT_MASK CYREG_PRT6_BIT_MASK\r
-#define SCSI_Out__3__BYP CYREG_PRT6_BYP\r
-#define SCSI_Out__3__CTL CYREG_PRT6_CTL\r
-#define SCSI_Out__3__DM0 CYREG_PRT6_DM0\r
-#define SCSI_Out__3__DM1 CYREG_PRT6_DM1\r
-#define SCSI_Out__3__DM2 CYREG_PRT6_DM2\r
-#define SCSI_Out__3__DR CYREG_PRT6_DR\r
-#define SCSI_Out__3__INP_DIS CYREG_PRT6_INP_DIS\r
-#define SCSI_Out__3__INTTYPE CYREG_PICU6_INTTYPE0\r
-#define SCSI_Out__3__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
-#define SCSI_Out__3__LCD_EN CYREG_PRT6_LCD_EN\r
-#define SCSI_Out__3__MASK 0x01u\r
-#define SCSI_Out__3__PC CYREG_PRT6_PC0\r
-#define SCSI_Out__3__PORT 6u\r
-#define SCSI_Out__3__PRT CYREG_PRT6_PRT\r
-#define SCSI_Out__3__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
-#define SCSI_Out__3__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
-#define SCSI_Out__3__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
-#define SCSI_Out__3__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
-#define SCSI_Out__3__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
-#define SCSI_Out__3__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
-#define SCSI_Out__3__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
-#define SCSI_Out__3__PS CYREG_PRT6_PS\r
-#define SCSI_Out__3__SHIFT 0u\r
-#define SCSI_Out__3__SLW CYREG_PRT6_SLW\r
-#define SCSI_Out__4__AG CYREG_PRT4_AG\r
-#define SCSI_Out__4__AMUX CYREG_PRT4_AMUX\r
-#define SCSI_Out__4__BIE CYREG_PRT4_BIE\r
-#define SCSI_Out__4__BIT_MASK CYREG_PRT4_BIT_MASK\r
-#define SCSI_Out__4__BYP CYREG_PRT4_BYP\r
-#define SCSI_Out__4__CTL CYREG_PRT4_CTL\r
-#define SCSI_Out__4__DM0 CYREG_PRT4_DM0\r
-#define SCSI_Out__4__DM1 CYREG_PRT4_DM1\r
-#define SCSI_Out__4__DM2 CYREG_PRT4_DM2\r
-#define SCSI_Out__4__DR CYREG_PRT4_DR\r
-#define SCSI_Out__4__INP_DIS CYREG_PRT4_INP_DIS\r
-#define SCSI_Out__4__INTTYPE CYREG_PICU4_INTTYPE5\r
-#define SCSI_Out__4__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG\r
-#define SCSI_Out__4__LCD_EN CYREG_PRT4_LCD_EN\r
-#define SCSI_Out__4__MASK 0x20u\r
-#define SCSI_Out__4__PC CYREG_PRT4_PC5\r
-#define SCSI_Out__4__PORT 4u\r
-#define SCSI_Out__4__PRT CYREG_PRT4_PRT\r
-#define SCSI_Out__4__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL\r
-#define SCSI_Out__4__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN\r
-#define SCSI_Out__4__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0\r
-#define SCSI_Out__4__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1\r
-#define SCSI_Out__4__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0\r
-#define SCSI_Out__4__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1\r
-#define SCSI_Out__4__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT\r
-#define SCSI_Out__4__PS CYREG_PRT4_PS\r
-#define SCSI_Out__4__SHIFT 5u\r
-#define SCSI_Out__4__SLW CYREG_PRT4_SLW\r
-#define SCSI_Out__5__AG CYREG_PRT4_AG\r
-#define SCSI_Out__5__AMUX CYREG_PRT4_AMUX\r
-#define SCSI_Out__5__BIE CYREG_PRT4_BIE\r
-#define SCSI_Out__5__BIT_MASK CYREG_PRT4_BIT_MASK\r
-#define SCSI_Out__5__BYP CYREG_PRT4_BYP\r
-#define SCSI_Out__5__CTL CYREG_PRT4_CTL\r
-#define SCSI_Out__5__DM0 CYREG_PRT4_DM0\r
-#define SCSI_Out__5__DM1 CYREG_PRT4_DM1\r
-#define SCSI_Out__5__DM2 CYREG_PRT4_DM2\r
-#define SCSI_Out__5__DR CYREG_PRT4_DR\r
-#define SCSI_Out__5__INP_DIS CYREG_PRT4_INP_DIS\r
-#define SCSI_Out__5__INTTYPE CYREG_PICU4_INTTYPE4\r
-#define SCSI_Out__5__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG\r
-#define SCSI_Out__5__LCD_EN CYREG_PRT4_LCD_EN\r
-#define SCSI_Out__5__MASK 0x10u\r
-#define SCSI_Out__5__PC CYREG_PRT4_PC4\r
-#define SCSI_Out__5__PORT 4u\r
-#define SCSI_Out__5__PRT CYREG_PRT4_PRT\r
-#define SCSI_Out__5__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL\r
-#define SCSI_Out__5__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN\r
-#define SCSI_Out__5__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0\r
-#define SCSI_Out__5__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1\r
-#define SCSI_Out__5__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0\r
-#define SCSI_Out__5__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1\r
-#define SCSI_Out__5__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT\r
-#define SCSI_Out__5__PS CYREG_PRT4_PS\r
-#define SCSI_Out__5__SHIFT 4u\r
-#define SCSI_Out__5__SLW CYREG_PRT4_SLW\r
-#define SCSI_Out__6__AG CYREG_PRT0_AG\r
-#define SCSI_Out__6__AMUX CYREG_PRT0_AMUX\r
-#define SCSI_Out__6__BIE CYREG_PRT0_BIE\r
-#define SCSI_Out__6__BIT_MASK CYREG_PRT0_BIT_MASK\r
-#define SCSI_Out__6__BYP CYREG_PRT0_BYP\r
-#define SCSI_Out__6__CTL CYREG_PRT0_CTL\r
-#define SCSI_Out__6__DM0 CYREG_PRT0_DM0\r
-#define SCSI_Out__6__DM1 CYREG_PRT0_DM1\r
-#define SCSI_Out__6__DM2 CYREG_PRT0_DM2\r
-#define SCSI_Out__6__DR CYREG_PRT0_DR\r
-#define SCSI_Out__6__INP_DIS CYREG_PRT0_INP_DIS\r
-#define SCSI_Out__6__INTTYPE CYREG_PICU0_INTTYPE7\r
-#define SCSI_Out__6__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
-#define SCSI_Out__6__LCD_EN CYREG_PRT0_LCD_EN\r
-#define SCSI_Out__6__MASK 0x80u\r
-#define SCSI_Out__6__PC CYREG_PRT0_PC7\r
-#define SCSI_Out__6__PORT 0u\r
-#define SCSI_Out__6__PRT CYREG_PRT0_PRT\r
-#define SCSI_Out__6__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
-#define SCSI_Out__6__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
-#define SCSI_Out__6__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
-#define SCSI_Out__6__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
-#define SCSI_Out__6__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
-#define SCSI_Out__6__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
-#define SCSI_Out__6__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
-#define SCSI_Out__6__PS CYREG_PRT0_PS\r
-#define SCSI_Out__6__SHIFT 7u\r
-#define SCSI_Out__6__SLW CYREG_PRT0_SLW\r
-#define SCSI_Out__7__AG CYREG_PRT0_AG\r
-#define SCSI_Out__7__AMUX CYREG_PRT0_AMUX\r
-#define SCSI_Out__7__BIE CYREG_PRT0_BIE\r
-#define SCSI_Out__7__BIT_MASK CYREG_PRT0_BIT_MASK\r
-#define SCSI_Out__7__BYP CYREG_PRT0_BYP\r
-#define SCSI_Out__7__CTL CYREG_PRT0_CTL\r
-#define SCSI_Out__7__DM0 CYREG_PRT0_DM0\r
-#define SCSI_Out__7__DM1 CYREG_PRT0_DM1\r
-#define SCSI_Out__7__DM2 CYREG_PRT0_DM2\r
-#define SCSI_Out__7__DR CYREG_PRT0_DR\r
-#define SCSI_Out__7__INP_DIS CYREG_PRT0_INP_DIS\r
-#define SCSI_Out__7__INTTYPE CYREG_PICU0_INTTYPE6\r
-#define SCSI_Out__7__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
-#define SCSI_Out__7__LCD_EN CYREG_PRT0_LCD_EN\r
-#define SCSI_Out__7__MASK 0x40u\r
-#define SCSI_Out__7__PC CYREG_PRT0_PC6\r
-#define SCSI_Out__7__PORT 0u\r
-#define SCSI_Out__7__PRT CYREG_PRT0_PRT\r
-#define SCSI_Out__7__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
-#define SCSI_Out__7__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
-#define SCSI_Out__7__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
-#define SCSI_Out__7__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
-#define SCSI_Out__7__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
-#define SCSI_Out__7__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
-#define SCSI_Out__7__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
-#define SCSI_Out__7__PS CYREG_PRT0_PS\r
-#define SCSI_Out__7__SHIFT 6u\r
-#define SCSI_Out__7__SLW CYREG_PRT0_SLW\r
-#define SCSI_Out__8__AG CYREG_PRT0_AG\r
-#define SCSI_Out__8__AMUX CYREG_PRT0_AMUX\r
-#define SCSI_Out__8__BIE CYREG_PRT0_BIE\r
-#define SCSI_Out__8__BIT_MASK CYREG_PRT0_BIT_MASK\r
-#define SCSI_Out__8__BYP CYREG_PRT0_BYP\r
-#define SCSI_Out__8__CTL CYREG_PRT0_CTL\r
-#define SCSI_Out__8__DM0 CYREG_PRT0_DM0\r
-#define SCSI_Out__8__DM1 CYREG_PRT0_DM1\r
-#define SCSI_Out__8__DM2 CYREG_PRT0_DM2\r
-#define SCSI_Out__8__DR CYREG_PRT0_DR\r
-#define SCSI_Out__8__INP_DIS CYREG_PRT0_INP_DIS\r
-#define SCSI_Out__8__INTTYPE CYREG_PICU0_INTTYPE3\r
-#define SCSI_Out__8__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
-#define SCSI_Out__8__LCD_EN CYREG_PRT0_LCD_EN\r
-#define SCSI_Out__8__MASK 0x08u\r
-#define SCSI_Out__8__PC CYREG_PRT0_PC3\r
-#define SCSI_Out__8__PORT 0u\r
-#define SCSI_Out__8__PRT CYREG_PRT0_PRT\r
-#define SCSI_Out__8__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
-#define SCSI_Out__8__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
-#define SCSI_Out__8__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
-#define SCSI_Out__8__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
-#define SCSI_Out__8__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
-#define SCSI_Out__8__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
-#define SCSI_Out__8__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
-#define SCSI_Out__8__PS CYREG_PRT0_PS\r
-#define SCSI_Out__8__SHIFT 3u\r
-#define SCSI_Out__8__SLW CYREG_PRT0_SLW\r
-#define SCSI_Out__9__AG CYREG_PRT0_AG\r
-#define SCSI_Out__9__AMUX CYREG_PRT0_AMUX\r
-#define SCSI_Out__9__BIE CYREG_PRT0_BIE\r
-#define SCSI_Out__9__BIT_MASK CYREG_PRT0_BIT_MASK\r
-#define SCSI_Out__9__BYP CYREG_PRT0_BYP\r
-#define SCSI_Out__9__CTL CYREG_PRT0_CTL\r
-#define SCSI_Out__9__DM0 CYREG_PRT0_DM0\r
-#define SCSI_Out__9__DM1 CYREG_PRT0_DM1\r
-#define SCSI_Out__9__DM2 CYREG_PRT0_DM2\r
-#define SCSI_Out__9__DR CYREG_PRT0_DR\r
-#define SCSI_Out__9__INP_DIS CYREG_PRT0_INP_DIS\r
-#define SCSI_Out__9__INTTYPE CYREG_PICU0_INTTYPE2\r
-#define SCSI_Out__9__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
-#define SCSI_Out__9__LCD_EN CYREG_PRT0_LCD_EN\r
-#define SCSI_Out__9__MASK 0x04u\r
-#define SCSI_Out__9__PC CYREG_PRT0_PC2\r
-#define SCSI_Out__9__PORT 0u\r
-#define SCSI_Out__9__PRT CYREG_PRT0_PRT\r
-#define SCSI_Out__9__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
-#define SCSI_Out__9__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
-#define SCSI_Out__9__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
-#define SCSI_Out__9__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
-#define SCSI_Out__9__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
-#define SCSI_Out__9__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
-#define SCSI_Out__9__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
-#define SCSI_Out__9__PS CYREG_PRT0_PS\r
-#define SCSI_Out__9__SHIFT 2u\r
-#define SCSI_Out__9__SLW CYREG_PRT0_SLW\r
-#define SCSI_Out__ACK__AG CYREG_PRT6_AG\r
-#define SCSI_Out__ACK__AMUX CYREG_PRT6_AMUX\r
-#define SCSI_Out__ACK__BIE CYREG_PRT6_BIE\r
-#define SCSI_Out__ACK__BIT_MASK CYREG_PRT6_BIT_MASK\r
-#define SCSI_Out__ACK__BYP CYREG_PRT6_BYP\r
-#define SCSI_Out__ACK__CTL CYREG_PRT6_CTL\r
-#define SCSI_Out__ACK__DM0 CYREG_PRT6_DM0\r
-#define SCSI_Out__ACK__DM1 CYREG_PRT6_DM1\r
-#define SCSI_Out__ACK__DM2 CYREG_PRT6_DM2\r
-#define SCSI_Out__ACK__DR CYREG_PRT6_DR\r
-#define SCSI_Out__ACK__INP_DIS CYREG_PRT6_INP_DIS\r
-#define SCSI_Out__ACK__INTTYPE CYREG_PICU6_INTTYPE0\r
-#define SCSI_Out__ACK__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
-#define SCSI_Out__ACK__LCD_EN CYREG_PRT6_LCD_EN\r
-#define SCSI_Out__ACK__MASK 0x01u\r
-#define SCSI_Out__ACK__PC CYREG_PRT6_PC0\r
-#define SCSI_Out__ACK__PORT 6u\r
-#define SCSI_Out__ACK__PRT CYREG_PRT6_PRT\r
-#define SCSI_Out__ACK__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
-#define SCSI_Out__ACK__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
-#define SCSI_Out__ACK__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
-#define SCSI_Out__ACK__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
-#define SCSI_Out__ACK__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
-#define SCSI_Out__ACK__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
-#define SCSI_Out__ACK__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
-#define SCSI_Out__ACK__PS CYREG_PRT6_PS\r
-#define SCSI_Out__ACK__SHIFT 0u\r
-#define SCSI_Out__ACK__SLW CYREG_PRT6_SLW\r
-#define SCSI_Out__ATN__AG CYREG_PRT15_AG\r
-#define SCSI_Out__ATN__AMUX CYREG_PRT15_AMUX\r
-#define SCSI_Out__ATN__BIE CYREG_PRT15_BIE\r
-#define SCSI_Out__ATN__BIT_MASK CYREG_PRT15_BIT_MASK\r
-#define SCSI_Out__ATN__BYP CYREG_PRT15_BYP\r
-#define SCSI_Out__ATN__CTL CYREG_PRT15_CTL\r
-#define SCSI_Out__ATN__DM0 CYREG_PRT15_DM0\r
-#define SCSI_Out__ATN__DM1 CYREG_PRT15_DM1\r
-#define SCSI_Out__ATN__DM2 CYREG_PRT15_DM2\r
-#define SCSI_Out__ATN__DR CYREG_PRT15_DR\r
-#define SCSI_Out__ATN__INP_DIS CYREG_PRT15_INP_DIS\r
-#define SCSI_Out__ATN__INTTYPE CYREG_PICU15_INTTYPE4\r
-#define SCSI_Out__ATN__LCD_COM_SEG CYREG_PRT15_LCD_COM_SEG\r
-#define SCSI_Out__ATN__LCD_EN CYREG_PRT15_LCD_EN\r
-#define SCSI_Out__ATN__MASK 0x10u\r
-#define SCSI_Out__ATN__PC CYREG_IO_PC_PRT15_PC4\r
-#define SCSI_Out__ATN__PORT 15u\r
-#define SCSI_Out__ATN__PRT CYREG_PRT15_PRT\r
-#define SCSI_Out__ATN__PRTDSI__CAPS_SEL CYREG_PRT15_CAPS_SEL\r
-#define SCSI_Out__ATN__PRTDSI__DBL_SYNC_IN CYREG_PRT15_DBL_SYNC_IN\r
-#define SCSI_Out__ATN__PRTDSI__OE_SEL0 CYREG_PRT15_OE_SEL0\r
-#define SCSI_Out__ATN__PRTDSI__OE_SEL1 CYREG_PRT15_OE_SEL1\r
-#define SCSI_Out__ATN__PRTDSI__OUT_SEL0 CYREG_PRT15_OUT_SEL0\r
-#define SCSI_Out__ATN__PRTDSI__OUT_SEL1 CYREG_PRT15_OUT_SEL1\r
-#define SCSI_Out__ATN__PRTDSI__SYNC_OUT CYREG_PRT15_SYNC_OUT\r
-#define SCSI_Out__ATN__PS CYREG_PRT15_PS\r
-#define SCSI_Out__ATN__SHIFT 4u\r
-#define SCSI_Out__ATN__SLW CYREG_PRT15_SLW\r
-#define SCSI_Out__BSY__AG CYREG_PRT6_AG\r
-#define SCSI_Out__BSY__AMUX CYREG_PRT6_AMUX\r
-#define SCSI_Out__BSY__BIE CYREG_PRT6_BIE\r
-#define SCSI_Out__BSY__BIT_MASK CYREG_PRT6_BIT_MASK\r
-#define SCSI_Out__BSY__BYP CYREG_PRT6_BYP\r
-#define SCSI_Out__BSY__CTL CYREG_PRT6_CTL\r
-#define SCSI_Out__BSY__DM0 CYREG_PRT6_DM0\r
-#define SCSI_Out__BSY__DM1 CYREG_PRT6_DM1\r
-#define SCSI_Out__BSY__DM2 CYREG_PRT6_DM2\r
-#define SCSI_Out__BSY__DR CYREG_PRT6_DR\r
-#define SCSI_Out__BSY__INP_DIS CYREG_PRT6_INP_DIS\r
-#define SCSI_Out__BSY__INTTYPE CYREG_PICU6_INTTYPE1\r
-#define SCSI_Out__BSY__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
-#define SCSI_Out__BSY__LCD_EN CYREG_PRT6_LCD_EN\r
-#define SCSI_Out__BSY__MASK 0x02u\r
-#define SCSI_Out__BSY__PC CYREG_PRT6_PC1\r
-#define SCSI_Out__BSY__PORT 6u\r
-#define SCSI_Out__BSY__PRT CYREG_PRT6_PRT\r
-#define SCSI_Out__BSY__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
-#define SCSI_Out__BSY__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
-#define SCSI_Out__BSY__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
-#define SCSI_Out__BSY__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
-#define SCSI_Out__BSY__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
-#define SCSI_Out__BSY__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
-#define SCSI_Out__BSY__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
-#define SCSI_Out__BSY__PS CYREG_PRT6_PS\r
-#define SCSI_Out__BSY__SHIFT 1u\r
-#define SCSI_Out__BSY__SLW CYREG_PRT6_SLW\r
-#define SCSI_Out__CD_raw__AG CYREG_PRT0_AG\r
-#define SCSI_Out__CD_raw__AMUX CYREG_PRT0_AMUX\r
-#define SCSI_Out__CD_raw__BIE CYREG_PRT0_BIE\r
-#define SCSI_Out__CD_raw__BIT_MASK CYREG_PRT0_BIT_MASK\r
-#define SCSI_Out__CD_raw__BYP CYREG_PRT0_BYP\r
-#define SCSI_Out__CD_raw__CTL CYREG_PRT0_CTL\r
-#define SCSI_Out__CD_raw__DM0 CYREG_PRT0_DM0\r
-#define SCSI_Out__CD_raw__DM1 CYREG_PRT0_DM1\r
-#define SCSI_Out__CD_raw__DM2 CYREG_PRT0_DM2\r
-#define SCSI_Out__CD_raw__DR CYREG_PRT0_DR\r
-#define SCSI_Out__CD_raw__INP_DIS CYREG_PRT0_INP_DIS\r
-#define SCSI_Out__CD_raw__INTTYPE CYREG_PICU0_INTTYPE6\r
-#define SCSI_Out__CD_raw__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
-#define SCSI_Out__CD_raw__LCD_EN CYREG_PRT0_LCD_EN\r
-#define SCSI_Out__CD_raw__MASK 0x40u\r
-#define SCSI_Out__CD_raw__PC CYREG_PRT0_PC6\r
-#define SCSI_Out__CD_raw__PORT 0u\r
-#define SCSI_Out__CD_raw__PRT CYREG_PRT0_PRT\r
-#define SCSI_Out__CD_raw__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
-#define SCSI_Out__CD_raw__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
-#define SCSI_Out__CD_raw__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
-#define SCSI_Out__CD_raw__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
-#define SCSI_Out__CD_raw__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
-#define SCSI_Out__CD_raw__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
-#define SCSI_Out__CD_raw__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
-#define SCSI_Out__CD_raw__PS CYREG_PRT0_PS\r
-#define SCSI_Out__CD_raw__SHIFT 6u\r
-#define SCSI_Out__CD_raw__SLW CYREG_PRT0_SLW\r
-#define SCSI_Out__DBP_raw__AG CYREG_PRT15_AG\r
-#define SCSI_Out__DBP_raw__AMUX CYREG_PRT15_AMUX\r
-#define SCSI_Out__DBP_raw__BIE CYREG_PRT15_BIE\r
-#define SCSI_Out__DBP_raw__BIT_MASK CYREG_PRT15_BIT_MASK\r
-#define SCSI_Out__DBP_raw__BYP CYREG_PRT15_BYP\r
-#define SCSI_Out__DBP_raw__CTL CYREG_PRT15_CTL\r
-#define SCSI_Out__DBP_raw__DM0 CYREG_PRT15_DM0\r
-#define SCSI_Out__DBP_raw__DM1 CYREG_PRT15_DM1\r
-#define SCSI_Out__DBP_raw__DM2 CYREG_PRT15_DM2\r
-#define SCSI_Out__DBP_raw__DR CYREG_PRT15_DR\r
-#define SCSI_Out__DBP_raw__INP_DIS CYREG_PRT15_INP_DIS\r
-#define SCSI_Out__DBP_raw__INTTYPE CYREG_PICU15_INTTYPE5\r
-#define SCSI_Out__DBP_raw__LCD_COM_SEG CYREG_PRT15_LCD_COM_SEG\r
-#define SCSI_Out__DBP_raw__LCD_EN CYREG_PRT15_LCD_EN\r
-#define SCSI_Out__DBP_raw__MASK 0x20u\r
-#define SCSI_Out__DBP_raw__PC CYREG_IO_PC_PRT15_PC5\r
-#define SCSI_Out__DBP_raw__PORT 15u\r
-#define SCSI_Out__DBP_raw__PRT CYREG_PRT15_PRT\r
-#define SCSI_Out__DBP_raw__PRTDSI__CAPS_SEL CYREG_PRT15_CAPS_SEL\r
-#define SCSI_Out__DBP_raw__PRTDSI__DBL_SYNC_IN CYREG_PRT15_DBL_SYNC_IN\r
-#define SCSI_Out__DBP_raw__PRTDSI__OE_SEL0 CYREG_PRT15_OE_SEL0\r
-#define SCSI_Out__DBP_raw__PRTDSI__OE_SEL1 CYREG_PRT15_OE_SEL1\r
-#define SCSI_Out__DBP_raw__PRTDSI__OUT_SEL0 CYREG_PRT15_OUT_SEL0\r
-#define SCSI_Out__DBP_raw__PRTDSI__OUT_SEL1 CYREG_PRT15_OUT_SEL1\r
-#define SCSI_Out__DBP_raw__PRTDSI__SYNC_OUT CYREG_PRT15_SYNC_OUT\r
-#define SCSI_Out__DBP_raw__PS CYREG_PRT15_PS\r
-#define SCSI_Out__DBP_raw__SHIFT 5u\r
-#define SCSI_Out__DBP_raw__SLW CYREG_PRT15_SLW\r
-#define SCSI_Out__IO_raw__AG CYREG_PRT0_AG\r
-#define SCSI_Out__IO_raw__AMUX CYREG_PRT0_AMUX\r
-#define SCSI_Out__IO_raw__BIE CYREG_PRT0_BIE\r
-#define SCSI_Out__IO_raw__BIT_MASK CYREG_PRT0_BIT_MASK\r
-#define SCSI_Out__IO_raw__BYP CYREG_PRT0_BYP\r
-#define SCSI_Out__IO_raw__CTL CYREG_PRT0_CTL\r
-#define SCSI_Out__IO_raw__DM0 CYREG_PRT0_DM0\r
-#define SCSI_Out__IO_raw__DM1 CYREG_PRT0_DM1\r
-#define SCSI_Out__IO_raw__DM2 CYREG_PRT0_DM2\r
-#define SCSI_Out__IO_raw__DR CYREG_PRT0_DR\r
-#define SCSI_Out__IO_raw__INP_DIS CYREG_PRT0_INP_DIS\r
-#define SCSI_Out__IO_raw__INTTYPE CYREG_PICU0_INTTYPE2\r
-#define SCSI_Out__IO_raw__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
-#define SCSI_Out__IO_raw__LCD_EN CYREG_PRT0_LCD_EN\r
-#define SCSI_Out__IO_raw__MASK 0x04u\r
-#define SCSI_Out__IO_raw__PC CYREG_PRT0_PC2\r
-#define SCSI_Out__IO_raw__PORT 0u\r
-#define SCSI_Out__IO_raw__PRT CYREG_PRT0_PRT\r
-#define SCSI_Out__IO_raw__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
-#define SCSI_Out__IO_raw__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
-#define SCSI_Out__IO_raw__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
-#define SCSI_Out__IO_raw__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
-#define SCSI_Out__IO_raw__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
-#define SCSI_Out__IO_raw__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
-#define SCSI_Out__IO_raw__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
-#define SCSI_Out__IO_raw__PS CYREG_PRT0_PS\r
-#define SCSI_Out__IO_raw__SHIFT 2u\r
-#define SCSI_Out__IO_raw__SLW CYREG_PRT0_SLW\r
-#define SCSI_Out__MSG_raw__AG CYREG_PRT4_AG\r
-#define SCSI_Out__MSG_raw__AMUX CYREG_PRT4_AMUX\r
-#define SCSI_Out__MSG_raw__BIE CYREG_PRT4_BIE\r
-#define SCSI_Out__MSG_raw__BIT_MASK CYREG_PRT4_BIT_MASK\r
-#define SCSI_Out__MSG_raw__BYP CYREG_PRT4_BYP\r
-#define SCSI_Out__MSG_raw__CTL CYREG_PRT4_CTL\r
-#define SCSI_Out__MSG_raw__DM0 CYREG_PRT4_DM0\r
-#define SCSI_Out__MSG_raw__DM1 CYREG_PRT4_DM1\r
-#define SCSI_Out__MSG_raw__DM2 CYREG_PRT4_DM2\r
-#define SCSI_Out__MSG_raw__DR CYREG_PRT4_DR\r
-#define SCSI_Out__MSG_raw__INP_DIS CYREG_PRT4_INP_DIS\r
-#define SCSI_Out__MSG_raw__INTTYPE CYREG_PICU4_INTTYPE4\r
-#define SCSI_Out__MSG_raw__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG\r
-#define SCSI_Out__MSG_raw__LCD_EN CYREG_PRT4_LCD_EN\r
-#define SCSI_Out__MSG_raw__MASK 0x10u\r
-#define SCSI_Out__MSG_raw__PC CYREG_PRT4_PC4\r
-#define SCSI_Out__MSG_raw__PORT 4u\r
-#define SCSI_Out__MSG_raw__PRT CYREG_PRT4_PRT\r
-#define SCSI_Out__MSG_raw__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL\r
-#define SCSI_Out__MSG_raw__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN\r
-#define SCSI_Out__MSG_raw__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0\r
-#define SCSI_Out__MSG_raw__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1\r
-#define SCSI_Out__MSG_raw__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0\r
-#define SCSI_Out__MSG_raw__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1\r
-#define SCSI_Out__MSG_raw__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT\r
-#define SCSI_Out__MSG_raw__PS CYREG_PRT4_PS\r
-#define SCSI_Out__MSG_raw__SHIFT 4u\r
-#define SCSI_Out__MSG_raw__SLW CYREG_PRT4_SLW\r
-#define SCSI_Out__REQ__AG CYREG_PRT0_AG\r
-#define SCSI_Out__REQ__AMUX CYREG_PRT0_AMUX\r
-#define SCSI_Out__REQ__BIE CYREG_PRT0_BIE\r
-#define SCSI_Out__REQ__BIT_MASK CYREG_PRT0_BIT_MASK\r
-#define SCSI_Out__REQ__BYP CYREG_PRT0_BYP\r
-#define SCSI_Out__REQ__CTL CYREG_PRT0_CTL\r
-#define SCSI_Out__REQ__DM0 CYREG_PRT0_DM0\r
-#define SCSI_Out__REQ__DM1 CYREG_PRT0_DM1\r
-#define SCSI_Out__REQ__DM2 CYREG_PRT0_DM2\r
-#define SCSI_Out__REQ__DR CYREG_PRT0_DR\r
-#define SCSI_Out__REQ__INP_DIS CYREG_PRT0_INP_DIS\r
-#define SCSI_Out__REQ__INTTYPE CYREG_PICU0_INTTYPE3\r
-#define SCSI_Out__REQ__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
-#define SCSI_Out__REQ__LCD_EN CYREG_PRT0_LCD_EN\r
-#define SCSI_Out__REQ__MASK 0x08u\r
-#define SCSI_Out__REQ__PC CYREG_PRT0_PC3\r
-#define SCSI_Out__REQ__PORT 0u\r
-#define SCSI_Out__REQ__PRT CYREG_PRT0_PRT\r
-#define SCSI_Out__REQ__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
-#define SCSI_Out__REQ__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
-#define SCSI_Out__REQ__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
-#define SCSI_Out__REQ__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
-#define SCSI_Out__REQ__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
-#define SCSI_Out__REQ__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
-#define SCSI_Out__REQ__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
-#define SCSI_Out__REQ__PS CYREG_PRT0_PS\r
-#define SCSI_Out__REQ__SHIFT 3u\r
-#define SCSI_Out__REQ__SLW CYREG_PRT0_SLW\r
-#define SCSI_Out__RST__AG CYREG_PRT4_AG\r
-#define SCSI_Out__RST__AMUX CYREG_PRT4_AMUX\r
-#define SCSI_Out__RST__BIE CYREG_PRT4_BIE\r
-#define SCSI_Out__RST__BIT_MASK CYREG_PRT4_BIT_MASK\r
-#define SCSI_Out__RST__BYP CYREG_PRT4_BYP\r
-#define SCSI_Out__RST__CTL CYREG_PRT4_CTL\r
-#define SCSI_Out__RST__DM0 CYREG_PRT4_DM0\r
-#define SCSI_Out__RST__DM1 CYREG_PRT4_DM1\r
-#define SCSI_Out__RST__DM2 CYREG_PRT4_DM2\r
-#define SCSI_Out__RST__DR CYREG_PRT4_DR\r
-#define SCSI_Out__RST__INP_DIS CYREG_PRT4_INP_DIS\r
-#define SCSI_Out__RST__INTTYPE CYREG_PICU4_INTTYPE5\r
-#define SCSI_Out__RST__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG\r
-#define SCSI_Out__RST__LCD_EN CYREG_PRT4_LCD_EN\r
-#define SCSI_Out__RST__MASK 0x20u\r
-#define SCSI_Out__RST__PC CYREG_PRT4_PC5\r
-#define SCSI_Out__RST__PORT 4u\r
-#define SCSI_Out__RST__PRT CYREG_PRT4_PRT\r
-#define SCSI_Out__RST__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL\r
-#define SCSI_Out__RST__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN\r
-#define SCSI_Out__RST__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0\r
-#define SCSI_Out__RST__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1\r
-#define SCSI_Out__RST__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0\r
-#define SCSI_Out__RST__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1\r
-#define SCSI_Out__RST__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT\r
-#define SCSI_Out__RST__PS CYREG_PRT4_PS\r
-#define SCSI_Out__RST__SHIFT 5u\r
-#define SCSI_Out__RST__SLW CYREG_PRT4_SLW\r
-#define SCSI_Out__SEL__AG CYREG_PRT0_AG\r
-#define SCSI_Out__SEL__AMUX CYREG_PRT0_AMUX\r
-#define SCSI_Out__SEL__BIE CYREG_PRT0_BIE\r
-#define SCSI_Out__SEL__BIT_MASK CYREG_PRT0_BIT_MASK\r
-#define SCSI_Out__SEL__BYP CYREG_PRT0_BYP\r
-#define SCSI_Out__SEL__CTL CYREG_PRT0_CTL\r
-#define SCSI_Out__SEL__DM0 CYREG_PRT0_DM0\r
-#define SCSI_Out__SEL__DM1 CYREG_PRT0_DM1\r
-#define SCSI_Out__SEL__DM2 CYREG_PRT0_DM2\r
-#define SCSI_Out__SEL__DR CYREG_PRT0_DR\r
-#define SCSI_Out__SEL__INP_DIS CYREG_PRT0_INP_DIS\r
-#define SCSI_Out__SEL__INTTYPE CYREG_PICU0_INTTYPE7\r
-#define SCSI_Out__SEL__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
-#define SCSI_Out__SEL__LCD_EN CYREG_PRT0_LCD_EN\r
-#define SCSI_Out__SEL__MASK 0x80u\r
-#define SCSI_Out__SEL__PC CYREG_PRT0_PC7\r
-#define SCSI_Out__SEL__PORT 0u\r
-#define SCSI_Out__SEL__PRT CYREG_PRT0_PRT\r
-#define SCSI_Out__SEL__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
-#define SCSI_Out__SEL__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
-#define SCSI_Out__SEL__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
-#define SCSI_Out__SEL__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
-#define SCSI_Out__SEL__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
-#define SCSI_Out__SEL__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
-#define SCSI_Out__SEL__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
-#define SCSI_Out__SEL__PS CYREG_PRT0_PS\r
-#define SCSI_Out__SEL__SHIFT 7u\r
-#define SCSI_Out__SEL__SLW CYREG_PRT0_SLW\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__0__MASK 0x01u\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__0__POS 0\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__1__MASK 0x02u\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__1__POS 1\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG CYREG_B0_UDB14_15_ACTL\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG CYREG_B0_UDB14_15_CTL\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG CYREG_B0_UDB14_15_CTL\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG CYREG_B0_UDB14_15_CTL\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG CYREG_B0_UDB14_15_CTL\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_MASK_REG CYREG_B0_UDB14_15_MSK\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG CYREG_B0_UDB14_15_MSK\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG CYREG_B0_UDB14_15_MSK\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG CYREG_B0_UDB14_15_MSK\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__2__MASK 0x04u\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__2__POS 2\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__3__MASK 0x08u\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__3__POS 3\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__4__MASK 0x10u\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__4__POS 4\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__5__MASK 0x20u\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__5__POS 5\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__6__MASK 0x40u\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__6__POS 6\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__7__MASK 0x80u\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__7__POS 7\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_AUX_CTL_REG CYREG_B0_UDB14_ACTL\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_REG CYREG_B0_UDB14_CTL\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_ST_REG CYREG_B0_UDB14_ST_CTL\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__COUNT_REG CYREG_B0_UDB14_CTL\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__COUNT_ST_REG CYREG_B0_UDB14_ST_CTL\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__MASK 0xFFu\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG CYREG_B0_UDB14_MSK_ACTL\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG CYREG_B0_UDB14_MSK_ACTL\r
-#define SCSI_Out_Bits_Sync_ctrl_reg__PERIOD_REG CYREG_B0_UDB14_MSK\r
-#define SCSI_Out_Ctl_Sync_ctrl_reg__0__MASK 0x01u\r
-#define SCSI_Out_Ctl_Sync_ctrl_reg__0__POS 0\r
-#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG CYREG_B0_UDB12_13_ACTL\r
-#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG CYREG_B0_UDB12_13_CTL\r
-#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG CYREG_B0_UDB12_13_CTL\r
-#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG CYREG_B0_UDB12_13_CTL\r
-#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG CYREG_B0_UDB12_13_CTL\r
-#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG CYREG_B0_UDB12_13_MSK\r
-#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG CYREG_B0_UDB12_13_MSK\r
-#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG CYREG_B0_UDB12_13_MSK\r
-#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG CYREG_B0_UDB12_13_MSK\r
-#define SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG CYREG_B0_UDB12_ACTL\r
-#define SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_REG CYREG_B0_UDB12_CTL\r
-#define SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_ST_REG CYREG_B0_UDB12_ST_CTL\r
-#define SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_REG CYREG_B0_UDB12_CTL\r
-#define SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_ST_REG CYREG_B0_UDB12_ST_CTL\r
-#define SCSI_Out_Ctl_Sync_ctrl_reg__MASK 0x01u\r
-#define SCSI_Out_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG CYREG_B0_UDB12_MSK_ACTL\r
-#define SCSI_Out_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG CYREG_B0_UDB12_MSK_ACTL\r
-#define SCSI_Out_Ctl_Sync_ctrl_reg__PERIOD_REG CYREG_B0_UDB12_MSK\r
-#define SCSI_Out_DBx__0__AG CYREG_PRT5_AG\r
-#define SCSI_Out_DBx__0__AMUX CYREG_PRT5_AMUX\r
-#define SCSI_Out_DBx__0__BIE CYREG_PRT5_BIE\r
-#define SCSI_Out_DBx__0__BIT_MASK CYREG_PRT5_BIT_MASK\r
-#define SCSI_Out_DBx__0__BYP CYREG_PRT5_BYP\r
-#define SCSI_Out_DBx__0__CTL CYREG_PRT5_CTL\r
-#define SCSI_Out_DBx__0__DM0 CYREG_PRT5_DM0\r
-#define SCSI_Out_DBx__0__DM1 CYREG_PRT5_DM1\r
-#define SCSI_Out_DBx__0__DM2 CYREG_PRT5_DM2\r
-#define SCSI_Out_DBx__0__DR CYREG_PRT5_DR\r
-#define SCSI_Out_DBx__0__INP_DIS CYREG_PRT5_INP_DIS\r
-#define SCSI_Out_DBx__0__INTTYPE CYREG_PICU5_INTTYPE1\r
-#define SCSI_Out_DBx__0__LCD_COM_SEG CYREG_PRT5_LCD_COM_SEG\r
-#define SCSI_Out_DBx__0__LCD_EN CYREG_PRT5_LCD_EN\r
-#define SCSI_Out_DBx__0__MASK 0x02u\r
-#define SCSI_Out_DBx__0__PC CYREG_PRT5_PC1\r
-#define SCSI_Out_DBx__0__PORT 5u\r
-#define SCSI_Out_DBx__0__PRT CYREG_PRT5_PRT\r
-#define SCSI_Out_DBx__0__PRTDSI__CAPS_SEL CYREG_PRT5_CAPS_SEL\r
-#define SCSI_Out_DBx__0__PRTDSI__DBL_SYNC_IN CYREG_PRT5_DBL_SYNC_IN\r
-#define SCSI_Out_DBx__0__PRTDSI__OE_SEL0 CYREG_PRT5_OE_SEL0\r
-#define SCSI_Out_DBx__0__PRTDSI__OE_SEL1 CYREG_PRT5_OE_SEL1\r
-#define SCSI_Out_DBx__0__PRTDSI__OUT_SEL0 CYREG_PRT5_OUT_SEL0\r
-#define SCSI_Out_DBx__0__PRTDSI__OUT_SEL1 CYREG_PRT5_OUT_SEL1\r
-#define SCSI_Out_DBx__0__PRTDSI__SYNC_OUT CYREG_PRT5_SYNC_OUT\r
-#define SCSI_Out_DBx__0__PS CYREG_PRT5_PS\r
-#define SCSI_Out_DBx__0__SHIFT 1u\r
-#define SCSI_Out_DBx__0__SLW CYREG_PRT5_SLW\r
-#define SCSI_Out_DBx__1__AG CYREG_PRT5_AG\r
-#define SCSI_Out_DBx__1__AMUX CYREG_PRT5_AMUX\r
-#define SCSI_Out_DBx__1__BIE CYREG_PRT5_BIE\r
-#define SCSI_Out_DBx__1__BIT_MASK CYREG_PRT5_BIT_MASK\r
-#define SCSI_Out_DBx__1__BYP CYREG_PRT5_BYP\r
-#define SCSI_Out_DBx__1__CTL CYREG_PRT5_CTL\r
-#define SCSI_Out_DBx__1__DM0 CYREG_PRT5_DM0\r
-#define SCSI_Out_DBx__1__DM1 CYREG_PRT5_DM1\r
-#define SCSI_Out_DBx__1__DM2 CYREG_PRT5_DM2\r
-#define SCSI_Out_DBx__1__DR CYREG_PRT5_DR\r
-#define SCSI_Out_DBx__1__INP_DIS CYREG_PRT5_INP_DIS\r
-#define SCSI_Out_DBx__1__INTTYPE CYREG_PICU5_INTTYPE0\r
-#define SCSI_Out_DBx__1__LCD_COM_SEG CYREG_PRT5_LCD_COM_SEG\r
-#define SCSI_Out_DBx__1__LCD_EN CYREG_PRT5_LCD_EN\r
-#define SCSI_Out_DBx__1__MASK 0x01u\r
-#define SCSI_Out_DBx__1__PC CYREG_PRT5_PC0\r
-#define SCSI_Out_DBx__1__PORT 5u\r
-#define SCSI_Out_DBx__1__PRT CYREG_PRT5_PRT\r
-#define SCSI_Out_DBx__1__PRTDSI__CAPS_SEL CYREG_PRT5_CAPS_SEL\r
-#define SCSI_Out_DBx__1__PRTDSI__DBL_SYNC_IN CYREG_PRT5_DBL_SYNC_IN\r
-#define SCSI_Out_DBx__1__PRTDSI__OE_SEL0 CYREG_PRT5_OE_SEL0\r
-#define SCSI_Out_DBx__1__PRTDSI__OE_SEL1 CYREG_PRT5_OE_SEL1\r
-#define SCSI_Out_DBx__1__PRTDSI__OUT_SEL0 CYREG_PRT5_OUT_SEL0\r
-#define SCSI_Out_DBx__1__PRTDSI__OUT_SEL1 CYREG_PRT5_OUT_SEL1\r
-#define SCSI_Out_DBx__1__PRTDSI__SYNC_OUT CYREG_PRT5_SYNC_OUT\r
-#define SCSI_Out_DBx__1__PS CYREG_PRT5_PS\r
-#define SCSI_Out_DBx__1__SHIFT 0u\r
-#define SCSI_Out_DBx__1__SLW CYREG_PRT5_SLW\r
-#define SCSI_Out_DBx__2__AG CYREG_PRT6_AG\r
-#define SCSI_Out_DBx__2__AMUX CYREG_PRT6_AMUX\r
-#define SCSI_Out_DBx__2__BIE CYREG_PRT6_BIE\r
-#define SCSI_Out_DBx__2__BIT_MASK CYREG_PRT6_BIT_MASK\r
-#define SCSI_Out_DBx__2__BYP CYREG_PRT6_BYP\r
-#define SCSI_Out_DBx__2__CTL CYREG_PRT6_CTL\r
-#define SCSI_Out_DBx__2__DM0 CYREG_PRT6_DM0\r
-#define SCSI_Out_DBx__2__DM1 CYREG_PRT6_DM1\r
-#define SCSI_Out_DBx__2__DM2 CYREG_PRT6_DM2\r
-#define SCSI_Out_DBx__2__DR CYREG_PRT6_DR\r
-#define SCSI_Out_DBx__2__INP_DIS CYREG_PRT6_INP_DIS\r
-#define SCSI_Out_DBx__2__INTTYPE CYREG_PICU6_INTTYPE5\r
-#define SCSI_Out_DBx__2__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
-#define SCSI_Out_DBx__2__LCD_EN CYREG_PRT6_LCD_EN\r
-#define SCSI_Out_DBx__2__MASK 0x20u\r
-#define SCSI_Out_DBx__2__PC CYREG_PRT6_PC5\r
-#define SCSI_Out_DBx__2__PORT 6u\r
-#define SCSI_Out_DBx__2__PRT CYREG_PRT6_PRT\r
-#define SCSI_Out_DBx__2__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
-#define SCSI_Out_DBx__2__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
-#define SCSI_Out_DBx__2__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
-#define SCSI_Out_DBx__2__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
-#define SCSI_Out_DBx__2__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
-#define SCSI_Out_DBx__2__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
-#define SCSI_Out_DBx__2__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
-#define SCSI_Out_DBx__2__PS CYREG_PRT6_PS\r
-#define SCSI_Out_DBx__2__SHIFT 5u\r
-#define SCSI_Out_DBx__2__SLW CYREG_PRT6_SLW\r
-#define SCSI_Out_DBx__3__AG CYREG_PRT6_AG\r
-#define SCSI_Out_DBx__3__AMUX CYREG_PRT6_AMUX\r
-#define SCSI_Out_DBx__3__BIE CYREG_PRT6_BIE\r
-#define SCSI_Out_DBx__3__BIT_MASK CYREG_PRT6_BIT_MASK\r
-#define SCSI_Out_DBx__3__BYP CYREG_PRT6_BYP\r
-#define SCSI_Out_DBx__3__CTL CYREG_PRT6_CTL\r
-#define SCSI_Out_DBx__3__DM0 CYREG_PRT6_DM0\r
-#define SCSI_Out_DBx__3__DM1 CYREG_PRT6_DM1\r
-#define SCSI_Out_DBx__3__DM2 CYREG_PRT6_DM2\r
-#define SCSI_Out_DBx__3__DR CYREG_PRT6_DR\r
-#define SCSI_Out_DBx__3__INP_DIS CYREG_PRT6_INP_DIS\r
-#define SCSI_Out_DBx__3__INTTYPE CYREG_PICU6_INTTYPE4\r
-#define SCSI_Out_DBx__3__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
-#define SCSI_Out_DBx__3__LCD_EN CYREG_PRT6_LCD_EN\r
-#define SCSI_Out_DBx__3__MASK 0x10u\r
-#define SCSI_Out_DBx__3__PC CYREG_PRT6_PC4\r
-#define SCSI_Out_DBx__3__PORT 6u\r
-#define SCSI_Out_DBx__3__PRT CYREG_PRT6_PRT\r
-#define SCSI_Out_DBx__3__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
-#define SCSI_Out_DBx__3__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
-#define SCSI_Out_DBx__3__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
-#define SCSI_Out_DBx__3__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
-#define SCSI_Out_DBx__3__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
-#define SCSI_Out_DBx__3__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
-#define SCSI_Out_DBx__3__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
-#define SCSI_Out_DBx__3__PS CYREG_PRT6_PS\r
-#define SCSI_Out_DBx__3__SHIFT 4u\r
-#define SCSI_Out_DBx__3__SLW CYREG_PRT6_SLW\r
-#define SCSI_Out_DBx__4__AG CYREG_PRT2_AG\r
-#define SCSI_Out_DBx__4__AMUX CYREG_PRT2_AMUX\r
-#define SCSI_Out_DBx__4__BIE CYREG_PRT2_BIE\r
-#define SCSI_Out_DBx__4__BIT_MASK CYREG_PRT2_BIT_MASK\r
-#define SCSI_Out_DBx__4__BYP CYREG_PRT2_BYP\r
-#define SCSI_Out_DBx__4__CTL CYREG_PRT2_CTL\r
-#define SCSI_Out_DBx__4__DM0 CYREG_PRT2_DM0\r
-#define SCSI_Out_DBx__4__DM1 CYREG_PRT2_DM1\r
-#define SCSI_Out_DBx__4__DM2 CYREG_PRT2_DM2\r
-#define SCSI_Out_DBx__4__DR CYREG_PRT2_DR\r
-#define SCSI_Out_DBx__4__INP_DIS CYREG_PRT2_INP_DIS\r
-#define SCSI_Out_DBx__4__INTTYPE CYREG_PICU2_INTTYPE7\r
-#define SCSI_Out_DBx__4__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG\r
-#define SCSI_Out_DBx__4__LCD_EN CYREG_PRT2_LCD_EN\r
-#define SCSI_Out_DBx__4__MASK 0x80u\r
-#define SCSI_Out_DBx__4__PC CYREG_PRT2_PC7\r
-#define SCSI_Out_DBx__4__PORT 2u\r
-#define SCSI_Out_DBx__4__PRT CYREG_PRT2_PRT\r
-#define SCSI_Out_DBx__4__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL\r
-#define SCSI_Out_DBx__4__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN\r
-#define SCSI_Out_DBx__4__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0\r
-#define SCSI_Out_DBx__4__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1\r
-#define SCSI_Out_DBx__4__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0\r
-#define SCSI_Out_DBx__4__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1\r
-#define SCSI_Out_DBx__4__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT\r
-#define SCSI_Out_DBx__4__PS CYREG_PRT2_PS\r
-#define SCSI_Out_DBx__4__SHIFT 7u\r
-#define SCSI_Out_DBx__4__SLW CYREG_PRT2_SLW\r
-#define SCSI_Out_DBx__5__AG CYREG_PRT2_AG\r
-#define SCSI_Out_DBx__5__AMUX CYREG_PRT2_AMUX\r
-#define SCSI_Out_DBx__5__BIE CYREG_PRT2_BIE\r
-#define SCSI_Out_DBx__5__BIT_MASK CYREG_PRT2_BIT_MASK\r
-#define SCSI_Out_DBx__5__BYP CYREG_PRT2_BYP\r
-#define SCSI_Out_DBx__5__CTL CYREG_PRT2_CTL\r
-#define SCSI_Out_DBx__5__DM0 CYREG_PRT2_DM0\r
-#define SCSI_Out_DBx__5__DM1 CYREG_PRT2_DM1\r
-#define SCSI_Out_DBx__5__DM2 CYREG_PRT2_DM2\r
-#define SCSI_Out_DBx__5__DR CYREG_PRT2_DR\r
-#define SCSI_Out_DBx__5__INP_DIS CYREG_PRT2_INP_DIS\r
-#define SCSI_Out_DBx__5__INTTYPE CYREG_PICU2_INTTYPE6\r
-#define SCSI_Out_DBx__5__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG\r
-#define SCSI_Out_DBx__5__LCD_EN CYREG_PRT2_LCD_EN\r
-#define SCSI_Out_DBx__5__MASK 0x40u\r
-#define SCSI_Out_DBx__5__PC CYREG_PRT2_PC6\r
-#define SCSI_Out_DBx__5__PORT 2u\r
-#define SCSI_Out_DBx__5__PRT CYREG_PRT2_PRT\r
-#define SCSI_Out_DBx__5__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL\r
-#define SCSI_Out_DBx__5__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN\r
-#define SCSI_Out_DBx__5__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0\r
-#define SCSI_Out_DBx__5__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1\r
-#define SCSI_Out_DBx__5__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0\r
-#define SCSI_Out_DBx__5__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1\r
-#define SCSI_Out_DBx__5__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT\r
-#define SCSI_Out_DBx__5__PS CYREG_PRT2_PS\r
-#define SCSI_Out_DBx__5__SHIFT 6u\r
-#define SCSI_Out_DBx__5__SLW CYREG_PRT2_SLW\r
-#define SCSI_Out_DBx__6__AG CYREG_PRT2_AG\r
-#define SCSI_Out_DBx__6__AMUX CYREG_PRT2_AMUX\r
-#define SCSI_Out_DBx__6__BIE CYREG_PRT2_BIE\r
-#define SCSI_Out_DBx__6__BIT_MASK CYREG_PRT2_BIT_MASK\r
-#define SCSI_Out_DBx__6__BYP CYREG_PRT2_BYP\r
-#define SCSI_Out_DBx__6__CTL CYREG_PRT2_CTL\r
-#define SCSI_Out_DBx__6__DM0 CYREG_PRT2_DM0\r
-#define SCSI_Out_DBx__6__DM1 CYREG_PRT2_DM1\r
-#define SCSI_Out_DBx__6__DM2 CYREG_PRT2_DM2\r
-#define SCSI_Out_DBx__6__DR CYREG_PRT2_DR\r
-#define SCSI_Out_DBx__6__INP_DIS CYREG_PRT2_INP_DIS\r
-#define SCSI_Out_DBx__6__INTTYPE CYREG_PICU2_INTTYPE3\r
-#define SCSI_Out_DBx__6__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG\r
-#define SCSI_Out_DBx__6__LCD_EN CYREG_PRT2_LCD_EN\r
-#define SCSI_Out_DBx__6__MASK 0x08u\r
-#define SCSI_Out_DBx__6__PC CYREG_PRT2_PC3\r
-#define SCSI_Out_DBx__6__PORT 2u\r
-#define SCSI_Out_DBx__6__PRT CYREG_PRT2_PRT\r
-#define SCSI_Out_DBx__6__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL\r
-#define SCSI_Out_DBx__6__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN\r
-#define SCSI_Out_DBx__6__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0\r
-#define SCSI_Out_DBx__6__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1\r
-#define SCSI_Out_DBx__6__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0\r
-#define SCSI_Out_DBx__6__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1\r
-#define SCSI_Out_DBx__6__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT\r
-#define SCSI_Out_DBx__6__PS CYREG_PRT2_PS\r
-#define SCSI_Out_DBx__6__SHIFT 3u\r
-#define SCSI_Out_DBx__6__SLW CYREG_PRT2_SLW\r
-#define SCSI_Out_DBx__7__AG CYREG_PRT2_AG\r
-#define SCSI_Out_DBx__7__AMUX CYREG_PRT2_AMUX\r
-#define SCSI_Out_DBx__7__BIE CYREG_PRT2_BIE\r
-#define SCSI_Out_DBx__7__BIT_MASK CYREG_PRT2_BIT_MASK\r
-#define SCSI_Out_DBx__7__BYP CYREG_PRT2_BYP\r
-#define SCSI_Out_DBx__7__CTL CYREG_PRT2_CTL\r
-#define SCSI_Out_DBx__7__DM0 CYREG_PRT2_DM0\r
-#define SCSI_Out_DBx__7__DM1 CYREG_PRT2_DM1\r
-#define SCSI_Out_DBx__7__DM2 CYREG_PRT2_DM2\r
-#define SCSI_Out_DBx__7__DR CYREG_PRT2_DR\r
-#define SCSI_Out_DBx__7__INP_DIS CYREG_PRT2_INP_DIS\r
-#define SCSI_Out_DBx__7__INTTYPE CYREG_PICU2_INTTYPE2\r
-#define SCSI_Out_DBx__7__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG\r
-#define SCSI_Out_DBx__7__LCD_EN CYREG_PRT2_LCD_EN\r
-#define SCSI_Out_DBx__7__MASK 0x04u\r
-#define SCSI_Out_DBx__7__PC CYREG_PRT2_PC2\r
-#define SCSI_Out_DBx__7__PORT 2u\r
-#define SCSI_Out_DBx__7__PRT CYREG_PRT2_PRT\r
-#define SCSI_Out_DBx__7__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL\r
-#define SCSI_Out_DBx__7__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN\r
-#define SCSI_Out_DBx__7__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0\r
-#define SCSI_Out_DBx__7__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1\r
-#define SCSI_Out_DBx__7__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0\r
-#define SCSI_Out_DBx__7__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1\r
-#define SCSI_Out_DBx__7__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT\r
-#define SCSI_Out_DBx__7__PS CYREG_PRT2_PS\r
-#define SCSI_Out_DBx__7__SHIFT 2u\r
-#define SCSI_Out_DBx__7__SLW CYREG_PRT2_SLW\r
-#define SCSI_Out_DBx__DB0__AG CYREG_PRT5_AG\r
-#define SCSI_Out_DBx__DB0__AMUX CYREG_PRT5_AMUX\r
-#define SCSI_Out_DBx__DB0__BIE CYREG_PRT5_BIE\r
-#define SCSI_Out_DBx__DB0__BIT_MASK CYREG_PRT5_BIT_MASK\r
-#define SCSI_Out_DBx__DB0__BYP CYREG_PRT5_BYP\r
-#define SCSI_Out_DBx__DB0__CTL CYREG_PRT5_CTL\r
-#define SCSI_Out_DBx__DB0__DM0 CYREG_PRT5_DM0\r
-#define SCSI_Out_DBx__DB0__DM1 CYREG_PRT5_DM1\r
-#define SCSI_Out_DBx__DB0__DM2 CYREG_PRT5_DM2\r
-#define SCSI_Out_DBx__DB0__DR CYREG_PRT5_DR\r
-#define SCSI_Out_DBx__DB0__INP_DIS CYREG_PRT5_INP_DIS\r
-#define SCSI_Out_DBx__DB0__INTTYPE CYREG_PICU5_INTTYPE1\r
-#define SCSI_Out_DBx__DB0__LCD_COM_SEG CYREG_PRT5_LCD_COM_SEG\r
-#define SCSI_Out_DBx__DB0__LCD_EN CYREG_PRT5_LCD_EN\r
-#define SCSI_Out_DBx__DB0__MASK 0x02u\r
-#define SCSI_Out_DBx__DB0__PC CYREG_PRT5_PC1\r
-#define SCSI_Out_DBx__DB0__PORT 5u\r
-#define SCSI_Out_DBx__DB0__PRT CYREG_PRT5_PRT\r
-#define SCSI_Out_DBx__DB0__PRTDSI__CAPS_SEL CYREG_PRT5_CAPS_SEL\r
-#define SCSI_Out_DBx__DB0__PRTDSI__DBL_SYNC_IN CYREG_PRT5_DBL_SYNC_IN\r
-#define SCSI_Out_DBx__DB0__PRTDSI__OE_SEL0 CYREG_PRT5_OE_SEL0\r
-#define SCSI_Out_DBx__DB0__PRTDSI__OE_SEL1 CYREG_PRT5_OE_SEL1\r
-#define SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL0 CYREG_PRT5_OUT_SEL0\r
-#define SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL1 CYREG_PRT5_OUT_SEL1\r
-#define SCSI_Out_DBx__DB0__PRTDSI__SYNC_OUT CYREG_PRT5_SYNC_OUT\r
-#define SCSI_Out_DBx__DB0__PS CYREG_PRT5_PS\r
-#define SCSI_Out_DBx__DB0__SHIFT 1u\r
-#define SCSI_Out_DBx__DB0__SLW CYREG_PRT5_SLW\r
-#define SCSI_Out_DBx__DB1__AG CYREG_PRT5_AG\r
-#define SCSI_Out_DBx__DB1__AMUX CYREG_PRT5_AMUX\r
-#define SCSI_Out_DBx__DB1__BIE CYREG_PRT5_BIE\r
-#define SCSI_Out_DBx__DB1__BIT_MASK CYREG_PRT5_BIT_MASK\r
-#define SCSI_Out_DBx__DB1__BYP CYREG_PRT5_BYP\r
-#define SCSI_Out_DBx__DB1__CTL CYREG_PRT5_CTL\r
-#define SCSI_Out_DBx__DB1__DM0 CYREG_PRT5_DM0\r
-#define SCSI_Out_DBx__DB1__DM1 CYREG_PRT5_DM1\r
-#define SCSI_Out_DBx__DB1__DM2 CYREG_PRT5_DM2\r
-#define SCSI_Out_DBx__DB1__DR CYREG_PRT5_DR\r
-#define SCSI_Out_DBx__DB1__INP_DIS CYREG_PRT5_INP_DIS\r
-#define SCSI_Out_DBx__DB1__INTTYPE CYREG_PICU5_INTTYPE0\r
-#define SCSI_Out_DBx__DB1__LCD_COM_SEG CYREG_PRT5_LCD_COM_SEG\r
-#define SCSI_Out_DBx__DB1__LCD_EN CYREG_PRT5_LCD_EN\r
-#define SCSI_Out_DBx__DB1__MASK 0x01u\r
-#define SCSI_Out_DBx__DB1__PC CYREG_PRT5_PC0\r
-#define SCSI_Out_DBx__DB1__PORT 5u\r
-#define SCSI_Out_DBx__DB1__PRT CYREG_PRT5_PRT\r
-#define SCSI_Out_DBx__DB1__PRTDSI__CAPS_SEL CYREG_PRT5_CAPS_SEL\r
-#define SCSI_Out_DBx__DB1__PRTDSI__DBL_SYNC_IN CYREG_PRT5_DBL_SYNC_IN\r
-#define SCSI_Out_DBx__DB1__PRTDSI__OE_SEL0 CYREG_PRT5_OE_SEL0\r
-#define SCSI_Out_DBx__DB1__PRTDSI__OE_SEL1 CYREG_PRT5_OE_SEL1\r
-#define SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL0 CYREG_PRT5_OUT_SEL0\r
-#define SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL1 CYREG_PRT5_OUT_SEL1\r
-#define SCSI_Out_DBx__DB1__PRTDSI__SYNC_OUT CYREG_PRT5_SYNC_OUT\r
-#define SCSI_Out_DBx__DB1__PS CYREG_PRT5_PS\r
-#define SCSI_Out_DBx__DB1__SHIFT 0u\r
-#define SCSI_Out_DBx__DB1__SLW CYREG_PRT5_SLW\r
-#define SCSI_Out_DBx__DB2__AG CYREG_PRT6_AG\r
-#define SCSI_Out_DBx__DB2__AMUX CYREG_PRT6_AMUX\r
-#define SCSI_Out_DBx__DB2__BIE CYREG_PRT6_BIE\r
-#define SCSI_Out_DBx__DB2__BIT_MASK CYREG_PRT6_BIT_MASK\r
-#define SCSI_Out_DBx__DB2__BYP CYREG_PRT6_BYP\r
-#define SCSI_Out_DBx__DB2__CTL CYREG_PRT6_CTL\r
-#define SCSI_Out_DBx__DB2__DM0 CYREG_PRT6_DM0\r
-#define SCSI_Out_DBx__DB2__DM1 CYREG_PRT6_DM1\r
-#define SCSI_Out_DBx__DB2__DM2 CYREG_PRT6_DM2\r
-#define SCSI_Out_DBx__DB2__DR CYREG_PRT6_DR\r
-#define SCSI_Out_DBx__DB2__INP_DIS CYREG_PRT6_INP_DIS\r
-#define SCSI_Out_DBx__DB2__INTTYPE CYREG_PICU6_INTTYPE5\r
-#define SCSI_Out_DBx__DB2__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
-#define SCSI_Out_DBx__DB2__LCD_EN CYREG_PRT6_LCD_EN\r
-#define SCSI_Out_DBx__DB2__MASK 0x20u\r
-#define SCSI_Out_DBx__DB2__PC CYREG_PRT6_PC5\r
-#define SCSI_Out_DBx__DB2__PORT 6u\r
-#define SCSI_Out_DBx__DB2__PRT CYREG_PRT6_PRT\r
-#define SCSI_Out_DBx__DB2__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
-#define SCSI_Out_DBx__DB2__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
-#define SCSI_Out_DBx__DB2__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
-#define SCSI_Out_DBx__DB2__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
-#define SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
-#define SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
-#define SCSI_Out_DBx__DB2__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
-#define SCSI_Out_DBx__DB2__PS CYREG_PRT6_PS\r
-#define SCSI_Out_DBx__DB2__SHIFT 5u\r
-#define SCSI_Out_DBx__DB2__SLW CYREG_PRT6_SLW\r
-#define SCSI_Out_DBx__DB3__AG CYREG_PRT6_AG\r
-#define SCSI_Out_DBx__DB3__AMUX CYREG_PRT6_AMUX\r
-#define SCSI_Out_DBx__DB3__BIE CYREG_PRT6_BIE\r
-#define SCSI_Out_DBx__DB3__BIT_MASK CYREG_PRT6_BIT_MASK\r
-#define SCSI_Out_DBx__DB3__BYP CYREG_PRT6_BYP\r
-#define SCSI_Out_DBx__DB3__CTL CYREG_PRT6_CTL\r
-#define SCSI_Out_DBx__DB3__DM0 CYREG_PRT6_DM0\r
-#define SCSI_Out_DBx__DB3__DM1 CYREG_PRT6_DM1\r
-#define SCSI_Out_DBx__DB3__DM2 CYREG_PRT6_DM2\r
-#define SCSI_Out_DBx__DB3__DR CYREG_PRT6_DR\r
-#define SCSI_Out_DBx__DB3__INP_DIS CYREG_PRT6_INP_DIS\r
-#define SCSI_Out_DBx__DB3__INTTYPE CYREG_PICU6_INTTYPE4\r
-#define SCSI_Out_DBx__DB3__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
-#define SCSI_Out_DBx__DB3__LCD_EN CYREG_PRT6_LCD_EN\r
-#define SCSI_Out_DBx__DB3__MASK 0x10u\r
-#define SCSI_Out_DBx__DB3__PC CYREG_PRT6_PC4\r
-#define SCSI_Out_DBx__DB3__PORT 6u\r
-#define SCSI_Out_DBx__DB3__PRT CYREG_PRT6_PRT\r
-#define SCSI_Out_DBx__DB3__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
-#define SCSI_Out_DBx__DB3__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
-#define SCSI_Out_DBx__DB3__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
-#define SCSI_Out_DBx__DB3__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
-#define SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
-#define SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
-#define SCSI_Out_DBx__DB3__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
-#define SCSI_Out_DBx__DB3__PS CYREG_PRT6_PS\r
-#define SCSI_Out_DBx__DB3__SHIFT 4u\r
-#define SCSI_Out_DBx__DB3__SLW CYREG_PRT6_SLW\r
-#define SCSI_Out_DBx__DB4__AG CYREG_PRT2_AG\r
-#define SCSI_Out_DBx__DB4__AMUX CYREG_PRT2_AMUX\r
-#define SCSI_Out_DBx__DB4__BIE CYREG_PRT2_BIE\r
-#define SCSI_Out_DBx__DB4__BIT_MASK CYREG_PRT2_BIT_MASK\r
-#define SCSI_Out_DBx__DB4__BYP CYREG_PRT2_BYP\r
-#define SCSI_Out_DBx__DB4__CTL CYREG_PRT2_CTL\r
-#define SCSI_Out_DBx__DB4__DM0 CYREG_PRT2_DM0\r
-#define SCSI_Out_DBx__DB4__DM1 CYREG_PRT2_DM1\r
-#define SCSI_Out_DBx__DB4__DM2 CYREG_PRT2_DM2\r
-#define SCSI_Out_DBx__DB4__DR CYREG_PRT2_DR\r
-#define SCSI_Out_DBx__DB4__INP_DIS CYREG_PRT2_INP_DIS\r
-#define SCSI_Out_DBx__DB4__INTTYPE CYREG_PICU2_INTTYPE7\r
-#define SCSI_Out_DBx__DB4__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG\r
-#define SCSI_Out_DBx__DB4__LCD_EN CYREG_PRT2_LCD_EN\r
-#define SCSI_Out_DBx__DB4__MASK 0x80u\r
-#define SCSI_Out_DBx__DB4__PC CYREG_PRT2_PC7\r
-#define SCSI_Out_DBx__DB4__PORT 2u\r
-#define SCSI_Out_DBx__DB4__PRT CYREG_PRT2_PRT\r
-#define SCSI_Out_DBx__DB4__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL\r
-#define SCSI_Out_DBx__DB4__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN\r
-#define SCSI_Out_DBx__DB4__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0\r
-#define SCSI_Out_DBx__DB4__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1\r
-#define SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0\r
-#define SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1\r
-#define SCSI_Out_DBx__DB4__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT\r
-#define SCSI_Out_DBx__DB4__PS CYREG_PRT2_PS\r
-#define SCSI_Out_DBx__DB4__SHIFT 7u\r
-#define SCSI_Out_DBx__DB4__SLW CYREG_PRT2_SLW\r
-#define SCSI_Out_DBx__DB5__AG CYREG_PRT2_AG\r
-#define SCSI_Out_DBx__DB5__AMUX CYREG_PRT2_AMUX\r
-#define SCSI_Out_DBx__DB5__BIE CYREG_PRT2_BIE\r
-#define SCSI_Out_DBx__DB5__BIT_MASK CYREG_PRT2_BIT_MASK\r
-#define SCSI_Out_DBx__DB5__BYP CYREG_PRT2_BYP\r
-#define SCSI_Out_DBx__DB5__CTL CYREG_PRT2_CTL\r
-#define SCSI_Out_DBx__DB5__DM0 CYREG_PRT2_DM0\r
-#define SCSI_Out_DBx__DB5__DM1 CYREG_PRT2_DM1\r
-#define SCSI_Out_DBx__DB5__DM2 CYREG_PRT2_DM2\r
-#define SCSI_Out_DBx__DB5__DR CYREG_PRT2_DR\r
-#define SCSI_Out_DBx__DB5__INP_DIS CYREG_PRT2_INP_DIS\r
-#define SCSI_Out_DBx__DB5__INTTYPE CYREG_PICU2_INTTYPE6\r
-#define SCSI_Out_DBx__DB5__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG\r
-#define SCSI_Out_DBx__DB5__LCD_EN CYREG_PRT2_LCD_EN\r
-#define SCSI_Out_DBx__DB5__MASK 0x40u\r
-#define SCSI_Out_DBx__DB5__PC CYREG_PRT2_PC6\r
-#define SCSI_Out_DBx__DB5__PORT 2u\r
-#define SCSI_Out_DBx__DB5__PRT CYREG_PRT2_PRT\r
-#define SCSI_Out_DBx__DB5__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL\r
-#define SCSI_Out_DBx__DB5__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN\r
-#define SCSI_Out_DBx__DB5__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0\r
-#define SCSI_Out_DBx__DB5__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1\r
-#define SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0\r
-#define SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1\r
-#define SCSI_Out_DBx__DB5__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT\r
-#define SCSI_Out_DBx__DB5__PS CYREG_PRT2_PS\r
-#define SCSI_Out_DBx__DB5__SHIFT 6u\r
-#define SCSI_Out_DBx__DB5__SLW CYREG_PRT2_SLW\r
-#define SCSI_Out_DBx__DB6__AG CYREG_PRT2_AG\r
-#define SCSI_Out_DBx__DB6__AMUX CYREG_PRT2_AMUX\r
-#define SCSI_Out_DBx__DB6__BIE CYREG_PRT2_BIE\r
-#define SCSI_Out_DBx__DB6__BIT_MASK CYREG_PRT2_BIT_MASK\r
-#define SCSI_Out_DBx__DB6__BYP CYREG_PRT2_BYP\r
-#define SCSI_Out_DBx__DB6__CTL CYREG_PRT2_CTL\r
-#define SCSI_Out_DBx__DB6__DM0 CYREG_PRT2_DM0\r
-#define SCSI_Out_DBx__DB6__DM1 CYREG_PRT2_DM1\r
-#define SCSI_Out_DBx__DB6__DM2 CYREG_PRT2_DM2\r
-#define SCSI_Out_DBx__DB6__DR CYREG_PRT2_DR\r
-#define SCSI_Out_DBx__DB6__INP_DIS CYREG_PRT2_INP_DIS\r
-#define SCSI_Out_DBx__DB6__INTTYPE CYREG_PICU2_INTTYPE3\r
-#define SCSI_Out_DBx__DB6__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG\r
-#define SCSI_Out_DBx__DB6__LCD_EN CYREG_PRT2_LCD_EN\r
-#define SCSI_Out_DBx__DB6__MASK 0x08u\r
-#define SCSI_Out_DBx__DB6__PC CYREG_PRT2_PC3\r
-#define SCSI_Out_DBx__DB6__PORT 2u\r
-#define SCSI_Out_DBx__DB6__PRT CYREG_PRT2_PRT\r
-#define SCSI_Out_DBx__DB6__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL\r
-#define SCSI_Out_DBx__DB6__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN\r
-#define SCSI_Out_DBx__DB6__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0\r
-#define SCSI_Out_DBx__DB6__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1\r
-#define SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0\r
-#define SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1\r
-#define SCSI_Out_DBx__DB6__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT\r
-#define SCSI_Out_DBx__DB6__PS CYREG_PRT2_PS\r
-#define SCSI_Out_DBx__DB6__SHIFT 3u\r
-#define SCSI_Out_DBx__DB6__SLW CYREG_PRT2_SLW\r
-#define SCSI_Out_DBx__DB7__AG CYREG_PRT2_AG\r
-#define SCSI_Out_DBx__DB7__AMUX CYREG_PRT2_AMUX\r
-#define SCSI_Out_DBx__DB7__BIE CYREG_PRT2_BIE\r
-#define SCSI_Out_DBx__DB7__BIT_MASK CYREG_PRT2_BIT_MASK\r
-#define SCSI_Out_DBx__DB7__BYP CYREG_PRT2_BYP\r
-#define SCSI_Out_DBx__DB7__CTL CYREG_PRT2_CTL\r
-#define SCSI_Out_DBx__DB7__DM0 CYREG_PRT2_DM0\r
-#define SCSI_Out_DBx__DB7__DM1 CYREG_PRT2_DM1\r
-#define SCSI_Out_DBx__DB7__DM2 CYREG_PRT2_DM2\r
-#define SCSI_Out_DBx__DB7__DR CYREG_PRT2_DR\r
-#define SCSI_Out_DBx__DB7__INP_DIS CYREG_PRT2_INP_DIS\r
-#define SCSI_Out_DBx__DB7__INTTYPE CYREG_PICU2_INTTYPE2\r
-#define SCSI_Out_DBx__DB7__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG\r
-#define SCSI_Out_DBx__DB7__LCD_EN CYREG_PRT2_LCD_EN\r
-#define SCSI_Out_DBx__DB7__MASK 0x04u\r
-#define SCSI_Out_DBx__DB7__PC CYREG_PRT2_PC2\r
-#define SCSI_Out_DBx__DB7__PORT 2u\r
-#define SCSI_Out_DBx__DB7__PRT CYREG_PRT2_PRT\r
-#define SCSI_Out_DBx__DB7__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL\r
-#define SCSI_Out_DBx__DB7__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN\r
-#define SCSI_Out_DBx__DB7__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0\r
-#define SCSI_Out_DBx__DB7__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1\r
-#define SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0\r
-#define SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1\r
-#define SCSI_Out_DBx__DB7__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT\r
-#define SCSI_Out_DBx__DB7__PS CYREG_PRT2_PS\r
-#define SCSI_Out_DBx__DB7__SHIFT 2u\r
-#define SCSI_Out_DBx__DB7__SLW CYREG_PRT2_SLW\r
-\r
-/* SCSI_Parity_Error */\r
-#define SCSI_Parity_Error_sts_sts_reg__0__MASK 0x01u\r
-#define SCSI_Parity_Error_sts_sts_reg__0__POS 0\r
-#define SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG CYREG_B0_UDB05_06_ACTL\r
-#define SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_REG CYREG_B0_UDB05_06_ST\r
-#define SCSI_Parity_Error_sts_sts_reg__MASK 0x01u\r
-#define SCSI_Parity_Error_sts_sts_reg__MASK_REG CYREG_B0_UDB05_MSK\r
-#define SCSI_Parity_Error_sts_sts_reg__STATUS_AUX_CTL_REG CYREG_B0_UDB05_ACTL\r
-#define SCSI_Parity_Error_sts_sts_reg__STATUS_REG CYREG_B0_UDB05_ST\r
-\r
-/* SCSI_RST_ISR */\r
-#define SCSI_RST_ISR__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0\r
-#define SCSI_RST_ISR__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0\r
-#define SCSI_RST_ISR__INTC_MASK 0x02u\r
-#define SCSI_RST_ISR__INTC_NUMBER 1u\r
-#define SCSI_RST_ISR__INTC_PRIOR_NUM 7u\r
-#define SCSI_RST_ISR__INTC_PRIOR_REG CYREG_NVIC_PRI_1\r
-#define SCSI_RST_ISR__INTC_SET_EN_REG CYREG_NVIC_SETENA0\r
-#define SCSI_RST_ISR__INTC_SET_PD_REG CYREG_NVIC_SETPEND0\r
-\r
-/* SCSI_RX_DMA */\r
-#define SCSI_RX_DMA__DRQ_CTL CYREG_IDMUX_DRQ_CTL0\r
-#define SCSI_RX_DMA__DRQ_NUMBER 0u\r
-#define SCSI_RX_DMA__NUMBEROF_TDS 0u\r
-#define SCSI_RX_DMA__PRIORITY 2u\r
-#define SCSI_RX_DMA__TERMIN_EN 0u\r
-#define SCSI_RX_DMA__TERMIN_SEL 0u\r
-#define SCSI_RX_DMA__TERMOUT0_EN 1u\r
-#define SCSI_RX_DMA__TERMOUT0_SEL 0u\r
-#define SCSI_RX_DMA__TERMOUT1_EN 0u\r
-#define SCSI_RX_DMA__TERMOUT1_SEL 0u\r
-#define SCSI_RX_DMA_COMPLETE__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0\r
-#define SCSI_RX_DMA_COMPLETE__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0\r
-#define SCSI_RX_DMA_COMPLETE__INTC_MASK 0x04u\r
-#define SCSI_RX_DMA_COMPLETE__INTC_NUMBER 2u\r
-#define SCSI_RX_DMA_COMPLETE__INTC_PRIOR_NUM 7u\r
-#define SCSI_RX_DMA_COMPLETE__INTC_PRIOR_REG CYREG_NVIC_PRI_2\r
-#define SCSI_RX_DMA_COMPLETE__INTC_SET_EN_REG CYREG_NVIC_SETENA0\r
-#define SCSI_RX_DMA_COMPLETE__INTC_SET_PD_REG CYREG_NVIC_SETPEND0\r
-\r
-/* SCSI_SEL_ISR */\r
-#define SCSI_SEL_ISR__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0\r
-#define SCSI_SEL_ISR__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0\r
-#define SCSI_SEL_ISR__INTC_MASK 0x08u\r
-#define SCSI_SEL_ISR__INTC_NUMBER 3u\r
-#define SCSI_SEL_ISR__INTC_PRIOR_NUM 7u\r
-#define SCSI_SEL_ISR__INTC_PRIOR_REG CYREG_NVIC_PRI_3\r
-#define SCSI_SEL_ISR__INTC_SET_EN_REG CYREG_NVIC_SETENA0\r
-#define SCSI_SEL_ISR__INTC_SET_PD_REG CYREG_NVIC_SETPEND0\r
-\r
-/* SCSI_TX_DMA */\r
-#define SCSI_TX_DMA__DRQ_CTL CYREG_IDMUX_DRQ_CTL0\r
-#define SCSI_TX_DMA__DRQ_NUMBER 1u\r
-#define SCSI_TX_DMA__NUMBEROF_TDS 0u\r
-#define SCSI_TX_DMA__PRIORITY 2u\r
-#define SCSI_TX_DMA__TERMIN_EN 0u\r
-#define SCSI_TX_DMA__TERMIN_SEL 0u\r
-#define SCSI_TX_DMA__TERMOUT0_EN 1u\r
-#define SCSI_TX_DMA__TERMOUT0_SEL 1u\r
-#define SCSI_TX_DMA__TERMOUT1_EN 0u\r
-#define SCSI_TX_DMA__TERMOUT1_SEL 0u\r
-#define SCSI_TX_DMA_COMPLETE__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0\r
-#define SCSI_TX_DMA_COMPLETE__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0\r
-#define SCSI_TX_DMA_COMPLETE__INTC_MASK 0x10u\r
-#define SCSI_TX_DMA_COMPLETE__INTC_NUMBER 4u\r
-#define SCSI_TX_DMA_COMPLETE__INTC_PRIOR_NUM 7u\r
-#define SCSI_TX_DMA_COMPLETE__INTC_PRIOR_REG CYREG_NVIC_PRI_4\r
-#define SCSI_TX_DMA_COMPLETE__INTC_SET_EN_REG CYREG_NVIC_SETENA0\r
-#define SCSI_TX_DMA_COMPLETE__INTC_SET_PD_REG CYREG_NVIC_SETPEND0\r
-\r
-/* SDCard_BSPIM */\r
-#define SDCard_BSPIM_BitCounter__16BIT_CONTROL_AUX_CTL_REG CYREG_B1_UDB05_06_ACTL\r
-#define SDCard_BSPIM_BitCounter__16BIT_CONTROL_CONTROL_REG CYREG_B1_UDB05_06_CTL\r
-#define SDCard_BSPIM_BitCounter__16BIT_CONTROL_COUNT_REG CYREG_B1_UDB05_06_CTL\r
-#define SDCard_BSPIM_BitCounter__16BIT_COUNT_CONTROL_REG CYREG_B1_UDB05_06_CTL\r
-#define SDCard_BSPIM_BitCounter__16BIT_COUNT_COUNT_REG CYREG_B1_UDB05_06_CTL\r
-#define SDCard_BSPIM_BitCounter__16BIT_MASK_MASK_REG CYREG_B1_UDB05_06_MSK\r
-#define SDCard_BSPIM_BitCounter__16BIT_MASK_PERIOD_REG CYREG_B1_UDB05_06_MSK\r
-#define SDCard_BSPIM_BitCounter__16BIT_PERIOD_MASK_REG CYREG_B1_UDB05_06_MSK\r
-#define SDCard_BSPIM_BitCounter__16BIT_PERIOD_PERIOD_REG CYREG_B1_UDB05_06_MSK\r
-#define SDCard_BSPIM_BitCounter__CONTROL_AUX_CTL_REG CYREG_B1_UDB05_ACTL\r
-#define SDCard_BSPIM_BitCounter__CONTROL_REG CYREG_B1_UDB05_CTL\r
-#define SDCard_BSPIM_BitCounter__CONTROL_ST_REG CYREG_B1_UDB05_ST_CTL\r
-#define SDCard_BSPIM_BitCounter__COUNT_REG CYREG_B1_UDB05_CTL\r
-#define SDCard_BSPIM_BitCounter__COUNT_ST_REG CYREG_B1_UDB05_ST_CTL\r
-#define SDCard_BSPIM_BitCounter__MASK_CTL_AUX_CTL_REG CYREG_B1_UDB05_MSK_ACTL\r
-#define SDCard_BSPIM_BitCounter__PER_CTL_AUX_CTL_REG CYREG_B1_UDB05_MSK_ACTL\r
-#define SDCard_BSPIM_BitCounter__PERIOD_REG CYREG_B1_UDB05_MSK\r
-#define SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_AUX_CTL_REG CYREG_B1_UDB05_06_ACTL\r
-#define SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_REG CYREG_B1_UDB05_06_ST\r
-#define SDCard_BSPIM_BitCounter_ST__MASK_REG CYREG_B1_UDB05_MSK\r
-#define SDCard_BSPIM_BitCounter_ST__MASK_ST_AUX_CTL_REG CYREG_B1_UDB05_MSK_ACTL\r
-#define SDCard_BSPIM_BitCounter_ST__PER_ST_AUX_CTL_REG CYREG_B1_UDB05_MSK_ACTL\r
-#define SDCard_BSPIM_BitCounter_ST__STATUS_AUX_CTL_REG CYREG_B1_UDB05_ACTL\r
-#define SDCard_BSPIM_BitCounter_ST__STATUS_CNT_REG CYREG_B1_UDB05_ST_CTL\r
-#define SDCard_BSPIM_BitCounter_ST__STATUS_CONTROL_REG CYREG_B1_UDB05_ST_CTL\r
-#define SDCard_BSPIM_BitCounter_ST__STATUS_REG CYREG_B1_UDB05_ST\r
-#define SDCard_BSPIM_RxStsReg__16BIT_STATUS_AUX_CTL_REG CYREG_B1_UDB07_08_ACTL\r
-#define SDCard_BSPIM_RxStsReg__16BIT_STATUS_REG CYREG_B1_UDB07_08_ST\r
-#define SDCard_BSPIM_RxStsReg__4__MASK 0x10u\r
-#define SDCard_BSPIM_RxStsReg__4__POS 4\r
-#define SDCard_BSPIM_RxStsReg__5__MASK 0x20u\r
-#define SDCard_BSPIM_RxStsReg__5__POS 5\r
-#define SDCard_BSPIM_RxStsReg__6__MASK 0x40u\r
-#define SDCard_BSPIM_RxStsReg__6__POS 6\r
-#define SDCard_BSPIM_RxStsReg__MASK 0x70u\r
-#define SDCard_BSPIM_RxStsReg__MASK_REG CYREG_B1_UDB07_MSK\r
-#define SDCard_BSPIM_RxStsReg__STATUS_AUX_CTL_REG CYREG_B1_UDB07_ACTL\r
-#define SDCard_BSPIM_RxStsReg__STATUS_REG CYREG_B1_UDB07_ST\r
-#define SDCard_BSPIM_sR8_Dp_u0__16BIT_A0_REG CYREG_B1_UDB04_05_A0\r
-#define SDCard_BSPIM_sR8_Dp_u0__16BIT_A1_REG CYREG_B1_UDB04_05_A1\r
-#define SDCard_BSPIM_sR8_Dp_u0__16BIT_D0_REG CYREG_B1_UDB04_05_D0\r
-#define SDCard_BSPIM_sR8_Dp_u0__16BIT_D1_REG CYREG_B1_UDB04_05_D1\r
-#define SDCard_BSPIM_sR8_Dp_u0__16BIT_DP_AUX_CTL_REG CYREG_B1_UDB04_05_ACTL\r
-#define SDCard_BSPIM_sR8_Dp_u0__16BIT_F0_REG CYREG_B1_UDB04_05_F0\r
-#define SDCard_BSPIM_sR8_Dp_u0__16BIT_F1_REG CYREG_B1_UDB04_05_F1\r
-#define SDCard_BSPIM_sR8_Dp_u0__A0_A1_REG CYREG_B1_UDB04_A0_A1\r
-#define SDCard_BSPIM_sR8_Dp_u0__A0_REG CYREG_B1_UDB04_A0\r
-#define SDCard_BSPIM_sR8_Dp_u0__A1_REG CYREG_B1_UDB04_A1\r
-#define SDCard_BSPIM_sR8_Dp_u0__D0_D1_REG CYREG_B1_UDB04_D0_D1\r
-#define SDCard_BSPIM_sR8_Dp_u0__D0_REG CYREG_B1_UDB04_D0\r
-#define SDCard_BSPIM_sR8_Dp_u0__D1_REG CYREG_B1_UDB04_D1\r
-#define SDCard_BSPIM_sR8_Dp_u0__DP_AUX_CTL_REG CYREG_B1_UDB04_ACTL\r
-#define SDCard_BSPIM_sR8_Dp_u0__F0_F1_REG CYREG_B1_UDB04_F0_F1\r
-#define SDCard_BSPIM_sR8_Dp_u0__F0_REG CYREG_B1_UDB04_F0\r
-#define SDCard_BSPIM_sR8_Dp_u0__F1_REG CYREG_B1_UDB04_F1\r
-#define SDCard_BSPIM_TxStsReg__0__MASK 0x01u\r
-#define SDCard_BSPIM_TxStsReg__0__POS 0\r
-#define SDCard_BSPIM_TxStsReg__1__MASK 0x02u\r
-#define SDCard_BSPIM_TxStsReg__1__POS 1\r
-#define SDCard_BSPIM_TxStsReg__16BIT_STATUS_AUX_CTL_REG CYREG_B1_UDB06_07_ACTL\r
-#define SDCard_BSPIM_TxStsReg__16BIT_STATUS_REG CYREG_B1_UDB06_07_ST\r
-#define SDCard_BSPIM_TxStsReg__2__MASK 0x04u\r
-#define SDCard_BSPIM_TxStsReg__2__POS 2\r
-#define SDCard_BSPIM_TxStsReg__3__MASK 0x08u\r
-#define SDCard_BSPIM_TxStsReg__3__POS 3\r
-#define SDCard_BSPIM_TxStsReg__4__MASK 0x10u\r
-#define SDCard_BSPIM_TxStsReg__4__POS 4\r
-#define SDCard_BSPIM_TxStsReg__MASK 0x1Fu\r
-#define SDCard_BSPIM_TxStsReg__MASK_REG CYREG_B1_UDB06_MSK\r
-#define SDCard_BSPIM_TxStsReg__STATUS_AUX_CTL_REG CYREG_B1_UDB06_ACTL\r
-#define SDCard_BSPIM_TxStsReg__STATUS_REG CYREG_B1_UDB06_ST\r
-\r
-/* SD_CD */\r
-#define SD_CD__0__INTTYPE CYREG_PICU3_INTTYPE5\r
-#define SD_CD__0__MASK 0x20u\r
-#define SD_CD__0__PC CYREG_PRT3_PC5\r
-#define SD_CD__0__PORT 3u\r
-#define SD_CD__0__SHIFT 5u\r
-#define SD_CD__AG CYREG_PRT3_AG\r
-#define SD_CD__AMUX CYREG_PRT3_AMUX\r
-#define SD_CD__BIE CYREG_PRT3_BIE\r
-#define SD_CD__BIT_MASK CYREG_PRT3_BIT_MASK\r
-#define SD_CD__BYP CYREG_PRT3_BYP\r
-#define SD_CD__CTL CYREG_PRT3_CTL\r
-#define SD_CD__DM0 CYREG_PRT3_DM0\r
-#define SD_CD__DM1 CYREG_PRT3_DM1\r
-#define SD_CD__DM2 CYREG_PRT3_DM2\r
-#define SD_CD__DR CYREG_PRT3_DR\r
-#define SD_CD__INP_DIS CYREG_PRT3_INP_DIS\r
-#define SD_CD__INTTYPE_BASE CYDEV_PICU_INTTYPE_PICU3_BASE\r
-#define SD_CD__LCD_COM_SEG CYREG_PRT3_LCD_COM_SEG\r
-#define SD_CD__LCD_EN CYREG_PRT3_LCD_EN\r
-#define SD_CD__MASK 0x20u\r
-#define SD_CD__PORT 3u\r
-#define SD_CD__PRT CYREG_PRT3_PRT\r
-#define SD_CD__PRTDSI__CAPS_SEL CYREG_PRT3_CAPS_SEL\r
-#define SD_CD__PRTDSI__DBL_SYNC_IN CYREG_PRT3_DBL_SYNC_IN\r
-#define SD_CD__PRTDSI__OE_SEL0 CYREG_PRT3_OE_SEL0\r
-#define SD_CD__PRTDSI__OE_SEL1 CYREG_PRT3_OE_SEL1\r
-#define SD_CD__PRTDSI__OUT_SEL0 CYREG_PRT3_OUT_SEL0\r
-#define SD_CD__PRTDSI__OUT_SEL1 CYREG_PRT3_OUT_SEL1\r
-#define SD_CD__PRTDSI__SYNC_OUT CYREG_PRT3_SYNC_OUT\r
-#define SD_CD__PS CYREG_PRT3_PS\r
-#define SD_CD__SHIFT 5u\r
-#define SD_CD__SLW CYREG_PRT3_SLW\r
-\r
-/* SD_CS */\r
-#define SD_CS__0__INTTYPE CYREG_PICU3_INTTYPE4\r
-#define SD_CS__0__MASK 0x10u\r
-#define SD_CS__0__PC CYREG_PRT3_PC4\r
-#define SD_CS__0__PORT 3u\r
-#define SD_CS__0__SHIFT 4u\r
-#define SD_CS__AG CYREG_PRT3_AG\r
-#define SD_CS__AMUX CYREG_PRT3_AMUX\r
-#define SD_CS__BIE CYREG_PRT3_BIE\r
-#define SD_CS__BIT_MASK CYREG_PRT3_BIT_MASK\r
-#define SD_CS__BYP CYREG_PRT3_BYP\r
-#define SD_CS__CTL CYREG_PRT3_CTL\r
-#define SD_CS__DM0 CYREG_PRT3_DM0\r
-#define SD_CS__DM1 CYREG_PRT3_DM1\r
-#define SD_CS__DM2 CYREG_PRT3_DM2\r
-#define SD_CS__DR CYREG_PRT3_DR\r
-#define SD_CS__INP_DIS CYREG_PRT3_INP_DIS\r
-#define SD_CS__INTTYPE_BASE CYDEV_PICU_INTTYPE_PICU3_BASE\r
-#define SD_CS__LCD_COM_SEG CYREG_PRT3_LCD_COM_SEG\r
-#define SD_CS__LCD_EN CYREG_PRT3_LCD_EN\r
-#define SD_CS__MASK 0x10u\r
-#define SD_CS__PORT 3u\r
-#define SD_CS__PRT CYREG_PRT3_PRT\r
-#define SD_CS__PRTDSI__CAPS_SEL CYREG_PRT3_CAPS_SEL\r
-#define SD_CS__PRTDSI__DBL_SYNC_IN CYREG_PRT3_DBL_SYNC_IN\r
-#define SD_CS__PRTDSI__OE_SEL0 CYREG_PRT3_OE_SEL0\r
-#define SD_CS__PRTDSI__OE_SEL1 CYREG_PRT3_OE_SEL1\r
-#define SD_CS__PRTDSI__OUT_SEL0 CYREG_PRT3_OUT_SEL0\r
-#define SD_CS__PRTDSI__OUT_SEL1 CYREG_PRT3_OUT_SEL1\r
-#define SD_CS__PRTDSI__SYNC_OUT CYREG_PRT3_SYNC_OUT\r
-#define SD_CS__PS CYREG_PRT3_PS\r
-#define SD_CS__SHIFT 4u\r
-#define SD_CS__SLW CYREG_PRT3_SLW\r
-\r
-/* SD_Data_Clk */\r
-#define SD_Data_Clk__CFG0 CYREG_CLKDIST_DCFG0_CFG0\r
-#define SD_Data_Clk__CFG1 CYREG_CLKDIST_DCFG0_CFG1\r
-#define SD_Data_Clk__CFG2 CYREG_CLKDIST_DCFG0_CFG2\r
-#define SD_Data_Clk__CFG2_SRC_SEL_MASK 0x07u\r
-#define SD_Data_Clk__INDEX 0x00u\r
-#define SD_Data_Clk__PM_ACT_CFG CYREG_PM_ACT_CFG2\r
-#define SD_Data_Clk__PM_ACT_MSK 0x01u\r
-#define SD_Data_Clk__PM_STBY_CFG CYREG_PM_STBY_CFG2\r
-#define SD_Data_Clk__PM_STBY_MSK 0x01u\r
-\r
-/* SD_MISO */\r
-#define SD_MISO__0__INTTYPE CYREG_PICU3_INTTYPE1\r
-#define SD_MISO__0__MASK 0x02u\r
-#define SD_MISO__0__PC CYREG_PRT3_PC1\r
-#define SD_MISO__0__PORT 3u\r
-#define SD_MISO__0__SHIFT 1u\r
-#define SD_MISO__AG CYREG_PRT3_AG\r
-#define SD_MISO__AMUX CYREG_PRT3_AMUX\r
-#define SD_MISO__BIE CYREG_PRT3_BIE\r
-#define SD_MISO__BIT_MASK CYREG_PRT3_BIT_MASK\r
-#define SD_MISO__BYP CYREG_PRT3_BYP\r
-#define SD_MISO__CTL CYREG_PRT3_CTL\r
-#define SD_MISO__DM0 CYREG_PRT3_DM0\r
-#define SD_MISO__DM1 CYREG_PRT3_DM1\r
-#define SD_MISO__DM2 CYREG_PRT3_DM2\r
-#define SD_MISO__DR CYREG_PRT3_DR\r
-#define SD_MISO__INP_DIS CYREG_PRT3_INP_DIS\r
-#define SD_MISO__INTTYPE_BASE CYDEV_PICU_INTTYPE_PICU3_BASE\r
-#define SD_MISO__LCD_COM_SEG CYREG_PRT3_LCD_COM_SEG\r
-#define SD_MISO__LCD_EN CYREG_PRT3_LCD_EN\r
-#define SD_MISO__MASK 0x02u\r
-#define SD_MISO__PORT 3u\r
-#define SD_MISO__PRT CYREG_PRT3_PRT\r
-#define SD_MISO__PRTDSI__CAPS_SEL CYREG_PRT3_CAPS_SEL\r
-#define SD_MISO__PRTDSI__DBL_SYNC_IN CYREG_PRT3_DBL_SYNC_IN\r
-#define SD_MISO__PRTDSI__OE_SEL0 CYREG_PRT3_OE_SEL0\r
-#define SD_MISO__PRTDSI__OE_SEL1 CYREG_PRT3_OE_SEL1\r
-#define SD_MISO__PRTDSI__OUT_SEL0 CYREG_PRT3_OUT_SEL0\r
-#define SD_MISO__PRTDSI__OUT_SEL1 CYREG_PRT3_OUT_SEL1\r
-#define SD_MISO__PRTDSI__SYNC_OUT CYREG_PRT3_SYNC_OUT\r
-#define SD_MISO__PS CYREG_PRT3_PS\r
-#define SD_MISO__SHIFT 1u\r
-#define SD_MISO__SLW CYREG_PRT3_SLW\r
-\r
-/* SD_MOSI */\r
-#define SD_MOSI__0__INTTYPE CYREG_PICU3_INTTYPE3\r
-#define SD_MOSI__0__MASK 0x08u\r
-#define SD_MOSI__0__PC CYREG_PRT3_PC3\r
-#define SD_MOSI__0__PORT 3u\r
-#define SD_MOSI__0__SHIFT 3u\r
-#define SD_MOSI__AG CYREG_PRT3_AG\r
-#define SD_MOSI__AMUX CYREG_PRT3_AMUX\r
-#define SD_MOSI__BIE CYREG_PRT3_BIE\r
-#define SD_MOSI__BIT_MASK CYREG_PRT3_BIT_MASK\r
-#define SD_MOSI__BYP CYREG_PRT3_BYP\r
-#define SD_MOSI__CTL CYREG_PRT3_CTL\r
-#define SD_MOSI__DM0 CYREG_PRT3_DM0\r
-#define SD_MOSI__DM1 CYREG_PRT3_DM1\r
-#define SD_MOSI__DM2 CYREG_PRT3_DM2\r
-#define SD_MOSI__DR CYREG_PRT3_DR\r
-#define SD_MOSI__INP_DIS CYREG_PRT3_INP_DIS\r
-#define SD_MOSI__INTTYPE_BASE CYDEV_PICU_INTTYPE_PICU3_BASE\r
-#define SD_MOSI__LCD_COM_SEG CYREG_PRT3_LCD_COM_SEG\r
-#define SD_MOSI__LCD_EN CYREG_PRT3_LCD_EN\r
-#define SD_MOSI__MASK 0x08u\r
-#define SD_MOSI__PORT 3u\r
-#define SD_MOSI__PRT CYREG_PRT3_PRT\r
-#define SD_MOSI__PRTDSI__CAPS_SEL CYREG_PRT3_CAPS_SEL\r
-#define SD_MOSI__PRTDSI__DBL_SYNC_IN CYREG_PRT3_DBL_SYNC_IN\r
-#define SD_MOSI__PRTDSI__OE_SEL0 CYREG_PRT3_OE_SEL0\r
-#define SD_MOSI__PRTDSI__OE_SEL1 CYREG_PRT3_OE_SEL1\r
-#define SD_MOSI__PRTDSI__OUT_SEL0 CYREG_PRT3_OUT_SEL0\r
-#define SD_MOSI__PRTDSI__OUT_SEL1 CYREG_PRT3_OUT_SEL1\r
-#define SD_MOSI__PRTDSI__SYNC_OUT CYREG_PRT3_SYNC_OUT\r
-#define SD_MOSI__PS CYREG_PRT3_PS\r
-#define SD_MOSI__SHIFT 3u\r
-#define SD_MOSI__SLW CYREG_PRT3_SLW\r
-\r
-/* SD_RX_DMA */\r
-#define SD_RX_DMA__DRQ_CTL CYREG_IDMUX_DRQ_CTL0\r
-#define SD_RX_DMA__DRQ_NUMBER 2u\r
-#define SD_RX_DMA__NUMBEROF_TDS 0u\r
-#define SD_RX_DMA__PRIORITY 0u\r
-#define SD_RX_DMA__TERMIN_EN 0u\r
-#define SD_RX_DMA__TERMIN_SEL 0u\r
-#define SD_RX_DMA__TERMOUT0_EN 1u\r
-#define SD_RX_DMA__TERMOUT0_SEL 2u\r
-#define SD_RX_DMA__TERMOUT1_EN 0u\r
-#define SD_RX_DMA__TERMOUT1_SEL 0u\r
-#define SD_RX_DMA_COMPLETE__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0\r
-#define SD_RX_DMA_COMPLETE__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0\r
-#define SD_RX_DMA_COMPLETE__INTC_MASK 0x20u\r
-#define SD_RX_DMA_COMPLETE__INTC_NUMBER 5u\r
-#define SD_RX_DMA_COMPLETE__INTC_PRIOR_NUM 7u\r
-#define SD_RX_DMA_COMPLETE__INTC_PRIOR_REG CYREG_NVIC_PRI_5\r
-#define SD_RX_DMA_COMPLETE__INTC_SET_EN_REG CYREG_NVIC_SETENA0\r
-#define SD_RX_DMA_COMPLETE__INTC_SET_PD_REG CYREG_NVIC_SETPEND0\r
-\r
-/* SD_SCK */\r
-#define SD_SCK__0__INTTYPE CYREG_PICU3_INTTYPE2\r
-#define SD_SCK__0__MASK 0x04u\r
-#define SD_SCK__0__PC CYREG_PRT3_PC2\r
-#define SD_SCK__0__PORT 3u\r
-#define SD_SCK__0__SHIFT 2u\r
-#define SD_SCK__AG CYREG_PRT3_AG\r
-#define SD_SCK__AMUX CYREG_PRT3_AMUX\r
-#define SD_SCK__BIE CYREG_PRT3_BIE\r
-#define SD_SCK__BIT_MASK CYREG_PRT3_BIT_MASK\r
-#define SD_SCK__BYP CYREG_PRT3_BYP\r
-#define SD_SCK__CTL CYREG_PRT3_CTL\r
-#define SD_SCK__DM0 CYREG_PRT3_DM0\r
-#define SD_SCK__DM1 CYREG_PRT3_DM1\r
-#define SD_SCK__DM2 CYREG_PRT3_DM2\r
-#define SD_SCK__DR CYREG_PRT3_DR\r
-#define SD_SCK__INP_DIS CYREG_PRT3_INP_DIS\r
-#define SD_SCK__INTTYPE_BASE CYDEV_PICU_INTTYPE_PICU3_BASE\r
-#define SD_SCK__LCD_COM_SEG CYREG_PRT3_LCD_COM_SEG\r
-#define SD_SCK__LCD_EN CYREG_PRT3_LCD_EN\r
-#define SD_SCK__MASK 0x04u\r
-#define SD_SCK__PORT 3u\r
-#define SD_SCK__PRT CYREG_PRT3_PRT\r
-#define SD_SCK__PRTDSI__CAPS_SEL CYREG_PRT3_CAPS_SEL\r
-#define SD_SCK__PRTDSI__DBL_SYNC_IN CYREG_PRT3_DBL_SYNC_IN\r
-#define SD_SCK__PRTDSI__OE_SEL0 CYREG_PRT3_OE_SEL0\r
-#define SD_SCK__PRTDSI__OE_SEL1 CYREG_PRT3_OE_SEL1\r
-#define SD_SCK__PRTDSI__OUT_SEL0 CYREG_PRT3_OUT_SEL0\r
-#define SD_SCK__PRTDSI__OUT_SEL1 CYREG_PRT3_OUT_SEL1\r
-#define SD_SCK__PRTDSI__SYNC_OUT CYREG_PRT3_SYNC_OUT\r
-#define SD_SCK__PS CYREG_PRT3_PS\r
-#define SD_SCK__SHIFT 2u\r
-#define SD_SCK__SLW CYREG_PRT3_SLW\r
-\r
-/* SD_TX_DMA */\r
-#define SD_TX_DMA__DRQ_CTL CYREG_IDMUX_DRQ_CTL0\r
-#define SD_TX_DMA__DRQ_NUMBER 3u\r
-#define SD_TX_DMA__NUMBEROF_TDS 0u\r
-#define SD_TX_DMA__PRIORITY 1u\r
-#define SD_TX_DMA__TERMIN_EN 0u\r
-#define SD_TX_DMA__TERMIN_SEL 0u\r
-#define SD_TX_DMA__TERMOUT0_EN 1u\r
-#define SD_TX_DMA__TERMOUT0_SEL 3u\r
-#define SD_TX_DMA__TERMOUT1_EN 0u\r
-#define SD_TX_DMA__TERMOUT1_SEL 0u\r
-#define SD_TX_DMA_COMPLETE__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0\r
-#define SD_TX_DMA_COMPLETE__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0\r
-#define SD_TX_DMA_COMPLETE__INTC_MASK 0x40u\r
-#define SD_TX_DMA_COMPLETE__INTC_NUMBER 6u\r
-#define SD_TX_DMA_COMPLETE__INTC_PRIOR_NUM 7u\r
-#define SD_TX_DMA_COMPLETE__INTC_PRIOR_REG CYREG_NVIC_PRI_6\r
-#define SD_TX_DMA_COMPLETE__INTC_SET_EN_REG CYREG_NVIC_SETENA0\r
-#define SD_TX_DMA_COMPLETE__INTC_SET_PD_REG CYREG_NVIC_SETPEND0\r
+/* SD_CS */\r
+#define SD_CS__0__INTTYPE CYREG_PICU3_INTTYPE4\r
+#define SD_CS__0__MASK 0x10u\r
+#define SD_CS__0__PC CYREG_PRT3_PC4\r
+#define SD_CS__0__PORT 3u\r
+#define SD_CS__0__SHIFT 4u\r
+#define SD_CS__AG CYREG_PRT3_AG\r
+#define SD_CS__AMUX CYREG_PRT3_AMUX\r
+#define SD_CS__BIE CYREG_PRT3_BIE\r
+#define SD_CS__BIT_MASK CYREG_PRT3_BIT_MASK\r
+#define SD_CS__BYP CYREG_PRT3_BYP\r
+#define SD_CS__CTL CYREG_PRT3_CTL\r
+#define SD_CS__DM0 CYREG_PRT3_DM0\r
+#define SD_CS__DM1 CYREG_PRT3_DM1\r
+#define SD_CS__DM2 CYREG_PRT3_DM2\r
+#define SD_CS__DR CYREG_PRT3_DR\r
+#define SD_CS__INP_DIS CYREG_PRT3_INP_DIS\r
+#define SD_CS__INTTYPE_BASE CYDEV_PICU_INTTYPE_PICU3_BASE\r
+#define SD_CS__LCD_COM_SEG CYREG_PRT3_LCD_COM_SEG\r
+#define SD_CS__LCD_EN CYREG_PRT3_LCD_EN\r
+#define SD_CS__MASK 0x10u\r
+#define SD_CS__PORT 3u\r
+#define SD_CS__PRT CYREG_PRT3_PRT\r
+#define SD_CS__PRTDSI__CAPS_SEL CYREG_PRT3_CAPS_SEL\r
+#define SD_CS__PRTDSI__DBL_SYNC_IN CYREG_PRT3_DBL_SYNC_IN\r
+#define SD_CS__PRTDSI__OE_SEL0 CYREG_PRT3_OE_SEL0\r
+#define SD_CS__PRTDSI__OE_SEL1 CYREG_PRT3_OE_SEL1\r
+#define SD_CS__PRTDSI__OUT_SEL0 CYREG_PRT3_OUT_SEL0\r
+#define SD_CS__PRTDSI__OUT_SEL1 CYREG_PRT3_OUT_SEL1\r
+#define SD_CS__PRTDSI__SYNC_OUT CYREG_PRT3_SYNC_OUT\r
+#define SD_CS__PS CYREG_PRT3_PS\r
+#define SD_CS__SHIFT 4u\r
+#define SD_CS__SLW CYREG_PRT3_SLW\r
\r
/* USBFS */\r
#define USBFS_arb_int__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0\r
#define USBFS_USB__USBIO_CR0 CYREG_USB_USBIO_CR0\r
#define USBFS_USB__USBIO_CR1 CYREG_USB_USBIO_CR1\r
\r
+/* EXTLED */\r
+#define EXTLED__0__INTTYPE CYREG_PICU0_INTTYPE0\r
+#define EXTLED__0__MASK 0x01u\r
+#define EXTLED__0__PC CYREG_PRT0_PC0\r
+#define EXTLED__0__PORT 0u\r
+#define EXTLED__0__SHIFT 0u\r
+#define EXTLED__AG CYREG_PRT0_AG\r
+#define EXTLED__AMUX CYREG_PRT0_AMUX\r
+#define EXTLED__BIE CYREG_PRT0_BIE\r
+#define EXTLED__BIT_MASK CYREG_PRT0_BIT_MASK\r
+#define EXTLED__BYP CYREG_PRT0_BYP\r
+#define EXTLED__CTL CYREG_PRT0_CTL\r
+#define EXTLED__DM0 CYREG_PRT0_DM0\r
+#define EXTLED__DM1 CYREG_PRT0_DM1\r
+#define EXTLED__DM2 CYREG_PRT0_DM2\r
+#define EXTLED__DR CYREG_PRT0_DR\r
+#define EXTLED__INP_DIS CYREG_PRT0_INP_DIS\r
+#define EXTLED__INTTYPE_BASE CYDEV_PICU_INTTYPE_PICU0_BASE\r
+#define EXTLED__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
+#define EXTLED__LCD_EN CYREG_PRT0_LCD_EN\r
+#define EXTLED__MASK 0x01u\r
+#define EXTLED__PORT 0u\r
+#define EXTLED__PRT CYREG_PRT0_PRT\r
+#define EXTLED__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
+#define EXTLED__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
+#define EXTLED__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
+#define EXTLED__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
+#define EXTLED__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
+#define EXTLED__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
+#define EXTLED__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
+#define EXTLED__PS CYREG_PRT0_PS\r
+#define EXTLED__SHIFT 0u\r
+#define EXTLED__SLW CYREG_PRT0_SLW\r
+\r
+/* SDCard */\r
+#define SDCard_BSPIM_BitCounter__16BIT_CONTROL_AUX_CTL_REG CYREG_B1_UDB07_08_ACTL\r
+#define SDCard_BSPIM_BitCounter__16BIT_CONTROL_CONTROL_REG CYREG_B1_UDB07_08_CTL\r
+#define SDCard_BSPIM_BitCounter__16BIT_CONTROL_COUNT_REG CYREG_B1_UDB07_08_CTL\r
+#define SDCard_BSPIM_BitCounter__16BIT_COUNT_CONTROL_REG CYREG_B1_UDB07_08_CTL\r
+#define SDCard_BSPIM_BitCounter__16BIT_COUNT_COUNT_REG CYREG_B1_UDB07_08_CTL\r
+#define SDCard_BSPIM_BitCounter__16BIT_MASK_MASK_REG CYREG_B1_UDB07_08_MSK\r
+#define SDCard_BSPIM_BitCounter__16BIT_MASK_PERIOD_REG CYREG_B1_UDB07_08_MSK\r
+#define SDCard_BSPIM_BitCounter__16BIT_PERIOD_MASK_REG CYREG_B1_UDB07_08_MSK\r
+#define SDCard_BSPIM_BitCounter__16BIT_PERIOD_PERIOD_REG CYREG_B1_UDB07_08_MSK\r
+#define SDCard_BSPIM_BitCounter__CONTROL_AUX_CTL_REG CYREG_B1_UDB07_ACTL\r
+#define SDCard_BSPIM_BitCounter__CONTROL_REG CYREG_B1_UDB07_CTL\r
+#define SDCard_BSPIM_BitCounter__CONTROL_ST_REG CYREG_B1_UDB07_ST_CTL\r
+#define SDCard_BSPIM_BitCounter__COUNT_REG CYREG_B1_UDB07_CTL\r
+#define SDCard_BSPIM_BitCounter__COUNT_ST_REG CYREG_B1_UDB07_ST_CTL\r
+#define SDCard_BSPIM_BitCounter__MASK_CTL_AUX_CTL_REG CYREG_B1_UDB07_MSK_ACTL\r
+#define SDCard_BSPIM_BitCounter__PER_CTL_AUX_CTL_REG CYREG_B1_UDB07_MSK_ACTL\r
+#define SDCard_BSPIM_BitCounter__PERIOD_REG CYREG_B1_UDB07_MSK\r
+#define SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_AUX_CTL_REG CYREG_B1_UDB07_08_ACTL\r
+#define SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_REG CYREG_B1_UDB07_08_ST\r
+#define SDCard_BSPIM_BitCounter_ST__MASK_REG CYREG_B1_UDB07_MSK\r
+#define SDCard_BSPIM_BitCounter_ST__MASK_ST_AUX_CTL_REG CYREG_B1_UDB07_MSK_ACTL\r
+#define SDCard_BSPIM_BitCounter_ST__PER_ST_AUX_CTL_REG CYREG_B1_UDB07_MSK_ACTL\r
+#define SDCard_BSPIM_BitCounter_ST__STATUS_AUX_CTL_REG CYREG_B1_UDB07_ACTL\r
+#define SDCard_BSPIM_BitCounter_ST__STATUS_CNT_REG CYREG_B1_UDB07_ST_CTL\r
+#define SDCard_BSPIM_BitCounter_ST__STATUS_CONTROL_REG CYREG_B1_UDB07_ST_CTL\r
+#define SDCard_BSPIM_BitCounter_ST__STATUS_REG CYREG_B1_UDB07_ST\r
+#define SDCard_BSPIM_RxStsReg__16BIT_STATUS_AUX_CTL_REG CYREG_B1_UDB04_05_ACTL\r
+#define SDCard_BSPIM_RxStsReg__16BIT_STATUS_REG CYREG_B1_UDB04_05_ST\r
+#define SDCard_BSPIM_RxStsReg__4__MASK 0x10u\r
+#define SDCard_BSPIM_RxStsReg__4__POS 4\r
+#define SDCard_BSPIM_RxStsReg__5__MASK 0x20u\r
+#define SDCard_BSPIM_RxStsReg__5__POS 5\r
+#define SDCard_BSPIM_RxStsReg__6__MASK 0x40u\r
+#define SDCard_BSPIM_RxStsReg__6__POS 6\r
+#define SDCard_BSPIM_RxStsReg__MASK 0x70u\r
+#define SDCard_BSPIM_RxStsReg__MASK_REG CYREG_B1_UDB04_MSK\r
+#define SDCard_BSPIM_RxStsReg__STATUS_AUX_CTL_REG CYREG_B1_UDB04_ACTL\r
+#define SDCard_BSPIM_RxStsReg__STATUS_REG CYREG_B1_UDB04_ST\r
+#define SDCard_BSPIM_sR8_Dp_u0__16BIT_A0_REG CYREG_B1_UDB04_05_A0\r
+#define SDCard_BSPIM_sR8_Dp_u0__16BIT_A1_REG CYREG_B1_UDB04_05_A1\r
+#define SDCard_BSPIM_sR8_Dp_u0__16BIT_D0_REG CYREG_B1_UDB04_05_D0\r
+#define SDCard_BSPIM_sR8_Dp_u0__16BIT_D1_REG CYREG_B1_UDB04_05_D1\r
+#define SDCard_BSPIM_sR8_Dp_u0__16BIT_DP_AUX_CTL_REG CYREG_B1_UDB04_05_ACTL\r
+#define SDCard_BSPIM_sR8_Dp_u0__16BIT_F0_REG CYREG_B1_UDB04_05_F0\r
+#define SDCard_BSPIM_sR8_Dp_u0__16BIT_F1_REG CYREG_B1_UDB04_05_F1\r
+#define SDCard_BSPIM_sR8_Dp_u0__A0_A1_REG CYREG_B1_UDB04_A0_A1\r
+#define SDCard_BSPIM_sR8_Dp_u0__A0_REG CYREG_B1_UDB04_A0\r
+#define SDCard_BSPIM_sR8_Dp_u0__A1_REG CYREG_B1_UDB04_A1\r
+#define SDCard_BSPIM_sR8_Dp_u0__D0_D1_REG CYREG_B1_UDB04_D0_D1\r
+#define SDCard_BSPIM_sR8_Dp_u0__D0_REG CYREG_B1_UDB04_D0\r
+#define SDCard_BSPIM_sR8_Dp_u0__D1_REG CYREG_B1_UDB04_D1\r
+#define SDCard_BSPIM_sR8_Dp_u0__DP_AUX_CTL_REG CYREG_B1_UDB04_ACTL\r
+#define SDCard_BSPIM_sR8_Dp_u0__F0_F1_REG CYREG_B1_UDB04_F0_F1\r
+#define SDCard_BSPIM_sR8_Dp_u0__F0_REG CYREG_B1_UDB04_F0\r
+#define SDCard_BSPIM_sR8_Dp_u0__F1_REG CYREG_B1_UDB04_F1\r
+#define SDCard_BSPIM_TxStsReg__0__MASK 0x01u\r
+#define SDCard_BSPIM_TxStsReg__0__POS 0\r
+#define SDCard_BSPIM_TxStsReg__1__MASK 0x02u\r
+#define SDCard_BSPIM_TxStsReg__1__POS 1\r
+#define SDCard_BSPIM_TxStsReg__16BIT_STATUS_AUX_CTL_REG CYREG_B1_UDB06_07_ACTL\r
+#define SDCard_BSPIM_TxStsReg__16BIT_STATUS_REG CYREG_B1_UDB06_07_ST\r
+#define SDCard_BSPIM_TxStsReg__2__MASK 0x04u\r
+#define SDCard_BSPIM_TxStsReg__2__POS 2\r
+#define SDCard_BSPIM_TxStsReg__3__MASK 0x08u\r
+#define SDCard_BSPIM_TxStsReg__3__POS 3\r
+#define SDCard_BSPIM_TxStsReg__4__MASK 0x10u\r
+#define SDCard_BSPIM_TxStsReg__4__POS 4\r
+#define SDCard_BSPIM_TxStsReg__MASK 0x1Fu\r
+#define SDCard_BSPIM_TxStsReg__MASK_REG CYREG_B1_UDB06_MSK\r
+#define SDCard_BSPIM_TxStsReg__STATUS_AUX_CTL_REG CYREG_B1_UDB06_ACTL\r
+#define SDCard_BSPIM_TxStsReg__STATUS_REG CYREG_B1_UDB06_ST\r
+\r
+/* SD_SCK */\r
+#define SD_SCK__0__INTTYPE CYREG_PICU3_INTTYPE2\r
+#define SD_SCK__0__MASK 0x04u\r
+#define SD_SCK__0__PC CYREG_PRT3_PC2\r
+#define SD_SCK__0__PORT 3u\r
+#define SD_SCK__0__SHIFT 2u\r
+#define SD_SCK__AG CYREG_PRT3_AG\r
+#define SD_SCK__AMUX CYREG_PRT3_AMUX\r
+#define SD_SCK__BIE CYREG_PRT3_BIE\r
+#define SD_SCK__BIT_MASK CYREG_PRT3_BIT_MASK\r
+#define SD_SCK__BYP CYREG_PRT3_BYP\r
+#define SD_SCK__CTL CYREG_PRT3_CTL\r
+#define SD_SCK__DM0 CYREG_PRT3_DM0\r
+#define SD_SCK__DM1 CYREG_PRT3_DM1\r
+#define SD_SCK__DM2 CYREG_PRT3_DM2\r
+#define SD_SCK__DR CYREG_PRT3_DR\r
+#define SD_SCK__INP_DIS CYREG_PRT3_INP_DIS\r
+#define SD_SCK__INTTYPE_BASE CYDEV_PICU_INTTYPE_PICU3_BASE\r
+#define SD_SCK__LCD_COM_SEG CYREG_PRT3_LCD_COM_SEG\r
+#define SD_SCK__LCD_EN CYREG_PRT3_LCD_EN\r
+#define SD_SCK__MASK 0x04u\r
+#define SD_SCK__PORT 3u\r
+#define SD_SCK__PRT CYREG_PRT3_PRT\r
+#define SD_SCK__PRTDSI__CAPS_SEL CYREG_PRT3_CAPS_SEL\r
+#define SD_SCK__PRTDSI__DBL_SYNC_IN CYREG_PRT3_DBL_SYNC_IN\r
+#define SD_SCK__PRTDSI__OE_SEL0 CYREG_PRT3_OE_SEL0\r
+#define SD_SCK__PRTDSI__OE_SEL1 CYREG_PRT3_OE_SEL1\r
+#define SD_SCK__PRTDSI__OUT_SEL0 CYREG_PRT3_OUT_SEL0\r
+#define SD_SCK__PRTDSI__OUT_SEL1 CYREG_PRT3_OUT_SEL1\r
+#define SD_SCK__PRTDSI__SYNC_OUT CYREG_PRT3_SYNC_OUT\r
+#define SD_SCK__PS CYREG_PRT3_PS\r
+#define SD_SCK__SHIFT 2u\r
+#define SD_SCK__SLW CYREG_PRT3_SLW\r
+\r
+/* SCSI_In */\r
+#define SCSI_In__0__AG CYREG_PRT2_AG\r
+#define SCSI_In__0__AMUX CYREG_PRT2_AMUX\r
+#define SCSI_In__0__BIE CYREG_PRT2_BIE\r
+#define SCSI_In__0__BIT_MASK CYREG_PRT2_BIT_MASK\r
+#define SCSI_In__0__BYP CYREG_PRT2_BYP\r
+#define SCSI_In__0__CTL CYREG_PRT2_CTL\r
+#define SCSI_In__0__DM0 CYREG_PRT2_DM0\r
+#define SCSI_In__0__DM1 CYREG_PRT2_DM1\r
+#define SCSI_In__0__DM2 CYREG_PRT2_DM2\r
+#define SCSI_In__0__DR CYREG_PRT2_DR\r
+#define SCSI_In__0__INP_DIS CYREG_PRT2_INP_DIS\r
+#define SCSI_In__0__INTTYPE CYREG_PICU2_INTTYPE1\r
+#define SCSI_In__0__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG\r
+#define SCSI_In__0__LCD_EN CYREG_PRT2_LCD_EN\r
+#define SCSI_In__0__MASK 0x02u\r
+#define SCSI_In__0__PC CYREG_PRT2_PC1\r
+#define SCSI_In__0__PORT 2u\r
+#define SCSI_In__0__PRT CYREG_PRT2_PRT\r
+#define SCSI_In__0__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL\r
+#define SCSI_In__0__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN\r
+#define SCSI_In__0__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0\r
+#define SCSI_In__0__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1\r
+#define SCSI_In__0__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0\r
+#define SCSI_In__0__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1\r
+#define SCSI_In__0__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT\r
+#define SCSI_In__0__PS CYREG_PRT2_PS\r
+#define SCSI_In__0__SHIFT 1u\r
+#define SCSI_In__0__SLW CYREG_PRT2_SLW\r
+#define SCSI_In__1__AG CYREG_PRT4_AG\r
+#define SCSI_In__1__AMUX CYREG_PRT4_AMUX\r
+#define SCSI_In__1__BIE CYREG_PRT4_BIE\r
+#define SCSI_In__1__BIT_MASK CYREG_PRT4_BIT_MASK\r
+#define SCSI_In__1__BYP CYREG_PRT4_BYP\r
+#define SCSI_In__1__CTL CYREG_PRT4_CTL\r
+#define SCSI_In__1__DM0 CYREG_PRT4_DM0\r
+#define SCSI_In__1__DM1 CYREG_PRT4_DM1\r
+#define SCSI_In__1__DM2 CYREG_PRT4_DM2\r
+#define SCSI_In__1__DR CYREG_PRT4_DR\r
+#define SCSI_In__1__INP_DIS CYREG_PRT4_INP_DIS\r
+#define SCSI_In__1__INTTYPE CYREG_PICU4_INTTYPE6\r
+#define SCSI_In__1__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG\r
+#define SCSI_In__1__LCD_EN CYREG_PRT4_LCD_EN\r
+#define SCSI_In__1__MASK 0x40u\r
+#define SCSI_In__1__PC CYREG_PRT4_PC6\r
+#define SCSI_In__1__PORT 4u\r
+#define SCSI_In__1__PRT CYREG_PRT4_PRT\r
+#define SCSI_In__1__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL\r
+#define SCSI_In__1__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN\r
+#define SCSI_In__1__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0\r
+#define SCSI_In__1__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1\r
+#define SCSI_In__1__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0\r
+#define SCSI_In__1__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1\r
+#define SCSI_In__1__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT\r
+#define SCSI_In__1__PS CYREG_PRT4_PS\r
+#define SCSI_In__1__SHIFT 6u\r
+#define SCSI_In__1__SLW CYREG_PRT4_SLW\r
+#define SCSI_In__2__AG CYREG_PRT4_AG\r
+#define SCSI_In__2__AMUX CYREG_PRT4_AMUX\r
+#define SCSI_In__2__BIE CYREG_PRT4_BIE\r
+#define SCSI_In__2__BIT_MASK CYREG_PRT4_BIT_MASK\r
+#define SCSI_In__2__BYP CYREG_PRT4_BYP\r
+#define SCSI_In__2__CTL CYREG_PRT4_CTL\r
+#define SCSI_In__2__DM0 CYREG_PRT4_DM0\r
+#define SCSI_In__2__DM1 CYREG_PRT4_DM1\r
+#define SCSI_In__2__DM2 CYREG_PRT4_DM2\r
+#define SCSI_In__2__DR CYREG_PRT4_DR\r
+#define SCSI_In__2__INP_DIS CYREG_PRT4_INP_DIS\r
+#define SCSI_In__2__INTTYPE CYREG_PICU4_INTTYPE2\r
+#define SCSI_In__2__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG\r
+#define SCSI_In__2__LCD_EN CYREG_PRT4_LCD_EN\r
+#define SCSI_In__2__MASK 0x04u\r
+#define SCSI_In__2__PC CYREG_PRT4_PC2\r
+#define SCSI_In__2__PORT 4u\r
+#define SCSI_In__2__PRT CYREG_PRT4_PRT\r
+#define SCSI_In__2__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL\r
+#define SCSI_In__2__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN\r
+#define SCSI_In__2__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0\r
+#define SCSI_In__2__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1\r
+#define SCSI_In__2__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0\r
+#define SCSI_In__2__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1\r
+#define SCSI_In__2__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT\r
+#define SCSI_In__2__PS CYREG_PRT4_PS\r
+#define SCSI_In__2__SHIFT 2u\r
+#define SCSI_In__2__SLW CYREG_PRT4_SLW\r
+#define SCSI_In__3__AG CYREG_PRT0_AG\r
+#define SCSI_In__3__AMUX CYREG_PRT0_AMUX\r
+#define SCSI_In__3__BIE CYREG_PRT0_BIE\r
+#define SCSI_In__3__BIT_MASK CYREG_PRT0_BIT_MASK\r
+#define SCSI_In__3__BYP CYREG_PRT0_BYP\r
+#define SCSI_In__3__CTL CYREG_PRT0_CTL\r
+#define SCSI_In__3__DM0 CYREG_PRT0_DM0\r
+#define SCSI_In__3__DM1 CYREG_PRT0_DM1\r
+#define SCSI_In__3__DM2 CYREG_PRT0_DM2\r
+#define SCSI_In__3__DR CYREG_PRT0_DR\r
+#define SCSI_In__3__INP_DIS CYREG_PRT0_INP_DIS\r
+#define SCSI_In__3__INTTYPE CYREG_PICU0_INTTYPE5\r
+#define SCSI_In__3__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
+#define SCSI_In__3__LCD_EN CYREG_PRT0_LCD_EN\r
+#define SCSI_In__3__MASK 0x20u\r
+#define SCSI_In__3__PC CYREG_PRT0_PC5\r
+#define SCSI_In__3__PORT 0u\r
+#define SCSI_In__3__PRT CYREG_PRT0_PRT\r
+#define SCSI_In__3__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
+#define SCSI_In__3__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
+#define SCSI_In__3__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
+#define SCSI_In__3__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
+#define SCSI_In__3__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
+#define SCSI_In__3__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
+#define SCSI_In__3__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
+#define SCSI_In__3__PS CYREG_PRT0_PS\r
+#define SCSI_In__3__SHIFT 5u\r
+#define SCSI_In__3__SLW CYREG_PRT0_SLW\r
+#define SCSI_In__4__AG CYREG_PRT0_AG\r
+#define SCSI_In__4__AMUX CYREG_PRT0_AMUX\r
+#define SCSI_In__4__BIE CYREG_PRT0_BIE\r
+#define SCSI_In__4__BIT_MASK CYREG_PRT0_BIT_MASK\r
+#define SCSI_In__4__BYP CYREG_PRT0_BYP\r
+#define SCSI_In__4__CTL CYREG_PRT0_CTL\r
+#define SCSI_In__4__DM0 CYREG_PRT0_DM0\r
+#define SCSI_In__4__DM1 CYREG_PRT0_DM1\r
+#define SCSI_In__4__DM2 CYREG_PRT0_DM2\r
+#define SCSI_In__4__DR CYREG_PRT0_DR\r
+#define SCSI_In__4__INP_DIS CYREG_PRT0_INP_DIS\r
+#define SCSI_In__4__INTTYPE CYREG_PICU0_INTTYPE4\r
+#define SCSI_In__4__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
+#define SCSI_In__4__LCD_EN CYREG_PRT0_LCD_EN\r
+#define SCSI_In__4__MASK 0x10u\r
+#define SCSI_In__4__PC CYREG_PRT0_PC4\r
+#define SCSI_In__4__PORT 0u\r
+#define SCSI_In__4__PRT CYREG_PRT0_PRT\r
+#define SCSI_In__4__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
+#define SCSI_In__4__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
+#define SCSI_In__4__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
+#define SCSI_In__4__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
+#define SCSI_In__4__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
+#define SCSI_In__4__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
+#define SCSI_In__4__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
+#define SCSI_In__4__PS CYREG_PRT0_PS\r
+#define SCSI_In__4__SHIFT 4u\r
+#define SCSI_In__4__SLW CYREG_PRT0_SLW\r
+#define SCSI_In__CD__AG CYREG_PRT4_AG\r
+#define SCSI_In__CD__AMUX CYREG_PRT4_AMUX\r
+#define SCSI_In__CD__BIE CYREG_PRT4_BIE\r
+#define SCSI_In__CD__BIT_MASK CYREG_PRT4_BIT_MASK\r
+#define SCSI_In__CD__BYP CYREG_PRT4_BYP\r
+#define SCSI_In__CD__CTL CYREG_PRT4_CTL\r
+#define SCSI_In__CD__DM0 CYREG_PRT4_DM0\r
+#define SCSI_In__CD__DM1 CYREG_PRT4_DM1\r
+#define SCSI_In__CD__DM2 CYREG_PRT4_DM2\r
+#define SCSI_In__CD__DR CYREG_PRT4_DR\r
+#define SCSI_In__CD__INP_DIS CYREG_PRT4_INP_DIS\r
+#define SCSI_In__CD__INTTYPE CYREG_PICU4_INTTYPE2\r
+#define SCSI_In__CD__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG\r
+#define SCSI_In__CD__LCD_EN CYREG_PRT4_LCD_EN\r
+#define SCSI_In__CD__MASK 0x04u\r
+#define SCSI_In__CD__PC CYREG_PRT4_PC2\r
+#define SCSI_In__CD__PORT 4u\r
+#define SCSI_In__CD__PRT CYREG_PRT4_PRT\r
+#define SCSI_In__CD__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL\r
+#define SCSI_In__CD__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN\r
+#define SCSI_In__CD__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0\r
+#define SCSI_In__CD__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1\r
+#define SCSI_In__CD__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0\r
+#define SCSI_In__CD__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1\r
+#define SCSI_In__CD__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT\r
+#define SCSI_In__CD__PS CYREG_PRT4_PS\r
+#define SCSI_In__CD__SHIFT 2u\r
+#define SCSI_In__CD__SLW CYREG_PRT4_SLW\r
+#define SCSI_In__DBP__AG CYREG_PRT2_AG\r
+#define SCSI_In__DBP__AMUX CYREG_PRT2_AMUX\r
+#define SCSI_In__DBP__BIE CYREG_PRT2_BIE\r
+#define SCSI_In__DBP__BIT_MASK CYREG_PRT2_BIT_MASK\r
+#define SCSI_In__DBP__BYP CYREG_PRT2_BYP\r
+#define SCSI_In__DBP__CTL CYREG_PRT2_CTL\r
+#define SCSI_In__DBP__DM0 CYREG_PRT2_DM0\r
+#define SCSI_In__DBP__DM1 CYREG_PRT2_DM1\r
+#define SCSI_In__DBP__DM2 CYREG_PRT2_DM2\r
+#define SCSI_In__DBP__DR CYREG_PRT2_DR\r
+#define SCSI_In__DBP__INP_DIS CYREG_PRT2_INP_DIS\r
+#define SCSI_In__DBP__INTTYPE CYREG_PICU2_INTTYPE1\r
+#define SCSI_In__DBP__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG\r
+#define SCSI_In__DBP__LCD_EN CYREG_PRT2_LCD_EN\r
+#define SCSI_In__DBP__MASK 0x02u\r
+#define SCSI_In__DBP__PC CYREG_PRT2_PC1\r
+#define SCSI_In__DBP__PORT 2u\r
+#define SCSI_In__DBP__PRT CYREG_PRT2_PRT\r
+#define SCSI_In__DBP__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL\r
+#define SCSI_In__DBP__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN\r
+#define SCSI_In__DBP__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0\r
+#define SCSI_In__DBP__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1\r
+#define SCSI_In__DBP__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0\r
+#define SCSI_In__DBP__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1\r
+#define SCSI_In__DBP__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT\r
+#define SCSI_In__DBP__PS CYREG_PRT2_PS\r
+#define SCSI_In__DBP__SHIFT 1u\r
+#define SCSI_In__DBP__SLW CYREG_PRT2_SLW\r
+#define SCSI_In__IO__AG CYREG_PRT0_AG\r
+#define SCSI_In__IO__AMUX CYREG_PRT0_AMUX\r
+#define SCSI_In__IO__BIE CYREG_PRT0_BIE\r
+#define SCSI_In__IO__BIT_MASK CYREG_PRT0_BIT_MASK\r
+#define SCSI_In__IO__BYP CYREG_PRT0_BYP\r
+#define SCSI_In__IO__CTL CYREG_PRT0_CTL\r
+#define SCSI_In__IO__DM0 CYREG_PRT0_DM0\r
+#define SCSI_In__IO__DM1 CYREG_PRT0_DM1\r
+#define SCSI_In__IO__DM2 CYREG_PRT0_DM2\r
+#define SCSI_In__IO__DR CYREG_PRT0_DR\r
+#define SCSI_In__IO__INP_DIS CYREG_PRT0_INP_DIS\r
+#define SCSI_In__IO__INTTYPE CYREG_PICU0_INTTYPE4\r
+#define SCSI_In__IO__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
+#define SCSI_In__IO__LCD_EN CYREG_PRT0_LCD_EN\r
+#define SCSI_In__IO__MASK 0x10u\r
+#define SCSI_In__IO__PC CYREG_PRT0_PC4\r
+#define SCSI_In__IO__PORT 0u\r
+#define SCSI_In__IO__PRT CYREG_PRT0_PRT\r
+#define SCSI_In__IO__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
+#define SCSI_In__IO__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
+#define SCSI_In__IO__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
+#define SCSI_In__IO__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
+#define SCSI_In__IO__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
+#define SCSI_In__IO__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
+#define SCSI_In__IO__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
+#define SCSI_In__IO__PS CYREG_PRT0_PS\r
+#define SCSI_In__IO__SHIFT 4u\r
+#define SCSI_In__IO__SLW CYREG_PRT0_SLW\r
+#define SCSI_In__MSG__AG CYREG_PRT4_AG\r
+#define SCSI_In__MSG__AMUX CYREG_PRT4_AMUX\r
+#define SCSI_In__MSG__BIE CYREG_PRT4_BIE\r
+#define SCSI_In__MSG__BIT_MASK CYREG_PRT4_BIT_MASK\r
+#define SCSI_In__MSG__BYP CYREG_PRT4_BYP\r
+#define SCSI_In__MSG__CTL CYREG_PRT4_CTL\r
+#define SCSI_In__MSG__DM0 CYREG_PRT4_DM0\r
+#define SCSI_In__MSG__DM1 CYREG_PRT4_DM1\r
+#define SCSI_In__MSG__DM2 CYREG_PRT4_DM2\r
+#define SCSI_In__MSG__DR CYREG_PRT4_DR\r
+#define SCSI_In__MSG__INP_DIS CYREG_PRT4_INP_DIS\r
+#define SCSI_In__MSG__INTTYPE CYREG_PICU4_INTTYPE6\r
+#define SCSI_In__MSG__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG\r
+#define SCSI_In__MSG__LCD_EN CYREG_PRT4_LCD_EN\r
+#define SCSI_In__MSG__MASK 0x40u\r
+#define SCSI_In__MSG__PC CYREG_PRT4_PC6\r
+#define SCSI_In__MSG__PORT 4u\r
+#define SCSI_In__MSG__PRT CYREG_PRT4_PRT\r
+#define SCSI_In__MSG__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL\r
+#define SCSI_In__MSG__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN\r
+#define SCSI_In__MSG__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0\r
+#define SCSI_In__MSG__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1\r
+#define SCSI_In__MSG__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0\r
+#define SCSI_In__MSG__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1\r
+#define SCSI_In__MSG__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT\r
+#define SCSI_In__MSG__PS CYREG_PRT4_PS\r
+#define SCSI_In__MSG__SHIFT 6u\r
+#define SCSI_In__MSG__SLW CYREG_PRT4_SLW\r
+#define SCSI_In__REQ__AG CYREG_PRT0_AG\r
+#define SCSI_In__REQ__AMUX CYREG_PRT0_AMUX\r
+#define SCSI_In__REQ__BIE CYREG_PRT0_BIE\r
+#define SCSI_In__REQ__BIT_MASK CYREG_PRT0_BIT_MASK\r
+#define SCSI_In__REQ__BYP CYREG_PRT0_BYP\r
+#define SCSI_In__REQ__CTL CYREG_PRT0_CTL\r
+#define SCSI_In__REQ__DM0 CYREG_PRT0_DM0\r
+#define SCSI_In__REQ__DM1 CYREG_PRT0_DM1\r
+#define SCSI_In__REQ__DM2 CYREG_PRT0_DM2\r
+#define SCSI_In__REQ__DR CYREG_PRT0_DR\r
+#define SCSI_In__REQ__INP_DIS CYREG_PRT0_INP_DIS\r
+#define SCSI_In__REQ__INTTYPE CYREG_PICU0_INTTYPE5\r
+#define SCSI_In__REQ__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
+#define SCSI_In__REQ__LCD_EN CYREG_PRT0_LCD_EN\r
+#define SCSI_In__REQ__MASK 0x20u\r
+#define SCSI_In__REQ__PC CYREG_PRT0_PC5\r
+#define SCSI_In__REQ__PORT 0u\r
+#define SCSI_In__REQ__PRT CYREG_PRT0_PRT\r
+#define SCSI_In__REQ__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
+#define SCSI_In__REQ__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
+#define SCSI_In__REQ__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
+#define SCSI_In__REQ__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
+#define SCSI_In__REQ__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
+#define SCSI_In__REQ__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
+#define SCSI_In__REQ__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
+#define SCSI_In__REQ__PS CYREG_PRT0_PS\r
+#define SCSI_In__REQ__SHIFT 5u\r
+#define SCSI_In__REQ__SLW CYREG_PRT0_SLW\r
+#define SCSI_In_DBx__0__AG CYREG_PRT5_AG\r
+#define SCSI_In_DBx__0__AMUX CYREG_PRT5_AMUX\r
+#define SCSI_In_DBx__0__BIE CYREG_PRT5_BIE\r
+#define SCSI_In_DBx__0__BIT_MASK CYREG_PRT5_BIT_MASK\r
+#define SCSI_In_DBx__0__BYP CYREG_PRT5_BYP\r
+#define SCSI_In_DBx__0__CTL CYREG_PRT5_CTL\r
+#define SCSI_In_DBx__0__DM0 CYREG_PRT5_DM0\r
+#define SCSI_In_DBx__0__DM1 CYREG_PRT5_DM1\r
+#define SCSI_In_DBx__0__DM2 CYREG_PRT5_DM2\r
+#define SCSI_In_DBx__0__DR CYREG_PRT5_DR\r
+#define SCSI_In_DBx__0__INP_DIS CYREG_PRT5_INP_DIS\r
+#define SCSI_In_DBx__0__INTTYPE CYREG_PICU5_INTTYPE3\r
+#define SCSI_In_DBx__0__LCD_COM_SEG CYREG_PRT5_LCD_COM_SEG\r
+#define SCSI_In_DBx__0__LCD_EN CYREG_PRT5_LCD_EN\r
+#define SCSI_In_DBx__0__MASK 0x08u\r
+#define SCSI_In_DBx__0__PC CYREG_PRT5_PC3\r
+#define SCSI_In_DBx__0__PORT 5u\r
+#define SCSI_In_DBx__0__PRT CYREG_PRT5_PRT\r
+#define SCSI_In_DBx__0__PRTDSI__CAPS_SEL CYREG_PRT5_CAPS_SEL\r
+#define SCSI_In_DBx__0__PRTDSI__DBL_SYNC_IN CYREG_PRT5_DBL_SYNC_IN\r
+#define SCSI_In_DBx__0__PRTDSI__OE_SEL0 CYREG_PRT5_OE_SEL0\r
+#define SCSI_In_DBx__0__PRTDSI__OE_SEL1 CYREG_PRT5_OE_SEL1\r
+#define SCSI_In_DBx__0__PRTDSI__OUT_SEL0 CYREG_PRT5_OUT_SEL0\r
+#define SCSI_In_DBx__0__PRTDSI__OUT_SEL1 CYREG_PRT5_OUT_SEL1\r
+#define SCSI_In_DBx__0__PRTDSI__SYNC_OUT CYREG_PRT5_SYNC_OUT\r
+#define SCSI_In_DBx__0__PS CYREG_PRT5_PS\r
+#define SCSI_In_DBx__0__SHIFT 3u\r
+#define SCSI_In_DBx__0__SLW CYREG_PRT5_SLW\r
+#define SCSI_In_DBx__1__AG CYREG_PRT5_AG\r
+#define SCSI_In_DBx__1__AMUX CYREG_PRT5_AMUX\r
+#define SCSI_In_DBx__1__BIE CYREG_PRT5_BIE\r
+#define SCSI_In_DBx__1__BIT_MASK CYREG_PRT5_BIT_MASK\r
+#define SCSI_In_DBx__1__BYP CYREG_PRT5_BYP\r
+#define SCSI_In_DBx__1__CTL CYREG_PRT5_CTL\r
+#define SCSI_In_DBx__1__DM0 CYREG_PRT5_DM0\r
+#define SCSI_In_DBx__1__DM1 CYREG_PRT5_DM1\r
+#define SCSI_In_DBx__1__DM2 CYREG_PRT5_DM2\r
+#define SCSI_In_DBx__1__DR CYREG_PRT5_DR\r
+#define SCSI_In_DBx__1__INP_DIS CYREG_PRT5_INP_DIS\r
+#define SCSI_In_DBx__1__INTTYPE CYREG_PICU5_INTTYPE2\r
+#define SCSI_In_DBx__1__LCD_COM_SEG CYREG_PRT5_LCD_COM_SEG\r
+#define SCSI_In_DBx__1__LCD_EN CYREG_PRT5_LCD_EN\r
+#define SCSI_In_DBx__1__MASK 0x04u\r
+#define SCSI_In_DBx__1__PC CYREG_PRT5_PC2\r
+#define SCSI_In_DBx__1__PORT 5u\r
+#define SCSI_In_DBx__1__PRT CYREG_PRT5_PRT\r
+#define SCSI_In_DBx__1__PRTDSI__CAPS_SEL CYREG_PRT5_CAPS_SEL\r
+#define SCSI_In_DBx__1__PRTDSI__DBL_SYNC_IN CYREG_PRT5_DBL_SYNC_IN\r
+#define SCSI_In_DBx__1__PRTDSI__OE_SEL0 CYREG_PRT5_OE_SEL0\r
+#define SCSI_In_DBx__1__PRTDSI__OE_SEL1 CYREG_PRT5_OE_SEL1\r
+#define SCSI_In_DBx__1__PRTDSI__OUT_SEL0 CYREG_PRT5_OUT_SEL0\r
+#define SCSI_In_DBx__1__PRTDSI__OUT_SEL1 CYREG_PRT5_OUT_SEL1\r
+#define SCSI_In_DBx__1__PRTDSI__SYNC_OUT CYREG_PRT5_SYNC_OUT\r
+#define SCSI_In_DBx__1__PS CYREG_PRT5_PS\r
+#define SCSI_In_DBx__1__SHIFT 2u\r
+#define SCSI_In_DBx__1__SLW CYREG_PRT5_SLW\r
+#define SCSI_In_DBx__2__AG CYREG_PRT6_AG\r
+#define SCSI_In_DBx__2__AMUX CYREG_PRT6_AMUX\r
+#define SCSI_In_DBx__2__BIE CYREG_PRT6_BIE\r
+#define SCSI_In_DBx__2__BIT_MASK CYREG_PRT6_BIT_MASK\r
+#define SCSI_In_DBx__2__BYP CYREG_PRT6_BYP\r
+#define SCSI_In_DBx__2__CTL CYREG_PRT6_CTL\r
+#define SCSI_In_DBx__2__DM0 CYREG_PRT6_DM0\r
+#define SCSI_In_DBx__2__DM1 CYREG_PRT6_DM1\r
+#define SCSI_In_DBx__2__DM2 CYREG_PRT6_DM2\r
+#define SCSI_In_DBx__2__DR CYREG_PRT6_DR\r
+#define SCSI_In_DBx__2__INP_DIS CYREG_PRT6_INP_DIS\r
+#define SCSI_In_DBx__2__INTTYPE CYREG_PICU6_INTTYPE7\r
+#define SCSI_In_DBx__2__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
+#define SCSI_In_DBx__2__LCD_EN CYREG_PRT6_LCD_EN\r
+#define SCSI_In_DBx__2__MASK 0x80u\r
+#define SCSI_In_DBx__2__PC CYREG_PRT6_PC7\r
+#define SCSI_In_DBx__2__PORT 6u\r
+#define SCSI_In_DBx__2__PRT CYREG_PRT6_PRT\r
+#define SCSI_In_DBx__2__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
+#define SCSI_In_DBx__2__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
+#define SCSI_In_DBx__2__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
+#define SCSI_In_DBx__2__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
+#define SCSI_In_DBx__2__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
+#define SCSI_In_DBx__2__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
+#define SCSI_In_DBx__2__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
+#define SCSI_In_DBx__2__PS CYREG_PRT6_PS\r
+#define SCSI_In_DBx__2__SHIFT 7u\r
+#define SCSI_In_DBx__2__SLW CYREG_PRT6_SLW\r
+#define SCSI_In_DBx__3__AG CYREG_PRT6_AG\r
+#define SCSI_In_DBx__3__AMUX CYREG_PRT6_AMUX\r
+#define SCSI_In_DBx__3__BIE CYREG_PRT6_BIE\r
+#define SCSI_In_DBx__3__BIT_MASK CYREG_PRT6_BIT_MASK\r
+#define SCSI_In_DBx__3__BYP CYREG_PRT6_BYP\r
+#define SCSI_In_DBx__3__CTL CYREG_PRT6_CTL\r
+#define SCSI_In_DBx__3__DM0 CYREG_PRT6_DM0\r
+#define SCSI_In_DBx__3__DM1 CYREG_PRT6_DM1\r
+#define SCSI_In_DBx__3__DM2 CYREG_PRT6_DM2\r
+#define SCSI_In_DBx__3__DR CYREG_PRT6_DR\r
+#define SCSI_In_DBx__3__INP_DIS CYREG_PRT6_INP_DIS\r
+#define SCSI_In_DBx__3__INTTYPE CYREG_PICU6_INTTYPE6\r
+#define SCSI_In_DBx__3__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
+#define SCSI_In_DBx__3__LCD_EN CYREG_PRT6_LCD_EN\r
+#define SCSI_In_DBx__3__MASK 0x40u\r
+#define SCSI_In_DBx__3__PC CYREG_PRT6_PC6\r
+#define SCSI_In_DBx__3__PORT 6u\r
+#define SCSI_In_DBx__3__PRT CYREG_PRT6_PRT\r
+#define SCSI_In_DBx__3__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
+#define SCSI_In_DBx__3__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
+#define SCSI_In_DBx__3__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
+#define SCSI_In_DBx__3__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
+#define SCSI_In_DBx__3__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
+#define SCSI_In_DBx__3__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
+#define SCSI_In_DBx__3__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
+#define SCSI_In_DBx__3__PS CYREG_PRT6_PS\r
+#define SCSI_In_DBx__3__SHIFT 6u\r
+#define SCSI_In_DBx__3__SLW CYREG_PRT6_SLW\r
+#define SCSI_In_DBx__4__AG CYREG_PRT12_AG\r
+#define SCSI_In_DBx__4__BIE CYREG_PRT12_BIE\r
+#define SCSI_In_DBx__4__BIT_MASK CYREG_PRT12_BIT_MASK\r
+#define SCSI_In_DBx__4__BYP CYREG_PRT12_BYP\r
+#define SCSI_In_DBx__4__DM0 CYREG_PRT12_DM0\r
+#define SCSI_In_DBx__4__DM1 CYREG_PRT12_DM1\r
+#define SCSI_In_DBx__4__DM2 CYREG_PRT12_DM2\r
+#define SCSI_In_DBx__4__DR CYREG_PRT12_DR\r
+#define SCSI_In_DBx__4__INP_DIS CYREG_PRT12_INP_DIS\r
+#define SCSI_In_DBx__4__INTTYPE CYREG_PICU12_INTTYPE5\r
+#define SCSI_In_DBx__4__MASK 0x20u\r
+#define SCSI_In_DBx__4__PC CYREG_PRT12_PC5\r
+#define SCSI_In_DBx__4__PORT 12u\r
+#define SCSI_In_DBx__4__PRT CYREG_PRT12_PRT\r
+#define SCSI_In_DBx__4__PRTDSI__DBL_SYNC_IN CYREG_PRT12_DBL_SYNC_IN\r
+#define SCSI_In_DBx__4__PRTDSI__OE_SEL0 CYREG_PRT12_OE_SEL0\r
+#define SCSI_In_DBx__4__PRTDSI__OE_SEL1 CYREG_PRT12_OE_SEL1\r
+#define SCSI_In_DBx__4__PRTDSI__OUT_SEL0 CYREG_PRT12_OUT_SEL0\r
+#define SCSI_In_DBx__4__PRTDSI__OUT_SEL1 CYREG_PRT12_OUT_SEL1\r
+#define SCSI_In_DBx__4__PRTDSI__SYNC_OUT CYREG_PRT12_SYNC_OUT\r
+#define SCSI_In_DBx__4__PS CYREG_PRT12_PS\r
+#define SCSI_In_DBx__4__SHIFT 5u\r
+#define SCSI_In_DBx__4__SIO_CFG CYREG_PRT12_SIO_CFG\r
+#define SCSI_In_DBx__4__SIO_DIFF CYREG_PRT12_SIO_DIFF\r
+#define SCSI_In_DBx__4__SIO_HYST_EN CYREG_PRT12_SIO_HYST_EN\r
+#define SCSI_In_DBx__4__SIO_REG_HIFREQ CYREG_PRT12_SIO_REG_HIFREQ\r
+#define SCSI_In_DBx__4__SLW CYREG_PRT12_SLW\r
+#define SCSI_In_DBx__5__AG CYREG_PRT12_AG\r
+#define SCSI_In_DBx__5__BIE CYREG_PRT12_BIE\r
+#define SCSI_In_DBx__5__BIT_MASK CYREG_PRT12_BIT_MASK\r
+#define SCSI_In_DBx__5__BYP CYREG_PRT12_BYP\r
+#define SCSI_In_DBx__5__DM0 CYREG_PRT12_DM0\r
+#define SCSI_In_DBx__5__DM1 CYREG_PRT12_DM1\r
+#define SCSI_In_DBx__5__DM2 CYREG_PRT12_DM2\r
+#define SCSI_In_DBx__5__DR CYREG_PRT12_DR\r
+#define SCSI_In_DBx__5__INP_DIS CYREG_PRT12_INP_DIS\r
+#define SCSI_In_DBx__5__INTTYPE CYREG_PICU12_INTTYPE4\r
+#define SCSI_In_DBx__5__MASK 0x10u\r
+#define SCSI_In_DBx__5__PC CYREG_PRT12_PC4\r
+#define SCSI_In_DBx__5__PORT 12u\r
+#define SCSI_In_DBx__5__PRT CYREG_PRT12_PRT\r
+#define SCSI_In_DBx__5__PRTDSI__DBL_SYNC_IN CYREG_PRT12_DBL_SYNC_IN\r
+#define SCSI_In_DBx__5__PRTDSI__OE_SEL0 CYREG_PRT12_OE_SEL0\r
+#define SCSI_In_DBx__5__PRTDSI__OE_SEL1 CYREG_PRT12_OE_SEL1\r
+#define SCSI_In_DBx__5__PRTDSI__OUT_SEL0 CYREG_PRT12_OUT_SEL0\r
+#define SCSI_In_DBx__5__PRTDSI__OUT_SEL1 CYREG_PRT12_OUT_SEL1\r
+#define SCSI_In_DBx__5__PRTDSI__SYNC_OUT CYREG_PRT12_SYNC_OUT\r
+#define SCSI_In_DBx__5__PS CYREG_PRT12_PS\r
+#define SCSI_In_DBx__5__SHIFT 4u\r
+#define SCSI_In_DBx__5__SIO_CFG CYREG_PRT12_SIO_CFG\r
+#define SCSI_In_DBx__5__SIO_DIFF CYREG_PRT12_SIO_DIFF\r
+#define SCSI_In_DBx__5__SIO_HYST_EN CYREG_PRT12_SIO_HYST_EN\r
+#define SCSI_In_DBx__5__SIO_REG_HIFREQ CYREG_PRT12_SIO_REG_HIFREQ\r
+#define SCSI_In_DBx__5__SLW CYREG_PRT12_SLW\r
+#define SCSI_In_DBx__6__AG CYREG_PRT2_AG\r
+#define SCSI_In_DBx__6__AMUX CYREG_PRT2_AMUX\r
+#define SCSI_In_DBx__6__BIE CYREG_PRT2_BIE\r
+#define SCSI_In_DBx__6__BIT_MASK CYREG_PRT2_BIT_MASK\r
+#define SCSI_In_DBx__6__BYP CYREG_PRT2_BYP\r
+#define SCSI_In_DBx__6__CTL CYREG_PRT2_CTL\r
+#define SCSI_In_DBx__6__DM0 CYREG_PRT2_DM0\r
+#define SCSI_In_DBx__6__DM1 CYREG_PRT2_DM1\r
+#define SCSI_In_DBx__6__DM2 CYREG_PRT2_DM2\r
+#define SCSI_In_DBx__6__DR CYREG_PRT2_DR\r
+#define SCSI_In_DBx__6__INP_DIS CYREG_PRT2_INP_DIS\r
+#define SCSI_In_DBx__6__INTTYPE CYREG_PICU2_INTTYPE5\r
+#define SCSI_In_DBx__6__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG\r
+#define SCSI_In_DBx__6__LCD_EN CYREG_PRT2_LCD_EN\r
+#define SCSI_In_DBx__6__MASK 0x20u\r
+#define SCSI_In_DBx__6__PC CYREG_PRT2_PC5\r
+#define SCSI_In_DBx__6__PORT 2u\r
+#define SCSI_In_DBx__6__PRT CYREG_PRT2_PRT\r
+#define SCSI_In_DBx__6__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL\r
+#define SCSI_In_DBx__6__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN\r
+#define SCSI_In_DBx__6__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0\r
+#define SCSI_In_DBx__6__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1\r
+#define SCSI_In_DBx__6__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0\r
+#define SCSI_In_DBx__6__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1\r
+#define SCSI_In_DBx__6__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT\r
+#define SCSI_In_DBx__6__PS CYREG_PRT2_PS\r
+#define SCSI_In_DBx__6__SHIFT 5u\r
+#define SCSI_In_DBx__6__SLW CYREG_PRT2_SLW\r
+#define SCSI_In_DBx__7__AG CYREG_PRT2_AG\r
+#define SCSI_In_DBx__7__AMUX CYREG_PRT2_AMUX\r
+#define SCSI_In_DBx__7__BIE CYREG_PRT2_BIE\r
+#define SCSI_In_DBx__7__BIT_MASK CYREG_PRT2_BIT_MASK\r
+#define SCSI_In_DBx__7__BYP CYREG_PRT2_BYP\r
+#define SCSI_In_DBx__7__CTL CYREG_PRT2_CTL\r
+#define SCSI_In_DBx__7__DM0 CYREG_PRT2_DM0\r
+#define SCSI_In_DBx__7__DM1 CYREG_PRT2_DM1\r
+#define SCSI_In_DBx__7__DM2 CYREG_PRT2_DM2\r
+#define SCSI_In_DBx__7__DR CYREG_PRT2_DR\r
+#define SCSI_In_DBx__7__INP_DIS CYREG_PRT2_INP_DIS\r
+#define SCSI_In_DBx__7__INTTYPE CYREG_PICU2_INTTYPE4\r
+#define SCSI_In_DBx__7__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG\r
+#define SCSI_In_DBx__7__LCD_EN CYREG_PRT2_LCD_EN\r
+#define SCSI_In_DBx__7__MASK 0x10u\r
+#define SCSI_In_DBx__7__PC CYREG_PRT2_PC4\r
+#define SCSI_In_DBx__7__PORT 2u\r
+#define SCSI_In_DBx__7__PRT CYREG_PRT2_PRT\r
+#define SCSI_In_DBx__7__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL\r
+#define SCSI_In_DBx__7__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN\r
+#define SCSI_In_DBx__7__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0\r
+#define SCSI_In_DBx__7__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1\r
+#define SCSI_In_DBx__7__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0\r
+#define SCSI_In_DBx__7__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1\r
+#define SCSI_In_DBx__7__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT\r
+#define SCSI_In_DBx__7__PS CYREG_PRT2_PS\r
+#define SCSI_In_DBx__7__SHIFT 4u\r
+#define SCSI_In_DBx__7__SLW CYREG_PRT2_SLW\r
+#define SCSI_In_DBx__DB0__AG CYREG_PRT5_AG\r
+#define SCSI_In_DBx__DB0__AMUX CYREG_PRT5_AMUX\r
+#define SCSI_In_DBx__DB0__BIE CYREG_PRT5_BIE\r
+#define SCSI_In_DBx__DB0__BIT_MASK CYREG_PRT5_BIT_MASK\r
+#define SCSI_In_DBx__DB0__BYP CYREG_PRT5_BYP\r
+#define SCSI_In_DBx__DB0__CTL CYREG_PRT5_CTL\r
+#define SCSI_In_DBx__DB0__DM0 CYREG_PRT5_DM0\r
+#define SCSI_In_DBx__DB0__DM1 CYREG_PRT5_DM1\r
+#define SCSI_In_DBx__DB0__DM2 CYREG_PRT5_DM2\r
+#define SCSI_In_DBx__DB0__DR CYREG_PRT5_DR\r
+#define SCSI_In_DBx__DB0__INP_DIS CYREG_PRT5_INP_DIS\r
+#define SCSI_In_DBx__DB0__INTTYPE CYREG_PICU5_INTTYPE3\r
+#define SCSI_In_DBx__DB0__LCD_COM_SEG CYREG_PRT5_LCD_COM_SEG\r
+#define SCSI_In_DBx__DB0__LCD_EN CYREG_PRT5_LCD_EN\r
+#define SCSI_In_DBx__DB0__MASK 0x08u\r
+#define SCSI_In_DBx__DB0__PC CYREG_PRT5_PC3\r
+#define SCSI_In_DBx__DB0__PORT 5u\r
+#define SCSI_In_DBx__DB0__PRT CYREG_PRT5_PRT\r
+#define SCSI_In_DBx__DB0__PRTDSI__CAPS_SEL CYREG_PRT5_CAPS_SEL\r
+#define SCSI_In_DBx__DB0__PRTDSI__DBL_SYNC_IN CYREG_PRT5_DBL_SYNC_IN\r
+#define SCSI_In_DBx__DB0__PRTDSI__OE_SEL0 CYREG_PRT5_OE_SEL0\r
+#define SCSI_In_DBx__DB0__PRTDSI__OE_SEL1 CYREG_PRT5_OE_SEL1\r
+#define SCSI_In_DBx__DB0__PRTDSI__OUT_SEL0 CYREG_PRT5_OUT_SEL0\r
+#define SCSI_In_DBx__DB0__PRTDSI__OUT_SEL1 CYREG_PRT5_OUT_SEL1\r
+#define SCSI_In_DBx__DB0__PRTDSI__SYNC_OUT CYREG_PRT5_SYNC_OUT\r
+#define SCSI_In_DBx__DB0__PS CYREG_PRT5_PS\r
+#define SCSI_In_DBx__DB0__SHIFT 3u\r
+#define SCSI_In_DBx__DB0__SLW CYREG_PRT5_SLW\r
+#define SCSI_In_DBx__DB1__AG CYREG_PRT5_AG\r
+#define SCSI_In_DBx__DB1__AMUX CYREG_PRT5_AMUX\r
+#define SCSI_In_DBx__DB1__BIE CYREG_PRT5_BIE\r
+#define SCSI_In_DBx__DB1__BIT_MASK CYREG_PRT5_BIT_MASK\r
+#define SCSI_In_DBx__DB1__BYP CYREG_PRT5_BYP\r
+#define SCSI_In_DBx__DB1__CTL CYREG_PRT5_CTL\r
+#define SCSI_In_DBx__DB1__DM0 CYREG_PRT5_DM0\r
+#define SCSI_In_DBx__DB1__DM1 CYREG_PRT5_DM1\r
+#define SCSI_In_DBx__DB1__DM2 CYREG_PRT5_DM2\r
+#define SCSI_In_DBx__DB1__DR CYREG_PRT5_DR\r
+#define SCSI_In_DBx__DB1__INP_DIS CYREG_PRT5_INP_DIS\r
+#define SCSI_In_DBx__DB1__INTTYPE CYREG_PICU5_INTTYPE2\r
+#define SCSI_In_DBx__DB1__LCD_COM_SEG CYREG_PRT5_LCD_COM_SEG\r
+#define SCSI_In_DBx__DB1__LCD_EN CYREG_PRT5_LCD_EN\r
+#define SCSI_In_DBx__DB1__MASK 0x04u\r
+#define SCSI_In_DBx__DB1__PC CYREG_PRT5_PC2\r
+#define SCSI_In_DBx__DB1__PORT 5u\r
+#define SCSI_In_DBx__DB1__PRT CYREG_PRT5_PRT\r
+#define SCSI_In_DBx__DB1__PRTDSI__CAPS_SEL CYREG_PRT5_CAPS_SEL\r
+#define SCSI_In_DBx__DB1__PRTDSI__DBL_SYNC_IN CYREG_PRT5_DBL_SYNC_IN\r
+#define SCSI_In_DBx__DB1__PRTDSI__OE_SEL0 CYREG_PRT5_OE_SEL0\r
+#define SCSI_In_DBx__DB1__PRTDSI__OE_SEL1 CYREG_PRT5_OE_SEL1\r
+#define SCSI_In_DBx__DB1__PRTDSI__OUT_SEL0 CYREG_PRT5_OUT_SEL0\r
+#define SCSI_In_DBx__DB1__PRTDSI__OUT_SEL1 CYREG_PRT5_OUT_SEL1\r
+#define SCSI_In_DBx__DB1__PRTDSI__SYNC_OUT CYREG_PRT5_SYNC_OUT\r
+#define SCSI_In_DBx__DB1__PS CYREG_PRT5_PS\r
+#define SCSI_In_DBx__DB1__SHIFT 2u\r
+#define SCSI_In_DBx__DB1__SLW CYREG_PRT5_SLW\r
+#define SCSI_In_DBx__DB2__AG CYREG_PRT6_AG\r
+#define SCSI_In_DBx__DB2__AMUX CYREG_PRT6_AMUX\r
+#define SCSI_In_DBx__DB2__BIE CYREG_PRT6_BIE\r
+#define SCSI_In_DBx__DB2__BIT_MASK CYREG_PRT6_BIT_MASK\r
+#define SCSI_In_DBx__DB2__BYP CYREG_PRT6_BYP\r
+#define SCSI_In_DBx__DB2__CTL CYREG_PRT6_CTL\r
+#define SCSI_In_DBx__DB2__DM0 CYREG_PRT6_DM0\r
+#define SCSI_In_DBx__DB2__DM1 CYREG_PRT6_DM1\r
+#define SCSI_In_DBx__DB2__DM2 CYREG_PRT6_DM2\r
+#define SCSI_In_DBx__DB2__DR CYREG_PRT6_DR\r
+#define SCSI_In_DBx__DB2__INP_DIS CYREG_PRT6_INP_DIS\r
+#define SCSI_In_DBx__DB2__INTTYPE CYREG_PICU6_INTTYPE7\r
+#define SCSI_In_DBx__DB2__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
+#define SCSI_In_DBx__DB2__LCD_EN CYREG_PRT6_LCD_EN\r
+#define SCSI_In_DBx__DB2__MASK 0x80u\r
+#define SCSI_In_DBx__DB2__PC CYREG_PRT6_PC7\r
+#define SCSI_In_DBx__DB2__PORT 6u\r
+#define SCSI_In_DBx__DB2__PRT CYREG_PRT6_PRT\r
+#define SCSI_In_DBx__DB2__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
+#define SCSI_In_DBx__DB2__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
+#define SCSI_In_DBx__DB2__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
+#define SCSI_In_DBx__DB2__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
+#define SCSI_In_DBx__DB2__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
+#define SCSI_In_DBx__DB2__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
+#define SCSI_In_DBx__DB2__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
+#define SCSI_In_DBx__DB2__PS CYREG_PRT6_PS\r
+#define SCSI_In_DBx__DB2__SHIFT 7u\r
+#define SCSI_In_DBx__DB2__SLW CYREG_PRT6_SLW\r
+#define SCSI_In_DBx__DB3__AG CYREG_PRT6_AG\r
+#define SCSI_In_DBx__DB3__AMUX CYREG_PRT6_AMUX\r
+#define SCSI_In_DBx__DB3__BIE CYREG_PRT6_BIE\r
+#define SCSI_In_DBx__DB3__BIT_MASK CYREG_PRT6_BIT_MASK\r
+#define SCSI_In_DBx__DB3__BYP CYREG_PRT6_BYP\r
+#define SCSI_In_DBx__DB3__CTL CYREG_PRT6_CTL\r
+#define SCSI_In_DBx__DB3__DM0 CYREG_PRT6_DM0\r
+#define SCSI_In_DBx__DB3__DM1 CYREG_PRT6_DM1\r
+#define SCSI_In_DBx__DB3__DM2 CYREG_PRT6_DM2\r
+#define SCSI_In_DBx__DB3__DR CYREG_PRT6_DR\r
+#define SCSI_In_DBx__DB3__INP_DIS CYREG_PRT6_INP_DIS\r
+#define SCSI_In_DBx__DB3__INTTYPE CYREG_PICU6_INTTYPE6\r
+#define SCSI_In_DBx__DB3__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
+#define SCSI_In_DBx__DB3__LCD_EN CYREG_PRT6_LCD_EN\r
+#define SCSI_In_DBx__DB3__MASK 0x40u\r
+#define SCSI_In_DBx__DB3__PC CYREG_PRT6_PC6\r
+#define SCSI_In_DBx__DB3__PORT 6u\r
+#define SCSI_In_DBx__DB3__PRT CYREG_PRT6_PRT\r
+#define SCSI_In_DBx__DB3__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
+#define SCSI_In_DBx__DB3__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
+#define SCSI_In_DBx__DB3__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
+#define SCSI_In_DBx__DB3__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
+#define SCSI_In_DBx__DB3__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
+#define SCSI_In_DBx__DB3__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
+#define SCSI_In_DBx__DB3__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
+#define SCSI_In_DBx__DB3__PS CYREG_PRT6_PS\r
+#define SCSI_In_DBx__DB3__SHIFT 6u\r
+#define SCSI_In_DBx__DB3__SLW CYREG_PRT6_SLW\r
+#define SCSI_In_DBx__DB4__AG CYREG_PRT12_AG\r
+#define SCSI_In_DBx__DB4__BIE CYREG_PRT12_BIE\r
+#define SCSI_In_DBx__DB4__BIT_MASK CYREG_PRT12_BIT_MASK\r
+#define SCSI_In_DBx__DB4__BYP CYREG_PRT12_BYP\r
+#define SCSI_In_DBx__DB4__DM0 CYREG_PRT12_DM0\r
+#define SCSI_In_DBx__DB4__DM1 CYREG_PRT12_DM1\r
+#define SCSI_In_DBx__DB4__DM2 CYREG_PRT12_DM2\r
+#define SCSI_In_DBx__DB4__DR CYREG_PRT12_DR\r
+#define SCSI_In_DBx__DB4__INP_DIS CYREG_PRT12_INP_DIS\r
+#define SCSI_In_DBx__DB4__INTTYPE CYREG_PICU12_INTTYPE5\r
+#define SCSI_In_DBx__DB4__MASK 0x20u\r
+#define SCSI_In_DBx__DB4__PC CYREG_PRT12_PC5\r
+#define SCSI_In_DBx__DB4__PORT 12u\r
+#define SCSI_In_DBx__DB4__PRT CYREG_PRT12_PRT\r
+#define SCSI_In_DBx__DB4__PRTDSI__DBL_SYNC_IN CYREG_PRT12_DBL_SYNC_IN\r
+#define SCSI_In_DBx__DB4__PRTDSI__OE_SEL0 CYREG_PRT12_OE_SEL0\r
+#define SCSI_In_DBx__DB4__PRTDSI__OE_SEL1 CYREG_PRT12_OE_SEL1\r
+#define SCSI_In_DBx__DB4__PRTDSI__OUT_SEL0 CYREG_PRT12_OUT_SEL0\r
+#define SCSI_In_DBx__DB4__PRTDSI__OUT_SEL1 CYREG_PRT12_OUT_SEL1\r
+#define SCSI_In_DBx__DB4__PRTDSI__SYNC_OUT CYREG_PRT12_SYNC_OUT\r
+#define SCSI_In_DBx__DB4__PS CYREG_PRT12_PS\r
+#define SCSI_In_DBx__DB4__SHIFT 5u\r
+#define SCSI_In_DBx__DB4__SIO_CFG CYREG_PRT12_SIO_CFG\r
+#define SCSI_In_DBx__DB4__SIO_DIFF CYREG_PRT12_SIO_DIFF\r
+#define SCSI_In_DBx__DB4__SIO_HYST_EN CYREG_PRT12_SIO_HYST_EN\r
+#define SCSI_In_DBx__DB4__SIO_REG_HIFREQ CYREG_PRT12_SIO_REG_HIFREQ\r
+#define SCSI_In_DBx__DB4__SLW CYREG_PRT12_SLW\r
+#define SCSI_In_DBx__DB5__AG CYREG_PRT12_AG\r
+#define SCSI_In_DBx__DB5__BIE CYREG_PRT12_BIE\r
+#define SCSI_In_DBx__DB5__BIT_MASK CYREG_PRT12_BIT_MASK\r
+#define SCSI_In_DBx__DB5__BYP CYREG_PRT12_BYP\r
+#define SCSI_In_DBx__DB5__DM0 CYREG_PRT12_DM0\r
+#define SCSI_In_DBx__DB5__DM1 CYREG_PRT12_DM1\r
+#define SCSI_In_DBx__DB5__DM2 CYREG_PRT12_DM2\r
+#define SCSI_In_DBx__DB5__DR CYREG_PRT12_DR\r
+#define SCSI_In_DBx__DB5__INP_DIS CYREG_PRT12_INP_DIS\r
+#define SCSI_In_DBx__DB5__INTTYPE CYREG_PICU12_INTTYPE4\r
+#define SCSI_In_DBx__DB5__MASK 0x10u\r
+#define SCSI_In_DBx__DB5__PC CYREG_PRT12_PC4\r
+#define SCSI_In_DBx__DB5__PORT 12u\r
+#define SCSI_In_DBx__DB5__PRT CYREG_PRT12_PRT\r
+#define SCSI_In_DBx__DB5__PRTDSI__DBL_SYNC_IN CYREG_PRT12_DBL_SYNC_IN\r
+#define SCSI_In_DBx__DB5__PRTDSI__OE_SEL0 CYREG_PRT12_OE_SEL0\r
+#define SCSI_In_DBx__DB5__PRTDSI__OE_SEL1 CYREG_PRT12_OE_SEL1\r
+#define SCSI_In_DBx__DB5__PRTDSI__OUT_SEL0 CYREG_PRT12_OUT_SEL0\r
+#define SCSI_In_DBx__DB5__PRTDSI__OUT_SEL1 CYREG_PRT12_OUT_SEL1\r
+#define SCSI_In_DBx__DB5__PRTDSI__SYNC_OUT CYREG_PRT12_SYNC_OUT\r
+#define SCSI_In_DBx__DB5__PS CYREG_PRT12_PS\r
+#define SCSI_In_DBx__DB5__SHIFT 4u\r
+#define SCSI_In_DBx__DB5__SIO_CFG CYREG_PRT12_SIO_CFG\r
+#define SCSI_In_DBx__DB5__SIO_DIFF CYREG_PRT12_SIO_DIFF\r
+#define SCSI_In_DBx__DB5__SIO_HYST_EN CYREG_PRT12_SIO_HYST_EN\r
+#define SCSI_In_DBx__DB5__SIO_REG_HIFREQ CYREG_PRT12_SIO_REG_HIFREQ\r
+#define SCSI_In_DBx__DB5__SLW CYREG_PRT12_SLW\r
+#define SCSI_In_DBx__DB6__AG CYREG_PRT2_AG\r
+#define SCSI_In_DBx__DB6__AMUX CYREG_PRT2_AMUX\r
+#define SCSI_In_DBx__DB6__BIE CYREG_PRT2_BIE\r
+#define SCSI_In_DBx__DB6__BIT_MASK CYREG_PRT2_BIT_MASK\r
+#define SCSI_In_DBx__DB6__BYP CYREG_PRT2_BYP\r
+#define SCSI_In_DBx__DB6__CTL CYREG_PRT2_CTL\r
+#define SCSI_In_DBx__DB6__DM0 CYREG_PRT2_DM0\r
+#define SCSI_In_DBx__DB6__DM1 CYREG_PRT2_DM1\r
+#define SCSI_In_DBx__DB6__DM2 CYREG_PRT2_DM2\r
+#define SCSI_In_DBx__DB6__DR CYREG_PRT2_DR\r
+#define SCSI_In_DBx__DB6__INP_DIS CYREG_PRT2_INP_DIS\r
+#define SCSI_In_DBx__DB6__INTTYPE CYREG_PICU2_INTTYPE5\r
+#define SCSI_In_DBx__DB6__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG\r
+#define SCSI_In_DBx__DB6__LCD_EN CYREG_PRT2_LCD_EN\r
+#define SCSI_In_DBx__DB6__MASK 0x20u\r
+#define SCSI_In_DBx__DB6__PC CYREG_PRT2_PC5\r
+#define SCSI_In_DBx__DB6__PORT 2u\r
+#define SCSI_In_DBx__DB6__PRT CYREG_PRT2_PRT\r
+#define SCSI_In_DBx__DB6__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL\r
+#define SCSI_In_DBx__DB6__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN\r
+#define SCSI_In_DBx__DB6__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0\r
+#define SCSI_In_DBx__DB6__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1\r
+#define SCSI_In_DBx__DB6__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0\r
+#define SCSI_In_DBx__DB6__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1\r
+#define SCSI_In_DBx__DB6__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT\r
+#define SCSI_In_DBx__DB6__PS CYREG_PRT2_PS\r
+#define SCSI_In_DBx__DB6__SHIFT 5u\r
+#define SCSI_In_DBx__DB6__SLW CYREG_PRT2_SLW\r
+#define SCSI_In_DBx__DB7__AG CYREG_PRT2_AG\r
+#define SCSI_In_DBx__DB7__AMUX CYREG_PRT2_AMUX\r
+#define SCSI_In_DBx__DB7__BIE CYREG_PRT2_BIE\r
+#define SCSI_In_DBx__DB7__BIT_MASK CYREG_PRT2_BIT_MASK\r
+#define SCSI_In_DBx__DB7__BYP CYREG_PRT2_BYP\r
+#define SCSI_In_DBx__DB7__CTL CYREG_PRT2_CTL\r
+#define SCSI_In_DBx__DB7__DM0 CYREG_PRT2_DM0\r
+#define SCSI_In_DBx__DB7__DM1 CYREG_PRT2_DM1\r
+#define SCSI_In_DBx__DB7__DM2 CYREG_PRT2_DM2\r
+#define SCSI_In_DBx__DB7__DR CYREG_PRT2_DR\r
+#define SCSI_In_DBx__DB7__INP_DIS CYREG_PRT2_INP_DIS\r
+#define SCSI_In_DBx__DB7__INTTYPE CYREG_PICU2_INTTYPE4\r
+#define SCSI_In_DBx__DB7__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG\r
+#define SCSI_In_DBx__DB7__LCD_EN CYREG_PRT2_LCD_EN\r
+#define SCSI_In_DBx__DB7__MASK 0x10u\r
+#define SCSI_In_DBx__DB7__PC CYREG_PRT2_PC4\r
+#define SCSI_In_DBx__DB7__PORT 2u\r
+#define SCSI_In_DBx__DB7__PRT CYREG_PRT2_PRT\r
+#define SCSI_In_DBx__DB7__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL\r
+#define SCSI_In_DBx__DB7__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN\r
+#define SCSI_In_DBx__DB7__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0\r
+#define SCSI_In_DBx__DB7__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1\r
+#define SCSI_In_DBx__DB7__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0\r
+#define SCSI_In_DBx__DB7__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1\r
+#define SCSI_In_DBx__DB7__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT\r
+#define SCSI_In_DBx__DB7__PS CYREG_PRT2_PS\r
+#define SCSI_In_DBx__DB7__SHIFT 4u\r
+#define SCSI_In_DBx__DB7__SLW CYREG_PRT2_SLW\r
+\r
+/* SD_MISO */\r
+#define SD_MISO__0__INTTYPE CYREG_PICU3_INTTYPE1\r
+#define SD_MISO__0__MASK 0x02u\r
+#define SD_MISO__0__PC CYREG_PRT3_PC1\r
+#define SD_MISO__0__PORT 3u\r
+#define SD_MISO__0__SHIFT 1u\r
+#define SD_MISO__AG CYREG_PRT3_AG\r
+#define SD_MISO__AMUX CYREG_PRT3_AMUX\r
+#define SD_MISO__BIE CYREG_PRT3_BIE\r
+#define SD_MISO__BIT_MASK CYREG_PRT3_BIT_MASK\r
+#define SD_MISO__BYP CYREG_PRT3_BYP\r
+#define SD_MISO__CTL CYREG_PRT3_CTL\r
+#define SD_MISO__DM0 CYREG_PRT3_DM0\r
+#define SD_MISO__DM1 CYREG_PRT3_DM1\r
+#define SD_MISO__DM2 CYREG_PRT3_DM2\r
+#define SD_MISO__DR CYREG_PRT3_DR\r
+#define SD_MISO__INP_DIS CYREG_PRT3_INP_DIS\r
+#define SD_MISO__INTTYPE_BASE CYDEV_PICU_INTTYPE_PICU3_BASE\r
+#define SD_MISO__LCD_COM_SEG CYREG_PRT3_LCD_COM_SEG\r
+#define SD_MISO__LCD_EN CYREG_PRT3_LCD_EN\r
+#define SD_MISO__MASK 0x02u\r
+#define SD_MISO__PORT 3u\r
+#define SD_MISO__PRT CYREG_PRT3_PRT\r
+#define SD_MISO__PRTDSI__CAPS_SEL CYREG_PRT3_CAPS_SEL\r
+#define SD_MISO__PRTDSI__DBL_SYNC_IN CYREG_PRT3_DBL_SYNC_IN\r
+#define SD_MISO__PRTDSI__OE_SEL0 CYREG_PRT3_OE_SEL0\r
+#define SD_MISO__PRTDSI__OE_SEL1 CYREG_PRT3_OE_SEL1\r
+#define SD_MISO__PRTDSI__OUT_SEL0 CYREG_PRT3_OUT_SEL0\r
+#define SD_MISO__PRTDSI__OUT_SEL1 CYREG_PRT3_OUT_SEL1\r
+#define SD_MISO__PRTDSI__SYNC_OUT CYREG_PRT3_SYNC_OUT\r
+#define SD_MISO__PS CYREG_PRT3_PS\r
+#define SD_MISO__SHIFT 1u\r
+#define SD_MISO__SLW CYREG_PRT3_SLW\r
+\r
+/* SD_MOSI */\r
+#define SD_MOSI__0__INTTYPE CYREG_PICU3_INTTYPE3\r
+#define SD_MOSI__0__MASK 0x08u\r
+#define SD_MOSI__0__PC CYREG_PRT3_PC3\r
+#define SD_MOSI__0__PORT 3u\r
+#define SD_MOSI__0__SHIFT 3u\r
+#define SD_MOSI__AG CYREG_PRT3_AG\r
+#define SD_MOSI__AMUX CYREG_PRT3_AMUX\r
+#define SD_MOSI__BIE CYREG_PRT3_BIE\r
+#define SD_MOSI__BIT_MASK CYREG_PRT3_BIT_MASK\r
+#define SD_MOSI__BYP CYREG_PRT3_BYP\r
+#define SD_MOSI__CTL CYREG_PRT3_CTL\r
+#define SD_MOSI__DM0 CYREG_PRT3_DM0\r
+#define SD_MOSI__DM1 CYREG_PRT3_DM1\r
+#define SD_MOSI__DM2 CYREG_PRT3_DM2\r
+#define SD_MOSI__DR CYREG_PRT3_DR\r
+#define SD_MOSI__INP_DIS CYREG_PRT3_INP_DIS\r
+#define SD_MOSI__INTTYPE_BASE CYDEV_PICU_INTTYPE_PICU3_BASE\r
+#define SD_MOSI__LCD_COM_SEG CYREG_PRT3_LCD_COM_SEG\r
+#define SD_MOSI__LCD_EN CYREG_PRT3_LCD_EN\r
+#define SD_MOSI__MASK 0x08u\r
+#define SD_MOSI__PORT 3u\r
+#define SD_MOSI__PRT CYREG_PRT3_PRT\r
+#define SD_MOSI__PRTDSI__CAPS_SEL CYREG_PRT3_CAPS_SEL\r
+#define SD_MOSI__PRTDSI__DBL_SYNC_IN CYREG_PRT3_DBL_SYNC_IN\r
+#define SD_MOSI__PRTDSI__OE_SEL0 CYREG_PRT3_OE_SEL0\r
+#define SD_MOSI__PRTDSI__OE_SEL1 CYREG_PRT3_OE_SEL1\r
+#define SD_MOSI__PRTDSI__OUT_SEL0 CYREG_PRT3_OUT_SEL0\r
+#define SD_MOSI__PRTDSI__OUT_SEL1 CYREG_PRT3_OUT_SEL1\r
+#define SD_MOSI__PRTDSI__SYNC_OUT CYREG_PRT3_SYNC_OUT\r
+#define SD_MOSI__PS CYREG_PRT3_PS\r
+#define SD_MOSI__SHIFT 3u\r
+#define SD_MOSI__SLW CYREG_PRT3_SLW\r
+\r
+/* SCSI_CLK */\r
+#define SCSI_CLK__CFG0 CYREG_CLKDIST_DCFG1_CFG0\r
+#define SCSI_CLK__CFG1 CYREG_CLKDIST_DCFG1_CFG1\r
+#define SCSI_CLK__CFG2 CYREG_CLKDIST_DCFG1_CFG2\r
+#define SCSI_CLK__CFG2_SRC_SEL_MASK 0x07u\r
+#define SCSI_CLK__INDEX 0x01u\r
+#define SCSI_CLK__PM_ACT_CFG CYREG_PM_ACT_CFG2\r
+#define SCSI_CLK__PM_ACT_MSK 0x02u\r
+#define SCSI_CLK__PM_STBY_CFG CYREG_PM_STBY_CFG2\r
+#define SCSI_CLK__PM_STBY_MSK 0x02u\r
+\r
+/* SCSI_Out */\r
+#define SCSI_Out__0__AG CYREG_PRT15_AG\r
+#define SCSI_Out__0__AMUX CYREG_PRT15_AMUX\r
+#define SCSI_Out__0__BIE CYREG_PRT15_BIE\r
+#define SCSI_Out__0__BIT_MASK CYREG_PRT15_BIT_MASK\r
+#define SCSI_Out__0__BYP CYREG_PRT15_BYP\r
+#define SCSI_Out__0__CTL CYREG_PRT15_CTL\r
+#define SCSI_Out__0__DM0 CYREG_PRT15_DM0\r
+#define SCSI_Out__0__DM1 CYREG_PRT15_DM1\r
+#define SCSI_Out__0__DM2 CYREG_PRT15_DM2\r
+#define SCSI_Out__0__DR CYREG_PRT15_DR\r
+#define SCSI_Out__0__INP_DIS CYREG_PRT15_INP_DIS\r
+#define SCSI_Out__0__INTTYPE CYREG_PICU15_INTTYPE5\r
+#define SCSI_Out__0__LCD_COM_SEG CYREG_PRT15_LCD_COM_SEG\r
+#define SCSI_Out__0__LCD_EN CYREG_PRT15_LCD_EN\r
+#define SCSI_Out__0__MASK 0x20u\r
+#define SCSI_Out__0__PC CYREG_IO_PC_PRT15_PC5\r
+#define SCSI_Out__0__PORT 15u\r
+#define SCSI_Out__0__PRT CYREG_PRT15_PRT\r
+#define SCSI_Out__0__PRTDSI__CAPS_SEL CYREG_PRT15_CAPS_SEL\r
+#define SCSI_Out__0__PRTDSI__DBL_SYNC_IN CYREG_PRT15_DBL_SYNC_IN\r
+#define SCSI_Out__0__PRTDSI__OE_SEL0 CYREG_PRT15_OE_SEL0\r
+#define SCSI_Out__0__PRTDSI__OE_SEL1 CYREG_PRT15_OE_SEL1\r
+#define SCSI_Out__0__PRTDSI__OUT_SEL0 CYREG_PRT15_OUT_SEL0\r
+#define SCSI_Out__0__PRTDSI__OUT_SEL1 CYREG_PRT15_OUT_SEL1\r
+#define SCSI_Out__0__PRTDSI__SYNC_OUT CYREG_PRT15_SYNC_OUT\r
+#define SCSI_Out__0__PS CYREG_PRT15_PS\r
+#define SCSI_Out__0__SHIFT 5u\r
+#define SCSI_Out__0__SLW CYREG_PRT15_SLW\r
+#define SCSI_Out__1__AG CYREG_PRT15_AG\r
+#define SCSI_Out__1__AMUX CYREG_PRT15_AMUX\r
+#define SCSI_Out__1__BIE CYREG_PRT15_BIE\r
+#define SCSI_Out__1__BIT_MASK CYREG_PRT15_BIT_MASK\r
+#define SCSI_Out__1__BYP CYREG_PRT15_BYP\r
+#define SCSI_Out__1__CTL CYREG_PRT15_CTL\r
+#define SCSI_Out__1__DM0 CYREG_PRT15_DM0\r
+#define SCSI_Out__1__DM1 CYREG_PRT15_DM1\r
+#define SCSI_Out__1__DM2 CYREG_PRT15_DM2\r
+#define SCSI_Out__1__DR CYREG_PRT15_DR\r
+#define SCSI_Out__1__INP_DIS CYREG_PRT15_INP_DIS\r
+#define SCSI_Out__1__INTTYPE CYREG_PICU15_INTTYPE4\r
+#define SCSI_Out__1__LCD_COM_SEG CYREG_PRT15_LCD_COM_SEG\r
+#define SCSI_Out__1__LCD_EN CYREG_PRT15_LCD_EN\r
+#define SCSI_Out__1__MASK 0x10u\r
+#define SCSI_Out__1__PC CYREG_IO_PC_PRT15_PC4\r
+#define SCSI_Out__1__PORT 15u\r
+#define SCSI_Out__1__PRT CYREG_PRT15_PRT\r
+#define SCSI_Out__1__PRTDSI__CAPS_SEL CYREG_PRT15_CAPS_SEL\r
+#define SCSI_Out__1__PRTDSI__DBL_SYNC_IN CYREG_PRT15_DBL_SYNC_IN\r
+#define SCSI_Out__1__PRTDSI__OE_SEL0 CYREG_PRT15_OE_SEL0\r
+#define SCSI_Out__1__PRTDSI__OE_SEL1 CYREG_PRT15_OE_SEL1\r
+#define SCSI_Out__1__PRTDSI__OUT_SEL0 CYREG_PRT15_OUT_SEL0\r
+#define SCSI_Out__1__PRTDSI__OUT_SEL1 CYREG_PRT15_OUT_SEL1\r
+#define SCSI_Out__1__PRTDSI__SYNC_OUT CYREG_PRT15_SYNC_OUT\r
+#define SCSI_Out__1__PS CYREG_PRT15_PS\r
+#define SCSI_Out__1__SHIFT 4u\r
+#define SCSI_Out__1__SLW CYREG_PRT15_SLW\r
+#define SCSI_Out__2__AG CYREG_PRT6_AG\r
+#define SCSI_Out__2__AMUX CYREG_PRT6_AMUX\r
+#define SCSI_Out__2__BIE CYREG_PRT6_BIE\r
+#define SCSI_Out__2__BIT_MASK CYREG_PRT6_BIT_MASK\r
+#define SCSI_Out__2__BYP CYREG_PRT6_BYP\r
+#define SCSI_Out__2__CTL CYREG_PRT6_CTL\r
+#define SCSI_Out__2__DM0 CYREG_PRT6_DM0\r
+#define SCSI_Out__2__DM1 CYREG_PRT6_DM1\r
+#define SCSI_Out__2__DM2 CYREG_PRT6_DM2\r
+#define SCSI_Out__2__DR CYREG_PRT6_DR\r
+#define SCSI_Out__2__INP_DIS CYREG_PRT6_INP_DIS\r
+#define SCSI_Out__2__INTTYPE CYREG_PICU6_INTTYPE1\r
+#define SCSI_Out__2__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
+#define SCSI_Out__2__LCD_EN CYREG_PRT6_LCD_EN\r
+#define SCSI_Out__2__MASK 0x02u\r
+#define SCSI_Out__2__PC CYREG_PRT6_PC1\r
+#define SCSI_Out__2__PORT 6u\r
+#define SCSI_Out__2__PRT CYREG_PRT6_PRT\r
+#define SCSI_Out__2__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
+#define SCSI_Out__2__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
+#define SCSI_Out__2__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
+#define SCSI_Out__2__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
+#define SCSI_Out__2__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
+#define SCSI_Out__2__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
+#define SCSI_Out__2__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
+#define SCSI_Out__2__PS CYREG_PRT6_PS\r
+#define SCSI_Out__2__SHIFT 1u\r
+#define SCSI_Out__2__SLW CYREG_PRT6_SLW\r
+#define SCSI_Out__3__AG CYREG_PRT6_AG\r
+#define SCSI_Out__3__AMUX CYREG_PRT6_AMUX\r
+#define SCSI_Out__3__BIE CYREG_PRT6_BIE\r
+#define SCSI_Out__3__BIT_MASK CYREG_PRT6_BIT_MASK\r
+#define SCSI_Out__3__BYP CYREG_PRT6_BYP\r
+#define SCSI_Out__3__CTL CYREG_PRT6_CTL\r
+#define SCSI_Out__3__DM0 CYREG_PRT6_DM0\r
+#define SCSI_Out__3__DM1 CYREG_PRT6_DM1\r
+#define SCSI_Out__3__DM2 CYREG_PRT6_DM2\r
+#define SCSI_Out__3__DR CYREG_PRT6_DR\r
+#define SCSI_Out__3__INP_DIS CYREG_PRT6_INP_DIS\r
+#define SCSI_Out__3__INTTYPE CYREG_PICU6_INTTYPE0\r
+#define SCSI_Out__3__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
+#define SCSI_Out__3__LCD_EN CYREG_PRT6_LCD_EN\r
+#define SCSI_Out__3__MASK 0x01u\r
+#define SCSI_Out__3__PC CYREG_PRT6_PC0\r
+#define SCSI_Out__3__PORT 6u\r
+#define SCSI_Out__3__PRT CYREG_PRT6_PRT\r
+#define SCSI_Out__3__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
+#define SCSI_Out__3__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
+#define SCSI_Out__3__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
+#define SCSI_Out__3__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
+#define SCSI_Out__3__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
+#define SCSI_Out__3__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
+#define SCSI_Out__3__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
+#define SCSI_Out__3__PS CYREG_PRT6_PS\r
+#define SCSI_Out__3__SHIFT 0u\r
+#define SCSI_Out__3__SLW CYREG_PRT6_SLW\r
+#define SCSI_Out__4__AG CYREG_PRT4_AG\r
+#define SCSI_Out__4__AMUX CYREG_PRT4_AMUX\r
+#define SCSI_Out__4__BIE CYREG_PRT4_BIE\r
+#define SCSI_Out__4__BIT_MASK CYREG_PRT4_BIT_MASK\r
+#define SCSI_Out__4__BYP CYREG_PRT4_BYP\r
+#define SCSI_Out__4__CTL CYREG_PRT4_CTL\r
+#define SCSI_Out__4__DM0 CYREG_PRT4_DM0\r
+#define SCSI_Out__4__DM1 CYREG_PRT4_DM1\r
+#define SCSI_Out__4__DM2 CYREG_PRT4_DM2\r
+#define SCSI_Out__4__DR CYREG_PRT4_DR\r
+#define SCSI_Out__4__INP_DIS CYREG_PRT4_INP_DIS\r
+#define SCSI_Out__4__INTTYPE CYREG_PICU4_INTTYPE5\r
+#define SCSI_Out__4__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG\r
+#define SCSI_Out__4__LCD_EN CYREG_PRT4_LCD_EN\r
+#define SCSI_Out__4__MASK 0x20u\r
+#define SCSI_Out__4__PC CYREG_PRT4_PC5\r
+#define SCSI_Out__4__PORT 4u\r
+#define SCSI_Out__4__PRT CYREG_PRT4_PRT\r
+#define SCSI_Out__4__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL\r
+#define SCSI_Out__4__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN\r
+#define SCSI_Out__4__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0\r
+#define SCSI_Out__4__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1\r
+#define SCSI_Out__4__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0\r
+#define SCSI_Out__4__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1\r
+#define SCSI_Out__4__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT\r
+#define SCSI_Out__4__PS CYREG_PRT4_PS\r
+#define SCSI_Out__4__SHIFT 5u\r
+#define SCSI_Out__4__SLW CYREG_PRT4_SLW\r
+#define SCSI_Out__5__AG CYREG_PRT4_AG\r
+#define SCSI_Out__5__AMUX CYREG_PRT4_AMUX\r
+#define SCSI_Out__5__BIE CYREG_PRT4_BIE\r
+#define SCSI_Out__5__BIT_MASK CYREG_PRT4_BIT_MASK\r
+#define SCSI_Out__5__BYP CYREG_PRT4_BYP\r
+#define SCSI_Out__5__CTL CYREG_PRT4_CTL\r
+#define SCSI_Out__5__DM0 CYREG_PRT4_DM0\r
+#define SCSI_Out__5__DM1 CYREG_PRT4_DM1\r
+#define SCSI_Out__5__DM2 CYREG_PRT4_DM2\r
+#define SCSI_Out__5__DR CYREG_PRT4_DR\r
+#define SCSI_Out__5__INP_DIS CYREG_PRT4_INP_DIS\r
+#define SCSI_Out__5__INTTYPE CYREG_PICU4_INTTYPE4\r
+#define SCSI_Out__5__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG\r
+#define SCSI_Out__5__LCD_EN CYREG_PRT4_LCD_EN\r
+#define SCSI_Out__5__MASK 0x10u\r
+#define SCSI_Out__5__PC CYREG_PRT4_PC4\r
+#define SCSI_Out__5__PORT 4u\r
+#define SCSI_Out__5__PRT CYREG_PRT4_PRT\r
+#define SCSI_Out__5__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL\r
+#define SCSI_Out__5__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN\r
+#define SCSI_Out__5__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0\r
+#define SCSI_Out__5__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1\r
+#define SCSI_Out__5__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0\r
+#define SCSI_Out__5__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1\r
+#define SCSI_Out__5__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT\r
+#define SCSI_Out__5__PS CYREG_PRT4_PS\r
+#define SCSI_Out__5__SHIFT 4u\r
+#define SCSI_Out__5__SLW CYREG_PRT4_SLW\r
+#define SCSI_Out__6__AG CYREG_PRT0_AG\r
+#define SCSI_Out__6__AMUX CYREG_PRT0_AMUX\r
+#define SCSI_Out__6__BIE CYREG_PRT0_BIE\r
+#define SCSI_Out__6__BIT_MASK CYREG_PRT0_BIT_MASK\r
+#define SCSI_Out__6__BYP CYREG_PRT0_BYP\r
+#define SCSI_Out__6__CTL CYREG_PRT0_CTL\r
+#define SCSI_Out__6__DM0 CYREG_PRT0_DM0\r
+#define SCSI_Out__6__DM1 CYREG_PRT0_DM1\r
+#define SCSI_Out__6__DM2 CYREG_PRT0_DM2\r
+#define SCSI_Out__6__DR CYREG_PRT0_DR\r
+#define SCSI_Out__6__INP_DIS CYREG_PRT0_INP_DIS\r
+#define SCSI_Out__6__INTTYPE CYREG_PICU0_INTTYPE7\r
+#define SCSI_Out__6__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
+#define SCSI_Out__6__LCD_EN CYREG_PRT0_LCD_EN\r
+#define SCSI_Out__6__MASK 0x80u\r
+#define SCSI_Out__6__PC CYREG_PRT0_PC7\r
+#define SCSI_Out__6__PORT 0u\r
+#define SCSI_Out__6__PRT CYREG_PRT0_PRT\r
+#define SCSI_Out__6__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
+#define SCSI_Out__6__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
+#define SCSI_Out__6__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
+#define SCSI_Out__6__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
+#define SCSI_Out__6__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
+#define SCSI_Out__6__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
+#define SCSI_Out__6__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
+#define SCSI_Out__6__PS CYREG_PRT0_PS\r
+#define SCSI_Out__6__SHIFT 7u\r
+#define SCSI_Out__6__SLW CYREG_PRT0_SLW\r
+#define SCSI_Out__7__AG CYREG_PRT0_AG\r
+#define SCSI_Out__7__AMUX CYREG_PRT0_AMUX\r
+#define SCSI_Out__7__BIE CYREG_PRT0_BIE\r
+#define SCSI_Out__7__BIT_MASK CYREG_PRT0_BIT_MASK\r
+#define SCSI_Out__7__BYP CYREG_PRT0_BYP\r
+#define SCSI_Out__7__CTL CYREG_PRT0_CTL\r
+#define SCSI_Out__7__DM0 CYREG_PRT0_DM0\r
+#define SCSI_Out__7__DM1 CYREG_PRT0_DM1\r
+#define SCSI_Out__7__DM2 CYREG_PRT0_DM2\r
+#define SCSI_Out__7__DR CYREG_PRT0_DR\r
+#define SCSI_Out__7__INP_DIS CYREG_PRT0_INP_DIS\r
+#define SCSI_Out__7__INTTYPE CYREG_PICU0_INTTYPE6\r
+#define SCSI_Out__7__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
+#define SCSI_Out__7__LCD_EN CYREG_PRT0_LCD_EN\r
+#define SCSI_Out__7__MASK 0x40u\r
+#define SCSI_Out__7__PC CYREG_PRT0_PC6\r
+#define SCSI_Out__7__PORT 0u\r
+#define SCSI_Out__7__PRT CYREG_PRT0_PRT\r
+#define SCSI_Out__7__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
+#define SCSI_Out__7__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
+#define SCSI_Out__7__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
+#define SCSI_Out__7__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
+#define SCSI_Out__7__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
+#define SCSI_Out__7__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
+#define SCSI_Out__7__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
+#define SCSI_Out__7__PS CYREG_PRT0_PS\r
+#define SCSI_Out__7__SHIFT 6u\r
+#define SCSI_Out__7__SLW CYREG_PRT0_SLW\r
+#define SCSI_Out__8__AG CYREG_PRT0_AG\r
+#define SCSI_Out__8__AMUX CYREG_PRT0_AMUX\r
+#define SCSI_Out__8__BIE CYREG_PRT0_BIE\r
+#define SCSI_Out__8__BIT_MASK CYREG_PRT0_BIT_MASK\r
+#define SCSI_Out__8__BYP CYREG_PRT0_BYP\r
+#define SCSI_Out__8__CTL CYREG_PRT0_CTL\r
+#define SCSI_Out__8__DM0 CYREG_PRT0_DM0\r
+#define SCSI_Out__8__DM1 CYREG_PRT0_DM1\r
+#define SCSI_Out__8__DM2 CYREG_PRT0_DM2\r
+#define SCSI_Out__8__DR CYREG_PRT0_DR\r
+#define SCSI_Out__8__INP_DIS CYREG_PRT0_INP_DIS\r
+#define SCSI_Out__8__INTTYPE CYREG_PICU0_INTTYPE3\r
+#define SCSI_Out__8__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
+#define SCSI_Out__8__LCD_EN CYREG_PRT0_LCD_EN\r
+#define SCSI_Out__8__MASK 0x08u\r
+#define SCSI_Out__8__PC CYREG_PRT0_PC3\r
+#define SCSI_Out__8__PORT 0u\r
+#define SCSI_Out__8__PRT CYREG_PRT0_PRT\r
+#define SCSI_Out__8__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
+#define SCSI_Out__8__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
+#define SCSI_Out__8__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
+#define SCSI_Out__8__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
+#define SCSI_Out__8__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
+#define SCSI_Out__8__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
+#define SCSI_Out__8__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
+#define SCSI_Out__8__PS CYREG_PRT0_PS\r
+#define SCSI_Out__8__SHIFT 3u\r
+#define SCSI_Out__8__SLW CYREG_PRT0_SLW\r
+#define SCSI_Out__9__AG CYREG_PRT0_AG\r
+#define SCSI_Out__9__AMUX CYREG_PRT0_AMUX\r
+#define SCSI_Out__9__BIE CYREG_PRT0_BIE\r
+#define SCSI_Out__9__BIT_MASK CYREG_PRT0_BIT_MASK\r
+#define SCSI_Out__9__BYP CYREG_PRT0_BYP\r
+#define SCSI_Out__9__CTL CYREG_PRT0_CTL\r
+#define SCSI_Out__9__DM0 CYREG_PRT0_DM0\r
+#define SCSI_Out__9__DM1 CYREG_PRT0_DM1\r
+#define SCSI_Out__9__DM2 CYREG_PRT0_DM2\r
+#define SCSI_Out__9__DR CYREG_PRT0_DR\r
+#define SCSI_Out__9__INP_DIS CYREG_PRT0_INP_DIS\r
+#define SCSI_Out__9__INTTYPE CYREG_PICU0_INTTYPE2\r
+#define SCSI_Out__9__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
+#define SCSI_Out__9__LCD_EN CYREG_PRT0_LCD_EN\r
+#define SCSI_Out__9__MASK 0x04u\r
+#define SCSI_Out__9__PC CYREG_PRT0_PC2\r
+#define SCSI_Out__9__PORT 0u\r
+#define SCSI_Out__9__PRT CYREG_PRT0_PRT\r
+#define SCSI_Out__9__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
+#define SCSI_Out__9__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
+#define SCSI_Out__9__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
+#define SCSI_Out__9__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
+#define SCSI_Out__9__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
+#define SCSI_Out__9__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
+#define SCSI_Out__9__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
+#define SCSI_Out__9__PS CYREG_PRT0_PS\r
+#define SCSI_Out__9__SHIFT 2u\r
+#define SCSI_Out__9__SLW CYREG_PRT0_SLW\r
+#define SCSI_Out__ACK__AG CYREG_PRT6_AG\r
+#define SCSI_Out__ACK__AMUX CYREG_PRT6_AMUX\r
+#define SCSI_Out__ACK__BIE CYREG_PRT6_BIE\r
+#define SCSI_Out__ACK__BIT_MASK CYREG_PRT6_BIT_MASK\r
+#define SCSI_Out__ACK__BYP CYREG_PRT6_BYP\r
+#define SCSI_Out__ACK__CTL CYREG_PRT6_CTL\r
+#define SCSI_Out__ACK__DM0 CYREG_PRT6_DM0\r
+#define SCSI_Out__ACK__DM1 CYREG_PRT6_DM1\r
+#define SCSI_Out__ACK__DM2 CYREG_PRT6_DM2\r
+#define SCSI_Out__ACK__DR CYREG_PRT6_DR\r
+#define SCSI_Out__ACK__INP_DIS CYREG_PRT6_INP_DIS\r
+#define SCSI_Out__ACK__INTTYPE CYREG_PICU6_INTTYPE0\r
+#define SCSI_Out__ACK__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
+#define SCSI_Out__ACK__LCD_EN CYREG_PRT6_LCD_EN\r
+#define SCSI_Out__ACK__MASK 0x01u\r
+#define SCSI_Out__ACK__PC CYREG_PRT6_PC0\r
+#define SCSI_Out__ACK__PORT 6u\r
+#define SCSI_Out__ACK__PRT CYREG_PRT6_PRT\r
+#define SCSI_Out__ACK__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
+#define SCSI_Out__ACK__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
+#define SCSI_Out__ACK__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
+#define SCSI_Out__ACK__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
+#define SCSI_Out__ACK__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
+#define SCSI_Out__ACK__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
+#define SCSI_Out__ACK__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
+#define SCSI_Out__ACK__PS CYREG_PRT6_PS\r
+#define SCSI_Out__ACK__SHIFT 0u\r
+#define SCSI_Out__ACK__SLW CYREG_PRT6_SLW\r
+#define SCSI_Out__ATN__AG CYREG_PRT15_AG\r
+#define SCSI_Out__ATN__AMUX CYREG_PRT15_AMUX\r
+#define SCSI_Out__ATN__BIE CYREG_PRT15_BIE\r
+#define SCSI_Out__ATN__BIT_MASK CYREG_PRT15_BIT_MASK\r
+#define SCSI_Out__ATN__BYP CYREG_PRT15_BYP\r
+#define SCSI_Out__ATN__CTL CYREG_PRT15_CTL\r
+#define SCSI_Out__ATN__DM0 CYREG_PRT15_DM0\r
+#define SCSI_Out__ATN__DM1 CYREG_PRT15_DM1\r
+#define SCSI_Out__ATN__DM2 CYREG_PRT15_DM2\r
+#define SCSI_Out__ATN__DR CYREG_PRT15_DR\r
+#define SCSI_Out__ATN__INP_DIS CYREG_PRT15_INP_DIS\r
+#define SCSI_Out__ATN__INTTYPE CYREG_PICU15_INTTYPE4\r
+#define SCSI_Out__ATN__LCD_COM_SEG CYREG_PRT15_LCD_COM_SEG\r
+#define SCSI_Out__ATN__LCD_EN CYREG_PRT15_LCD_EN\r
+#define SCSI_Out__ATN__MASK 0x10u\r
+#define SCSI_Out__ATN__PC CYREG_IO_PC_PRT15_PC4\r
+#define SCSI_Out__ATN__PORT 15u\r
+#define SCSI_Out__ATN__PRT CYREG_PRT15_PRT\r
+#define SCSI_Out__ATN__PRTDSI__CAPS_SEL CYREG_PRT15_CAPS_SEL\r
+#define SCSI_Out__ATN__PRTDSI__DBL_SYNC_IN CYREG_PRT15_DBL_SYNC_IN\r
+#define SCSI_Out__ATN__PRTDSI__OE_SEL0 CYREG_PRT15_OE_SEL0\r
+#define SCSI_Out__ATN__PRTDSI__OE_SEL1 CYREG_PRT15_OE_SEL1\r
+#define SCSI_Out__ATN__PRTDSI__OUT_SEL0 CYREG_PRT15_OUT_SEL0\r
+#define SCSI_Out__ATN__PRTDSI__OUT_SEL1 CYREG_PRT15_OUT_SEL1\r
+#define SCSI_Out__ATN__PRTDSI__SYNC_OUT CYREG_PRT15_SYNC_OUT\r
+#define SCSI_Out__ATN__PS CYREG_PRT15_PS\r
+#define SCSI_Out__ATN__SHIFT 4u\r
+#define SCSI_Out__ATN__SLW CYREG_PRT15_SLW\r
+#define SCSI_Out__BSY__AG CYREG_PRT6_AG\r
+#define SCSI_Out__BSY__AMUX CYREG_PRT6_AMUX\r
+#define SCSI_Out__BSY__BIE CYREG_PRT6_BIE\r
+#define SCSI_Out__BSY__BIT_MASK CYREG_PRT6_BIT_MASK\r
+#define SCSI_Out__BSY__BYP CYREG_PRT6_BYP\r
+#define SCSI_Out__BSY__CTL CYREG_PRT6_CTL\r
+#define SCSI_Out__BSY__DM0 CYREG_PRT6_DM0\r
+#define SCSI_Out__BSY__DM1 CYREG_PRT6_DM1\r
+#define SCSI_Out__BSY__DM2 CYREG_PRT6_DM2\r
+#define SCSI_Out__BSY__DR CYREG_PRT6_DR\r
+#define SCSI_Out__BSY__INP_DIS CYREG_PRT6_INP_DIS\r
+#define SCSI_Out__BSY__INTTYPE CYREG_PICU6_INTTYPE1\r
+#define SCSI_Out__BSY__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
+#define SCSI_Out__BSY__LCD_EN CYREG_PRT6_LCD_EN\r
+#define SCSI_Out__BSY__MASK 0x02u\r
+#define SCSI_Out__BSY__PC CYREG_PRT6_PC1\r
+#define SCSI_Out__BSY__PORT 6u\r
+#define SCSI_Out__BSY__PRT CYREG_PRT6_PRT\r
+#define SCSI_Out__BSY__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
+#define SCSI_Out__BSY__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
+#define SCSI_Out__BSY__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
+#define SCSI_Out__BSY__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
+#define SCSI_Out__BSY__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
+#define SCSI_Out__BSY__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
+#define SCSI_Out__BSY__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
+#define SCSI_Out__BSY__PS CYREG_PRT6_PS\r
+#define SCSI_Out__BSY__SHIFT 1u\r
+#define SCSI_Out__BSY__SLW CYREG_PRT6_SLW\r
+#define SCSI_Out__CD_raw__AG CYREG_PRT0_AG\r
+#define SCSI_Out__CD_raw__AMUX CYREG_PRT0_AMUX\r
+#define SCSI_Out__CD_raw__BIE CYREG_PRT0_BIE\r
+#define SCSI_Out__CD_raw__BIT_MASK CYREG_PRT0_BIT_MASK\r
+#define SCSI_Out__CD_raw__BYP CYREG_PRT0_BYP\r
+#define SCSI_Out__CD_raw__CTL CYREG_PRT0_CTL\r
+#define SCSI_Out__CD_raw__DM0 CYREG_PRT0_DM0\r
+#define SCSI_Out__CD_raw__DM1 CYREG_PRT0_DM1\r
+#define SCSI_Out__CD_raw__DM2 CYREG_PRT0_DM2\r
+#define SCSI_Out__CD_raw__DR CYREG_PRT0_DR\r
+#define SCSI_Out__CD_raw__INP_DIS CYREG_PRT0_INP_DIS\r
+#define SCSI_Out__CD_raw__INTTYPE CYREG_PICU0_INTTYPE6\r
+#define SCSI_Out__CD_raw__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
+#define SCSI_Out__CD_raw__LCD_EN CYREG_PRT0_LCD_EN\r
+#define SCSI_Out__CD_raw__MASK 0x40u\r
+#define SCSI_Out__CD_raw__PC CYREG_PRT0_PC6\r
+#define SCSI_Out__CD_raw__PORT 0u\r
+#define SCSI_Out__CD_raw__PRT CYREG_PRT0_PRT\r
+#define SCSI_Out__CD_raw__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
+#define SCSI_Out__CD_raw__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
+#define SCSI_Out__CD_raw__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
+#define SCSI_Out__CD_raw__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
+#define SCSI_Out__CD_raw__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
+#define SCSI_Out__CD_raw__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
+#define SCSI_Out__CD_raw__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
+#define SCSI_Out__CD_raw__PS CYREG_PRT0_PS\r
+#define SCSI_Out__CD_raw__SHIFT 6u\r
+#define SCSI_Out__CD_raw__SLW CYREG_PRT0_SLW\r
+#define SCSI_Out__DBP_raw__AG CYREG_PRT15_AG\r
+#define SCSI_Out__DBP_raw__AMUX CYREG_PRT15_AMUX\r
+#define SCSI_Out__DBP_raw__BIE CYREG_PRT15_BIE\r
+#define SCSI_Out__DBP_raw__BIT_MASK CYREG_PRT15_BIT_MASK\r
+#define SCSI_Out__DBP_raw__BYP CYREG_PRT15_BYP\r
+#define SCSI_Out__DBP_raw__CTL CYREG_PRT15_CTL\r
+#define SCSI_Out__DBP_raw__DM0 CYREG_PRT15_DM0\r
+#define SCSI_Out__DBP_raw__DM1 CYREG_PRT15_DM1\r
+#define SCSI_Out__DBP_raw__DM2 CYREG_PRT15_DM2\r
+#define SCSI_Out__DBP_raw__DR CYREG_PRT15_DR\r
+#define SCSI_Out__DBP_raw__INP_DIS CYREG_PRT15_INP_DIS\r
+#define SCSI_Out__DBP_raw__INTTYPE CYREG_PICU15_INTTYPE5\r
+#define SCSI_Out__DBP_raw__LCD_COM_SEG CYREG_PRT15_LCD_COM_SEG\r
+#define SCSI_Out__DBP_raw__LCD_EN CYREG_PRT15_LCD_EN\r
+#define SCSI_Out__DBP_raw__MASK 0x20u\r
+#define SCSI_Out__DBP_raw__PC CYREG_IO_PC_PRT15_PC5\r
+#define SCSI_Out__DBP_raw__PORT 15u\r
+#define SCSI_Out__DBP_raw__PRT CYREG_PRT15_PRT\r
+#define SCSI_Out__DBP_raw__PRTDSI__CAPS_SEL CYREG_PRT15_CAPS_SEL\r
+#define SCSI_Out__DBP_raw__PRTDSI__DBL_SYNC_IN CYREG_PRT15_DBL_SYNC_IN\r
+#define SCSI_Out__DBP_raw__PRTDSI__OE_SEL0 CYREG_PRT15_OE_SEL0\r
+#define SCSI_Out__DBP_raw__PRTDSI__OE_SEL1 CYREG_PRT15_OE_SEL1\r
+#define SCSI_Out__DBP_raw__PRTDSI__OUT_SEL0 CYREG_PRT15_OUT_SEL0\r
+#define SCSI_Out__DBP_raw__PRTDSI__OUT_SEL1 CYREG_PRT15_OUT_SEL1\r
+#define SCSI_Out__DBP_raw__PRTDSI__SYNC_OUT CYREG_PRT15_SYNC_OUT\r
+#define SCSI_Out__DBP_raw__PS CYREG_PRT15_PS\r
+#define SCSI_Out__DBP_raw__SHIFT 5u\r
+#define SCSI_Out__DBP_raw__SLW CYREG_PRT15_SLW\r
+#define SCSI_Out__IO_raw__AG CYREG_PRT0_AG\r
+#define SCSI_Out__IO_raw__AMUX CYREG_PRT0_AMUX\r
+#define SCSI_Out__IO_raw__BIE CYREG_PRT0_BIE\r
+#define SCSI_Out__IO_raw__BIT_MASK CYREG_PRT0_BIT_MASK\r
+#define SCSI_Out__IO_raw__BYP CYREG_PRT0_BYP\r
+#define SCSI_Out__IO_raw__CTL CYREG_PRT0_CTL\r
+#define SCSI_Out__IO_raw__DM0 CYREG_PRT0_DM0\r
+#define SCSI_Out__IO_raw__DM1 CYREG_PRT0_DM1\r
+#define SCSI_Out__IO_raw__DM2 CYREG_PRT0_DM2\r
+#define SCSI_Out__IO_raw__DR CYREG_PRT0_DR\r
+#define SCSI_Out__IO_raw__INP_DIS CYREG_PRT0_INP_DIS\r
+#define SCSI_Out__IO_raw__INTTYPE CYREG_PICU0_INTTYPE2\r
+#define SCSI_Out__IO_raw__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
+#define SCSI_Out__IO_raw__LCD_EN CYREG_PRT0_LCD_EN\r
+#define SCSI_Out__IO_raw__MASK 0x04u\r
+#define SCSI_Out__IO_raw__PC CYREG_PRT0_PC2\r
+#define SCSI_Out__IO_raw__PORT 0u\r
+#define SCSI_Out__IO_raw__PRT CYREG_PRT0_PRT\r
+#define SCSI_Out__IO_raw__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
+#define SCSI_Out__IO_raw__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
+#define SCSI_Out__IO_raw__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
+#define SCSI_Out__IO_raw__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
+#define SCSI_Out__IO_raw__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
+#define SCSI_Out__IO_raw__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
+#define SCSI_Out__IO_raw__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
+#define SCSI_Out__IO_raw__PS CYREG_PRT0_PS\r
+#define SCSI_Out__IO_raw__SHIFT 2u\r
+#define SCSI_Out__IO_raw__SLW CYREG_PRT0_SLW\r
+#define SCSI_Out__MSG_raw__AG CYREG_PRT4_AG\r
+#define SCSI_Out__MSG_raw__AMUX CYREG_PRT4_AMUX\r
+#define SCSI_Out__MSG_raw__BIE CYREG_PRT4_BIE\r
+#define SCSI_Out__MSG_raw__BIT_MASK CYREG_PRT4_BIT_MASK\r
+#define SCSI_Out__MSG_raw__BYP CYREG_PRT4_BYP\r
+#define SCSI_Out__MSG_raw__CTL CYREG_PRT4_CTL\r
+#define SCSI_Out__MSG_raw__DM0 CYREG_PRT4_DM0\r
+#define SCSI_Out__MSG_raw__DM1 CYREG_PRT4_DM1\r
+#define SCSI_Out__MSG_raw__DM2 CYREG_PRT4_DM2\r
+#define SCSI_Out__MSG_raw__DR CYREG_PRT4_DR\r
+#define SCSI_Out__MSG_raw__INP_DIS CYREG_PRT4_INP_DIS\r
+#define SCSI_Out__MSG_raw__INTTYPE CYREG_PICU4_INTTYPE4\r
+#define SCSI_Out__MSG_raw__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG\r
+#define SCSI_Out__MSG_raw__LCD_EN CYREG_PRT4_LCD_EN\r
+#define SCSI_Out__MSG_raw__MASK 0x10u\r
+#define SCSI_Out__MSG_raw__PC CYREG_PRT4_PC4\r
+#define SCSI_Out__MSG_raw__PORT 4u\r
+#define SCSI_Out__MSG_raw__PRT CYREG_PRT4_PRT\r
+#define SCSI_Out__MSG_raw__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL\r
+#define SCSI_Out__MSG_raw__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN\r
+#define SCSI_Out__MSG_raw__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0\r
+#define SCSI_Out__MSG_raw__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1\r
+#define SCSI_Out__MSG_raw__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0\r
+#define SCSI_Out__MSG_raw__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1\r
+#define SCSI_Out__MSG_raw__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT\r
+#define SCSI_Out__MSG_raw__PS CYREG_PRT4_PS\r
+#define SCSI_Out__MSG_raw__SHIFT 4u\r
+#define SCSI_Out__MSG_raw__SLW CYREG_PRT4_SLW\r
+#define SCSI_Out__REQ__AG CYREG_PRT0_AG\r
+#define SCSI_Out__REQ__AMUX CYREG_PRT0_AMUX\r
+#define SCSI_Out__REQ__BIE CYREG_PRT0_BIE\r
+#define SCSI_Out__REQ__BIT_MASK CYREG_PRT0_BIT_MASK\r
+#define SCSI_Out__REQ__BYP CYREG_PRT0_BYP\r
+#define SCSI_Out__REQ__CTL CYREG_PRT0_CTL\r
+#define SCSI_Out__REQ__DM0 CYREG_PRT0_DM0\r
+#define SCSI_Out__REQ__DM1 CYREG_PRT0_DM1\r
+#define SCSI_Out__REQ__DM2 CYREG_PRT0_DM2\r
+#define SCSI_Out__REQ__DR CYREG_PRT0_DR\r
+#define SCSI_Out__REQ__INP_DIS CYREG_PRT0_INP_DIS\r
+#define SCSI_Out__REQ__INTTYPE CYREG_PICU0_INTTYPE3\r
+#define SCSI_Out__REQ__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
+#define SCSI_Out__REQ__LCD_EN CYREG_PRT0_LCD_EN\r
+#define SCSI_Out__REQ__MASK 0x08u\r
+#define SCSI_Out__REQ__PC CYREG_PRT0_PC3\r
+#define SCSI_Out__REQ__PORT 0u\r
+#define SCSI_Out__REQ__PRT CYREG_PRT0_PRT\r
+#define SCSI_Out__REQ__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
+#define SCSI_Out__REQ__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
+#define SCSI_Out__REQ__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
+#define SCSI_Out__REQ__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
+#define SCSI_Out__REQ__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
+#define SCSI_Out__REQ__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
+#define SCSI_Out__REQ__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
+#define SCSI_Out__REQ__PS CYREG_PRT0_PS\r
+#define SCSI_Out__REQ__SHIFT 3u\r
+#define SCSI_Out__REQ__SLW CYREG_PRT0_SLW\r
+#define SCSI_Out__RST__AG CYREG_PRT4_AG\r
+#define SCSI_Out__RST__AMUX CYREG_PRT4_AMUX\r
+#define SCSI_Out__RST__BIE CYREG_PRT4_BIE\r
+#define SCSI_Out__RST__BIT_MASK CYREG_PRT4_BIT_MASK\r
+#define SCSI_Out__RST__BYP CYREG_PRT4_BYP\r
+#define SCSI_Out__RST__CTL CYREG_PRT4_CTL\r
+#define SCSI_Out__RST__DM0 CYREG_PRT4_DM0\r
+#define SCSI_Out__RST__DM1 CYREG_PRT4_DM1\r
+#define SCSI_Out__RST__DM2 CYREG_PRT4_DM2\r
+#define SCSI_Out__RST__DR CYREG_PRT4_DR\r
+#define SCSI_Out__RST__INP_DIS CYREG_PRT4_INP_DIS\r
+#define SCSI_Out__RST__INTTYPE CYREG_PICU4_INTTYPE5\r
+#define SCSI_Out__RST__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG\r
+#define SCSI_Out__RST__LCD_EN CYREG_PRT4_LCD_EN\r
+#define SCSI_Out__RST__MASK 0x20u\r
+#define SCSI_Out__RST__PC CYREG_PRT4_PC5\r
+#define SCSI_Out__RST__PORT 4u\r
+#define SCSI_Out__RST__PRT CYREG_PRT4_PRT\r
+#define SCSI_Out__RST__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL\r
+#define SCSI_Out__RST__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN\r
+#define SCSI_Out__RST__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0\r
+#define SCSI_Out__RST__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1\r
+#define SCSI_Out__RST__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0\r
+#define SCSI_Out__RST__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1\r
+#define SCSI_Out__RST__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT\r
+#define SCSI_Out__RST__PS CYREG_PRT4_PS\r
+#define SCSI_Out__RST__SHIFT 5u\r
+#define SCSI_Out__RST__SLW CYREG_PRT4_SLW\r
+#define SCSI_Out__SEL__AG CYREG_PRT0_AG\r
+#define SCSI_Out__SEL__AMUX CYREG_PRT0_AMUX\r
+#define SCSI_Out__SEL__BIE CYREG_PRT0_BIE\r
+#define SCSI_Out__SEL__BIT_MASK CYREG_PRT0_BIT_MASK\r
+#define SCSI_Out__SEL__BYP CYREG_PRT0_BYP\r
+#define SCSI_Out__SEL__CTL CYREG_PRT0_CTL\r
+#define SCSI_Out__SEL__DM0 CYREG_PRT0_DM0\r
+#define SCSI_Out__SEL__DM1 CYREG_PRT0_DM1\r
+#define SCSI_Out__SEL__DM2 CYREG_PRT0_DM2\r
+#define SCSI_Out__SEL__DR CYREG_PRT0_DR\r
+#define SCSI_Out__SEL__INP_DIS CYREG_PRT0_INP_DIS\r
+#define SCSI_Out__SEL__INTTYPE CYREG_PICU0_INTTYPE7\r
+#define SCSI_Out__SEL__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
+#define SCSI_Out__SEL__LCD_EN CYREG_PRT0_LCD_EN\r
+#define SCSI_Out__SEL__MASK 0x80u\r
+#define SCSI_Out__SEL__PC CYREG_PRT0_PC7\r
+#define SCSI_Out__SEL__PORT 0u\r
+#define SCSI_Out__SEL__PRT CYREG_PRT0_PRT\r
+#define SCSI_Out__SEL__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
+#define SCSI_Out__SEL__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
+#define SCSI_Out__SEL__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
+#define SCSI_Out__SEL__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
+#define SCSI_Out__SEL__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
+#define SCSI_Out__SEL__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
+#define SCSI_Out__SEL__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
+#define SCSI_Out__SEL__PS CYREG_PRT0_PS\r
+#define SCSI_Out__SEL__SHIFT 7u\r
+#define SCSI_Out__SEL__SLW CYREG_PRT0_SLW\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__0__MASK 0x01u\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__0__POS 0\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__1__MASK 0x02u\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__1__POS 1\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG CYREG_B0_UDB10_11_ACTL\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG CYREG_B0_UDB10_11_CTL\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG CYREG_B0_UDB10_11_CTL\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG CYREG_B0_UDB10_11_CTL\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG CYREG_B0_UDB10_11_CTL\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_MASK_REG CYREG_B0_UDB10_11_MSK\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG CYREG_B0_UDB10_11_MSK\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG CYREG_B0_UDB10_11_MSK\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG CYREG_B0_UDB10_11_MSK\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__2__MASK 0x04u\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__2__POS 2\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__3__MASK 0x08u\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__3__POS 3\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__4__MASK 0x10u\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__4__POS 4\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__5__MASK 0x20u\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__5__POS 5\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__6__MASK 0x40u\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__6__POS 6\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__7__MASK 0x80u\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__7__POS 7\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_AUX_CTL_REG CYREG_B0_UDB10_ACTL\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_REG CYREG_B0_UDB10_CTL\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_ST_REG CYREG_B0_UDB10_ST_CTL\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__COUNT_REG CYREG_B0_UDB10_CTL\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__COUNT_ST_REG CYREG_B0_UDB10_ST_CTL\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__MASK 0xFFu\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG CYREG_B0_UDB10_MSK_ACTL\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG CYREG_B0_UDB10_MSK_ACTL\r
+#define SCSI_Out_Bits_Sync_ctrl_reg__PERIOD_REG CYREG_B0_UDB10_MSK\r
+#define SCSI_Out_Ctl_Sync_ctrl_reg__0__MASK 0x01u\r
+#define SCSI_Out_Ctl_Sync_ctrl_reg__0__POS 0\r
+#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG CYREG_B0_UDB07_08_ACTL\r
+#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG CYREG_B0_UDB07_08_CTL\r
+#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG CYREG_B0_UDB07_08_CTL\r
+#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG CYREG_B0_UDB07_08_CTL\r
+#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG CYREG_B0_UDB07_08_CTL\r
+#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG CYREG_B0_UDB07_08_MSK\r
+#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG CYREG_B0_UDB07_08_MSK\r
+#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG CYREG_B0_UDB07_08_MSK\r
+#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG CYREG_B0_UDB07_08_MSK\r
+#define SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG CYREG_B0_UDB07_ACTL\r
+#define SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_REG CYREG_B0_UDB07_CTL\r
+#define SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_ST_REG CYREG_B0_UDB07_ST_CTL\r
+#define SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_REG CYREG_B0_UDB07_CTL\r
+#define SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_ST_REG CYREG_B0_UDB07_ST_CTL\r
+#define SCSI_Out_Ctl_Sync_ctrl_reg__MASK 0x01u\r
+#define SCSI_Out_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG CYREG_B0_UDB07_MSK_ACTL\r
+#define SCSI_Out_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG CYREG_B0_UDB07_MSK_ACTL\r
+#define SCSI_Out_Ctl_Sync_ctrl_reg__PERIOD_REG CYREG_B0_UDB07_MSK\r
+#define SCSI_Out_DBx__0__AG CYREG_PRT5_AG\r
+#define SCSI_Out_DBx__0__AMUX CYREG_PRT5_AMUX\r
+#define SCSI_Out_DBx__0__BIE CYREG_PRT5_BIE\r
+#define SCSI_Out_DBx__0__BIT_MASK CYREG_PRT5_BIT_MASK\r
+#define SCSI_Out_DBx__0__BYP CYREG_PRT5_BYP\r
+#define SCSI_Out_DBx__0__CTL CYREG_PRT5_CTL\r
+#define SCSI_Out_DBx__0__DM0 CYREG_PRT5_DM0\r
+#define SCSI_Out_DBx__0__DM1 CYREG_PRT5_DM1\r
+#define SCSI_Out_DBx__0__DM2 CYREG_PRT5_DM2\r
+#define SCSI_Out_DBx__0__DR CYREG_PRT5_DR\r
+#define SCSI_Out_DBx__0__INP_DIS CYREG_PRT5_INP_DIS\r
+#define SCSI_Out_DBx__0__INTTYPE CYREG_PICU5_INTTYPE1\r
+#define SCSI_Out_DBx__0__LCD_COM_SEG CYREG_PRT5_LCD_COM_SEG\r
+#define SCSI_Out_DBx__0__LCD_EN CYREG_PRT5_LCD_EN\r
+#define SCSI_Out_DBx__0__MASK 0x02u\r
+#define SCSI_Out_DBx__0__PC CYREG_PRT5_PC1\r
+#define SCSI_Out_DBx__0__PORT 5u\r
+#define SCSI_Out_DBx__0__PRT CYREG_PRT5_PRT\r
+#define SCSI_Out_DBx__0__PRTDSI__CAPS_SEL CYREG_PRT5_CAPS_SEL\r
+#define SCSI_Out_DBx__0__PRTDSI__DBL_SYNC_IN CYREG_PRT5_DBL_SYNC_IN\r
+#define SCSI_Out_DBx__0__PRTDSI__OE_SEL0 CYREG_PRT5_OE_SEL0\r
+#define SCSI_Out_DBx__0__PRTDSI__OE_SEL1 CYREG_PRT5_OE_SEL1\r
+#define SCSI_Out_DBx__0__PRTDSI__OUT_SEL0 CYREG_PRT5_OUT_SEL0\r
+#define SCSI_Out_DBx__0__PRTDSI__OUT_SEL1 CYREG_PRT5_OUT_SEL1\r
+#define SCSI_Out_DBx__0__PRTDSI__SYNC_OUT CYREG_PRT5_SYNC_OUT\r
+#define SCSI_Out_DBx__0__PS CYREG_PRT5_PS\r
+#define SCSI_Out_DBx__0__SHIFT 1u\r
+#define SCSI_Out_DBx__0__SLW CYREG_PRT5_SLW\r
+#define SCSI_Out_DBx__1__AG CYREG_PRT5_AG\r
+#define SCSI_Out_DBx__1__AMUX CYREG_PRT5_AMUX\r
+#define SCSI_Out_DBx__1__BIE CYREG_PRT5_BIE\r
+#define SCSI_Out_DBx__1__BIT_MASK CYREG_PRT5_BIT_MASK\r
+#define SCSI_Out_DBx__1__BYP CYREG_PRT5_BYP\r
+#define SCSI_Out_DBx__1__CTL CYREG_PRT5_CTL\r
+#define SCSI_Out_DBx__1__DM0 CYREG_PRT5_DM0\r
+#define SCSI_Out_DBx__1__DM1 CYREG_PRT5_DM1\r
+#define SCSI_Out_DBx__1__DM2 CYREG_PRT5_DM2\r
+#define SCSI_Out_DBx__1__DR CYREG_PRT5_DR\r
+#define SCSI_Out_DBx__1__INP_DIS CYREG_PRT5_INP_DIS\r
+#define SCSI_Out_DBx__1__INTTYPE CYREG_PICU5_INTTYPE0\r
+#define SCSI_Out_DBx__1__LCD_COM_SEG CYREG_PRT5_LCD_COM_SEG\r
+#define SCSI_Out_DBx__1__LCD_EN CYREG_PRT5_LCD_EN\r
+#define SCSI_Out_DBx__1__MASK 0x01u\r
+#define SCSI_Out_DBx__1__PC CYREG_PRT5_PC0\r
+#define SCSI_Out_DBx__1__PORT 5u\r
+#define SCSI_Out_DBx__1__PRT CYREG_PRT5_PRT\r
+#define SCSI_Out_DBx__1__PRTDSI__CAPS_SEL CYREG_PRT5_CAPS_SEL\r
+#define SCSI_Out_DBx__1__PRTDSI__DBL_SYNC_IN CYREG_PRT5_DBL_SYNC_IN\r
+#define SCSI_Out_DBx__1__PRTDSI__OE_SEL0 CYREG_PRT5_OE_SEL0\r
+#define SCSI_Out_DBx__1__PRTDSI__OE_SEL1 CYREG_PRT5_OE_SEL1\r
+#define SCSI_Out_DBx__1__PRTDSI__OUT_SEL0 CYREG_PRT5_OUT_SEL0\r
+#define SCSI_Out_DBx__1__PRTDSI__OUT_SEL1 CYREG_PRT5_OUT_SEL1\r
+#define SCSI_Out_DBx__1__PRTDSI__SYNC_OUT CYREG_PRT5_SYNC_OUT\r
+#define SCSI_Out_DBx__1__PS CYREG_PRT5_PS\r
+#define SCSI_Out_DBx__1__SHIFT 0u\r
+#define SCSI_Out_DBx__1__SLW CYREG_PRT5_SLW\r
+#define SCSI_Out_DBx__2__AG CYREG_PRT6_AG\r
+#define SCSI_Out_DBx__2__AMUX CYREG_PRT6_AMUX\r
+#define SCSI_Out_DBx__2__BIE CYREG_PRT6_BIE\r
+#define SCSI_Out_DBx__2__BIT_MASK CYREG_PRT6_BIT_MASK\r
+#define SCSI_Out_DBx__2__BYP CYREG_PRT6_BYP\r
+#define SCSI_Out_DBx__2__CTL CYREG_PRT6_CTL\r
+#define SCSI_Out_DBx__2__DM0 CYREG_PRT6_DM0\r
+#define SCSI_Out_DBx__2__DM1 CYREG_PRT6_DM1\r
+#define SCSI_Out_DBx__2__DM2 CYREG_PRT6_DM2\r
+#define SCSI_Out_DBx__2__DR CYREG_PRT6_DR\r
+#define SCSI_Out_DBx__2__INP_DIS CYREG_PRT6_INP_DIS\r
+#define SCSI_Out_DBx__2__INTTYPE CYREG_PICU6_INTTYPE5\r
+#define SCSI_Out_DBx__2__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
+#define SCSI_Out_DBx__2__LCD_EN CYREG_PRT6_LCD_EN\r
+#define SCSI_Out_DBx__2__MASK 0x20u\r
+#define SCSI_Out_DBx__2__PC CYREG_PRT6_PC5\r
+#define SCSI_Out_DBx__2__PORT 6u\r
+#define SCSI_Out_DBx__2__PRT CYREG_PRT6_PRT\r
+#define SCSI_Out_DBx__2__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
+#define SCSI_Out_DBx__2__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
+#define SCSI_Out_DBx__2__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
+#define SCSI_Out_DBx__2__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
+#define SCSI_Out_DBx__2__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
+#define SCSI_Out_DBx__2__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
+#define SCSI_Out_DBx__2__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
+#define SCSI_Out_DBx__2__PS CYREG_PRT6_PS\r
+#define SCSI_Out_DBx__2__SHIFT 5u\r
+#define SCSI_Out_DBx__2__SLW CYREG_PRT6_SLW\r
+#define SCSI_Out_DBx__3__AG CYREG_PRT6_AG\r
+#define SCSI_Out_DBx__3__AMUX CYREG_PRT6_AMUX\r
+#define SCSI_Out_DBx__3__BIE CYREG_PRT6_BIE\r
+#define SCSI_Out_DBx__3__BIT_MASK CYREG_PRT6_BIT_MASK\r
+#define SCSI_Out_DBx__3__BYP CYREG_PRT6_BYP\r
+#define SCSI_Out_DBx__3__CTL CYREG_PRT6_CTL\r
+#define SCSI_Out_DBx__3__DM0 CYREG_PRT6_DM0\r
+#define SCSI_Out_DBx__3__DM1 CYREG_PRT6_DM1\r
+#define SCSI_Out_DBx__3__DM2 CYREG_PRT6_DM2\r
+#define SCSI_Out_DBx__3__DR CYREG_PRT6_DR\r
+#define SCSI_Out_DBx__3__INP_DIS CYREG_PRT6_INP_DIS\r
+#define SCSI_Out_DBx__3__INTTYPE CYREG_PICU6_INTTYPE4\r
+#define SCSI_Out_DBx__3__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
+#define SCSI_Out_DBx__3__LCD_EN CYREG_PRT6_LCD_EN\r
+#define SCSI_Out_DBx__3__MASK 0x10u\r
+#define SCSI_Out_DBx__3__PC CYREG_PRT6_PC4\r
+#define SCSI_Out_DBx__3__PORT 6u\r
+#define SCSI_Out_DBx__3__PRT CYREG_PRT6_PRT\r
+#define SCSI_Out_DBx__3__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
+#define SCSI_Out_DBx__3__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
+#define SCSI_Out_DBx__3__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
+#define SCSI_Out_DBx__3__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
+#define SCSI_Out_DBx__3__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
+#define SCSI_Out_DBx__3__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
+#define SCSI_Out_DBx__3__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
+#define SCSI_Out_DBx__3__PS CYREG_PRT6_PS\r
+#define SCSI_Out_DBx__3__SHIFT 4u\r
+#define SCSI_Out_DBx__3__SLW CYREG_PRT6_SLW\r
+#define SCSI_Out_DBx__4__AG CYREG_PRT2_AG\r
+#define SCSI_Out_DBx__4__AMUX CYREG_PRT2_AMUX\r
+#define SCSI_Out_DBx__4__BIE CYREG_PRT2_BIE\r
+#define SCSI_Out_DBx__4__BIT_MASK CYREG_PRT2_BIT_MASK\r
+#define SCSI_Out_DBx__4__BYP CYREG_PRT2_BYP\r
+#define SCSI_Out_DBx__4__CTL CYREG_PRT2_CTL\r
+#define SCSI_Out_DBx__4__DM0 CYREG_PRT2_DM0\r
+#define SCSI_Out_DBx__4__DM1 CYREG_PRT2_DM1\r
+#define SCSI_Out_DBx__4__DM2 CYREG_PRT2_DM2\r
+#define SCSI_Out_DBx__4__DR CYREG_PRT2_DR\r
+#define SCSI_Out_DBx__4__INP_DIS CYREG_PRT2_INP_DIS\r
+#define SCSI_Out_DBx__4__INTTYPE CYREG_PICU2_INTTYPE7\r
+#define SCSI_Out_DBx__4__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG\r
+#define SCSI_Out_DBx__4__LCD_EN CYREG_PRT2_LCD_EN\r
+#define SCSI_Out_DBx__4__MASK 0x80u\r
+#define SCSI_Out_DBx__4__PC CYREG_PRT2_PC7\r
+#define SCSI_Out_DBx__4__PORT 2u\r
+#define SCSI_Out_DBx__4__PRT CYREG_PRT2_PRT\r
+#define SCSI_Out_DBx__4__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL\r
+#define SCSI_Out_DBx__4__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN\r
+#define SCSI_Out_DBx__4__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0\r
+#define SCSI_Out_DBx__4__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1\r
+#define SCSI_Out_DBx__4__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0\r
+#define SCSI_Out_DBx__4__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1\r
+#define SCSI_Out_DBx__4__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT\r
+#define SCSI_Out_DBx__4__PS CYREG_PRT2_PS\r
+#define SCSI_Out_DBx__4__SHIFT 7u\r
+#define SCSI_Out_DBx__4__SLW CYREG_PRT2_SLW\r
+#define SCSI_Out_DBx__5__AG CYREG_PRT2_AG\r
+#define SCSI_Out_DBx__5__AMUX CYREG_PRT2_AMUX\r
+#define SCSI_Out_DBx__5__BIE CYREG_PRT2_BIE\r
+#define SCSI_Out_DBx__5__BIT_MASK CYREG_PRT2_BIT_MASK\r
+#define SCSI_Out_DBx__5__BYP CYREG_PRT2_BYP\r
+#define SCSI_Out_DBx__5__CTL CYREG_PRT2_CTL\r
+#define SCSI_Out_DBx__5__DM0 CYREG_PRT2_DM0\r
+#define SCSI_Out_DBx__5__DM1 CYREG_PRT2_DM1\r
+#define SCSI_Out_DBx__5__DM2 CYREG_PRT2_DM2\r
+#define SCSI_Out_DBx__5__DR CYREG_PRT2_DR\r
+#define SCSI_Out_DBx__5__INP_DIS CYREG_PRT2_INP_DIS\r
+#define SCSI_Out_DBx__5__INTTYPE CYREG_PICU2_INTTYPE6\r
+#define SCSI_Out_DBx__5__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG\r
+#define SCSI_Out_DBx__5__LCD_EN CYREG_PRT2_LCD_EN\r
+#define SCSI_Out_DBx__5__MASK 0x40u\r
+#define SCSI_Out_DBx__5__PC CYREG_PRT2_PC6\r
+#define SCSI_Out_DBx__5__PORT 2u\r
+#define SCSI_Out_DBx__5__PRT CYREG_PRT2_PRT\r
+#define SCSI_Out_DBx__5__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL\r
+#define SCSI_Out_DBx__5__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN\r
+#define SCSI_Out_DBx__5__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0\r
+#define SCSI_Out_DBx__5__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1\r
+#define SCSI_Out_DBx__5__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0\r
+#define SCSI_Out_DBx__5__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1\r
+#define SCSI_Out_DBx__5__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT\r
+#define SCSI_Out_DBx__5__PS CYREG_PRT2_PS\r
+#define SCSI_Out_DBx__5__SHIFT 6u\r
+#define SCSI_Out_DBx__5__SLW CYREG_PRT2_SLW\r
+#define SCSI_Out_DBx__6__AG CYREG_PRT2_AG\r
+#define SCSI_Out_DBx__6__AMUX CYREG_PRT2_AMUX\r
+#define SCSI_Out_DBx__6__BIE CYREG_PRT2_BIE\r
+#define SCSI_Out_DBx__6__BIT_MASK CYREG_PRT2_BIT_MASK\r
+#define SCSI_Out_DBx__6__BYP CYREG_PRT2_BYP\r
+#define SCSI_Out_DBx__6__CTL CYREG_PRT2_CTL\r
+#define SCSI_Out_DBx__6__DM0 CYREG_PRT2_DM0\r
+#define SCSI_Out_DBx__6__DM1 CYREG_PRT2_DM1\r
+#define SCSI_Out_DBx__6__DM2 CYREG_PRT2_DM2\r
+#define SCSI_Out_DBx__6__DR CYREG_PRT2_DR\r
+#define SCSI_Out_DBx__6__INP_DIS CYREG_PRT2_INP_DIS\r
+#define SCSI_Out_DBx__6__INTTYPE CYREG_PICU2_INTTYPE3\r
+#define SCSI_Out_DBx__6__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG\r
+#define SCSI_Out_DBx__6__LCD_EN CYREG_PRT2_LCD_EN\r
+#define SCSI_Out_DBx__6__MASK 0x08u\r
+#define SCSI_Out_DBx__6__PC CYREG_PRT2_PC3\r
+#define SCSI_Out_DBx__6__PORT 2u\r
+#define SCSI_Out_DBx__6__PRT CYREG_PRT2_PRT\r
+#define SCSI_Out_DBx__6__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL\r
+#define SCSI_Out_DBx__6__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN\r
+#define SCSI_Out_DBx__6__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0\r
+#define SCSI_Out_DBx__6__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1\r
+#define SCSI_Out_DBx__6__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0\r
+#define SCSI_Out_DBx__6__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1\r
+#define SCSI_Out_DBx__6__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT\r
+#define SCSI_Out_DBx__6__PS CYREG_PRT2_PS\r
+#define SCSI_Out_DBx__6__SHIFT 3u\r
+#define SCSI_Out_DBx__6__SLW CYREG_PRT2_SLW\r
+#define SCSI_Out_DBx__7__AG CYREG_PRT2_AG\r
+#define SCSI_Out_DBx__7__AMUX CYREG_PRT2_AMUX\r
+#define SCSI_Out_DBx__7__BIE CYREG_PRT2_BIE\r
+#define SCSI_Out_DBx__7__BIT_MASK CYREG_PRT2_BIT_MASK\r
+#define SCSI_Out_DBx__7__BYP CYREG_PRT2_BYP\r
+#define SCSI_Out_DBx__7__CTL CYREG_PRT2_CTL\r
+#define SCSI_Out_DBx__7__DM0 CYREG_PRT2_DM0\r
+#define SCSI_Out_DBx__7__DM1 CYREG_PRT2_DM1\r
+#define SCSI_Out_DBx__7__DM2 CYREG_PRT2_DM2\r
+#define SCSI_Out_DBx__7__DR CYREG_PRT2_DR\r
+#define SCSI_Out_DBx__7__INP_DIS CYREG_PRT2_INP_DIS\r
+#define SCSI_Out_DBx__7__INTTYPE CYREG_PICU2_INTTYPE2\r
+#define SCSI_Out_DBx__7__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG\r
+#define SCSI_Out_DBx__7__LCD_EN CYREG_PRT2_LCD_EN\r
+#define SCSI_Out_DBx__7__MASK 0x04u\r
+#define SCSI_Out_DBx__7__PC CYREG_PRT2_PC2\r
+#define SCSI_Out_DBx__7__PORT 2u\r
+#define SCSI_Out_DBx__7__PRT CYREG_PRT2_PRT\r
+#define SCSI_Out_DBx__7__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL\r
+#define SCSI_Out_DBx__7__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN\r
+#define SCSI_Out_DBx__7__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0\r
+#define SCSI_Out_DBx__7__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1\r
+#define SCSI_Out_DBx__7__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0\r
+#define SCSI_Out_DBx__7__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1\r
+#define SCSI_Out_DBx__7__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT\r
+#define SCSI_Out_DBx__7__PS CYREG_PRT2_PS\r
+#define SCSI_Out_DBx__7__SHIFT 2u\r
+#define SCSI_Out_DBx__7__SLW CYREG_PRT2_SLW\r
+#define SCSI_Out_DBx__DB0__AG CYREG_PRT5_AG\r
+#define SCSI_Out_DBx__DB0__AMUX CYREG_PRT5_AMUX\r
+#define SCSI_Out_DBx__DB0__BIE CYREG_PRT5_BIE\r
+#define SCSI_Out_DBx__DB0__BIT_MASK CYREG_PRT5_BIT_MASK\r
+#define SCSI_Out_DBx__DB0__BYP CYREG_PRT5_BYP\r
+#define SCSI_Out_DBx__DB0__CTL CYREG_PRT5_CTL\r
+#define SCSI_Out_DBx__DB0__DM0 CYREG_PRT5_DM0\r
+#define SCSI_Out_DBx__DB0__DM1 CYREG_PRT5_DM1\r
+#define SCSI_Out_DBx__DB0__DM2 CYREG_PRT5_DM2\r
+#define SCSI_Out_DBx__DB0__DR CYREG_PRT5_DR\r
+#define SCSI_Out_DBx__DB0__INP_DIS CYREG_PRT5_INP_DIS\r
+#define SCSI_Out_DBx__DB0__INTTYPE CYREG_PICU5_INTTYPE1\r
+#define SCSI_Out_DBx__DB0__LCD_COM_SEG CYREG_PRT5_LCD_COM_SEG\r
+#define SCSI_Out_DBx__DB0__LCD_EN CYREG_PRT5_LCD_EN\r
+#define SCSI_Out_DBx__DB0__MASK 0x02u\r
+#define SCSI_Out_DBx__DB0__PC CYREG_PRT5_PC1\r
+#define SCSI_Out_DBx__DB0__PORT 5u\r
+#define SCSI_Out_DBx__DB0__PRT CYREG_PRT5_PRT\r
+#define SCSI_Out_DBx__DB0__PRTDSI__CAPS_SEL CYREG_PRT5_CAPS_SEL\r
+#define SCSI_Out_DBx__DB0__PRTDSI__DBL_SYNC_IN CYREG_PRT5_DBL_SYNC_IN\r
+#define SCSI_Out_DBx__DB0__PRTDSI__OE_SEL0 CYREG_PRT5_OE_SEL0\r
+#define SCSI_Out_DBx__DB0__PRTDSI__OE_SEL1 CYREG_PRT5_OE_SEL1\r
+#define SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL0 CYREG_PRT5_OUT_SEL0\r
+#define SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL1 CYREG_PRT5_OUT_SEL1\r
+#define SCSI_Out_DBx__DB0__PRTDSI__SYNC_OUT CYREG_PRT5_SYNC_OUT\r
+#define SCSI_Out_DBx__DB0__PS CYREG_PRT5_PS\r
+#define SCSI_Out_DBx__DB0__SHIFT 1u\r
+#define SCSI_Out_DBx__DB0__SLW CYREG_PRT5_SLW\r
+#define SCSI_Out_DBx__DB1__AG CYREG_PRT5_AG\r
+#define SCSI_Out_DBx__DB1__AMUX CYREG_PRT5_AMUX\r
+#define SCSI_Out_DBx__DB1__BIE CYREG_PRT5_BIE\r
+#define SCSI_Out_DBx__DB1__BIT_MASK CYREG_PRT5_BIT_MASK\r
+#define SCSI_Out_DBx__DB1__BYP CYREG_PRT5_BYP\r
+#define SCSI_Out_DBx__DB1__CTL CYREG_PRT5_CTL\r
+#define SCSI_Out_DBx__DB1__DM0 CYREG_PRT5_DM0\r
+#define SCSI_Out_DBx__DB1__DM1 CYREG_PRT5_DM1\r
+#define SCSI_Out_DBx__DB1__DM2 CYREG_PRT5_DM2\r
+#define SCSI_Out_DBx__DB1__DR CYREG_PRT5_DR\r
+#define SCSI_Out_DBx__DB1__INP_DIS CYREG_PRT5_INP_DIS\r
+#define SCSI_Out_DBx__DB1__INTTYPE CYREG_PICU5_INTTYPE0\r
+#define SCSI_Out_DBx__DB1__LCD_COM_SEG CYREG_PRT5_LCD_COM_SEG\r
+#define SCSI_Out_DBx__DB1__LCD_EN CYREG_PRT5_LCD_EN\r
+#define SCSI_Out_DBx__DB1__MASK 0x01u\r
+#define SCSI_Out_DBx__DB1__PC CYREG_PRT5_PC0\r
+#define SCSI_Out_DBx__DB1__PORT 5u\r
+#define SCSI_Out_DBx__DB1__PRT CYREG_PRT5_PRT\r
+#define SCSI_Out_DBx__DB1__PRTDSI__CAPS_SEL CYREG_PRT5_CAPS_SEL\r
+#define SCSI_Out_DBx__DB1__PRTDSI__DBL_SYNC_IN CYREG_PRT5_DBL_SYNC_IN\r
+#define SCSI_Out_DBx__DB1__PRTDSI__OE_SEL0 CYREG_PRT5_OE_SEL0\r
+#define SCSI_Out_DBx__DB1__PRTDSI__OE_SEL1 CYREG_PRT5_OE_SEL1\r
+#define SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL0 CYREG_PRT5_OUT_SEL0\r
+#define SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL1 CYREG_PRT5_OUT_SEL1\r
+#define SCSI_Out_DBx__DB1__PRTDSI__SYNC_OUT CYREG_PRT5_SYNC_OUT\r
+#define SCSI_Out_DBx__DB1__PS CYREG_PRT5_PS\r
+#define SCSI_Out_DBx__DB1__SHIFT 0u\r
+#define SCSI_Out_DBx__DB1__SLW CYREG_PRT5_SLW\r
+#define SCSI_Out_DBx__DB2__AG CYREG_PRT6_AG\r
+#define SCSI_Out_DBx__DB2__AMUX CYREG_PRT6_AMUX\r
+#define SCSI_Out_DBx__DB2__BIE CYREG_PRT6_BIE\r
+#define SCSI_Out_DBx__DB2__BIT_MASK CYREG_PRT6_BIT_MASK\r
+#define SCSI_Out_DBx__DB2__BYP CYREG_PRT6_BYP\r
+#define SCSI_Out_DBx__DB2__CTL CYREG_PRT6_CTL\r
+#define SCSI_Out_DBx__DB2__DM0 CYREG_PRT6_DM0\r
+#define SCSI_Out_DBx__DB2__DM1 CYREG_PRT6_DM1\r
+#define SCSI_Out_DBx__DB2__DM2 CYREG_PRT6_DM2\r
+#define SCSI_Out_DBx__DB2__DR CYREG_PRT6_DR\r
+#define SCSI_Out_DBx__DB2__INP_DIS CYREG_PRT6_INP_DIS\r
+#define SCSI_Out_DBx__DB2__INTTYPE CYREG_PICU6_INTTYPE5\r
+#define SCSI_Out_DBx__DB2__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
+#define SCSI_Out_DBx__DB2__LCD_EN CYREG_PRT6_LCD_EN\r
+#define SCSI_Out_DBx__DB2__MASK 0x20u\r
+#define SCSI_Out_DBx__DB2__PC CYREG_PRT6_PC5\r
+#define SCSI_Out_DBx__DB2__PORT 6u\r
+#define SCSI_Out_DBx__DB2__PRT CYREG_PRT6_PRT\r
+#define SCSI_Out_DBx__DB2__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
+#define SCSI_Out_DBx__DB2__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
+#define SCSI_Out_DBx__DB2__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
+#define SCSI_Out_DBx__DB2__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
+#define SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
+#define SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
+#define SCSI_Out_DBx__DB2__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
+#define SCSI_Out_DBx__DB2__PS CYREG_PRT6_PS\r
+#define SCSI_Out_DBx__DB2__SHIFT 5u\r
+#define SCSI_Out_DBx__DB2__SLW CYREG_PRT6_SLW\r
+#define SCSI_Out_DBx__DB3__AG CYREG_PRT6_AG\r
+#define SCSI_Out_DBx__DB3__AMUX CYREG_PRT6_AMUX\r
+#define SCSI_Out_DBx__DB3__BIE CYREG_PRT6_BIE\r
+#define SCSI_Out_DBx__DB3__BIT_MASK CYREG_PRT6_BIT_MASK\r
+#define SCSI_Out_DBx__DB3__BYP CYREG_PRT6_BYP\r
+#define SCSI_Out_DBx__DB3__CTL CYREG_PRT6_CTL\r
+#define SCSI_Out_DBx__DB3__DM0 CYREG_PRT6_DM0\r
+#define SCSI_Out_DBx__DB3__DM1 CYREG_PRT6_DM1\r
+#define SCSI_Out_DBx__DB3__DM2 CYREG_PRT6_DM2\r
+#define SCSI_Out_DBx__DB3__DR CYREG_PRT6_DR\r
+#define SCSI_Out_DBx__DB3__INP_DIS CYREG_PRT6_INP_DIS\r
+#define SCSI_Out_DBx__DB3__INTTYPE CYREG_PICU6_INTTYPE4\r
+#define SCSI_Out_DBx__DB3__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
+#define SCSI_Out_DBx__DB3__LCD_EN CYREG_PRT6_LCD_EN\r
+#define SCSI_Out_DBx__DB3__MASK 0x10u\r
+#define SCSI_Out_DBx__DB3__PC CYREG_PRT6_PC4\r
+#define SCSI_Out_DBx__DB3__PORT 6u\r
+#define SCSI_Out_DBx__DB3__PRT CYREG_PRT6_PRT\r
+#define SCSI_Out_DBx__DB3__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
+#define SCSI_Out_DBx__DB3__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
+#define SCSI_Out_DBx__DB3__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
+#define SCSI_Out_DBx__DB3__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
+#define SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
+#define SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
+#define SCSI_Out_DBx__DB3__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
+#define SCSI_Out_DBx__DB3__PS CYREG_PRT6_PS\r
+#define SCSI_Out_DBx__DB3__SHIFT 4u\r
+#define SCSI_Out_DBx__DB3__SLW CYREG_PRT6_SLW\r
+#define SCSI_Out_DBx__DB4__AG CYREG_PRT2_AG\r
+#define SCSI_Out_DBx__DB4__AMUX CYREG_PRT2_AMUX\r
+#define SCSI_Out_DBx__DB4__BIE CYREG_PRT2_BIE\r
+#define SCSI_Out_DBx__DB4__BIT_MASK CYREG_PRT2_BIT_MASK\r
+#define SCSI_Out_DBx__DB4__BYP CYREG_PRT2_BYP\r
+#define SCSI_Out_DBx__DB4__CTL CYREG_PRT2_CTL\r
+#define SCSI_Out_DBx__DB4__DM0 CYREG_PRT2_DM0\r
+#define SCSI_Out_DBx__DB4__DM1 CYREG_PRT2_DM1\r
+#define SCSI_Out_DBx__DB4__DM2 CYREG_PRT2_DM2\r
+#define SCSI_Out_DBx__DB4__DR CYREG_PRT2_DR\r
+#define SCSI_Out_DBx__DB4__INP_DIS CYREG_PRT2_INP_DIS\r
+#define SCSI_Out_DBx__DB4__INTTYPE CYREG_PICU2_INTTYPE7\r
+#define SCSI_Out_DBx__DB4__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG\r
+#define SCSI_Out_DBx__DB4__LCD_EN CYREG_PRT2_LCD_EN\r
+#define SCSI_Out_DBx__DB4__MASK 0x80u\r
+#define SCSI_Out_DBx__DB4__PC CYREG_PRT2_PC7\r
+#define SCSI_Out_DBx__DB4__PORT 2u\r
+#define SCSI_Out_DBx__DB4__PRT CYREG_PRT2_PRT\r
+#define SCSI_Out_DBx__DB4__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL\r
+#define SCSI_Out_DBx__DB4__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN\r
+#define SCSI_Out_DBx__DB4__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0\r
+#define SCSI_Out_DBx__DB4__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1\r
+#define SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0\r
+#define SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1\r
+#define SCSI_Out_DBx__DB4__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT\r
+#define SCSI_Out_DBx__DB4__PS CYREG_PRT2_PS\r
+#define SCSI_Out_DBx__DB4__SHIFT 7u\r
+#define SCSI_Out_DBx__DB4__SLW CYREG_PRT2_SLW\r
+#define SCSI_Out_DBx__DB5__AG CYREG_PRT2_AG\r
+#define SCSI_Out_DBx__DB5__AMUX CYREG_PRT2_AMUX\r
+#define SCSI_Out_DBx__DB5__BIE CYREG_PRT2_BIE\r
+#define SCSI_Out_DBx__DB5__BIT_MASK CYREG_PRT2_BIT_MASK\r
+#define SCSI_Out_DBx__DB5__BYP CYREG_PRT2_BYP\r
+#define SCSI_Out_DBx__DB5__CTL CYREG_PRT2_CTL\r
+#define SCSI_Out_DBx__DB5__DM0 CYREG_PRT2_DM0\r
+#define SCSI_Out_DBx__DB5__DM1 CYREG_PRT2_DM1\r
+#define SCSI_Out_DBx__DB5__DM2 CYREG_PRT2_DM2\r
+#define SCSI_Out_DBx__DB5__DR CYREG_PRT2_DR\r
+#define SCSI_Out_DBx__DB5__INP_DIS CYREG_PRT2_INP_DIS\r
+#define SCSI_Out_DBx__DB5__INTTYPE CYREG_PICU2_INTTYPE6\r
+#define SCSI_Out_DBx__DB5__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG\r
+#define SCSI_Out_DBx__DB5__LCD_EN CYREG_PRT2_LCD_EN\r
+#define SCSI_Out_DBx__DB5__MASK 0x40u\r
+#define SCSI_Out_DBx__DB5__PC CYREG_PRT2_PC6\r
+#define SCSI_Out_DBx__DB5__PORT 2u\r
+#define SCSI_Out_DBx__DB5__PRT CYREG_PRT2_PRT\r
+#define SCSI_Out_DBx__DB5__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL\r
+#define SCSI_Out_DBx__DB5__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN\r
+#define SCSI_Out_DBx__DB5__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0\r
+#define SCSI_Out_DBx__DB5__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1\r
+#define SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0\r
+#define SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1\r
+#define SCSI_Out_DBx__DB5__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT\r
+#define SCSI_Out_DBx__DB5__PS CYREG_PRT2_PS\r
+#define SCSI_Out_DBx__DB5__SHIFT 6u\r
+#define SCSI_Out_DBx__DB5__SLW CYREG_PRT2_SLW\r
+#define SCSI_Out_DBx__DB6__AG CYREG_PRT2_AG\r
+#define SCSI_Out_DBx__DB6__AMUX CYREG_PRT2_AMUX\r
+#define SCSI_Out_DBx__DB6__BIE CYREG_PRT2_BIE\r
+#define SCSI_Out_DBx__DB6__BIT_MASK CYREG_PRT2_BIT_MASK\r
+#define SCSI_Out_DBx__DB6__BYP CYREG_PRT2_BYP\r
+#define SCSI_Out_DBx__DB6__CTL CYREG_PRT2_CTL\r
+#define SCSI_Out_DBx__DB6__DM0 CYREG_PRT2_DM0\r
+#define SCSI_Out_DBx__DB6__DM1 CYREG_PRT2_DM1\r
+#define SCSI_Out_DBx__DB6__DM2 CYREG_PRT2_DM2\r
+#define SCSI_Out_DBx__DB6__DR CYREG_PRT2_DR\r
+#define SCSI_Out_DBx__DB6__INP_DIS CYREG_PRT2_INP_DIS\r
+#define SCSI_Out_DBx__DB6__INTTYPE CYREG_PICU2_INTTYPE3\r
+#define SCSI_Out_DBx__DB6__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG\r
+#define SCSI_Out_DBx__DB6__LCD_EN CYREG_PRT2_LCD_EN\r
+#define SCSI_Out_DBx__DB6__MASK 0x08u\r
+#define SCSI_Out_DBx__DB6__PC CYREG_PRT2_PC3\r
+#define SCSI_Out_DBx__DB6__PORT 2u\r
+#define SCSI_Out_DBx__DB6__PRT CYREG_PRT2_PRT\r
+#define SCSI_Out_DBx__DB6__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL\r
+#define SCSI_Out_DBx__DB6__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN\r
+#define SCSI_Out_DBx__DB6__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0\r
+#define SCSI_Out_DBx__DB6__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1\r
+#define SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0\r
+#define SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1\r
+#define SCSI_Out_DBx__DB6__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT\r
+#define SCSI_Out_DBx__DB6__PS CYREG_PRT2_PS\r
+#define SCSI_Out_DBx__DB6__SHIFT 3u\r
+#define SCSI_Out_DBx__DB6__SLW CYREG_PRT2_SLW\r
+#define SCSI_Out_DBx__DB7__AG CYREG_PRT2_AG\r
+#define SCSI_Out_DBx__DB7__AMUX CYREG_PRT2_AMUX\r
+#define SCSI_Out_DBx__DB7__BIE CYREG_PRT2_BIE\r
+#define SCSI_Out_DBx__DB7__BIT_MASK CYREG_PRT2_BIT_MASK\r
+#define SCSI_Out_DBx__DB7__BYP CYREG_PRT2_BYP\r
+#define SCSI_Out_DBx__DB7__CTL CYREG_PRT2_CTL\r
+#define SCSI_Out_DBx__DB7__DM0 CYREG_PRT2_DM0\r
+#define SCSI_Out_DBx__DB7__DM1 CYREG_PRT2_DM1\r
+#define SCSI_Out_DBx__DB7__DM2 CYREG_PRT2_DM2\r
+#define SCSI_Out_DBx__DB7__DR CYREG_PRT2_DR\r
+#define SCSI_Out_DBx__DB7__INP_DIS CYREG_PRT2_INP_DIS\r
+#define SCSI_Out_DBx__DB7__INTTYPE CYREG_PICU2_INTTYPE2\r
+#define SCSI_Out_DBx__DB7__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG\r
+#define SCSI_Out_DBx__DB7__LCD_EN CYREG_PRT2_LCD_EN\r
+#define SCSI_Out_DBx__DB7__MASK 0x04u\r
+#define SCSI_Out_DBx__DB7__PC CYREG_PRT2_PC2\r
+#define SCSI_Out_DBx__DB7__PORT 2u\r
+#define SCSI_Out_DBx__DB7__PRT CYREG_PRT2_PRT\r
+#define SCSI_Out_DBx__DB7__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL\r
+#define SCSI_Out_DBx__DB7__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN\r
+#define SCSI_Out_DBx__DB7__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0\r
+#define SCSI_Out_DBx__DB7__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1\r
+#define SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0\r
+#define SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1\r
+#define SCSI_Out_DBx__DB7__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT\r
+#define SCSI_Out_DBx__DB7__PS CYREG_PRT2_PS\r
+#define SCSI_Out_DBx__DB7__SHIFT 2u\r
+#define SCSI_Out_DBx__DB7__SLW CYREG_PRT2_SLW\r
+\r
+/* SD_RX_DMA */\r
+#define SD_RX_DMA__DRQ_CTL CYREG_IDMUX_DRQ_CTL0\r
+#define SD_RX_DMA__DRQ_NUMBER 2u\r
+#define SD_RX_DMA__NUMBEROF_TDS 0u\r
+#define SD_RX_DMA__PRIORITY 0u\r
+#define SD_RX_DMA__TERMIN_EN 0u\r
+#define SD_RX_DMA__TERMIN_SEL 0u\r
+#define SD_RX_DMA__TERMOUT0_EN 1u\r
+#define SD_RX_DMA__TERMOUT0_SEL 2u\r
+#define SD_RX_DMA__TERMOUT1_EN 0u\r
+#define SD_RX_DMA__TERMOUT1_SEL 0u\r
+#define SD_RX_DMA_COMPLETE__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0\r
+#define SD_RX_DMA_COMPLETE__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0\r
+#define SD_RX_DMA_COMPLETE__INTC_MASK 0x20u\r
+#define SD_RX_DMA_COMPLETE__INTC_NUMBER 5u\r
+#define SD_RX_DMA_COMPLETE__INTC_PRIOR_NUM 7u\r
+#define SD_RX_DMA_COMPLETE__INTC_PRIOR_REG CYREG_NVIC_PRI_5\r
+#define SD_RX_DMA_COMPLETE__INTC_SET_EN_REG CYREG_NVIC_SETENA0\r
+#define SD_RX_DMA_COMPLETE__INTC_SET_PD_REG CYREG_NVIC_SETPEND0\r
+\r
+/* SD_TX_DMA */\r
+#define SD_TX_DMA__DRQ_CTL CYREG_IDMUX_DRQ_CTL0\r
+#define SD_TX_DMA__DRQ_NUMBER 3u\r
+#define SD_TX_DMA__NUMBEROF_TDS 0u\r
+#define SD_TX_DMA__PRIORITY 1u\r
+#define SD_TX_DMA__TERMIN_EN 0u\r
+#define SD_TX_DMA__TERMIN_SEL 0u\r
+#define SD_TX_DMA__TERMOUT0_EN 1u\r
+#define SD_TX_DMA__TERMOUT0_SEL 3u\r
+#define SD_TX_DMA__TERMOUT1_EN 0u\r
+#define SD_TX_DMA__TERMOUT1_SEL 0u\r
+#define SD_TX_DMA_COMPLETE__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0\r
+#define SD_TX_DMA_COMPLETE__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0\r
+#define SD_TX_DMA_COMPLETE__INTC_MASK 0x40u\r
+#define SD_TX_DMA_COMPLETE__INTC_NUMBER 6u\r
+#define SD_TX_DMA_COMPLETE__INTC_PRIOR_NUM 7u\r
+#define SD_TX_DMA_COMPLETE__INTC_PRIOR_REG CYREG_NVIC_PRI_6\r
+#define SD_TX_DMA_COMPLETE__INTC_SET_EN_REG CYREG_NVIC_SETENA0\r
+#define SD_TX_DMA_COMPLETE__INTC_SET_PD_REG CYREG_NVIC_SETPEND0\r
+\r
+/* SCSI_Noise */\r
+#define SCSI_Noise__0__AG CYREG_PRT2_AG\r
+#define SCSI_Noise__0__AMUX CYREG_PRT2_AMUX\r
+#define SCSI_Noise__0__BIE CYREG_PRT2_BIE\r
+#define SCSI_Noise__0__BIT_MASK CYREG_PRT2_BIT_MASK\r
+#define SCSI_Noise__0__BYP CYREG_PRT2_BYP\r
+#define SCSI_Noise__0__CTL CYREG_PRT2_CTL\r
+#define SCSI_Noise__0__DM0 CYREG_PRT2_DM0\r
+#define SCSI_Noise__0__DM1 CYREG_PRT2_DM1\r
+#define SCSI_Noise__0__DM2 CYREG_PRT2_DM2\r
+#define SCSI_Noise__0__DR CYREG_PRT2_DR\r
+#define SCSI_Noise__0__INP_DIS CYREG_PRT2_INP_DIS\r
+#define SCSI_Noise__0__INTTYPE CYREG_PICU2_INTTYPE0\r
+#define SCSI_Noise__0__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG\r
+#define SCSI_Noise__0__LCD_EN CYREG_PRT2_LCD_EN\r
+#define SCSI_Noise__0__MASK 0x01u\r
+#define SCSI_Noise__0__PC CYREG_PRT2_PC0\r
+#define SCSI_Noise__0__PORT 2u\r
+#define SCSI_Noise__0__PRT CYREG_PRT2_PRT\r
+#define SCSI_Noise__0__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL\r
+#define SCSI_Noise__0__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN\r
+#define SCSI_Noise__0__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0\r
+#define SCSI_Noise__0__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1\r
+#define SCSI_Noise__0__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0\r
+#define SCSI_Noise__0__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1\r
+#define SCSI_Noise__0__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT\r
+#define SCSI_Noise__0__PS CYREG_PRT2_PS\r
+#define SCSI_Noise__0__SHIFT 0u\r
+#define SCSI_Noise__0__SLW CYREG_PRT2_SLW\r
+#define SCSI_Noise__1__AG CYREG_PRT6_AG\r
+#define SCSI_Noise__1__AMUX CYREG_PRT6_AMUX\r
+#define SCSI_Noise__1__BIE CYREG_PRT6_BIE\r
+#define SCSI_Noise__1__BIT_MASK CYREG_PRT6_BIT_MASK\r
+#define SCSI_Noise__1__BYP CYREG_PRT6_BYP\r
+#define SCSI_Noise__1__CTL CYREG_PRT6_CTL\r
+#define SCSI_Noise__1__DM0 CYREG_PRT6_DM0\r
+#define SCSI_Noise__1__DM1 CYREG_PRT6_DM1\r
+#define SCSI_Noise__1__DM2 CYREG_PRT6_DM2\r
+#define SCSI_Noise__1__DR CYREG_PRT6_DR\r
+#define SCSI_Noise__1__INP_DIS CYREG_PRT6_INP_DIS\r
+#define SCSI_Noise__1__INTTYPE CYREG_PICU6_INTTYPE3\r
+#define SCSI_Noise__1__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
+#define SCSI_Noise__1__LCD_EN CYREG_PRT6_LCD_EN\r
+#define SCSI_Noise__1__MASK 0x08u\r
+#define SCSI_Noise__1__PC CYREG_PRT6_PC3\r
+#define SCSI_Noise__1__PORT 6u\r
+#define SCSI_Noise__1__PRT CYREG_PRT6_PRT\r
+#define SCSI_Noise__1__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
+#define SCSI_Noise__1__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
+#define SCSI_Noise__1__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
+#define SCSI_Noise__1__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
+#define SCSI_Noise__1__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
+#define SCSI_Noise__1__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
+#define SCSI_Noise__1__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
+#define SCSI_Noise__1__PS CYREG_PRT6_PS\r
+#define SCSI_Noise__1__SHIFT 3u\r
+#define SCSI_Noise__1__SLW CYREG_PRT6_SLW\r
+#define SCSI_Noise__2__AG CYREG_PRT4_AG\r
+#define SCSI_Noise__2__AMUX CYREG_PRT4_AMUX\r
+#define SCSI_Noise__2__BIE CYREG_PRT4_BIE\r
+#define SCSI_Noise__2__BIT_MASK CYREG_PRT4_BIT_MASK\r
+#define SCSI_Noise__2__BYP CYREG_PRT4_BYP\r
+#define SCSI_Noise__2__CTL CYREG_PRT4_CTL\r
+#define SCSI_Noise__2__DM0 CYREG_PRT4_DM0\r
+#define SCSI_Noise__2__DM1 CYREG_PRT4_DM1\r
+#define SCSI_Noise__2__DM2 CYREG_PRT4_DM2\r
+#define SCSI_Noise__2__DR CYREG_PRT4_DR\r
+#define SCSI_Noise__2__INP_DIS CYREG_PRT4_INP_DIS\r
+#define SCSI_Noise__2__INTTYPE CYREG_PICU4_INTTYPE3\r
+#define SCSI_Noise__2__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG\r
+#define SCSI_Noise__2__LCD_EN CYREG_PRT4_LCD_EN\r
+#define SCSI_Noise__2__MASK 0x08u\r
+#define SCSI_Noise__2__PC CYREG_PRT4_PC3\r
+#define SCSI_Noise__2__PORT 4u\r
+#define SCSI_Noise__2__PRT CYREG_PRT4_PRT\r
+#define SCSI_Noise__2__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL\r
+#define SCSI_Noise__2__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN\r
+#define SCSI_Noise__2__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0\r
+#define SCSI_Noise__2__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1\r
+#define SCSI_Noise__2__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0\r
+#define SCSI_Noise__2__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1\r
+#define SCSI_Noise__2__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT\r
+#define SCSI_Noise__2__PS CYREG_PRT4_PS\r
+#define SCSI_Noise__2__SHIFT 3u\r
+#define SCSI_Noise__2__SLW CYREG_PRT4_SLW\r
+#define SCSI_Noise__3__AG CYREG_PRT4_AG\r
+#define SCSI_Noise__3__AMUX CYREG_PRT4_AMUX\r
+#define SCSI_Noise__3__BIE CYREG_PRT4_BIE\r
+#define SCSI_Noise__3__BIT_MASK CYREG_PRT4_BIT_MASK\r
+#define SCSI_Noise__3__BYP CYREG_PRT4_BYP\r
+#define SCSI_Noise__3__CTL CYREG_PRT4_CTL\r
+#define SCSI_Noise__3__DM0 CYREG_PRT4_DM0\r
+#define SCSI_Noise__3__DM1 CYREG_PRT4_DM1\r
+#define SCSI_Noise__3__DM2 CYREG_PRT4_DM2\r
+#define SCSI_Noise__3__DR CYREG_PRT4_DR\r
+#define SCSI_Noise__3__INP_DIS CYREG_PRT4_INP_DIS\r
+#define SCSI_Noise__3__INTTYPE CYREG_PICU4_INTTYPE7\r
+#define SCSI_Noise__3__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG\r
+#define SCSI_Noise__3__LCD_EN CYREG_PRT4_LCD_EN\r
+#define SCSI_Noise__3__MASK 0x80u\r
+#define SCSI_Noise__3__PC CYREG_PRT4_PC7\r
+#define SCSI_Noise__3__PORT 4u\r
+#define SCSI_Noise__3__PRT CYREG_PRT4_PRT\r
+#define SCSI_Noise__3__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL\r
+#define SCSI_Noise__3__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN\r
+#define SCSI_Noise__3__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0\r
+#define SCSI_Noise__3__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1\r
+#define SCSI_Noise__3__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0\r
+#define SCSI_Noise__3__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1\r
+#define SCSI_Noise__3__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT\r
+#define SCSI_Noise__3__PS CYREG_PRT4_PS\r
+#define SCSI_Noise__3__SHIFT 7u\r
+#define SCSI_Noise__3__SLW CYREG_PRT4_SLW\r
+#define SCSI_Noise__4__AG CYREG_PRT6_AG\r
+#define SCSI_Noise__4__AMUX CYREG_PRT6_AMUX\r
+#define SCSI_Noise__4__BIE CYREG_PRT6_BIE\r
+#define SCSI_Noise__4__BIT_MASK CYREG_PRT6_BIT_MASK\r
+#define SCSI_Noise__4__BYP CYREG_PRT6_BYP\r
+#define SCSI_Noise__4__CTL CYREG_PRT6_CTL\r
+#define SCSI_Noise__4__DM0 CYREG_PRT6_DM0\r
+#define SCSI_Noise__4__DM1 CYREG_PRT6_DM1\r
+#define SCSI_Noise__4__DM2 CYREG_PRT6_DM2\r
+#define SCSI_Noise__4__DR CYREG_PRT6_DR\r
+#define SCSI_Noise__4__INP_DIS CYREG_PRT6_INP_DIS\r
+#define SCSI_Noise__4__INTTYPE CYREG_PICU6_INTTYPE2\r
+#define SCSI_Noise__4__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
+#define SCSI_Noise__4__LCD_EN CYREG_PRT6_LCD_EN\r
+#define SCSI_Noise__4__MASK 0x04u\r
+#define SCSI_Noise__4__PC CYREG_PRT6_PC2\r
+#define SCSI_Noise__4__PORT 6u\r
+#define SCSI_Noise__4__PRT CYREG_PRT6_PRT\r
+#define SCSI_Noise__4__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
+#define SCSI_Noise__4__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
+#define SCSI_Noise__4__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
+#define SCSI_Noise__4__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
+#define SCSI_Noise__4__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
+#define SCSI_Noise__4__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
+#define SCSI_Noise__4__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
+#define SCSI_Noise__4__PS CYREG_PRT6_PS\r
+#define SCSI_Noise__4__SHIFT 2u\r
+#define SCSI_Noise__4__SLW CYREG_PRT6_SLW\r
+#define SCSI_Noise__ACK__AG CYREG_PRT6_AG\r
+#define SCSI_Noise__ACK__AMUX CYREG_PRT6_AMUX\r
+#define SCSI_Noise__ACK__BIE CYREG_PRT6_BIE\r
+#define SCSI_Noise__ACK__BIT_MASK CYREG_PRT6_BIT_MASK\r
+#define SCSI_Noise__ACK__BYP CYREG_PRT6_BYP\r
+#define SCSI_Noise__ACK__CTL CYREG_PRT6_CTL\r
+#define SCSI_Noise__ACK__DM0 CYREG_PRT6_DM0\r
+#define SCSI_Noise__ACK__DM1 CYREG_PRT6_DM1\r
+#define SCSI_Noise__ACK__DM2 CYREG_PRT6_DM2\r
+#define SCSI_Noise__ACK__DR CYREG_PRT6_DR\r
+#define SCSI_Noise__ACK__INP_DIS CYREG_PRT6_INP_DIS\r
+#define SCSI_Noise__ACK__INTTYPE CYREG_PICU6_INTTYPE2\r
+#define SCSI_Noise__ACK__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
+#define SCSI_Noise__ACK__LCD_EN CYREG_PRT6_LCD_EN\r
+#define SCSI_Noise__ACK__MASK 0x04u\r
+#define SCSI_Noise__ACK__PC CYREG_PRT6_PC2\r
+#define SCSI_Noise__ACK__PORT 6u\r
+#define SCSI_Noise__ACK__PRT CYREG_PRT6_PRT\r
+#define SCSI_Noise__ACK__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
+#define SCSI_Noise__ACK__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
+#define SCSI_Noise__ACK__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
+#define SCSI_Noise__ACK__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
+#define SCSI_Noise__ACK__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
+#define SCSI_Noise__ACK__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
+#define SCSI_Noise__ACK__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
+#define SCSI_Noise__ACK__PS CYREG_PRT6_PS\r
+#define SCSI_Noise__ACK__SHIFT 2u\r
+#define SCSI_Noise__ACK__SLW CYREG_PRT6_SLW\r
+#define SCSI_Noise__ATN__AG CYREG_PRT2_AG\r
+#define SCSI_Noise__ATN__AMUX CYREG_PRT2_AMUX\r
+#define SCSI_Noise__ATN__BIE CYREG_PRT2_BIE\r
+#define SCSI_Noise__ATN__BIT_MASK CYREG_PRT2_BIT_MASK\r
+#define SCSI_Noise__ATN__BYP CYREG_PRT2_BYP\r
+#define SCSI_Noise__ATN__CTL CYREG_PRT2_CTL\r
+#define SCSI_Noise__ATN__DM0 CYREG_PRT2_DM0\r
+#define SCSI_Noise__ATN__DM1 CYREG_PRT2_DM1\r
+#define SCSI_Noise__ATN__DM2 CYREG_PRT2_DM2\r
+#define SCSI_Noise__ATN__DR CYREG_PRT2_DR\r
+#define SCSI_Noise__ATN__INP_DIS CYREG_PRT2_INP_DIS\r
+#define SCSI_Noise__ATN__INTTYPE CYREG_PICU2_INTTYPE0\r
+#define SCSI_Noise__ATN__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG\r
+#define SCSI_Noise__ATN__LCD_EN CYREG_PRT2_LCD_EN\r
+#define SCSI_Noise__ATN__MASK 0x01u\r
+#define SCSI_Noise__ATN__PC CYREG_PRT2_PC0\r
+#define SCSI_Noise__ATN__PORT 2u\r
+#define SCSI_Noise__ATN__PRT CYREG_PRT2_PRT\r
+#define SCSI_Noise__ATN__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL\r
+#define SCSI_Noise__ATN__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN\r
+#define SCSI_Noise__ATN__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0\r
+#define SCSI_Noise__ATN__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1\r
+#define SCSI_Noise__ATN__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0\r
+#define SCSI_Noise__ATN__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1\r
+#define SCSI_Noise__ATN__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT\r
+#define SCSI_Noise__ATN__PS CYREG_PRT2_PS\r
+#define SCSI_Noise__ATN__SHIFT 0u\r
+#define SCSI_Noise__ATN__SLW CYREG_PRT2_SLW\r
+#define SCSI_Noise__BSY__AG CYREG_PRT6_AG\r
+#define SCSI_Noise__BSY__AMUX CYREG_PRT6_AMUX\r
+#define SCSI_Noise__BSY__BIE CYREG_PRT6_BIE\r
+#define SCSI_Noise__BSY__BIT_MASK CYREG_PRT6_BIT_MASK\r
+#define SCSI_Noise__BSY__BYP CYREG_PRT6_BYP\r
+#define SCSI_Noise__BSY__CTL CYREG_PRT6_CTL\r
+#define SCSI_Noise__BSY__DM0 CYREG_PRT6_DM0\r
+#define SCSI_Noise__BSY__DM1 CYREG_PRT6_DM1\r
+#define SCSI_Noise__BSY__DM2 CYREG_PRT6_DM2\r
+#define SCSI_Noise__BSY__DR CYREG_PRT6_DR\r
+#define SCSI_Noise__BSY__INP_DIS CYREG_PRT6_INP_DIS\r
+#define SCSI_Noise__BSY__INTTYPE CYREG_PICU6_INTTYPE3\r
+#define SCSI_Noise__BSY__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
+#define SCSI_Noise__BSY__LCD_EN CYREG_PRT6_LCD_EN\r
+#define SCSI_Noise__BSY__MASK 0x08u\r
+#define SCSI_Noise__BSY__PC CYREG_PRT6_PC3\r
+#define SCSI_Noise__BSY__PORT 6u\r
+#define SCSI_Noise__BSY__PRT CYREG_PRT6_PRT\r
+#define SCSI_Noise__BSY__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
+#define SCSI_Noise__BSY__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
+#define SCSI_Noise__BSY__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
+#define SCSI_Noise__BSY__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
+#define SCSI_Noise__BSY__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
+#define SCSI_Noise__BSY__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
+#define SCSI_Noise__BSY__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
+#define SCSI_Noise__BSY__PS CYREG_PRT6_PS\r
+#define SCSI_Noise__BSY__SHIFT 3u\r
+#define SCSI_Noise__BSY__SLW CYREG_PRT6_SLW\r
+#define SCSI_Noise__RST__AG CYREG_PRT4_AG\r
+#define SCSI_Noise__RST__AMUX CYREG_PRT4_AMUX\r
+#define SCSI_Noise__RST__BIE CYREG_PRT4_BIE\r
+#define SCSI_Noise__RST__BIT_MASK CYREG_PRT4_BIT_MASK\r
+#define SCSI_Noise__RST__BYP CYREG_PRT4_BYP\r
+#define SCSI_Noise__RST__CTL CYREG_PRT4_CTL\r
+#define SCSI_Noise__RST__DM0 CYREG_PRT4_DM0\r
+#define SCSI_Noise__RST__DM1 CYREG_PRT4_DM1\r
+#define SCSI_Noise__RST__DM2 CYREG_PRT4_DM2\r
+#define SCSI_Noise__RST__DR CYREG_PRT4_DR\r
+#define SCSI_Noise__RST__INP_DIS CYREG_PRT4_INP_DIS\r
+#define SCSI_Noise__RST__INTTYPE CYREG_PICU4_INTTYPE7\r
+#define SCSI_Noise__RST__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG\r
+#define SCSI_Noise__RST__LCD_EN CYREG_PRT4_LCD_EN\r
+#define SCSI_Noise__RST__MASK 0x80u\r
+#define SCSI_Noise__RST__PC CYREG_PRT4_PC7\r
+#define SCSI_Noise__RST__PORT 4u\r
+#define SCSI_Noise__RST__PRT CYREG_PRT4_PRT\r
+#define SCSI_Noise__RST__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL\r
+#define SCSI_Noise__RST__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN\r
+#define SCSI_Noise__RST__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0\r
+#define SCSI_Noise__RST__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1\r
+#define SCSI_Noise__RST__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0\r
+#define SCSI_Noise__RST__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1\r
+#define SCSI_Noise__RST__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT\r
+#define SCSI_Noise__RST__PS CYREG_PRT4_PS\r
+#define SCSI_Noise__RST__SHIFT 7u\r
+#define SCSI_Noise__RST__SLW CYREG_PRT4_SLW\r
+#define SCSI_Noise__SEL__AG CYREG_PRT4_AG\r
+#define SCSI_Noise__SEL__AMUX CYREG_PRT4_AMUX\r
+#define SCSI_Noise__SEL__BIE CYREG_PRT4_BIE\r
+#define SCSI_Noise__SEL__BIT_MASK CYREG_PRT4_BIT_MASK\r
+#define SCSI_Noise__SEL__BYP CYREG_PRT4_BYP\r
+#define SCSI_Noise__SEL__CTL CYREG_PRT4_CTL\r
+#define SCSI_Noise__SEL__DM0 CYREG_PRT4_DM0\r
+#define SCSI_Noise__SEL__DM1 CYREG_PRT4_DM1\r
+#define SCSI_Noise__SEL__DM2 CYREG_PRT4_DM2\r
+#define SCSI_Noise__SEL__DR CYREG_PRT4_DR\r
+#define SCSI_Noise__SEL__INP_DIS CYREG_PRT4_INP_DIS\r
+#define SCSI_Noise__SEL__INTTYPE CYREG_PICU4_INTTYPE3\r
+#define SCSI_Noise__SEL__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG\r
+#define SCSI_Noise__SEL__LCD_EN CYREG_PRT4_LCD_EN\r
+#define SCSI_Noise__SEL__MASK 0x08u\r
+#define SCSI_Noise__SEL__PC CYREG_PRT4_PC3\r
+#define SCSI_Noise__SEL__PORT 4u\r
+#define SCSI_Noise__SEL__PRT CYREG_PRT4_PRT\r
+#define SCSI_Noise__SEL__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL\r
+#define SCSI_Noise__SEL__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN\r
+#define SCSI_Noise__SEL__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0\r
+#define SCSI_Noise__SEL__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1\r
+#define SCSI_Noise__SEL__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0\r
+#define SCSI_Noise__SEL__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1\r
+#define SCSI_Noise__SEL__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT\r
+#define SCSI_Noise__SEL__PS CYREG_PRT4_PS\r
+#define SCSI_Noise__SEL__SHIFT 3u\r
+#define SCSI_Noise__SEL__SLW CYREG_PRT4_SLW\r
+\r
/* scsiTarget */\r
#define scsiTarget_datapath__16BIT_A0_REG CYREG_B0_UDB00_01_A0\r
#define scsiTarget_datapath__16BIT_A1_REG CYREG_B0_UDB00_01_A1\r
#define scsiTarget_StatusReg__0__POS 0\r
#define scsiTarget_StatusReg__1__MASK 0x02u\r
#define scsiTarget_StatusReg__1__POS 1\r
-#define scsiTarget_StatusReg__16BIT_STATUS_AUX_CTL_REG CYREG_B0_UDB02_03_ACTL\r
-#define scsiTarget_StatusReg__16BIT_STATUS_REG CYREG_B0_UDB02_03_ST\r
+#define scsiTarget_StatusReg__16BIT_STATUS_AUX_CTL_REG CYREG_B0_UDB07_08_ACTL\r
+#define scsiTarget_StatusReg__16BIT_STATUS_REG CYREG_B0_UDB07_08_ST\r
#define scsiTarget_StatusReg__2__MASK 0x04u\r
#define scsiTarget_StatusReg__2__POS 2\r
#define scsiTarget_StatusReg__3__MASK 0x08u\r
#define scsiTarget_StatusReg__4__MASK 0x10u\r
#define scsiTarget_StatusReg__4__POS 4\r
#define scsiTarget_StatusReg__MASK 0x1Fu\r
-#define scsiTarget_StatusReg__MASK_REG CYREG_B0_UDB02_MSK\r
-#define scsiTarget_StatusReg__STATUS_AUX_CTL_REG CYREG_B0_UDB02_ACTL\r
-#define scsiTarget_StatusReg__STATUS_REG CYREG_B0_UDB02_ST\r
+#define scsiTarget_StatusReg__MASK_REG CYREG_B0_UDB07_MSK\r
+#define scsiTarget_StatusReg__MASK_ST_AUX_CTL_REG CYREG_B0_UDB07_MSK_ACTL\r
+#define scsiTarget_StatusReg__PER_ST_AUX_CTL_REG CYREG_B0_UDB07_MSK_ACTL\r
+#define scsiTarget_StatusReg__STATUS_AUX_CTL_REG CYREG_B0_UDB07_ACTL\r
+#define scsiTarget_StatusReg__STATUS_CNT_REG CYREG_B0_UDB07_ST_CTL\r
+#define scsiTarget_StatusReg__STATUS_CONTROL_REG CYREG_B0_UDB07_ST_CTL\r
+#define scsiTarget_StatusReg__STATUS_REG CYREG_B0_UDB07_ST\r
+\r
+/* Debug_Timer */\r
+#define Debug_Timer_Interrupt__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0\r
+#define Debug_Timer_Interrupt__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0\r
+#define Debug_Timer_Interrupt__INTC_MASK 0x01u\r
+#define Debug_Timer_Interrupt__INTC_NUMBER 0u\r
+#define Debug_Timer_Interrupt__INTC_PRIOR_NUM 7u\r
+#define Debug_Timer_Interrupt__INTC_PRIOR_REG CYREG_NVIC_PRI_0\r
+#define Debug_Timer_Interrupt__INTC_SET_EN_REG CYREG_NVIC_SETENA0\r
+#define Debug_Timer_Interrupt__INTC_SET_PD_REG CYREG_NVIC_SETPEND0\r
+#define Debug_Timer_TimerHW__CAP0 CYREG_TMR0_CAP0\r
+#define Debug_Timer_TimerHW__CAP1 CYREG_TMR0_CAP1\r
+#define Debug_Timer_TimerHW__CFG0 CYREG_TMR0_CFG0\r
+#define Debug_Timer_TimerHW__CFG1 CYREG_TMR0_CFG1\r
+#define Debug_Timer_TimerHW__CFG2 CYREG_TMR0_CFG2\r
+#define Debug_Timer_TimerHW__CNT_CMP0 CYREG_TMR0_CNT_CMP0\r
+#define Debug_Timer_TimerHW__CNT_CMP1 CYREG_TMR0_CNT_CMP1\r
+#define Debug_Timer_TimerHW__PER0 CYREG_TMR0_PER0\r
+#define Debug_Timer_TimerHW__PER1 CYREG_TMR0_PER1\r
+#define Debug_Timer_TimerHW__PM_ACT_CFG CYREG_PM_ACT_CFG3\r
+#define Debug_Timer_TimerHW__PM_ACT_MSK 0x01u\r
+#define Debug_Timer_TimerHW__PM_STBY_CFG CYREG_PM_STBY_CFG3\r
+#define Debug_Timer_TimerHW__PM_STBY_MSK 0x01u\r
+#define Debug_Timer_TimerHW__RT0 CYREG_TMR0_RT0\r
+#define Debug_Timer_TimerHW__RT1 CYREG_TMR0_RT1\r
+#define Debug_Timer_TimerHW__SR0 CYREG_TMR0_SR0\r
+\r
+/* SCSI_RX_DMA */\r
+#define SCSI_RX_DMA__DRQ_CTL CYREG_IDMUX_DRQ_CTL0\r
+#define SCSI_RX_DMA__DRQ_NUMBER 0u\r
+#define SCSI_RX_DMA__NUMBEROF_TDS 0u\r
+#define SCSI_RX_DMA__PRIORITY 2u\r
+#define SCSI_RX_DMA__TERMIN_EN 0u\r
+#define SCSI_RX_DMA__TERMIN_SEL 0u\r
+#define SCSI_RX_DMA__TERMOUT0_EN 1u\r
+#define SCSI_RX_DMA__TERMOUT0_SEL 0u\r
+#define SCSI_RX_DMA__TERMOUT1_EN 0u\r
+#define SCSI_RX_DMA__TERMOUT1_SEL 0u\r
+#define SCSI_RX_DMA_COMPLETE__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0\r
+#define SCSI_RX_DMA_COMPLETE__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0\r
+#define SCSI_RX_DMA_COMPLETE__INTC_MASK 0x04u\r
+#define SCSI_RX_DMA_COMPLETE__INTC_NUMBER 2u\r
+#define SCSI_RX_DMA_COMPLETE__INTC_PRIOR_NUM 7u\r
+#define SCSI_RX_DMA_COMPLETE__INTC_PRIOR_REG CYREG_NVIC_PRI_2\r
+#define SCSI_RX_DMA_COMPLETE__INTC_SET_EN_REG CYREG_NVIC_SETENA0\r
+#define SCSI_RX_DMA_COMPLETE__INTC_SET_PD_REG CYREG_NVIC_SETPEND0\r
+\r
+/* SCSI_TX_DMA */\r
+#define SCSI_TX_DMA__DRQ_CTL CYREG_IDMUX_DRQ_CTL0\r
+#define SCSI_TX_DMA__DRQ_NUMBER 1u\r
+#define SCSI_TX_DMA__NUMBEROF_TDS 0u\r
+#define SCSI_TX_DMA__PRIORITY 2u\r
+#define SCSI_TX_DMA__TERMIN_EN 0u\r
+#define SCSI_TX_DMA__TERMIN_SEL 0u\r
+#define SCSI_TX_DMA__TERMOUT0_EN 1u\r
+#define SCSI_TX_DMA__TERMOUT0_SEL 1u\r
+#define SCSI_TX_DMA__TERMOUT1_EN 0u\r
+#define SCSI_TX_DMA__TERMOUT1_SEL 0u\r
+#define SCSI_TX_DMA_COMPLETE__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0\r
+#define SCSI_TX_DMA_COMPLETE__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0\r
+#define SCSI_TX_DMA_COMPLETE__INTC_MASK 0x10u\r
+#define SCSI_TX_DMA_COMPLETE__INTC_NUMBER 4u\r
+#define SCSI_TX_DMA_COMPLETE__INTC_PRIOR_NUM 7u\r
+#define SCSI_TX_DMA_COMPLETE__INTC_PRIOR_REG CYREG_NVIC_PRI_4\r
+#define SCSI_TX_DMA_COMPLETE__INTC_SET_EN_REG CYREG_NVIC_SETENA0\r
+#define SCSI_TX_DMA_COMPLETE__INTC_SET_PD_REG CYREG_NVIC_SETPEND0\r
+\r
+/* SD_Data_Clk */\r
+#define SD_Data_Clk__CFG0 CYREG_CLKDIST_DCFG0_CFG0\r
+#define SD_Data_Clk__CFG1 CYREG_CLKDIST_DCFG0_CFG1\r
+#define SD_Data_Clk__CFG2 CYREG_CLKDIST_DCFG0_CFG2\r
+#define SD_Data_Clk__CFG2_SRC_SEL_MASK 0x07u\r
+#define SD_Data_Clk__INDEX 0x00u\r
+#define SD_Data_Clk__PM_ACT_CFG CYREG_PM_ACT_CFG2\r
+#define SD_Data_Clk__PM_ACT_MSK 0x01u\r
+#define SD_Data_Clk__PM_STBY_CFG CYREG_PM_STBY_CFG2\r
+#define SD_Data_Clk__PM_STBY_MSK 0x01u\r
\r
/* timer_clock */\r
#define timer_clock__CFG0 CYREG_CLKDIST_DCFG2_CFG0\r
#define timer_clock__PM_STBY_CFG CYREG_PM_STBY_CFG2\r
#define timer_clock__PM_STBY_MSK 0x04u\r
\r
+/* SCSI_RST_ISR */\r
+#define SCSI_RST_ISR__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0\r
+#define SCSI_RST_ISR__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0\r
+#define SCSI_RST_ISR__INTC_MASK 0x02u\r
+#define SCSI_RST_ISR__INTC_NUMBER 1u\r
+#define SCSI_RST_ISR__INTC_PRIOR_NUM 7u\r
+#define SCSI_RST_ISR__INTC_PRIOR_REG CYREG_NVIC_PRI_1\r
+#define SCSI_RST_ISR__INTC_SET_EN_REG CYREG_NVIC_SETENA0\r
+#define SCSI_RST_ISR__INTC_SET_PD_REG CYREG_NVIC_SETPEND0\r
+\r
+/* SCSI_SEL_ISR */\r
+#define SCSI_SEL_ISR__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0\r
+#define SCSI_SEL_ISR__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0\r
+#define SCSI_SEL_ISR__INTC_MASK 0x08u\r
+#define SCSI_SEL_ISR__INTC_NUMBER 3u\r
+#define SCSI_SEL_ISR__INTC_PRIOR_NUM 7u\r
+#define SCSI_SEL_ISR__INTC_PRIOR_REG CYREG_NVIC_PRI_3\r
+#define SCSI_SEL_ISR__INTC_SET_EN_REG CYREG_NVIC_SETENA0\r
+#define SCSI_SEL_ISR__INTC_SET_PD_REG CYREG_NVIC_SETPEND0\r
+\r
+/* SCSI_Filtered */\r
+#define SCSI_Filtered_sts_sts_reg__0__MASK 0x01u\r
+#define SCSI_Filtered_sts_sts_reg__0__POS 0\r
+#define SCSI_Filtered_sts_sts_reg__1__MASK 0x02u\r
+#define SCSI_Filtered_sts_sts_reg__1__POS 1\r
+#define SCSI_Filtered_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG CYREG_B0_UDB13_14_ACTL\r
+#define SCSI_Filtered_sts_sts_reg__16BIT_STATUS_REG CYREG_B0_UDB13_14_ST\r
+#define SCSI_Filtered_sts_sts_reg__2__MASK 0x04u\r
+#define SCSI_Filtered_sts_sts_reg__2__POS 2\r
+#define SCSI_Filtered_sts_sts_reg__3__MASK 0x08u\r
+#define SCSI_Filtered_sts_sts_reg__3__POS 3\r
+#define SCSI_Filtered_sts_sts_reg__4__MASK 0x10u\r
+#define SCSI_Filtered_sts_sts_reg__4__POS 4\r
+#define SCSI_Filtered_sts_sts_reg__MASK 0x1Fu\r
+#define SCSI_Filtered_sts_sts_reg__MASK_REG CYREG_B0_UDB13_MSK\r
+#define SCSI_Filtered_sts_sts_reg__STATUS_AUX_CTL_REG CYREG_B0_UDB13_ACTL\r
+#define SCSI_Filtered_sts_sts_reg__STATUS_REG CYREG_B0_UDB13_ST\r
+\r
+/* SCSI_CTL_PHASE */\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__0__MASK 0x01u\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__0__POS 0\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__1__MASK 0x02u\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__1__POS 1\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG CYREG_B0_UDB02_03_ACTL\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG CYREG_B0_UDB02_03_CTL\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG CYREG_B0_UDB02_03_CTL\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG CYREG_B0_UDB02_03_CTL\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG CYREG_B0_UDB02_03_CTL\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_MASK_REG CYREG_B0_UDB02_03_MSK\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG CYREG_B0_UDB02_03_MSK\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG CYREG_B0_UDB02_03_MSK\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG CYREG_B0_UDB02_03_MSK\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__2__MASK 0x04u\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__2__POS 2\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_AUX_CTL_REG CYREG_B0_UDB02_ACTL\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_REG CYREG_B0_UDB02_CTL\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_ST_REG CYREG_B0_UDB02_ST_CTL\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_REG CYREG_B0_UDB02_CTL\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_ST_REG CYREG_B0_UDB02_ST_CTL\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__MASK 0x07u\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG CYREG_B0_UDB02_MSK_ACTL\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG CYREG_B0_UDB02_MSK_ACTL\r
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__PERIOD_REG CYREG_B0_UDB02_MSK\r
+\r
+/* SCSI_Glitch_Ctl */\r
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__0__MASK 0x01u\r
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__0__POS 0\r
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG CYREG_B0_UDB03_04_ACTL\r
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG CYREG_B0_UDB03_04_CTL\r
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG CYREG_B0_UDB03_04_CTL\r
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG CYREG_B0_UDB03_04_CTL\r
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG CYREG_B0_UDB03_04_CTL\r
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG CYREG_B0_UDB03_04_MSK\r
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG CYREG_B0_UDB03_04_MSK\r
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG CYREG_B0_UDB03_04_MSK\r
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG CYREG_B0_UDB03_04_MSK\r
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG CYREG_B0_UDB03_ACTL\r
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_REG CYREG_B0_UDB03_CTL\r
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_ST_REG CYREG_B0_UDB03_ST_CTL\r
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__COUNT_REG CYREG_B0_UDB03_CTL\r
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__COUNT_ST_REG CYREG_B0_UDB03_ST_CTL\r
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__MASK 0x01u\r
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG CYREG_B0_UDB03_MSK_ACTL\r
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG CYREG_B0_UDB03_MSK_ACTL\r
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__PERIOD_REG CYREG_B0_UDB03_MSK\r
+\r
+/* SCSI_Parity_Error */\r
+#define SCSI_Parity_Error_sts_sts_reg__0__MASK 0x01u\r
+#define SCSI_Parity_Error_sts_sts_reg__0__POS 0\r
+#define SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG CYREG_B0_UDB11_12_ACTL\r
+#define SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_REG CYREG_B0_UDB11_12_ST\r
+#define SCSI_Parity_Error_sts_sts_reg__MASK 0x01u\r
+#define SCSI_Parity_Error_sts_sts_reg__MASK_REG CYREG_B0_UDB11_MSK\r
+#define SCSI_Parity_Error_sts_sts_reg__STATUS_AUX_CTL_REG CYREG_B0_UDB11_ACTL\r
+#define SCSI_Parity_Error_sts_sts_reg__STATUS_REG CYREG_B0_UDB11_ST\r
+\r
/* Miscellaneous */\r
#define BCLK__BUS_CLK__HZ 50000000U\r
#define BCLK__BUS_CLK__KHZ 50000U\r
#define BCLK__BUS_CLK__MHZ 50U\r
#define CY_PROJECT_NAME "SCSI2SD"\r
-#define CY_VERSION "PSoC Creator 4.1"\r
+#define CY_VERSION "PSoC Creator 4.2"\r
#define CYDEV_CHIP_DIE_LEOPARD 1u\r
-#define CYDEV_CHIP_DIE_PSOC4A 16u\r
+#define CYDEV_CHIP_DIE_PSOC4A 18u\r
#define CYDEV_CHIP_DIE_PSOC5LP 2u\r
#define CYDEV_CHIP_DIE_PSOC5TM 3u\r
#define CYDEV_CHIP_DIE_TMA4 4u\r
#define CYDEV_CHIP_FAMILY_USED CYDEV_CHIP_FAMILY_PSOC5\r
#define CYDEV_CHIP_JTAG_ID 0x2E133069u\r
#define CYDEV_CHIP_MEMBER_3A 1u\r
-#define CYDEV_CHIP_MEMBER_4A 16u\r
-#define CYDEV_CHIP_MEMBER_4D 12u\r
+#define CYDEV_CHIP_MEMBER_4A 18u\r
+#define CYDEV_CHIP_MEMBER_4D 13u\r
#define CYDEV_CHIP_MEMBER_4E 6u\r
-#define CYDEV_CHIP_MEMBER_4F 17u\r
+#define CYDEV_CHIP_MEMBER_4F 19u\r
#define CYDEV_CHIP_MEMBER_4G 4u\r
-#define CYDEV_CHIP_MEMBER_4H 15u\r
-#define CYDEV_CHIP_MEMBER_4I 21u\r
-#define CYDEV_CHIP_MEMBER_4J 13u\r
-#define CYDEV_CHIP_MEMBER_4K 14u\r
-#define CYDEV_CHIP_MEMBER_4L 20u\r
-#define CYDEV_CHIP_MEMBER_4M 19u\r
-#define CYDEV_CHIP_MEMBER_4N 9u\r
+#define CYDEV_CHIP_MEMBER_4H 17u\r
+#define CYDEV_CHIP_MEMBER_4I 23u\r
+#define CYDEV_CHIP_MEMBER_4J 14u\r
+#define CYDEV_CHIP_MEMBER_4K 15u\r
+#define CYDEV_CHIP_MEMBER_4L 22u\r
+#define CYDEV_CHIP_MEMBER_4M 21u\r
+#define CYDEV_CHIP_MEMBER_4N 10u\r
#define CYDEV_CHIP_MEMBER_4O 7u\r
-#define CYDEV_CHIP_MEMBER_4P 18u\r
-#define CYDEV_CHIP_MEMBER_4Q 11u\r
+#define CYDEV_CHIP_MEMBER_4P 20u\r
+#define CYDEV_CHIP_MEMBER_4Q 12u\r
#define CYDEV_CHIP_MEMBER_4R 8u\r
-#define CYDEV_CHIP_MEMBER_4S 10u\r
+#define CYDEV_CHIP_MEMBER_4S 11u\r
+#define CYDEV_CHIP_MEMBER_4T 9u\r
#define CYDEV_CHIP_MEMBER_4U 5u\r
+#define CYDEV_CHIP_MEMBER_4V 16u\r
#define CYDEV_CHIP_MEMBER_5A 3u\r
#define CYDEV_CHIP_MEMBER_5B 2u\r
-#define CYDEV_CHIP_MEMBER_6A 22u\r
-#define CYDEV_CHIP_MEMBER_FM3 26u\r
-#define CYDEV_CHIP_MEMBER_FM4 27u\r
-#define CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE1 23u\r
-#define CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE2 24u\r
-#define CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE3 25u\r
+#define CYDEV_CHIP_MEMBER_6A 24u\r
+#define CYDEV_CHIP_MEMBER_FM3 28u\r
+#define CYDEV_CHIP_MEMBER_FM4 29u\r
+#define CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE1 25u\r
+#define CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE2 26u\r
+#define CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE3 27u\r
#define CYDEV_CHIP_MEMBER_UNKNOWN 0u\r
#define CYDEV_CHIP_MEMBER_USED CYDEV_CHIP_MEMBER_5B\r
#define CYDEV_CHIP_DIE_EXPECT CYDEV_CHIP_MEMBER_USED\r
#define CYDEV_CHIP_REVISION_4A_ES0 17u\r
#define CYDEV_CHIP_REVISION_4A_PRODUCTION 17u\r
#define CYDEV_CHIP_REVISION_4D_PRODUCTION 0u\r
+#define CYDEV_CHIP_REVISION_4E_CCG2_NO_USBPD 0u\r
#define CYDEV_CHIP_REVISION_4E_PRODUCTION 0u\r
#define CYDEV_CHIP_REVISION_4F_PRODUCTION 0u\r
#define CYDEV_CHIP_REVISION_4F_PRODUCTION_256DMA 0u\r
#define CYDEV_CHIP_REVISION_4Q_PRODUCTION 0u\r
#define CYDEV_CHIP_REVISION_4R_PRODUCTION 0u\r
#define CYDEV_CHIP_REVISION_4S_PRODUCTION 0u\r
+#define CYDEV_CHIP_REVISION_4T_PRODUCTION 0u\r
#define CYDEV_CHIP_REVISION_4U_PRODUCTION 0u\r
+#define CYDEV_CHIP_REVISION_4V_PRODUCTION 0u\r
#define CYDEV_CHIP_REVISION_5A_ES0 0u\r
#define CYDEV_CHIP_REVISION_5A_ES1 1u\r
#define CYDEV_CHIP_REVISION_5A_PRODUCTION 1u\r
#define CYDEV_CHIP_REVISION_5B_ES0 0u\r
#define CYDEV_CHIP_REVISION_5B_PRODUCTION 0u\r
-#define CYDEV_CHIP_REVISION_6A_NO_UDB 0u\r
-#define CYDEV_CHIP_REVISION_6A_PRODUCTION 0u\r
+#define CYDEV_CHIP_REVISION_6A_ES 17u\r
+#define CYDEV_CHIP_REVISION_6A_NO_UDB 33u\r
+#define CYDEV_CHIP_REVISION_6A_PRODUCTION 33u\r
#define CYDEV_CHIP_REVISION_FM3_PRODUCTION 0u\r
#define CYDEV_CHIP_REVISION_FM4_PRODUCTION 0u\r
#define CYDEV_CHIP_REVISION_PDL_FM0P_TYPE1_PRODUCTION 0u\r
/*******************************************************************************\r
* File Name: cyfitter_cfg.c\r
* \r
-* PSoC Creator 4.1\r
+* PSoC Creator 4.2\r
*\r
* Description:\r
* This file contains device initialization code.\r
* This file is automatically generated by PSoC Creator.\r
*\r
********************************************************************************\r
-* Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.\r
+* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.\r
* You may use this file only in accordance with the license, terms, conditions, \r
* disclaimers, and limitations in the end user license agreement accompanying \r
* the software package with which this file was provided.\r
#define CYCLOCKSTART_32KHZ_ERROR 2u\r
#define CYCLOCKSTART_PLL_ERROR 3u\r
#define CYCLOCKSTART_FLL_ERROR 4u\r
+#define CYCLOCKSTART_WCO_ERROR 5u\r
\r
\r
#ifdef CY_NEED_CYCLOCKSTARTUPERROR\r
CY_CFG_UNUSED\r
static void CyClockStartupError(uint8 errorCode)\r
{\r
- /* To remove the compiler warning if errorCode not used. */\r
-#if defined(CY_PSOC3) && (CY_PSOC3)\r
+ /* To remove the compiler warning if errorCode not used. */\r
errorCode = errorCode;\r
-#else\r
- (void)errorCode;\r
-#endif /* CY_PSOC3 */\r
\r
/* If we have a clock startup error (bad MHz crystal, PLL lock, etc.), */\r
/* we will end up here to allow the customer to implement something to */\r
\r
\r
/* Set Flash Cycles based on max possible frequency in case a glitch occurs during ClockSetup(). */\r
- CY_SET_XTND_REG8((void CYFAR *)(CYREG_CACHE_CC_CTL), (((CYDEV_INSTRUCT_CACHE_ENABLED) != 0) ? 0x01u : 0x00u));\r
+ CY_SET_XTND_REG8((void CYFAR *)(CYREG_CACHE_CC_CTL), (((CYDEV_INSTRUCT_CACHE_ENABLED) != 0) ? 0x61u : 0x60u));\r
/* Setup clocks based on selections from Clock DWR */\r
ClockSetup();\r
/* Set Flash Cycles based on newly configured 50.00MHz Bus Clock. */\r
static const uint32 CYCODE cy_cfg_addr_table[] = {\r
0x40004501u, /* Base address: 0x40004500 Count: 1 */\r
0x40004F02u, /* Base address: 0x40004F00 Count: 2 */\r
- 0x4000520Eu, /* Base address: 0x40005200 Count: 14 */\r
+ 0x40005211u, /* Base address: 0x40005200 Count: 17 */\r
0x40006401u, /* Base address: 0x40006400 Count: 1 */\r
0x40006501u, /* Base address: 0x40006500 Count: 1 */\r
- 0x40010045u, /* Base address: 0x40010000 Count: 69 */\r
- 0x4001013Du, /* Base address: 0x40010100 Count: 61 */\r
- 0x40010247u, /* Base address: 0x40010200 Count: 71 */\r
- 0x4001035Fu, /* Base address: 0x40010300 Count: 95 */\r
- 0x4001045Fu, /* Base address: 0x40010400 Count: 95 */\r
- 0x40010560u, /* Base address: 0x40010500 Count: 96 */\r
- 0x40010650u, /* Base address: 0x40010600 Count: 80 */\r
- 0x40010755u, /* Base address: 0x40010700 Count: 85 */\r
- 0x40010912u, /* Base address: 0x40010900 Count: 18 */\r
- 0x40010A46u, /* Base address: 0x40010A00 Count: 70 */\r
- 0x40010B50u, /* Base address: 0x40010B00 Count: 80 */\r
- 0x40010C56u, /* Base address: 0x40010C00 Count: 86 */\r
- 0x40010D58u, /* Base address: 0x40010D00 Count: 88 */\r
- 0x40010E4Cu, /* Base address: 0x40010E00 Count: 76 */\r
- 0x40010F3Bu, /* Base address: 0x40010F00 Count: 59 */\r
- 0x4001141Fu, /* Base address: 0x40011400 Count: 31 */\r
- 0x40011554u, /* Base address: 0x40011500 Count: 84 */\r
- 0x40011656u, /* Base address: 0x40011600 Count: 86 */\r
- 0x40011744u, /* Base address: 0x40011700 Count: 68 */\r
- 0x40011804u, /* Base address: 0x40011800 Count: 4 */\r
- 0x40011905u, /* Base address: 0x40011900 Count: 5 */\r
- 0x40011B02u, /* Base address: 0x40011B00 Count: 2 */\r
- 0x40014019u, /* Base address: 0x40014000 Count: 25 */\r
- 0x40014118u, /* Base address: 0x40014100 Count: 24 */\r
- 0x4001420Du, /* Base address: 0x40014200 Count: 13 */\r
- 0x4001430Du, /* Base address: 0x40014300 Count: 13 */\r
- 0x40014411u, /* Base address: 0x40014400 Count: 17 */\r
- 0x40014518u, /* Base address: 0x40014500 Count: 24 */\r
- 0x4001460Eu, /* Base address: 0x40014600 Count: 14 */\r
- 0x4001470Fu, /* Base address: 0x40014700 Count: 15 */\r
+ 0x40010047u, /* Base address: 0x40010000 Count: 71 */\r
+ 0x40010142u, /* Base address: 0x40010100 Count: 66 */\r
+ 0x40010254u, /* Base address: 0x40010200 Count: 84 */\r
+ 0x4001035Cu, /* Base address: 0x40010300 Count: 92 */\r
+ 0x4001044Fu, /* Base address: 0x40010400 Count: 79 */\r
+ 0x4001055Au, /* Base address: 0x40010500 Count: 90 */\r
+ 0x40010653u, /* Base address: 0x40010600 Count: 83 */\r
+ 0x40010752u, /* Base address: 0x40010700 Count: 82 */\r
+ 0x4001091Cu, /* Base address: 0x40010900 Count: 28 */\r
+ 0x40010A4Eu, /* Base address: 0x40010A00 Count: 78 */\r
+ 0x40010B4Fu, /* Base address: 0x40010B00 Count: 79 */\r
+ 0x40010C4Cu, /* Base address: 0x40010C00 Count: 76 */\r
+ 0x40010D50u, /* Base address: 0x40010D00 Count: 80 */\r
+ 0x40010E51u, /* Base address: 0x40010E00 Count: 81 */\r
+ 0x40010F3Au, /* Base address: 0x40010F00 Count: 58 */\r
+ 0x40011460u, /* Base address: 0x40011400 Count: 96 */\r
+ 0x4001154Du, /* Base address: 0x40011500 Count: 77 */\r
+ 0x40011646u, /* Base address: 0x40011600 Count: 70 */\r
+ 0x40011752u, /* Base address: 0x40011700 Count: 82 */\r
+ 0x40011854u, /* Base address: 0x40011800 Count: 84 */\r
+ 0x40011954u, /* Base address: 0x40011900 Count: 84 */\r
+ 0x40011B0Eu, /* Base address: 0x40011B00 Count: 14 */\r
+ 0x40014016u, /* Base address: 0x40014000 Count: 22 */\r
+ 0x4001411Du, /* Base address: 0x40014100 Count: 29 */\r
+ 0x4001420Fu, /* Base address: 0x40014200 Count: 15 */\r
+ 0x4001430Fu, /* Base address: 0x40014300 Count: 15 */\r
+ 0x4001440Fu, /* Base address: 0x40014400 Count: 15 */\r
+ 0x4001451Du, /* Base address: 0x40014500 Count: 29 */\r
+ 0x4001460Au, /* Base address: 0x40014600 Count: 10 */\r
+ 0x40014712u, /* Base address: 0x40014700 Count: 18 */\r
0x40014809u, /* Base address: 0x40014800 Count: 9 */\r
- 0x4001490Du, /* Base address: 0x40014900 Count: 13 */\r
- 0x40014C08u, /* Base address: 0x40014C00 Count: 8 */\r
- 0x40014D0Bu, /* Base address: 0x40014D00 Count: 11 */\r
- 0x40015004u, /* Base address: 0x40015000 Count: 4 */\r
+ 0x4001490Bu, /* Base address: 0x40014900 Count: 11 */\r
+ 0x40014C0Cu, /* Base address: 0x40014C00 Count: 12 */\r
+ 0x40014D0Cu, /* Base address: 0x40014D00 Count: 12 */\r
+ 0x40015005u, /* Base address: 0x40015000 Count: 5 */\r
0x40015104u, /* Base address: 0x40015100 Count: 4 */\r
};\r
\r
static const cy_cfg_addrvalue_t CYCODE cy_cfg_data_table[] = {\r
{0x7Eu, 0x02u},\r
{0x01u, 0x20u},\r
- {0x0Au, 0x36u},\r
- {0x00u, 0x04u},\r
- {0x01u, 0x0Cu},\r
+ {0x0Au, 0x27u},\r
+ {0x00u, 0x48u},\r
+ {0x01u, 0x4Cu},\r
{0x04u, 0x31u},\r
{0x10u, 0xC4u},\r
- {0x11u, 0x44u},\r
- {0x18u, 0x04u},\r
+ {0x11u, 0x40u},\r
+ {0x19u, 0x08u},\r
{0x1Cu, 0x30u},\r
+ {0x20u, 0x10u},\r
+ {0x21u, 0x10u},\r
{0x24u, 0x44u},\r
- {0x28u, 0x02u},\r
- {0x30u, 0x20u},\r
- {0x31u, 0x30u},\r
+ {0x28u, 0x01u},\r
+ {0x29u, 0x01u},\r
+ {0x30u, 0x30u},\r
+ {0x31u, 0x20u},\r
{0x78u, 0x20u},\r
{0x79u, 0x20u},\r
{0x7Cu, 0x40u},\r
{0x20u, 0x01u},\r
- {0x85u, 0x0Fu},\r
- {0x02u, 0xFFu},\r
- {0x04u, 0x0Fu},\r
- {0x06u, 0xF0u},\r
- {0x0Au, 0xFFu},\r
- {0x0Eu, 0xFFu},\r
- {0x10u, 0x69u},\r
- {0x12u, 0x96u},\r
- {0x14u, 0xFFu},\r
- {0x18u, 0x55u},\r
- {0x19u, 0x04u},\r
- {0x1Au, 0xAAu},\r
- {0x1Cu, 0xFFu},\r
+ {0x87u, 0x0Fu},\r
+ {0x00u, 0xE0u},\r
+ {0x01u, 0x03u},\r
+ {0x03u, 0x74u},\r
+ {0x04u, 0x40u},\r
+ {0x05u, 0x20u},\r
+ {0x06u, 0x80u},\r
+ {0x07u, 0x40u},\r
+ {0x08u, 0x0Bu},\r
+ {0x09u, 0x02u},\r
+ {0x0Au, 0xF4u},\r
+ {0x0Cu, 0x11u},\r
+ {0x0Du, 0x64u},\r
+ {0x0Eu, 0xECu},\r
+ {0x16u, 0xFFu},\r
+ {0x17u, 0x08u},\r
+ {0x18u, 0xCAu},\r
+ {0x1Au, 0x15u},\r
+ {0x1Bu, 0x01u},\r
{0x1Du, 0x01u},\r
- {0x1Fu, 0x02u},\r
- {0x23u, 0x01u},\r
- {0x28u, 0x33u},\r
- {0x2Au, 0xCCu},\r
- {0x2Bu, 0x02u},\r
- {0x31u, 0x04u},\r
- {0x32u, 0xFFu},\r
- {0x35u, 0x03u},\r
+ {0x1Fu, 0x6Eu},\r
+ {0x20u, 0x06u},\r
+ {0x26u, 0x10u},\r
+ {0x27u, 0x7Fu},\r
+ {0x28u, 0x40u},\r
+ {0x29u, 0x78u},\r
+ {0x2Au, 0x80u},\r
+ {0x2Bu, 0x03u},\r
+ {0x2Cu, 0x01u},\r
+ {0x2Du, 0x20u},\r
+ {0x2Fu, 0x40u},\r
+ {0x32u, 0xC0u},\r
+ {0x34u, 0x3Fu},\r
+ {0x35u, 0x60u},\r
+ {0x37u, 0x1Fu},\r
{0x3Au, 0x08u},\r
- {0x3Fu, 0x10u},\r
- {0x40u, 0x53u},\r
- {0x41u, 0x06u},\r
- {0x42u, 0x40u},\r
- {0x45u, 0xEFu},\r
+ {0x3Bu, 0x20u},\r
+ {0x40u, 0x52u},\r
+ {0x41u, 0x03u},\r
+ {0x42u, 0x60u},\r
+ {0x45u, 0xE2u},\r
{0x46u, 0xDCu},\r
- {0x47u, 0x20u},\r
- {0x48u, 0x2Fu},\r
+ {0x47u, 0x0Fu},\r
+ {0x48u, 0x1Fu},\r
{0x49u, 0xFFu},\r
{0x4Au, 0xFFu},\r
{0x4Bu, 0xFFu},\r
{0x59u, 0x04u},\r
{0x5Au, 0x04u},\r
{0x5Bu, 0x04u},\r
- {0x5Cu, 0x91u},\r
+ {0x5Cu, 0x11u},\r
{0x5Du, 0x01u},\r
{0x5Fu, 0x01u},\r
{0x60u, 0x08u},\r
{0x68u, 0x40u},\r
{0x69u, 0x40u},\r
{0x6Eu, 0x08u},\r
- {0x81u, 0x02u},\r
- {0x83u, 0x01u},\r
- {0x8Du, 0x02u},\r
- {0x8Fu, 0x05u},\r
- {0x91u, 0x02u},\r
- {0x93u, 0x11u},\r
- {0x95u, 0x02u},\r
- {0x97u, 0x09u},\r
- {0x99u, 0x01u},\r
- {0x9Bu, 0x02u},\r
- {0xB1u, 0x04u},\r
- {0xB3u, 0x03u},\r
- {0xB5u, 0x10u},\r
- {0xB7u, 0x08u},\r
- {0xBBu, 0x08u},\r
- {0xD6u, 0x08u},\r
+ {0x8Bu, 0x01u},\r
+ {0xA6u, 0x01u},\r
+ {0xABu, 0x02u},\r
+ {0xB2u, 0x01u},\r
+ {0xB5u, 0x01u},\r
+ {0xB7u, 0x02u},\r
+ {0xD8u, 0x04u},\r
{0xD9u, 0x04u},\r
- {0xDBu, 0x04u},\r
- {0xDCu, 0x10u},\r
- {0xDDu, 0x90u},\r
+ {0xDCu, 0x11u},\r
{0xDFu, 0x01u},\r
- {0x01u, 0xA8u},\r
- {0x03u, 0x40u},\r
- {0x09u, 0x08u},\r
- {0x0Au, 0x02u},\r
- {0x0Bu, 0x44u},\r
- {0x12u, 0x04u},\r
- {0x19u, 0x08u},\r
- {0x1Au, 0x10u},\r
- {0x21u, 0x02u},\r
- {0x22u, 0x10u},\r
- {0x25u, 0x41u},\r
- {0x27u, 0x18u},\r
- {0x2Au, 0x10u},\r
- {0x2Bu, 0xC0u},\r
- {0x32u, 0x80u},\r
- {0x33u, 0x10u},\r
- {0x34u, 0x02u},\r
- {0x37u, 0x18u},\r
- {0x3Du, 0x82u},\r
- {0x41u, 0x09u},\r
- {0x48u, 0x01u},\r
- {0x49u, 0xA0u},\r
- {0x4Au, 0x50u},\r
- {0x51u, 0x50u},\r
- {0x52u, 0x21u},\r
- {0x59u, 0x10u},\r
- {0x5Au, 0x84u},\r
- {0x5Bu, 0x01u},\r
- {0x5Cu, 0x40u},\r
- {0x60u, 0x80u},\r
+ {0x01u, 0x8Au},\r
+ {0x03u, 0x08u},\r
+ {0x08u, 0x80u},\r
+ {0x0Au, 0x04u},\r
+ {0x0Bu, 0x22u},\r
+ {0x10u, 0x80u},\r
+ {0x11u, 0x80u},\r
+ {0x12u, 0x14u},\r
+ {0x17u, 0x08u},\r
+ {0x19u, 0x28u},\r
+ {0x1Au, 0x04u},\r
+ {0x1Eu, 0x10u},\r
+ {0x20u, 0x02u},\r
+ {0x21u, 0x20u},\r
+ {0x27u, 0x0Au},\r
+ {0x29u, 0x20u},\r
+ {0x2Bu, 0x22u},\r
+ {0x2Eu, 0x10u},\r
+ {0x30u, 0x20u},\r
+ {0x31u, 0x84u},\r
+ {0x38u, 0xA0u},\r
+ {0x39u, 0x01u},\r
+ {0x3Bu, 0x04u},\r
+ {0x3Cu, 0x22u},\r
+ {0x3Du, 0x01u},\r
+ {0x42u, 0x0Cu},\r
+ {0x43u, 0x08u},\r
+ {0x44u, 0x20u},\r
+ {0x45u, 0x08u},\r
+ {0x48u, 0x05u},\r
+ {0x49u, 0x84u},\r
+ {0x4Bu, 0x0Au},\r
+ {0x50u, 0x90u},\r
+ {0x51u, 0x08u},\r
+ {0x52u, 0x10u},\r
+ {0x59u, 0x08u},\r
+ {0x5Au, 0x22u},\r
+ {0x5Bu, 0x80u},\r
{0x61u, 0x20u},\r
- {0x62u, 0x08u},\r
- {0x63u, 0x02u},\r
- {0x64u, 0x02u},\r
- {0x68u, 0x04u},\r
- {0x69u, 0x45u},\r
- {0x70u, 0x94u},\r
- {0x72u, 0x80u},\r
- {0x81u, 0x04u},\r
- {0x82u, 0x80u},\r
- {0x83u, 0x01u},\r
- {0x85u, 0x04u},\r
- {0x86u, 0x10u},\r
- {0x88u, 0x04u},\r
- {0x8Au, 0x10u},\r
- {0x8Cu, 0x10u},\r
- {0x8Du, 0x20u},\r
- {0x8Eu, 0x90u},\r
+ {0x62u, 0x01u},\r
+ {0x63u, 0x21u},\r
+ {0x68u, 0x48u},\r
+ {0x69u, 0x84u},\r
+ {0x71u, 0x10u},\r
+ {0x72u, 0x81u},\r
+ {0x73u, 0x10u},\r
+ {0x81u, 0xB0u},\r
+ {0x83u, 0x0Au},\r
+ {0x84u, 0x80u},\r
+ {0x87u, 0x40u},\r
+ {0x88u, 0x01u},\r
+ {0x8Au, 0x05u},\r
+ {0x8Eu, 0x02u},\r
{0xC0u, 0x0Fu},\r
- {0xC2u, 0x0Fu},\r
- {0xC4u, 0x02u},\r
- {0xCAu, 0x05u},\r
- {0xCCu, 0xECu},\r
- {0xCEu, 0x90u},\r
- {0xD0u, 0x03u},\r
+ {0xC2u, 0x06u},\r
+ {0xC4u, 0x2Fu},\r
+ {0xCAu, 0x2Eu},\r
+ {0xCCu, 0x0Eu},\r
+ {0xCEu, 0x2Fu},\r
+ {0xD0u, 0x06u},\r
{0xD2u, 0x0Cu},\r
- {0xD6u, 0x1Fu},\r
- {0xD8u, 0x1Fu},\r
- {0xE2u, 0x82u},\r
- {0xE4u, 0x02u},\r
- {0xE6u, 0x05u},\r
- {0x02u, 0xFFu},\r
- {0x08u, 0x0Bu},\r
- {0x0Au, 0xF4u},\r
- {0x10u, 0xE0u},\r
- {0x14u, 0xCAu},\r
- {0x16u, 0x15u},\r
- {0x18u, 0x40u},\r
- {0x1Au, 0x80u},\r
- {0x1Cu, 0x11u},\r
- {0x1Eu, 0xECu},\r
- {0x20u, 0x40u},\r
- {0x22u, 0x80u},\r
- {0x24u, 0x01u},\r
- {0x2Au, 0x10u},\r
- {0x2Cu, 0x06u},\r
- {0x32u, 0x3Fu},\r
- {0x34u, 0xC0u},\r
+ {0xD6u, 0x0Fu},\r
+ {0xD8u, 0x0Fu},\r
+ {0xE0u, 0x08u},\r
+ {0xE4u, 0x05u},\r
+ {0xE6u, 0x02u},\r
+ {0x00u, 0x02u},\r
+ {0x02u, 0x05u},\r
+ {0x04u, 0x02u},\r
+ {0x06u, 0x01u},\r
+ {0x0Cu, 0x02u},\r
+ {0x0Eu, 0x01u},\r
+ {0x14u, 0x02u},\r
+ {0x16u, 0x01u},\r
+ {0x18u, 0x01u},\r
+ {0x1Au, 0x02u},\r
+ {0x1Cu, 0x02u},\r
+ {0x1Eu, 0x09u},\r
+ {0x20u, 0x02u},\r
+ {0x22u, 0x11u},\r
+ {0x24u, 0x02u},\r
+ {0x25u, 0x01u},\r
+ {0x26u, 0x01u},\r
+ {0x30u, 0x08u},\r
+ {0x32u, 0x04u},\r
+ {0x34u, 0x03u},\r
+ {0x35u, 0x01u},\r
+ {0x36u, 0x10u},\r
{0x3Au, 0x20u},\r
+ {0x56u, 0x08u},\r
{0x58u, 0x04u},\r
+ {0x59u, 0x04u},\r
{0x5Bu, 0x04u},\r
- {0x5Cu, 0x01u},\r
+ {0x5Cu, 0x91u},\r
+ {0x5Du, 0x90u},\r
{0x5Fu, 0x01u},\r
- {0x80u, 0x03u},\r
- {0x81u, 0x08u},\r
- {0x82u, 0x0Cu},\r
- {0x83u, 0x10u},\r
- {0x86u, 0xFFu},\r
- {0x87u, 0x80u},\r
- {0x88u, 0x05u},\r
- {0x8Au, 0x0Au},\r
- {0x8Bu, 0x04u},\r
- {0x8Fu, 0x9Bu},\r
- {0x90u, 0x06u},\r
- {0x92u, 0x09u},\r
- {0x93u, 0x60u},\r
- {0x95u, 0x01u},\r
- {0x97u, 0x02u},\r
- {0x98u, 0x60u},\r
- {0x99u, 0x9Bu},\r
- {0x9Au, 0x90u},\r
- {0x9Bu, 0x40u},\r
- {0x9Cu, 0x0Fu},\r
- {0x9Du, 0x08u},\r
- {0x9Eu, 0xF0u},\r
- {0x9Fu, 0x10u},\r
- {0xA1u, 0x1Bu},\r
- {0xA2u, 0xFFu},\r
- {0xA4u, 0x30u},\r
- {0xA5u, 0x01u},\r
- {0xA6u, 0xC0u},\r
- {0xA7u, 0x02u},\r
- {0xA8u, 0xFFu},\r
- {0xA9u, 0x80u},\r
- {0xABu, 0x3Bu},\r
- {0xACu, 0x50u},\r
- {0xAEu, 0xA0u},\r
- {0xAFu, 0x1Bu},\r
- {0xB1u, 0xE0u},\r
- {0xB3u, 0x03u},\r
- {0xB4u, 0xFFu},\r
- {0xB5u, 0x04u},\r
- {0xB7u, 0x18u},\r
- {0xBBu, 0x88u},\r
- {0xBEu, 0x10u},\r
+ {0x80u, 0x02u},\r
+ {0x81u, 0x8Bu},\r
+ {0x82u, 0x21u},\r
+ {0x83u, 0x74u},\r
+ {0x84u, 0x02u},\r
+ {0x86u, 0x01u},\r
+ {0x87u, 0x01u},\r
+ {0x89u, 0x02u},\r
+ {0x8Cu, 0x02u},\r
+ {0x8Du, 0x10u},\r
+ {0x8Eu, 0x01u},\r
+ {0x8Fu, 0x20u},\r
+ {0x90u, 0x02u},\r
+ {0x92u, 0x05u},\r
+ {0x94u, 0x02u},\r
+ {0x95u, 0x88u},\r
+ {0x96u, 0x09u},\r
+ {0x97u, 0x77u},\r
+ {0x98u, 0x01u},\r
+ {0x99u, 0x40u},\r
+ {0x9Au, 0x12u},\r
+ {0x9Bu, 0x80u},\r
+ {0x9Cu, 0x02u},\r
+ {0x9Du, 0x03u},\r
+ {0x9Eu, 0x01u},\r
+ {0x9Fu, 0x0Cu},\r
+ {0xA1u, 0x34u},\r
+ {0xA3u, 0x40u},\r
+ {0xA4u, 0x02u},\r
+ {0xA6u, 0x01u},\r
+ {0xA7u, 0x77u},\r
+ {0xA9u, 0x3Du},\r
+ {0xABu, 0x42u},\r
+ {0xACu, 0x10u},\r
+ {0xADu, 0x10u},\r
+ {0xAEu, 0x20u},\r
+ {0xAFu, 0x20u},\r
+ {0xB0u, 0x30u},\r
+ {0xB1u, 0x30u},\r
+ {0xB2u, 0x04u},\r
+ {0xB4u, 0x03u},\r
+ {0xB5u, 0xC0u},\r
+ {0xB6u, 0x08u},\r
+ {0xB7u, 0x0Fu},\r
+ {0xBAu, 0x20u},\r
+ {0xBBu, 0xA2u},\r
+ {0xBEu, 0x01u},\r
{0xD6u, 0x08u},\r
{0xD8u, 0x04u},\r
{0xD9u, 0x04u},\r
{0xDBu, 0x04u},\r
- {0xDCu, 0x10u},\r
+ {0xDCu, 0x11u},\r
{0xDDu, 0x90u},\r
{0xDFu, 0x01u},\r
- {0x01u, 0x04u},\r
- {0x03u, 0x84u},\r
- {0x05u, 0x20u},\r
- {0x07u, 0x40u},\r
- {0x0Au, 0x48u},\r
- {0x0Bu, 0x02u},\r
- {0x0Du, 0x08u},\r
- {0x0Eu, 0x05u},\r
- {0x0Fu, 0x80u},\r
- {0x11u, 0x02u},\r
- {0x12u, 0x10u},\r
- {0x13u, 0x90u},\r
- {0x15u, 0xA4u},\r
+ {0x00u, 0x81u},\r
+ {0x01u, 0x08u},\r
+ {0x05u, 0x05u},\r
+ {0x07u, 0x02u},\r
+ {0x09u, 0x08u},\r
+ {0x0Au, 0x05u},\r
+ {0x0Bu, 0x40u},\r
+ {0x0Eu, 0x1Au},\r
+ {0x10u, 0x02u},\r
+ {0x11u, 0x08u},\r
{0x16u, 0x40u},\r
- {0x1Bu, 0x20u},\r
- {0x1Du, 0x08u},\r
- {0x1Eu, 0x04u},\r
- {0x22u, 0x9Au},\r
- {0x28u, 0x22u},\r
- {0x29u, 0x20u},\r
- {0x2Bu, 0x40u},\r
- {0x2Cu, 0x20u},\r
- {0x2Fu, 0x20u},\r
- {0x30u, 0x10u},\r
- {0x32u, 0x8Au},\r
- {0x34u, 0x80u},\r
- {0x36u, 0x80u},\r
- {0x38u, 0x28u},\r
- {0x3Au, 0x02u},\r
- {0x3Bu, 0x80u},\r
- {0x44u, 0x10u},\r
- {0x45u, 0x08u},\r
- {0x58u, 0x01u},\r
- {0x59u, 0x84u},\r
- {0x5Bu, 0x20u},\r
- {0x5Cu, 0x04u},\r
- {0x5Eu, 0xA2u},\r
+ {0x17u, 0x08u},\r
+ {0x18u, 0x88u},\r
+ {0x19u, 0x0Au},\r
+ {0x1Au, 0x45u},\r
+ {0x1Bu, 0x40u},\r
+ {0x1Cu, 0x20u},\r
+ {0x1Du, 0x05u},\r
+ {0x1Eu, 0x0Au},\r
+ {0x1Fu, 0x30u},\r
+ {0x20u, 0x48u},\r
+ {0x21u, 0x20u},\r
+ {0x22u, 0x40u},\r
+ {0x23u, 0x80u},\r
+ {0x25u, 0x10u},\r
+ {0x28u, 0x02u},\r
+ {0x29u, 0x22u},\r
+ {0x2Bu, 0x20u},\r
+ {0x2Eu, 0x40u},\r
+ {0x2Fu, 0x21u},\r
+ {0x31u, 0x20u},\r
+ {0x32u, 0x40u},\r
+ {0x33u, 0x08u},\r
+ {0x38u, 0x60u},\r
+ {0x39u, 0x01u},\r
+ {0x3Bu, 0x08u},\r
+ {0x58u, 0x14u},\r
+ {0x5Bu, 0x40u},\r
+ {0x5Du, 0x40u},\r
{0x60u, 0x08u},\r
- {0x62u, 0x04u},\r
- {0x63u, 0x45u},\r
- {0x66u, 0x80u},\r
- {0x79u, 0x80u},\r
- {0x7Bu, 0x02u},\r
- {0x81u, 0x81u},\r
- {0x82u, 0x02u},\r
- {0x84u, 0x20u},\r
- {0x88u, 0x40u},\r
- {0x89u, 0x44u},\r
- {0x8Bu, 0x10u},\r
- {0x8Cu, 0x04u},\r
- {0x8Eu, 0x21u},\r
- {0x8Fu, 0x02u},\r
- {0x90u, 0x08u},\r
- {0x91u, 0xE1u},\r
+ {0x62u, 0x84u},\r
+ {0x63u, 0x04u},\r
+ {0x66u, 0x40u},\r
+ {0x68u, 0x02u},\r
+ {0x6Cu, 0x20u},\r
+ {0x6Du, 0x10u},\r
+ {0x6Fu, 0x02u},\r
+ {0x80u, 0x04u},\r
+ {0x81u, 0x40u},\r
+ {0x82u, 0x01u},\r
+ {0x88u, 0x01u},\r
+ {0x8Au, 0x10u},\r
+ {0x8Bu, 0x22u},\r
+ {0x8Eu, 0x02u},\r
+ {0x90u, 0x20u},\r
+ {0x91u, 0x05u},\r
{0x92u, 0x10u},\r
- {0x93u, 0x02u},\r
- {0x95u, 0x02u},\r
- {0x96u, 0x86u},\r
- {0x97u, 0x44u},\r
- {0x98u, 0x01u},\r
- {0x99u, 0x04u},\r
- {0x9Au, 0x11u},\r
- {0x9Bu, 0x30u},\r
- {0x9Cu, 0x80u},\r
- {0x9Du, 0x30u},\r
- {0x9Eu, 0x04u},\r
- {0x9Fu, 0x41u},\r
- {0xA0u, 0x80u},\r
- {0xA2u, 0x70u},\r
- {0xA3u, 0x80u},\r
- {0xA4u, 0x01u},\r
- {0xA5u, 0x28u},\r
- {0xA6u, 0x08u},\r
- {0xA7u, 0x01u},\r
- {0xA9u, 0x02u},\r
- {0xABu, 0x40u},\r
- {0xACu, 0x01u},\r
- {0xAEu, 0x40u},\r
- {0xAFu, 0x20u},\r
- {0xB0u, 0x01u},\r
- {0xB4u, 0x40u},\r
- {0xB5u, 0x08u},\r
- {0xC0u, 0x5Eu},\r
- {0xC2u, 0xFBu},\r
- {0xC4u, 0xFFu},\r
- {0xCAu, 0x0Fu},\r
- {0xCCu, 0x0Fu},\r
+ {0x93u, 0x58u},\r
+ {0x94u, 0x80u},\r
+ {0x96u, 0x22u},\r
+ {0x97u, 0x25u},\r
+ {0x98u, 0xA4u},\r
+ {0x99u, 0xA0u},\r
+ {0x9Au, 0x9Au},\r
+ {0x9Bu, 0x4Au},\r
+ {0x9Du, 0x02u},\r
+ {0x9Eu, 0x05u},\r
+ {0x9Fu, 0x80u},\r
+ {0xA0u, 0x88u},\r
+ {0xA4u, 0x34u},\r
+ {0xA5u, 0x50u},\r
+ {0xA7u, 0x38u},\r
+ {0xA9u, 0x10u},\r
+ {0xACu, 0x40u},\r
+ {0xB0u, 0x04u},\r
+ {0xB1u, 0x08u},\r
+ {0xB5u, 0x40u},\r
+ {0xB7u, 0x41u},\r
+ {0xC0u, 0xBDu},\r
+ {0xC2u, 0xEFu},\r
+ {0xC4u, 0x35u},\r
+ {0xCAu, 0x4Fu},\r
+ {0xCCu, 0x0Eu},\r
{0xCEu, 0x0Fu},\r
- {0xD6u, 0xFFu},\r
- {0xD8u, 0x1Fu},\r
- {0xE2u, 0x24u},\r
- {0xE6u, 0x0Du},\r
- {0xE8u, 0x40u},\r
- {0xEAu, 0x06u},\r
- {0xECu, 0x08u},\r
- {0x01u, 0x40u},\r
- {0x02u, 0x24u},\r
- {0x03u, 0x80u},\r
- {0x05u, 0x04u},\r
- {0x06u, 0x40u},\r
- {0x07u, 0x08u},\r
- {0x08u, 0x24u},\r
- {0x09u, 0x04u},\r
- {0x0Au, 0x09u},\r
- {0x0Bu, 0x08u},\r
- {0x0Du, 0x01u},\r
- {0x0Eu, 0x20u},\r
- {0x0Fu, 0x02u},\r
- {0x11u, 0x3Fu},\r
- {0x12u, 0x18u},\r
- {0x13u, 0x40u},\r
- {0x14u, 0x24u},\r
- {0x15u, 0x3Fu},\r
- {0x16u, 0x12u},\r
- {0x17u, 0x40u},\r
- {0x19u, 0x01u},\r
- {0x1Au, 0x03u},\r
- {0x1Bu, 0x02u},\r
- {0x1Eu, 0x80u},\r
- {0x1Fu, 0x7Fu},\r
- {0x21u, 0x10u},\r
- {0x22u, 0x04u},\r
- {0x23u, 0x20u},\r
- {0x25u, 0x80u},\r
- {0x27u, 0x7Fu},\r
- {0x29u, 0x10u},\r
- {0x2Bu, 0x20u},\r
- {0x2Cu, 0x40u},\r
- {0x2Du, 0x80u},\r
- {0x2Eu, 0x80u},\r
- {0x2Fu, 0x7Fu},\r
- {0x30u, 0x38u},\r
- {0x31u, 0xC0u},\r
- {0x33u, 0x0Cu},\r
- {0x34u, 0x07u},\r
- {0x35u, 0x03u},\r
- {0x36u, 0xC0u},\r
- {0x37u, 0x30u},\r
- {0x3Bu, 0xAAu},\r
- {0x3Eu, 0x40u},\r
+ {0xD6u, 0x1Eu},\r
+ {0xD8u, 0x1Eu},\r
+ {0xE2u, 0x04u},\r
+ {0xE4u, 0x01u},\r
+ {0xE6u, 0x80u},\r
+ {0xE8u, 0x02u},\r
+ {0xEAu, 0x40u},\r
+ {0xEEu, 0x20u},\r
+ {0x00u, 0xFFu},\r
+ {0x01u, 0x1Bu},\r
+ {0x05u, 0x9Bu},\r
+ {0x06u, 0xFFu},\r
+ {0x07u, 0x40u},\r
+ {0x08u, 0xFFu},\r
+ {0x09u, 0x08u},\r
+ {0x0Bu, 0x10u},\r
+ {0x0Cu, 0x0Fu},\r
+ {0x0Eu, 0xF0u},\r
+ {0x0Fu, 0x9Bu},\r
+ {0x13u, 0x60u},\r
+ {0x14u, 0x69u},\r
+ {0x15u, 0x80u},\r
+ {0x16u, 0x96u},\r
+ {0x17u, 0x3Bu},\r
+ {0x19u, 0x08u},\r
+ {0x1Au, 0xFFu},\r
+ {0x1Bu, 0x10u},\r
+ {0x1Du, 0x01u},\r
+ {0x1Fu, 0x02u},\r
+ {0x20u, 0x33u},\r
+ {0x22u, 0xCCu},\r
+ {0x23u, 0x04u},\r
+ {0x24u, 0x55u},\r
+ {0x26u, 0xAAu},\r
+ {0x27u, 0x1Bu},\r
+ {0x29u, 0x01u},\r
+ {0x2Bu, 0x02u},\r
+ {0x2Eu, 0xFFu},\r
+ {0x2Fu, 0x80u},\r
+ {0x30u, 0xFFu},\r
+ {0x31u, 0xE0u},\r
+ {0x33u, 0x04u},\r
+ {0x35u, 0x18u},\r
+ {0x37u, 0x03u},\r
+ {0x3Au, 0x02u},\r
+ {0x3Bu, 0xA0u},\r
{0x56u, 0x08u},\r
{0x58u, 0x04u},\r
{0x59u, 0x04u},\r
{0x5Cu, 0x11u},\r
{0x5Du, 0x90u},\r
{0x5Fu, 0x01u},\r
- {0x82u, 0x7Fu},\r
- {0x85u, 0x0Fu},\r
- {0x88u, 0x20u},\r
- {0x89u, 0x05u},\r
- {0x8Au, 0x40u},\r
- {0x8Bu, 0x0Au},\r
- {0x8Eu, 0x08u},\r
- {0x90u, 0x64u},\r
- {0x94u, 0x78u},\r
- {0x95u, 0x06u},\r
- {0x96u, 0x03u},\r
- {0x97u, 0x09u},\r
- {0x98u, 0x02u},\r
- {0x99u, 0x90u},\r
- {0x9Bu, 0x2Fu},\r
- {0x9Cu, 0x03u},\r
- {0x9Eu, 0x74u},\r
- {0x9Fu, 0x70u},\r
- {0xA1u, 0xC0u},\r
- {0xA3u, 0x1Fu},\r
- {0xA5u, 0x03u},\r
- {0xA6u, 0x01u},\r
- {0xA7u, 0x0Cu},\r
- {0xA8u, 0x01u},\r
- {0xA9u, 0xA0u},\r
- {0xAAu, 0x6Eu},\r
+ {0x80u, 0xFFu},\r
+ {0x84u, 0x55u},\r
+ {0x85u, 0x06u},\r
+ {0x86u, 0xAAu},\r
+ {0x87u, 0x09u},\r
+ {0x88u, 0xFFu},\r
+ {0x89u, 0x03u},\r
+ {0x8Bu, 0x0Cu},\r
+ {0x8Eu, 0xFFu},\r
+ {0x8Fu, 0x70u},\r
+ {0x94u, 0x0Fu},\r
+ {0x95u, 0x10u},\r
+ {0x96u, 0xF0u},\r
+ {0x97u, 0x2Fu},\r
+ {0x9Au, 0xFFu},\r
+ {0x9Du, 0x40u},\r
+ {0x9Fu, 0x1Fu},\r
+ {0xA5u, 0x0Fu},\r
+ {0xA6u, 0xFFu},\r
+ {0xA8u, 0x69u},\r
+ {0xA9u, 0x20u},\r
+ {0xAAu, 0x96u},\r
{0xABu, 0x4Fu},\r
- {0xACu, 0x20u},\r
- {0xAEu, 0x40u},\r
- {0xAFu, 0x80u},\r
- {0xB1u, 0x7Fu},\r
- {0xB4u, 0x60u},\r
- {0xB5u, 0x80u},\r
- {0xB6u, 0x1Fu},\r
- {0xBAu, 0x20u},\r
- {0xBFu, 0x10u},\r
- {0xD4u, 0x01u},\r
+ {0xACu, 0x33u},\r
+ {0xADu, 0x05u},\r
+ {0xAEu, 0xCCu},\r
+ {0xAFu, 0x0Au},\r
+ {0xB2u, 0xFFu},\r
+ {0xB7u, 0x7Fu},\r
+ {0xBAu, 0x08u},\r
{0xD8u, 0x04u},\r
{0xD9u, 0x04u},\r
- {0xDBu, 0x04u},\r
{0xDCu, 0x11u},\r
- {0xDDu, 0x10u},\r
{0xDFu, 0x01u},\r
- {0x00u, 0x02u},\r
- {0x01u, 0x60u},\r
+ {0x00u, 0x40u},\r
+ {0x01u, 0x22u},\r
{0x03u, 0x20u},\r
{0x04u, 0x80u},\r
- {0x05u, 0x10u},\r
- {0x06u, 0x01u},\r
- {0x07u, 0x40u},\r
- {0x09u, 0x08u},\r
- {0x0Au, 0x48u},\r
- {0x0Bu, 0x01u},\r
- {0x0Du, 0x18u},\r
- {0x0Eu, 0x01u},\r
- {0x0Fu, 0x80u},\r
- {0x10u, 0x82u},\r
+ {0x05u, 0xA6u},\r
+ {0x06u, 0x08u},\r
+ {0x08u, 0x08u},\r
+ {0x09u, 0x10u},\r
+ {0x0Eu, 0x18u},\r
+ {0x12u, 0xA0u},\r
+ {0x13u, 0x80u},\r
{0x14u, 0x02u},\r
+ {0x16u, 0x04u},\r
+ {0x17u, 0x04u},\r
+ {0x18u, 0x40u},\r
+ {0x1Bu, 0x02u},\r
+ {0x1Eu, 0x10u},\r
+ {0x20u, 0x20u},\r
+ {0x22u, 0x52u},\r
+ {0x23u, 0x41u},\r
+ {0x25u, 0x40u},\r
+ {0x27u, 0x02u},\r
+ {0x2Au, 0x82u},\r
+ {0x2Bu, 0x24u},\r
+ {0x2Cu, 0x20u},\r
+ {0x2Du, 0x20u},\r
+ {0x2Fu, 0x02u},\r
+ {0x32u, 0x52u},\r
+ {0x33u, 0x08u},\r
+ {0x35u, 0x80u},\r
+ {0x37u, 0x84u},\r
+ {0x38u, 0x80u},\r
+ {0x3Au, 0x08u},\r
+ {0x3Bu, 0x12u},\r
+ {0x3Cu, 0x04u},\r
+ {0x3Du, 0x80u},\r
+ {0x3Eu, 0x10u},\r
+ {0x43u, 0x0Cu},\r
+ {0x58u, 0x10u},\r
+ {0x59u, 0x08u},\r
+ {0x5Bu, 0x41u},\r
+ {0x60u, 0x01u},\r
+ {0x61u, 0x46u},\r
+ {0x62u, 0x20u},\r
+ {0x63u, 0x18u},\r
+ {0x7Du, 0x20u},\r
+ {0x7Fu, 0x08u},\r
+ {0x81u, 0x20u},\r
+ {0x83u, 0x40u},\r
+ {0x84u, 0x20u},\r
+ {0x88u, 0x10u},\r
+ {0x8Bu, 0x02u},\r
+ {0x91u, 0x04u},\r
+ {0x93u, 0x22u},\r
+ {0x94u, 0x01u},\r
+ {0x96u, 0x22u},\r
+ {0x97u, 0x01u},\r
+ {0x98u, 0xA9u},\r
+ {0x99u, 0x82u},\r
+ {0x9Au, 0x8Eu},\r
+ {0x9Cu, 0x02u},\r
+ {0xA0u, 0xA8u},\r
+ {0xA2u, 0x84u},\r
+ {0xA3u, 0x60u},\r
+ {0xA4u, 0x40u},\r
+ {0xA5u, 0x08u},\r
+ {0xA6u, 0x02u},\r
+ {0xA7u, 0x18u},\r
+ {0xABu, 0x08u},\r
+ {0xACu, 0x30u},\r
+ {0xADu, 0x50u},\r
+ {0xAFu, 0x10u},\r
+ {0xB4u, 0x40u},\r
+ {0xB5u, 0x04u},\r
+ {0xB6u, 0x40u},\r
+ {0xC0u, 0xFFu},\r
+ {0xC2u, 0x66u},\r
+ {0xC4u, 0xEDu},\r
+ {0xCAu, 0x7Fu},\r
+ {0xCCu, 0x5Fu},\r
+ {0xCEu, 0x7Fu},\r
+ {0xD6u, 0x0Fu},\r
+ {0xD8u, 0x0Fu},\r
+ {0xE0u, 0x02u},\r
+ {0xE2u, 0x04u},\r
+ {0xE6u, 0x11u},\r
+ {0xE8u, 0x0Au},\r
+ {0xEAu, 0x10u},\r
+ {0xECu, 0x01u},\r
+ {0xEEu, 0x02u},\r
+ {0x00u, 0x1Fu},\r
+ {0x01u, 0xE0u},\r
+ {0x02u, 0x20u},\r
+ {0x06u, 0x60u},\r
+ {0x07u, 0x01u},\r
+ {0x0Au, 0x9Fu},\r
+ {0x0Fu, 0xECu},\r
+ {0x10u, 0x90u},\r
+ {0x11u, 0x21u},\r
+ {0x12u, 0x40u},\r
+ {0x13u, 0x02u},\r
+ {0x14u, 0xC0u},\r
{0x15u, 0x04u},\r
{0x16u, 0x08u},\r
- {0x18u, 0x09u},\r
- {0x1Au, 0x4Au},\r
- {0x1Bu, 0x40u},\r
- {0x1Cu, 0x02u},\r
- {0x1Du, 0x50u},\r
+ {0x17u, 0x43u},\r
+ {0x18u, 0xC0u},\r
+ {0x19u, 0x88u},\r
+ {0x1Au, 0x04u},\r
+ {0x1Bu, 0x03u},\r
+ {0x1Cu, 0xC0u},\r
{0x1Eu, 0x01u},\r
- {0x1Fu, 0x40u},\r
- {0x21u, 0x21u},\r
- {0x22u, 0x40u},\r
- {0x23u, 0x30u},\r
+ {0x20u, 0xC0u},\r
+ {0x22u, 0x02u},\r
{0x25u, 0x10u},\r
- {0x27u, 0x80u},\r
- {0x28u, 0x80u},\r
- {0x29u, 0x40u},\r
- {0x2Au, 0x18u},\r
- {0x2Eu, 0x04u},\r
- {0x2Fu, 0x4Au},\r
- {0x31u, 0x28u},\r
- {0x32u, 0x01u},\r
- {0x33u, 0x48u},\r
- {0x35u, 0x20u},\r
- {0x37u, 0x88u},\r
- {0x39u, 0x02u},\r
- {0x3Au, 0x04u},\r
- {0x3Bu, 0x50u},\r
- {0x3Du, 0x04u},\r
- {0x3Eu, 0x10u},\r
- {0x58u, 0x40u},\r
- {0x5Fu, 0x80u},\r
- {0x62u, 0x40u},\r
- {0x68u, 0x02u},\r
- {0x83u, 0x14u},\r
- {0x87u, 0x20u},\r
- {0x88u, 0x01u},\r
- {0x89u, 0x20u},\r
- {0x8Au, 0x08u},\r
- {0x8Cu, 0x24u},\r
- {0x91u, 0x61u},\r
- {0x92u, 0x30u},\r
- {0x93u, 0x41u},\r
- {0x94u, 0x20u},\r
- {0x95u, 0x06u},\r
- {0x96u, 0xC3u},\r
- {0x97u, 0x80u},\r
- {0x98u, 0x48u},\r
- {0x9Au, 0x05u},\r
- {0x9Bu, 0x50u},\r
- {0x9Du, 0x30u},\r
- {0x9Eu, 0x40u},\r
- {0x9Fu, 0x05u},\r
- {0xA0u, 0xA0u},\r
- {0xA1u, 0x48u},\r
- {0xA2u, 0x20u},\r
- {0xA3u, 0x02u},\r
- {0xA4u, 0x01u},\r
- {0xA5u, 0x30u},\r
- {0xA7u, 0x41u},\r
- {0xA8u, 0x02u},\r
- {0xAAu, 0x42u},\r
- {0xABu, 0x40u},\r
- {0xAEu, 0x04u},\r
- {0xAFu, 0x80u},\r
- {0xB5u, 0x10u},\r
- {0xB6u, 0x80u},\r
- {0xC0u, 0xDFu},\r
- {0xC2u, 0xFFu},\r
- {0xC4u, 0xE9u},\r
- {0xCAu, 0xFFu},\r
- {0xCCu, 0x7Fu},\r
- {0xCEu, 0x6Fu},\r
- {0xD6u, 0x18u},\r
- {0xD8u, 0x08u},\r
- {0xE0u, 0x04u},\r
- {0xE2u, 0x01u},\r
- {0xE4u, 0x08u},\r
- {0xE8u, 0x05u},\r
- {0xEAu, 0x12u},\r
- {0xECu, 0x80u},\r
- {0xEEu, 0x09u},\r
- {0x00u, 0x55u},\r
- {0x02u, 0xAAu},\r
- {0x0Au, 0xFFu},\r
- {0x0Eu, 0xFFu},\r
- {0x0Fu, 0x12u},\r
- {0x10u, 0xFFu},\r
- {0x13u, 0x01u},\r
- {0x14u, 0xFFu},\r
- {0x17u, 0x0Cu},\r
- {0x18u, 0x0Fu},\r
- {0x19u, 0x24u},\r
- {0x1Au, 0xF0u},\r
- {0x1Bu, 0x03u},\r
- {0x20u, 0x69u},\r
- {0x22u, 0x96u},\r
- {0x24u, 0x33u},\r
- {0x25u, 0x28u},\r
- {0x26u, 0xCCu},\r
- {0x27u, 0x03u},\r
- {0x29u, 0x21u},\r
+ {0x26u, 0xFFu},\r
+ {0x28u, 0x7Fu},\r
+ {0x2Au, 0x80u},\r
{0x2Bu, 0x02u},\r
- {0x2Eu, 0xFFu},\r
- {0x31u, 0x10u},\r
- {0x33u, 0x20u},\r
+ {0x2Cu, 0x80u},\r
+ {0x2Du, 0x10u},\r
+ {0x33u, 0x10u},\r
{0x34u, 0xFFu},\r
- {0x35u, 0x0Fu},\r
- {0x3Au, 0x20u},\r
- {0x3Fu, 0x04u},\r
+ {0x35u, 0xE0u},\r
+ {0x37u, 0x0Fu},\r
+ {0x39u, 0x08u},\r
+ {0x3Eu, 0x10u},\r
+ {0x3Fu, 0x10u},\r
+ {0x56u, 0x08u},\r
{0x58u, 0x04u},\r
{0x59u, 0x04u},\r
{0x5Bu, 0x04u},\r
- {0x5Cu, 0x01u},\r
+ {0x5Du, 0x90u},\r
{0x5Fu, 0x01u},\r
- {0x80u, 0x02u},\r
- {0x82u, 0x09u},\r
- {0x83u, 0x40u},\r
- {0x84u, 0x01u},\r
- {0x86u, 0x02u},\r
- {0x8Bu, 0x80u},\r
- {0x8Cu, 0x02u},\r
- {0x8Eu, 0x01u},\r
- {0x8Fu, 0x01u},\r
- {0x91u, 0x03u},\r
- {0x93u, 0x0Cu},\r
- {0x94u, 0x02u},\r
- {0x96u, 0x01u},\r
- {0x97u, 0x30u},\r
- {0x98u, 0x10u},\r
- {0x99u, 0x02u},\r
- {0x9Cu, 0x10u},\r
- {0x9Fu, 0x07u},\r
- {0xA0u, 0x02u},\r
- {0xA1u, 0x04u},\r
- {0xA2u, 0x05u},\r
- {0xA4u, 0x10u},\r
- {0xA5u, 0x4Du},\r
- {0xA7u, 0x22u},\r
- {0xA9u, 0x48u},\r
- {0xABu, 0x17u},\r
+ {0x80u, 0x0Fu},\r
+ {0x82u, 0x80u},\r
+ {0x84u, 0x50u},\r
+ {0x86u, 0x8Fu},\r
+ {0x8Fu, 0x04u},\r
+ {0x90u, 0x04u},\r
+ {0x91u, 0x04u},\r
+ {0x92u, 0x08u},\r
+ {0x93u, 0x08u},\r
+ {0x94u, 0x20u},\r
+ {0x96u, 0x0Fu},\r
+ {0x98u, 0x4Fu},\r
+ {0x9Au, 0x80u},\r
+ {0x9Bu, 0x08u},\r
+ {0x9Cu, 0x01u},\r
+ {0x9Eu, 0x02u},\r
+ {0xA0u, 0x01u},\r
+ {0xA2u, 0x02u},\r
+ {0xA3u, 0x01u},\r
+ {0xA6u, 0x10u},\r
+ {0xA8u, 0x04u},\r
+ {0xAAu, 0x08u},\r
{0xACu, 0x10u},\r
- {0xADu, 0x0Bu},\r
- {0xAFu, 0x44u},\r
- {0xB0u, 0x04u},\r
- {0xB1u, 0x0Fu},\r
- {0xB2u, 0x08u},\r
- {0xB3u, 0x70u},\r
- {0xB4u, 0x03u},\r
- {0xB5u, 0x80u},\r
- {0xB6u, 0x10u},\r
- {0xB8u, 0x80u},\r
- {0xBAu, 0x20u},\r
- {0xBBu, 0x02u},\r
- {0xBEu, 0x40u},\r
- {0xD6u, 0x08u},\r
+ {0xAEu, 0x8Fu},\r
+ {0xAFu, 0x02u},\r
+ {0xB1u, 0x01u},\r
+ {0xB2u, 0xF0u},\r
+ {0xB3u, 0x02u},\r
+ {0xB4u, 0x0Cu},\r
+ {0xB5u, 0x0Cu},\r
+ {0xB6u, 0x03u},\r
+ {0xB8u, 0x0Au},\r
+ {0xBAu, 0xA0u},\r
+ {0xBEu, 0x01u},\r
+ {0xBFu, 0x10u},\r
{0xD8u, 0x04u},\r
{0xD9u, 0x04u},\r
{0xDBu, 0x04u},\r
{0xDCu, 0x11u},\r
- {0xDDu, 0x90u},\r
{0xDFu, 0x01u},\r
- {0x01u, 0x82u},\r
- {0x03u, 0x20u},\r
- {0x04u, 0x01u},\r
- {0x05u, 0x60u},\r
- {0x08u, 0x20u},\r
- {0x09u, 0x40u},\r
- {0x0Au, 0x20u},\r
- {0x0Cu, 0x04u},\r
- {0x0Du, 0x08u},\r
- {0x0Eu, 0x04u},\r
- {0x0Fu, 0xA0u},\r
+ {0x01u, 0x0Au},\r
+ {0x04u, 0x02u},\r
+ {0x06u, 0x04u},\r
+ {0x07u, 0x20u},\r
+ {0x08u, 0x10u},\r
+ {0x09u, 0x02u},\r
+ {0x0Au, 0x02u},\r
+ {0x0Bu, 0x20u},\r
+ {0x0Eu, 0x54u},\r
+ {0x0Fu, 0x01u},\r
{0x10u, 0x20u},\r
- {0x11u, 0x40u},\r
- {0x13u, 0x01u},\r
- {0x16u, 0x50u},\r
- {0x17u, 0x40u},\r
+ {0x11u, 0x20u},\r
+ {0x12u, 0x82u},\r
+ {0x15u, 0x01u},\r
+ {0x17u, 0x58u},\r
{0x18u, 0x20u},\r
- {0x19u, 0x02u},\r
- {0x1Au, 0x01u},\r
- {0x1Bu, 0x20u},\r
- {0x1Eu, 0x04u},\r
- {0x20u, 0x08u},\r
- {0x21u, 0x02u},\r
- {0x22u, 0x04u},\r
- {0x26u, 0x02u},\r
- {0x27u, 0x28u},\r
- {0x29u, 0x60u},\r
- {0x2Bu, 0x50u},\r
- {0x2Fu, 0x18u},\r
- {0x31u, 0x02u},\r
- {0x32u, 0x24u},\r
- {0x33u, 0x40u},\r
- {0x35u, 0x08u},\r
- {0x36u, 0x02u},\r
- {0x37u, 0x18u},\r
- {0x38u, 0x80u},\r
- {0x39u, 0x11u},\r
- {0x3Cu, 0x80u},\r
- {0x49u, 0x40u},\r
- {0x4Bu, 0x80u},\r
- {0x58u, 0x40u},\r
- {0x59u, 0x10u},\r
- {0x60u, 0x03u},\r
- {0x62u, 0x10u},\r
- {0x6Du, 0x04u},\r
- {0x6Eu, 0x60u},\r
- {0x80u, 0x10u},\r
- {0x81u, 0xC2u},\r
- {0x86u, 0x11u},\r
- {0x8Au, 0x04u},\r
- {0x8Du, 0x10u},\r
- {0x90u, 0x80u},\r
- {0x91u, 0x11u},\r
- {0x92u, 0x22u},\r
- {0x93u, 0x81u},\r
- {0x94u, 0x20u},\r
- {0x95u, 0x04u},\r
- {0x96u, 0x04u},\r
- {0x98u, 0x28u},\r
- {0x9Au, 0x40u},\r
- {0x9Bu, 0x40u},\r
+ {0x19u, 0x08u},\r
+ {0x1Au, 0x82u},\r
+ {0x1Bu, 0x1Cu},\r
+ {0x1Fu, 0x20u},\r
+ {0x20u, 0x80u},\r
+ {0x21u, 0x08u},\r
+ {0x23u, 0x04u},\r
+ {0x25u, 0x40u},\r
+ {0x27u, 0x24u},\r
+ {0x28u, 0x10u},\r
+ {0x29u, 0x40u},\r
+ {0x2Au, 0x08u},\r
+ {0x2Bu, 0x40u},\r
+ {0x2Fu, 0x25u},\r
+ {0x30u, 0x02u},\r
+ {0x31u, 0x20u},\r
+ {0x37u, 0x19u},\r
+ {0x3Au, 0x20u},\r
+ {0x3Bu, 0x60u},\r
+ {0x3Cu, 0x08u},\r
+ {0x3Du, 0xA0u},\r
+ {0x3Eu, 0x02u},\r
+ {0x3Fu, 0x20u},\r
+ {0x49u, 0x80u},\r
+ {0x4Au, 0x02u},\r
+ {0x58u, 0xA5u},\r
+ {0x5Cu, 0x40u},\r
+ {0x62u, 0x40u},\r
+ {0x64u, 0x02u},\r
+ {0x68u, 0x02u},\r
+ {0x69u, 0x40u},\r
+ {0x81u, 0x40u},\r
+ {0x82u, 0x40u},\r
+ {0x8Au, 0x40u},\r
+ {0x8Bu, 0x04u},\r
+ {0x8Cu, 0x40u},\r
+ {0x91u, 0x04u},\r
+ {0x93u, 0x60u},\r
+ {0x94u, 0x04u},\r
+ {0x96u, 0x02u},\r
+ {0x98u, 0xA5u},\r
+ {0x99u, 0xC2u},\r
+ {0x9Au, 0x08u},\r
{0x9Cu, 0x02u},\r
- {0x9Du, 0x20u},\r
- {0x9Eu, 0x10u},\r
- {0xA0u, 0x20u},\r
- {0xA1u, 0x48u},\r
- {0xA2u, 0x20u},\r
- {0xA3u, 0x40u},\r
- {0xA7u, 0x21u},\r
- {0xA8u, 0x80u},\r
- {0xAAu, 0x40u},\r
- {0xAFu, 0x29u},\r
- {0xB1u, 0x18u},\r
- {0xB4u, 0x01u},\r
- {0xC0u, 0xDDu},\r
- {0xC2u, 0x77u},\r
- {0xC4u, 0xBDu},\r
- {0xCAu, 0x6Fu},\r
- {0xCCu, 0xEFu},\r
- {0xCEu, 0x1Du},\r
- {0xD6u, 0x0Cu},\r
- {0xD8u, 0x0Cu},\r
- {0xE0u, 0x08u},\r
- {0xE6u, 0x05u},\r
- {0xEAu, 0x09u},\r
- {0x82u, 0x80u},\r
- {0x89u, 0x08u},\r
- {0x9Du, 0x08u},\r
+ {0xA0u, 0x28u},\r
+ {0xA1u, 0x22u},\r
{0xA2u, 0x80u},\r
- {0xA7u, 0x08u},\r
- {0xADu, 0x08u},\r
- {0xAEu, 0x04u},\r
- {0xAFu, 0x92u},\r
- {0xB1u, 0x20u},\r
- {0xB2u, 0x14u},\r
- {0xB3u, 0x02u},\r
- {0xB4u, 0x80u},\r
- {0xB7u, 0x20u},\r
- {0xE0u, 0x88u},\r
+ {0xA3u, 0x40u},\r
+ {0xA4u, 0x40u},\r
+ {0xA5u, 0x08u},\r
+ {0xA7u, 0x18u},\r
+ {0xA9u, 0x08u},\r
+ {0xAFu, 0x01u},\r
+ {0xB0u, 0x94u},\r
+ {0xC0u, 0x7Cu},\r
+ {0xC2u, 0xFFu},\r
+ {0xC4u, 0xFFu},\r
+ {0xCAu, 0x79u},\r
+ {0xCCu, 0xE5u},\r
+ {0xCEu, 0xD8u},\r
+ {0xD6u, 0x1Fu},\r
+ {0xD8u, 0x18u},\r
+ {0xE2u, 0x04u},\r
+ {0xE4u, 0x14u},\r
+ {0xEAu, 0x03u},\r
+ {0xEEu, 0x04u},\r
+ {0x80u, 0x08u},\r
+ {0x82u, 0x40u},\r
+ {0x8Bu, 0x40u},\r
+ {0x8Fu, 0x20u},\r
+ {0x91u, 0x10u},\r
+ {0x92u, 0x0Au},\r
+ {0x93u, 0x90u},\r
+ {0x95u, 0x48u},\r
+ {0x96u, 0x20u},\r
+ {0x97u, 0x02u},\r
+ {0x98u, 0x20u},\r
+ {0x9Bu, 0x10u},\r
+ {0x9Cu, 0x08u},\r
+ {0x9Du, 0x60u},\r
+ {0x9Eu, 0x10u},\r
+ {0xA0u, 0x04u},\r
+ {0xA1u, 0x40u},\r
+ {0xA2u, 0x02u},\r
+ {0xA3u, 0xA4u},\r
+ {0xA7u, 0x12u},\r
+ {0xACu, 0x04u},\r
+ {0xAFu, 0x02u},\r
+ {0xB7u, 0x10u},\r
{0xE2u, 0x40u},\r
- {0xE6u, 0x01u},\r
- {0xEAu, 0x81u},\r
- {0xECu, 0x38u},\r
- {0x02u, 0x04u},\r
- {0x05u, 0x08u},\r
- {0x06u, 0x08u},\r
- {0x07u, 0x05u},\r
- {0x0Cu, 0x2Au},\r
- {0x0Du, 0x08u},\r
- {0x0Eu, 0x54u},\r
- {0x0Fu, 0x04u},\r
- {0x12u, 0x01u},\r
- {0x15u, 0x04u},\r
- {0x16u, 0x02u},\r
- {0x17u, 0x08u},\r
- {0x19u, 0x08u},\r
- {0x1Au, 0x40u},\r
- {0x1Bu, 0x06u},\r
- {0x1Du, 0x08u},\r
- {0x1Eu, 0x20u},\r
- {0x1Fu, 0x14u},\r
- {0x22u, 0x10u},\r
- {0x30u, 0x06u},\r
- {0x31u, 0x02u},\r
- {0x32u, 0x01u},\r
- {0x33u, 0x0Cu},\r
- {0x34u, 0x18u},\r
- {0x35u, 0x10u},\r
- {0x36u, 0x60u},\r
- {0x37u, 0x01u},\r
- {0x3Bu, 0x08u},\r
- {0x3Eu, 0x51u},\r
- {0x56u, 0x08u},\r
+ {0xE4u, 0x30u},\r
+ {0xE6u, 0x80u},\r
+ {0xEAu, 0x23u},\r
+ {0xEEu, 0x04u},\r
+ {0x04u, 0x30u},\r
+ {0x06u, 0xC0u},\r
+ {0x07u, 0x01u},\r
+ {0x0Au, 0xFFu},\r
+ {0x0Bu, 0x02u},\r
+ {0x0Eu, 0xFFu},\r
+ {0x10u, 0x60u},\r
+ {0x12u, 0x90u},\r
+ {0x13u, 0x08u},\r
+ {0x14u, 0x0Fu},\r
+ {0x16u, 0xF0u},\r
+ {0x18u, 0x06u},\r
+ {0x1Au, 0x09u},\r
+ {0x1Bu, 0x04u},\r
+ {0x1Cu, 0x05u},\r
+ {0x1Eu, 0x0Au},\r
+ {0x20u, 0xFFu},\r
+ {0x28u, 0x50u},\r
+ {0x29u, 0x04u},\r
+ {0x2Au, 0xA0u},\r
+ {0x2Bu, 0x08u},\r
+ {0x2Cu, 0x03u},\r
+ {0x2Eu, 0x0Cu},\r
+ {0x31u, 0x0Cu},\r
+ {0x33u, 0x02u},\r
+ {0x35u, 0x01u},\r
+ {0x36u, 0xFFu},\r
+ {0x3Eu, 0x40u},\r
+ {0x3Fu, 0x01u},\r
{0x58u, 0x04u},\r
{0x59u, 0x04u},\r
{0x5Bu, 0x04u},\r
- {0x5Cu, 0x11u},\r
- {0x5Du, 0x90u},\r
+ {0x5Cu, 0x10u},\r
{0x5Fu, 0x01u},\r
- {0x84u, 0xFFu},\r
- {0x89u, 0x04u},\r
- {0x8Au, 0xFFu},\r
- {0x8Bu, 0x03u},\r
- {0x91u, 0x04u},\r
- {0x93u, 0x0Au},\r
- {0x94u, 0x0Fu},\r
- {0x95u, 0x02u},\r
- {0x96u, 0xF0u},\r
- {0x97u, 0x04u},\r
- {0x98u, 0xFFu},\r
- {0x99u, 0x04u},\r
- {0x9Bu, 0x02u},\r
- {0x9Cu, 0x33u},\r
- {0x9Eu, 0xCCu},\r
- {0xA0u, 0x96u},\r
- {0xA2u, 0x69u},\r
- {0xA6u, 0xFFu},\r
- {0xA9u, 0x04u},\r
- {0xAAu, 0xFFu},\r
- {0xABu, 0x02u},\r
- {0xACu, 0x55u},\r
- {0xAEu, 0xAAu},\r
- {0xB0u, 0xFFu},\r
- {0xB3u, 0x06u},\r
- {0xB5u, 0x08u},\r
- {0xB7u, 0x01u},\r
- {0xBAu, 0x02u},\r
- {0xBBu, 0x08u},\r
+ {0x84u, 0x50u},\r
+ {0x85u, 0x30u},\r
+ {0x86u, 0xA0u},\r
+ {0x87u, 0xC0u},\r
+ {0x88u, 0xFFu},\r
+ {0x8Bu, 0xFFu},\r
+ {0x8Eu, 0xFFu},\r
+ {0x8Fu, 0xFFu},\r
+ {0x90u, 0x03u},\r
+ {0x91u, 0x90u},\r
+ {0x92u, 0x0Cu},\r
+ {0x93u, 0x60u},\r
+ {0x94u, 0x06u},\r
+ {0x95u, 0x0Fu},\r
+ {0x96u, 0x09u},\r
+ {0x97u, 0xF0u},\r
+ {0x98u, 0x30u},\r
+ {0x99u, 0x09u},\r
+ {0x9Au, 0xC0u},\r
+ {0x9Bu, 0x06u},\r
+ {0x9Cu, 0x60u},\r
+ {0x9Du, 0x05u},\r
+ {0x9Eu, 0x90u},\r
+ {0x9Fu, 0x0Au},\r
+ {0xA0u, 0x05u},\r
+ {0xA2u, 0x0Au},\r
+ {0xA3u, 0xFFu},\r
+ {0xA8u, 0x0Fu},\r
+ {0xA9u, 0x50u},\r
+ {0xAAu, 0xF0u},\r
+ {0xABu, 0xA0u},\r
+ {0xADu, 0x03u},\r
+ {0xAEu, 0xFFu},\r
+ {0xAFu, 0x0Cu},\r
+ {0xB1u, 0xFFu},\r
+ {0xB4u, 0xFFu},\r
+ {0xBEu, 0x10u},\r
+ {0xBFu, 0x01u},\r
+ {0xD4u, 0x01u},\r
{0xD8u, 0x04u},\r
{0xD9u, 0x04u},\r
{0xDBu, 0x04u},\r
- {0xDCu, 0x11u},\r
+ {0xDDu, 0x10u},\r
{0xDFu, 0x01u},\r
- {0x00u, 0x02u},\r
- {0x01u, 0x48u},\r
- {0x05u, 0x20u},\r
- {0x07u, 0x20u},\r
- {0x09u, 0x04u},\r
+ {0x00u, 0x90u},\r
+ {0x01u, 0x84u},\r
+ {0x04u, 0x10u},\r
+ {0x05u, 0x80u},\r
+ {0x06u, 0x20u},\r
+ {0x08u, 0x98u},\r
{0x0Au, 0x80u},\r
- {0x0Bu, 0x05u},\r
- {0x0Eu, 0x04u},\r
- {0x0Fu, 0x12u},\r
- {0x10u, 0x80u},\r
- {0x14u, 0x02u},\r
- {0x15u, 0x14u},\r
- {0x16u, 0x40u},\r
- {0x19u, 0x01u},\r
- {0x1Au, 0x28u},\r
+ {0x0Cu, 0x01u},\r
+ {0x0Eu, 0x22u},\r
+ {0x0Fu, 0x04u},\r
+ {0x10u, 0x01u},\r
+ {0x11u, 0x51u},\r
+ {0x14u, 0x88u},\r
+ {0x16u, 0x02u},\r
{0x1Bu, 0x80u},\r
- {0x1Fu, 0x02u},\r
- {0x20u, 0x40u},\r
- {0x21u, 0x88u},\r
- {0x22u, 0x20u},\r
- {0x24u, 0x10u},\r
- {0x26u, 0x18u},\r
- {0x27u, 0x01u},\r
- {0x2Fu, 0x08u},\r
- {0x31u, 0x88u},\r
- {0x32u, 0x20u},\r
- {0x36u, 0x18u},\r
+ {0x1Fu, 0x20u},\r
+ {0x20u, 0x04u},\r
+ {0x21u, 0x10u},\r
+ {0x22u, 0x05u},\r
+ {0x26u, 0x02u},\r
+ {0x28u, 0x08u},\r
+ {0x2Du, 0x51u},\r
+ {0x2Eu, 0x22u},\r
+ {0x30u, 0x10u},\r
+ {0x33u, 0x01u},\r
+ {0x34u, 0x98u},\r
+ {0x35u, 0x40u},\r
+ {0x36u, 0x11u},\r
{0x37u, 0x01u},\r
- {0x38u, 0x44u},\r
- {0x3Fu, 0x20u},\r
- {0x58u, 0x94u},\r
- {0x5Cu, 0x10u},\r
- {0x5Fu, 0x8Au},\r
+ {0x39u, 0x28u},\r
+ {0x3Cu, 0x90u},\r
+ {0x3Du, 0x04u},\r
+ {0x3Fu, 0x04u},\r
+ {0x5Fu, 0x40u},\r
{0x60u, 0x04u},\r
- {0x62u, 0x40u},\r
- {0x63u, 0x20u},\r
- {0x65u, 0x40u},\r
- {0x80u, 0x40u},\r
- {0x83u, 0x89u},\r
- {0x85u, 0x40u},\r
- {0x88u, 0x04u},\r
- {0x89u, 0x14u},\r
- {0x8Du, 0x15u},\r
- {0x90u, 0x80u},\r
- {0x91u, 0x40u},\r
- {0x92u, 0x80u},\r
- {0x93u, 0x04u},\r
+ {0x63u, 0x08u},\r
+ {0x69u, 0x16u},\r
+ {0x6Au, 0x80u},\r
+ {0x6Bu, 0x01u},\r
+ {0x70u, 0xA2u},\r
+ {0x73u, 0x10u},\r
+ {0x80u, 0x02u},\r
+ {0x84u, 0x40u},\r
+ {0x8Au, 0x40u},\r
+ {0x8Bu, 0x40u},\r
+ {0x90u, 0x10u},\r
+ {0x93u, 0x80u},\r
+ {0x95u, 0x52u},\r
{0x96u, 0x20u},\r
- {0x98u, 0x12u},\r
- {0x99u, 0x30u},\r
- {0x9Du, 0x0Cu},\r
- {0xA0u, 0x81u},\r
- {0xA1u, 0x04u},\r
- {0xA2u, 0x80u},\r
- {0xA3u, 0x01u},\r
- {0xA8u, 0x01u},\r
- {0xA9u, 0x24u},\r
- {0xAAu, 0x04u},\r
- {0xABu, 0x41u},\r
+ {0x97u, 0x16u},\r
+ {0x98u, 0x20u},\r
+ {0x9Au, 0x02u},\r
+ {0x9Bu, 0x10u},\r
+ {0x9Cu, 0x8Cu},\r
+ {0x9Du, 0x20u},\r
+ {0x9Eu, 0x50u},\r
+ {0x9Fu, 0x01u},\r
+ {0xA0u, 0x04u},\r
+ {0xA1u, 0x40u},\r
+ {0xA2u, 0x10u},\r
+ {0xA4u, 0xA2u},\r
+ {0xAAu, 0x08u},\r
{0xACu, 0x01u},\r
- {0xADu, 0x10u},\r
- {0xAFu, 0x80u},\r
- {0xB0u, 0x10u},\r
- {0xB2u, 0x02u},\r
- {0xB3u, 0x10u},\r
- {0xB4u, 0x40u},\r
- {0xB6u, 0x20u},\r
- {0xC0u, 0x6Du},\r
- {0xC2u, 0xEFu},\r
- {0xC4u, 0xF8u},\r
- {0xCAu, 0x20u},\r
- {0xCCu, 0xEEu},\r
- {0xCEu, 0x2Au},\r
- {0xD6u, 0xFEu},\r
- {0xD8u, 0x1Eu},\r
- {0xE0u, 0xB0u},\r
- {0xE2u, 0x40u},\r
- {0xE4u, 0x04u},\r
- {0xEAu, 0x10u},\r
- {0xECu, 0x84u},\r
- {0x01u, 0xFFu},\r
- {0x04u, 0x03u},\r
- {0x05u, 0x03u},\r
- {0x06u, 0x0Cu},\r
- {0x07u, 0x0Cu},\r
- {0x09u, 0x30u},\r
- {0x0Au, 0xFFu},\r
- {0x0Bu, 0xC0u},\r
- {0x0Cu, 0x05u},\r
- {0x0Du, 0x06u},\r
- {0x0Eu, 0x0Au},\r
- {0x0Fu, 0x09u},\r
- {0x10u, 0x09u},\r
- {0x12u, 0x06u},\r
- {0x14u, 0x90u},\r
- {0x16u, 0x60u},\r
- {0x17u, 0xFFu},\r
- {0x18u, 0x50u},\r
- {0x1Au, 0xA0u},\r
- {0x1Bu, 0xFFu},\r
- {0x1Du, 0x0Fu},\r
- {0x1Eu, 0xFFu},\r
- {0x1Fu, 0xF0u},\r
- {0x20u, 0x0Fu},\r
- {0x21u, 0x60u},\r
- {0x22u, 0xF0u},\r
- {0x23u, 0x90u},\r
- {0x25u, 0x50u},\r
- {0x26u, 0xFFu},\r
- {0x27u, 0xA0u},\r
- {0x28u, 0x30u},\r
- {0x2Au, 0xC0u},\r
- {0x2Du, 0x05u},\r
- {0x2Fu, 0x0Au},\r
- {0x30u, 0xFFu},\r
- {0x37u, 0xFFu},\r
- {0x3Eu, 0x01u},\r
- {0x3Fu, 0x40u},\r
- {0x56u, 0x08u},\r
+ {0xAEu, 0x22u},\r
+ {0xAFu, 0x20u},\r
+ {0xB4u, 0x04u},\r
+ {0xB7u, 0x80u},\r
+ {0xC0u, 0xE7u},\r
+ {0xC2u, 0xFFu},\r
+ {0xC4u, 0xDBu},\r
+ {0xCAu, 0xB4u},\r
+ {0xCCu, 0xF5u},\r
+ {0xCEu, 0x76u},\r
+ {0xD6u, 0x10u},\r
+ {0xE0u, 0x20u},\r
+ {0xE4u, 0x80u},\r
+ {0xE6u, 0x11u},\r
+ {0xECu, 0x10u},\r
+ {0xEEu, 0x42u},\r
+ {0x03u, 0x13u},\r
+ {0x06u, 0xFFu},\r
+ {0x08u, 0xFFu},\r
+ {0x0Bu, 0x10u},\r
+ {0x0Cu, 0x90u},\r
+ {0x0Eu, 0x60u},\r
+ {0x0Fu, 0x0Cu},\r
+ {0x11u, 0x13u},\r
+ {0x13u, 0x08u},\r
+ {0x14u, 0x09u},\r
+ {0x16u, 0x06u},\r
+ {0x18u, 0x30u},\r
+ {0x19u, 0x01u},\r
+ {0x1Au, 0xC0u},\r
+ {0x1Bu, 0x02u},\r
+ {0x1Cu, 0x03u},\r
+ {0x1Du, 0x03u},\r
+ {0x1Eu, 0x0Cu},\r
+ {0x20u, 0x05u},\r
+ {0x22u, 0x0Au},\r
+ {0x23u, 0x03u},\r
+ {0x24u, 0x0Fu},\r
+ {0x25u, 0x10u},\r
+ {0x26u, 0xF0u},\r
+ {0x27u, 0x07u},\r
+ {0x28u, 0x50u},\r
+ {0x2Au, 0xA0u},\r
+ {0x2Bu, 0x20u},\r
+ {0x2Cu, 0xFFu},\r
+ {0x2Du, 0x01u},\r
+ {0x2Fu, 0x02u},\r
+ {0x33u, 0x20u},\r
+ {0x34u, 0xFFu},\r
+ {0x35u, 0x03u},\r
+ {0x37u, 0x1Cu},\r
+ {0x3Bu, 0x20u},\r
+ {0x3Eu, 0x10u},\r
{0x58u, 0x04u},\r
{0x59u, 0x04u},\r
- {0x5Bu, 0x04u},\r
- {0x5Du, 0x90u},\r
+ {0x5Cu, 0x10u},\r
{0x5Fu, 0x01u},\r
- {0x81u, 0x08u},\r
- {0x83u, 0x50u},\r
- {0x88u, 0x20u},\r
- {0x8Au, 0x10u},\r
- {0x8Cu, 0x01u},\r
- {0x8Eu, 0x02u},\r
- {0x90u, 0x20u},\r
- {0x91u, 0x26u},\r
- {0x92u, 0x10u},\r
- {0x93u, 0x58u},\r
- {0x94u, 0x20u},\r
- {0x95u, 0x02u},\r
- {0x96u, 0x18u},\r
- {0x97u, 0x24u},\r
- {0x98u, 0x10u},\r
- {0x9Au, 0x20u},\r
- {0x9Du, 0x10u},\r
- {0x9Eu, 0x01u},\r
- {0x9Fu, 0x08u},\r
- {0xA4u, 0x20u},\r
- {0xA5u, 0x04u},\r
- {0xA6u, 0x14u},\r
- {0xA7u, 0x02u},\r
- {0xA9u, 0x01u},\r
- {0xAAu, 0x02u},\r
- {0xB0u, 0x04u},\r
- {0xB1u, 0x60u},\r
- {0xB2u, 0x08u},\r
- {0xB3u, 0x1Eu},\r
- {0xB4u, 0x30u},\r
- {0xB5u, 0x01u},\r
- {0xB6u, 0x03u},\r
- {0xBAu, 0x20u},\r
- {0xBEu, 0x40u},\r
- {0xBFu, 0x05u},\r
- {0xD6u, 0x08u},\r
+ {0x87u, 0x02u},\r
+ {0x88u, 0x03u},\r
+ {0x8Au, 0x0Cu},\r
+ {0x8Bu, 0x10u},\r
+ {0x8Cu, 0x06u},\r
+ {0x8Eu, 0x09u},\r
+ {0x8Fu, 0x01u},\r
+ {0x93u, 0x04u},\r
+ {0x94u, 0x0Fu},\r
+ {0x96u, 0xF0u},\r
+ {0x97u, 0x20u},\r
+ {0x9Bu, 0x08u},\r
+ {0x9Cu, 0x05u},\r
+ {0x9Eu, 0x0Au},\r
+ {0x9Fu, 0x40u},\r
+ {0xA4u, 0x60u},\r
+ {0xA6u, 0x90u},\r
+ {0xA8u, 0x50u},\r
+ {0xA9u, 0x25u},\r
+ {0xAAu, 0xA0u},\r
+ {0xABu, 0x4Au},\r
+ {0xACu, 0x30u},\r
+ {0xAEu, 0xC0u},\r
+ {0xB1u, 0x03u},\r
+ {0xB2u, 0xFFu},\r
+ {0xB3u, 0x60u},\r
+ {0xB5u, 0x10u},\r
+ {0xB7u, 0x0Cu},\r
+ {0xBEu, 0x04u},\r
+ {0xBFu, 0x45u},\r
{0xD8u, 0x04u},\r
{0xD9u, 0x04u},\r
{0xDBu, 0x04u},\r
- {0xDCu, 0x91u},\r
- {0xDDu, 0x90u},\r
+ {0xDCu, 0x10u},\r
{0xDFu, 0x01u},\r
- {0x03u, 0x09u},\r
- {0x04u, 0x84u},\r
- {0x05u, 0x80u},\r
- {0x06u, 0x08u},\r
- {0x07u, 0x14u},\r
- {0x0Au, 0xA8u},\r
- {0x0Bu, 0x01u},\r
- {0x0Cu, 0x20u},\r
- {0x0Du, 0x90u},\r
- {0x0Eu, 0x21u},\r
- {0x0Fu, 0x84u},\r
- {0x10u, 0x08u},\r
- {0x12u, 0x10u},\r
- {0x14u, 0x20u},\r
- {0x15u, 0x18u},\r
- {0x17u, 0x21u},\r
- {0x18u, 0x02u},\r
- {0x19u, 0x20u},\r
- {0x1Au, 0x88u},\r
- {0x1Bu, 0x08u},\r
- {0x1Cu, 0x80u},\r
- {0x21u, 0x04u},\r
- {0x22u, 0x22u},\r
- {0x26u, 0x80u},\r
- {0x29u, 0x28u},\r
- {0x2Cu, 0x20u},\r
- {0x2Du, 0x80u},\r
- {0x2Fu, 0x80u},\r
- {0x30u, 0x80u},\r
- {0x31u, 0x04u},\r
- {0x33u, 0x01u},\r
- {0x34u, 0x20u},\r
- {0x36u, 0x40u},\r
- {0x37u, 0x04u},\r
- {0x3Au, 0x02u},\r
- {0x3Cu, 0x04u},\r
- {0x3Du, 0x10u},\r
- {0x3Eu, 0x01u},\r
- {0x3Fu, 0x80u},\r
- {0x5Bu, 0x80u},\r
- {0x5Cu, 0x40u},\r
- {0x5Fu, 0x10u},\r
- {0x63u, 0x02u},\r
- {0x64u, 0x02u},\r
- {0x66u, 0x10u},\r
- {0x67u, 0x02u},\r
- {0x6Du, 0x40u},\r
- {0x6Eu, 0x80u},\r
- {0x6Fu, 0x01u},\r
- {0x81u, 0x80u},\r
- {0x83u, 0x81u},\r
- {0x87u, 0x01u},\r
- {0x88u, 0x40u},\r
- {0x89u, 0x04u},\r
- {0x8Au, 0x08u},\r
- {0x8Eu, 0x08u},\r
- {0x8Fu, 0x10u},\r
- {0x90u, 0x80u},\r
- {0x91u, 0x20u},\r
- {0x95u, 0x48u},\r
- {0x99u, 0x10u},\r
- {0x9Au, 0x02u},\r
- {0x9Bu, 0x30u},\r
- {0x9Eu, 0x04u},\r
- {0xA0u, 0x89u},\r
- {0xA1u, 0x80u},\r
+ {0x00u, 0x80u},\r
+ {0x02u, 0x04u},\r
+ {0x03u, 0x02u},\r
+ {0x04u, 0x10u},\r
+ {0x07u, 0x21u},\r
+ {0x08u, 0x08u},\r
+ {0x09u, 0x40u},\r
+ {0x0Du, 0x40u},\r
+ {0x0Eu, 0x20u},\r
+ {0x0Fu, 0x04u},\r
+ {0x10u, 0x22u},\r
+ {0x13u, 0x10u},\r
+ {0x14u, 0x80u},\r
+ {0x15u, 0x10u},\r
+ {0x16u, 0x02u},\r
+ {0x17u, 0x08u},\r
+ {0x18u, 0x10u},\r
+ {0x1Cu, 0x08u},\r
+ {0x20u, 0x24u},\r
+ {0x23u, 0x42u},\r
+ {0x25u, 0x60u},\r
+ {0x26u, 0x20u},\r
+ {0x27u, 0x10u},\r
+ {0x28u, 0x08u},\r
+ {0x2Du, 0x20u},\r
+ {0x2Eu, 0x09u},\r
+ {0x2Fu, 0x81u},\r
+ {0x30u, 0xA0u},\r
+ {0x31u, 0x08u},\r
+ {0x33u, 0x02u},\r
+ {0x34u, 0x01u},\r
+ {0x36u, 0x20u},\r
+ {0x37u, 0x80u},\r
+ {0x39u, 0xC0u},\r
+ {0x3Au, 0x10u},\r
+ {0x3Bu, 0x04u},\r
+ {0x3Du, 0x80u},\r
+ {0x3Eu, 0x20u},\r
+ {0x3Fu, 0x02u},\r
+ {0x58u, 0x04u},\r
+ {0x59u, 0x80u},\r
+ {0x5Au, 0x21u},\r
+ {0x5Cu, 0x08u},\r
+ {0x5Fu, 0x08u},\r
+ {0x60u, 0x02u},\r
+ {0x80u, 0x02u},\r
+ {0x81u, 0x20u},\r
+ {0x87u, 0x40u},\r
+ {0x88u, 0x10u},\r
+ {0x8Bu, 0x82u},\r
+ {0x8Eu, 0x44u},\r
+ {0x93u, 0x80u},\r
+ {0x94u, 0x04u},\r
+ {0x95u, 0x02u},\r
+ {0x96u, 0x80u},\r
+ {0x98u, 0x21u},\r
+ {0x99u, 0x80u},\r
+ {0x9Cu, 0x08u},\r
+ {0x9Eu, 0x40u},\r
+ {0xA0u, 0x41u},\r
+ {0xA1u, 0x08u},\r
{0xA2u, 0x10u},\r
- {0xA7u, 0x50u},\r
- {0xA8u, 0x01u},\r
- {0xABu, 0x10u},\r
- {0xACu, 0x08u},\r
- {0xAFu, 0x20u},\r
- {0xB7u, 0x01u},\r
+ {0xA3u, 0x01u},\r
+ {0xA4u, 0x80u},\r
+ {0xACu, 0x20u},\r
+ {0xB4u, 0x20u},\r
+ {0xB6u, 0x04u},\r
{0xC0u, 0xE3u},\r
- {0xC2u, 0xFFu},\r
- {0xC4u, 0x76u},\r
- {0xCAu, 0xD6u},\r
- {0xCCu, 0x7Bu},\r
- {0xCEu, 0xF1u},\r
- {0xD6u, 0x38u},\r
- {0xD8u, 0x38u},\r
- {0xE0u, 0x20u},\r
- {0xE2u, 0x85u},\r
- {0xE6u, 0xA0u},\r
- {0xE8u, 0x01u},\r
- {0xEAu, 0x02u},\r
+ {0xC2u, 0xE5u},\r
+ {0xC4u, 0xF7u},\r
+ {0xCAu, 0xF4u},\r
+ {0xCCu, 0xBFu},\r
+ {0xCEu, 0xBEu},\r
+ {0xD6u, 0x0Fu},\r
+ {0xD8u, 0x08u},\r
+ {0xE0u, 0x80u},\r
+ {0xE4u, 0x12u},\r
+ {0xEAu, 0x10u},\r
{0xECu, 0x10u},\r
- {0xEEu, 0x20u},\r
- {0x00u, 0x24u},\r
- {0x02u, 0x09u},\r
- {0x05u, 0x50u},\r
- {0x06u, 0x58u},\r
- {0x07u, 0xA0u},\r
- {0x09u, 0x60u},\r
- {0x0Bu, 0x90u},\r
- {0x0Du, 0x0Fu},\r
- {0x0Fu, 0xF0u},\r
- {0x11u, 0x30u},\r
- {0x12u, 0x03u},\r
- {0x13u, 0xC0u},\r
- {0x15u, 0x06u},\r
- {0x16u, 0x24u},\r
- {0x17u, 0x09u},\r
- {0x19u, 0x03u},\r
- {0x1Bu, 0x0Cu},\r
- {0x1Eu, 0x04u},\r
- {0x20u, 0x24u},\r
- {0x22u, 0x12u},\r
- {0x25u, 0x05u},\r
- {0x26u, 0x80u},\r
- {0x27u, 0x0Au},\r
- {0x2Au, 0x20u},\r
- {0x2Cu, 0x40u},\r
- {0x2Eu, 0x80u},\r
- {0x30u, 0x07u},\r
- {0x34u, 0x38u},\r
- {0x36u, 0xC0u},\r
- {0x37u, 0xFFu},\r
- {0x3Eu, 0x40u},\r
+ {0xEEu, 0x80u},\r
+ {0x00u, 0x02u},\r
+ {0x01u, 0x08u},\r
+ {0x02u, 0x11u},\r
+ {0x03u, 0x04u},\r
+ {0x04u, 0x02u},\r
+ {0x05u, 0x02u},\r
+ {0x06u, 0x01u},\r
+ {0x07u, 0x01u},\r
+ {0x10u, 0x02u},\r
+ {0x12u, 0x01u},\r
+ {0x14u, 0x02u},\r
+ {0x15u, 0x01u},\r
+ {0x16u, 0x01u},\r
+ {0x17u, 0x02u},\r
+ {0x18u, 0x02u},\r
+ {0x1Au, 0x05u},\r
+ {0x1Bu, 0x20u},\r
+ {0x1Cu, 0x01u},\r
+ {0x1Du, 0x04u},\r
+ {0x1Eu, 0x02u},\r
+ {0x1Fu, 0x08u},\r
+ {0x20u, 0x02u},\r
+ {0x22u, 0x01u},\r
+ {0x23u, 0x10u},\r
+ {0x29u, 0x03u},\r
+ {0x2Bu, 0x0Cu},\r
+ {0x2Cu, 0x02u},\r
+ {0x2Eu, 0x09u},\r
+ {0x30u, 0x10u},\r
+ {0x31u, 0x10u},\r
+ {0x32u, 0x08u},\r
+ {0x33u, 0x20u},\r
+ {0x34u, 0x04u},\r
+ {0x36u, 0x03u},\r
+ {0x37u, 0x0Fu},\r
+ {0x3Au, 0x80u},\r
{0x3Fu, 0x40u},\r
+ {0x56u, 0x08u},\r
{0x58u, 0x04u},\r
{0x59u, 0x04u},\r
{0x5Bu, 0x04u},\r
- {0x5Cu, 0x01u},\r
+ {0x5Cu, 0x11u},\r
+ {0x5Du, 0x90u},\r
{0x5Fu, 0x01u},\r
- {0x81u, 0x90u},\r
- {0x83u, 0x48u},\r
- {0x84u, 0x03u},\r
- {0x86u, 0x0Cu},\r
- {0x87u, 0x80u},\r
- {0x88u, 0x50u},\r
- {0x8Au, 0xA0u},\r
- {0x8Bu, 0x0Du},\r
- {0x8Cu, 0x90u},\r
- {0x8Eu, 0x60u},\r
- {0x8Fu, 0x02u},\r
- {0x90u, 0x09u},\r
- {0x91u, 0x90u},\r
+ {0x83u, 0x80u},\r
+ {0x86u, 0x01u},\r
+ {0x8Au, 0x80u},\r
+ {0x8Bu, 0x04u},\r
+ {0x8Cu, 0x98u},\r
+ {0x8Eu, 0x22u},\r
+ {0x91u, 0x24u},\r
{0x92u, 0x06u},\r
- {0x93u, 0x24u},\r
- {0x96u, 0xFFu},\r
- {0x97u, 0x10u},\r
- {0x9Bu, 0x60u},\r
- {0x9Cu, 0x05u},\r
- {0x9Eu, 0x0Au},\r
- {0xA0u, 0xFFu},\r
- {0xA4u, 0xFFu},\r
- {0xA7u, 0x90u},\r
- {0xA8u, 0x30u},\r
- {0xAAu, 0xC0u},\r
- {0xACu, 0x0Fu},\r
- {0xADu, 0x01u},\r
- {0xAEu, 0xF0u},\r
- {0xAFu, 0x02u},\r
- {0xB3u, 0xE0u},\r
- {0xB4u, 0xFFu},\r
- {0xB5u, 0x1Cu},\r
- {0xB7u, 0x03u},\r
- {0xBEu, 0x10u},\r
- {0xBFu, 0x40u},\r
+ {0x93u, 0x09u},\r
+ {0x96u, 0x60u},\r
+ {0x97u, 0x58u},\r
+ {0x9Au, 0x08u},\r
+ {0x9Bu, 0x03u},\r
+ {0x9Eu, 0x10u},\r
+ {0xA0u, 0x10u},\r
+ {0xA2u, 0x88u},\r
+ {0xA3u, 0x24u},\r
+ {0xA7u, 0x20u},\r
+ {0xA9u, 0x40u},\r
+ {0xABu, 0x80u},\r
+ {0xACu, 0x98u},\r
+ {0xADu, 0x24u},\r
+ {0xAEu, 0x44u},\r
+ {0xAFu, 0x12u},\r
+ {0xB0u, 0x0Eu},\r
+ {0xB1u, 0xC0u},\r
+ {0xB2u, 0xE0u},\r
+ {0xB3u, 0x07u},\r
+ {0xB4u, 0x01u},\r
+ {0xB5u, 0x38u},\r
+ {0xB6u, 0x10u},\r
+ {0xBEu, 0x40u},\r
+ {0xBFu, 0x01u},\r
{0xD8u, 0x04u},\r
{0xD9u, 0x04u},\r
- {0xDCu, 0x10u},\r
+ {0xDCu, 0x11u},\r
{0xDFu, 0x01u},\r
- {0x00u, 0x04u},\r
- {0x03u, 0x40u},\r
- {0x05u, 0x40u},\r
- {0x07u, 0x18u},\r
- {0x08u, 0x08u},\r
- {0x0Au, 0x42u},\r
- {0x0Fu, 0xA2u},\r
- {0x10u, 0x20u},\r
- {0x11u, 0x40u},\r
- {0x12u, 0x08u},\r
- {0x13u, 0x01u},\r
- {0x15u, 0x48u},\r
- {0x17u, 0x22u},\r
- {0x18u, 0x85u},\r
- {0x1Au, 0x48u},\r
- {0x1Bu, 0x01u},\r
- {0x1Du, 0x10u},\r
- {0x21u, 0x80u},\r
- {0x23u, 0x02u},\r
- {0x25u, 0x50u},\r
- {0x26u, 0x20u},\r
- {0x27u, 0x10u},\r
- {0x2Au, 0x04u},\r
- {0x2Du, 0x40u},\r
- {0x2Fu, 0x20u},\r
- {0x31u, 0x02u},\r
- {0x32u, 0x24u},\r
- {0x36u, 0x01u},\r
- {0x37u, 0x14u},\r
- {0x38u, 0x28u},\r
- {0x39u, 0x40u},\r
- {0x3Du, 0x20u},\r
- {0x3Eu, 0x08u},\r
- {0x3Fu, 0x41u},\r
- {0x68u, 0x81u},\r
- {0x69u, 0x20u},\r
- {0x6Bu, 0x28u},\r
- {0x70u, 0x3Cu},\r
- {0x71u, 0x02u},\r
- {0x72u, 0x02u},\r
- {0x73u, 0x40u},\r
- {0x81u, 0x40u},\r
- {0x84u, 0x01u},\r
- {0x85u, 0x40u},\r
- {0x86u, 0x18u},\r
- {0x87u, 0x20u},\r
- {0x89u, 0x40u},\r
- {0x8Au, 0x01u},\r
- {0x8Eu, 0x09u},\r
- {0x8Fu, 0x44u},\r
+ {0x00u, 0x01u},\r
+ {0x03u, 0x20u},\r
+ {0x04u, 0x04u},\r
+ {0x06u, 0x04u},\r
+ {0x07u, 0x02u},\r
+ {0x0Au, 0x6Au},\r
+ {0x0Du, 0x02u},\r
+ {0x0Eu, 0x21u},\r
+ {0x0Fu, 0x08u},\r
+ {0x12u, 0x42u},\r
+ {0x14u, 0x41u},\r
+ {0x19u, 0x92u},\r
+ {0x1Au, 0x62u},\r
+ {0x1Bu, 0x20u},\r
+ {0x1Cu, 0x80u},\r
+ {0x1Du, 0x02u},\r
+ {0x1Eu, 0x20u},\r
+ {0x1Fu, 0x50u},\r
+ {0x20u, 0x02u},\r
+ {0x22u, 0x06u},\r
+ {0x24u, 0x08u},\r
+ {0x25u, 0x08u},\r
+ {0x26u, 0x01u},\r
+ {0x27u, 0x28u},\r
+ {0x28u, 0x08u},\r
+ {0x29u, 0x02u},\r
+ {0x2Bu, 0x08u},\r
+ {0x2Cu, 0x61u},\r
+ {0x2Fu, 0x08u},\r
+ {0x30u, 0x80u},\r
+ {0x31u, 0x08u},\r
+ {0x32u, 0x10u},\r
+ {0x37u, 0x2Au},\r
+ {0x38u, 0x08u},\r
+ {0x39u, 0x02u},\r
+ {0x3Au, 0x02u},\r
+ {0x3Eu, 0x02u},\r
+ {0x3Fu, 0x10u},\r
+ {0x5Au, 0x80u},\r
+ {0x60u, 0x01u},\r
+ {0x83u, 0x06u},\r
+ {0x86u, 0x01u},\r
+ {0x87u, 0x10u},\r
+ {0x88u, 0x41u},\r
+ {0x8Bu, 0x11u},\r
+ {0x8Du, 0x10u},\r
+ {0x8Eu, 0x01u},\r
{0xC0u, 0xECu},\r
- {0xC2u, 0xBDu},\r
- {0xC4u, 0xFFu},\r
- {0xCAu, 0x52u},\r
- {0xCCu, 0xE7u},\r
- {0xCEu, 0xFEu},\r
- {0xE0u, 0x70u},\r
- {0xE4u, 0x50u},\r
- {0xE6u, 0x01u},\r
- {0x84u, 0x08u},\r
- {0x85u, 0x25u},\r
- {0x86u, 0x13u},\r
- {0x87u, 0x02u},\r
- {0x89u, 0x38u},\r
- {0x94u, 0x30u},\r
- {0x95u, 0x09u},\r
- {0x97u, 0x06u},\r
- {0x98u, 0x16u},\r
- {0x99u, 0x03u},\r
- {0x9Au, 0x08u},\r
- {0x9Bu, 0x14u},\r
- {0x9Eu, 0x01u},\r
- {0xA7u, 0x38u},\r
- {0xA8u, 0x08u},\r
- {0xA9u, 0x04u},\r
- {0xAAu, 0x25u},\r
- {0xABu, 0x03u},\r
- {0xB2u, 0x38u},\r
- {0xB5u, 0x07u},\r
- {0xB6u, 0x07u},\r
- {0xB7u, 0x38u},\r
- {0xB8u, 0x08u},\r
- {0xBBu, 0x20u},\r
- {0xBFu, 0x40u},\r
- {0xD6u, 0x02u},\r
- {0xD7u, 0x24u},\r
+ {0xC2u, 0xFFu},\r
+ {0xC4u, 0x99u},\r
+ {0xCAu, 0xF5u},\r
+ {0xCCu, 0xEEu},\r
+ {0xCEu, 0xA3u},\r
+ {0xD6u, 0x08u},\r
+ {0xD8u, 0x08u},\r
+ {0xE0u, 0x80u},\r
+ {0xE2u, 0x40u},\r
+ {0xE4u, 0xA0u},\r
+ {0x01u, 0x11u},\r
+ {0x09u, 0x11u},\r
+ {0x0Fu, 0x20u},\r
+ {0x11u, 0x02u},\r
+ {0x13u, 0x64u},\r
+ {0x15u, 0x11u},\r
+ {0x19u, 0x0Cu},\r
+ {0x1Fu, 0x11u},\r
+ {0x21u, 0x11u},\r
+ {0x25u, 0x02u},\r
+ {0x27u, 0xA8u},\r
+ {0x29u, 0xC4u},\r
+ {0x2Bu, 0x02u},\r
+ {0x2Fu, 0x01u},\r
+ {0x31u, 0xE0u},\r
+ {0x33u, 0x01u},\r
+ {0x35u, 0x0Eu},\r
+ {0x37u, 0x10u},\r
+ {0x39u, 0x20u},\r
+ {0x3Fu, 0x44u},\r
+ {0x40u, 0x36u},\r
+ {0x41u, 0x04u},\r
+ {0x42u, 0x10u},\r
+ {0x44u, 0x05u},\r
+ {0x45u, 0xCEu},\r
+ {0x46u, 0xFDu},\r
+ {0x47u, 0x0Bu},\r
+ {0x48u, 0x1Fu},\r
+ {0x49u, 0xFFu},\r
+ {0x4Au, 0xFFu},\r
+ {0x4Bu, 0xFFu},\r
+ {0x4Cu, 0x22u},\r
+ {0x4Eu, 0xF0u},\r
+ {0x4Fu, 0x08u},\r
+ {0x50u, 0x04u},\r
+ {0x54u, 0x40u},\r
+ {0x56u, 0x04u},\r
+ {0x59u, 0x04u},\r
+ {0x5Au, 0x04u},\r
+ {0x5Bu, 0x04u},\r
+ {0x5Fu, 0x01u},\r
+ {0x62u, 0xC0u},\r
+ {0x64u, 0x40u},\r
+ {0x65u, 0x01u},\r
+ {0x66u, 0x10u},\r
+ {0x67u, 0x11u},\r
+ {0x68u, 0xC0u},\r
+ {0x69u, 0x01u},\r
+ {0x6Bu, 0x11u},\r
+ {0x6Cu, 0x40u},\r
+ {0x6Du, 0x01u},\r
+ {0x6Eu, 0x40u},\r
+ {0x6Fu, 0x01u},\r
+ {0x80u, 0x07u},\r
+ {0x81u, 0x6Cu},\r
+ {0x82u, 0x18u},\r
+ {0x84u, 0x04u},\r
+ {0x85u, 0x64u},\r
+ {0x87u, 0x08u},\r
+ {0x88u, 0x10u},\r
+ {0x8Au, 0x40u},\r
+ {0x8Cu, 0x01u},\r
+ {0x8Du, 0x2Cu},\r
+ {0x8Fu, 0x40u},\r
+ {0x90u, 0x01u},\r
+ {0x91u, 0xA4u},\r
+ {0x93u, 0x40u},\r
+ {0x95u, 0x91u},\r
+ {0x97u, 0x4Eu},\r
+ {0x98u, 0x01u},\r
+ {0x99u, 0xC0u},\r
+ {0x9Bu, 0x2Fu},\r
+ {0x9Cu, 0x01u},\r
+ {0x9Du, 0x08u},\r
+ {0x9Fu, 0x10u},\r
+ {0xA0u, 0x01u},\r
+ {0xA1u, 0x6Cu},\r
+ {0xA4u, 0x08u},\r
+ {0xA6u, 0x21u},\r
+ {0xA8u, 0x22u},\r
+ {0xA9u, 0x40u},\r
+ {0xAAu, 0x08u},\r
+ {0xABu, 0x2Cu},\r
+ {0xADu, 0x71u},\r
+ {0xAFu, 0x82u},\r
+ {0xB0u, 0x3Fu},\r
+ {0xB1u, 0xC0u},\r
+ {0xB3u, 0x31u},\r
+ {0xB4u, 0x40u},\r
+ {0xB7u, 0x0Fu},\r
+ {0xB8u, 0x02u},\r
+ {0xBBu, 0x0Eu},\r
+ {0xBEu, 0x01u},\r
{0xD8u, 0x04u},\r
{0xD9u, 0x04u},\r
- {0xDBu, 0x04u},\r
{0xDFu, 0x01u},\r
- {0x01u, 0x82u},\r
- {0x03u, 0x18u},\r
- {0x05u, 0x04u},\r
- {0x09u, 0x01u},\r
- {0x0Au, 0x08u},\r
- {0x0Bu, 0x22u},\r
- {0x0Eu, 0x25u},\r
- {0x10u, 0x20u},\r
- {0x11u, 0x40u},\r
- {0x12u, 0x88u},\r
- {0x17u, 0x10u},\r
- {0x19u, 0x03u},\r
- {0x1Au, 0x08u},\r
- {0x1Cu, 0x20u},\r
- {0x1Eu, 0x21u},\r
- {0x22u, 0x08u},\r
+ {0x04u, 0x02u},\r
+ {0x06u, 0x06u},\r
+ {0x07u, 0x20u},\r
+ {0x0Eu, 0x46u},\r
+ {0x14u, 0x04u},\r
+ {0x15u, 0x01u},\r
+ {0x17u, 0x18u},\r
+ {0x1Cu, 0x08u},\r
+ {0x1Fu, 0x01u},\r
+ {0x20u, 0x11u},\r
+ {0x22u, 0x10u},\r
+ {0x23u, 0x40u},\r
+ {0x24u, 0x02u},\r
{0x25u, 0x40u},\r
- {0x27u, 0x04u},\r
- {0x29u, 0x41u},\r
- {0x2Bu, 0x28u},\r
- {0x2Du, 0x08u},\r
- {0x2Eu, 0x20u},\r
- {0x30u, 0x08u},\r
- {0x32u, 0x80u},\r
- {0x33u, 0x11u},\r
- {0x35u, 0x04u},\r
- {0x37u, 0x10u},\r
- {0x38u, 0x80u},\r
- {0x3Bu, 0x22u},\r
- {0x3Cu, 0x20u},\r
- {0x3Eu, 0x04u},\r
- {0x40u, 0x06u},\r
- {0x43u, 0x08u},\r
- {0x46u, 0x20u},\r
- {0x47u, 0x04u},\r
- {0x48u, 0x41u},\r
- {0x4Au, 0x84u},\r
+ {0x26u, 0x05u},\r
+ {0x27u, 0x51u},\r
+ {0x28u, 0x24u},\r
+ {0x2Au, 0x42u},\r
+ {0x2Du, 0x01u},\r
+ {0x2Eu, 0x90u},\r
+ {0x32u, 0x54u},\r
+ {0x33u, 0x01u},\r
+ {0x36u, 0x81u},\r
+ {0x37u, 0x18u},\r
+ {0x39u, 0x21u},\r
+ {0x3Bu, 0x40u},\r
+ {0x3Eu, 0x46u},\r
+ {0x40u, 0x21u},\r
+ {0x42u, 0x80u},\r
+ {0x43u, 0x05u},\r
+ {0x48u, 0x80u},\r
+ {0x4Au, 0x86u},\r
{0x4Bu, 0x04u},\r
- {0x50u, 0x84u},\r
- {0x52u, 0x20u},\r
- {0x66u, 0x20u},\r
- {0x6Cu, 0x78u},\r
- {0x6Du, 0x43u},\r
- {0x6Fu, 0x21u},\r
- {0x75u, 0xC0u},\r
- {0x86u, 0x01u},\r
- {0x88u, 0x40u},\r
- {0x89u, 0x40u},\r
- {0x8Cu, 0x02u},\r
- {0x90u, 0x04u},\r
- {0x92u, 0x04u},\r
- {0x93u, 0x22u},\r
- {0x94u, 0x28u},\r
- {0x95u, 0x41u},\r
- {0x97u, 0x04u},\r
- {0x99u, 0x0Cu},\r
- {0x9Bu, 0x10u},\r
- {0x9Cu, 0x40u},\r
- {0x9Du, 0x40u},\r
- {0xA0u, 0x01u},\r
- {0xA2u, 0x04u},\r
- {0xA3u, 0x08u},\r
- {0xA4u, 0xC8u},\r
- {0xA6u, 0x20u},\r
- {0xA7u, 0x20u},\r
- {0xA9u, 0x02u},\r
- {0xAEu, 0x80u},\r
- {0xAFu, 0x20u},\r
+ {0x51u, 0x20u},\r
+ {0x52u, 0x44u},\r
+ {0x53u, 0x04u},\r
+ {0x60u, 0x90u},\r
+ {0x61u, 0x20u},\r
+ {0x62u, 0x40u},\r
+ {0x80u, 0x01u},\r
+ {0x84u, 0x80u},\r
+ {0x8Bu, 0x40u},\r
+ {0x8Eu, 0x02u},\r
+ {0x8Fu, 0x10u},\r
+ {0x91u, 0x21u},\r
+ {0x92u, 0xDCu},\r
+ {0x94u, 0x03u},\r
+ {0x96u, 0x20u},\r
+ {0x97u, 0x0Eu},\r
+ {0x9Au, 0x02u},\r
+ {0x9Bu, 0x2Cu},\r
+ {0x9Eu, 0x04u},\r
+ {0x9Fu, 0x51u},\r
+ {0xA4u, 0x84u},\r
+ {0xA5u, 0x40u},\r
+ {0xA6u, 0x01u},\r
+ {0xA9u, 0x08u},\r
+ {0xAAu, 0x02u},\r
+ {0xACu, 0xC0u},\r
+ {0xADu, 0x40u},\r
{0xB0u, 0x80u},\r
- {0xB1u, 0x10u},\r
- {0xB2u, 0x80u},\r
{0xB3u, 0x10u},\r
- {0xC0u, 0x2Fu},\r
- {0xC2u, 0xEFu},\r
- {0xC4u, 0x4Fu},\r
- {0xCAu, 0x6Fu},\r
- {0xCCu, 0x6Fu},\r
- {0xCEu, 0x6Du},\r
- {0xD0u, 0x0Eu},\r
+ {0xB5u, 0x04u},\r
+ {0xC0u, 0xF0u},\r
+ {0xC2u, 0xD0u},\r
+ {0xC4u, 0x70u},\r
+ {0xCAu, 0xBFu},\r
+ {0xCCu, 0xFFu},\r
+ {0xCEu, 0xDDu},\r
+ {0xD0u, 0x0Bu},\r
{0xD2u, 0x0Cu},\r
- {0xD8u, 0x20u},\r
- {0xE0u, 0x10u},\r
- {0xE6u, 0x20u},\r
+ {0xD8u, 0x0Fu},\r
+ {0xE2u, 0x20u},\r
+ {0xE4u, 0x14u},\r
+ {0xEAu, 0x02u},\r
+ {0xECu, 0x08u},\r
{0xEEu, 0x02u},\r
- {0x00u, 0xA4u},\r
+ {0x00u, 0xFFu},\r
{0x01u, 0xD6u},\r
- {0x02u, 0x40u},\r
- {0x04u, 0x71u},\r
- {0x05u, 0x21u},\r
- {0x06u, 0x82u},\r
- {0x07u, 0x8Eu},\r
- {0x08u, 0x64u},\r
+ {0x04u, 0x0Fu},\r
+ {0x05u, 0xD2u},\r
+ {0x06u, 0xF0u},\r
+ {0x07u, 0x04u},\r
{0x09u, 0x20u},\r
- {0x0Au, 0x08u},\r
{0x0Bu, 0xD0u},\r
- {0x0Cu, 0x6Cu},\r
+ {0x0Du, 0x17u},\r
+ {0x0Eu, 0xFFu},\r
+ {0x0Fu, 0x28u},\r
+ {0x10u, 0x33u},\r
{0x11u, 0x02u},\r
- {0x14u, 0x40u},\r
- {0x15u, 0x17u},\r
- {0x16u, 0x2Cu},\r
- {0x17u, 0x28u},\r
- {0x18u, 0xC0u},\r
- {0x19u, 0x29u},\r
- {0x1Au, 0x2Fu},\r
- {0x1Bu, 0x46u},\r
- {0x1Cu, 0x08u},\r
- {0x1Du, 0xD6u},\r
- {0x1Eu, 0x10u},\r
- {0x20u, 0x6Cu},\r
+ {0x12u, 0xCCu},\r
+ {0x14u, 0x96u},\r
+ {0x15u, 0x29u},\r
+ {0x16u, 0x69u},\r
+ {0x17u, 0x46u},\r
+ {0x19u, 0x21u},\r
+ {0x1Au, 0xFFu},\r
+ {0x1Bu, 0x8Eu},\r
+ {0x20u, 0x55u},\r
{0x21u, 0x04u},\r
- {0x25u, 0xD2u},\r
- {0x27u, 0x04u},\r
- {0x28u, 0x91u},\r
+ {0x22u, 0xAAu},\r
+ {0x25u, 0xD6u},\r
+ {0x26u, 0xFFu},\r
+ {0x28u, 0xFFu},\r
{0x29u, 0xD0u},\r
- {0x2Au, 0x4Eu},\r
{0x2Bu, 0x06u},\r
- {0x2Cu, 0x2Cu},\r
{0x2Du, 0xD6u},\r
- {0x2Eu, 0x40u},\r
- {0x30u, 0xC0u},\r
- {0x32u, 0x0Fu},\r
- {0x33u, 0x0Fu},\r
- {0x34u, 0x31u},\r
- {0x35u, 0xF0u},\r
+ {0x31u, 0x01u},\r
+ {0x33u, 0xF0u},\r
+ {0x34u, 0xFFu},\r
+ {0x35u, 0x0Fu},\r
{0x37u, 0x08u},\r
- {0x39u, 0x08u},\r
- {0x3Au, 0x32u},\r
- {0x3Bu, 0x20u},\r
- {0x3Fu, 0x40u},\r
+ {0x39u, 0x20u},\r
+ {0x3Au, 0x20u},\r
+ {0x3Bu, 0x08u},\r
+ {0x3Fu, 0x41u},\r
{0x54u, 0x09u},\r
{0x56u, 0x04u},\r
{0x58u, 0x04u},\r
{0x59u, 0x04u},\r
{0x5Bu, 0x04u},\r
- {0x5Fu, 0x01u},\r
- {0x80u, 0x02u},\r
- {0x81u, 0x03u},\r
- {0x82u, 0x30u},\r
- {0x86u, 0x01u},\r
- {0x87u, 0x01u},\r
- {0x88u, 0x05u},\r
- {0x89u, 0x03u},\r
- {0x8Au, 0x38u},\r
- {0x8Cu, 0x10u},\r
- {0x8Eu, 0x20u},\r
- {0x8Fu, 0x03u},\r
- {0x90u, 0x01u},\r
- {0x92u, 0x38u},\r
- {0x94u, 0x10u},\r
- {0x95u, 0x03u},\r
- {0x96u, 0x20u},\r
- {0x9Cu, 0x30u},\r
- {0x9Eu, 0x08u},\r
- {0xA8u, 0x34u},\r
- {0xAAu, 0x08u},\r
- {0xADu, 0x03u},\r
- {0xB0u, 0x30u},\r
- {0xB3u, 0x01u},\r
- {0xB4u, 0x0Fu},\r
- {0xB7u, 0x02u},\r
- {0xB8u, 0x20u},\r
- {0xBAu, 0x02u},\r
- {0xBFu, 0x44u},\r
- {0xD4u, 0x40u},\r
- {0xD6u, 0x04u},\r
+ {0x5Cu, 0x01u},\r
+ {0x5Fu, 0x01u},\r
+ {0x87u, 0x20u},\r
+ {0x89u, 0x24u},\r
+ {0x8Bu, 0x09u},\r
+ {0x8Eu, 0x01u},\r
+ {0x8Fu, 0x18u},\r
+ {0x97u, 0x04u},\r
+ {0x9Bu, 0x40u},\r
+ {0x9Eu, 0x02u},\r
+ {0x9Fu, 0x03u},\r
+ {0xA5u, 0x24u},\r
+ {0xA7u, 0x12u},\r
+ {0xAFu, 0x24u},\r
+ {0xB1u, 0x38u},\r
+ {0xB2u, 0x02u},\r
+ {0xB5u, 0x40u},\r
+ {0xB6u, 0x01u},\r
+ {0xB7u, 0x07u},\r
+ {0xD6u, 0x02u},\r
+ {0xD7u, 0x2Cu},\r
{0xD8u, 0x04u},\r
{0xD9u, 0x04u},\r
{0xDBu, 0x04u},\r
- {0xDCu, 0x01u},\r
+ {0xDCu, 0x11u},\r
{0xDFu, 0x01u},\r
- {0x01u, 0x24u},\r
- {0x03u, 0x42u},\r
- {0x04u, 0x20u},\r
- {0x05u, 0x45u},\r
- {0x08u, 0x08u},\r
+ {0x00u, 0x80u},\r
+ {0x04u, 0x04u},\r
+ {0x05u, 0x82u},\r
{0x0Au, 0x02u},\r
- {0x0Bu, 0x80u},\r
- {0x0Cu, 0x88u},\r
- {0x0Eu, 0x04u},\r
- {0x10u, 0x04u},\r
- {0x15u, 0x41u},\r
- {0x17u, 0x10u},\r
- {0x19u, 0x20u},\r
- {0x1Bu, 0x03u},\r
+ {0x0Du, 0x02u},\r
+ {0x0Eu, 0x20u},\r
+ {0x0Fu, 0x08u},\r
+ {0x16u, 0xA8u},\r
+ {0x19u, 0x44u},\r
+ {0x1Au, 0x02u},\r
{0x1Cu, 0x04u},\r
- {0x1Du, 0x05u},\r
- {0x1Eu, 0x04u},\r
- {0x1Fu, 0x19u},\r
- {0x20u, 0x02u},\r
- {0x22u, 0x08u},\r
- {0x23u, 0x01u},\r
- {0x25u, 0x10u},\r
- {0x26u, 0x44u},\r
- {0x27u, 0x10u},\r
- {0x29u, 0x40u},\r
- {0x2Cu, 0x88u},\r
- {0x2Du, 0x40u},\r
- {0x2Fu, 0x20u},\r
+ {0x20u, 0x40u},\r
+ {0x21u, 0x20u},\r
+ {0x22u, 0x80u},\r
+ {0x24u, 0x10u},\r
+ {0x25u, 0x01u},\r
+ {0x26u, 0x40u},\r
+ {0x27u, 0x0Cu},\r
+ {0x29u, 0x80u},\r
+ {0x2Au, 0x08u},\r
+ {0x2Cu, 0x80u},\r
+ {0x2Du, 0x08u},\r
+ {0x2Eu, 0x50u},\r
{0x30u, 0x08u},\r
- {0x35u, 0x45u},\r
- {0x37u, 0x10u},\r
- {0x38u, 0x28u},\r
- {0x39u, 0x41u},\r
- {0x3Cu, 0x04u},\r
- {0x3Du, 0x21u},\r
- {0x4Cu, 0x04u},\r
- {0x4Du, 0x10u},\r
+ {0x32u, 0xA0u},\r
+ {0x36u, 0x01u},\r
+ {0x37u, 0x18u},\r
+ {0x38u, 0x60u},\r
+ {0x39u, 0x04u},\r
+ {0x3Cu, 0x10u},\r
+ {0x3Du, 0x81u},\r
+ {0x3Eu, 0x04u},\r
+ {0x5Cu, 0x01u},\r
{0x5Eu, 0x80u},\r
- {0x5Fu, 0x15u},\r
- {0x61u, 0x02u},\r
- {0x62u, 0xA8u},\r
- {0x64u, 0x80u},\r
- {0x66u, 0x80u},\r
+ {0x5Fu, 0x14u},\r
+ {0x60u, 0x80u},\r
+ {0x64u, 0x02u},\r
+ {0x67u, 0x40u},\r
+ {0x69u, 0x21u},\r
+ {0x6Au, 0xDCu},\r
+ {0x72u, 0x02u},\r
+ {0x73u, 0x01u},\r
+ {0x7Cu, 0x02u},\r
+ {0x7Du, 0x02u},\r
+ {0x80u, 0x40u},\r
+ {0x82u, 0x20u},\r
+ {0x85u, 0x20u},\r
+ {0x86u, 0x80u},\r
+ {0x87u, 0x40u},\r
+ {0x8Au, 0x90u},\r
+ {0x8Fu, 0x08u},\r
+ {0x90u, 0x20u},\r
{0x91u, 0x04u},\r
- {0x92u, 0x02u},\r
- {0x93u, 0x80u},\r
- {0x97u, 0x20u},\r
- {0x98u, 0x0Cu},\r
- {0x99u, 0x08u},\r
- {0x9Bu, 0x60u},\r
- {0x9Cu, 0xC0u},\r
- {0x9Du, 0x20u},\r
- {0x9Fu, 0x10u},\r
- {0xA4u, 0x40u},\r
- {0xA7u, 0x09u},\r
- {0xAAu, 0x40u},\r
- {0xB0u, 0x04u},\r
- {0xB4u, 0x80u},\r
- {0xC0u, 0xFFu},\r
- {0xC2u, 0xEDu},\r
- {0xC4u, 0xD2u},\r
- {0xCAu, 0xF8u},\r
- {0xCCu, 0xF2u},\r
- {0xCEu, 0xEFu},\r
+ {0x94u, 0x06u},\r
+ {0x95u, 0x01u},\r
+ {0x96u, 0x74u},\r
+ {0x97u, 0x0Bu},\r
+ {0x99u, 0x82u},\r
+ {0x9Au, 0x28u},\r
+ {0x9Bu, 0x20u},\r
+ {0x9Eu, 0x04u},\r
+ {0x9Fu, 0x59u},\r
+ {0xA0u, 0x08u},\r
+ {0xA1u, 0x02u},\r
+ {0xA3u, 0x04u},\r
+ {0xA4u, 0x04u},\r
+ {0xABu, 0x04u},\r
+ {0xB0u, 0x40u},\r
+ {0xB6u, 0x12u},\r
+ {0xC0u, 0xB1u},\r
+ {0xC2u, 0x71u},\r
+ {0xC4u, 0x70u},\r
+ {0xCAu, 0xFAu},\r
+ {0xCCu, 0xEEu},\r
+ {0xCEu, 0xFEu},\r
{0xD6u, 0xF0u},\r
- {0xD8u, 0x9Fu},\r
- {0xEAu, 0x12u},\r
+ {0xD8u, 0x91u},\r
+ {0xE0u, 0x08u},\r
+ {0xE4u, 0x0Cu},\r
+ {0xE6u, 0x01u},\r
+ {0xEAu, 0x02u},\r
{0xEEu, 0x08u},\r
- {0xB8u, 0x08u},\r
- {0xBEu, 0x04u},\r
+ {0x00u, 0x02u},\r
+ {0x02u, 0x01u},\r
+ {0x04u, 0x02u},\r
+ {0x05u, 0x08u},\r
+ {0x06u, 0x01u},\r
+ {0x08u, 0x02u},\r
+ {0x0Au, 0x11u},\r
+ {0x0Cu, 0x01u},\r
+ {0x0Du, 0x01u},\r
+ {0x0Eu, 0x02u},\r
+ {0x0Fu, 0x06u},\r
+ {0x11u, 0x08u},\r
+ {0x14u, 0x02u},\r
+ {0x15u, 0x03u},\r
+ {0x16u, 0x01u},\r
+ {0x17u, 0x04u},\r
+ {0x19u, 0x04u},\r
+ {0x1Bu, 0x03u},\r
+ {0x1Cu, 0x02u},\r
+ {0x1Eu, 0x01u},\r
+ {0x21u, 0x08u},\r
+ {0x24u, 0x02u},\r
+ {0x25u, 0x08u},\r
+ {0x26u, 0x05u},\r
+ {0x28u, 0x02u},\r
+ {0x2Au, 0x09u},\r
+ {0x2Du, 0x05u},\r
+ {0x2Fu, 0x02u},\r
+ {0x30u, 0x03u},\r
+ {0x32u, 0x10u},\r
+ {0x33u, 0x08u},\r
+ {0x34u, 0x04u},\r
+ {0x35u, 0x07u},\r
+ {0x36u, 0x08u},\r
+ {0x39u, 0x08u},\r
+ {0x3Au, 0x02u},\r
+ {0x3Bu, 0x20u},\r
+ {0x3Fu, 0x04u},\r
+ {0x56u, 0x08u},\r
+ {0x58u, 0x04u},\r
+ {0x59u, 0x04u},\r
+ {0x5Bu, 0x04u},\r
+ {0x5Cu, 0x01u},\r
+ {0x5Du, 0x90u},\r
+ {0x5Fu, 0x01u},\r
+ {0x81u, 0x02u},\r
+ {0x82u, 0x08u},\r
+ {0x83u, 0x01u},\r
+ {0x85u, 0x02u},\r
+ {0x87u, 0x05u},\r
+ {0x89u, 0x02u},\r
+ {0x8Au, 0x10u},\r
+ {0x8Bu, 0x11u},\r
+ {0x8Cu, 0x01u},\r
+ {0x8Du, 0x02u},\r
+ {0x8Fu, 0x01u},\r
+ {0x94u, 0x0Au},\r
+ {0x95u, 0x02u},\r
+ {0x96u, 0x14u},\r
+ {0x97u, 0x09u},\r
+ {0x99u, 0x01u},\r
+ {0x9Bu, 0x02u},\r
+ {0x9Du, 0x02u},\r
+ {0x9Eu, 0x02u},\r
+ {0x9Fu, 0x01u},\r
+ {0xA9u, 0x02u},\r
+ {0xAAu, 0x04u},\r
+ {0xABu, 0x01u},\r
+ {0xB0u, 0x01u},\r
+ {0xB1u, 0x10u},\r
+ {0xB2u, 0x18u},\r
+ {0xB3u, 0x08u},\r
+ {0xB4u, 0x06u},\r
+ {0xB5u, 0x03u},\r
+ {0xB7u, 0x04u},\r
+ {0xBBu, 0x20u},\r
+ {0xBEu, 0x14u},\r
+ {0xD6u, 0x08u},\r
{0xD8u, 0x04u},\r
+ {0xD9u, 0x04u},\r
+ {0xDBu, 0x04u},\r
+ {0xDCu, 0x19u},\r
+ {0xDDu, 0x90u},\r
{0xDFu, 0x01u},\r
- {0x1Bu, 0x08u},\r
- {0xB3u, 0x08u},\r
- {0xE8u, 0x20u},\r
+ {0x00u, 0x82u},\r
+ {0x01u, 0x10u},\r
+ {0x03u, 0x01u},\r
+ {0x04u, 0x08u},\r
+ {0x05u, 0x12u},\r
+ {0x07u, 0x01u},\r
+ {0x08u, 0x08u},\r
+ {0x09u, 0x40u},\r
+ {0x0Du, 0x08u},\r
+ {0x0Eu, 0x02u},\r
+ {0x13u, 0x10u},\r
+ {0x16u, 0x20u},\r
+ {0x17u, 0x10u},\r
+ {0x19u, 0x04u},\r
+ {0x1Au, 0x40u},\r
+ {0x1Bu, 0x10u},\r
+ {0x1Cu, 0x80u},\r
+ {0x1Du, 0x18u},\r
+ {0x1Eu, 0x02u},\r
+ {0x1Fu, 0x02u},\r
+ {0x20u, 0x10u},\r
+ {0x21u, 0xA1u},\r
+ {0x22u, 0x10u},\r
+ {0x23u, 0x02u},\r
+ {0x24u, 0x20u},\r
+ {0x26u, 0x20u},\r
+ {0x2Bu, 0x04u},\r
+ {0x2Du, 0x80u},\r
+ {0x2Fu, 0xA0u},\r
+ {0x31u, 0xA0u},\r
+ {0x32u, 0x04u},\r
+ {0x36u, 0x2Au},\r
+ {0x38u, 0x14u},\r
+ {0x39u, 0x02u},\r
+ {0x3Bu, 0x80u},\r
+ {0x3Cu, 0x48u},\r
+ {0x58u, 0x20u},\r
+ {0x5Bu, 0x40u},\r
+ {0x5Fu, 0x60u},\r
+ {0x60u, 0x04u},\r
+ {0x63u, 0x02u},\r
+ {0x64u, 0x01u},\r
+ {0x66u, 0x20u},\r
+ {0x67u, 0x02u},\r
+ {0x80u, 0x10u},\r
+ {0x81u, 0x40u},\r
+ {0x83u, 0x02u},\r
+ {0x84u, 0x01u},\r
+ {0x85u, 0x44u},\r
+ {0x87u, 0x40u},\r
+ {0x88u, 0x01u},\r
+ {0x8Bu, 0x41u},\r
+ {0x8Eu, 0x08u},\r
+ {0x8Fu, 0x40u},\r
+ {0x91u, 0x10u},\r
+ {0x92u, 0x0Au},\r
+ {0x93u, 0x10u},\r
+ {0x95u, 0x48u},\r
+ {0x96u, 0x60u},\r
+ {0x97u, 0x02u},\r
+ {0x98u, 0x28u},\r
+ {0x9Bu, 0x30u},\r
+ {0x9Du, 0x60u},\r
+ {0xA0u, 0x04u},\r
+ {0xA1u, 0x40u},\r
+ {0xA2u, 0x02u},\r
+ {0xA3u, 0xA4u},\r
+ {0xA7u, 0x12u},\r
+ {0xB2u, 0x10u},\r
+ {0xC0u, 0xFBu},\r
+ {0xC2u, 0xA5u},\r
+ {0xC4u, 0x62u},\r
+ {0xCAu, 0xD4u},\r
+ {0xCCu, 0xEEu},\r
+ {0xCEu, 0x5Fu},\r
+ {0xD6u, 0x3Cu},\r
+ {0xD8u, 0x3Cu},\r
+ {0xE0u, 0x04u},\r
+ {0xE2u, 0x80u},\r
+ {0xE4u, 0x40u},\r
+ {0xE6u, 0x20u},\r
{0xEAu, 0x02u},\r
+ {0xECu, 0x20u},\r
{0xEEu, 0x08u},\r
- {0xAFu, 0x08u},\r
- {0xE2u, 0x80u},\r
- {0x06u, 0x02u},\r
- {0x0Du, 0x20u},\r
- {0x12u, 0x08u},\r
- {0x13u, 0x02u},\r
+ {0x80u, 0x40u},\r
+ {0x86u, 0x01u},\r
+ {0x8Du, 0x80u},\r
+ {0x92u, 0x02u},\r
+ {0x94u, 0x40u},\r
+ {0x9Du, 0x80u},\r
+ {0xA9u, 0x04u},\r
+ {0xADu, 0x0Au},\r
+ {0xAEu, 0x20u},\r
+ {0xB4u, 0x04u},\r
+ {0xB5u, 0x20u},\r
+ {0xE4u, 0x42u},\r
+ {0xE8u, 0x10u},\r
+ {0xECu, 0x01u},\r
+ {0x04u, 0x80u},\r
+ {0x0Eu, 0x08u},\r
+ {0x13u, 0x42u},\r
{0x16u, 0x80u},\r
- {0x17u, 0x80u},\r
+ {0x17u, 0x40u},\r
{0x30u, 0x10u},\r
{0x33u, 0x01u},\r
- {0x36u, 0x20u},\r
- {0x37u, 0x04u},\r
- {0x39u, 0x04u},\r
- {0x3Au, 0x80u},\r
- {0x3Cu, 0x01u},\r
- {0x3Du, 0x10u},\r
- {0x40u, 0x02u},\r
- {0x5Bu, 0x08u},\r
+ {0x35u, 0x01u},\r
+ {0x37u, 0x80u},\r
+ {0x3Au, 0x82u},\r
+ {0x3Cu, 0x80u},\r
+ {0x3Du, 0x04u},\r
+ {0x42u, 0x08u},\r
+ {0x67u, 0x80u},\r
{0x6Bu, 0x03u},\r
- {0x89u, 0x10u},\r
{0xC0u, 0x80u},\r
{0xC2u, 0x80u},\r
{0xC4u, 0xF0u},\r
{0xCCu, 0xF0u},\r
{0xCEu, 0xF0u},\r
{0xD0u, 0x10u},\r
- {0xD6u, 0x40u},\r
- {0x33u, 0x11u},\r
- {0x36u, 0x01u},\r
- {0x37u, 0x80u},\r
+ {0xD8u, 0x80u},\r
+ {0x32u, 0x20u},\r
+ {0x33u, 0x01u},\r
+ {0x37u, 0x44u},\r
{0x39u, 0x80u},\r
- {0x5Au, 0x10u},\r
- {0x5Eu, 0x80u},\r
- {0x63u, 0x02u},\r
- {0x8Au, 0x40u},\r
- {0x94u, 0x01u},\r
- {0x9Bu, 0x90u},\r
- {0x9Cu, 0x12u},\r
- {0x9Fu, 0x08u},\r
- {0xA1u, 0x20u},\r
- {0xA6u, 0x20u},\r
- {0xAAu, 0x08u},\r
- {0xABu, 0x14u},\r
- {0xADu, 0x04u},\r
+ {0x5Bu, 0x20u},\r
+ {0x5Cu, 0x10u},\r
+ {0x67u, 0x08u},\r
+ {0x82u, 0x04u},\r
+ {0x8Bu, 0x40u},\r
+ {0x90u, 0x80u},\r
+ {0x95u, 0x04u},\r
+ {0x97u, 0x80u},\r
+ {0x9Bu, 0x40u},\r
+ {0x9Cu, 0x10u},\r
+ {0x9Du, 0x01u},\r
+ {0x9Eu, 0x08u},\r
+ {0xA2u, 0x24u},\r
+ {0xABu, 0x80u},\r
+ {0xAEu, 0x20u},\r
+ {0xAFu, 0x40u},\r
+ {0xB0u, 0x40u},\r
{0xB6u, 0x02u},\r
{0xCCu, 0xF0u},\r
{0xCEu, 0x10u},\r
{0xD4u, 0x80u},\r
- {0xD6u, 0x60u},\r
+ {0xD6u, 0x20u},\r
+ {0xD8u, 0x80u},\r
+ {0xE4u, 0x20u},\r
{0xEAu, 0x80u},\r
- {0xEEu, 0x40u},\r
{0x10u, 0x10u},\r
- {0x31u, 0x40u},\r
- {0x94u, 0x01u},\r
- {0x95u, 0x80u},\r
- {0x96u, 0x10u},\r
- {0x9Cu, 0x12u},\r
- {0x9Fu, 0x09u},\r
- {0xA6u, 0x01u},\r
- {0xA7u, 0x01u},\r
- {0xB1u, 0x20u},\r
- {0xB6u, 0x20u},\r
+ {0x33u, 0x80u},\r
+ {0x8Du, 0x40u},\r
+ {0x90u, 0x80u},\r
+ {0x95u, 0x84u},\r
+ {0x9Cu, 0x10u},\r
+ {0x9Du, 0x01u},\r
+ {0x9Eu, 0x08u},\r
+ {0x9Fu, 0x05u},\r
+ {0xAFu, 0x24u},\r
+ {0xB4u, 0x10u},\r
{0xC4u, 0x10u},\r
{0xCCu, 0x10u},\r
- {0x82u, 0x11u},\r
- {0x87u, 0x01u},\r
- {0x94u, 0x01u},\r
- {0x96u, 0x10u},\r
- {0x9Cu, 0x02u},\r
- {0x9Du, 0x40u},\r
- {0x9Fu, 0x09u},\r
- {0xA6u, 0x01u},\r
- {0xA7u, 0x01u},\r
- {0xA9u, 0x40u},\r
- {0xE2u, 0x80u},\r
- {0xE6u, 0x90u},\r
+ {0xEAu, 0x40u},\r
+ {0xEEu, 0x10u},\r
+ {0x6Bu, 0x40u},\r
+ {0x81u, 0x01u},\r
+ {0x83u, 0x40u},\r
+ {0x8Cu, 0x40u},\r
+ {0x90u, 0x80u},\r
+ {0x95u, 0x04u},\r
+ {0x9Du, 0x01u},\r
+ {0x9Eu, 0x08u},\r
+ {0x9Fu, 0x01u},\r
+ {0xA7u, 0x80u},\r
+ {0xABu, 0x04u},\r
+ {0xDCu, 0x20u},\r
+ {0xE2u, 0x20u},\r
+ {0xE6u, 0x80u},\r
{0xEAu, 0x80u},\r
- {0x02u, 0x01u},\r
- {0x07u, 0x08u},\r
+ {0x03u, 0x08u},\r
+ {0x04u, 0x40u},\r
{0x09u, 0x80u},\r
- {0x0Cu, 0x40u},\r
- {0x10u, 0x20u},\r
- {0x16u, 0x80u},\r
- {0x60u, 0x20u},\r
- {0x66u, 0x02u},\r
- {0x81u, 0x80u},\r
- {0x8Bu, 0x20u},\r
- {0x8Eu, 0x02u},\r
+ {0x0Cu, 0x80u},\r
+ {0x12u, 0x20u},\r
+ {0x15u, 0x04u},\r
+ {0x5Fu, 0x02u},\r
+ {0x65u, 0x20u},\r
+ {0x8Fu, 0x02u},\r
{0xC0u, 0x03u},\r
{0xC2u, 0x03u},\r
{0xC4u, 0x0Cu},\r
- {0xD8u, 0x03u},\r
- {0xE0u, 0x02u},\r
- {0xE4u, 0x04u},\r
- {0x00u, 0x08u},\r
- {0x05u, 0x04u},\r
- {0x0Au, 0x20u},\r
+ {0xD6u, 0x01u},\r
+ {0xD8u, 0x01u},\r
+ {0xE0u, 0x08u},\r
+ {0x03u, 0x40u},\r
+ {0x04u, 0x08u},\r
+ {0x0Bu, 0x20u},\r
{0x0Cu, 0x08u},\r
- {0x52u, 0x80u},\r
- {0x5Fu, 0x20u},\r
- {0x66u, 0x84u},\r
- {0x80u, 0x08u},\r
- {0x82u, 0x01u},\r
- {0x88u, 0x40u},\r
- {0x98u, 0x40u},\r
- {0x9Au, 0x05u},\r
- {0x9Bu, 0x28u},\r
- {0x9Cu, 0x20u},\r
- {0xAAu, 0x04u},\r
- {0xAEu, 0x80u},\r
- {0xB0u, 0x20u},\r
+ {0x51u, 0x80u},\r
+ {0x55u, 0x40u},\r
+ {0x5Du, 0x01u},\r
+ {0x64u, 0x10u},\r
+ {0x85u, 0x20u},\r
+ {0x88u, 0x10u},\r
+ {0x89u, 0x01u},\r
+ {0x8Fu, 0x40u},\r
+ {0x91u, 0x04u},\r
+ {0x9Du, 0x20u},\r
+ {0xA2u, 0x20u},\r
+ {0xA3u, 0x08u},\r
+ {0xB0u, 0x80u},\r
+ {0xB4u, 0x40u},\r
+ {0xB5u, 0x80u},\r
{0xC0u, 0x0Cu},\r
{0xC2u, 0x0Cu},\r
- {0xD4u, 0x04u},\r
- {0xD6u, 0x05u},\r
+ {0xD4u, 0x06u},\r
+ {0xD6u, 0x01u},\r
{0xD8u, 0x01u},\r
- {0xE2u, 0x01u},\r
- {0xEEu, 0x04u},\r
- {0x83u, 0x20u},\r
- {0x8Bu, 0x08u},\r
- {0x8Du, 0x04u},\r
- {0x99u, 0x04u},\r
- {0x9Bu, 0x08u},\r
- {0x9Cu, 0x20u},\r
- {0xAAu, 0x80u},\r
- {0xB0u, 0x04u},\r
- {0xB2u, 0x80u},\r
- {0xB6u, 0x10u},\r
- {0xE4u, 0x02u},\r
- {0xE6u, 0x01u},\r
- {0xEAu, 0x06u},\r
- {0xECu, 0x04u},\r
- {0x09u, 0x08u},\r
- {0x0Bu, 0x01u},\r
- {0x0Fu, 0x22u},\r
- {0x83u, 0x10u},\r
- {0x86u, 0x20u},\r
+ {0xE0u, 0x04u},\r
+ {0xE2u, 0x08u},\r
+ {0xE4u, 0x01u},\r
+ {0xEAu, 0x0Au},\r
+ {0xEEu, 0x01u},\r
+ {0x83u, 0x08u},\r
{0x8Du, 0x10u},\r
- {0x97u, 0x01u},\r
- {0xA1u, 0x04u},\r
- {0xA3u, 0x20u},\r
- {0xABu, 0x01u},\r
- {0xACu, 0x20u},\r
- {0xB5u, 0x04u},\r
+ {0x90u, 0x08u},\r
+ {0x91u, 0x04u},\r
+ {0x93u, 0x20u},\r
+ {0xA0u, 0x08u},\r
+ {0xA3u, 0x08u},\r
+ {0xA5u, 0xC0u},\r
+ {0xAEu, 0x20u},\r
+ {0xE6u, 0x08u},\r
+ {0x09u, 0x18u},\r
+ {0x0Du, 0x02u},\r
+ {0x0Fu, 0x02u},\r
+ {0x89u, 0x40u},\r
+ {0x8Du, 0x10u},\r
+ {0x90u, 0x08u},\r
+ {0x93u, 0x20u},\r
+ {0x95u, 0x40u},\r
+ {0xA5u, 0x52u},\r
+ {0xA9u, 0x42u},\r
+ {0xACu, 0x08u},\r
+ {0xB1u, 0x04u},\r
+ {0xB5u, 0x80u},\r
{0xC2u, 0x0Fu},\r
{0xE2u, 0x02u},\r
- {0xEAu, 0x08u},\r
- {0x67u, 0x40u},\r
- {0x94u, 0x01u},\r
- {0xABu, 0x08u},\r
- {0xADu, 0x40u},\r
- {0xAFu, 0x01u},\r
- {0xB4u, 0x02u},\r
- {0xD8u, 0x80u},\r
- {0xEAu, 0x60u},\r
+ {0xE4u, 0x04u},\r
+ {0xE8u, 0x08u},\r
+ {0xEAu, 0x04u},\r
+ {0x86u, 0x08u},\r
+ {0x95u, 0x04u},\r
+ {0x9Eu, 0x08u},\r
+ {0xA1u, 0x02u},\r
+ {0xA9u, 0x02u},\r
+ {0xAFu, 0x81u},\r
+ {0xE6u, 0x40u},\r
+ {0xEAu, 0xC0u},\r
{0xEEu, 0x10u},\r
- {0x04u, 0x08u},\r
- {0x51u, 0x10u},\r
- {0x56u, 0x40u},\r
- {0x86u, 0x40u},\r
- {0x89u, 0x10u},\r
- {0x8Cu, 0x04u},\r
- {0xA8u, 0x01u},\r
- {0xAFu, 0x40u},\r
+ {0x06u, 0x80u},\r
+ {0x51u, 0x02u},\r
+ {0x53u, 0x10u},\r
+ {0x85u, 0x04u},\r
+ {0x8Bu, 0x10u},\r
+ {0x8Eu, 0x80u},\r
+ {0x95u, 0x04u},\r
+ {0xA1u, 0x02u},\r
{0xC0u, 0x20u},\r
- {0xD4u, 0x60u},\r
- {0xE2u, 0x10u},\r
- {0xEAu, 0x80u},\r
- {0xEEu, 0x40u},\r
- {0x76u, 0x20u},\r
- {0x9Au, 0x20u},\r
+ {0xD4u, 0xA0u},\r
+ {0xE6u, 0x40u},\r
+ {0x7Fu, 0x02u},\r
+ {0x83u, 0x02u},\r
+ {0x8Bu, 0x10u},\r
+ {0x8Cu, 0x04u},\r
+ {0x90u, 0x08u},\r
+ {0x93u, 0x20u},\r
+ {0x95u, 0x40u},\r
{0x9Du, 0x10u},\r
- {0xA1u, 0x04u},\r
- {0xA3u, 0x20u},\r
{0xADu, 0x08u},\r
{0xAFu, 0x01u},\r
{0xDEu, 0x04u},\r
- {0x01u, 0x10u},\r
+ {0xE2u, 0x0Cu},\r
+ {0x01u, 0x40u},\r
{0x05u, 0x10u},\r
- {0x53u, 0x20u},\r
- {0x55u, 0x04u},\r
- {0x89u, 0x10u},\r
+ {0x53u, 0x10u},\r
+ {0x5Du, 0x20u},\r
+ {0x87u, 0x10u},\r
+ {0x95u, 0x40u},\r
+ {0x99u, 0x20u},\r
{0x9Du, 0x10u},\r
- {0xA1u, 0x04u},\r
- {0xA3u, 0x20u},\r
+ {0xA9u, 0x20u},\r
{0xC0u, 0x03u},\r
- {0xD4u, 0x06u},\r
- {0xE2u, 0x01u},\r
+ {0xD4u, 0x04u},\r
+ {0xD6u, 0x04u},\r
{0x10u, 0x03u},\r
{0x11u, 0x01u},\r
{0x1Au, 0x03u},\r
- {0x1Bu, 0x01u},\r
+ {0x1Cu, 0x03u},\r
+ {0x1Du, 0x01u},\r
{0x00u, 0xFFu},\r
{0x01u, 0xBFu},\r
{0x02u, 0x2Au},\r
/* address, size */\r
{(void CYFAR *)(CYREG_TMR0_CFG0), 12u},\r
{(void CYFAR *)(CYDEV_UCFG_B0_P0_U0_BASE), 4096u},\r
- {(void CYFAR *)(CYDEV_UCFG_B1_P2_U1_BASE), 1920u},\r
+ {(void CYFAR *)(CYDEV_UCFG_B1_P2_U0_BASE), 2048u},\r
{(void CYFAR *)(CYDEV_UCFG_DSI0_BASE), 2560u},\r
{(void CYFAR *)(CYDEV_UCFG_DSI12_BASE), 512u},\r
{(void CYFAR *)(CYREG_BCTL1_MDCLK_EN), 16u},\r
};\r
\r
- /* UDB_1_0_0_CONFIG Address: CYDEV_UCFG_B1_P2_U0_BASE Size (bytes): 128 */\r
- static const uint8 CYCODE BS_UDB_1_0_0_CONFIG_VAL[] = {\r
- 0x04u, 0x80u, 0x00u, 0x00u, 0x08u, 0x00u, 0x21u, 0x00u, 0x07u, 0x7Fu, 0x18u, 0x80u, 0x01u, 0xC0u, 0x00u, 0x02u, \r
- 0x01u, 0x90u, 0x00u, 0x40u, 0x22u, 0xC0u, 0x08u, 0x08u, 0x40u, 0x00u, 0x00u, 0xFFu, 0x01u, 0x00u, 0x00u, 0x9Fu, \r
- 0x10u, 0x00u, 0x00u, 0x60u, 0x01u, 0xC0u, 0x00u, 0x04u, 0x40u, 0x1Fu, 0x00u, 0x20u, 0x01u, 0xC0u, 0x00u, 0x01u, \r
- 0x40u, 0x00u, 0x00u, 0xFFu, 0x3Fu, 0x00u, 0x00u, 0x00u, 0x22u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x10u, 0x04u, \r
- 0x62u, 0x03u, 0x50u, 0x00u, 0x01u, 0xBEu, 0xFCu, 0x0Du, 0x1Fu, 0xFFu, 0xFFu, 0xFFu, 0x22u, 0x00u, 0xF0u, 0x08u, \r
- 0x04u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x04u, 0x04u, 0x04u, 0x00u, 0x00u, 0x00u, 0x00u, 0x01u, \r
- 0x00u, 0x00u, 0xC0u, 0x00u, 0x40u, 0x01u, 0x10u, 0x11u, 0xC0u, 0x01u, 0x00u, 0x11u, 0x40u, 0x01u, 0x40u, 0x01u, \r
- 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u};\r
-\r
/* UCFG_BCTL0 Address: CYREG_BCTL0_MDCLK_EN Size (bytes): 16 */\r
static const uint8 CYCODE BS_UCFG_BCTL0_VAL[] = {\r
- 0x03u, 0x01u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x02u, 0x01u, 0x03u, 0x01u, 0x02u, 0x01u, 0x02u, 0x01u};\r
+ 0x03u, 0x01u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x02u, 0x01u, 0x03u, 0x01u, 0x02u, 0x00u, 0x02u, 0x01u};\r
\r
static const cfg_memcpy_t CYCODE cfg_memcpy_list [] = {\r
/* dest, src, size */\r
- {(void CYFAR *)(CYDEV_UCFG_B1_P2_U0_BASE), BS_UDB_1_0_0_CONFIG_VAL, 128u},\r
{(void CYFAR *)(CYREG_BCTL0_MDCLK_EN), BS_UCFG_BCTL0_VAL, 16u},\r
};\r
\r
/*******************************************************************************\r
* File Name: cyfitter_cfg.h\r
* \r
-* PSoC Creator 4.1\r
+* PSoC Creator 4.2\r
*\r
* Description:\r
* This file provides basic startup and mux configuration settings\r
* This file is automatically generated by PSoC Creator.\r
*\r
********************************************************************************\r
-* Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.\r
+* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.\r
* You may use this file only in accordance with the license, terms, conditions, \r
* disclaimers, and limitations in the end user license agreement accompanying \r
* the software package with which this file was provided.\r
/*******************************************************************************\r
* File Name: cyfittergnu.inc\r
* \r
-* PSoC Creator 4.1\r
+* PSoC Creator 4.2\r
*\r
* Description:\r
* \r
* This file is automatically generated by PSoC Creator.\r
*\r
********************************************************************************\r
-* Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.\r
+* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.\r
* You may use this file only in accordance with the license, terms, conditions, \r
* disclaimers, and limitations in the end user license agreement accompanying \r
* the software package with which this file was provided.\r
.include "cydevicegnu.inc"\r
.include "cydevicegnu_trm.inc"\r
\r
-/* Debug_Timer_Interrupt */\r
-.set Debug_Timer_Interrupt__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0\r
-.set Debug_Timer_Interrupt__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0\r
-.set Debug_Timer_Interrupt__INTC_MASK, 0x01\r
-.set Debug_Timer_Interrupt__INTC_NUMBER, 0\r
-.set Debug_Timer_Interrupt__INTC_PRIOR_NUM, 7\r
-.set Debug_Timer_Interrupt__INTC_PRIOR_REG, CYREG_NVIC_PRI_0\r
-.set Debug_Timer_Interrupt__INTC_SET_EN_REG, CYREG_NVIC_SETENA0\r
-.set Debug_Timer_Interrupt__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0\r
-\r
-/* Debug_Timer_TimerHW */\r
-.set Debug_Timer_TimerHW__CAP0, CYREG_TMR0_CAP0\r
-.set Debug_Timer_TimerHW__CAP1, CYREG_TMR0_CAP1\r
-.set Debug_Timer_TimerHW__CFG0, CYREG_TMR0_CFG0\r
-.set Debug_Timer_TimerHW__CFG1, CYREG_TMR0_CFG1\r
-.set Debug_Timer_TimerHW__CFG2, CYREG_TMR0_CFG2\r
-.set Debug_Timer_TimerHW__CNT_CMP0, CYREG_TMR0_CNT_CMP0\r
-.set Debug_Timer_TimerHW__CNT_CMP1, CYREG_TMR0_CNT_CMP1\r
-.set Debug_Timer_TimerHW__PER0, CYREG_TMR0_PER0\r
-.set Debug_Timer_TimerHW__PER1, CYREG_TMR0_PER1\r
-.set Debug_Timer_TimerHW__PM_ACT_CFG, CYREG_PM_ACT_CFG3\r
-.set Debug_Timer_TimerHW__PM_ACT_MSK, 0x01\r
-.set Debug_Timer_TimerHW__PM_STBY_CFG, CYREG_PM_STBY_CFG3\r
-.set Debug_Timer_TimerHW__PM_STBY_MSK, 0x01\r
-.set Debug_Timer_TimerHW__RT0, CYREG_TMR0_RT0\r
-.set Debug_Timer_TimerHW__RT1, CYREG_TMR0_RT1\r
-.set Debug_Timer_TimerHW__SR0, CYREG_TMR0_SR0\r
-\r
-/* EXTLED */\r
-.set EXTLED__0__INTTYPE, CYREG_PICU0_INTTYPE0\r
-.set EXTLED__0__MASK, 0x01\r
-.set EXTLED__0__PC, CYREG_PRT0_PC0\r
-.set EXTLED__0__PORT, 0\r
-.set EXTLED__0__SHIFT, 0\r
-.set EXTLED__AG, CYREG_PRT0_AG\r
-.set EXTLED__AMUX, CYREG_PRT0_AMUX\r
-.set EXTLED__BIE, CYREG_PRT0_BIE\r
-.set EXTLED__BIT_MASK, CYREG_PRT0_BIT_MASK\r
-.set EXTLED__BYP, CYREG_PRT0_BYP\r
-.set EXTLED__CTL, CYREG_PRT0_CTL\r
-.set EXTLED__DM0, CYREG_PRT0_DM0\r
-.set EXTLED__DM1, CYREG_PRT0_DM1\r
-.set EXTLED__DM2, CYREG_PRT0_DM2\r
-.set EXTLED__DR, CYREG_PRT0_DR\r
-.set EXTLED__INP_DIS, CYREG_PRT0_INP_DIS\r
-.set EXTLED__INTTYPE_BASE, CYDEV_PICU_INTTYPE_PICU0_BASE\r
-.set EXTLED__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
-.set EXTLED__LCD_EN, CYREG_PRT0_LCD_EN\r
-.set EXTLED__MASK, 0x01\r
-.set EXTLED__PORT, 0\r
-.set EXTLED__PRT, CYREG_PRT0_PRT\r
-.set EXTLED__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
-.set EXTLED__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
-.set EXTLED__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
-.set EXTLED__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
-.set EXTLED__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
-.set EXTLED__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
-.set EXTLED__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
-.set EXTLED__PS, CYREG_PRT0_PS\r
-.set EXTLED__SHIFT, 0\r
-.set EXTLED__SLW, CYREG_PRT0_SLW\r
-\r
/* LED1 */\r
.set LED1__0__INTTYPE, CYREG_PICU0_INTTYPE1\r
.set LED1__0__MASK, 0x02\r
.set LED1__SHIFT, 1\r
.set LED1__SLW, CYREG_PRT0_SLW\r
\r
-/* SCSI_CLK */\r
-.set SCSI_CLK__CFG0, CYREG_CLKDIST_DCFG1_CFG0\r
-.set SCSI_CLK__CFG1, CYREG_CLKDIST_DCFG1_CFG1\r
-.set SCSI_CLK__CFG2, CYREG_CLKDIST_DCFG1_CFG2\r
-.set SCSI_CLK__CFG2_SRC_SEL_MASK, 0x07\r
-.set SCSI_CLK__INDEX, 0x01\r
-.set SCSI_CLK__PM_ACT_CFG, CYREG_PM_ACT_CFG2\r
-.set SCSI_CLK__PM_ACT_MSK, 0x02\r
-.set SCSI_CLK__PM_STBY_CFG, CYREG_PM_STBY_CFG2\r
-.set SCSI_CLK__PM_STBY_MSK, 0x02\r
-\r
-/* SCSI_CTL_PHASE */\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__0__MASK, 0x01\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__0__POS, 0\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__1__MASK, 0x02\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__1__POS, 1\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG, CYREG_B0_UDB06_07_ACTL\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG, CYREG_B0_UDB06_07_CTL\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG, CYREG_B0_UDB06_07_CTL\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG, CYREG_B0_UDB06_07_CTL\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG, CYREG_B0_UDB06_07_CTL\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_MASK_REG, CYREG_B0_UDB06_07_MSK\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG, CYREG_B0_UDB06_07_MSK\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG, CYREG_B0_UDB06_07_MSK\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG, CYREG_B0_UDB06_07_MSK\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__2__MASK, 0x04\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__2__POS, 2\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_AUX_CTL_REG, CYREG_B0_UDB06_ACTL\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_REG, CYREG_B0_UDB06_CTL\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_ST_REG, CYREG_B0_UDB06_ST_CTL\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_REG, CYREG_B0_UDB06_CTL\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_ST_REG, CYREG_B0_UDB06_ST_CTL\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__MASK, 0x07\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG, CYREG_B0_UDB06_MSK_ACTL\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG, CYREG_B0_UDB06_MSK_ACTL\r
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__PERIOD_REG, CYREG_B0_UDB06_MSK\r
-\r
-/* SCSI_Filtered */\r
-.set SCSI_Filtered_sts_sts_reg__0__MASK, 0x01\r
-.set SCSI_Filtered_sts_sts_reg__0__POS, 0\r
-.set SCSI_Filtered_sts_sts_reg__1__MASK, 0x02\r
-.set SCSI_Filtered_sts_sts_reg__1__POS, 1\r
-.set SCSI_Filtered_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG, CYREG_B0_UDB11_12_ACTL\r
-.set SCSI_Filtered_sts_sts_reg__16BIT_STATUS_REG, CYREG_B0_UDB11_12_ST\r
-.set SCSI_Filtered_sts_sts_reg__2__MASK, 0x04\r
-.set SCSI_Filtered_sts_sts_reg__2__POS, 2\r
-.set SCSI_Filtered_sts_sts_reg__3__MASK, 0x08\r
-.set SCSI_Filtered_sts_sts_reg__3__POS, 3\r
-.set SCSI_Filtered_sts_sts_reg__4__MASK, 0x10\r
-.set SCSI_Filtered_sts_sts_reg__4__POS, 4\r
-.set SCSI_Filtered_sts_sts_reg__MASK, 0x1F\r
-.set SCSI_Filtered_sts_sts_reg__MASK_REG, CYREG_B0_UDB11_MSK\r
-.set SCSI_Filtered_sts_sts_reg__STATUS_AUX_CTL_REG, CYREG_B0_UDB11_ACTL\r
-.set SCSI_Filtered_sts_sts_reg__STATUS_REG, CYREG_B0_UDB11_ST\r
+/* SD_CD */\r
+.set SD_CD__0__INTTYPE, CYREG_PICU3_INTTYPE5\r
+.set SD_CD__0__MASK, 0x20\r
+.set SD_CD__0__PC, CYREG_PRT3_PC5\r
+.set SD_CD__0__PORT, 3\r
+.set SD_CD__0__SHIFT, 5\r
+.set SD_CD__AG, CYREG_PRT3_AG\r
+.set SD_CD__AMUX, CYREG_PRT3_AMUX\r
+.set SD_CD__BIE, CYREG_PRT3_BIE\r
+.set SD_CD__BIT_MASK, CYREG_PRT3_BIT_MASK\r
+.set SD_CD__BYP, CYREG_PRT3_BYP\r
+.set SD_CD__CTL, CYREG_PRT3_CTL\r
+.set SD_CD__DM0, CYREG_PRT3_DM0\r
+.set SD_CD__DM1, CYREG_PRT3_DM1\r
+.set SD_CD__DM2, CYREG_PRT3_DM2\r
+.set SD_CD__DR, CYREG_PRT3_DR\r
+.set SD_CD__INP_DIS, CYREG_PRT3_INP_DIS\r
+.set SD_CD__INTTYPE_BASE, CYDEV_PICU_INTTYPE_PICU3_BASE\r
+.set SD_CD__LCD_COM_SEG, CYREG_PRT3_LCD_COM_SEG\r
+.set SD_CD__LCD_EN, CYREG_PRT3_LCD_EN\r
+.set SD_CD__MASK, 0x20\r
+.set SD_CD__PORT, 3\r
+.set SD_CD__PRT, CYREG_PRT3_PRT\r
+.set SD_CD__PRTDSI__CAPS_SEL, CYREG_PRT3_CAPS_SEL\r
+.set SD_CD__PRTDSI__DBL_SYNC_IN, CYREG_PRT3_DBL_SYNC_IN\r
+.set SD_CD__PRTDSI__OE_SEL0, CYREG_PRT3_OE_SEL0\r
+.set SD_CD__PRTDSI__OE_SEL1, CYREG_PRT3_OE_SEL1\r
+.set SD_CD__PRTDSI__OUT_SEL0, CYREG_PRT3_OUT_SEL0\r
+.set SD_CD__PRTDSI__OUT_SEL1, CYREG_PRT3_OUT_SEL1\r
+.set SD_CD__PRTDSI__SYNC_OUT, CYREG_PRT3_SYNC_OUT\r
+.set SD_CD__PS, CYREG_PRT3_PS\r
+.set SD_CD__SHIFT, 5\r
+.set SD_CD__SLW, CYREG_PRT3_SLW\r
\r
-/* SCSI_Glitch_Ctl */\r
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__0__MASK, 0x01\r
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__0__POS, 0\r
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG, CYREG_B0_UDB04_05_ACTL\r
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG, CYREG_B0_UDB04_05_CTL\r
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG, CYREG_B0_UDB04_05_CTL\r
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG, CYREG_B0_UDB04_05_CTL\r
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG, CYREG_B0_UDB04_05_CTL\r
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG, CYREG_B0_UDB04_05_MSK\r
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG, CYREG_B0_UDB04_05_MSK\r
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG, CYREG_B0_UDB04_05_MSK\r
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG, CYREG_B0_UDB04_05_MSK\r
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG, CYREG_B0_UDB04_ACTL\r
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_REG, CYREG_B0_UDB04_CTL\r
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_ST_REG, CYREG_B0_UDB04_ST_CTL\r
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__COUNT_REG, CYREG_B0_UDB04_CTL\r
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__COUNT_ST_REG, CYREG_B0_UDB04_ST_CTL\r
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__MASK, 0x01\r
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG, CYREG_B0_UDB04_MSK_ACTL\r
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG, CYREG_B0_UDB04_MSK_ACTL\r
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__PERIOD_REG, CYREG_B0_UDB04_MSK\r
-\r
-/* SCSI_In */\r
-.set SCSI_In__0__AG, CYREG_PRT2_AG\r
-.set SCSI_In__0__AMUX, CYREG_PRT2_AMUX\r
-.set SCSI_In__0__BIE, CYREG_PRT2_BIE\r
-.set SCSI_In__0__BIT_MASK, CYREG_PRT2_BIT_MASK\r
-.set SCSI_In__0__BYP, CYREG_PRT2_BYP\r
-.set SCSI_In__0__CTL, CYREG_PRT2_CTL\r
-.set SCSI_In__0__DM0, CYREG_PRT2_DM0\r
-.set SCSI_In__0__DM1, CYREG_PRT2_DM1\r
-.set SCSI_In__0__DM2, CYREG_PRT2_DM2\r
-.set SCSI_In__0__DR, CYREG_PRT2_DR\r
-.set SCSI_In__0__INP_DIS, CYREG_PRT2_INP_DIS\r
-.set SCSI_In__0__INTTYPE, CYREG_PICU2_INTTYPE1\r
-.set SCSI_In__0__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG\r
-.set SCSI_In__0__LCD_EN, CYREG_PRT2_LCD_EN\r
-.set SCSI_In__0__MASK, 0x02\r
-.set SCSI_In__0__PC, CYREG_PRT2_PC1\r
-.set SCSI_In__0__PORT, 2\r
-.set SCSI_In__0__PRT, CYREG_PRT2_PRT\r
-.set SCSI_In__0__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL\r
-.set SCSI_In__0__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN\r
-.set SCSI_In__0__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0\r
-.set SCSI_In__0__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1\r
-.set SCSI_In__0__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0\r
-.set SCSI_In__0__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1\r
-.set SCSI_In__0__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT\r
-.set SCSI_In__0__PS, CYREG_PRT2_PS\r
-.set SCSI_In__0__SHIFT, 1\r
-.set SCSI_In__0__SLW, CYREG_PRT2_SLW\r
-.set SCSI_In__1__AG, CYREG_PRT4_AG\r
-.set SCSI_In__1__AMUX, CYREG_PRT4_AMUX\r
-.set SCSI_In__1__BIE, CYREG_PRT4_BIE\r
-.set SCSI_In__1__BIT_MASK, CYREG_PRT4_BIT_MASK\r
-.set SCSI_In__1__BYP, CYREG_PRT4_BYP\r
-.set SCSI_In__1__CTL, CYREG_PRT4_CTL\r
-.set SCSI_In__1__DM0, CYREG_PRT4_DM0\r
-.set SCSI_In__1__DM1, CYREG_PRT4_DM1\r
-.set SCSI_In__1__DM2, CYREG_PRT4_DM2\r
-.set SCSI_In__1__DR, CYREG_PRT4_DR\r
-.set SCSI_In__1__INP_DIS, CYREG_PRT4_INP_DIS\r
-.set SCSI_In__1__INTTYPE, CYREG_PICU4_INTTYPE6\r
-.set SCSI_In__1__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
-.set SCSI_In__1__LCD_EN, CYREG_PRT4_LCD_EN\r
-.set SCSI_In__1__MASK, 0x40\r
-.set SCSI_In__1__PC, CYREG_PRT4_PC6\r
-.set SCSI_In__1__PORT, 4\r
-.set SCSI_In__1__PRT, CYREG_PRT4_PRT\r
-.set SCSI_In__1__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
-.set SCSI_In__1__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
-.set SCSI_In__1__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
-.set SCSI_In__1__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
-.set SCSI_In__1__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
-.set SCSI_In__1__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
-.set SCSI_In__1__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
-.set SCSI_In__1__PS, CYREG_PRT4_PS\r
-.set SCSI_In__1__SHIFT, 6\r
-.set SCSI_In__1__SLW, CYREG_PRT4_SLW\r
-.set SCSI_In__2__AG, CYREG_PRT4_AG\r
-.set SCSI_In__2__AMUX, CYREG_PRT4_AMUX\r
-.set SCSI_In__2__BIE, CYREG_PRT4_BIE\r
-.set SCSI_In__2__BIT_MASK, CYREG_PRT4_BIT_MASK\r
-.set SCSI_In__2__BYP, CYREG_PRT4_BYP\r
-.set SCSI_In__2__CTL, CYREG_PRT4_CTL\r
-.set SCSI_In__2__DM0, CYREG_PRT4_DM0\r
-.set SCSI_In__2__DM1, CYREG_PRT4_DM1\r
-.set SCSI_In__2__DM2, CYREG_PRT4_DM2\r
-.set SCSI_In__2__DR, CYREG_PRT4_DR\r
-.set SCSI_In__2__INP_DIS, CYREG_PRT4_INP_DIS\r
-.set SCSI_In__2__INTTYPE, CYREG_PICU4_INTTYPE2\r
-.set SCSI_In__2__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
-.set SCSI_In__2__LCD_EN, CYREG_PRT4_LCD_EN\r
-.set SCSI_In__2__MASK, 0x04\r
-.set SCSI_In__2__PC, CYREG_PRT4_PC2\r
-.set SCSI_In__2__PORT, 4\r
-.set SCSI_In__2__PRT, CYREG_PRT4_PRT\r
-.set SCSI_In__2__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
-.set SCSI_In__2__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
-.set SCSI_In__2__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
-.set SCSI_In__2__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
-.set SCSI_In__2__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
-.set SCSI_In__2__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
-.set SCSI_In__2__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
-.set SCSI_In__2__PS, CYREG_PRT4_PS\r
-.set SCSI_In__2__SHIFT, 2\r
-.set SCSI_In__2__SLW, CYREG_PRT4_SLW\r
-.set SCSI_In__3__AG, CYREG_PRT0_AG\r
-.set SCSI_In__3__AMUX, CYREG_PRT0_AMUX\r
-.set SCSI_In__3__BIE, CYREG_PRT0_BIE\r
-.set SCSI_In__3__BIT_MASK, CYREG_PRT0_BIT_MASK\r
-.set SCSI_In__3__BYP, CYREG_PRT0_BYP\r
-.set SCSI_In__3__CTL, CYREG_PRT0_CTL\r
-.set SCSI_In__3__DM0, CYREG_PRT0_DM0\r
-.set SCSI_In__3__DM1, CYREG_PRT0_DM1\r
-.set SCSI_In__3__DM2, CYREG_PRT0_DM2\r
-.set SCSI_In__3__DR, CYREG_PRT0_DR\r
-.set SCSI_In__3__INP_DIS, CYREG_PRT0_INP_DIS\r
-.set SCSI_In__3__INTTYPE, CYREG_PICU0_INTTYPE5\r
-.set SCSI_In__3__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
-.set SCSI_In__3__LCD_EN, CYREG_PRT0_LCD_EN\r
-.set SCSI_In__3__MASK, 0x20\r
-.set SCSI_In__3__PC, CYREG_PRT0_PC5\r
-.set SCSI_In__3__PORT, 0\r
-.set SCSI_In__3__PRT, CYREG_PRT0_PRT\r
-.set SCSI_In__3__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
-.set SCSI_In__3__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
-.set SCSI_In__3__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
-.set SCSI_In__3__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
-.set SCSI_In__3__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
-.set SCSI_In__3__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
-.set SCSI_In__3__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
-.set SCSI_In__3__PS, CYREG_PRT0_PS\r
-.set SCSI_In__3__SHIFT, 5\r
-.set SCSI_In__3__SLW, CYREG_PRT0_SLW\r
-.set SCSI_In__4__AG, CYREG_PRT0_AG\r
-.set SCSI_In__4__AMUX, CYREG_PRT0_AMUX\r
-.set SCSI_In__4__BIE, CYREG_PRT0_BIE\r
-.set SCSI_In__4__BIT_MASK, CYREG_PRT0_BIT_MASK\r
-.set SCSI_In__4__BYP, CYREG_PRT0_BYP\r
-.set SCSI_In__4__CTL, CYREG_PRT0_CTL\r
-.set SCSI_In__4__DM0, CYREG_PRT0_DM0\r
-.set SCSI_In__4__DM1, CYREG_PRT0_DM1\r
-.set SCSI_In__4__DM2, CYREG_PRT0_DM2\r
-.set SCSI_In__4__DR, CYREG_PRT0_DR\r
-.set SCSI_In__4__INP_DIS, CYREG_PRT0_INP_DIS\r
-.set SCSI_In__4__INTTYPE, CYREG_PICU0_INTTYPE4\r
-.set SCSI_In__4__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
-.set SCSI_In__4__LCD_EN, CYREG_PRT0_LCD_EN\r
-.set SCSI_In__4__MASK, 0x10\r
-.set SCSI_In__4__PC, CYREG_PRT0_PC4\r
-.set SCSI_In__4__PORT, 0\r
-.set SCSI_In__4__PRT, CYREG_PRT0_PRT\r
-.set SCSI_In__4__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
-.set SCSI_In__4__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
-.set SCSI_In__4__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
-.set SCSI_In__4__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
-.set SCSI_In__4__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
-.set SCSI_In__4__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
-.set SCSI_In__4__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
-.set SCSI_In__4__PS, CYREG_PRT0_PS\r
-.set SCSI_In__4__SHIFT, 4\r
-.set SCSI_In__4__SLW, CYREG_PRT0_SLW\r
-.set SCSI_In__CD__AG, CYREG_PRT4_AG\r
-.set SCSI_In__CD__AMUX, CYREG_PRT4_AMUX\r
-.set SCSI_In__CD__BIE, CYREG_PRT4_BIE\r
-.set SCSI_In__CD__BIT_MASK, CYREG_PRT4_BIT_MASK\r
-.set SCSI_In__CD__BYP, CYREG_PRT4_BYP\r
-.set SCSI_In__CD__CTL, CYREG_PRT4_CTL\r
-.set SCSI_In__CD__DM0, CYREG_PRT4_DM0\r
-.set SCSI_In__CD__DM1, CYREG_PRT4_DM1\r
-.set SCSI_In__CD__DM2, CYREG_PRT4_DM2\r
-.set SCSI_In__CD__DR, CYREG_PRT4_DR\r
-.set SCSI_In__CD__INP_DIS, CYREG_PRT4_INP_DIS\r
-.set SCSI_In__CD__INTTYPE, CYREG_PICU4_INTTYPE2\r
-.set SCSI_In__CD__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
-.set SCSI_In__CD__LCD_EN, CYREG_PRT4_LCD_EN\r
-.set SCSI_In__CD__MASK, 0x04\r
-.set SCSI_In__CD__PC, CYREG_PRT4_PC2\r
-.set SCSI_In__CD__PORT, 4\r
-.set SCSI_In__CD__PRT, CYREG_PRT4_PRT\r
-.set SCSI_In__CD__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
-.set SCSI_In__CD__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
-.set SCSI_In__CD__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
-.set SCSI_In__CD__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
-.set SCSI_In__CD__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
-.set SCSI_In__CD__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
-.set SCSI_In__CD__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
-.set SCSI_In__CD__PS, CYREG_PRT4_PS\r
-.set SCSI_In__CD__SHIFT, 2\r
-.set SCSI_In__CD__SLW, CYREG_PRT4_SLW\r
-.set SCSI_In__DBP__AG, CYREG_PRT2_AG\r
-.set SCSI_In__DBP__AMUX, CYREG_PRT2_AMUX\r
-.set SCSI_In__DBP__BIE, CYREG_PRT2_BIE\r
-.set SCSI_In__DBP__BIT_MASK, CYREG_PRT2_BIT_MASK\r
-.set SCSI_In__DBP__BYP, CYREG_PRT2_BYP\r
-.set SCSI_In__DBP__CTL, CYREG_PRT2_CTL\r
-.set SCSI_In__DBP__DM0, CYREG_PRT2_DM0\r
-.set SCSI_In__DBP__DM1, CYREG_PRT2_DM1\r
-.set SCSI_In__DBP__DM2, CYREG_PRT2_DM2\r
-.set SCSI_In__DBP__DR, CYREG_PRT2_DR\r
-.set SCSI_In__DBP__INP_DIS, CYREG_PRT2_INP_DIS\r
-.set SCSI_In__DBP__INTTYPE, CYREG_PICU2_INTTYPE1\r
-.set SCSI_In__DBP__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG\r
-.set SCSI_In__DBP__LCD_EN, CYREG_PRT2_LCD_EN\r
-.set SCSI_In__DBP__MASK, 0x02\r
-.set SCSI_In__DBP__PC, CYREG_PRT2_PC1\r
-.set SCSI_In__DBP__PORT, 2\r
-.set SCSI_In__DBP__PRT, CYREG_PRT2_PRT\r
-.set SCSI_In__DBP__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL\r
-.set SCSI_In__DBP__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN\r
-.set SCSI_In__DBP__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0\r
-.set SCSI_In__DBP__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1\r
-.set SCSI_In__DBP__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0\r
-.set SCSI_In__DBP__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1\r
-.set SCSI_In__DBP__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT\r
-.set SCSI_In__DBP__PS, CYREG_PRT2_PS\r
-.set SCSI_In__DBP__SHIFT, 1\r
-.set SCSI_In__DBP__SLW, CYREG_PRT2_SLW\r
-.set SCSI_In__IO__AG, CYREG_PRT0_AG\r
-.set SCSI_In__IO__AMUX, CYREG_PRT0_AMUX\r
-.set SCSI_In__IO__BIE, CYREG_PRT0_BIE\r
-.set SCSI_In__IO__BIT_MASK, CYREG_PRT0_BIT_MASK\r
-.set SCSI_In__IO__BYP, CYREG_PRT0_BYP\r
-.set SCSI_In__IO__CTL, CYREG_PRT0_CTL\r
-.set SCSI_In__IO__DM0, CYREG_PRT0_DM0\r
-.set SCSI_In__IO__DM1, CYREG_PRT0_DM1\r
-.set SCSI_In__IO__DM2, CYREG_PRT0_DM2\r
-.set SCSI_In__IO__DR, CYREG_PRT0_DR\r
-.set SCSI_In__IO__INP_DIS, CYREG_PRT0_INP_DIS\r
-.set SCSI_In__IO__INTTYPE, CYREG_PICU0_INTTYPE4\r
-.set SCSI_In__IO__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
-.set SCSI_In__IO__LCD_EN, CYREG_PRT0_LCD_EN\r
-.set SCSI_In__IO__MASK, 0x10\r
-.set SCSI_In__IO__PC, CYREG_PRT0_PC4\r
-.set SCSI_In__IO__PORT, 0\r
-.set SCSI_In__IO__PRT, CYREG_PRT0_PRT\r
-.set SCSI_In__IO__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
-.set SCSI_In__IO__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
-.set SCSI_In__IO__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
-.set SCSI_In__IO__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
-.set SCSI_In__IO__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
-.set SCSI_In__IO__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
-.set SCSI_In__IO__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
-.set SCSI_In__IO__PS, CYREG_PRT0_PS\r
-.set SCSI_In__IO__SHIFT, 4\r
-.set SCSI_In__IO__SLW, CYREG_PRT0_SLW\r
-.set SCSI_In__MSG__AG, CYREG_PRT4_AG\r
-.set SCSI_In__MSG__AMUX, CYREG_PRT4_AMUX\r
-.set SCSI_In__MSG__BIE, CYREG_PRT4_BIE\r
-.set SCSI_In__MSG__BIT_MASK, CYREG_PRT4_BIT_MASK\r
-.set SCSI_In__MSG__BYP, CYREG_PRT4_BYP\r
-.set SCSI_In__MSG__CTL, CYREG_PRT4_CTL\r
-.set SCSI_In__MSG__DM0, CYREG_PRT4_DM0\r
-.set SCSI_In__MSG__DM1, CYREG_PRT4_DM1\r
-.set SCSI_In__MSG__DM2, CYREG_PRT4_DM2\r
-.set SCSI_In__MSG__DR, CYREG_PRT4_DR\r
-.set SCSI_In__MSG__INP_DIS, CYREG_PRT4_INP_DIS\r
-.set SCSI_In__MSG__INTTYPE, CYREG_PICU4_INTTYPE6\r
-.set SCSI_In__MSG__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
-.set SCSI_In__MSG__LCD_EN, CYREG_PRT4_LCD_EN\r
-.set SCSI_In__MSG__MASK, 0x40\r
-.set SCSI_In__MSG__PC, CYREG_PRT4_PC6\r
-.set SCSI_In__MSG__PORT, 4\r
-.set SCSI_In__MSG__PRT, CYREG_PRT4_PRT\r
-.set SCSI_In__MSG__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
-.set SCSI_In__MSG__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
-.set SCSI_In__MSG__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
-.set SCSI_In__MSG__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
-.set SCSI_In__MSG__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
-.set SCSI_In__MSG__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
-.set SCSI_In__MSG__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
-.set SCSI_In__MSG__PS, CYREG_PRT4_PS\r
-.set SCSI_In__MSG__SHIFT, 6\r
-.set SCSI_In__MSG__SLW, CYREG_PRT4_SLW\r
-.set SCSI_In__REQ__AG, CYREG_PRT0_AG\r
-.set SCSI_In__REQ__AMUX, CYREG_PRT0_AMUX\r
-.set SCSI_In__REQ__BIE, CYREG_PRT0_BIE\r
-.set SCSI_In__REQ__BIT_MASK, CYREG_PRT0_BIT_MASK\r
-.set SCSI_In__REQ__BYP, CYREG_PRT0_BYP\r
-.set SCSI_In__REQ__CTL, CYREG_PRT0_CTL\r
-.set SCSI_In__REQ__DM0, CYREG_PRT0_DM0\r
-.set SCSI_In__REQ__DM1, CYREG_PRT0_DM1\r
-.set SCSI_In__REQ__DM2, CYREG_PRT0_DM2\r
-.set SCSI_In__REQ__DR, CYREG_PRT0_DR\r
-.set SCSI_In__REQ__INP_DIS, CYREG_PRT0_INP_DIS\r
-.set SCSI_In__REQ__INTTYPE, CYREG_PICU0_INTTYPE5\r
-.set SCSI_In__REQ__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
-.set SCSI_In__REQ__LCD_EN, CYREG_PRT0_LCD_EN\r
-.set SCSI_In__REQ__MASK, 0x20\r
-.set SCSI_In__REQ__PC, CYREG_PRT0_PC5\r
-.set SCSI_In__REQ__PORT, 0\r
-.set SCSI_In__REQ__PRT, CYREG_PRT0_PRT\r
-.set SCSI_In__REQ__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
-.set SCSI_In__REQ__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
-.set SCSI_In__REQ__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
-.set SCSI_In__REQ__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
-.set SCSI_In__REQ__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
-.set SCSI_In__REQ__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
-.set SCSI_In__REQ__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
-.set SCSI_In__REQ__PS, CYREG_PRT0_PS\r
-.set SCSI_In__REQ__SHIFT, 5\r
-.set SCSI_In__REQ__SLW, CYREG_PRT0_SLW\r
-.set SCSI_In_DBx__0__AG, CYREG_PRT5_AG\r
-.set SCSI_In_DBx__0__AMUX, CYREG_PRT5_AMUX\r
-.set SCSI_In_DBx__0__BIE, CYREG_PRT5_BIE\r
-.set SCSI_In_DBx__0__BIT_MASK, CYREG_PRT5_BIT_MASK\r
-.set SCSI_In_DBx__0__BYP, CYREG_PRT5_BYP\r
-.set SCSI_In_DBx__0__CTL, CYREG_PRT5_CTL\r
-.set SCSI_In_DBx__0__DM0, CYREG_PRT5_DM0\r
-.set SCSI_In_DBx__0__DM1, CYREG_PRT5_DM1\r
-.set SCSI_In_DBx__0__DM2, CYREG_PRT5_DM2\r
-.set SCSI_In_DBx__0__DR, CYREG_PRT5_DR\r
-.set SCSI_In_DBx__0__INP_DIS, CYREG_PRT5_INP_DIS\r
-.set SCSI_In_DBx__0__INTTYPE, CYREG_PICU5_INTTYPE3\r
-.set SCSI_In_DBx__0__LCD_COM_SEG, CYREG_PRT5_LCD_COM_SEG\r
-.set SCSI_In_DBx__0__LCD_EN, CYREG_PRT5_LCD_EN\r
-.set SCSI_In_DBx__0__MASK, 0x08\r
-.set SCSI_In_DBx__0__PC, CYREG_PRT5_PC3\r
-.set SCSI_In_DBx__0__PORT, 5\r
-.set SCSI_In_DBx__0__PRT, CYREG_PRT5_PRT\r
-.set SCSI_In_DBx__0__PRTDSI__CAPS_SEL, CYREG_PRT5_CAPS_SEL\r
-.set SCSI_In_DBx__0__PRTDSI__DBL_SYNC_IN, CYREG_PRT5_DBL_SYNC_IN\r
-.set SCSI_In_DBx__0__PRTDSI__OE_SEL0, CYREG_PRT5_OE_SEL0\r
-.set SCSI_In_DBx__0__PRTDSI__OE_SEL1, CYREG_PRT5_OE_SEL1\r
-.set SCSI_In_DBx__0__PRTDSI__OUT_SEL0, CYREG_PRT5_OUT_SEL0\r
-.set SCSI_In_DBx__0__PRTDSI__OUT_SEL1, CYREG_PRT5_OUT_SEL1\r
-.set SCSI_In_DBx__0__PRTDSI__SYNC_OUT, CYREG_PRT5_SYNC_OUT\r
-.set SCSI_In_DBx__0__PS, CYREG_PRT5_PS\r
-.set SCSI_In_DBx__0__SHIFT, 3\r
-.set SCSI_In_DBx__0__SLW, CYREG_PRT5_SLW\r
-.set SCSI_In_DBx__1__AG, CYREG_PRT5_AG\r
-.set SCSI_In_DBx__1__AMUX, CYREG_PRT5_AMUX\r
-.set SCSI_In_DBx__1__BIE, CYREG_PRT5_BIE\r
-.set SCSI_In_DBx__1__BIT_MASK, CYREG_PRT5_BIT_MASK\r
-.set SCSI_In_DBx__1__BYP, CYREG_PRT5_BYP\r
-.set SCSI_In_DBx__1__CTL, CYREG_PRT5_CTL\r
-.set SCSI_In_DBx__1__DM0, CYREG_PRT5_DM0\r
-.set SCSI_In_DBx__1__DM1, CYREG_PRT5_DM1\r
-.set SCSI_In_DBx__1__DM2, CYREG_PRT5_DM2\r
-.set SCSI_In_DBx__1__DR, CYREG_PRT5_DR\r
-.set SCSI_In_DBx__1__INP_DIS, CYREG_PRT5_INP_DIS\r
-.set SCSI_In_DBx__1__INTTYPE, CYREG_PICU5_INTTYPE2\r
-.set SCSI_In_DBx__1__LCD_COM_SEG, CYREG_PRT5_LCD_COM_SEG\r
-.set SCSI_In_DBx__1__LCD_EN, CYREG_PRT5_LCD_EN\r
-.set SCSI_In_DBx__1__MASK, 0x04\r
-.set SCSI_In_DBx__1__PC, CYREG_PRT5_PC2\r
-.set SCSI_In_DBx__1__PORT, 5\r
-.set SCSI_In_DBx__1__PRT, CYREG_PRT5_PRT\r
-.set SCSI_In_DBx__1__PRTDSI__CAPS_SEL, CYREG_PRT5_CAPS_SEL\r
-.set SCSI_In_DBx__1__PRTDSI__DBL_SYNC_IN, CYREG_PRT5_DBL_SYNC_IN\r
-.set SCSI_In_DBx__1__PRTDSI__OE_SEL0, CYREG_PRT5_OE_SEL0\r
-.set SCSI_In_DBx__1__PRTDSI__OE_SEL1, CYREG_PRT5_OE_SEL1\r
-.set SCSI_In_DBx__1__PRTDSI__OUT_SEL0, CYREG_PRT5_OUT_SEL0\r
-.set SCSI_In_DBx__1__PRTDSI__OUT_SEL1, CYREG_PRT5_OUT_SEL1\r
-.set SCSI_In_DBx__1__PRTDSI__SYNC_OUT, CYREG_PRT5_SYNC_OUT\r
-.set SCSI_In_DBx__1__PS, CYREG_PRT5_PS\r
-.set SCSI_In_DBx__1__SHIFT, 2\r
-.set SCSI_In_DBx__1__SLW, CYREG_PRT5_SLW\r
-.set SCSI_In_DBx__2__AG, CYREG_PRT6_AG\r
-.set SCSI_In_DBx__2__AMUX, CYREG_PRT6_AMUX\r
-.set SCSI_In_DBx__2__BIE, CYREG_PRT6_BIE\r
-.set SCSI_In_DBx__2__BIT_MASK, CYREG_PRT6_BIT_MASK\r
-.set SCSI_In_DBx__2__BYP, CYREG_PRT6_BYP\r
-.set SCSI_In_DBx__2__CTL, CYREG_PRT6_CTL\r
-.set SCSI_In_DBx__2__DM0, CYREG_PRT6_DM0\r
-.set SCSI_In_DBx__2__DM1, CYREG_PRT6_DM1\r
-.set SCSI_In_DBx__2__DM2, CYREG_PRT6_DM2\r
-.set SCSI_In_DBx__2__DR, CYREG_PRT6_DR\r
-.set SCSI_In_DBx__2__INP_DIS, CYREG_PRT6_INP_DIS\r
-.set SCSI_In_DBx__2__INTTYPE, CYREG_PICU6_INTTYPE7\r
-.set SCSI_In_DBx__2__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
-.set SCSI_In_DBx__2__LCD_EN, CYREG_PRT6_LCD_EN\r
-.set SCSI_In_DBx__2__MASK, 0x80\r
-.set SCSI_In_DBx__2__PC, CYREG_PRT6_PC7\r
-.set SCSI_In_DBx__2__PORT, 6\r
-.set SCSI_In_DBx__2__PRT, CYREG_PRT6_PRT\r
-.set SCSI_In_DBx__2__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
-.set SCSI_In_DBx__2__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
-.set SCSI_In_DBx__2__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
-.set SCSI_In_DBx__2__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
-.set SCSI_In_DBx__2__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
-.set SCSI_In_DBx__2__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
-.set SCSI_In_DBx__2__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
-.set SCSI_In_DBx__2__PS, CYREG_PRT6_PS\r
-.set SCSI_In_DBx__2__SHIFT, 7\r
-.set SCSI_In_DBx__2__SLW, CYREG_PRT6_SLW\r
-.set SCSI_In_DBx__3__AG, CYREG_PRT6_AG\r
-.set SCSI_In_DBx__3__AMUX, CYREG_PRT6_AMUX\r
-.set SCSI_In_DBx__3__BIE, CYREG_PRT6_BIE\r
-.set SCSI_In_DBx__3__BIT_MASK, CYREG_PRT6_BIT_MASK\r
-.set SCSI_In_DBx__3__BYP, CYREG_PRT6_BYP\r
-.set SCSI_In_DBx__3__CTL, CYREG_PRT6_CTL\r
-.set SCSI_In_DBx__3__DM0, CYREG_PRT6_DM0\r
-.set SCSI_In_DBx__3__DM1, CYREG_PRT6_DM1\r
-.set SCSI_In_DBx__3__DM2, CYREG_PRT6_DM2\r
-.set SCSI_In_DBx__3__DR, CYREG_PRT6_DR\r
-.set SCSI_In_DBx__3__INP_DIS, CYREG_PRT6_INP_DIS\r
-.set SCSI_In_DBx__3__INTTYPE, CYREG_PICU6_INTTYPE6\r
-.set SCSI_In_DBx__3__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
-.set SCSI_In_DBx__3__LCD_EN, CYREG_PRT6_LCD_EN\r
-.set SCSI_In_DBx__3__MASK, 0x40\r
-.set SCSI_In_DBx__3__PC, CYREG_PRT6_PC6\r
-.set SCSI_In_DBx__3__PORT, 6\r
-.set SCSI_In_DBx__3__PRT, CYREG_PRT6_PRT\r
-.set SCSI_In_DBx__3__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
-.set SCSI_In_DBx__3__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
-.set SCSI_In_DBx__3__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
-.set SCSI_In_DBx__3__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
-.set SCSI_In_DBx__3__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
-.set SCSI_In_DBx__3__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
-.set SCSI_In_DBx__3__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
-.set SCSI_In_DBx__3__PS, CYREG_PRT6_PS\r
-.set SCSI_In_DBx__3__SHIFT, 6\r
-.set SCSI_In_DBx__3__SLW, CYREG_PRT6_SLW\r
-.set SCSI_In_DBx__4__AG, CYREG_PRT12_AG\r
-.set SCSI_In_DBx__4__BIE, CYREG_PRT12_BIE\r
-.set SCSI_In_DBx__4__BIT_MASK, CYREG_PRT12_BIT_MASK\r
-.set SCSI_In_DBx__4__BYP, CYREG_PRT12_BYP\r
-.set SCSI_In_DBx__4__DM0, CYREG_PRT12_DM0\r
-.set SCSI_In_DBx__4__DM1, CYREG_PRT12_DM1\r
-.set SCSI_In_DBx__4__DM2, CYREG_PRT12_DM2\r
-.set SCSI_In_DBx__4__DR, CYREG_PRT12_DR\r
-.set SCSI_In_DBx__4__INP_DIS, CYREG_PRT12_INP_DIS\r
-.set SCSI_In_DBx__4__INTTYPE, CYREG_PICU12_INTTYPE5\r
-.set SCSI_In_DBx__4__MASK, 0x20\r
-.set SCSI_In_DBx__4__PC, CYREG_PRT12_PC5\r
-.set SCSI_In_DBx__4__PORT, 12\r
-.set SCSI_In_DBx__4__PRT, CYREG_PRT12_PRT\r
-.set SCSI_In_DBx__4__PRTDSI__DBL_SYNC_IN, CYREG_PRT12_DBL_SYNC_IN\r
-.set SCSI_In_DBx__4__PRTDSI__OE_SEL0, CYREG_PRT12_OE_SEL0\r
-.set SCSI_In_DBx__4__PRTDSI__OE_SEL1, CYREG_PRT12_OE_SEL1\r
-.set SCSI_In_DBx__4__PRTDSI__OUT_SEL0, CYREG_PRT12_OUT_SEL0\r
-.set SCSI_In_DBx__4__PRTDSI__OUT_SEL1, CYREG_PRT12_OUT_SEL1\r
-.set SCSI_In_DBx__4__PRTDSI__SYNC_OUT, CYREG_PRT12_SYNC_OUT\r
-.set SCSI_In_DBx__4__PS, CYREG_PRT12_PS\r
-.set SCSI_In_DBx__4__SHIFT, 5\r
-.set SCSI_In_DBx__4__SIO_CFG, CYREG_PRT12_SIO_CFG\r
-.set SCSI_In_DBx__4__SIO_DIFF, CYREG_PRT12_SIO_DIFF\r
-.set SCSI_In_DBx__4__SIO_HYST_EN, CYREG_PRT12_SIO_HYST_EN\r
-.set SCSI_In_DBx__4__SIO_REG_HIFREQ, CYREG_PRT12_SIO_REG_HIFREQ\r
-.set SCSI_In_DBx__4__SLW, CYREG_PRT12_SLW\r
-.set SCSI_In_DBx__5__AG, CYREG_PRT12_AG\r
-.set SCSI_In_DBx__5__BIE, CYREG_PRT12_BIE\r
-.set SCSI_In_DBx__5__BIT_MASK, CYREG_PRT12_BIT_MASK\r
-.set SCSI_In_DBx__5__BYP, CYREG_PRT12_BYP\r
-.set SCSI_In_DBx__5__DM0, CYREG_PRT12_DM0\r
-.set SCSI_In_DBx__5__DM1, CYREG_PRT12_DM1\r
-.set SCSI_In_DBx__5__DM2, CYREG_PRT12_DM2\r
-.set SCSI_In_DBx__5__DR, CYREG_PRT12_DR\r
-.set SCSI_In_DBx__5__INP_DIS, CYREG_PRT12_INP_DIS\r
-.set SCSI_In_DBx__5__INTTYPE, CYREG_PICU12_INTTYPE4\r
-.set SCSI_In_DBx__5__MASK, 0x10\r
-.set SCSI_In_DBx__5__PC, CYREG_PRT12_PC4\r
-.set SCSI_In_DBx__5__PORT, 12\r
-.set SCSI_In_DBx__5__PRT, CYREG_PRT12_PRT\r
-.set SCSI_In_DBx__5__PRTDSI__DBL_SYNC_IN, CYREG_PRT12_DBL_SYNC_IN\r
-.set SCSI_In_DBx__5__PRTDSI__OE_SEL0, CYREG_PRT12_OE_SEL0\r
-.set SCSI_In_DBx__5__PRTDSI__OE_SEL1, CYREG_PRT12_OE_SEL1\r
-.set SCSI_In_DBx__5__PRTDSI__OUT_SEL0, CYREG_PRT12_OUT_SEL0\r
-.set SCSI_In_DBx__5__PRTDSI__OUT_SEL1, CYREG_PRT12_OUT_SEL1\r
-.set SCSI_In_DBx__5__PRTDSI__SYNC_OUT, CYREG_PRT12_SYNC_OUT\r
-.set SCSI_In_DBx__5__PS, CYREG_PRT12_PS\r
-.set SCSI_In_DBx__5__SHIFT, 4\r
-.set SCSI_In_DBx__5__SIO_CFG, CYREG_PRT12_SIO_CFG\r
-.set SCSI_In_DBx__5__SIO_DIFF, CYREG_PRT12_SIO_DIFF\r
-.set SCSI_In_DBx__5__SIO_HYST_EN, CYREG_PRT12_SIO_HYST_EN\r
-.set SCSI_In_DBx__5__SIO_REG_HIFREQ, CYREG_PRT12_SIO_REG_HIFREQ\r
-.set SCSI_In_DBx__5__SLW, CYREG_PRT12_SLW\r
-.set SCSI_In_DBx__6__AG, CYREG_PRT2_AG\r
-.set SCSI_In_DBx__6__AMUX, CYREG_PRT2_AMUX\r
-.set SCSI_In_DBx__6__BIE, CYREG_PRT2_BIE\r
-.set SCSI_In_DBx__6__BIT_MASK, CYREG_PRT2_BIT_MASK\r
-.set SCSI_In_DBx__6__BYP, CYREG_PRT2_BYP\r
-.set SCSI_In_DBx__6__CTL, CYREG_PRT2_CTL\r
-.set SCSI_In_DBx__6__DM0, CYREG_PRT2_DM0\r
-.set SCSI_In_DBx__6__DM1, CYREG_PRT2_DM1\r
-.set SCSI_In_DBx__6__DM2, CYREG_PRT2_DM2\r
-.set SCSI_In_DBx__6__DR, CYREG_PRT2_DR\r
-.set SCSI_In_DBx__6__INP_DIS, CYREG_PRT2_INP_DIS\r
-.set SCSI_In_DBx__6__INTTYPE, CYREG_PICU2_INTTYPE5\r
-.set SCSI_In_DBx__6__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG\r
-.set SCSI_In_DBx__6__LCD_EN, CYREG_PRT2_LCD_EN\r
-.set SCSI_In_DBx__6__MASK, 0x20\r
-.set SCSI_In_DBx__6__PC, CYREG_PRT2_PC5\r
-.set SCSI_In_DBx__6__PORT, 2\r
-.set SCSI_In_DBx__6__PRT, CYREG_PRT2_PRT\r
-.set SCSI_In_DBx__6__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL\r
-.set SCSI_In_DBx__6__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN\r
-.set SCSI_In_DBx__6__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0\r
-.set SCSI_In_DBx__6__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1\r
-.set SCSI_In_DBx__6__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0\r
-.set SCSI_In_DBx__6__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1\r
-.set SCSI_In_DBx__6__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT\r
-.set SCSI_In_DBx__6__PS, CYREG_PRT2_PS\r
-.set SCSI_In_DBx__6__SHIFT, 5\r
-.set SCSI_In_DBx__6__SLW, CYREG_PRT2_SLW\r
-.set SCSI_In_DBx__7__AG, CYREG_PRT2_AG\r
-.set SCSI_In_DBx__7__AMUX, CYREG_PRT2_AMUX\r
-.set SCSI_In_DBx__7__BIE, CYREG_PRT2_BIE\r
-.set SCSI_In_DBx__7__BIT_MASK, CYREG_PRT2_BIT_MASK\r
-.set SCSI_In_DBx__7__BYP, CYREG_PRT2_BYP\r
-.set SCSI_In_DBx__7__CTL, CYREG_PRT2_CTL\r
-.set SCSI_In_DBx__7__DM0, CYREG_PRT2_DM0\r
-.set SCSI_In_DBx__7__DM1, CYREG_PRT2_DM1\r
-.set SCSI_In_DBx__7__DM2, CYREG_PRT2_DM2\r
-.set SCSI_In_DBx__7__DR, CYREG_PRT2_DR\r
-.set SCSI_In_DBx__7__INP_DIS, CYREG_PRT2_INP_DIS\r
-.set SCSI_In_DBx__7__INTTYPE, CYREG_PICU2_INTTYPE4\r
-.set SCSI_In_DBx__7__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG\r
-.set SCSI_In_DBx__7__LCD_EN, CYREG_PRT2_LCD_EN\r
-.set SCSI_In_DBx__7__MASK, 0x10\r
-.set SCSI_In_DBx__7__PC, CYREG_PRT2_PC4\r
-.set SCSI_In_DBx__7__PORT, 2\r
-.set SCSI_In_DBx__7__PRT, CYREG_PRT2_PRT\r
-.set SCSI_In_DBx__7__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL\r
-.set SCSI_In_DBx__7__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN\r
-.set SCSI_In_DBx__7__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0\r
-.set SCSI_In_DBx__7__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1\r
-.set SCSI_In_DBx__7__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0\r
-.set SCSI_In_DBx__7__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1\r
-.set SCSI_In_DBx__7__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT\r
-.set SCSI_In_DBx__7__PS, CYREG_PRT2_PS\r
-.set SCSI_In_DBx__7__SHIFT, 4\r
-.set SCSI_In_DBx__7__SLW, CYREG_PRT2_SLW\r
-.set SCSI_In_DBx__DB0__AG, CYREG_PRT5_AG\r
-.set SCSI_In_DBx__DB0__AMUX, CYREG_PRT5_AMUX\r
-.set SCSI_In_DBx__DB0__BIE, CYREG_PRT5_BIE\r
-.set SCSI_In_DBx__DB0__BIT_MASK, CYREG_PRT5_BIT_MASK\r
-.set SCSI_In_DBx__DB0__BYP, CYREG_PRT5_BYP\r
-.set SCSI_In_DBx__DB0__CTL, CYREG_PRT5_CTL\r
-.set SCSI_In_DBx__DB0__DM0, CYREG_PRT5_DM0\r
-.set SCSI_In_DBx__DB0__DM1, CYREG_PRT5_DM1\r
-.set SCSI_In_DBx__DB0__DM2, CYREG_PRT5_DM2\r
-.set SCSI_In_DBx__DB0__DR, CYREG_PRT5_DR\r
-.set SCSI_In_DBx__DB0__INP_DIS, CYREG_PRT5_INP_DIS\r
-.set SCSI_In_DBx__DB0__INTTYPE, CYREG_PICU5_INTTYPE3\r
-.set SCSI_In_DBx__DB0__LCD_COM_SEG, CYREG_PRT5_LCD_COM_SEG\r
-.set SCSI_In_DBx__DB0__LCD_EN, CYREG_PRT5_LCD_EN\r
-.set SCSI_In_DBx__DB0__MASK, 0x08\r
-.set SCSI_In_DBx__DB0__PC, CYREG_PRT5_PC3\r
-.set SCSI_In_DBx__DB0__PORT, 5\r
-.set SCSI_In_DBx__DB0__PRT, CYREG_PRT5_PRT\r
-.set SCSI_In_DBx__DB0__PRTDSI__CAPS_SEL, CYREG_PRT5_CAPS_SEL\r
-.set SCSI_In_DBx__DB0__PRTDSI__DBL_SYNC_IN, CYREG_PRT5_DBL_SYNC_IN\r
-.set SCSI_In_DBx__DB0__PRTDSI__OE_SEL0, CYREG_PRT5_OE_SEL0\r
-.set SCSI_In_DBx__DB0__PRTDSI__OE_SEL1, CYREG_PRT5_OE_SEL1\r
-.set SCSI_In_DBx__DB0__PRTDSI__OUT_SEL0, CYREG_PRT5_OUT_SEL0\r
-.set SCSI_In_DBx__DB0__PRTDSI__OUT_SEL1, CYREG_PRT5_OUT_SEL1\r
-.set SCSI_In_DBx__DB0__PRTDSI__SYNC_OUT, CYREG_PRT5_SYNC_OUT\r
-.set SCSI_In_DBx__DB0__PS, CYREG_PRT5_PS\r
-.set SCSI_In_DBx__DB0__SHIFT, 3\r
-.set SCSI_In_DBx__DB0__SLW, CYREG_PRT5_SLW\r
-.set SCSI_In_DBx__DB1__AG, CYREG_PRT5_AG\r
-.set SCSI_In_DBx__DB1__AMUX, CYREG_PRT5_AMUX\r
-.set SCSI_In_DBx__DB1__BIE, CYREG_PRT5_BIE\r
-.set SCSI_In_DBx__DB1__BIT_MASK, CYREG_PRT5_BIT_MASK\r
-.set SCSI_In_DBx__DB1__BYP, CYREG_PRT5_BYP\r
-.set SCSI_In_DBx__DB1__CTL, CYREG_PRT5_CTL\r
-.set SCSI_In_DBx__DB1__DM0, CYREG_PRT5_DM0\r
-.set SCSI_In_DBx__DB1__DM1, CYREG_PRT5_DM1\r
-.set SCSI_In_DBx__DB1__DM2, CYREG_PRT5_DM2\r
-.set SCSI_In_DBx__DB1__DR, CYREG_PRT5_DR\r
-.set SCSI_In_DBx__DB1__INP_DIS, CYREG_PRT5_INP_DIS\r
-.set SCSI_In_DBx__DB1__INTTYPE, CYREG_PICU5_INTTYPE2\r
-.set SCSI_In_DBx__DB1__LCD_COM_SEG, CYREG_PRT5_LCD_COM_SEG\r
-.set SCSI_In_DBx__DB1__LCD_EN, CYREG_PRT5_LCD_EN\r
-.set SCSI_In_DBx__DB1__MASK, 0x04\r
-.set SCSI_In_DBx__DB1__PC, CYREG_PRT5_PC2\r
-.set SCSI_In_DBx__DB1__PORT, 5\r
-.set SCSI_In_DBx__DB1__PRT, CYREG_PRT5_PRT\r
-.set SCSI_In_DBx__DB1__PRTDSI__CAPS_SEL, CYREG_PRT5_CAPS_SEL\r
-.set SCSI_In_DBx__DB1__PRTDSI__DBL_SYNC_IN, CYREG_PRT5_DBL_SYNC_IN\r
-.set SCSI_In_DBx__DB1__PRTDSI__OE_SEL0, CYREG_PRT5_OE_SEL0\r
-.set SCSI_In_DBx__DB1__PRTDSI__OE_SEL1, CYREG_PRT5_OE_SEL1\r
-.set SCSI_In_DBx__DB1__PRTDSI__OUT_SEL0, CYREG_PRT5_OUT_SEL0\r
-.set SCSI_In_DBx__DB1__PRTDSI__OUT_SEL1, CYREG_PRT5_OUT_SEL1\r
-.set SCSI_In_DBx__DB1__PRTDSI__SYNC_OUT, CYREG_PRT5_SYNC_OUT\r
-.set SCSI_In_DBx__DB1__PS, CYREG_PRT5_PS\r
-.set SCSI_In_DBx__DB1__SHIFT, 2\r
-.set SCSI_In_DBx__DB1__SLW, CYREG_PRT5_SLW\r
-.set SCSI_In_DBx__DB2__AG, CYREG_PRT6_AG\r
-.set SCSI_In_DBx__DB2__AMUX, CYREG_PRT6_AMUX\r
-.set SCSI_In_DBx__DB2__BIE, CYREG_PRT6_BIE\r
-.set SCSI_In_DBx__DB2__BIT_MASK, CYREG_PRT6_BIT_MASK\r
-.set SCSI_In_DBx__DB2__BYP, CYREG_PRT6_BYP\r
-.set SCSI_In_DBx__DB2__CTL, CYREG_PRT6_CTL\r
-.set SCSI_In_DBx__DB2__DM0, CYREG_PRT6_DM0\r
-.set SCSI_In_DBx__DB2__DM1, CYREG_PRT6_DM1\r
-.set SCSI_In_DBx__DB2__DM2, CYREG_PRT6_DM2\r
-.set SCSI_In_DBx__DB2__DR, CYREG_PRT6_DR\r
-.set SCSI_In_DBx__DB2__INP_DIS, CYREG_PRT6_INP_DIS\r
-.set SCSI_In_DBx__DB2__INTTYPE, CYREG_PICU6_INTTYPE7\r
-.set SCSI_In_DBx__DB2__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
-.set SCSI_In_DBx__DB2__LCD_EN, CYREG_PRT6_LCD_EN\r
-.set SCSI_In_DBx__DB2__MASK, 0x80\r
-.set SCSI_In_DBx__DB2__PC, CYREG_PRT6_PC7\r
-.set SCSI_In_DBx__DB2__PORT, 6\r
-.set SCSI_In_DBx__DB2__PRT, CYREG_PRT6_PRT\r
-.set SCSI_In_DBx__DB2__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
-.set SCSI_In_DBx__DB2__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
-.set SCSI_In_DBx__DB2__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
-.set SCSI_In_DBx__DB2__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
-.set SCSI_In_DBx__DB2__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
-.set SCSI_In_DBx__DB2__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
-.set SCSI_In_DBx__DB2__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
-.set SCSI_In_DBx__DB2__PS, CYREG_PRT6_PS\r
-.set SCSI_In_DBx__DB2__SHIFT, 7\r
-.set SCSI_In_DBx__DB2__SLW, CYREG_PRT6_SLW\r
-.set SCSI_In_DBx__DB3__AG, CYREG_PRT6_AG\r
-.set SCSI_In_DBx__DB3__AMUX, CYREG_PRT6_AMUX\r
-.set SCSI_In_DBx__DB3__BIE, CYREG_PRT6_BIE\r
-.set SCSI_In_DBx__DB3__BIT_MASK, CYREG_PRT6_BIT_MASK\r
-.set SCSI_In_DBx__DB3__BYP, CYREG_PRT6_BYP\r
-.set SCSI_In_DBx__DB3__CTL, CYREG_PRT6_CTL\r
-.set SCSI_In_DBx__DB3__DM0, CYREG_PRT6_DM0\r
-.set SCSI_In_DBx__DB3__DM1, CYREG_PRT6_DM1\r
-.set SCSI_In_DBx__DB3__DM2, CYREG_PRT6_DM2\r
-.set SCSI_In_DBx__DB3__DR, CYREG_PRT6_DR\r
-.set SCSI_In_DBx__DB3__INP_DIS, CYREG_PRT6_INP_DIS\r
-.set SCSI_In_DBx__DB3__INTTYPE, CYREG_PICU6_INTTYPE6\r
-.set SCSI_In_DBx__DB3__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
-.set SCSI_In_DBx__DB3__LCD_EN, CYREG_PRT6_LCD_EN\r
-.set SCSI_In_DBx__DB3__MASK, 0x40\r
-.set SCSI_In_DBx__DB3__PC, CYREG_PRT6_PC6\r
-.set SCSI_In_DBx__DB3__PORT, 6\r
-.set SCSI_In_DBx__DB3__PRT, CYREG_PRT6_PRT\r
-.set SCSI_In_DBx__DB3__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
-.set SCSI_In_DBx__DB3__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
-.set SCSI_In_DBx__DB3__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
-.set SCSI_In_DBx__DB3__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
-.set SCSI_In_DBx__DB3__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
-.set SCSI_In_DBx__DB3__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
-.set SCSI_In_DBx__DB3__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
-.set SCSI_In_DBx__DB3__PS, CYREG_PRT6_PS\r
-.set SCSI_In_DBx__DB3__SHIFT, 6\r
-.set SCSI_In_DBx__DB3__SLW, CYREG_PRT6_SLW\r
-.set SCSI_In_DBx__DB4__AG, CYREG_PRT12_AG\r
-.set SCSI_In_DBx__DB4__BIE, CYREG_PRT12_BIE\r
-.set SCSI_In_DBx__DB4__BIT_MASK, CYREG_PRT12_BIT_MASK\r
-.set SCSI_In_DBx__DB4__BYP, CYREG_PRT12_BYP\r
-.set SCSI_In_DBx__DB4__DM0, CYREG_PRT12_DM0\r
-.set SCSI_In_DBx__DB4__DM1, CYREG_PRT12_DM1\r
-.set SCSI_In_DBx__DB4__DM2, CYREG_PRT12_DM2\r
-.set SCSI_In_DBx__DB4__DR, CYREG_PRT12_DR\r
-.set SCSI_In_DBx__DB4__INP_DIS, CYREG_PRT12_INP_DIS\r
-.set SCSI_In_DBx__DB4__INTTYPE, CYREG_PICU12_INTTYPE5\r
-.set SCSI_In_DBx__DB4__MASK, 0x20\r
-.set SCSI_In_DBx__DB4__PC, CYREG_PRT12_PC5\r
-.set SCSI_In_DBx__DB4__PORT, 12\r
-.set SCSI_In_DBx__DB4__PRT, CYREG_PRT12_PRT\r
-.set SCSI_In_DBx__DB4__PRTDSI__DBL_SYNC_IN, CYREG_PRT12_DBL_SYNC_IN\r
-.set SCSI_In_DBx__DB4__PRTDSI__OE_SEL0, CYREG_PRT12_OE_SEL0\r
-.set SCSI_In_DBx__DB4__PRTDSI__OE_SEL1, CYREG_PRT12_OE_SEL1\r
-.set SCSI_In_DBx__DB4__PRTDSI__OUT_SEL0, CYREG_PRT12_OUT_SEL0\r
-.set SCSI_In_DBx__DB4__PRTDSI__OUT_SEL1, CYREG_PRT12_OUT_SEL1\r
-.set SCSI_In_DBx__DB4__PRTDSI__SYNC_OUT, CYREG_PRT12_SYNC_OUT\r
-.set SCSI_In_DBx__DB4__PS, CYREG_PRT12_PS\r
-.set SCSI_In_DBx__DB4__SHIFT, 5\r
-.set SCSI_In_DBx__DB4__SIO_CFG, CYREG_PRT12_SIO_CFG\r
-.set SCSI_In_DBx__DB4__SIO_DIFF, CYREG_PRT12_SIO_DIFF\r
-.set SCSI_In_DBx__DB4__SIO_HYST_EN, CYREG_PRT12_SIO_HYST_EN\r
-.set SCSI_In_DBx__DB4__SIO_REG_HIFREQ, CYREG_PRT12_SIO_REG_HIFREQ\r
-.set SCSI_In_DBx__DB4__SLW, CYREG_PRT12_SLW\r
-.set SCSI_In_DBx__DB5__AG, CYREG_PRT12_AG\r
-.set SCSI_In_DBx__DB5__BIE, CYREG_PRT12_BIE\r
-.set SCSI_In_DBx__DB5__BIT_MASK, CYREG_PRT12_BIT_MASK\r
-.set SCSI_In_DBx__DB5__BYP, CYREG_PRT12_BYP\r
-.set SCSI_In_DBx__DB5__DM0, CYREG_PRT12_DM0\r
-.set SCSI_In_DBx__DB5__DM1, CYREG_PRT12_DM1\r
-.set SCSI_In_DBx__DB5__DM2, CYREG_PRT12_DM2\r
-.set SCSI_In_DBx__DB5__DR, CYREG_PRT12_DR\r
-.set SCSI_In_DBx__DB5__INP_DIS, CYREG_PRT12_INP_DIS\r
-.set SCSI_In_DBx__DB5__INTTYPE, CYREG_PICU12_INTTYPE4\r
-.set SCSI_In_DBx__DB5__MASK, 0x10\r
-.set SCSI_In_DBx__DB5__PC, CYREG_PRT12_PC4\r
-.set SCSI_In_DBx__DB5__PORT, 12\r
-.set SCSI_In_DBx__DB5__PRT, CYREG_PRT12_PRT\r
-.set SCSI_In_DBx__DB5__PRTDSI__DBL_SYNC_IN, CYREG_PRT12_DBL_SYNC_IN\r
-.set SCSI_In_DBx__DB5__PRTDSI__OE_SEL0, CYREG_PRT12_OE_SEL0\r
-.set SCSI_In_DBx__DB5__PRTDSI__OE_SEL1, CYREG_PRT12_OE_SEL1\r
-.set SCSI_In_DBx__DB5__PRTDSI__OUT_SEL0, CYREG_PRT12_OUT_SEL0\r
-.set SCSI_In_DBx__DB5__PRTDSI__OUT_SEL1, CYREG_PRT12_OUT_SEL1\r
-.set SCSI_In_DBx__DB5__PRTDSI__SYNC_OUT, CYREG_PRT12_SYNC_OUT\r
-.set SCSI_In_DBx__DB5__PS, CYREG_PRT12_PS\r
-.set SCSI_In_DBx__DB5__SHIFT, 4\r
-.set SCSI_In_DBx__DB5__SIO_CFG, CYREG_PRT12_SIO_CFG\r
-.set SCSI_In_DBx__DB5__SIO_DIFF, CYREG_PRT12_SIO_DIFF\r
-.set SCSI_In_DBx__DB5__SIO_HYST_EN, CYREG_PRT12_SIO_HYST_EN\r
-.set SCSI_In_DBx__DB5__SIO_REG_HIFREQ, CYREG_PRT12_SIO_REG_HIFREQ\r
-.set SCSI_In_DBx__DB5__SLW, CYREG_PRT12_SLW\r
-.set SCSI_In_DBx__DB6__AG, CYREG_PRT2_AG\r
-.set SCSI_In_DBx__DB6__AMUX, CYREG_PRT2_AMUX\r
-.set SCSI_In_DBx__DB6__BIE, CYREG_PRT2_BIE\r
-.set SCSI_In_DBx__DB6__BIT_MASK, CYREG_PRT2_BIT_MASK\r
-.set SCSI_In_DBx__DB6__BYP, CYREG_PRT2_BYP\r
-.set SCSI_In_DBx__DB6__CTL, CYREG_PRT2_CTL\r
-.set SCSI_In_DBx__DB6__DM0, CYREG_PRT2_DM0\r
-.set SCSI_In_DBx__DB6__DM1, CYREG_PRT2_DM1\r
-.set SCSI_In_DBx__DB6__DM2, CYREG_PRT2_DM2\r
-.set SCSI_In_DBx__DB6__DR, CYREG_PRT2_DR\r
-.set SCSI_In_DBx__DB6__INP_DIS, CYREG_PRT2_INP_DIS\r
-.set SCSI_In_DBx__DB6__INTTYPE, CYREG_PICU2_INTTYPE5\r
-.set SCSI_In_DBx__DB6__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG\r
-.set SCSI_In_DBx__DB6__LCD_EN, CYREG_PRT2_LCD_EN\r
-.set SCSI_In_DBx__DB6__MASK, 0x20\r
-.set SCSI_In_DBx__DB6__PC, CYREG_PRT2_PC5\r
-.set SCSI_In_DBx__DB6__PORT, 2\r
-.set SCSI_In_DBx__DB6__PRT, CYREG_PRT2_PRT\r
-.set SCSI_In_DBx__DB6__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL\r
-.set SCSI_In_DBx__DB6__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN\r
-.set SCSI_In_DBx__DB6__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0\r
-.set SCSI_In_DBx__DB6__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1\r
-.set SCSI_In_DBx__DB6__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0\r
-.set SCSI_In_DBx__DB6__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1\r
-.set SCSI_In_DBx__DB6__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT\r
-.set SCSI_In_DBx__DB6__PS, CYREG_PRT2_PS\r
-.set SCSI_In_DBx__DB6__SHIFT, 5\r
-.set SCSI_In_DBx__DB6__SLW, CYREG_PRT2_SLW\r
-.set SCSI_In_DBx__DB7__AG, CYREG_PRT2_AG\r
-.set SCSI_In_DBx__DB7__AMUX, CYREG_PRT2_AMUX\r
-.set SCSI_In_DBx__DB7__BIE, CYREG_PRT2_BIE\r
-.set SCSI_In_DBx__DB7__BIT_MASK, CYREG_PRT2_BIT_MASK\r
-.set SCSI_In_DBx__DB7__BYP, CYREG_PRT2_BYP\r
-.set SCSI_In_DBx__DB7__CTL, CYREG_PRT2_CTL\r
-.set SCSI_In_DBx__DB7__DM0, CYREG_PRT2_DM0\r
-.set SCSI_In_DBx__DB7__DM1, CYREG_PRT2_DM1\r
-.set SCSI_In_DBx__DB7__DM2, CYREG_PRT2_DM2\r
-.set SCSI_In_DBx__DB7__DR, CYREG_PRT2_DR\r
-.set SCSI_In_DBx__DB7__INP_DIS, CYREG_PRT2_INP_DIS\r
-.set SCSI_In_DBx__DB7__INTTYPE, CYREG_PICU2_INTTYPE4\r
-.set SCSI_In_DBx__DB7__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG\r
-.set SCSI_In_DBx__DB7__LCD_EN, CYREG_PRT2_LCD_EN\r
-.set SCSI_In_DBx__DB7__MASK, 0x10\r
-.set SCSI_In_DBx__DB7__PC, CYREG_PRT2_PC4\r
-.set SCSI_In_DBx__DB7__PORT, 2\r
-.set SCSI_In_DBx__DB7__PRT, CYREG_PRT2_PRT\r
-.set SCSI_In_DBx__DB7__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL\r
-.set SCSI_In_DBx__DB7__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN\r
-.set SCSI_In_DBx__DB7__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0\r
-.set SCSI_In_DBx__DB7__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1\r
-.set SCSI_In_DBx__DB7__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0\r
-.set SCSI_In_DBx__DB7__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1\r
-.set SCSI_In_DBx__DB7__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT\r
-.set SCSI_In_DBx__DB7__PS, CYREG_PRT2_PS\r
-.set SCSI_In_DBx__DB7__SHIFT, 4\r
-.set SCSI_In_DBx__DB7__SLW, CYREG_PRT2_SLW\r
-\r
-/* SCSI_Noise */\r
-.set SCSI_Noise__0__AG, CYREG_PRT2_AG\r
-.set SCSI_Noise__0__AMUX, CYREG_PRT2_AMUX\r
-.set SCSI_Noise__0__BIE, CYREG_PRT2_BIE\r
-.set SCSI_Noise__0__BIT_MASK, CYREG_PRT2_BIT_MASK\r
-.set SCSI_Noise__0__BYP, CYREG_PRT2_BYP\r
-.set SCSI_Noise__0__CTL, CYREG_PRT2_CTL\r
-.set SCSI_Noise__0__DM0, CYREG_PRT2_DM0\r
-.set SCSI_Noise__0__DM1, CYREG_PRT2_DM1\r
-.set SCSI_Noise__0__DM2, CYREG_PRT2_DM2\r
-.set SCSI_Noise__0__DR, CYREG_PRT2_DR\r
-.set SCSI_Noise__0__INP_DIS, CYREG_PRT2_INP_DIS\r
-.set SCSI_Noise__0__INTTYPE, CYREG_PICU2_INTTYPE0\r
-.set SCSI_Noise__0__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG\r
-.set SCSI_Noise__0__LCD_EN, CYREG_PRT2_LCD_EN\r
-.set SCSI_Noise__0__MASK, 0x01\r
-.set SCSI_Noise__0__PC, CYREG_PRT2_PC0\r
-.set SCSI_Noise__0__PORT, 2\r
-.set SCSI_Noise__0__PRT, CYREG_PRT2_PRT\r
-.set SCSI_Noise__0__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL\r
-.set SCSI_Noise__0__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN\r
-.set SCSI_Noise__0__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0\r
-.set SCSI_Noise__0__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1\r
-.set SCSI_Noise__0__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0\r
-.set SCSI_Noise__0__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1\r
-.set SCSI_Noise__0__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT\r
-.set SCSI_Noise__0__PS, CYREG_PRT2_PS\r
-.set SCSI_Noise__0__SHIFT, 0\r
-.set SCSI_Noise__0__SLW, CYREG_PRT2_SLW\r
-.set SCSI_Noise__1__AG, CYREG_PRT6_AG\r
-.set SCSI_Noise__1__AMUX, CYREG_PRT6_AMUX\r
-.set SCSI_Noise__1__BIE, CYREG_PRT6_BIE\r
-.set SCSI_Noise__1__BIT_MASK, CYREG_PRT6_BIT_MASK\r
-.set SCSI_Noise__1__BYP, CYREG_PRT6_BYP\r
-.set SCSI_Noise__1__CTL, CYREG_PRT6_CTL\r
-.set SCSI_Noise__1__DM0, CYREG_PRT6_DM0\r
-.set SCSI_Noise__1__DM1, CYREG_PRT6_DM1\r
-.set SCSI_Noise__1__DM2, CYREG_PRT6_DM2\r
-.set SCSI_Noise__1__DR, CYREG_PRT6_DR\r
-.set SCSI_Noise__1__INP_DIS, CYREG_PRT6_INP_DIS\r
-.set SCSI_Noise__1__INTTYPE, CYREG_PICU6_INTTYPE3\r
-.set SCSI_Noise__1__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
-.set SCSI_Noise__1__LCD_EN, CYREG_PRT6_LCD_EN\r
-.set SCSI_Noise__1__MASK, 0x08\r
-.set SCSI_Noise__1__PC, CYREG_PRT6_PC3\r
-.set SCSI_Noise__1__PORT, 6\r
-.set SCSI_Noise__1__PRT, CYREG_PRT6_PRT\r
-.set SCSI_Noise__1__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
-.set SCSI_Noise__1__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
-.set SCSI_Noise__1__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
-.set SCSI_Noise__1__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
-.set SCSI_Noise__1__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
-.set SCSI_Noise__1__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
-.set SCSI_Noise__1__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
-.set SCSI_Noise__1__PS, CYREG_PRT6_PS\r
-.set SCSI_Noise__1__SHIFT, 3\r
-.set SCSI_Noise__1__SLW, CYREG_PRT6_SLW\r
-.set SCSI_Noise__2__AG, CYREG_PRT4_AG\r
-.set SCSI_Noise__2__AMUX, CYREG_PRT4_AMUX\r
-.set SCSI_Noise__2__BIE, CYREG_PRT4_BIE\r
-.set SCSI_Noise__2__BIT_MASK, CYREG_PRT4_BIT_MASK\r
-.set SCSI_Noise__2__BYP, CYREG_PRT4_BYP\r
-.set SCSI_Noise__2__CTL, CYREG_PRT4_CTL\r
-.set SCSI_Noise__2__DM0, CYREG_PRT4_DM0\r
-.set SCSI_Noise__2__DM1, CYREG_PRT4_DM1\r
-.set SCSI_Noise__2__DM2, CYREG_PRT4_DM2\r
-.set SCSI_Noise__2__DR, CYREG_PRT4_DR\r
-.set SCSI_Noise__2__INP_DIS, CYREG_PRT4_INP_DIS\r
-.set SCSI_Noise__2__INTTYPE, CYREG_PICU4_INTTYPE3\r
-.set SCSI_Noise__2__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
-.set SCSI_Noise__2__LCD_EN, CYREG_PRT4_LCD_EN\r
-.set SCSI_Noise__2__MASK, 0x08\r
-.set SCSI_Noise__2__PC, CYREG_PRT4_PC3\r
-.set SCSI_Noise__2__PORT, 4\r
-.set SCSI_Noise__2__PRT, CYREG_PRT4_PRT\r
-.set SCSI_Noise__2__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
-.set SCSI_Noise__2__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
-.set SCSI_Noise__2__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
-.set SCSI_Noise__2__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
-.set SCSI_Noise__2__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
-.set SCSI_Noise__2__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
-.set SCSI_Noise__2__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
-.set SCSI_Noise__2__PS, CYREG_PRT4_PS\r
-.set SCSI_Noise__2__SHIFT, 3\r
-.set SCSI_Noise__2__SLW, CYREG_PRT4_SLW\r
-.set SCSI_Noise__3__AG, CYREG_PRT4_AG\r
-.set SCSI_Noise__3__AMUX, CYREG_PRT4_AMUX\r
-.set SCSI_Noise__3__BIE, CYREG_PRT4_BIE\r
-.set SCSI_Noise__3__BIT_MASK, CYREG_PRT4_BIT_MASK\r
-.set SCSI_Noise__3__BYP, CYREG_PRT4_BYP\r
-.set SCSI_Noise__3__CTL, CYREG_PRT4_CTL\r
-.set SCSI_Noise__3__DM0, CYREG_PRT4_DM0\r
-.set SCSI_Noise__3__DM1, CYREG_PRT4_DM1\r
-.set SCSI_Noise__3__DM2, CYREG_PRT4_DM2\r
-.set SCSI_Noise__3__DR, CYREG_PRT4_DR\r
-.set SCSI_Noise__3__INP_DIS, CYREG_PRT4_INP_DIS\r
-.set SCSI_Noise__3__INTTYPE, CYREG_PICU4_INTTYPE7\r
-.set SCSI_Noise__3__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
-.set SCSI_Noise__3__LCD_EN, CYREG_PRT4_LCD_EN\r
-.set SCSI_Noise__3__MASK, 0x80\r
-.set SCSI_Noise__3__PC, CYREG_PRT4_PC7\r
-.set SCSI_Noise__3__PORT, 4\r
-.set SCSI_Noise__3__PRT, CYREG_PRT4_PRT\r
-.set SCSI_Noise__3__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
-.set SCSI_Noise__3__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
-.set SCSI_Noise__3__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
-.set SCSI_Noise__3__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
-.set SCSI_Noise__3__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
-.set SCSI_Noise__3__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
-.set SCSI_Noise__3__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
-.set SCSI_Noise__3__PS, CYREG_PRT4_PS\r
-.set SCSI_Noise__3__SHIFT, 7\r
-.set SCSI_Noise__3__SLW, CYREG_PRT4_SLW\r
-.set SCSI_Noise__4__AG, CYREG_PRT6_AG\r
-.set SCSI_Noise__4__AMUX, CYREG_PRT6_AMUX\r
-.set SCSI_Noise__4__BIE, CYREG_PRT6_BIE\r
-.set SCSI_Noise__4__BIT_MASK, CYREG_PRT6_BIT_MASK\r
-.set SCSI_Noise__4__BYP, CYREG_PRT6_BYP\r
-.set SCSI_Noise__4__CTL, CYREG_PRT6_CTL\r
-.set SCSI_Noise__4__DM0, CYREG_PRT6_DM0\r
-.set SCSI_Noise__4__DM1, CYREG_PRT6_DM1\r
-.set SCSI_Noise__4__DM2, CYREG_PRT6_DM2\r
-.set SCSI_Noise__4__DR, CYREG_PRT6_DR\r
-.set SCSI_Noise__4__INP_DIS, CYREG_PRT6_INP_DIS\r
-.set SCSI_Noise__4__INTTYPE, CYREG_PICU6_INTTYPE2\r
-.set SCSI_Noise__4__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
-.set SCSI_Noise__4__LCD_EN, CYREG_PRT6_LCD_EN\r
-.set SCSI_Noise__4__MASK, 0x04\r
-.set SCSI_Noise__4__PC, CYREG_PRT6_PC2\r
-.set SCSI_Noise__4__PORT, 6\r
-.set SCSI_Noise__4__PRT, CYREG_PRT6_PRT\r
-.set SCSI_Noise__4__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
-.set SCSI_Noise__4__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
-.set SCSI_Noise__4__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
-.set SCSI_Noise__4__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
-.set SCSI_Noise__4__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
-.set SCSI_Noise__4__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
-.set SCSI_Noise__4__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
-.set SCSI_Noise__4__PS, CYREG_PRT6_PS\r
-.set SCSI_Noise__4__SHIFT, 2\r
-.set SCSI_Noise__4__SLW, CYREG_PRT6_SLW\r
-.set SCSI_Noise__ACK__AG, CYREG_PRT6_AG\r
-.set SCSI_Noise__ACK__AMUX, CYREG_PRT6_AMUX\r
-.set SCSI_Noise__ACK__BIE, CYREG_PRT6_BIE\r
-.set SCSI_Noise__ACK__BIT_MASK, CYREG_PRT6_BIT_MASK\r
-.set SCSI_Noise__ACK__BYP, CYREG_PRT6_BYP\r
-.set SCSI_Noise__ACK__CTL, CYREG_PRT6_CTL\r
-.set SCSI_Noise__ACK__DM0, CYREG_PRT6_DM0\r
-.set SCSI_Noise__ACK__DM1, CYREG_PRT6_DM1\r
-.set SCSI_Noise__ACK__DM2, CYREG_PRT6_DM2\r
-.set SCSI_Noise__ACK__DR, CYREG_PRT6_DR\r
-.set SCSI_Noise__ACK__INP_DIS, CYREG_PRT6_INP_DIS\r
-.set SCSI_Noise__ACK__INTTYPE, CYREG_PICU6_INTTYPE2\r
-.set SCSI_Noise__ACK__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
-.set SCSI_Noise__ACK__LCD_EN, CYREG_PRT6_LCD_EN\r
-.set SCSI_Noise__ACK__MASK, 0x04\r
-.set SCSI_Noise__ACK__PC, CYREG_PRT6_PC2\r
-.set SCSI_Noise__ACK__PORT, 6\r
-.set SCSI_Noise__ACK__PRT, CYREG_PRT6_PRT\r
-.set SCSI_Noise__ACK__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
-.set SCSI_Noise__ACK__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
-.set SCSI_Noise__ACK__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
-.set SCSI_Noise__ACK__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
-.set SCSI_Noise__ACK__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
-.set SCSI_Noise__ACK__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
-.set SCSI_Noise__ACK__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
-.set SCSI_Noise__ACK__PS, CYREG_PRT6_PS\r
-.set SCSI_Noise__ACK__SHIFT, 2\r
-.set SCSI_Noise__ACK__SLW, CYREG_PRT6_SLW\r
-.set SCSI_Noise__ATN__AG, CYREG_PRT2_AG\r
-.set SCSI_Noise__ATN__AMUX, CYREG_PRT2_AMUX\r
-.set SCSI_Noise__ATN__BIE, CYREG_PRT2_BIE\r
-.set SCSI_Noise__ATN__BIT_MASK, CYREG_PRT2_BIT_MASK\r
-.set SCSI_Noise__ATN__BYP, CYREG_PRT2_BYP\r
-.set SCSI_Noise__ATN__CTL, CYREG_PRT2_CTL\r
-.set SCSI_Noise__ATN__DM0, CYREG_PRT2_DM0\r
-.set SCSI_Noise__ATN__DM1, CYREG_PRT2_DM1\r
-.set SCSI_Noise__ATN__DM2, CYREG_PRT2_DM2\r
-.set SCSI_Noise__ATN__DR, CYREG_PRT2_DR\r
-.set SCSI_Noise__ATN__INP_DIS, CYREG_PRT2_INP_DIS\r
-.set SCSI_Noise__ATN__INTTYPE, CYREG_PICU2_INTTYPE0\r
-.set SCSI_Noise__ATN__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG\r
-.set SCSI_Noise__ATN__LCD_EN, CYREG_PRT2_LCD_EN\r
-.set SCSI_Noise__ATN__MASK, 0x01\r
-.set SCSI_Noise__ATN__PC, CYREG_PRT2_PC0\r
-.set SCSI_Noise__ATN__PORT, 2\r
-.set SCSI_Noise__ATN__PRT, CYREG_PRT2_PRT\r
-.set SCSI_Noise__ATN__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL\r
-.set SCSI_Noise__ATN__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN\r
-.set SCSI_Noise__ATN__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0\r
-.set SCSI_Noise__ATN__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1\r
-.set SCSI_Noise__ATN__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0\r
-.set SCSI_Noise__ATN__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1\r
-.set SCSI_Noise__ATN__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT\r
-.set SCSI_Noise__ATN__PS, CYREG_PRT2_PS\r
-.set SCSI_Noise__ATN__SHIFT, 0\r
-.set SCSI_Noise__ATN__SLW, CYREG_PRT2_SLW\r
-.set SCSI_Noise__BSY__AG, CYREG_PRT6_AG\r
-.set SCSI_Noise__BSY__AMUX, CYREG_PRT6_AMUX\r
-.set SCSI_Noise__BSY__BIE, CYREG_PRT6_BIE\r
-.set SCSI_Noise__BSY__BIT_MASK, CYREG_PRT6_BIT_MASK\r
-.set SCSI_Noise__BSY__BYP, CYREG_PRT6_BYP\r
-.set SCSI_Noise__BSY__CTL, CYREG_PRT6_CTL\r
-.set SCSI_Noise__BSY__DM0, CYREG_PRT6_DM0\r
-.set SCSI_Noise__BSY__DM1, CYREG_PRT6_DM1\r
-.set SCSI_Noise__BSY__DM2, CYREG_PRT6_DM2\r
-.set SCSI_Noise__BSY__DR, CYREG_PRT6_DR\r
-.set SCSI_Noise__BSY__INP_DIS, CYREG_PRT6_INP_DIS\r
-.set SCSI_Noise__BSY__INTTYPE, CYREG_PICU6_INTTYPE3\r
-.set SCSI_Noise__BSY__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
-.set SCSI_Noise__BSY__LCD_EN, CYREG_PRT6_LCD_EN\r
-.set SCSI_Noise__BSY__MASK, 0x08\r
-.set SCSI_Noise__BSY__PC, CYREG_PRT6_PC3\r
-.set SCSI_Noise__BSY__PORT, 6\r
-.set SCSI_Noise__BSY__PRT, CYREG_PRT6_PRT\r
-.set SCSI_Noise__BSY__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
-.set SCSI_Noise__BSY__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
-.set SCSI_Noise__BSY__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
-.set SCSI_Noise__BSY__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
-.set SCSI_Noise__BSY__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
-.set SCSI_Noise__BSY__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
-.set SCSI_Noise__BSY__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
-.set SCSI_Noise__BSY__PS, CYREG_PRT6_PS\r
-.set SCSI_Noise__BSY__SHIFT, 3\r
-.set SCSI_Noise__BSY__SLW, CYREG_PRT6_SLW\r
-.set SCSI_Noise__RST__AG, CYREG_PRT4_AG\r
-.set SCSI_Noise__RST__AMUX, CYREG_PRT4_AMUX\r
-.set SCSI_Noise__RST__BIE, CYREG_PRT4_BIE\r
-.set SCSI_Noise__RST__BIT_MASK, CYREG_PRT4_BIT_MASK\r
-.set SCSI_Noise__RST__BYP, CYREG_PRT4_BYP\r
-.set SCSI_Noise__RST__CTL, CYREG_PRT4_CTL\r
-.set SCSI_Noise__RST__DM0, CYREG_PRT4_DM0\r
-.set SCSI_Noise__RST__DM1, CYREG_PRT4_DM1\r
-.set SCSI_Noise__RST__DM2, CYREG_PRT4_DM2\r
-.set SCSI_Noise__RST__DR, CYREG_PRT4_DR\r
-.set SCSI_Noise__RST__INP_DIS, CYREG_PRT4_INP_DIS\r
-.set SCSI_Noise__RST__INTTYPE, CYREG_PICU4_INTTYPE7\r
-.set SCSI_Noise__RST__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
-.set SCSI_Noise__RST__LCD_EN, CYREG_PRT4_LCD_EN\r
-.set SCSI_Noise__RST__MASK, 0x80\r
-.set SCSI_Noise__RST__PC, CYREG_PRT4_PC7\r
-.set SCSI_Noise__RST__PORT, 4\r
-.set SCSI_Noise__RST__PRT, CYREG_PRT4_PRT\r
-.set SCSI_Noise__RST__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
-.set SCSI_Noise__RST__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
-.set SCSI_Noise__RST__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
-.set SCSI_Noise__RST__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
-.set SCSI_Noise__RST__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
-.set SCSI_Noise__RST__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
-.set SCSI_Noise__RST__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
-.set SCSI_Noise__RST__PS, CYREG_PRT4_PS\r
-.set SCSI_Noise__RST__SHIFT, 7\r
-.set SCSI_Noise__RST__SLW, CYREG_PRT4_SLW\r
-.set SCSI_Noise__SEL__AG, CYREG_PRT4_AG\r
-.set SCSI_Noise__SEL__AMUX, CYREG_PRT4_AMUX\r
-.set SCSI_Noise__SEL__BIE, CYREG_PRT4_BIE\r
-.set SCSI_Noise__SEL__BIT_MASK, CYREG_PRT4_BIT_MASK\r
-.set SCSI_Noise__SEL__BYP, CYREG_PRT4_BYP\r
-.set SCSI_Noise__SEL__CTL, CYREG_PRT4_CTL\r
-.set SCSI_Noise__SEL__DM0, CYREG_PRT4_DM0\r
-.set SCSI_Noise__SEL__DM1, CYREG_PRT4_DM1\r
-.set SCSI_Noise__SEL__DM2, CYREG_PRT4_DM2\r
-.set SCSI_Noise__SEL__DR, CYREG_PRT4_DR\r
-.set SCSI_Noise__SEL__INP_DIS, CYREG_PRT4_INP_DIS\r
-.set SCSI_Noise__SEL__INTTYPE, CYREG_PICU4_INTTYPE3\r
-.set SCSI_Noise__SEL__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
-.set SCSI_Noise__SEL__LCD_EN, CYREG_PRT4_LCD_EN\r
-.set SCSI_Noise__SEL__MASK, 0x08\r
-.set SCSI_Noise__SEL__PC, CYREG_PRT4_PC3\r
-.set SCSI_Noise__SEL__PORT, 4\r
-.set SCSI_Noise__SEL__PRT, CYREG_PRT4_PRT\r
-.set SCSI_Noise__SEL__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
-.set SCSI_Noise__SEL__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
-.set SCSI_Noise__SEL__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
-.set SCSI_Noise__SEL__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
-.set SCSI_Noise__SEL__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
-.set SCSI_Noise__SEL__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
-.set SCSI_Noise__SEL__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
-.set SCSI_Noise__SEL__PS, CYREG_PRT4_PS\r
-.set SCSI_Noise__SEL__SHIFT, 3\r
-.set SCSI_Noise__SEL__SLW, CYREG_PRT4_SLW\r
-\r
-/* SCSI_Out */\r
-.set SCSI_Out__0__AG, CYREG_PRT15_AG\r
-.set SCSI_Out__0__AMUX, CYREG_PRT15_AMUX\r
-.set SCSI_Out__0__BIE, CYREG_PRT15_BIE\r
-.set SCSI_Out__0__BIT_MASK, CYREG_PRT15_BIT_MASK\r
-.set SCSI_Out__0__BYP, CYREG_PRT15_BYP\r
-.set SCSI_Out__0__CTL, CYREG_PRT15_CTL\r
-.set SCSI_Out__0__DM0, CYREG_PRT15_DM0\r
-.set SCSI_Out__0__DM1, CYREG_PRT15_DM1\r
-.set SCSI_Out__0__DM2, CYREG_PRT15_DM2\r
-.set SCSI_Out__0__DR, CYREG_PRT15_DR\r
-.set SCSI_Out__0__INP_DIS, CYREG_PRT15_INP_DIS\r
-.set SCSI_Out__0__INTTYPE, CYREG_PICU15_INTTYPE5\r
-.set SCSI_Out__0__LCD_COM_SEG, CYREG_PRT15_LCD_COM_SEG\r
-.set SCSI_Out__0__LCD_EN, CYREG_PRT15_LCD_EN\r
-.set SCSI_Out__0__MASK, 0x20\r
-.set SCSI_Out__0__PC, CYREG_IO_PC_PRT15_PC5\r
-.set SCSI_Out__0__PORT, 15\r
-.set SCSI_Out__0__PRT, CYREG_PRT15_PRT\r
-.set SCSI_Out__0__PRTDSI__CAPS_SEL, CYREG_PRT15_CAPS_SEL\r
-.set SCSI_Out__0__PRTDSI__DBL_SYNC_IN, CYREG_PRT15_DBL_SYNC_IN\r
-.set SCSI_Out__0__PRTDSI__OE_SEL0, CYREG_PRT15_OE_SEL0\r
-.set SCSI_Out__0__PRTDSI__OE_SEL1, CYREG_PRT15_OE_SEL1\r
-.set SCSI_Out__0__PRTDSI__OUT_SEL0, CYREG_PRT15_OUT_SEL0\r
-.set SCSI_Out__0__PRTDSI__OUT_SEL1, CYREG_PRT15_OUT_SEL1\r
-.set SCSI_Out__0__PRTDSI__SYNC_OUT, CYREG_PRT15_SYNC_OUT\r
-.set SCSI_Out__0__PS, CYREG_PRT15_PS\r
-.set SCSI_Out__0__SHIFT, 5\r
-.set SCSI_Out__0__SLW, CYREG_PRT15_SLW\r
-.set SCSI_Out__1__AG, CYREG_PRT15_AG\r
-.set SCSI_Out__1__AMUX, CYREG_PRT15_AMUX\r
-.set SCSI_Out__1__BIE, CYREG_PRT15_BIE\r
-.set SCSI_Out__1__BIT_MASK, CYREG_PRT15_BIT_MASK\r
-.set SCSI_Out__1__BYP, CYREG_PRT15_BYP\r
-.set SCSI_Out__1__CTL, CYREG_PRT15_CTL\r
-.set SCSI_Out__1__DM0, CYREG_PRT15_DM0\r
-.set SCSI_Out__1__DM1, CYREG_PRT15_DM1\r
-.set SCSI_Out__1__DM2, CYREG_PRT15_DM2\r
-.set SCSI_Out__1__DR, CYREG_PRT15_DR\r
-.set SCSI_Out__1__INP_DIS, CYREG_PRT15_INP_DIS\r
-.set SCSI_Out__1__INTTYPE, CYREG_PICU15_INTTYPE4\r
-.set SCSI_Out__1__LCD_COM_SEG, CYREG_PRT15_LCD_COM_SEG\r
-.set SCSI_Out__1__LCD_EN, CYREG_PRT15_LCD_EN\r
-.set SCSI_Out__1__MASK, 0x10\r
-.set SCSI_Out__1__PC, CYREG_IO_PC_PRT15_PC4\r
-.set SCSI_Out__1__PORT, 15\r
-.set SCSI_Out__1__PRT, CYREG_PRT15_PRT\r
-.set SCSI_Out__1__PRTDSI__CAPS_SEL, CYREG_PRT15_CAPS_SEL\r
-.set SCSI_Out__1__PRTDSI__DBL_SYNC_IN, CYREG_PRT15_DBL_SYNC_IN\r
-.set SCSI_Out__1__PRTDSI__OE_SEL0, CYREG_PRT15_OE_SEL0\r
-.set SCSI_Out__1__PRTDSI__OE_SEL1, CYREG_PRT15_OE_SEL1\r
-.set SCSI_Out__1__PRTDSI__OUT_SEL0, CYREG_PRT15_OUT_SEL0\r
-.set SCSI_Out__1__PRTDSI__OUT_SEL1, CYREG_PRT15_OUT_SEL1\r
-.set SCSI_Out__1__PRTDSI__SYNC_OUT, CYREG_PRT15_SYNC_OUT\r
-.set SCSI_Out__1__PS, CYREG_PRT15_PS\r
-.set SCSI_Out__1__SHIFT, 4\r
-.set SCSI_Out__1__SLW, CYREG_PRT15_SLW\r
-.set SCSI_Out__2__AG, CYREG_PRT6_AG\r
-.set SCSI_Out__2__AMUX, CYREG_PRT6_AMUX\r
-.set SCSI_Out__2__BIE, CYREG_PRT6_BIE\r
-.set SCSI_Out__2__BIT_MASK, CYREG_PRT6_BIT_MASK\r
-.set SCSI_Out__2__BYP, CYREG_PRT6_BYP\r
-.set SCSI_Out__2__CTL, CYREG_PRT6_CTL\r
-.set SCSI_Out__2__DM0, CYREG_PRT6_DM0\r
-.set SCSI_Out__2__DM1, CYREG_PRT6_DM1\r
-.set SCSI_Out__2__DM2, CYREG_PRT6_DM2\r
-.set SCSI_Out__2__DR, CYREG_PRT6_DR\r
-.set SCSI_Out__2__INP_DIS, CYREG_PRT6_INP_DIS\r
-.set SCSI_Out__2__INTTYPE, CYREG_PICU6_INTTYPE1\r
-.set SCSI_Out__2__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
-.set SCSI_Out__2__LCD_EN, CYREG_PRT6_LCD_EN\r
-.set SCSI_Out__2__MASK, 0x02\r
-.set SCSI_Out__2__PC, CYREG_PRT6_PC1\r
-.set SCSI_Out__2__PORT, 6\r
-.set SCSI_Out__2__PRT, CYREG_PRT6_PRT\r
-.set SCSI_Out__2__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
-.set SCSI_Out__2__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
-.set SCSI_Out__2__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
-.set SCSI_Out__2__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
-.set SCSI_Out__2__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
-.set SCSI_Out__2__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
-.set SCSI_Out__2__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
-.set SCSI_Out__2__PS, CYREG_PRT6_PS\r
-.set SCSI_Out__2__SHIFT, 1\r
-.set SCSI_Out__2__SLW, CYREG_PRT6_SLW\r
-.set SCSI_Out__3__AG, CYREG_PRT6_AG\r
-.set SCSI_Out__3__AMUX, CYREG_PRT6_AMUX\r
-.set SCSI_Out__3__BIE, CYREG_PRT6_BIE\r
-.set SCSI_Out__3__BIT_MASK, CYREG_PRT6_BIT_MASK\r
-.set SCSI_Out__3__BYP, CYREG_PRT6_BYP\r
-.set SCSI_Out__3__CTL, CYREG_PRT6_CTL\r
-.set SCSI_Out__3__DM0, CYREG_PRT6_DM0\r
-.set SCSI_Out__3__DM1, CYREG_PRT6_DM1\r
-.set SCSI_Out__3__DM2, CYREG_PRT6_DM2\r
-.set SCSI_Out__3__DR, CYREG_PRT6_DR\r
-.set SCSI_Out__3__INP_DIS, CYREG_PRT6_INP_DIS\r
-.set SCSI_Out__3__INTTYPE, CYREG_PICU6_INTTYPE0\r
-.set SCSI_Out__3__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
-.set SCSI_Out__3__LCD_EN, CYREG_PRT6_LCD_EN\r
-.set SCSI_Out__3__MASK, 0x01\r
-.set SCSI_Out__3__PC, CYREG_PRT6_PC0\r
-.set SCSI_Out__3__PORT, 6\r
-.set SCSI_Out__3__PRT, CYREG_PRT6_PRT\r
-.set SCSI_Out__3__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
-.set SCSI_Out__3__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
-.set SCSI_Out__3__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
-.set SCSI_Out__3__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
-.set SCSI_Out__3__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
-.set SCSI_Out__3__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
-.set SCSI_Out__3__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
-.set SCSI_Out__3__PS, CYREG_PRT6_PS\r
-.set SCSI_Out__3__SHIFT, 0\r
-.set SCSI_Out__3__SLW, CYREG_PRT6_SLW\r
-.set SCSI_Out__4__AG, CYREG_PRT4_AG\r
-.set SCSI_Out__4__AMUX, CYREG_PRT4_AMUX\r
-.set SCSI_Out__4__BIE, CYREG_PRT4_BIE\r
-.set SCSI_Out__4__BIT_MASK, CYREG_PRT4_BIT_MASK\r
-.set SCSI_Out__4__BYP, CYREG_PRT4_BYP\r
-.set SCSI_Out__4__CTL, CYREG_PRT4_CTL\r
-.set SCSI_Out__4__DM0, CYREG_PRT4_DM0\r
-.set SCSI_Out__4__DM1, CYREG_PRT4_DM1\r
-.set SCSI_Out__4__DM2, CYREG_PRT4_DM2\r
-.set SCSI_Out__4__DR, CYREG_PRT4_DR\r
-.set SCSI_Out__4__INP_DIS, CYREG_PRT4_INP_DIS\r
-.set SCSI_Out__4__INTTYPE, CYREG_PICU4_INTTYPE5\r
-.set SCSI_Out__4__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
-.set SCSI_Out__4__LCD_EN, CYREG_PRT4_LCD_EN\r
-.set SCSI_Out__4__MASK, 0x20\r
-.set SCSI_Out__4__PC, CYREG_PRT4_PC5\r
-.set SCSI_Out__4__PORT, 4\r
-.set SCSI_Out__4__PRT, CYREG_PRT4_PRT\r
-.set SCSI_Out__4__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
-.set SCSI_Out__4__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
-.set SCSI_Out__4__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
-.set SCSI_Out__4__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
-.set SCSI_Out__4__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
-.set SCSI_Out__4__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
-.set SCSI_Out__4__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
-.set SCSI_Out__4__PS, CYREG_PRT4_PS\r
-.set SCSI_Out__4__SHIFT, 5\r
-.set SCSI_Out__4__SLW, CYREG_PRT4_SLW\r
-.set SCSI_Out__5__AG, CYREG_PRT4_AG\r
-.set SCSI_Out__5__AMUX, CYREG_PRT4_AMUX\r
-.set SCSI_Out__5__BIE, CYREG_PRT4_BIE\r
-.set SCSI_Out__5__BIT_MASK, CYREG_PRT4_BIT_MASK\r
-.set SCSI_Out__5__BYP, CYREG_PRT4_BYP\r
-.set SCSI_Out__5__CTL, CYREG_PRT4_CTL\r
-.set SCSI_Out__5__DM0, CYREG_PRT4_DM0\r
-.set SCSI_Out__5__DM1, CYREG_PRT4_DM1\r
-.set SCSI_Out__5__DM2, CYREG_PRT4_DM2\r
-.set SCSI_Out__5__DR, CYREG_PRT4_DR\r
-.set SCSI_Out__5__INP_DIS, CYREG_PRT4_INP_DIS\r
-.set SCSI_Out__5__INTTYPE, CYREG_PICU4_INTTYPE4\r
-.set SCSI_Out__5__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
-.set SCSI_Out__5__LCD_EN, CYREG_PRT4_LCD_EN\r
-.set SCSI_Out__5__MASK, 0x10\r
-.set SCSI_Out__5__PC, CYREG_PRT4_PC4\r
-.set SCSI_Out__5__PORT, 4\r
-.set SCSI_Out__5__PRT, CYREG_PRT4_PRT\r
-.set SCSI_Out__5__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
-.set SCSI_Out__5__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
-.set SCSI_Out__5__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
-.set SCSI_Out__5__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
-.set SCSI_Out__5__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
-.set SCSI_Out__5__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
-.set SCSI_Out__5__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
-.set SCSI_Out__5__PS, CYREG_PRT4_PS\r
-.set SCSI_Out__5__SHIFT, 4\r
-.set SCSI_Out__5__SLW, CYREG_PRT4_SLW\r
-.set SCSI_Out__6__AG, CYREG_PRT0_AG\r
-.set SCSI_Out__6__AMUX, CYREG_PRT0_AMUX\r
-.set SCSI_Out__6__BIE, CYREG_PRT0_BIE\r
-.set SCSI_Out__6__BIT_MASK, CYREG_PRT0_BIT_MASK\r
-.set SCSI_Out__6__BYP, CYREG_PRT0_BYP\r
-.set SCSI_Out__6__CTL, CYREG_PRT0_CTL\r
-.set SCSI_Out__6__DM0, CYREG_PRT0_DM0\r
-.set SCSI_Out__6__DM1, CYREG_PRT0_DM1\r
-.set SCSI_Out__6__DM2, CYREG_PRT0_DM2\r
-.set SCSI_Out__6__DR, CYREG_PRT0_DR\r
-.set SCSI_Out__6__INP_DIS, CYREG_PRT0_INP_DIS\r
-.set SCSI_Out__6__INTTYPE, CYREG_PICU0_INTTYPE7\r
-.set SCSI_Out__6__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
-.set SCSI_Out__6__LCD_EN, CYREG_PRT0_LCD_EN\r
-.set SCSI_Out__6__MASK, 0x80\r
-.set SCSI_Out__6__PC, CYREG_PRT0_PC7\r
-.set SCSI_Out__6__PORT, 0\r
-.set SCSI_Out__6__PRT, CYREG_PRT0_PRT\r
-.set SCSI_Out__6__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
-.set SCSI_Out__6__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
-.set SCSI_Out__6__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
-.set SCSI_Out__6__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
-.set SCSI_Out__6__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
-.set SCSI_Out__6__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
-.set SCSI_Out__6__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
-.set SCSI_Out__6__PS, CYREG_PRT0_PS\r
-.set SCSI_Out__6__SHIFT, 7\r
-.set SCSI_Out__6__SLW, CYREG_PRT0_SLW\r
-.set SCSI_Out__7__AG, CYREG_PRT0_AG\r
-.set SCSI_Out__7__AMUX, CYREG_PRT0_AMUX\r
-.set SCSI_Out__7__BIE, CYREG_PRT0_BIE\r
-.set SCSI_Out__7__BIT_MASK, CYREG_PRT0_BIT_MASK\r
-.set SCSI_Out__7__BYP, CYREG_PRT0_BYP\r
-.set SCSI_Out__7__CTL, CYREG_PRT0_CTL\r
-.set SCSI_Out__7__DM0, CYREG_PRT0_DM0\r
-.set SCSI_Out__7__DM1, CYREG_PRT0_DM1\r
-.set SCSI_Out__7__DM2, CYREG_PRT0_DM2\r
-.set SCSI_Out__7__DR, CYREG_PRT0_DR\r
-.set SCSI_Out__7__INP_DIS, CYREG_PRT0_INP_DIS\r
-.set SCSI_Out__7__INTTYPE, CYREG_PICU0_INTTYPE6\r
-.set SCSI_Out__7__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
-.set SCSI_Out__7__LCD_EN, CYREG_PRT0_LCD_EN\r
-.set SCSI_Out__7__MASK, 0x40\r
-.set SCSI_Out__7__PC, CYREG_PRT0_PC6\r
-.set SCSI_Out__7__PORT, 0\r
-.set SCSI_Out__7__PRT, CYREG_PRT0_PRT\r
-.set SCSI_Out__7__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
-.set SCSI_Out__7__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
-.set SCSI_Out__7__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
-.set SCSI_Out__7__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
-.set SCSI_Out__7__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
-.set SCSI_Out__7__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
-.set SCSI_Out__7__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
-.set SCSI_Out__7__PS, CYREG_PRT0_PS\r
-.set SCSI_Out__7__SHIFT, 6\r
-.set SCSI_Out__7__SLW, CYREG_PRT0_SLW\r
-.set SCSI_Out__8__AG, CYREG_PRT0_AG\r
-.set SCSI_Out__8__AMUX, CYREG_PRT0_AMUX\r
-.set SCSI_Out__8__BIE, CYREG_PRT0_BIE\r
-.set SCSI_Out__8__BIT_MASK, CYREG_PRT0_BIT_MASK\r
-.set SCSI_Out__8__BYP, CYREG_PRT0_BYP\r
-.set SCSI_Out__8__CTL, CYREG_PRT0_CTL\r
-.set SCSI_Out__8__DM0, CYREG_PRT0_DM0\r
-.set SCSI_Out__8__DM1, CYREG_PRT0_DM1\r
-.set SCSI_Out__8__DM2, CYREG_PRT0_DM2\r
-.set SCSI_Out__8__DR, CYREG_PRT0_DR\r
-.set SCSI_Out__8__INP_DIS, CYREG_PRT0_INP_DIS\r
-.set SCSI_Out__8__INTTYPE, CYREG_PICU0_INTTYPE3\r
-.set SCSI_Out__8__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
-.set SCSI_Out__8__LCD_EN, CYREG_PRT0_LCD_EN\r
-.set SCSI_Out__8__MASK, 0x08\r
-.set SCSI_Out__8__PC, CYREG_PRT0_PC3\r
-.set SCSI_Out__8__PORT, 0\r
-.set SCSI_Out__8__PRT, CYREG_PRT0_PRT\r
-.set SCSI_Out__8__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
-.set SCSI_Out__8__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
-.set SCSI_Out__8__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
-.set SCSI_Out__8__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
-.set SCSI_Out__8__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
-.set SCSI_Out__8__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
-.set SCSI_Out__8__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
-.set SCSI_Out__8__PS, CYREG_PRT0_PS\r
-.set SCSI_Out__8__SHIFT, 3\r
-.set SCSI_Out__8__SLW, CYREG_PRT0_SLW\r
-.set SCSI_Out__9__AG, CYREG_PRT0_AG\r
-.set SCSI_Out__9__AMUX, CYREG_PRT0_AMUX\r
-.set SCSI_Out__9__BIE, CYREG_PRT0_BIE\r
-.set SCSI_Out__9__BIT_MASK, CYREG_PRT0_BIT_MASK\r
-.set SCSI_Out__9__BYP, CYREG_PRT0_BYP\r
-.set SCSI_Out__9__CTL, CYREG_PRT0_CTL\r
-.set SCSI_Out__9__DM0, CYREG_PRT0_DM0\r
-.set SCSI_Out__9__DM1, CYREG_PRT0_DM1\r
-.set SCSI_Out__9__DM2, CYREG_PRT0_DM2\r
-.set SCSI_Out__9__DR, CYREG_PRT0_DR\r
-.set SCSI_Out__9__INP_DIS, CYREG_PRT0_INP_DIS\r
-.set SCSI_Out__9__INTTYPE, CYREG_PICU0_INTTYPE2\r
-.set SCSI_Out__9__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
-.set SCSI_Out__9__LCD_EN, CYREG_PRT0_LCD_EN\r
-.set SCSI_Out__9__MASK, 0x04\r
-.set SCSI_Out__9__PC, CYREG_PRT0_PC2\r
-.set SCSI_Out__9__PORT, 0\r
-.set SCSI_Out__9__PRT, CYREG_PRT0_PRT\r
-.set SCSI_Out__9__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
-.set SCSI_Out__9__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
-.set SCSI_Out__9__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
-.set SCSI_Out__9__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
-.set SCSI_Out__9__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
-.set SCSI_Out__9__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
-.set SCSI_Out__9__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
-.set SCSI_Out__9__PS, CYREG_PRT0_PS\r
-.set SCSI_Out__9__SHIFT, 2\r
-.set SCSI_Out__9__SLW, CYREG_PRT0_SLW\r
-.set SCSI_Out__ACK__AG, CYREG_PRT6_AG\r
-.set SCSI_Out__ACK__AMUX, CYREG_PRT6_AMUX\r
-.set SCSI_Out__ACK__BIE, CYREG_PRT6_BIE\r
-.set SCSI_Out__ACK__BIT_MASK, CYREG_PRT6_BIT_MASK\r
-.set SCSI_Out__ACK__BYP, CYREG_PRT6_BYP\r
-.set SCSI_Out__ACK__CTL, CYREG_PRT6_CTL\r
-.set SCSI_Out__ACK__DM0, CYREG_PRT6_DM0\r
-.set SCSI_Out__ACK__DM1, CYREG_PRT6_DM1\r
-.set SCSI_Out__ACK__DM2, CYREG_PRT6_DM2\r
-.set SCSI_Out__ACK__DR, CYREG_PRT6_DR\r
-.set SCSI_Out__ACK__INP_DIS, CYREG_PRT6_INP_DIS\r
-.set SCSI_Out__ACK__INTTYPE, CYREG_PICU6_INTTYPE0\r
-.set SCSI_Out__ACK__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
-.set SCSI_Out__ACK__LCD_EN, CYREG_PRT6_LCD_EN\r
-.set SCSI_Out__ACK__MASK, 0x01\r
-.set SCSI_Out__ACK__PC, CYREG_PRT6_PC0\r
-.set SCSI_Out__ACK__PORT, 6\r
-.set SCSI_Out__ACK__PRT, CYREG_PRT6_PRT\r
-.set SCSI_Out__ACK__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
-.set SCSI_Out__ACK__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
-.set SCSI_Out__ACK__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
-.set SCSI_Out__ACK__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
-.set SCSI_Out__ACK__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
-.set SCSI_Out__ACK__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
-.set SCSI_Out__ACK__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
-.set SCSI_Out__ACK__PS, CYREG_PRT6_PS\r
-.set SCSI_Out__ACK__SHIFT, 0\r
-.set SCSI_Out__ACK__SLW, CYREG_PRT6_SLW\r
-.set SCSI_Out__ATN__AG, CYREG_PRT15_AG\r
-.set SCSI_Out__ATN__AMUX, CYREG_PRT15_AMUX\r
-.set SCSI_Out__ATN__BIE, CYREG_PRT15_BIE\r
-.set SCSI_Out__ATN__BIT_MASK, CYREG_PRT15_BIT_MASK\r
-.set SCSI_Out__ATN__BYP, CYREG_PRT15_BYP\r
-.set SCSI_Out__ATN__CTL, CYREG_PRT15_CTL\r
-.set SCSI_Out__ATN__DM0, CYREG_PRT15_DM0\r
-.set SCSI_Out__ATN__DM1, CYREG_PRT15_DM1\r
-.set SCSI_Out__ATN__DM2, CYREG_PRT15_DM2\r
-.set SCSI_Out__ATN__DR, CYREG_PRT15_DR\r
-.set SCSI_Out__ATN__INP_DIS, CYREG_PRT15_INP_DIS\r
-.set SCSI_Out__ATN__INTTYPE, CYREG_PICU15_INTTYPE4\r
-.set SCSI_Out__ATN__LCD_COM_SEG, CYREG_PRT15_LCD_COM_SEG\r
-.set SCSI_Out__ATN__LCD_EN, CYREG_PRT15_LCD_EN\r
-.set SCSI_Out__ATN__MASK, 0x10\r
-.set SCSI_Out__ATN__PC, CYREG_IO_PC_PRT15_PC4\r
-.set SCSI_Out__ATN__PORT, 15\r
-.set SCSI_Out__ATN__PRT, CYREG_PRT15_PRT\r
-.set SCSI_Out__ATN__PRTDSI__CAPS_SEL, CYREG_PRT15_CAPS_SEL\r
-.set SCSI_Out__ATN__PRTDSI__DBL_SYNC_IN, CYREG_PRT15_DBL_SYNC_IN\r
-.set SCSI_Out__ATN__PRTDSI__OE_SEL0, CYREG_PRT15_OE_SEL0\r
-.set SCSI_Out__ATN__PRTDSI__OE_SEL1, CYREG_PRT15_OE_SEL1\r
-.set SCSI_Out__ATN__PRTDSI__OUT_SEL0, CYREG_PRT15_OUT_SEL0\r
-.set SCSI_Out__ATN__PRTDSI__OUT_SEL1, CYREG_PRT15_OUT_SEL1\r
-.set SCSI_Out__ATN__PRTDSI__SYNC_OUT, CYREG_PRT15_SYNC_OUT\r
-.set SCSI_Out__ATN__PS, CYREG_PRT15_PS\r
-.set SCSI_Out__ATN__SHIFT, 4\r
-.set SCSI_Out__ATN__SLW, CYREG_PRT15_SLW\r
-.set SCSI_Out__BSY__AG, CYREG_PRT6_AG\r
-.set SCSI_Out__BSY__AMUX, CYREG_PRT6_AMUX\r
-.set SCSI_Out__BSY__BIE, CYREG_PRT6_BIE\r
-.set SCSI_Out__BSY__BIT_MASK, CYREG_PRT6_BIT_MASK\r
-.set SCSI_Out__BSY__BYP, CYREG_PRT6_BYP\r
-.set SCSI_Out__BSY__CTL, CYREG_PRT6_CTL\r
-.set SCSI_Out__BSY__DM0, CYREG_PRT6_DM0\r
-.set SCSI_Out__BSY__DM1, CYREG_PRT6_DM1\r
-.set SCSI_Out__BSY__DM2, CYREG_PRT6_DM2\r
-.set SCSI_Out__BSY__DR, CYREG_PRT6_DR\r
-.set SCSI_Out__BSY__INP_DIS, CYREG_PRT6_INP_DIS\r
-.set SCSI_Out__BSY__INTTYPE, CYREG_PICU6_INTTYPE1\r
-.set SCSI_Out__BSY__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
-.set SCSI_Out__BSY__LCD_EN, CYREG_PRT6_LCD_EN\r
-.set SCSI_Out__BSY__MASK, 0x02\r
-.set SCSI_Out__BSY__PC, CYREG_PRT6_PC1\r
-.set SCSI_Out__BSY__PORT, 6\r
-.set SCSI_Out__BSY__PRT, CYREG_PRT6_PRT\r
-.set SCSI_Out__BSY__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
-.set SCSI_Out__BSY__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
-.set SCSI_Out__BSY__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
-.set SCSI_Out__BSY__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
-.set SCSI_Out__BSY__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
-.set SCSI_Out__BSY__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
-.set SCSI_Out__BSY__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
-.set SCSI_Out__BSY__PS, CYREG_PRT6_PS\r
-.set SCSI_Out__BSY__SHIFT, 1\r
-.set SCSI_Out__BSY__SLW, CYREG_PRT6_SLW\r
-.set SCSI_Out__CD_raw__AG, CYREG_PRT0_AG\r
-.set SCSI_Out__CD_raw__AMUX, CYREG_PRT0_AMUX\r
-.set SCSI_Out__CD_raw__BIE, CYREG_PRT0_BIE\r
-.set SCSI_Out__CD_raw__BIT_MASK, CYREG_PRT0_BIT_MASK\r
-.set SCSI_Out__CD_raw__BYP, CYREG_PRT0_BYP\r
-.set SCSI_Out__CD_raw__CTL, CYREG_PRT0_CTL\r
-.set SCSI_Out__CD_raw__DM0, CYREG_PRT0_DM0\r
-.set SCSI_Out__CD_raw__DM1, CYREG_PRT0_DM1\r
-.set SCSI_Out__CD_raw__DM2, CYREG_PRT0_DM2\r
-.set SCSI_Out__CD_raw__DR, CYREG_PRT0_DR\r
-.set SCSI_Out__CD_raw__INP_DIS, CYREG_PRT0_INP_DIS\r
-.set SCSI_Out__CD_raw__INTTYPE, CYREG_PICU0_INTTYPE6\r
-.set SCSI_Out__CD_raw__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
-.set SCSI_Out__CD_raw__LCD_EN, CYREG_PRT0_LCD_EN\r
-.set SCSI_Out__CD_raw__MASK, 0x40\r
-.set SCSI_Out__CD_raw__PC, CYREG_PRT0_PC6\r
-.set SCSI_Out__CD_raw__PORT, 0\r
-.set SCSI_Out__CD_raw__PRT, CYREG_PRT0_PRT\r
-.set SCSI_Out__CD_raw__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
-.set SCSI_Out__CD_raw__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
-.set SCSI_Out__CD_raw__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
-.set SCSI_Out__CD_raw__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
-.set SCSI_Out__CD_raw__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
-.set SCSI_Out__CD_raw__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
-.set SCSI_Out__CD_raw__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
-.set SCSI_Out__CD_raw__PS, CYREG_PRT0_PS\r
-.set SCSI_Out__CD_raw__SHIFT, 6\r
-.set SCSI_Out__CD_raw__SLW, CYREG_PRT0_SLW\r
-.set SCSI_Out__DBP_raw__AG, CYREG_PRT15_AG\r
-.set SCSI_Out__DBP_raw__AMUX, CYREG_PRT15_AMUX\r
-.set SCSI_Out__DBP_raw__BIE, CYREG_PRT15_BIE\r
-.set SCSI_Out__DBP_raw__BIT_MASK, CYREG_PRT15_BIT_MASK\r
-.set SCSI_Out__DBP_raw__BYP, CYREG_PRT15_BYP\r
-.set SCSI_Out__DBP_raw__CTL, CYREG_PRT15_CTL\r
-.set SCSI_Out__DBP_raw__DM0, CYREG_PRT15_DM0\r
-.set SCSI_Out__DBP_raw__DM1, CYREG_PRT15_DM1\r
-.set SCSI_Out__DBP_raw__DM2, CYREG_PRT15_DM2\r
-.set SCSI_Out__DBP_raw__DR, CYREG_PRT15_DR\r
-.set SCSI_Out__DBP_raw__INP_DIS, CYREG_PRT15_INP_DIS\r
-.set SCSI_Out__DBP_raw__INTTYPE, CYREG_PICU15_INTTYPE5\r
-.set SCSI_Out__DBP_raw__LCD_COM_SEG, CYREG_PRT15_LCD_COM_SEG\r
-.set SCSI_Out__DBP_raw__LCD_EN, CYREG_PRT15_LCD_EN\r
-.set SCSI_Out__DBP_raw__MASK, 0x20\r
-.set SCSI_Out__DBP_raw__PC, CYREG_IO_PC_PRT15_PC5\r
-.set SCSI_Out__DBP_raw__PORT, 15\r
-.set SCSI_Out__DBP_raw__PRT, CYREG_PRT15_PRT\r
-.set SCSI_Out__DBP_raw__PRTDSI__CAPS_SEL, CYREG_PRT15_CAPS_SEL\r
-.set SCSI_Out__DBP_raw__PRTDSI__DBL_SYNC_IN, CYREG_PRT15_DBL_SYNC_IN\r
-.set SCSI_Out__DBP_raw__PRTDSI__OE_SEL0, CYREG_PRT15_OE_SEL0\r
-.set SCSI_Out__DBP_raw__PRTDSI__OE_SEL1, CYREG_PRT15_OE_SEL1\r
-.set SCSI_Out__DBP_raw__PRTDSI__OUT_SEL0, CYREG_PRT15_OUT_SEL0\r
-.set SCSI_Out__DBP_raw__PRTDSI__OUT_SEL1, CYREG_PRT15_OUT_SEL1\r
-.set SCSI_Out__DBP_raw__PRTDSI__SYNC_OUT, CYREG_PRT15_SYNC_OUT\r
-.set SCSI_Out__DBP_raw__PS, CYREG_PRT15_PS\r
-.set SCSI_Out__DBP_raw__SHIFT, 5\r
-.set SCSI_Out__DBP_raw__SLW, CYREG_PRT15_SLW\r
-.set SCSI_Out__IO_raw__AG, CYREG_PRT0_AG\r
-.set SCSI_Out__IO_raw__AMUX, CYREG_PRT0_AMUX\r
-.set SCSI_Out__IO_raw__BIE, CYREG_PRT0_BIE\r
-.set SCSI_Out__IO_raw__BIT_MASK, CYREG_PRT0_BIT_MASK\r
-.set SCSI_Out__IO_raw__BYP, CYREG_PRT0_BYP\r
-.set SCSI_Out__IO_raw__CTL, CYREG_PRT0_CTL\r
-.set SCSI_Out__IO_raw__DM0, CYREG_PRT0_DM0\r
-.set SCSI_Out__IO_raw__DM1, CYREG_PRT0_DM1\r
-.set SCSI_Out__IO_raw__DM2, CYREG_PRT0_DM2\r
-.set SCSI_Out__IO_raw__DR, CYREG_PRT0_DR\r
-.set SCSI_Out__IO_raw__INP_DIS, CYREG_PRT0_INP_DIS\r
-.set SCSI_Out__IO_raw__INTTYPE, CYREG_PICU0_INTTYPE2\r
-.set SCSI_Out__IO_raw__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
-.set SCSI_Out__IO_raw__LCD_EN, CYREG_PRT0_LCD_EN\r
-.set SCSI_Out__IO_raw__MASK, 0x04\r
-.set SCSI_Out__IO_raw__PC, CYREG_PRT0_PC2\r
-.set SCSI_Out__IO_raw__PORT, 0\r
-.set SCSI_Out__IO_raw__PRT, CYREG_PRT0_PRT\r
-.set SCSI_Out__IO_raw__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
-.set SCSI_Out__IO_raw__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
-.set SCSI_Out__IO_raw__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
-.set SCSI_Out__IO_raw__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
-.set SCSI_Out__IO_raw__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
-.set SCSI_Out__IO_raw__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
-.set SCSI_Out__IO_raw__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
-.set SCSI_Out__IO_raw__PS, CYREG_PRT0_PS\r
-.set SCSI_Out__IO_raw__SHIFT, 2\r
-.set SCSI_Out__IO_raw__SLW, CYREG_PRT0_SLW\r
-.set SCSI_Out__MSG_raw__AG, CYREG_PRT4_AG\r
-.set SCSI_Out__MSG_raw__AMUX, CYREG_PRT4_AMUX\r
-.set SCSI_Out__MSG_raw__BIE, CYREG_PRT4_BIE\r
-.set SCSI_Out__MSG_raw__BIT_MASK, CYREG_PRT4_BIT_MASK\r
-.set SCSI_Out__MSG_raw__BYP, CYREG_PRT4_BYP\r
-.set SCSI_Out__MSG_raw__CTL, CYREG_PRT4_CTL\r
-.set SCSI_Out__MSG_raw__DM0, CYREG_PRT4_DM0\r
-.set SCSI_Out__MSG_raw__DM1, CYREG_PRT4_DM1\r
-.set SCSI_Out__MSG_raw__DM2, CYREG_PRT4_DM2\r
-.set SCSI_Out__MSG_raw__DR, CYREG_PRT4_DR\r
-.set SCSI_Out__MSG_raw__INP_DIS, CYREG_PRT4_INP_DIS\r
-.set SCSI_Out__MSG_raw__INTTYPE, CYREG_PICU4_INTTYPE4\r
-.set SCSI_Out__MSG_raw__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
-.set SCSI_Out__MSG_raw__LCD_EN, CYREG_PRT4_LCD_EN\r
-.set SCSI_Out__MSG_raw__MASK, 0x10\r
-.set SCSI_Out__MSG_raw__PC, CYREG_PRT4_PC4\r
-.set SCSI_Out__MSG_raw__PORT, 4\r
-.set SCSI_Out__MSG_raw__PRT, CYREG_PRT4_PRT\r
-.set SCSI_Out__MSG_raw__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
-.set SCSI_Out__MSG_raw__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
-.set SCSI_Out__MSG_raw__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
-.set SCSI_Out__MSG_raw__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
-.set SCSI_Out__MSG_raw__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
-.set SCSI_Out__MSG_raw__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
-.set SCSI_Out__MSG_raw__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
-.set SCSI_Out__MSG_raw__PS, CYREG_PRT4_PS\r
-.set SCSI_Out__MSG_raw__SHIFT, 4\r
-.set SCSI_Out__MSG_raw__SLW, CYREG_PRT4_SLW\r
-.set SCSI_Out__REQ__AG, CYREG_PRT0_AG\r
-.set SCSI_Out__REQ__AMUX, CYREG_PRT0_AMUX\r
-.set SCSI_Out__REQ__BIE, CYREG_PRT0_BIE\r
-.set SCSI_Out__REQ__BIT_MASK, CYREG_PRT0_BIT_MASK\r
-.set SCSI_Out__REQ__BYP, CYREG_PRT0_BYP\r
-.set SCSI_Out__REQ__CTL, CYREG_PRT0_CTL\r
-.set SCSI_Out__REQ__DM0, CYREG_PRT0_DM0\r
-.set SCSI_Out__REQ__DM1, CYREG_PRT0_DM1\r
-.set SCSI_Out__REQ__DM2, CYREG_PRT0_DM2\r
-.set SCSI_Out__REQ__DR, CYREG_PRT0_DR\r
-.set SCSI_Out__REQ__INP_DIS, CYREG_PRT0_INP_DIS\r
-.set SCSI_Out__REQ__INTTYPE, CYREG_PICU0_INTTYPE3\r
-.set SCSI_Out__REQ__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
-.set SCSI_Out__REQ__LCD_EN, CYREG_PRT0_LCD_EN\r
-.set SCSI_Out__REQ__MASK, 0x08\r
-.set SCSI_Out__REQ__PC, CYREG_PRT0_PC3\r
-.set SCSI_Out__REQ__PORT, 0\r
-.set SCSI_Out__REQ__PRT, CYREG_PRT0_PRT\r
-.set SCSI_Out__REQ__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
-.set SCSI_Out__REQ__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
-.set SCSI_Out__REQ__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
-.set SCSI_Out__REQ__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
-.set SCSI_Out__REQ__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
-.set SCSI_Out__REQ__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
-.set SCSI_Out__REQ__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
-.set SCSI_Out__REQ__PS, CYREG_PRT0_PS\r
-.set SCSI_Out__REQ__SHIFT, 3\r
-.set SCSI_Out__REQ__SLW, CYREG_PRT0_SLW\r
-.set SCSI_Out__RST__AG, CYREG_PRT4_AG\r
-.set SCSI_Out__RST__AMUX, CYREG_PRT4_AMUX\r
-.set SCSI_Out__RST__BIE, CYREG_PRT4_BIE\r
-.set SCSI_Out__RST__BIT_MASK, CYREG_PRT4_BIT_MASK\r
-.set SCSI_Out__RST__BYP, CYREG_PRT4_BYP\r
-.set SCSI_Out__RST__CTL, CYREG_PRT4_CTL\r
-.set SCSI_Out__RST__DM0, CYREG_PRT4_DM0\r
-.set SCSI_Out__RST__DM1, CYREG_PRT4_DM1\r
-.set SCSI_Out__RST__DM2, CYREG_PRT4_DM2\r
-.set SCSI_Out__RST__DR, CYREG_PRT4_DR\r
-.set SCSI_Out__RST__INP_DIS, CYREG_PRT4_INP_DIS\r
-.set SCSI_Out__RST__INTTYPE, CYREG_PICU4_INTTYPE5\r
-.set SCSI_Out__RST__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
-.set SCSI_Out__RST__LCD_EN, CYREG_PRT4_LCD_EN\r
-.set SCSI_Out__RST__MASK, 0x20\r
-.set SCSI_Out__RST__PC, CYREG_PRT4_PC5\r
-.set SCSI_Out__RST__PORT, 4\r
-.set SCSI_Out__RST__PRT, CYREG_PRT4_PRT\r
-.set SCSI_Out__RST__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
-.set SCSI_Out__RST__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
-.set SCSI_Out__RST__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
-.set SCSI_Out__RST__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
-.set SCSI_Out__RST__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
-.set SCSI_Out__RST__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
-.set SCSI_Out__RST__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
-.set SCSI_Out__RST__PS, CYREG_PRT4_PS\r
-.set SCSI_Out__RST__SHIFT, 5\r
-.set SCSI_Out__RST__SLW, CYREG_PRT4_SLW\r
-.set SCSI_Out__SEL__AG, CYREG_PRT0_AG\r
-.set SCSI_Out__SEL__AMUX, CYREG_PRT0_AMUX\r
-.set SCSI_Out__SEL__BIE, CYREG_PRT0_BIE\r
-.set SCSI_Out__SEL__BIT_MASK, CYREG_PRT0_BIT_MASK\r
-.set SCSI_Out__SEL__BYP, CYREG_PRT0_BYP\r
-.set SCSI_Out__SEL__CTL, CYREG_PRT0_CTL\r
-.set SCSI_Out__SEL__DM0, CYREG_PRT0_DM0\r
-.set SCSI_Out__SEL__DM1, CYREG_PRT0_DM1\r
-.set SCSI_Out__SEL__DM2, CYREG_PRT0_DM2\r
-.set SCSI_Out__SEL__DR, CYREG_PRT0_DR\r
-.set SCSI_Out__SEL__INP_DIS, CYREG_PRT0_INP_DIS\r
-.set SCSI_Out__SEL__INTTYPE, CYREG_PICU0_INTTYPE7\r
-.set SCSI_Out__SEL__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
-.set SCSI_Out__SEL__LCD_EN, CYREG_PRT0_LCD_EN\r
-.set SCSI_Out__SEL__MASK, 0x80\r
-.set SCSI_Out__SEL__PC, CYREG_PRT0_PC7\r
-.set SCSI_Out__SEL__PORT, 0\r
-.set SCSI_Out__SEL__PRT, CYREG_PRT0_PRT\r
-.set SCSI_Out__SEL__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
-.set SCSI_Out__SEL__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
-.set SCSI_Out__SEL__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
-.set SCSI_Out__SEL__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
-.set SCSI_Out__SEL__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
-.set SCSI_Out__SEL__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
-.set SCSI_Out__SEL__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
-.set SCSI_Out__SEL__PS, CYREG_PRT0_PS\r
-.set SCSI_Out__SEL__SHIFT, 7\r
-.set SCSI_Out__SEL__SLW, CYREG_PRT0_SLW\r
-.set SCSI_Out_Bits_Sync_ctrl_reg__0__MASK, 0x01\r
-.set SCSI_Out_Bits_Sync_ctrl_reg__0__POS, 0\r
-.set SCSI_Out_Bits_Sync_ctrl_reg__1__MASK, 0x02\r
-.set SCSI_Out_Bits_Sync_ctrl_reg__1__POS, 1\r
-.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG, CYREG_B0_UDB14_15_ACTL\r
-.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG, CYREG_B0_UDB14_15_CTL\r
-.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG, CYREG_B0_UDB14_15_CTL\r
-.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG, CYREG_B0_UDB14_15_CTL\r
-.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG, CYREG_B0_UDB14_15_CTL\r
-.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_MASK_REG, CYREG_B0_UDB14_15_MSK\r
-.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG, CYREG_B0_UDB14_15_MSK\r
-.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG, CYREG_B0_UDB14_15_MSK\r
-.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG, CYREG_B0_UDB14_15_MSK\r
-.set SCSI_Out_Bits_Sync_ctrl_reg__2__MASK, 0x04\r
-.set SCSI_Out_Bits_Sync_ctrl_reg__2__POS, 2\r
-.set SCSI_Out_Bits_Sync_ctrl_reg__3__MASK, 0x08\r
-.set SCSI_Out_Bits_Sync_ctrl_reg__3__POS, 3\r
-.set SCSI_Out_Bits_Sync_ctrl_reg__4__MASK, 0x10\r
-.set SCSI_Out_Bits_Sync_ctrl_reg__4__POS, 4\r
-.set SCSI_Out_Bits_Sync_ctrl_reg__5__MASK, 0x20\r
-.set SCSI_Out_Bits_Sync_ctrl_reg__5__POS, 5\r
-.set SCSI_Out_Bits_Sync_ctrl_reg__6__MASK, 0x40\r
-.set SCSI_Out_Bits_Sync_ctrl_reg__6__POS, 6\r
-.set SCSI_Out_Bits_Sync_ctrl_reg__7__MASK, 0x80\r
-.set SCSI_Out_Bits_Sync_ctrl_reg__7__POS, 7\r
-.set SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_AUX_CTL_REG, CYREG_B0_UDB14_ACTL\r
-.set SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_REG, CYREG_B0_UDB14_CTL\r
-.set SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_ST_REG, CYREG_B0_UDB14_ST_CTL\r
-.set SCSI_Out_Bits_Sync_ctrl_reg__COUNT_REG, CYREG_B0_UDB14_CTL\r
-.set SCSI_Out_Bits_Sync_ctrl_reg__COUNT_ST_REG, CYREG_B0_UDB14_ST_CTL\r
-.set SCSI_Out_Bits_Sync_ctrl_reg__MASK, 0xFF\r
-.set SCSI_Out_Bits_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG, CYREG_B0_UDB14_MSK_ACTL\r
-.set SCSI_Out_Bits_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG, CYREG_B0_UDB14_MSK_ACTL\r
-.set SCSI_Out_Bits_Sync_ctrl_reg__PERIOD_REG, CYREG_B0_UDB14_MSK\r
-.set SCSI_Out_Ctl_Sync_ctrl_reg__0__MASK, 0x01\r
-.set SCSI_Out_Ctl_Sync_ctrl_reg__0__POS, 0\r
-.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG, CYREG_B0_UDB12_13_ACTL\r
-.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG, CYREG_B0_UDB12_13_CTL\r
-.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG, CYREG_B0_UDB12_13_CTL\r
-.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG, CYREG_B0_UDB12_13_CTL\r
-.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG, CYREG_B0_UDB12_13_CTL\r
-.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG, CYREG_B0_UDB12_13_MSK\r
-.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG, CYREG_B0_UDB12_13_MSK\r
-.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG, CYREG_B0_UDB12_13_MSK\r
-.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG, CYREG_B0_UDB12_13_MSK\r
-.set SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG, CYREG_B0_UDB12_ACTL\r
-.set SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_REG, CYREG_B0_UDB12_CTL\r
-.set SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_ST_REG, CYREG_B0_UDB12_ST_CTL\r
-.set SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_REG, CYREG_B0_UDB12_CTL\r
-.set SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_ST_REG, CYREG_B0_UDB12_ST_CTL\r
-.set SCSI_Out_Ctl_Sync_ctrl_reg__MASK, 0x01\r
-.set SCSI_Out_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG, CYREG_B0_UDB12_MSK_ACTL\r
-.set SCSI_Out_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG, CYREG_B0_UDB12_MSK_ACTL\r
-.set SCSI_Out_Ctl_Sync_ctrl_reg__PERIOD_REG, CYREG_B0_UDB12_MSK\r
-.set SCSI_Out_DBx__0__AG, CYREG_PRT5_AG\r
-.set SCSI_Out_DBx__0__AMUX, CYREG_PRT5_AMUX\r
-.set SCSI_Out_DBx__0__BIE, CYREG_PRT5_BIE\r
-.set SCSI_Out_DBx__0__BIT_MASK, CYREG_PRT5_BIT_MASK\r
-.set SCSI_Out_DBx__0__BYP, CYREG_PRT5_BYP\r
-.set SCSI_Out_DBx__0__CTL, CYREG_PRT5_CTL\r
-.set SCSI_Out_DBx__0__DM0, CYREG_PRT5_DM0\r
-.set SCSI_Out_DBx__0__DM1, CYREG_PRT5_DM1\r
-.set SCSI_Out_DBx__0__DM2, CYREG_PRT5_DM2\r
-.set SCSI_Out_DBx__0__DR, CYREG_PRT5_DR\r
-.set SCSI_Out_DBx__0__INP_DIS, CYREG_PRT5_INP_DIS\r
-.set SCSI_Out_DBx__0__INTTYPE, CYREG_PICU5_INTTYPE1\r
-.set SCSI_Out_DBx__0__LCD_COM_SEG, CYREG_PRT5_LCD_COM_SEG\r
-.set SCSI_Out_DBx__0__LCD_EN, CYREG_PRT5_LCD_EN\r
-.set SCSI_Out_DBx__0__MASK, 0x02\r
-.set SCSI_Out_DBx__0__PC, CYREG_PRT5_PC1\r
-.set SCSI_Out_DBx__0__PORT, 5\r
-.set SCSI_Out_DBx__0__PRT, CYREG_PRT5_PRT\r
-.set SCSI_Out_DBx__0__PRTDSI__CAPS_SEL, CYREG_PRT5_CAPS_SEL\r
-.set SCSI_Out_DBx__0__PRTDSI__DBL_SYNC_IN, CYREG_PRT5_DBL_SYNC_IN\r
-.set SCSI_Out_DBx__0__PRTDSI__OE_SEL0, CYREG_PRT5_OE_SEL0\r
-.set SCSI_Out_DBx__0__PRTDSI__OE_SEL1, CYREG_PRT5_OE_SEL1\r
-.set SCSI_Out_DBx__0__PRTDSI__OUT_SEL0, CYREG_PRT5_OUT_SEL0\r
-.set SCSI_Out_DBx__0__PRTDSI__OUT_SEL1, CYREG_PRT5_OUT_SEL1\r
-.set SCSI_Out_DBx__0__PRTDSI__SYNC_OUT, CYREG_PRT5_SYNC_OUT\r
-.set SCSI_Out_DBx__0__PS, CYREG_PRT5_PS\r
-.set SCSI_Out_DBx__0__SHIFT, 1\r
-.set SCSI_Out_DBx__0__SLW, CYREG_PRT5_SLW\r
-.set SCSI_Out_DBx__1__AG, CYREG_PRT5_AG\r
-.set SCSI_Out_DBx__1__AMUX, CYREG_PRT5_AMUX\r
-.set SCSI_Out_DBx__1__BIE, CYREG_PRT5_BIE\r
-.set SCSI_Out_DBx__1__BIT_MASK, CYREG_PRT5_BIT_MASK\r
-.set SCSI_Out_DBx__1__BYP, CYREG_PRT5_BYP\r
-.set SCSI_Out_DBx__1__CTL, CYREG_PRT5_CTL\r
-.set SCSI_Out_DBx__1__DM0, CYREG_PRT5_DM0\r
-.set SCSI_Out_DBx__1__DM1, CYREG_PRT5_DM1\r
-.set SCSI_Out_DBx__1__DM2, CYREG_PRT5_DM2\r
-.set SCSI_Out_DBx__1__DR, CYREG_PRT5_DR\r
-.set SCSI_Out_DBx__1__INP_DIS, CYREG_PRT5_INP_DIS\r
-.set SCSI_Out_DBx__1__INTTYPE, CYREG_PICU5_INTTYPE0\r
-.set SCSI_Out_DBx__1__LCD_COM_SEG, CYREG_PRT5_LCD_COM_SEG\r
-.set SCSI_Out_DBx__1__LCD_EN, CYREG_PRT5_LCD_EN\r
-.set SCSI_Out_DBx__1__MASK, 0x01\r
-.set SCSI_Out_DBx__1__PC, CYREG_PRT5_PC0\r
-.set SCSI_Out_DBx__1__PORT, 5\r
-.set SCSI_Out_DBx__1__PRT, CYREG_PRT5_PRT\r
-.set SCSI_Out_DBx__1__PRTDSI__CAPS_SEL, CYREG_PRT5_CAPS_SEL\r
-.set SCSI_Out_DBx__1__PRTDSI__DBL_SYNC_IN, CYREG_PRT5_DBL_SYNC_IN\r
-.set SCSI_Out_DBx__1__PRTDSI__OE_SEL0, CYREG_PRT5_OE_SEL0\r
-.set SCSI_Out_DBx__1__PRTDSI__OE_SEL1, CYREG_PRT5_OE_SEL1\r
-.set SCSI_Out_DBx__1__PRTDSI__OUT_SEL0, CYREG_PRT5_OUT_SEL0\r
-.set SCSI_Out_DBx__1__PRTDSI__OUT_SEL1, CYREG_PRT5_OUT_SEL1\r
-.set SCSI_Out_DBx__1__PRTDSI__SYNC_OUT, CYREG_PRT5_SYNC_OUT\r
-.set SCSI_Out_DBx__1__PS, CYREG_PRT5_PS\r
-.set SCSI_Out_DBx__1__SHIFT, 0\r
-.set SCSI_Out_DBx__1__SLW, CYREG_PRT5_SLW\r
-.set SCSI_Out_DBx__2__AG, CYREG_PRT6_AG\r
-.set SCSI_Out_DBx__2__AMUX, CYREG_PRT6_AMUX\r
-.set SCSI_Out_DBx__2__BIE, CYREG_PRT6_BIE\r
-.set SCSI_Out_DBx__2__BIT_MASK, CYREG_PRT6_BIT_MASK\r
-.set SCSI_Out_DBx__2__BYP, CYREG_PRT6_BYP\r
-.set SCSI_Out_DBx__2__CTL, CYREG_PRT6_CTL\r
-.set SCSI_Out_DBx__2__DM0, CYREG_PRT6_DM0\r
-.set SCSI_Out_DBx__2__DM1, CYREG_PRT6_DM1\r
-.set SCSI_Out_DBx__2__DM2, CYREG_PRT6_DM2\r
-.set SCSI_Out_DBx__2__DR, CYREG_PRT6_DR\r
-.set SCSI_Out_DBx__2__INP_DIS, CYREG_PRT6_INP_DIS\r
-.set SCSI_Out_DBx__2__INTTYPE, CYREG_PICU6_INTTYPE5\r
-.set SCSI_Out_DBx__2__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
-.set SCSI_Out_DBx__2__LCD_EN, CYREG_PRT6_LCD_EN\r
-.set SCSI_Out_DBx__2__MASK, 0x20\r
-.set SCSI_Out_DBx__2__PC, CYREG_PRT6_PC5\r
-.set SCSI_Out_DBx__2__PORT, 6\r
-.set SCSI_Out_DBx__2__PRT, CYREG_PRT6_PRT\r
-.set SCSI_Out_DBx__2__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
-.set SCSI_Out_DBx__2__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
-.set SCSI_Out_DBx__2__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
-.set SCSI_Out_DBx__2__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
-.set SCSI_Out_DBx__2__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
-.set SCSI_Out_DBx__2__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
-.set SCSI_Out_DBx__2__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
-.set SCSI_Out_DBx__2__PS, CYREG_PRT6_PS\r
-.set SCSI_Out_DBx__2__SHIFT, 5\r
-.set SCSI_Out_DBx__2__SLW, CYREG_PRT6_SLW\r
-.set SCSI_Out_DBx__3__AG, CYREG_PRT6_AG\r
-.set SCSI_Out_DBx__3__AMUX, CYREG_PRT6_AMUX\r
-.set SCSI_Out_DBx__3__BIE, CYREG_PRT6_BIE\r
-.set SCSI_Out_DBx__3__BIT_MASK, CYREG_PRT6_BIT_MASK\r
-.set SCSI_Out_DBx__3__BYP, CYREG_PRT6_BYP\r
-.set SCSI_Out_DBx__3__CTL, CYREG_PRT6_CTL\r
-.set SCSI_Out_DBx__3__DM0, CYREG_PRT6_DM0\r
-.set SCSI_Out_DBx__3__DM1, CYREG_PRT6_DM1\r
-.set SCSI_Out_DBx__3__DM2, CYREG_PRT6_DM2\r
-.set SCSI_Out_DBx__3__DR, CYREG_PRT6_DR\r
-.set SCSI_Out_DBx__3__INP_DIS, CYREG_PRT6_INP_DIS\r
-.set SCSI_Out_DBx__3__INTTYPE, CYREG_PICU6_INTTYPE4\r
-.set SCSI_Out_DBx__3__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
-.set SCSI_Out_DBx__3__LCD_EN, CYREG_PRT6_LCD_EN\r
-.set SCSI_Out_DBx__3__MASK, 0x10\r
-.set SCSI_Out_DBx__3__PC, CYREG_PRT6_PC4\r
-.set SCSI_Out_DBx__3__PORT, 6\r
-.set SCSI_Out_DBx__3__PRT, CYREG_PRT6_PRT\r
-.set SCSI_Out_DBx__3__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
-.set SCSI_Out_DBx__3__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
-.set SCSI_Out_DBx__3__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
-.set SCSI_Out_DBx__3__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
-.set SCSI_Out_DBx__3__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
-.set SCSI_Out_DBx__3__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
-.set SCSI_Out_DBx__3__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
-.set SCSI_Out_DBx__3__PS, CYREG_PRT6_PS\r
-.set SCSI_Out_DBx__3__SHIFT, 4\r
-.set SCSI_Out_DBx__3__SLW, CYREG_PRT6_SLW\r
-.set SCSI_Out_DBx__4__AG, CYREG_PRT2_AG\r
-.set SCSI_Out_DBx__4__AMUX, CYREG_PRT2_AMUX\r
-.set SCSI_Out_DBx__4__BIE, CYREG_PRT2_BIE\r
-.set SCSI_Out_DBx__4__BIT_MASK, CYREG_PRT2_BIT_MASK\r
-.set SCSI_Out_DBx__4__BYP, CYREG_PRT2_BYP\r
-.set SCSI_Out_DBx__4__CTL, CYREG_PRT2_CTL\r
-.set SCSI_Out_DBx__4__DM0, CYREG_PRT2_DM0\r
-.set SCSI_Out_DBx__4__DM1, CYREG_PRT2_DM1\r
-.set SCSI_Out_DBx__4__DM2, CYREG_PRT2_DM2\r
-.set SCSI_Out_DBx__4__DR, CYREG_PRT2_DR\r
-.set SCSI_Out_DBx__4__INP_DIS, CYREG_PRT2_INP_DIS\r
-.set SCSI_Out_DBx__4__INTTYPE, CYREG_PICU2_INTTYPE7\r
-.set SCSI_Out_DBx__4__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG\r
-.set SCSI_Out_DBx__4__LCD_EN, CYREG_PRT2_LCD_EN\r
-.set SCSI_Out_DBx__4__MASK, 0x80\r
-.set SCSI_Out_DBx__4__PC, CYREG_PRT2_PC7\r
-.set SCSI_Out_DBx__4__PORT, 2\r
-.set SCSI_Out_DBx__4__PRT, CYREG_PRT2_PRT\r
-.set SCSI_Out_DBx__4__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL\r
-.set SCSI_Out_DBx__4__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN\r
-.set SCSI_Out_DBx__4__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0\r
-.set SCSI_Out_DBx__4__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1\r
-.set SCSI_Out_DBx__4__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0\r
-.set SCSI_Out_DBx__4__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1\r
-.set SCSI_Out_DBx__4__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT\r
-.set SCSI_Out_DBx__4__PS, CYREG_PRT2_PS\r
-.set SCSI_Out_DBx__4__SHIFT, 7\r
-.set SCSI_Out_DBx__4__SLW, CYREG_PRT2_SLW\r
-.set SCSI_Out_DBx__5__AG, CYREG_PRT2_AG\r
-.set SCSI_Out_DBx__5__AMUX, CYREG_PRT2_AMUX\r
-.set SCSI_Out_DBx__5__BIE, CYREG_PRT2_BIE\r
-.set SCSI_Out_DBx__5__BIT_MASK, CYREG_PRT2_BIT_MASK\r
-.set SCSI_Out_DBx__5__BYP, CYREG_PRT2_BYP\r
-.set SCSI_Out_DBx__5__CTL, CYREG_PRT2_CTL\r
-.set SCSI_Out_DBx__5__DM0, CYREG_PRT2_DM0\r
-.set SCSI_Out_DBx__5__DM1, CYREG_PRT2_DM1\r
-.set SCSI_Out_DBx__5__DM2, CYREG_PRT2_DM2\r
-.set SCSI_Out_DBx__5__DR, CYREG_PRT2_DR\r
-.set SCSI_Out_DBx__5__INP_DIS, CYREG_PRT2_INP_DIS\r
-.set SCSI_Out_DBx__5__INTTYPE, CYREG_PICU2_INTTYPE6\r
-.set SCSI_Out_DBx__5__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG\r
-.set SCSI_Out_DBx__5__LCD_EN, CYREG_PRT2_LCD_EN\r
-.set SCSI_Out_DBx__5__MASK, 0x40\r
-.set SCSI_Out_DBx__5__PC, CYREG_PRT2_PC6\r
-.set SCSI_Out_DBx__5__PORT, 2\r
-.set SCSI_Out_DBx__5__PRT, CYREG_PRT2_PRT\r
-.set SCSI_Out_DBx__5__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL\r
-.set SCSI_Out_DBx__5__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN\r
-.set SCSI_Out_DBx__5__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0\r
-.set SCSI_Out_DBx__5__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1\r
-.set SCSI_Out_DBx__5__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0\r
-.set SCSI_Out_DBx__5__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1\r
-.set SCSI_Out_DBx__5__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT\r
-.set SCSI_Out_DBx__5__PS, CYREG_PRT2_PS\r
-.set SCSI_Out_DBx__5__SHIFT, 6\r
-.set SCSI_Out_DBx__5__SLW, CYREG_PRT2_SLW\r
-.set SCSI_Out_DBx__6__AG, CYREG_PRT2_AG\r
-.set SCSI_Out_DBx__6__AMUX, CYREG_PRT2_AMUX\r
-.set SCSI_Out_DBx__6__BIE, CYREG_PRT2_BIE\r
-.set SCSI_Out_DBx__6__BIT_MASK, CYREG_PRT2_BIT_MASK\r
-.set SCSI_Out_DBx__6__BYP, CYREG_PRT2_BYP\r
-.set SCSI_Out_DBx__6__CTL, CYREG_PRT2_CTL\r
-.set SCSI_Out_DBx__6__DM0, CYREG_PRT2_DM0\r
-.set SCSI_Out_DBx__6__DM1, CYREG_PRT2_DM1\r
-.set SCSI_Out_DBx__6__DM2, CYREG_PRT2_DM2\r
-.set SCSI_Out_DBx__6__DR, CYREG_PRT2_DR\r
-.set SCSI_Out_DBx__6__INP_DIS, CYREG_PRT2_INP_DIS\r
-.set SCSI_Out_DBx__6__INTTYPE, CYREG_PICU2_INTTYPE3\r
-.set SCSI_Out_DBx__6__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG\r
-.set SCSI_Out_DBx__6__LCD_EN, CYREG_PRT2_LCD_EN\r
-.set SCSI_Out_DBx__6__MASK, 0x08\r
-.set SCSI_Out_DBx__6__PC, CYREG_PRT2_PC3\r
-.set SCSI_Out_DBx__6__PORT, 2\r
-.set SCSI_Out_DBx__6__PRT, CYREG_PRT2_PRT\r
-.set SCSI_Out_DBx__6__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL\r
-.set SCSI_Out_DBx__6__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN\r
-.set SCSI_Out_DBx__6__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0\r
-.set SCSI_Out_DBx__6__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1\r
-.set SCSI_Out_DBx__6__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0\r
-.set SCSI_Out_DBx__6__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1\r
-.set SCSI_Out_DBx__6__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT\r
-.set SCSI_Out_DBx__6__PS, CYREG_PRT2_PS\r
-.set SCSI_Out_DBx__6__SHIFT, 3\r
-.set SCSI_Out_DBx__6__SLW, CYREG_PRT2_SLW\r
-.set SCSI_Out_DBx__7__AG, CYREG_PRT2_AG\r
-.set SCSI_Out_DBx__7__AMUX, CYREG_PRT2_AMUX\r
-.set SCSI_Out_DBx__7__BIE, CYREG_PRT2_BIE\r
-.set SCSI_Out_DBx__7__BIT_MASK, CYREG_PRT2_BIT_MASK\r
-.set SCSI_Out_DBx__7__BYP, CYREG_PRT2_BYP\r
-.set SCSI_Out_DBx__7__CTL, CYREG_PRT2_CTL\r
-.set SCSI_Out_DBx__7__DM0, CYREG_PRT2_DM0\r
-.set SCSI_Out_DBx__7__DM1, CYREG_PRT2_DM1\r
-.set SCSI_Out_DBx__7__DM2, CYREG_PRT2_DM2\r
-.set SCSI_Out_DBx__7__DR, CYREG_PRT2_DR\r
-.set SCSI_Out_DBx__7__INP_DIS, CYREG_PRT2_INP_DIS\r
-.set SCSI_Out_DBx__7__INTTYPE, CYREG_PICU2_INTTYPE2\r
-.set SCSI_Out_DBx__7__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG\r
-.set SCSI_Out_DBx__7__LCD_EN, CYREG_PRT2_LCD_EN\r
-.set SCSI_Out_DBx__7__MASK, 0x04\r
-.set SCSI_Out_DBx__7__PC, CYREG_PRT2_PC2\r
-.set SCSI_Out_DBx__7__PORT, 2\r
-.set SCSI_Out_DBx__7__PRT, CYREG_PRT2_PRT\r
-.set SCSI_Out_DBx__7__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL\r
-.set SCSI_Out_DBx__7__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN\r
-.set SCSI_Out_DBx__7__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0\r
-.set SCSI_Out_DBx__7__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1\r
-.set SCSI_Out_DBx__7__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0\r
-.set SCSI_Out_DBx__7__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1\r
-.set SCSI_Out_DBx__7__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT\r
-.set SCSI_Out_DBx__7__PS, CYREG_PRT2_PS\r
-.set SCSI_Out_DBx__7__SHIFT, 2\r
-.set SCSI_Out_DBx__7__SLW, CYREG_PRT2_SLW\r
-.set SCSI_Out_DBx__DB0__AG, CYREG_PRT5_AG\r
-.set SCSI_Out_DBx__DB0__AMUX, CYREG_PRT5_AMUX\r
-.set SCSI_Out_DBx__DB0__BIE, CYREG_PRT5_BIE\r
-.set SCSI_Out_DBx__DB0__BIT_MASK, CYREG_PRT5_BIT_MASK\r
-.set SCSI_Out_DBx__DB0__BYP, CYREG_PRT5_BYP\r
-.set SCSI_Out_DBx__DB0__CTL, CYREG_PRT5_CTL\r
-.set SCSI_Out_DBx__DB0__DM0, CYREG_PRT5_DM0\r
-.set SCSI_Out_DBx__DB0__DM1, CYREG_PRT5_DM1\r
-.set SCSI_Out_DBx__DB0__DM2, CYREG_PRT5_DM2\r
-.set SCSI_Out_DBx__DB0__DR, CYREG_PRT5_DR\r
-.set SCSI_Out_DBx__DB0__INP_DIS, CYREG_PRT5_INP_DIS\r
-.set SCSI_Out_DBx__DB0__INTTYPE, CYREG_PICU5_INTTYPE1\r
-.set SCSI_Out_DBx__DB0__LCD_COM_SEG, CYREG_PRT5_LCD_COM_SEG\r
-.set SCSI_Out_DBx__DB0__LCD_EN, CYREG_PRT5_LCD_EN\r
-.set SCSI_Out_DBx__DB0__MASK, 0x02\r
-.set SCSI_Out_DBx__DB0__PC, CYREG_PRT5_PC1\r
-.set SCSI_Out_DBx__DB0__PORT, 5\r
-.set SCSI_Out_DBx__DB0__PRT, CYREG_PRT5_PRT\r
-.set SCSI_Out_DBx__DB0__PRTDSI__CAPS_SEL, CYREG_PRT5_CAPS_SEL\r
-.set SCSI_Out_DBx__DB0__PRTDSI__DBL_SYNC_IN, CYREG_PRT5_DBL_SYNC_IN\r
-.set SCSI_Out_DBx__DB0__PRTDSI__OE_SEL0, CYREG_PRT5_OE_SEL0\r
-.set SCSI_Out_DBx__DB0__PRTDSI__OE_SEL1, CYREG_PRT5_OE_SEL1\r
-.set SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL0, CYREG_PRT5_OUT_SEL0\r
-.set SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL1, CYREG_PRT5_OUT_SEL1\r
-.set SCSI_Out_DBx__DB0__PRTDSI__SYNC_OUT, CYREG_PRT5_SYNC_OUT\r
-.set SCSI_Out_DBx__DB0__PS, CYREG_PRT5_PS\r
-.set SCSI_Out_DBx__DB0__SHIFT, 1\r
-.set SCSI_Out_DBx__DB0__SLW, CYREG_PRT5_SLW\r
-.set SCSI_Out_DBx__DB1__AG, CYREG_PRT5_AG\r
-.set SCSI_Out_DBx__DB1__AMUX, CYREG_PRT5_AMUX\r
-.set SCSI_Out_DBx__DB1__BIE, CYREG_PRT5_BIE\r
-.set SCSI_Out_DBx__DB1__BIT_MASK, CYREG_PRT5_BIT_MASK\r
-.set SCSI_Out_DBx__DB1__BYP, CYREG_PRT5_BYP\r
-.set SCSI_Out_DBx__DB1__CTL, CYREG_PRT5_CTL\r
-.set SCSI_Out_DBx__DB1__DM0, CYREG_PRT5_DM0\r
-.set SCSI_Out_DBx__DB1__DM1, CYREG_PRT5_DM1\r
-.set SCSI_Out_DBx__DB1__DM2, CYREG_PRT5_DM2\r
-.set SCSI_Out_DBx__DB1__DR, CYREG_PRT5_DR\r
-.set SCSI_Out_DBx__DB1__INP_DIS, CYREG_PRT5_INP_DIS\r
-.set SCSI_Out_DBx__DB1__INTTYPE, CYREG_PICU5_INTTYPE0\r
-.set SCSI_Out_DBx__DB1__LCD_COM_SEG, CYREG_PRT5_LCD_COM_SEG\r
-.set SCSI_Out_DBx__DB1__LCD_EN, CYREG_PRT5_LCD_EN\r
-.set SCSI_Out_DBx__DB1__MASK, 0x01\r
-.set SCSI_Out_DBx__DB1__PC, CYREG_PRT5_PC0\r
-.set SCSI_Out_DBx__DB1__PORT, 5\r
-.set SCSI_Out_DBx__DB1__PRT, CYREG_PRT5_PRT\r
-.set SCSI_Out_DBx__DB1__PRTDSI__CAPS_SEL, CYREG_PRT5_CAPS_SEL\r
-.set SCSI_Out_DBx__DB1__PRTDSI__DBL_SYNC_IN, CYREG_PRT5_DBL_SYNC_IN\r
-.set SCSI_Out_DBx__DB1__PRTDSI__OE_SEL0, CYREG_PRT5_OE_SEL0\r
-.set SCSI_Out_DBx__DB1__PRTDSI__OE_SEL1, CYREG_PRT5_OE_SEL1\r
-.set SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL0, CYREG_PRT5_OUT_SEL0\r
-.set SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL1, CYREG_PRT5_OUT_SEL1\r
-.set SCSI_Out_DBx__DB1__PRTDSI__SYNC_OUT, CYREG_PRT5_SYNC_OUT\r
-.set SCSI_Out_DBx__DB1__PS, CYREG_PRT5_PS\r
-.set SCSI_Out_DBx__DB1__SHIFT, 0\r
-.set SCSI_Out_DBx__DB1__SLW, CYREG_PRT5_SLW\r
-.set SCSI_Out_DBx__DB2__AG, CYREG_PRT6_AG\r
-.set SCSI_Out_DBx__DB2__AMUX, CYREG_PRT6_AMUX\r
-.set SCSI_Out_DBx__DB2__BIE, CYREG_PRT6_BIE\r
-.set SCSI_Out_DBx__DB2__BIT_MASK, CYREG_PRT6_BIT_MASK\r
-.set SCSI_Out_DBx__DB2__BYP, CYREG_PRT6_BYP\r
-.set SCSI_Out_DBx__DB2__CTL, CYREG_PRT6_CTL\r
-.set SCSI_Out_DBx__DB2__DM0, CYREG_PRT6_DM0\r
-.set SCSI_Out_DBx__DB2__DM1, CYREG_PRT6_DM1\r
-.set SCSI_Out_DBx__DB2__DM2, CYREG_PRT6_DM2\r
-.set SCSI_Out_DBx__DB2__DR, CYREG_PRT6_DR\r
-.set SCSI_Out_DBx__DB2__INP_DIS, CYREG_PRT6_INP_DIS\r
-.set SCSI_Out_DBx__DB2__INTTYPE, CYREG_PICU6_INTTYPE5\r
-.set SCSI_Out_DBx__DB2__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
-.set SCSI_Out_DBx__DB2__LCD_EN, CYREG_PRT6_LCD_EN\r
-.set SCSI_Out_DBx__DB2__MASK, 0x20\r
-.set SCSI_Out_DBx__DB2__PC, CYREG_PRT6_PC5\r
-.set SCSI_Out_DBx__DB2__PORT, 6\r
-.set SCSI_Out_DBx__DB2__PRT, CYREG_PRT6_PRT\r
-.set SCSI_Out_DBx__DB2__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
-.set SCSI_Out_DBx__DB2__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
-.set SCSI_Out_DBx__DB2__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
-.set SCSI_Out_DBx__DB2__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
-.set SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
-.set SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
-.set SCSI_Out_DBx__DB2__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
-.set SCSI_Out_DBx__DB2__PS, CYREG_PRT6_PS\r
-.set SCSI_Out_DBx__DB2__SHIFT, 5\r
-.set SCSI_Out_DBx__DB2__SLW, CYREG_PRT6_SLW\r
-.set SCSI_Out_DBx__DB3__AG, CYREG_PRT6_AG\r
-.set SCSI_Out_DBx__DB3__AMUX, CYREG_PRT6_AMUX\r
-.set SCSI_Out_DBx__DB3__BIE, CYREG_PRT6_BIE\r
-.set SCSI_Out_DBx__DB3__BIT_MASK, CYREG_PRT6_BIT_MASK\r
-.set SCSI_Out_DBx__DB3__BYP, CYREG_PRT6_BYP\r
-.set SCSI_Out_DBx__DB3__CTL, CYREG_PRT6_CTL\r
-.set SCSI_Out_DBx__DB3__DM0, CYREG_PRT6_DM0\r
-.set SCSI_Out_DBx__DB3__DM1, CYREG_PRT6_DM1\r
-.set SCSI_Out_DBx__DB3__DM2, CYREG_PRT6_DM2\r
-.set SCSI_Out_DBx__DB3__DR, CYREG_PRT6_DR\r
-.set SCSI_Out_DBx__DB3__INP_DIS, CYREG_PRT6_INP_DIS\r
-.set SCSI_Out_DBx__DB3__INTTYPE, CYREG_PICU6_INTTYPE4\r
-.set SCSI_Out_DBx__DB3__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
-.set SCSI_Out_DBx__DB3__LCD_EN, CYREG_PRT6_LCD_EN\r
-.set SCSI_Out_DBx__DB3__MASK, 0x10\r
-.set SCSI_Out_DBx__DB3__PC, CYREG_PRT6_PC4\r
-.set SCSI_Out_DBx__DB3__PORT, 6\r
-.set SCSI_Out_DBx__DB3__PRT, CYREG_PRT6_PRT\r
-.set SCSI_Out_DBx__DB3__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
-.set SCSI_Out_DBx__DB3__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
-.set SCSI_Out_DBx__DB3__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
-.set SCSI_Out_DBx__DB3__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
-.set SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
-.set SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
-.set SCSI_Out_DBx__DB3__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
-.set SCSI_Out_DBx__DB3__PS, CYREG_PRT6_PS\r
-.set SCSI_Out_DBx__DB3__SHIFT, 4\r
-.set SCSI_Out_DBx__DB3__SLW, CYREG_PRT6_SLW\r
-.set SCSI_Out_DBx__DB4__AG, CYREG_PRT2_AG\r
-.set SCSI_Out_DBx__DB4__AMUX, CYREG_PRT2_AMUX\r
-.set SCSI_Out_DBx__DB4__BIE, CYREG_PRT2_BIE\r
-.set SCSI_Out_DBx__DB4__BIT_MASK, CYREG_PRT2_BIT_MASK\r
-.set SCSI_Out_DBx__DB4__BYP, CYREG_PRT2_BYP\r
-.set SCSI_Out_DBx__DB4__CTL, CYREG_PRT2_CTL\r
-.set SCSI_Out_DBx__DB4__DM0, CYREG_PRT2_DM0\r
-.set SCSI_Out_DBx__DB4__DM1, CYREG_PRT2_DM1\r
-.set SCSI_Out_DBx__DB4__DM2, CYREG_PRT2_DM2\r
-.set SCSI_Out_DBx__DB4__DR, CYREG_PRT2_DR\r
-.set SCSI_Out_DBx__DB4__INP_DIS, CYREG_PRT2_INP_DIS\r
-.set SCSI_Out_DBx__DB4__INTTYPE, CYREG_PICU2_INTTYPE7\r
-.set SCSI_Out_DBx__DB4__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG\r
-.set SCSI_Out_DBx__DB4__LCD_EN, CYREG_PRT2_LCD_EN\r
-.set SCSI_Out_DBx__DB4__MASK, 0x80\r
-.set SCSI_Out_DBx__DB4__PC, CYREG_PRT2_PC7\r
-.set SCSI_Out_DBx__DB4__PORT, 2\r
-.set SCSI_Out_DBx__DB4__PRT, CYREG_PRT2_PRT\r
-.set SCSI_Out_DBx__DB4__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL\r
-.set SCSI_Out_DBx__DB4__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN\r
-.set SCSI_Out_DBx__DB4__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0\r
-.set SCSI_Out_DBx__DB4__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1\r
-.set SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0\r
-.set SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1\r
-.set SCSI_Out_DBx__DB4__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT\r
-.set SCSI_Out_DBx__DB4__PS, CYREG_PRT2_PS\r
-.set SCSI_Out_DBx__DB4__SHIFT, 7\r
-.set SCSI_Out_DBx__DB4__SLW, CYREG_PRT2_SLW\r
-.set SCSI_Out_DBx__DB5__AG, CYREG_PRT2_AG\r
-.set SCSI_Out_DBx__DB5__AMUX, CYREG_PRT2_AMUX\r
-.set SCSI_Out_DBx__DB5__BIE, CYREG_PRT2_BIE\r
-.set SCSI_Out_DBx__DB5__BIT_MASK, CYREG_PRT2_BIT_MASK\r
-.set SCSI_Out_DBx__DB5__BYP, CYREG_PRT2_BYP\r
-.set SCSI_Out_DBx__DB5__CTL, CYREG_PRT2_CTL\r
-.set SCSI_Out_DBx__DB5__DM0, CYREG_PRT2_DM0\r
-.set SCSI_Out_DBx__DB5__DM1, CYREG_PRT2_DM1\r
-.set SCSI_Out_DBx__DB5__DM2, CYREG_PRT2_DM2\r
-.set SCSI_Out_DBx__DB5__DR, CYREG_PRT2_DR\r
-.set SCSI_Out_DBx__DB5__INP_DIS, CYREG_PRT2_INP_DIS\r
-.set SCSI_Out_DBx__DB5__INTTYPE, CYREG_PICU2_INTTYPE6\r
-.set SCSI_Out_DBx__DB5__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG\r
-.set SCSI_Out_DBx__DB5__LCD_EN, CYREG_PRT2_LCD_EN\r
-.set SCSI_Out_DBx__DB5__MASK, 0x40\r
-.set SCSI_Out_DBx__DB5__PC, CYREG_PRT2_PC6\r
-.set SCSI_Out_DBx__DB5__PORT, 2\r
-.set SCSI_Out_DBx__DB5__PRT, CYREG_PRT2_PRT\r
-.set SCSI_Out_DBx__DB5__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL\r
-.set SCSI_Out_DBx__DB5__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN\r
-.set SCSI_Out_DBx__DB5__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0\r
-.set SCSI_Out_DBx__DB5__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1\r
-.set SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0\r
-.set SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1\r
-.set SCSI_Out_DBx__DB5__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT\r
-.set SCSI_Out_DBx__DB5__PS, CYREG_PRT2_PS\r
-.set SCSI_Out_DBx__DB5__SHIFT, 6\r
-.set SCSI_Out_DBx__DB5__SLW, CYREG_PRT2_SLW\r
-.set SCSI_Out_DBx__DB6__AG, CYREG_PRT2_AG\r
-.set SCSI_Out_DBx__DB6__AMUX, CYREG_PRT2_AMUX\r
-.set SCSI_Out_DBx__DB6__BIE, CYREG_PRT2_BIE\r
-.set SCSI_Out_DBx__DB6__BIT_MASK, CYREG_PRT2_BIT_MASK\r
-.set SCSI_Out_DBx__DB6__BYP, CYREG_PRT2_BYP\r
-.set SCSI_Out_DBx__DB6__CTL, CYREG_PRT2_CTL\r
-.set SCSI_Out_DBx__DB6__DM0, CYREG_PRT2_DM0\r
-.set SCSI_Out_DBx__DB6__DM1, CYREG_PRT2_DM1\r
-.set SCSI_Out_DBx__DB6__DM2, CYREG_PRT2_DM2\r
-.set SCSI_Out_DBx__DB6__DR, CYREG_PRT2_DR\r
-.set SCSI_Out_DBx__DB6__INP_DIS, CYREG_PRT2_INP_DIS\r
-.set SCSI_Out_DBx__DB6__INTTYPE, CYREG_PICU2_INTTYPE3\r
-.set SCSI_Out_DBx__DB6__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG\r
-.set SCSI_Out_DBx__DB6__LCD_EN, CYREG_PRT2_LCD_EN\r
-.set SCSI_Out_DBx__DB6__MASK, 0x08\r
-.set SCSI_Out_DBx__DB6__PC, CYREG_PRT2_PC3\r
-.set SCSI_Out_DBx__DB6__PORT, 2\r
-.set SCSI_Out_DBx__DB6__PRT, CYREG_PRT2_PRT\r
-.set SCSI_Out_DBx__DB6__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL\r
-.set SCSI_Out_DBx__DB6__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN\r
-.set SCSI_Out_DBx__DB6__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0\r
-.set SCSI_Out_DBx__DB6__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1\r
-.set SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0\r
-.set SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1\r
-.set SCSI_Out_DBx__DB6__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT\r
-.set SCSI_Out_DBx__DB6__PS, CYREG_PRT2_PS\r
-.set SCSI_Out_DBx__DB6__SHIFT, 3\r
-.set SCSI_Out_DBx__DB6__SLW, CYREG_PRT2_SLW\r
-.set SCSI_Out_DBx__DB7__AG, CYREG_PRT2_AG\r
-.set SCSI_Out_DBx__DB7__AMUX, CYREG_PRT2_AMUX\r
-.set SCSI_Out_DBx__DB7__BIE, CYREG_PRT2_BIE\r
-.set SCSI_Out_DBx__DB7__BIT_MASK, CYREG_PRT2_BIT_MASK\r
-.set SCSI_Out_DBx__DB7__BYP, CYREG_PRT2_BYP\r
-.set SCSI_Out_DBx__DB7__CTL, CYREG_PRT2_CTL\r
-.set SCSI_Out_DBx__DB7__DM0, CYREG_PRT2_DM0\r
-.set SCSI_Out_DBx__DB7__DM1, CYREG_PRT2_DM1\r
-.set SCSI_Out_DBx__DB7__DM2, CYREG_PRT2_DM2\r
-.set SCSI_Out_DBx__DB7__DR, CYREG_PRT2_DR\r
-.set SCSI_Out_DBx__DB7__INP_DIS, CYREG_PRT2_INP_DIS\r
-.set SCSI_Out_DBx__DB7__INTTYPE, CYREG_PICU2_INTTYPE2\r
-.set SCSI_Out_DBx__DB7__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG\r
-.set SCSI_Out_DBx__DB7__LCD_EN, CYREG_PRT2_LCD_EN\r
-.set SCSI_Out_DBx__DB7__MASK, 0x04\r
-.set SCSI_Out_DBx__DB7__PC, CYREG_PRT2_PC2\r
-.set SCSI_Out_DBx__DB7__PORT, 2\r
-.set SCSI_Out_DBx__DB7__PRT, CYREG_PRT2_PRT\r
-.set SCSI_Out_DBx__DB7__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL\r
-.set SCSI_Out_DBx__DB7__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN\r
-.set SCSI_Out_DBx__DB7__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0\r
-.set SCSI_Out_DBx__DB7__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1\r
-.set SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0\r
-.set SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1\r
-.set SCSI_Out_DBx__DB7__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT\r
-.set SCSI_Out_DBx__DB7__PS, CYREG_PRT2_PS\r
-.set SCSI_Out_DBx__DB7__SHIFT, 2\r
-.set SCSI_Out_DBx__DB7__SLW, CYREG_PRT2_SLW\r
-\r
-/* SCSI_Parity_Error */\r
-.set SCSI_Parity_Error_sts_sts_reg__0__MASK, 0x01\r
-.set SCSI_Parity_Error_sts_sts_reg__0__POS, 0\r
-.set SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG, CYREG_B0_UDB05_06_ACTL\r
-.set SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_REG, CYREG_B0_UDB05_06_ST\r
-.set SCSI_Parity_Error_sts_sts_reg__MASK, 0x01\r
-.set SCSI_Parity_Error_sts_sts_reg__MASK_REG, CYREG_B0_UDB05_MSK\r
-.set SCSI_Parity_Error_sts_sts_reg__STATUS_AUX_CTL_REG, CYREG_B0_UDB05_ACTL\r
-.set SCSI_Parity_Error_sts_sts_reg__STATUS_REG, CYREG_B0_UDB05_ST\r
-\r
-/* SCSI_RST_ISR */\r
-.set SCSI_RST_ISR__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0\r
-.set SCSI_RST_ISR__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0\r
-.set SCSI_RST_ISR__INTC_MASK, 0x02\r
-.set SCSI_RST_ISR__INTC_NUMBER, 1\r
-.set SCSI_RST_ISR__INTC_PRIOR_NUM, 7\r
-.set SCSI_RST_ISR__INTC_PRIOR_REG, CYREG_NVIC_PRI_1\r
-.set SCSI_RST_ISR__INTC_SET_EN_REG, CYREG_NVIC_SETENA0\r
-.set SCSI_RST_ISR__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0\r
-\r
-/* SCSI_RX_DMA */\r
-.set SCSI_RX_DMA__DRQ_CTL, CYREG_IDMUX_DRQ_CTL0\r
-.set SCSI_RX_DMA__DRQ_NUMBER, 0\r
-.set SCSI_RX_DMA__NUMBEROF_TDS, 0\r
-.set SCSI_RX_DMA__PRIORITY, 2\r
-.set SCSI_RX_DMA__TERMIN_EN, 0\r
-.set SCSI_RX_DMA__TERMIN_SEL, 0\r
-.set SCSI_RX_DMA__TERMOUT0_EN, 1\r
-.set SCSI_RX_DMA__TERMOUT0_SEL, 0\r
-.set SCSI_RX_DMA__TERMOUT1_EN, 0\r
-.set SCSI_RX_DMA__TERMOUT1_SEL, 0\r
-.set SCSI_RX_DMA_COMPLETE__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0\r
-.set SCSI_RX_DMA_COMPLETE__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0\r
-.set SCSI_RX_DMA_COMPLETE__INTC_MASK, 0x04\r
-.set SCSI_RX_DMA_COMPLETE__INTC_NUMBER, 2\r
-.set SCSI_RX_DMA_COMPLETE__INTC_PRIOR_NUM, 7\r
-.set SCSI_RX_DMA_COMPLETE__INTC_PRIOR_REG, CYREG_NVIC_PRI_2\r
-.set SCSI_RX_DMA_COMPLETE__INTC_SET_EN_REG, CYREG_NVIC_SETENA0\r
-.set SCSI_RX_DMA_COMPLETE__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0\r
-\r
-/* SCSI_SEL_ISR */\r
-.set SCSI_SEL_ISR__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0\r
-.set SCSI_SEL_ISR__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0\r
-.set SCSI_SEL_ISR__INTC_MASK, 0x08\r
-.set SCSI_SEL_ISR__INTC_NUMBER, 3\r
-.set SCSI_SEL_ISR__INTC_PRIOR_NUM, 7\r
-.set SCSI_SEL_ISR__INTC_PRIOR_REG, CYREG_NVIC_PRI_3\r
-.set SCSI_SEL_ISR__INTC_SET_EN_REG, CYREG_NVIC_SETENA0\r
-.set SCSI_SEL_ISR__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0\r
-\r
-/* SCSI_TX_DMA */\r
-.set SCSI_TX_DMA__DRQ_CTL, CYREG_IDMUX_DRQ_CTL0\r
-.set SCSI_TX_DMA__DRQ_NUMBER, 1\r
-.set SCSI_TX_DMA__NUMBEROF_TDS, 0\r
-.set SCSI_TX_DMA__PRIORITY, 2\r
-.set SCSI_TX_DMA__TERMIN_EN, 0\r
-.set SCSI_TX_DMA__TERMIN_SEL, 0\r
-.set SCSI_TX_DMA__TERMOUT0_EN, 1\r
-.set SCSI_TX_DMA__TERMOUT0_SEL, 1\r
-.set SCSI_TX_DMA__TERMOUT1_EN, 0\r
-.set SCSI_TX_DMA__TERMOUT1_SEL, 0\r
-.set SCSI_TX_DMA_COMPLETE__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0\r
-.set SCSI_TX_DMA_COMPLETE__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0\r
-.set SCSI_TX_DMA_COMPLETE__INTC_MASK, 0x10\r
-.set SCSI_TX_DMA_COMPLETE__INTC_NUMBER, 4\r
-.set SCSI_TX_DMA_COMPLETE__INTC_PRIOR_NUM, 7\r
-.set SCSI_TX_DMA_COMPLETE__INTC_PRIOR_REG, CYREG_NVIC_PRI_4\r
-.set SCSI_TX_DMA_COMPLETE__INTC_SET_EN_REG, CYREG_NVIC_SETENA0\r
-.set SCSI_TX_DMA_COMPLETE__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0\r
-\r
-/* SDCard_BSPIM */\r
-.set SDCard_BSPIM_BitCounter__16BIT_CONTROL_AUX_CTL_REG, CYREG_B1_UDB05_06_ACTL\r
-.set SDCard_BSPIM_BitCounter__16BIT_CONTROL_CONTROL_REG, CYREG_B1_UDB05_06_CTL\r
-.set SDCard_BSPIM_BitCounter__16BIT_CONTROL_COUNT_REG, CYREG_B1_UDB05_06_CTL\r
-.set SDCard_BSPIM_BitCounter__16BIT_COUNT_CONTROL_REG, CYREG_B1_UDB05_06_CTL\r
-.set SDCard_BSPIM_BitCounter__16BIT_COUNT_COUNT_REG, CYREG_B1_UDB05_06_CTL\r
-.set SDCard_BSPIM_BitCounter__16BIT_MASK_MASK_REG, CYREG_B1_UDB05_06_MSK\r
-.set SDCard_BSPIM_BitCounter__16BIT_MASK_PERIOD_REG, CYREG_B1_UDB05_06_MSK\r
-.set SDCard_BSPIM_BitCounter__16BIT_PERIOD_MASK_REG, CYREG_B1_UDB05_06_MSK\r
-.set SDCard_BSPIM_BitCounter__16BIT_PERIOD_PERIOD_REG, CYREG_B1_UDB05_06_MSK\r
-.set SDCard_BSPIM_BitCounter__CONTROL_AUX_CTL_REG, CYREG_B1_UDB05_ACTL\r
-.set SDCard_BSPIM_BitCounter__CONTROL_REG, CYREG_B1_UDB05_CTL\r
-.set SDCard_BSPIM_BitCounter__CONTROL_ST_REG, CYREG_B1_UDB05_ST_CTL\r
-.set SDCard_BSPIM_BitCounter__COUNT_REG, CYREG_B1_UDB05_CTL\r
-.set SDCard_BSPIM_BitCounter__COUNT_ST_REG, CYREG_B1_UDB05_ST_CTL\r
-.set SDCard_BSPIM_BitCounter__MASK_CTL_AUX_CTL_REG, CYREG_B1_UDB05_MSK_ACTL\r
-.set SDCard_BSPIM_BitCounter__PER_CTL_AUX_CTL_REG, CYREG_B1_UDB05_MSK_ACTL\r
-.set SDCard_BSPIM_BitCounter__PERIOD_REG, CYREG_B1_UDB05_MSK\r
-.set SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_AUX_CTL_REG, CYREG_B1_UDB05_06_ACTL\r
-.set SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_REG, CYREG_B1_UDB05_06_ST\r
-.set SDCard_BSPIM_BitCounter_ST__MASK_REG, CYREG_B1_UDB05_MSK\r
-.set SDCard_BSPIM_BitCounter_ST__MASK_ST_AUX_CTL_REG, CYREG_B1_UDB05_MSK_ACTL\r
-.set SDCard_BSPIM_BitCounter_ST__PER_ST_AUX_CTL_REG, CYREG_B1_UDB05_MSK_ACTL\r
-.set SDCard_BSPIM_BitCounter_ST__STATUS_AUX_CTL_REG, CYREG_B1_UDB05_ACTL\r
-.set SDCard_BSPIM_BitCounter_ST__STATUS_CNT_REG, CYREG_B1_UDB05_ST_CTL\r
-.set SDCard_BSPIM_BitCounter_ST__STATUS_CONTROL_REG, CYREG_B1_UDB05_ST_CTL\r
-.set SDCard_BSPIM_BitCounter_ST__STATUS_REG, CYREG_B1_UDB05_ST\r
-.set SDCard_BSPIM_RxStsReg__16BIT_STATUS_AUX_CTL_REG, CYREG_B1_UDB07_08_ACTL\r
-.set SDCard_BSPIM_RxStsReg__16BIT_STATUS_REG, CYREG_B1_UDB07_08_ST\r
-.set SDCard_BSPIM_RxStsReg__4__MASK, 0x10\r
-.set SDCard_BSPIM_RxStsReg__4__POS, 4\r
-.set SDCard_BSPIM_RxStsReg__5__MASK, 0x20\r
-.set SDCard_BSPIM_RxStsReg__5__POS, 5\r
-.set SDCard_BSPIM_RxStsReg__6__MASK, 0x40\r
-.set SDCard_BSPIM_RxStsReg__6__POS, 6\r
-.set SDCard_BSPIM_RxStsReg__MASK, 0x70\r
-.set SDCard_BSPIM_RxStsReg__MASK_REG, CYREG_B1_UDB07_MSK\r
-.set SDCard_BSPIM_RxStsReg__STATUS_AUX_CTL_REG, CYREG_B1_UDB07_ACTL\r
-.set SDCard_BSPIM_RxStsReg__STATUS_REG, CYREG_B1_UDB07_ST\r
-.set SDCard_BSPIM_sR8_Dp_u0__16BIT_A0_REG, CYREG_B1_UDB04_05_A0\r
-.set SDCard_BSPIM_sR8_Dp_u0__16BIT_A1_REG, CYREG_B1_UDB04_05_A1\r
-.set SDCard_BSPIM_sR8_Dp_u0__16BIT_D0_REG, CYREG_B1_UDB04_05_D0\r
-.set SDCard_BSPIM_sR8_Dp_u0__16BIT_D1_REG, CYREG_B1_UDB04_05_D1\r
-.set SDCard_BSPIM_sR8_Dp_u0__16BIT_DP_AUX_CTL_REG, CYREG_B1_UDB04_05_ACTL\r
-.set SDCard_BSPIM_sR8_Dp_u0__16BIT_F0_REG, CYREG_B1_UDB04_05_F0\r
-.set SDCard_BSPIM_sR8_Dp_u0__16BIT_F1_REG, CYREG_B1_UDB04_05_F1\r
-.set SDCard_BSPIM_sR8_Dp_u0__A0_A1_REG, CYREG_B1_UDB04_A0_A1\r
-.set SDCard_BSPIM_sR8_Dp_u0__A0_REG, CYREG_B1_UDB04_A0\r
-.set SDCard_BSPIM_sR8_Dp_u0__A1_REG, CYREG_B1_UDB04_A1\r
-.set SDCard_BSPIM_sR8_Dp_u0__D0_D1_REG, CYREG_B1_UDB04_D0_D1\r
-.set SDCard_BSPIM_sR8_Dp_u0__D0_REG, CYREG_B1_UDB04_D0\r
-.set SDCard_BSPIM_sR8_Dp_u0__D1_REG, CYREG_B1_UDB04_D1\r
-.set SDCard_BSPIM_sR8_Dp_u0__DP_AUX_CTL_REG, CYREG_B1_UDB04_ACTL\r
-.set SDCard_BSPIM_sR8_Dp_u0__F0_F1_REG, CYREG_B1_UDB04_F0_F1\r
-.set SDCard_BSPIM_sR8_Dp_u0__F0_REG, CYREG_B1_UDB04_F0\r
-.set SDCard_BSPIM_sR8_Dp_u0__F1_REG, CYREG_B1_UDB04_F1\r
-.set SDCard_BSPIM_TxStsReg__0__MASK, 0x01\r
-.set SDCard_BSPIM_TxStsReg__0__POS, 0\r
-.set SDCard_BSPIM_TxStsReg__1__MASK, 0x02\r
-.set SDCard_BSPIM_TxStsReg__1__POS, 1\r
-.set SDCard_BSPIM_TxStsReg__16BIT_STATUS_AUX_CTL_REG, CYREG_B1_UDB06_07_ACTL\r
-.set SDCard_BSPIM_TxStsReg__16BIT_STATUS_REG, CYREG_B1_UDB06_07_ST\r
-.set SDCard_BSPIM_TxStsReg__2__MASK, 0x04\r
-.set SDCard_BSPIM_TxStsReg__2__POS, 2\r
-.set SDCard_BSPIM_TxStsReg__3__MASK, 0x08\r
-.set SDCard_BSPIM_TxStsReg__3__POS, 3\r
-.set SDCard_BSPIM_TxStsReg__4__MASK, 0x10\r
-.set SDCard_BSPIM_TxStsReg__4__POS, 4\r
-.set SDCard_BSPIM_TxStsReg__MASK, 0x1F\r
-.set SDCard_BSPIM_TxStsReg__MASK_REG, CYREG_B1_UDB06_MSK\r
-.set SDCard_BSPIM_TxStsReg__STATUS_AUX_CTL_REG, CYREG_B1_UDB06_ACTL\r
-.set SDCard_BSPIM_TxStsReg__STATUS_REG, CYREG_B1_UDB06_ST\r
-\r
-/* SD_CD */\r
-.set SD_CD__0__INTTYPE, CYREG_PICU3_INTTYPE5\r
-.set SD_CD__0__MASK, 0x20\r
-.set SD_CD__0__PC, CYREG_PRT3_PC5\r
-.set SD_CD__0__PORT, 3\r
-.set SD_CD__0__SHIFT, 5\r
-.set SD_CD__AG, CYREG_PRT3_AG\r
-.set SD_CD__AMUX, CYREG_PRT3_AMUX\r
-.set SD_CD__BIE, CYREG_PRT3_BIE\r
-.set SD_CD__BIT_MASK, CYREG_PRT3_BIT_MASK\r
-.set SD_CD__BYP, CYREG_PRT3_BYP\r
-.set SD_CD__CTL, CYREG_PRT3_CTL\r
-.set SD_CD__DM0, CYREG_PRT3_DM0\r
-.set SD_CD__DM1, CYREG_PRT3_DM1\r
-.set SD_CD__DM2, CYREG_PRT3_DM2\r
-.set SD_CD__DR, CYREG_PRT3_DR\r
-.set SD_CD__INP_DIS, CYREG_PRT3_INP_DIS\r
-.set SD_CD__INTTYPE_BASE, CYDEV_PICU_INTTYPE_PICU3_BASE\r
-.set SD_CD__LCD_COM_SEG, CYREG_PRT3_LCD_COM_SEG\r
-.set SD_CD__LCD_EN, CYREG_PRT3_LCD_EN\r
-.set SD_CD__MASK, 0x20\r
-.set SD_CD__PORT, 3\r
-.set SD_CD__PRT, CYREG_PRT3_PRT\r
-.set SD_CD__PRTDSI__CAPS_SEL, CYREG_PRT3_CAPS_SEL\r
-.set SD_CD__PRTDSI__DBL_SYNC_IN, CYREG_PRT3_DBL_SYNC_IN\r
-.set SD_CD__PRTDSI__OE_SEL0, CYREG_PRT3_OE_SEL0\r
-.set SD_CD__PRTDSI__OE_SEL1, CYREG_PRT3_OE_SEL1\r
-.set SD_CD__PRTDSI__OUT_SEL0, CYREG_PRT3_OUT_SEL0\r
-.set SD_CD__PRTDSI__OUT_SEL1, CYREG_PRT3_OUT_SEL1\r
-.set SD_CD__PRTDSI__SYNC_OUT, CYREG_PRT3_SYNC_OUT\r
-.set SD_CD__PS, CYREG_PRT3_PS\r
-.set SD_CD__SHIFT, 5\r
-.set SD_CD__SLW, CYREG_PRT3_SLW\r
-\r
-/* SD_CS */\r
-.set SD_CS__0__INTTYPE, CYREG_PICU3_INTTYPE4\r
-.set SD_CS__0__MASK, 0x10\r
-.set SD_CS__0__PC, CYREG_PRT3_PC4\r
-.set SD_CS__0__PORT, 3\r
-.set SD_CS__0__SHIFT, 4\r
-.set SD_CS__AG, CYREG_PRT3_AG\r
-.set SD_CS__AMUX, CYREG_PRT3_AMUX\r
-.set SD_CS__BIE, CYREG_PRT3_BIE\r
-.set SD_CS__BIT_MASK, CYREG_PRT3_BIT_MASK\r
-.set SD_CS__BYP, CYREG_PRT3_BYP\r
-.set SD_CS__CTL, CYREG_PRT3_CTL\r
-.set SD_CS__DM0, CYREG_PRT3_DM0\r
-.set SD_CS__DM1, CYREG_PRT3_DM1\r
-.set SD_CS__DM2, CYREG_PRT3_DM2\r
-.set SD_CS__DR, CYREG_PRT3_DR\r
-.set SD_CS__INP_DIS, CYREG_PRT3_INP_DIS\r
-.set SD_CS__INTTYPE_BASE, CYDEV_PICU_INTTYPE_PICU3_BASE\r
-.set SD_CS__LCD_COM_SEG, CYREG_PRT3_LCD_COM_SEG\r
-.set SD_CS__LCD_EN, CYREG_PRT3_LCD_EN\r
-.set SD_CS__MASK, 0x10\r
-.set SD_CS__PORT, 3\r
-.set SD_CS__PRT, CYREG_PRT3_PRT\r
-.set SD_CS__PRTDSI__CAPS_SEL, CYREG_PRT3_CAPS_SEL\r
-.set SD_CS__PRTDSI__DBL_SYNC_IN, CYREG_PRT3_DBL_SYNC_IN\r
-.set SD_CS__PRTDSI__OE_SEL0, CYREG_PRT3_OE_SEL0\r
-.set SD_CS__PRTDSI__OE_SEL1, CYREG_PRT3_OE_SEL1\r
-.set SD_CS__PRTDSI__OUT_SEL0, CYREG_PRT3_OUT_SEL0\r
-.set SD_CS__PRTDSI__OUT_SEL1, CYREG_PRT3_OUT_SEL1\r
-.set SD_CS__PRTDSI__SYNC_OUT, CYREG_PRT3_SYNC_OUT\r
-.set SD_CS__PS, CYREG_PRT3_PS\r
-.set SD_CS__SHIFT, 4\r
-.set SD_CS__SLW, CYREG_PRT3_SLW\r
-\r
-/* SD_Data_Clk */\r
-.set SD_Data_Clk__CFG0, CYREG_CLKDIST_DCFG0_CFG0\r
-.set SD_Data_Clk__CFG1, CYREG_CLKDIST_DCFG0_CFG1\r
-.set SD_Data_Clk__CFG2, CYREG_CLKDIST_DCFG0_CFG2\r
-.set SD_Data_Clk__CFG2_SRC_SEL_MASK, 0x07\r
-.set SD_Data_Clk__INDEX, 0x00\r
-.set SD_Data_Clk__PM_ACT_CFG, CYREG_PM_ACT_CFG2\r
-.set SD_Data_Clk__PM_ACT_MSK, 0x01\r
-.set SD_Data_Clk__PM_STBY_CFG, CYREG_PM_STBY_CFG2\r
-.set SD_Data_Clk__PM_STBY_MSK, 0x01\r
-\r
-/* SD_MISO */\r
-.set SD_MISO__0__INTTYPE, CYREG_PICU3_INTTYPE1\r
-.set SD_MISO__0__MASK, 0x02\r
-.set SD_MISO__0__PC, CYREG_PRT3_PC1\r
-.set SD_MISO__0__PORT, 3\r
-.set SD_MISO__0__SHIFT, 1\r
-.set SD_MISO__AG, CYREG_PRT3_AG\r
-.set SD_MISO__AMUX, CYREG_PRT3_AMUX\r
-.set SD_MISO__BIE, CYREG_PRT3_BIE\r
-.set SD_MISO__BIT_MASK, CYREG_PRT3_BIT_MASK\r
-.set SD_MISO__BYP, CYREG_PRT3_BYP\r
-.set SD_MISO__CTL, CYREG_PRT3_CTL\r
-.set SD_MISO__DM0, CYREG_PRT3_DM0\r
-.set SD_MISO__DM1, CYREG_PRT3_DM1\r
-.set SD_MISO__DM2, CYREG_PRT3_DM2\r
-.set SD_MISO__DR, CYREG_PRT3_DR\r
-.set SD_MISO__INP_DIS, CYREG_PRT3_INP_DIS\r
-.set SD_MISO__INTTYPE_BASE, CYDEV_PICU_INTTYPE_PICU3_BASE\r
-.set SD_MISO__LCD_COM_SEG, CYREG_PRT3_LCD_COM_SEG\r
-.set SD_MISO__LCD_EN, CYREG_PRT3_LCD_EN\r
-.set SD_MISO__MASK, 0x02\r
-.set SD_MISO__PORT, 3\r
-.set SD_MISO__PRT, CYREG_PRT3_PRT\r
-.set SD_MISO__PRTDSI__CAPS_SEL, CYREG_PRT3_CAPS_SEL\r
-.set SD_MISO__PRTDSI__DBL_SYNC_IN, CYREG_PRT3_DBL_SYNC_IN\r
-.set SD_MISO__PRTDSI__OE_SEL0, CYREG_PRT3_OE_SEL0\r
-.set SD_MISO__PRTDSI__OE_SEL1, CYREG_PRT3_OE_SEL1\r
-.set SD_MISO__PRTDSI__OUT_SEL0, CYREG_PRT3_OUT_SEL0\r
-.set SD_MISO__PRTDSI__OUT_SEL1, CYREG_PRT3_OUT_SEL1\r
-.set SD_MISO__PRTDSI__SYNC_OUT, CYREG_PRT3_SYNC_OUT\r
-.set SD_MISO__PS, CYREG_PRT3_PS\r
-.set SD_MISO__SHIFT, 1\r
-.set SD_MISO__SLW, CYREG_PRT3_SLW\r
-\r
-/* SD_MOSI */\r
-.set SD_MOSI__0__INTTYPE, CYREG_PICU3_INTTYPE3\r
-.set SD_MOSI__0__MASK, 0x08\r
-.set SD_MOSI__0__PC, CYREG_PRT3_PC3\r
-.set SD_MOSI__0__PORT, 3\r
-.set SD_MOSI__0__SHIFT, 3\r
-.set SD_MOSI__AG, CYREG_PRT3_AG\r
-.set SD_MOSI__AMUX, CYREG_PRT3_AMUX\r
-.set SD_MOSI__BIE, CYREG_PRT3_BIE\r
-.set SD_MOSI__BIT_MASK, CYREG_PRT3_BIT_MASK\r
-.set SD_MOSI__BYP, CYREG_PRT3_BYP\r
-.set SD_MOSI__CTL, CYREG_PRT3_CTL\r
-.set SD_MOSI__DM0, CYREG_PRT3_DM0\r
-.set SD_MOSI__DM1, CYREG_PRT3_DM1\r
-.set SD_MOSI__DM2, CYREG_PRT3_DM2\r
-.set SD_MOSI__DR, CYREG_PRT3_DR\r
-.set SD_MOSI__INP_DIS, CYREG_PRT3_INP_DIS\r
-.set SD_MOSI__INTTYPE_BASE, CYDEV_PICU_INTTYPE_PICU3_BASE\r
-.set SD_MOSI__LCD_COM_SEG, CYREG_PRT3_LCD_COM_SEG\r
-.set SD_MOSI__LCD_EN, CYREG_PRT3_LCD_EN\r
-.set SD_MOSI__MASK, 0x08\r
-.set SD_MOSI__PORT, 3\r
-.set SD_MOSI__PRT, CYREG_PRT3_PRT\r
-.set SD_MOSI__PRTDSI__CAPS_SEL, CYREG_PRT3_CAPS_SEL\r
-.set SD_MOSI__PRTDSI__DBL_SYNC_IN, CYREG_PRT3_DBL_SYNC_IN\r
-.set SD_MOSI__PRTDSI__OE_SEL0, CYREG_PRT3_OE_SEL0\r
-.set SD_MOSI__PRTDSI__OE_SEL1, CYREG_PRT3_OE_SEL1\r
-.set SD_MOSI__PRTDSI__OUT_SEL0, CYREG_PRT3_OUT_SEL0\r
-.set SD_MOSI__PRTDSI__OUT_SEL1, CYREG_PRT3_OUT_SEL1\r
-.set SD_MOSI__PRTDSI__SYNC_OUT, CYREG_PRT3_SYNC_OUT\r
-.set SD_MOSI__PS, CYREG_PRT3_PS\r
-.set SD_MOSI__SHIFT, 3\r
-.set SD_MOSI__SLW, CYREG_PRT3_SLW\r
-\r
-/* SD_RX_DMA */\r
-.set SD_RX_DMA__DRQ_CTL, CYREG_IDMUX_DRQ_CTL0\r
-.set SD_RX_DMA__DRQ_NUMBER, 2\r
-.set SD_RX_DMA__NUMBEROF_TDS, 0\r
-.set SD_RX_DMA__PRIORITY, 0\r
-.set SD_RX_DMA__TERMIN_EN, 0\r
-.set SD_RX_DMA__TERMIN_SEL, 0\r
-.set SD_RX_DMA__TERMOUT0_EN, 1\r
-.set SD_RX_DMA__TERMOUT0_SEL, 2\r
-.set SD_RX_DMA__TERMOUT1_EN, 0\r
-.set SD_RX_DMA__TERMOUT1_SEL, 0\r
-.set SD_RX_DMA_COMPLETE__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0\r
-.set SD_RX_DMA_COMPLETE__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0\r
-.set SD_RX_DMA_COMPLETE__INTC_MASK, 0x20\r
-.set SD_RX_DMA_COMPLETE__INTC_NUMBER, 5\r
-.set SD_RX_DMA_COMPLETE__INTC_PRIOR_NUM, 7\r
-.set SD_RX_DMA_COMPLETE__INTC_PRIOR_REG, CYREG_NVIC_PRI_5\r
-.set SD_RX_DMA_COMPLETE__INTC_SET_EN_REG, CYREG_NVIC_SETENA0\r
-.set SD_RX_DMA_COMPLETE__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0\r
-\r
-/* SD_SCK */\r
-.set SD_SCK__0__INTTYPE, CYREG_PICU3_INTTYPE2\r
-.set SD_SCK__0__MASK, 0x04\r
-.set SD_SCK__0__PC, CYREG_PRT3_PC2\r
-.set SD_SCK__0__PORT, 3\r
-.set SD_SCK__0__SHIFT, 2\r
-.set SD_SCK__AG, CYREG_PRT3_AG\r
-.set SD_SCK__AMUX, CYREG_PRT3_AMUX\r
-.set SD_SCK__BIE, CYREG_PRT3_BIE\r
-.set SD_SCK__BIT_MASK, CYREG_PRT3_BIT_MASK\r
-.set SD_SCK__BYP, CYREG_PRT3_BYP\r
-.set SD_SCK__CTL, CYREG_PRT3_CTL\r
-.set SD_SCK__DM0, CYREG_PRT3_DM0\r
-.set SD_SCK__DM1, CYREG_PRT3_DM1\r
-.set SD_SCK__DM2, CYREG_PRT3_DM2\r
-.set SD_SCK__DR, CYREG_PRT3_DR\r
-.set SD_SCK__INP_DIS, CYREG_PRT3_INP_DIS\r
-.set SD_SCK__INTTYPE_BASE, CYDEV_PICU_INTTYPE_PICU3_BASE\r
-.set SD_SCK__LCD_COM_SEG, CYREG_PRT3_LCD_COM_SEG\r
-.set SD_SCK__LCD_EN, CYREG_PRT3_LCD_EN\r
-.set SD_SCK__MASK, 0x04\r
-.set SD_SCK__PORT, 3\r
-.set SD_SCK__PRT, CYREG_PRT3_PRT\r
-.set SD_SCK__PRTDSI__CAPS_SEL, CYREG_PRT3_CAPS_SEL\r
-.set SD_SCK__PRTDSI__DBL_SYNC_IN, CYREG_PRT3_DBL_SYNC_IN\r
-.set SD_SCK__PRTDSI__OE_SEL0, CYREG_PRT3_OE_SEL0\r
-.set SD_SCK__PRTDSI__OE_SEL1, CYREG_PRT3_OE_SEL1\r
-.set SD_SCK__PRTDSI__OUT_SEL0, CYREG_PRT3_OUT_SEL0\r
-.set SD_SCK__PRTDSI__OUT_SEL1, CYREG_PRT3_OUT_SEL1\r
-.set SD_SCK__PRTDSI__SYNC_OUT, CYREG_PRT3_SYNC_OUT\r
-.set SD_SCK__PS, CYREG_PRT3_PS\r
-.set SD_SCK__SHIFT, 2\r
-.set SD_SCK__SLW, CYREG_PRT3_SLW\r
-\r
-/* SD_TX_DMA */\r
-.set SD_TX_DMA__DRQ_CTL, CYREG_IDMUX_DRQ_CTL0\r
-.set SD_TX_DMA__DRQ_NUMBER, 3\r
-.set SD_TX_DMA__NUMBEROF_TDS, 0\r
-.set SD_TX_DMA__PRIORITY, 1\r
-.set SD_TX_DMA__TERMIN_EN, 0\r
-.set SD_TX_DMA__TERMIN_SEL, 0\r
-.set SD_TX_DMA__TERMOUT0_EN, 1\r
-.set SD_TX_DMA__TERMOUT0_SEL, 3\r
-.set SD_TX_DMA__TERMOUT1_EN, 0\r
-.set SD_TX_DMA__TERMOUT1_SEL, 0\r
-.set SD_TX_DMA_COMPLETE__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0\r
-.set SD_TX_DMA_COMPLETE__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0\r
-.set SD_TX_DMA_COMPLETE__INTC_MASK, 0x40\r
-.set SD_TX_DMA_COMPLETE__INTC_NUMBER, 6\r
-.set SD_TX_DMA_COMPLETE__INTC_PRIOR_NUM, 7\r
-.set SD_TX_DMA_COMPLETE__INTC_PRIOR_REG, CYREG_NVIC_PRI_6\r
-.set SD_TX_DMA_COMPLETE__INTC_SET_EN_REG, CYREG_NVIC_SETENA0\r
-.set SD_TX_DMA_COMPLETE__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0\r
+/* SD_CS */\r
+.set SD_CS__0__INTTYPE, CYREG_PICU3_INTTYPE4\r
+.set SD_CS__0__MASK, 0x10\r
+.set SD_CS__0__PC, CYREG_PRT3_PC4\r
+.set SD_CS__0__PORT, 3\r
+.set SD_CS__0__SHIFT, 4\r
+.set SD_CS__AG, CYREG_PRT3_AG\r
+.set SD_CS__AMUX, CYREG_PRT3_AMUX\r
+.set SD_CS__BIE, CYREG_PRT3_BIE\r
+.set SD_CS__BIT_MASK, CYREG_PRT3_BIT_MASK\r
+.set SD_CS__BYP, CYREG_PRT3_BYP\r
+.set SD_CS__CTL, CYREG_PRT3_CTL\r
+.set SD_CS__DM0, CYREG_PRT3_DM0\r
+.set SD_CS__DM1, CYREG_PRT3_DM1\r
+.set SD_CS__DM2, CYREG_PRT3_DM2\r
+.set SD_CS__DR, CYREG_PRT3_DR\r
+.set SD_CS__INP_DIS, CYREG_PRT3_INP_DIS\r
+.set SD_CS__INTTYPE_BASE, CYDEV_PICU_INTTYPE_PICU3_BASE\r
+.set SD_CS__LCD_COM_SEG, CYREG_PRT3_LCD_COM_SEG\r
+.set SD_CS__LCD_EN, CYREG_PRT3_LCD_EN\r
+.set SD_CS__MASK, 0x10\r
+.set SD_CS__PORT, 3\r
+.set SD_CS__PRT, CYREG_PRT3_PRT\r
+.set SD_CS__PRTDSI__CAPS_SEL, CYREG_PRT3_CAPS_SEL\r
+.set SD_CS__PRTDSI__DBL_SYNC_IN, CYREG_PRT3_DBL_SYNC_IN\r
+.set SD_CS__PRTDSI__OE_SEL0, CYREG_PRT3_OE_SEL0\r
+.set SD_CS__PRTDSI__OE_SEL1, CYREG_PRT3_OE_SEL1\r
+.set SD_CS__PRTDSI__OUT_SEL0, CYREG_PRT3_OUT_SEL0\r
+.set SD_CS__PRTDSI__OUT_SEL1, CYREG_PRT3_OUT_SEL1\r
+.set SD_CS__PRTDSI__SYNC_OUT, CYREG_PRT3_SYNC_OUT\r
+.set SD_CS__PS, CYREG_PRT3_PS\r
+.set SD_CS__SHIFT, 4\r
+.set SD_CS__SLW, CYREG_PRT3_SLW\r
\r
/* USBFS */\r
.set USBFS_arb_int__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0\r
.set USBFS_USB__USBIO_CR0, CYREG_USB_USBIO_CR0\r
.set USBFS_USB__USBIO_CR1, CYREG_USB_USBIO_CR1\r
\r
+/* EXTLED */\r
+.set EXTLED__0__INTTYPE, CYREG_PICU0_INTTYPE0\r
+.set EXTLED__0__MASK, 0x01\r
+.set EXTLED__0__PC, CYREG_PRT0_PC0\r
+.set EXTLED__0__PORT, 0\r
+.set EXTLED__0__SHIFT, 0\r
+.set EXTLED__AG, CYREG_PRT0_AG\r
+.set EXTLED__AMUX, CYREG_PRT0_AMUX\r
+.set EXTLED__BIE, CYREG_PRT0_BIE\r
+.set EXTLED__BIT_MASK, CYREG_PRT0_BIT_MASK\r
+.set EXTLED__BYP, CYREG_PRT0_BYP\r
+.set EXTLED__CTL, CYREG_PRT0_CTL\r
+.set EXTLED__DM0, CYREG_PRT0_DM0\r
+.set EXTLED__DM1, CYREG_PRT0_DM1\r
+.set EXTLED__DM2, CYREG_PRT0_DM2\r
+.set EXTLED__DR, CYREG_PRT0_DR\r
+.set EXTLED__INP_DIS, CYREG_PRT0_INP_DIS\r
+.set EXTLED__INTTYPE_BASE, CYDEV_PICU_INTTYPE_PICU0_BASE\r
+.set EXTLED__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
+.set EXTLED__LCD_EN, CYREG_PRT0_LCD_EN\r
+.set EXTLED__MASK, 0x01\r
+.set EXTLED__PORT, 0\r
+.set EXTLED__PRT, CYREG_PRT0_PRT\r
+.set EXTLED__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
+.set EXTLED__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
+.set EXTLED__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
+.set EXTLED__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
+.set EXTLED__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
+.set EXTLED__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
+.set EXTLED__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
+.set EXTLED__PS, CYREG_PRT0_PS\r
+.set EXTLED__SHIFT, 0\r
+.set EXTLED__SLW, CYREG_PRT0_SLW\r
+\r
+/* SDCard */\r
+.set SDCard_BSPIM_BitCounter__16BIT_CONTROL_AUX_CTL_REG, CYREG_B1_UDB07_08_ACTL\r
+.set SDCard_BSPIM_BitCounter__16BIT_CONTROL_CONTROL_REG, CYREG_B1_UDB07_08_CTL\r
+.set SDCard_BSPIM_BitCounter__16BIT_CONTROL_COUNT_REG, CYREG_B1_UDB07_08_CTL\r
+.set SDCard_BSPIM_BitCounter__16BIT_COUNT_CONTROL_REG, CYREG_B1_UDB07_08_CTL\r
+.set SDCard_BSPIM_BitCounter__16BIT_COUNT_COUNT_REG, CYREG_B1_UDB07_08_CTL\r
+.set SDCard_BSPIM_BitCounter__16BIT_MASK_MASK_REG, CYREG_B1_UDB07_08_MSK\r
+.set SDCard_BSPIM_BitCounter__16BIT_MASK_PERIOD_REG, CYREG_B1_UDB07_08_MSK\r
+.set SDCard_BSPIM_BitCounter__16BIT_PERIOD_MASK_REG, CYREG_B1_UDB07_08_MSK\r
+.set SDCard_BSPIM_BitCounter__16BIT_PERIOD_PERIOD_REG, CYREG_B1_UDB07_08_MSK\r
+.set SDCard_BSPIM_BitCounter__CONTROL_AUX_CTL_REG, CYREG_B1_UDB07_ACTL\r
+.set SDCard_BSPIM_BitCounter__CONTROL_REG, CYREG_B1_UDB07_CTL\r
+.set SDCard_BSPIM_BitCounter__CONTROL_ST_REG, CYREG_B1_UDB07_ST_CTL\r
+.set SDCard_BSPIM_BitCounter__COUNT_REG, CYREG_B1_UDB07_CTL\r
+.set SDCard_BSPIM_BitCounter__COUNT_ST_REG, CYREG_B1_UDB07_ST_CTL\r
+.set SDCard_BSPIM_BitCounter__MASK_CTL_AUX_CTL_REG, CYREG_B1_UDB07_MSK_ACTL\r
+.set SDCard_BSPIM_BitCounter__PER_CTL_AUX_CTL_REG, CYREG_B1_UDB07_MSK_ACTL\r
+.set SDCard_BSPIM_BitCounter__PERIOD_REG, CYREG_B1_UDB07_MSK\r
+.set SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_AUX_CTL_REG, CYREG_B1_UDB07_08_ACTL\r
+.set SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_REG, CYREG_B1_UDB07_08_ST\r
+.set SDCard_BSPIM_BitCounter_ST__MASK_REG, CYREG_B1_UDB07_MSK\r
+.set SDCard_BSPIM_BitCounter_ST__MASK_ST_AUX_CTL_REG, CYREG_B1_UDB07_MSK_ACTL\r
+.set SDCard_BSPIM_BitCounter_ST__PER_ST_AUX_CTL_REG, CYREG_B1_UDB07_MSK_ACTL\r
+.set SDCard_BSPIM_BitCounter_ST__STATUS_AUX_CTL_REG, CYREG_B1_UDB07_ACTL\r
+.set SDCard_BSPIM_BitCounter_ST__STATUS_CNT_REG, CYREG_B1_UDB07_ST_CTL\r
+.set SDCard_BSPIM_BitCounter_ST__STATUS_CONTROL_REG, CYREG_B1_UDB07_ST_CTL\r
+.set SDCard_BSPIM_BitCounter_ST__STATUS_REG, CYREG_B1_UDB07_ST\r
+.set SDCard_BSPIM_RxStsReg__16BIT_STATUS_AUX_CTL_REG, CYREG_B1_UDB04_05_ACTL\r
+.set SDCard_BSPIM_RxStsReg__16BIT_STATUS_REG, CYREG_B1_UDB04_05_ST\r
+.set SDCard_BSPIM_RxStsReg__4__MASK, 0x10\r
+.set SDCard_BSPIM_RxStsReg__4__POS, 4\r
+.set SDCard_BSPIM_RxStsReg__5__MASK, 0x20\r
+.set SDCard_BSPIM_RxStsReg__5__POS, 5\r
+.set SDCard_BSPIM_RxStsReg__6__MASK, 0x40\r
+.set SDCard_BSPIM_RxStsReg__6__POS, 6\r
+.set SDCard_BSPIM_RxStsReg__MASK, 0x70\r
+.set SDCard_BSPIM_RxStsReg__MASK_REG, CYREG_B1_UDB04_MSK\r
+.set SDCard_BSPIM_RxStsReg__STATUS_AUX_CTL_REG, CYREG_B1_UDB04_ACTL\r
+.set SDCard_BSPIM_RxStsReg__STATUS_REG, CYREG_B1_UDB04_ST\r
+.set SDCard_BSPIM_sR8_Dp_u0__16BIT_A0_REG, CYREG_B1_UDB04_05_A0\r
+.set SDCard_BSPIM_sR8_Dp_u0__16BIT_A1_REG, CYREG_B1_UDB04_05_A1\r
+.set SDCard_BSPIM_sR8_Dp_u0__16BIT_D0_REG, CYREG_B1_UDB04_05_D0\r
+.set SDCard_BSPIM_sR8_Dp_u0__16BIT_D1_REG, CYREG_B1_UDB04_05_D1\r
+.set SDCard_BSPIM_sR8_Dp_u0__16BIT_DP_AUX_CTL_REG, CYREG_B1_UDB04_05_ACTL\r
+.set SDCard_BSPIM_sR8_Dp_u0__16BIT_F0_REG, CYREG_B1_UDB04_05_F0\r
+.set SDCard_BSPIM_sR8_Dp_u0__16BIT_F1_REG, CYREG_B1_UDB04_05_F1\r
+.set SDCard_BSPIM_sR8_Dp_u0__A0_A1_REG, CYREG_B1_UDB04_A0_A1\r
+.set SDCard_BSPIM_sR8_Dp_u0__A0_REG, CYREG_B1_UDB04_A0\r
+.set SDCard_BSPIM_sR8_Dp_u0__A1_REG, CYREG_B1_UDB04_A1\r
+.set SDCard_BSPIM_sR8_Dp_u0__D0_D1_REG, CYREG_B1_UDB04_D0_D1\r
+.set SDCard_BSPIM_sR8_Dp_u0__D0_REG, CYREG_B1_UDB04_D0\r
+.set SDCard_BSPIM_sR8_Dp_u0__D1_REG, CYREG_B1_UDB04_D1\r
+.set SDCard_BSPIM_sR8_Dp_u0__DP_AUX_CTL_REG, CYREG_B1_UDB04_ACTL\r
+.set SDCard_BSPIM_sR8_Dp_u0__F0_F1_REG, CYREG_B1_UDB04_F0_F1\r
+.set SDCard_BSPIM_sR8_Dp_u0__F0_REG, CYREG_B1_UDB04_F0\r
+.set SDCard_BSPIM_sR8_Dp_u0__F1_REG, CYREG_B1_UDB04_F1\r
+.set SDCard_BSPIM_TxStsReg__0__MASK, 0x01\r
+.set SDCard_BSPIM_TxStsReg__0__POS, 0\r
+.set SDCard_BSPIM_TxStsReg__1__MASK, 0x02\r
+.set SDCard_BSPIM_TxStsReg__1__POS, 1\r
+.set SDCard_BSPIM_TxStsReg__16BIT_STATUS_AUX_CTL_REG, CYREG_B1_UDB06_07_ACTL\r
+.set SDCard_BSPIM_TxStsReg__16BIT_STATUS_REG, CYREG_B1_UDB06_07_ST\r
+.set SDCard_BSPIM_TxStsReg__2__MASK, 0x04\r
+.set SDCard_BSPIM_TxStsReg__2__POS, 2\r
+.set SDCard_BSPIM_TxStsReg__3__MASK, 0x08\r
+.set SDCard_BSPIM_TxStsReg__3__POS, 3\r
+.set SDCard_BSPIM_TxStsReg__4__MASK, 0x10\r
+.set SDCard_BSPIM_TxStsReg__4__POS, 4\r
+.set SDCard_BSPIM_TxStsReg__MASK, 0x1F\r
+.set SDCard_BSPIM_TxStsReg__MASK_REG, CYREG_B1_UDB06_MSK\r
+.set SDCard_BSPIM_TxStsReg__STATUS_AUX_CTL_REG, CYREG_B1_UDB06_ACTL\r
+.set SDCard_BSPIM_TxStsReg__STATUS_REG, CYREG_B1_UDB06_ST\r
+\r
+/* SD_SCK */\r
+.set SD_SCK__0__INTTYPE, CYREG_PICU3_INTTYPE2\r
+.set SD_SCK__0__MASK, 0x04\r
+.set SD_SCK__0__PC, CYREG_PRT3_PC2\r
+.set SD_SCK__0__PORT, 3\r
+.set SD_SCK__0__SHIFT, 2\r
+.set SD_SCK__AG, CYREG_PRT3_AG\r
+.set SD_SCK__AMUX, CYREG_PRT3_AMUX\r
+.set SD_SCK__BIE, CYREG_PRT3_BIE\r
+.set SD_SCK__BIT_MASK, CYREG_PRT3_BIT_MASK\r
+.set SD_SCK__BYP, CYREG_PRT3_BYP\r
+.set SD_SCK__CTL, CYREG_PRT3_CTL\r
+.set SD_SCK__DM0, CYREG_PRT3_DM0\r
+.set SD_SCK__DM1, CYREG_PRT3_DM1\r
+.set SD_SCK__DM2, CYREG_PRT3_DM2\r
+.set SD_SCK__DR, CYREG_PRT3_DR\r
+.set SD_SCK__INP_DIS, CYREG_PRT3_INP_DIS\r
+.set SD_SCK__INTTYPE_BASE, CYDEV_PICU_INTTYPE_PICU3_BASE\r
+.set SD_SCK__LCD_COM_SEG, CYREG_PRT3_LCD_COM_SEG\r
+.set SD_SCK__LCD_EN, CYREG_PRT3_LCD_EN\r
+.set SD_SCK__MASK, 0x04\r
+.set SD_SCK__PORT, 3\r
+.set SD_SCK__PRT, CYREG_PRT3_PRT\r
+.set SD_SCK__PRTDSI__CAPS_SEL, CYREG_PRT3_CAPS_SEL\r
+.set SD_SCK__PRTDSI__DBL_SYNC_IN, CYREG_PRT3_DBL_SYNC_IN\r
+.set SD_SCK__PRTDSI__OE_SEL0, CYREG_PRT3_OE_SEL0\r
+.set SD_SCK__PRTDSI__OE_SEL1, CYREG_PRT3_OE_SEL1\r
+.set SD_SCK__PRTDSI__OUT_SEL0, CYREG_PRT3_OUT_SEL0\r
+.set SD_SCK__PRTDSI__OUT_SEL1, CYREG_PRT3_OUT_SEL1\r
+.set SD_SCK__PRTDSI__SYNC_OUT, CYREG_PRT3_SYNC_OUT\r
+.set SD_SCK__PS, CYREG_PRT3_PS\r
+.set SD_SCK__SHIFT, 2\r
+.set SD_SCK__SLW, CYREG_PRT3_SLW\r
+\r
+/* SCSI_In */\r
+.set SCSI_In__0__AG, CYREG_PRT2_AG\r
+.set SCSI_In__0__AMUX, CYREG_PRT2_AMUX\r
+.set SCSI_In__0__BIE, CYREG_PRT2_BIE\r
+.set SCSI_In__0__BIT_MASK, CYREG_PRT2_BIT_MASK\r
+.set SCSI_In__0__BYP, CYREG_PRT2_BYP\r
+.set SCSI_In__0__CTL, CYREG_PRT2_CTL\r
+.set SCSI_In__0__DM0, CYREG_PRT2_DM0\r
+.set SCSI_In__0__DM1, CYREG_PRT2_DM1\r
+.set SCSI_In__0__DM2, CYREG_PRT2_DM2\r
+.set SCSI_In__0__DR, CYREG_PRT2_DR\r
+.set SCSI_In__0__INP_DIS, CYREG_PRT2_INP_DIS\r
+.set SCSI_In__0__INTTYPE, CYREG_PICU2_INTTYPE1\r
+.set SCSI_In__0__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG\r
+.set SCSI_In__0__LCD_EN, CYREG_PRT2_LCD_EN\r
+.set SCSI_In__0__MASK, 0x02\r
+.set SCSI_In__0__PC, CYREG_PRT2_PC1\r
+.set SCSI_In__0__PORT, 2\r
+.set SCSI_In__0__PRT, CYREG_PRT2_PRT\r
+.set SCSI_In__0__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL\r
+.set SCSI_In__0__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN\r
+.set SCSI_In__0__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0\r
+.set SCSI_In__0__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1\r
+.set SCSI_In__0__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0\r
+.set SCSI_In__0__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1\r
+.set SCSI_In__0__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT\r
+.set SCSI_In__0__PS, CYREG_PRT2_PS\r
+.set SCSI_In__0__SHIFT, 1\r
+.set SCSI_In__0__SLW, CYREG_PRT2_SLW\r
+.set SCSI_In__1__AG, CYREG_PRT4_AG\r
+.set SCSI_In__1__AMUX, CYREG_PRT4_AMUX\r
+.set SCSI_In__1__BIE, CYREG_PRT4_BIE\r
+.set SCSI_In__1__BIT_MASK, CYREG_PRT4_BIT_MASK\r
+.set SCSI_In__1__BYP, CYREG_PRT4_BYP\r
+.set SCSI_In__1__CTL, CYREG_PRT4_CTL\r
+.set SCSI_In__1__DM0, CYREG_PRT4_DM0\r
+.set SCSI_In__1__DM1, CYREG_PRT4_DM1\r
+.set SCSI_In__1__DM2, CYREG_PRT4_DM2\r
+.set SCSI_In__1__DR, CYREG_PRT4_DR\r
+.set SCSI_In__1__INP_DIS, CYREG_PRT4_INP_DIS\r
+.set SCSI_In__1__INTTYPE, CYREG_PICU4_INTTYPE6\r
+.set SCSI_In__1__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
+.set SCSI_In__1__LCD_EN, CYREG_PRT4_LCD_EN\r
+.set SCSI_In__1__MASK, 0x40\r
+.set SCSI_In__1__PC, CYREG_PRT4_PC6\r
+.set SCSI_In__1__PORT, 4\r
+.set SCSI_In__1__PRT, CYREG_PRT4_PRT\r
+.set SCSI_In__1__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
+.set SCSI_In__1__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
+.set SCSI_In__1__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
+.set SCSI_In__1__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
+.set SCSI_In__1__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
+.set SCSI_In__1__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
+.set SCSI_In__1__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
+.set SCSI_In__1__PS, CYREG_PRT4_PS\r
+.set SCSI_In__1__SHIFT, 6\r
+.set SCSI_In__1__SLW, CYREG_PRT4_SLW\r
+.set SCSI_In__2__AG, CYREG_PRT4_AG\r
+.set SCSI_In__2__AMUX, CYREG_PRT4_AMUX\r
+.set SCSI_In__2__BIE, CYREG_PRT4_BIE\r
+.set SCSI_In__2__BIT_MASK, CYREG_PRT4_BIT_MASK\r
+.set SCSI_In__2__BYP, CYREG_PRT4_BYP\r
+.set SCSI_In__2__CTL, CYREG_PRT4_CTL\r
+.set SCSI_In__2__DM0, CYREG_PRT4_DM0\r
+.set SCSI_In__2__DM1, CYREG_PRT4_DM1\r
+.set SCSI_In__2__DM2, CYREG_PRT4_DM2\r
+.set SCSI_In__2__DR, CYREG_PRT4_DR\r
+.set SCSI_In__2__INP_DIS, CYREG_PRT4_INP_DIS\r
+.set SCSI_In__2__INTTYPE, CYREG_PICU4_INTTYPE2\r
+.set SCSI_In__2__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
+.set SCSI_In__2__LCD_EN, CYREG_PRT4_LCD_EN\r
+.set SCSI_In__2__MASK, 0x04\r
+.set SCSI_In__2__PC, CYREG_PRT4_PC2\r
+.set SCSI_In__2__PORT, 4\r
+.set SCSI_In__2__PRT, CYREG_PRT4_PRT\r
+.set SCSI_In__2__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
+.set SCSI_In__2__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
+.set SCSI_In__2__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
+.set SCSI_In__2__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
+.set SCSI_In__2__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
+.set SCSI_In__2__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
+.set SCSI_In__2__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
+.set SCSI_In__2__PS, CYREG_PRT4_PS\r
+.set SCSI_In__2__SHIFT, 2\r
+.set SCSI_In__2__SLW, CYREG_PRT4_SLW\r
+.set SCSI_In__3__AG, CYREG_PRT0_AG\r
+.set SCSI_In__3__AMUX, CYREG_PRT0_AMUX\r
+.set SCSI_In__3__BIE, CYREG_PRT0_BIE\r
+.set SCSI_In__3__BIT_MASK, CYREG_PRT0_BIT_MASK\r
+.set SCSI_In__3__BYP, CYREG_PRT0_BYP\r
+.set SCSI_In__3__CTL, CYREG_PRT0_CTL\r
+.set SCSI_In__3__DM0, CYREG_PRT0_DM0\r
+.set SCSI_In__3__DM1, CYREG_PRT0_DM1\r
+.set SCSI_In__3__DM2, CYREG_PRT0_DM2\r
+.set SCSI_In__3__DR, CYREG_PRT0_DR\r
+.set SCSI_In__3__INP_DIS, CYREG_PRT0_INP_DIS\r
+.set SCSI_In__3__INTTYPE, CYREG_PICU0_INTTYPE5\r
+.set SCSI_In__3__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
+.set SCSI_In__3__LCD_EN, CYREG_PRT0_LCD_EN\r
+.set SCSI_In__3__MASK, 0x20\r
+.set SCSI_In__3__PC, CYREG_PRT0_PC5\r
+.set SCSI_In__3__PORT, 0\r
+.set SCSI_In__3__PRT, CYREG_PRT0_PRT\r
+.set SCSI_In__3__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
+.set SCSI_In__3__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
+.set SCSI_In__3__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
+.set SCSI_In__3__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
+.set SCSI_In__3__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
+.set SCSI_In__3__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
+.set SCSI_In__3__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
+.set SCSI_In__3__PS, CYREG_PRT0_PS\r
+.set SCSI_In__3__SHIFT, 5\r
+.set SCSI_In__3__SLW, CYREG_PRT0_SLW\r
+.set SCSI_In__4__AG, CYREG_PRT0_AG\r
+.set SCSI_In__4__AMUX, CYREG_PRT0_AMUX\r
+.set SCSI_In__4__BIE, CYREG_PRT0_BIE\r
+.set SCSI_In__4__BIT_MASK, CYREG_PRT0_BIT_MASK\r
+.set SCSI_In__4__BYP, CYREG_PRT0_BYP\r
+.set SCSI_In__4__CTL, CYREG_PRT0_CTL\r
+.set SCSI_In__4__DM0, CYREG_PRT0_DM0\r
+.set SCSI_In__4__DM1, CYREG_PRT0_DM1\r
+.set SCSI_In__4__DM2, CYREG_PRT0_DM2\r
+.set SCSI_In__4__DR, CYREG_PRT0_DR\r
+.set SCSI_In__4__INP_DIS, CYREG_PRT0_INP_DIS\r
+.set SCSI_In__4__INTTYPE, CYREG_PICU0_INTTYPE4\r
+.set SCSI_In__4__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
+.set SCSI_In__4__LCD_EN, CYREG_PRT0_LCD_EN\r
+.set SCSI_In__4__MASK, 0x10\r
+.set SCSI_In__4__PC, CYREG_PRT0_PC4\r
+.set SCSI_In__4__PORT, 0\r
+.set SCSI_In__4__PRT, CYREG_PRT0_PRT\r
+.set SCSI_In__4__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
+.set SCSI_In__4__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
+.set SCSI_In__4__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
+.set SCSI_In__4__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
+.set SCSI_In__4__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
+.set SCSI_In__4__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
+.set SCSI_In__4__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
+.set SCSI_In__4__PS, CYREG_PRT0_PS\r
+.set SCSI_In__4__SHIFT, 4\r
+.set SCSI_In__4__SLW, CYREG_PRT0_SLW\r
+.set SCSI_In__CD__AG, CYREG_PRT4_AG\r
+.set SCSI_In__CD__AMUX, CYREG_PRT4_AMUX\r
+.set SCSI_In__CD__BIE, CYREG_PRT4_BIE\r
+.set SCSI_In__CD__BIT_MASK, CYREG_PRT4_BIT_MASK\r
+.set SCSI_In__CD__BYP, CYREG_PRT4_BYP\r
+.set SCSI_In__CD__CTL, CYREG_PRT4_CTL\r
+.set SCSI_In__CD__DM0, CYREG_PRT4_DM0\r
+.set SCSI_In__CD__DM1, CYREG_PRT4_DM1\r
+.set SCSI_In__CD__DM2, CYREG_PRT4_DM2\r
+.set SCSI_In__CD__DR, CYREG_PRT4_DR\r
+.set SCSI_In__CD__INP_DIS, CYREG_PRT4_INP_DIS\r
+.set SCSI_In__CD__INTTYPE, CYREG_PICU4_INTTYPE2\r
+.set SCSI_In__CD__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
+.set SCSI_In__CD__LCD_EN, CYREG_PRT4_LCD_EN\r
+.set SCSI_In__CD__MASK, 0x04\r
+.set SCSI_In__CD__PC, CYREG_PRT4_PC2\r
+.set SCSI_In__CD__PORT, 4\r
+.set SCSI_In__CD__PRT, CYREG_PRT4_PRT\r
+.set SCSI_In__CD__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
+.set SCSI_In__CD__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
+.set SCSI_In__CD__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
+.set SCSI_In__CD__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
+.set SCSI_In__CD__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
+.set SCSI_In__CD__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
+.set SCSI_In__CD__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
+.set SCSI_In__CD__PS, CYREG_PRT4_PS\r
+.set SCSI_In__CD__SHIFT, 2\r
+.set SCSI_In__CD__SLW, CYREG_PRT4_SLW\r
+.set SCSI_In__DBP__AG, CYREG_PRT2_AG\r
+.set SCSI_In__DBP__AMUX, CYREG_PRT2_AMUX\r
+.set SCSI_In__DBP__BIE, CYREG_PRT2_BIE\r
+.set SCSI_In__DBP__BIT_MASK, CYREG_PRT2_BIT_MASK\r
+.set SCSI_In__DBP__BYP, CYREG_PRT2_BYP\r
+.set SCSI_In__DBP__CTL, CYREG_PRT2_CTL\r
+.set SCSI_In__DBP__DM0, CYREG_PRT2_DM0\r
+.set SCSI_In__DBP__DM1, CYREG_PRT2_DM1\r
+.set SCSI_In__DBP__DM2, CYREG_PRT2_DM2\r
+.set SCSI_In__DBP__DR, CYREG_PRT2_DR\r
+.set SCSI_In__DBP__INP_DIS, CYREG_PRT2_INP_DIS\r
+.set SCSI_In__DBP__INTTYPE, CYREG_PICU2_INTTYPE1\r
+.set SCSI_In__DBP__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG\r
+.set SCSI_In__DBP__LCD_EN, CYREG_PRT2_LCD_EN\r
+.set SCSI_In__DBP__MASK, 0x02\r
+.set SCSI_In__DBP__PC, CYREG_PRT2_PC1\r
+.set SCSI_In__DBP__PORT, 2\r
+.set SCSI_In__DBP__PRT, CYREG_PRT2_PRT\r
+.set SCSI_In__DBP__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL\r
+.set SCSI_In__DBP__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN\r
+.set SCSI_In__DBP__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0\r
+.set SCSI_In__DBP__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1\r
+.set SCSI_In__DBP__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0\r
+.set SCSI_In__DBP__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1\r
+.set SCSI_In__DBP__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT\r
+.set SCSI_In__DBP__PS, CYREG_PRT2_PS\r
+.set SCSI_In__DBP__SHIFT, 1\r
+.set SCSI_In__DBP__SLW, CYREG_PRT2_SLW\r
+.set SCSI_In__IO__AG, CYREG_PRT0_AG\r
+.set SCSI_In__IO__AMUX, CYREG_PRT0_AMUX\r
+.set SCSI_In__IO__BIE, CYREG_PRT0_BIE\r
+.set SCSI_In__IO__BIT_MASK, CYREG_PRT0_BIT_MASK\r
+.set SCSI_In__IO__BYP, CYREG_PRT0_BYP\r
+.set SCSI_In__IO__CTL, CYREG_PRT0_CTL\r
+.set SCSI_In__IO__DM0, CYREG_PRT0_DM0\r
+.set SCSI_In__IO__DM1, CYREG_PRT0_DM1\r
+.set SCSI_In__IO__DM2, CYREG_PRT0_DM2\r
+.set SCSI_In__IO__DR, CYREG_PRT0_DR\r
+.set SCSI_In__IO__INP_DIS, CYREG_PRT0_INP_DIS\r
+.set SCSI_In__IO__INTTYPE, CYREG_PICU0_INTTYPE4\r
+.set SCSI_In__IO__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
+.set SCSI_In__IO__LCD_EN, CYREG_PRT0_LCD_EN\r
+.set SCSI_In__IO__MASK, 0x10\r
+.set SCSI_In__IO__PC, CYREG_PRT0_PC4\r
+.set SCSI_In__IO__PORT, 0\r
+.set SCSI_In__IO__PRT, CYREG_PRT0_PRT\r
+.set SCSI_In__IO__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
+.set SCSI_In__IO__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
+.set SCSI_In__IO__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
+.set SCSI_In__IO__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
+.set SCSI_In__IO__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
+.set SCSI_In__IO__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
+.set SCSI_In__IO__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
+.set SCSI_In__IO__PS, CYREG_PRT0_PS\r
+.set SCSI_In__IO__SHIFT, 4\r
+.set SCSI_In__IO__SLW, CYREG_PRT0_SLW\r
+.set SCSI_In__MSG__AG, CYREG_PRT4_AG\r
+.set SCSI_In__MSG__AMUX, CYREG_PRT4_AMUX\r
+.set SCSI_In__MSG__BIE, CYREG_PRT4_BIE\r
+.set SCSI_In__MSG__BIT_MASK, CYREG_PRT4_BIT_MASK\r
+.set SCSI_In__MSG__BYP, CYREG_PRT4_BYP\r
+.set SCSI_In__MSG__CTL, CYREG_PRT4_CTL\r
+.set SCSI_In__MSG__DM0, CYREG_PRT4_DM0\r
+.set SCSI_In__MSG__DM1, CYREG_PRT4_DM1\r
+.set SCSI_In__MSG__DM2, CYREG_PRT4_DM2\r
+.set SCSI_In__MSG__DR, CYREG_PRT4_DR\r
+.set SCSI_In__MSG__INP_DIS, CYREG_PRT4_INP_DIS\r
+.set SCSI_In__MSG__INTTYPE, CYREG_PICU4_INTTYPE6\r
+.set SCSI_In__MSG__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
+.set SCSI_In__MSG__LCD_EN, CYREG_PRT4_LCD_EN\r
+.set SCSI_In__MSG__MASK, 0x40\r
+.set SCSI_In__MSG__PC, CYREG_PRT4_PC6\r
+.set SCSI_In__MSG__PORT, 4\r
+.set SCSI_In__MSG__PRT, CYREG_PRT4_PRT\r
+.set SCSI_In__MSG__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
+.set SCSI_In__MSG__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
+.set SCSI_In__MSG__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
+.set SCSI_In__MSG__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
+.set SCSI_In__MSG__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
+.set SCSI_In__MSG__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
+.set SCSI_In__MSG__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
+.set SCSI_In__MSG__PS, CYREG_PRT4_PS\r
+.set SCSI_In__MSG__SHIFT, 6\r
+.set SCSI_In__MSG__SLW, CYREG_PRT4_SLW\r
+.set SCSI_In__REQ__AG, CYREG_PRT0_AG\r
+.set SCSI_In__REQ__AMUX, CYREG_PRT0_AMUX\r
+.set SCSI_In__REQ__BIE, CYREG_PRT0_BIE\r
+.set SCSI_In__REQ__BIT_MASK, CYREG_PRT0_BIT_MASK\r
+.set SCSI_In__REQ__BYP, CYREG_PRT0_BYP\r
+.set SCSI_In__REQ__CTL, CYREG_PRT0_CTL\r
+.set SCSI_In__REQ__DM0, CYREG_PRT0_DM0\r
+.set SCSI_In__REQ__DM1, CYREG_PRT0_DM1\r
+.set SCSI_In__REQ__DM2, CYREG_PRT0_DM2\r
+.set SCSI_In__REQ__DR, CYREG_PRT0_DR\r
+.set SCSI_In__REQ__INP_DIS, CYREG_PRT0_INP_DIS\r
+.set SCSI_In__REQ__INTTYPE, CYREG_PICU0_INTTYPE5\r
+.set SCSI_In__REQ__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
+.set SCSI_In__REQ__LCD_EN, CYREG_PRT0_LCD_EN\r
+.set SCSI_In__REQ__MASK, 0x20\r
+.set SCSI_In__REQ__PC, CYREG_PRT0_PC5\r
+.set SCSI_In__REQ__PORT, 0\r
+.set SCSI_In__REQ__PRT, CYREG_PRT0_PRT\r
+.set SCSI_In__REQ__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
+.set SCSI_In__REQ__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
+.set SCSI_In__REQ__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
+.set SCSI_In__REQ__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
+.set SCSI_In__REQ__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
+.set SCSI_In__REQ__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
+.set SCSI_In__REQ__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
+.set SCSI_In__REQ__PS, CYREG_PRT0_PS\r
+.set SCSI_In__REQ__SHIFT, 5\r
+.set SCSI_In__REQ__SLW, CYREG_PRT0_SLW\r
+.set SCSI_In_DBx__0__AG, CYREG_PRT5_AG\r
+.set SCSI_In_DBx__0__AMUX, CYREG_PRT5_AMUX\r
+.set SCSI_In_DBx__0__BIE, CYREG_PRT5_BIE\r
+.set SCSI_In_DBx__0__BIT_MASK, CYREG_PRT5_BIT_MASK\r
+.set SCSI_In_DBx__0__BYP, CYREG_PRT5_BYP\r
+.set SCSI_In_DBx__0__CTL, CYREG_PRT5_CTL\r
+.set SCSI_In_DBx__0__DM0, CYREG_PRT5_DM0\r
+.set SCSI_In_DBx__0__DM1, CYREG_PRT5_DM1\r
+.set SCSI_In_DBx__0__DM2, CYREG_PRT5_DM2\r
+.set SCSI_In_DBx__0__DR, CYREG_PRT5_DR\r
+.set SCSI_In_DBx__0__INP_DIS, CYREG_PRT5_INP_DIS\r
+.set SCSI_In_DBx__0__INTTYPE, CYREG_PICU5_INTTYPE3\r
+.set SCSI_In_DBx__0__LCD_COM_SEG, CYREG_PRT5_LCD_COM_SEG\r
+.set SCSI_In_DBx__0__LCD_EN, CYREG_PRT5_LCD_EN\r
+.set SCSI_In_DBx__0__MASK, 0x08\r
+.set SCSI_In_DBx__0__PC, CYREG_PRT5_PC3\r
+.set SCSI_In_DBx__0__PORT, 5\r
+.set SCSI_In_DBx__0__PRT, CYREG_PRT5_PRT\r
+.set SCSI_In_DBx__0__PRTDSI__CAPS_SEL, CYREG_PRT5_CAPS_SEL\r
+.set SCSI_In_DBx__0__PRTDSI__DBL_SYNC_IN, CYREG_PRT5_DBL_SYNC_IN\r
+.set SCSI_In_DBx__0__PRTDSI__OE_SEL0, CYREG_PRT5_OE_SEL0\r
+.set SCSI_In_DBx__0__PRTDSI__OE_SEL1, CYREG_PRT5_OE_SEL1\r
+.set SCSI_In_DBx__0__PRTDSI__OUT_SEL0, CYREG_PRT5_OUT_SEL0\r
+.set SCSI_In_DBx__0__PRTDSI__OUT_SEL1, CYREG_PRT5_OUT_SEL1\r
+.set SCSI_In_DBx__0__PRTDSI__SYNC_OUT, CYREG_PRT5_SYNC_OUT\r
+.set SCSI_In_DBx__0__PS, CYREG_PRT5_PS\r
+.set SCSI_In_DBx__0__SHIFT, 3\r
+.set SCSI_In_DBx__0__SLW, CYREG_PRT5_SLW\r
+.set SCSI_In_DBx__1__AG, CYREG_PRT5_AG\r
+.set SCSI_In_DBx__1__AMUX, CYREG_PRT5_AMUX\r
+.set SCSI_In_DBx__1__BIE, CYREG_PRT5_BIE\r
+.set SCSI_In_DBx__1__BIT_MASK, CYREG_PRT5_BIT_MASK\r
+.set SCSI_In_DBx__1__BYP, CYREG_PRT5_BYP\r
+.set SCSI_In_DBx__1__CTL, CYREG_PRT5_CTL\r
+.set SCSI_In_DBx__1__DM0, CYREG_PRT5_DM0\r
+.set SCSI_In_DBx__1__DM1, CYREG_PRT5_DM1\r
+.set SCSI_In_DBx__1__DM2, CYREG_PRT5_DM2\r
+.set SCSI_In_DBx__1__DR, CYREG_PRT5_DR\r
+.set SCSI_In_DBx__1__INP_DIS, CYREG_PRT5_INP_DIS\r
+.set SCSI_In_DBx__1__INTTYPE, CYREG_PICU5_INTTYPE2\r
+.set SCSI_In_DBx__1__LCD_COM_SEG, CYREG_PRT5_LCD_COM_SEG\r
+.set SCSI_In_DBx__1__LCD_EN, CYREG_PRT5_LCD_EN\r
+.set SCSI_In_DBx__1__MASK, 0x04\r
+.set SCSI_In_DBx__1__PC, CYREG_PRT5_PC2\r
+.set SCSI_In_DBx__1__PORT, 5\r
+.set SCSI_In_DBx__1__PRT, CYREG_PRT5_PRT\r
+.set SCSI_In_DBx__1__PRTDSI__CAPS_SEL, CYREG_PRT5_CAPS_SEL\r
+.set SCSI_In_DBx__1__PRTDSI__DBL_SYNC_IN, CYREG_PRT5_DBL_SYNC_IN\r
+.set SCSI_In_DBx__1__PRTDSI__OE_SEL0, CYREG_PRT5_OE_SEL0\r
+.set SCSI_In_DBx__1__PRTDSI__OE_SEL1, CYREG_PRT5_OE_SEL1\r
+.set SCSI_In_DBx__1__PRTDSI__OUT_SEL0, CYREG_PRT5_OUT_SEL0\r
+.set SCSI_In_DBx__1__PRTDSI__OUT_SEL1, CYREG_PRT5_OUT_SEL1\r
+.set SCSI_In_DBx__1__PRTDSI__SYNC_OUT, CYREG_PRT5_SYNC_OUT\r
+.set SCSI_In_DBx__1__PS, CYREG_PRT5_PS\r
+.set SCSI_In_DBx__1__SHIFT, 2\r
+.set SCSI_In_DBx__1__SLW, CYREG_PRT5_SLW\r
+.set SCSI_In_DBx__2__AG, CYREG_PRT6_AG\r
+.set SCSI_In_DBx__2__AMUX, CYREG_PRT6_AMUX\r
+.set SCSI_In_DBx__2__BIE, CYREG_PRT6_BIE\r
+.set SCSI_In_DBx__2__BIT_MASK, CYREG_PRT6_BIT_MASK\r
+.set SCSI_In_DBx__2__BYP, CYREG_PRT6_BYP\r
+.set SCSI_In_DBx__2__CTL, CYREG_PRT6_CTL\r
+.set SCSI_In_DBx__2__DM0, CYREG_PRT6_DM0\r
+.set SCSI_In_DBx__2__DM1, CYREG_PRT6_DM1\r
+.set SCSI_In_DBx__2__DM2, CYREG_PRT6_DM2\r
+.set SCSI_In_DBx__2__DR, CYREG_PRT6_DR\r
+.set SCSI_In_DBx__2__INP_DIS, CYREG_PRT6_INP_DIS\r
+.set SCSI_In_DBx__2__INTTYPE, CYREG_PICU6_INTTYPE7\r
+.set SCSI_In_DBx__2__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
+.set SCSI_In_DBx__2__LCD_EN, CYREG_PRT6_LCD_EN\r
+.set SCSI_In_DBx__2__MASK, 0x80\r
+.set SCSI_In_DBx__2__PC, CYREG_PRT6_PC7\r
+.set SCSI_In_DBx__2__PORT, 6\r
+.set SCSI_In_DBx__2__PRT, CYREG_PRT6_PRT\r
+.set SCSI_In_DBx__2__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
+.set SCSI_In_DBx__2__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
+.set SCSI_In_DBx__2__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
+.set SCSI_In_DBx__2__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
+.set SCSI_In_DBx__2__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
+.set SCSI_In_DBx__2__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
+.set SCSI_In_DBx__2__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
+.set SCSI_In_DBx__2__PS, CYREG_PRT6_PS\r
+.set SCSI_In_DBx__2__SHIFT, 7\r
+.set SCSI_In_DBx__2__SLW, CYREG_PRT6_SLW\r
+.set SCSI_In_DBx__3__AG, CYREG_PRT6_AG\r
+.set SCSI_In_DBx__3__AMUX, CYREG_PRT6_AMUX\r
+.set SCSI_In_DBx__3__BIE, CYREG_PRT6_BIE\r
+.set SCSI_In_DBx__3__BIT_MASK, CYREG_PRT6_BIT_MASK\r
+.set SCSI_In_DBx__3__BYP, CYREG_PRT6_BYP\r
+.set SCSI_In_DBx__3__CTL, CYREG_PRT6_CTL\r
+.set SCSI_In_DBx__3__DM0, CYREG_PRT6_DM0\r
+.set SCSI_In_DBx__3__DM1, CYREG_PRT6_DM1\r
+.set SCSI_In_DBx__3__DM2, CYREG_PRT6_DM2\r
+.set SCSI_In_DBx__3__DR, CYREG_PRT6_DR\r
+.set SCSI_In_DBx__3__INP_DIS, CYREG_PRT6_INP_DIS\r
+.set SCSI_In_DBx__3__INTTYPE, CYREG_PICU6_INTTYPE6\r
+.set SCSI_In_DBx__3__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
+.set SCSI_In_DBx__3__LCD_EN, CYREG_PRT6_LCD_EN\r
+.set SCSI_In_DBx__3__MASK, 0x40\r
+.set SCSI_In_DBx__3__PC, CYREG_PRT6_PC6\r
+.set SCSI_In_DBx__3__PORT, 6\r
+.set SCSI_In_DBx__3__PRT, CYREG_PRT6_PRT\r
+.set SCSI_In_DBx__3__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
+.set SCSI_In_DBx__3__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
+.set SCSI_In_DBx__3__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
+.set SCSI_In_DBx__3__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
+.set SCSI_In_DBx__3__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
+.set SCSI_In_DBx__3__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
+.set SCSI_In_DBx__3__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
+.set SCSI_In_DBx__3__PS, CYREG_PRT6_PS\r
+.set SCSI_In_DBx__3__SHIFT, 6\r
+.set SCSI_In_DBx__3__SLW, CYREG_PRT6_SLW\r
+.set SCSI_In_DBx__4__AG, CYREG_PRT12_AG\r
+.set SCSI_In_DBx__4__BIE, CYREG_PRT12_BIE\r
+.set SCSI_In_DBx__4__BIT_MASK, CYREG_PRT12_BIT_MASK\r
+.set SCSI_In_DBx__4__BYP, CYREG_PRT12_BYP\r
+.set SCSI_In_DBx__4__DM0, CYREG_PRT12_DM0\r
+.set SCSI_In_DBx__4__DM1, CYREG_PRT12_DM1\r
+.set SCSI_In_DBx__4__DM2, CYREG_PRT12_DM2\r
+.set SCSI_In_DBx__4__DR, CYREG_PRT12_DR\r
+.set SCSI_In_DBx__4__INP_DIS, CYREG_PRT12_INP_DIS\r
+.set SCSI_In_DBx__4__INTTYPE, CYREG_PICU12_INTTYPE5\r
+.set SCSI_In_DBx__4__MASK, 0x20\r
+.set SCSI_In_DBx__4__PC, CYREG_PRT12_PC5\r
+.set SCSI_In_DBx__4__PORT, 12\r
+.set SCSI_In_DBx__4__PRT, CYREG_PRT12_PRT\r
+.set SCSI_In_DBx__4__PRTDSI__DBL_SYNC_IN, CYREG_PRT12_DBL_SYNC_IN\r
+.set SCSI_In_DBx__4__PRTDSI__OE_SEL0, CYREG_PRT12_OE_SEL0\r
+.set SCSI_In_DBx__4__PRTDSI__OE_SEL1, CYREG_PRT12_OE_SEL1\r
+.set SCSI_In_DBx__4__PRTDSI__OUT_SEL0, CYREG_PRT12_OUT_SEL0\r
+.set SCSI_In_DBx__4__PRTDSI__OUT_SEL1, CYREG_PRT12_OUT_SEL1\r
+.set SCSI_In_DBx__4__PRTDSI__SYNC_OUT, CYREG_PRT12_SYNC_OUT\r
+.set SCSI_In_DBx__4__PS, CYREG_PRT12_PS\r
+.set SCSI_In_DBx__4__SHIFT, 5\r
+.set SCSI_In_DBx__4__SIO_CFG, CYREG_PRT12_SIO_CFG\r
+.set SCSI_In_DBx__4__SIO_DIFF, CYREG_PRT12_SIO_DIFF\r
+.set SCSI_In_DBx__4__SIO_HYST_EN, CYREG_PRT12_SIO_HYST_EN\r
+.set SCSI_In_DBx__4__SIO_REG_HIFREQ, CYREG_PRT12_SIO_REG_HIFREQ\r
+.set SCSI_In_DBx__4__SLW, CYREG_PRT12_SLW\r
+.set SCSI_In_DBx__5__AG, CYREG_PRT12_AG\r
+.set SCSI_In_DBx__5__BIE, CYREG_PRT12_BIE\r
+.set SCSI_In_DBx__5__BIT_MASK, CYREG_PRT12_BIT_MASK\r
+.set SCSI_In_DBx__5__BYP, CYREG_PRT12_BYP\r
+.set SCSI_In_DBx__5__DM0, CYREG_PRT12_DM0\r
+.set SCSI_In_DBx__5__DM1, CYREG_PRT12_DM1\r
+.set SCSI_In_DBx__5__DM2, CYREG_PRT12_DM2\r
+.set SCSI_In_DBx__5__DR, CYREG_PRT12_DR\r
+.set SCSI_In_DBx__5__INP_DIS, CYREG_PRT12_INP_DIS\r
+.set SCSI_In_DBx__5__INTTYPE, CYREG_PICU12_INTTYPE4\r
+.set SCSI_In_DBx__5__MASK, 0x10\r
+.set SCSI_In_DBx__5__PC, CYREG_PRT12_PC4\r
+.set SCSI_In_DBx__5__PORT, 12\r
+.set SCSI_In_DBx__5__PRT, CYREG_PRT12_PRT\r
+.set SCSI_In_DBx__5__PRTDSI__DBL_SYNC_IN, CYREG_PRT12_DBL_SYNC_IN\r
+.set SCSI_In_DBx__5__PRTDSI__OE_SEL0, CYREG_PRT12_OE_SEL0\r
+.set SCSI_In_DBx__5__PRTDSI__OE_SEL1, CYREG_PRT12_OE_SEL1\r
+.set SCSI_In_DBx__5__PRTDSI__OUT_SEL0, CYREG_PRT12_OUT_SEL0\r
+.set SCSI_In_DBx__5__PRTDSI__OUT_SEL1, CYREG_PRT12_OUT_SEL1\r
+.set SCSI_In_DBx__5__PRTDSI__SYNC_OUT, CYREG_PRT12_SYNC_OUT\r
+.set SCSI_In_DBx__5__PS, CYREG_PRT12_PS\r
+.set SCSI_In_DBx__5__SHIFT, 4\r
+.set SCSI_In_DBx__5__SIO_CFG, CYREG_PRT12_SIO_CFG\r
+.set SCSI_In_DBx__5__SIO_DIFF, CYREG_PRT12_SIO_DIFF\r
+.set SCSI_In_DBx__5__SIO_HYST_EN, CYREG_PRT12_SIO_HYST_EN\r
+.set SCSI_In_DBx__5__SIO_REG_HIFREQ, CYREG_PRT12_SIO_REG_HIFREQ\r
+.set SCSI_In_DBx__5__SLW, CYREG_PRT12_SLW\r
+.set SCSI_In_DBx__6__AG, CYREG_PRT2_AG\r
+.set SCSI_In_DBx__6__AMUX, CYREG_PRT2_AMUX\r
+.set SCSI_In_DBx__6__BIE, CYREG_PRT2_BIE\r
+.set SCSI_In_DBx__6__BIT_MASK, CYREG_PRT2_BIT_MASK\r
+.set SCSI_In_DBx__6__BYP, CYREG_PRT2_BYP\r
+.set SCSI_In_DBx__6__CTL, CYREG_PRT2_CTL\r
+.set SCSI_In_DBx__6__DM0, CYREG_PRT2_DM0\r
+.set SCSI_In_DBx__6__DM1, CYREG_PRT2_DM1\r
+.set SCSI_In_DBx__6__DM2, CYREG_PRT2_DM2\r
+.set SCSI_In_DBx__6__DR, CYREG_PRT2_DR\r
+.set SCSI_In_DBx__6__INP_DIS, CYREG_PRT2_INP_DIS\r
+.set SCSI_In_DBx__6__INTTYPE, CYREG_PICU2_INTTYPE5\r
+.set SCSI_In_DBx__6__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG\r
+.set SCSI_In_DBx__6__LCD_EN, CYREG_PRT2_LCD_EN\r
+.set SCSI_In_DBx__6__MASK, 0x20\r
+.set SCSI_In_DBx__6__PC, CYREG_PRT2_PC5\r
+.set SCSI_In_DBx__6__PORT, 2\r
+.set SCSI_In_DBx__6__PRT, CYREG_PRT2_PRT\r
+.set SCSI_In_DBx__6__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL\r
+.set SCSI_In_DBx__6__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN\r
+.set SCSI_In_DBx__6__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0\r
+.set SCSI_In_DBx__6__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1\r
+.set SCSI_In_DBx__6__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0\r
+.set SCSI_In_DBx__6__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1\r
+.set SCSI_In_DBx__6__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT\r
+.set SCSI_In_DBx__6__PS, CYREG_PRT2_PS\r
+.set SCSI_In_DBx__6__SHIFT, 5\r
+.set SCSI_In_DBx__6__SLW, CYREG_PRT2_SLW\r
+.set SCSI_In_DBx__7__AG, CYREG_PRT2_AG\r
+.set SCSI_In_DBx__7__AMUX, CYREG_PRT2_AMUX\r
+.set SCSI_In_DBx__7__BIE, CYREG_PRT2_BIE\r
+.set SCSI_In_DBx__7__BIT_MASK, CYREG_PRT2_BIT_MASK\r
+.set SCSI_In_DBx__7__BYP, CYREG_PRT2_BYP\r
+.set SCSI_In_DBx__7__CTL, CYREG_PRT2_CTL\r
+.set SCSI_In_DBx__7__DM0, CYREG_PRT2_DM0\r
+.set SCSI_In_DBx__7__DM1, CYREG_PRT2_DM1\r
+.set SCSI_In_DBx__7__DM2, CYREG_PRT2_DM2\r
+.set SCSI_In_DBx__7__DR, CYREG_PRT2_DR\r
+.set SCSI_In_DBx__7__INP_DIS, CYREG_PRT2_INP_DIS\r
+.set SCSI_In_DBx__7__INTTYPE, CYREG_PICU2_INTTYPE4\r
+.set SCSI_In_DBx__7__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG\r
+.set SCSI_In_DBx__7__LCD_EN, CYREG_PRT2_LCD_EN\r
+.set SCSI_In_DBx__7__MASK, 0x10\r
+.set SCSI_In_DBx__7__PC, CYREG_PRT2_PC4\r
+.set SCSI_In_DBx__7__PORT, 2\r
+.set SCSI_In_DBx__7__PRT, CYREG_PRT2_PRT\r
+.set SCSI_In_DBx__7__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL\r
+.set SCSI_In_DBx__7__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN\r
+.set SCSI_In_DBx__7__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0\r
+.set SCSI_In_DBx__7__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1\r
+.set SCSI_In_DBx__7__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0\r
+.set SCSI_In_DBx__7__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1\r
+.set SCSI_In_DBx__7__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT\r
+.set SCSI_In_DBx__7__PS, CYREG_PRT2_PS\r
+.set SCSI_In_DBx__7__SHIFT, 4\r
+.set SCSI_In_DBx__7__SLW, CYREG_PRT2_SLW\r
+.set SCSI_In_DBx__DB0__AG, CYREG_PRT5_AG\r
+.set SCSI_In_DBx__DB0__AMUX, CYREG_PRT5_AMUX\r
+.set SCSI_In_DBx__DB0__BIE, CYREG_PRT5_BIE\r
+.set SCSI_In_DBx__DB0__BIT_MASK, CYREG_PRT5_BIT_MASK\r
+.set SCSI_In_DBx__DB0__BYP, CYREG_PRT5_BYP\r
+.set SCSI_In_DBx__DB0__CTL, CYREG_PRT5_CTL\r
+.set SCSI_In_DBx__DB0__DM0, CYREG_PRT5_DM0\r
+.set SCSI_In_DBx__DB0__DM1, CYREG_PRT5_DM1\r
+.set SCSI_In_DBx__DB0__DM2, CYREG_PRT5_DM2\r
+.set SCSI_In_DBx__DB0__DR, CYREG_PRT5_DR\r
+.set SCSI_In_DBx__DB0__INP_DIS, CYREG_PRT5_INP_DIS\r
+.set SCSI_In_DBx__DB0__INTTYPE, CYREG_PICU5_INTTYPE3\r
+.set SCSI_In_DBx__DB0__LCD_COM_SEG, CYREG_PRT5_LCD_COM_SEG\r
+.set SCSI_In_DBx__DB0__LCD_EN, CYREG_PRT5_LCD_EN\r
+.set SCSI_In_DBx__DB0__MASK, 0x08\r
+.set SCSI_In_DBx__DB0__PC, CYREG_PRT5_PC3\r
+.set SCSI_In_DBx__DB0__PORT, 5\r
+.set SCSI_In_DBx__DB0__PRT, CYREG_PRT5_PRT\r
+.set SCSI_In_DBx__DB0__PRTDSI__CAPS_SEL, CYREG_PRT5_CAPS_SEL\r
+.set SCSI_In_DBx__DB0__PRTDSI__DBL_SYNC_IN, CYREG_PRT5_DBL_SYNC_IN\r
+.set SCSI_In_DBx__DB0__PRTDSI__OE_SEL0, CYREG_PRT5_OE_SEL0\r
+.set SCSI_In_DBx__DB0__PRTDSI__OE_SEL1, CYREG_PRT5_OE_SEL1\r
+.set SCSI_In_DBx__DB0__PRTDSI__OUT_SEL0, CYREG_PRT5_OUT_SEL0\r
+.set SCSI_In_DBx__DB0__PRTDSI__OUT_SEL1, CYREG_PRT5_OUT_SEL1\r
+.set SCSI_In_DBx__DB0__PRTDSI__SYNC_OUT, CYREG_PRT5_SYNC_OUT\r
+.set SCSI_In_DBx__DB0__PS, CYREG_PRT5_PS\r
+.set SCSI_In_DBx__DB0__SHIFT, 3\r
+.set SCSI_In_DBx__DB0__SLW, CYREG_PRT5_SLW\r
+.set SCSI_In_DBx__DB1__AG, CYREG_PRT5_AG\r
+.set SCSI_In_DBx__DB1__AMUX, CYREG_PRT5_AMUX\r
+.set SCSI_In_DBx__DB1__BIE, CYREG_PRT5_BIE\r
+.set SCSI_In_DBx__DB1__BIT_MASK, CYREG_PRT5_BIT_MASK\r
+.set SCSI_In_DBx__DB1__BYP, CYREG_PRT5_BYP\r
+.set SCSI_In_DBx__DB1__CTL, CYREG_PRT5_CTL\r
+.set SCSI_In_DBx__DB1__DM0, CYREG_PRT5_DM0\r
+.set SCSI_In_DBx__DB1__DM1, CYREG_PRT5_DM1\r
+.set SCSI_In_DBx__DB1__DM2, CYREG_PRT5_DM2\r
+.set SCSI_In_DBx__DB1__DR, CYREG_PRT5_DR\r
+.set SCSI_In_DBx__DB1__INP_DIS, CYREG_PRT5_INP_DIS\r
+.set SCSI_In_DBx__DB1__INTTYPE, CYREG_PICU5_INTTYPE2\r
+.set SCSI_In_DBx__DB1__LCD_COM_SEG, CYREG_PRT5_LCD_COM_SEG\r
+.set SCSI_In_DBx__DB1__LCD_EN, CYREG_PRT5_LCD_EN\r
+.set SCSI_In_DBx__DB1__MASK, 0x04\r
+.set SCSI_In_DBx__DB1__PC, CYREG_PRT5_PC2\r
+.set SCSI_In_DBx__DB1__PORT, 5\r
+.set SCSI_In_DBx__DB1__PRT, CYREG_PRT5_PRT\r
+.set SCSI_In_DBx__DB1__PRTDSI__CAPS_SEL, CYREG_PRT5_CAPS_SEL\r
+.set SCSI_In_DBx__DB1__PRTDSI__DBL_SYNC_IN, CYREG_PRT5_DBL_SYNC_IN\r
+.set SCSI_In_DBx__DB1__PRTDSI__OE_SEL0, CYREG_PRT5_OE_SEL0\r
+.set SCSI_In_DBx__DB1__PRTDSI__OE_SEL1, CYREG_PRT5_OE_SEL1\r
+.set SCSI_In_DBx__DB1__PRTDSI__OUT_SEL0, CYREG_PRT5_OUT_SEL0\r
+.set SCSI_In_DBx__DB1__PRTDSI__OUT_SEL1, CYREG_PRT5_OUT_SEL1\r
+.set SCSI_In_DBx__DB1__PRTDSI__SYNC_OUT, CYREG_PRT5_SYNC_OUT\r
+.set SCSI_In_DBx__DB1__PS, CYREG_PRT5_PS\r
+.set SCSI_In_DBx__DB1__SHIFT, 2\r
+.set SCSI_In_DBx__DB1__SLW, CYREG_PRT5_SLW\r
+.set SCSI_In_DBx__DB2__AG, CYREG_PRT6_AG\r
+.set SCSI_In_DBx__DB2__AMUX, CYREG_PRT6_AMUX\r
+.set SCSI_In_DBx__DB2__BIE, CYREG_PRT6_BIE\r
+.set SCSI_In_DBx__DB2__BIT_MASK, CYREG_PRT6_BIT_MASK\r
+.set SCSI_In_DBx__DB2__BYP, CYREG_PRT6_BYP\r
+.set SCSI_In_DBx__DB2__CTL, CYREG_PRT6_CTL\r
+.set SCSI_In_DBx__DB2__DM0, CYREG_PRT6_DM0\r
+.set SCSI_In_DBx__DB2__DM1, CYREG_PRT6_DM1\r
+.set SCSI_In_DBx__DB2__DM2, CYREG_PRT6_DM2\r
+.set SCSI_In_DBx__DB2__DR, CYREG_PRT6_DR\r
+.set SCSI_In_DBx__DB2__INP_DIS, CYREG_PRT6_INP_DIS\r
+.set SCSI_In_DBx__DB2__INTTYPE, CYREG_PICU6_INTTYPE7\r
+.set SCSI_In_DBx__DB2__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
+.set SCSI_In_DBx__DB2__LCD_EN, CYREG_PRT6_LCD_EN\r
+.set SCSI_In_DBx__DB2__MASK, 0x80\r
+.set SCSI_In_DBx__DB2__PC, CYREG_PRT6_PC7\r
+.set SCSI_In_DBx__DB2__PORT, 6\r
+.set SCSI_In_DBx__DB2__PRT, CYREG_PRT6_PRT\r
+.set SCSI_In_DBx__DB2__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
+.set SCSI_In_DBx__DB2__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
+.set SCSI_In_DBx__DB2__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
+.set SCSI_In_DBx__DB2__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
+.set SCSI_In_DBx__DB2__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
+.set SCSI_In_DBx__DB2__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
+.set SCSI_In_DBx__DB2__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
+.set SCSI_In_DBx__DB2__PS, CYREG_PRT6_PS\r
+.set SCSI_In_DBx__DB2__SHIFT, 7\r
+.set SCSI_In_DBx__DB2__SLW, CYREG_PRT6_SLW\r
+.set SCSI_In_DBx__DB3__AG, CYREG_PRT6_AG\r
+.set SCSI_In_DBx__DB3__AMUX, CYREG_PRT6_AMUX\r
+.set SCSI_In_DBx__DB3__BIE, CYREG_PRT6_BIE\r
+.set SCSI_In_DBx__DB3__BIT_MASK, CYREG_PRT6_BIT_MASK\r
+.set SCSI_In_DBx__DB3__BYP, CYREG_PRT6_BYP\r
+.set SCSI_In_DBx__DB3__CTL, CYREG_PRT6_CTL\r
+.set SCSI_In_DBx__DB3__DM0, CYREG_PRT6_DM0\r
+.set SCSI_In_DBx__DB3__DM1, CYREG_PRT6_DM1\r
+.set SCSI_In_DBx__DB3__DM2, CYREG_PRT6_DM2\r
+.set SCSI_In_DBx__DB3__DR, CYREG_PRT6_DR\r
+.set SCSI_In_DBx__DB3__INP_DIS, CYREG_PRT6_INP_DIS\r
+.set SCSI_In_DBx__DB3__INTTYPE, CYREG_PICU6_INTTYPE6\r
+.set SCSI_In_DBx__DB3__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
+.set SCSI_In_DBx__DB3__LCD_EN, CYREG_PRT6_LCD_EN\r
+.set SCSI_In_DBx__DB3__MASK, 0x40\r
+.set SCSI_In_DBx__DB3__PC, CYREG_PRT6_PC6\r
+.set SCSI_In_DBx__DB3__PORT, 6\r
+.set SCSI_In_DBx__DB3__PRT, CYREG_PRT6_PRT\r
+.set SCSI_In_DBx__DB3__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
+.set SCSI_In_DBx__DB3__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
+.set SCSI_In_DBx__DB3__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
+.set SCSI_In_DBx__DB3__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
+.set SCSI_In_DBx__DB3__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
+.set SCSI_In_DBx__DB3__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
+.set SCSI_In_DBx__DB3__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
+.set SCSI_In_DBx__DB3__PS, CYREG_PRT6_PS\r
+.set SCSI_In_DBx__DB3__SHIFT, 6\r
+.set SCSI_In_DBx__DB3__SLW, CYREG_PRT6_SLW\r
+.set SCSI_In_DBx__DB4__AG, CYREG_PRT12_AG\r
+.set SCSI_In_DBx__DB4__BIE, CYREG_PRT12_BIE\r
+.set SCSI_In_DBx__DB4__BIT_MASK, CYREG_PRT12_BIT_MASK\r
+.set SCSI_In_DBx__DB4__BYP, CYREG_PRT12_BYP\r
+.set SCSI_In_DBx__DB4__DM0, CYREG_PRT12_DM0\r
+.set SCSI_In_DBx__DB4__DM1, CYREG_PRT12_DM1\r
+.set SCSI_In_DBx__DB4__DM2, CYREG_PRT12_DM2\r
+.set SCSI_In_DBx__DB4__DR, CYREG_PRT12_DR\r
+.set SCSI_In_DBx__DB4__INP_DIS, CYREG_PRT12_INP_DIS\r
+.set SCSI_In_DBx__DB4__INTTYPE, CYREG_PICU12_INTTYPE5\r
+.set SCSI_In_DBx__DB4__MASK, 0x20\r
+.set SCSI_In_DBx__DB4__PC, CYREG_PRT12_PC5\r
+.set SCSI_In_DBx__DB4__PORT, 12\r
+.set SCSI_In_DBx__DB4__PRT, CYREG_PRT12_PRT\r
+.set SCSI_In_DBx__DB4__PRTDSI__DBL_SYNC_IN, CYREG_PRT12_DBL_SYNC_IN\r
+.set SCSI_In_DBx__DB4__PRTDSI__OE_SEL0, CYREG_PRT12_OE_SEL0\r
+.set SCSI_In_DBx__DB4__PRTDSI__OE_SEL1, CYREG_PRT12_OE_SEL1\r
+.set SCSI_In_DBx__DB4__PRTDSI__OUT_SEL0, CYREG_PRT12_OUT_SEL0\r
+.set SCSI_In_DBx__DB4__PRTDSI__OUT_SEL1, CYREG_PRT12_OUT_SEL1\r
+.set SCSI_In_DBx__DB4__PRTDSI__SYNC_OUT, CYREG_PRT12_SYNC_OUT\r
+.set SCSI_In_DBx__DB4__PS, CYREG_PRT12_PS\r
+.set SCSI_In_DBx__DB4__SHIFT, 5\r
+.set SCSI_In_DBx__DB4__SIO_CFG, CYREG_PRT12_SIO_CFG\r
+.set SCSI_In_DBx__DB4__SIO_DIFF, CYREG_PRT12_SIO_DIFF\r
+.set SCSI_In_DBx__DB4__SIO_HYST_EN, CYREG_PRT12_SIO_HYST_EN\r
+.set SCSI_In_DBx__DB4__SIO_REG_HIFREQ, CYREG_PRT12_SIO_REG_HIFREQ\r
+.set SCSI_In_DBx__DB4__SLW, CYREG_PRT12_SLW\r
+.set SCSI_In_DBx__DB5__AG, CYREG_PRT12_AG\r
+.set SCSI_In_DBx__DB5__BIE, CYREG_PRT12_BIE\r
+.set SCSI_In_DBx__DB5__BIT_MASK, CYREG_PRT12_BIT_MASK\r
+.set SCSI_In_DBx__DB5__BYP, CYREG_PRT12_BYP\r
+.set SCSI_In_DBx__DB5__DM0, CYREG_PRT12_DM0\r
+.set SCSI_In_DBx__DB5__DM1, CYREG_PRT12_DM1\r
+.set SCSI_In_DBx__DB5__DM2, CYREG_PRT12_DM2\r
+.set SCSI_In_DBx__DB5__DR, CYREG_PRT12_DR\r
+.set SCSI_In_DBx__DB5__INP_DIS, CYREG_PRT12_INP_DIS\r
+.set SCSI_In_DBx__DB5__INTTYPE, CYREG_PICU12_INTTYPE4\r
+.set SCSI_In_DBx__DB5__MASK, 0x10\r
+.set SCSI_In_DBx__DB5__PC, CYREG_PRT12_PC4\r
+.set SCSI_In_DBx__DB5__PORT, 12\r
+.set SCSI_In_DBx__DB5__PRT, CYREG_PRT12_PRT\r
+.set SCSI_In_DBx__DB5__PRTDSI__DBL_SYNC_IN, CYREG_PRT12_DBL_SYNC_IN\r
+.set SCSI_In_DBx__DB5__PRTDSI__OE_SEL0, CYREG_PRT12_OE_SEL0\r
+.set SCSI_In_DBx__DB5__PRTDSI__OE_SEL1, CYREG_PRT12_OE_SEL1\r
+.set SCSI_In_DBx__DB5__PRTDSI__OUT_SEL0, CYREG_PRT12_OUT_SEL0\r
+.set SCSI_In_DBx__DB5__PRTDSI__OUT_SEL1, CYREG_PRT12_OUT_SEL1\r
+.set SCSI_In_DBx__DB5__PRTDSI__SYNC_OUT, CYREG_PRT12_SYNC_OUT\r
+.set SCSI_In_DBx__DB5__PS, CYREG_PRT12_PS\r
+.set SCSI_In_DBx__DB5__SHIFT, 4\r
+.set SCSI_In_DBx__DB5__SIO_CFG, CYREG_PRT12_SIO_CFG\r
+.set SCSI_In_DBx__DB5__SIO_DIFF, CYREG_PRT12_SIO_DIFF\r
+.set SCSI_In_DBx__DB5__SIO_HYST_EN, CYREG_PRT12_SIO_HYST_EN\r
+.set SCSI_In_DBx__DB5__SIO_REG_HIFREQ, CYREG_PRT12_SIO_REG_HIFREQ\r
+.set SCSI_In_DBx__DB5__SLW, CYREG_PRT12_SLW\r
+.set SCSI_In_DBx__DB6__AG, CYREG_PRT2_AG\r
+.set SCSI_In_DBx__DB6__AMUX, CYREG_PRT2_AMUX\r
+.set SCSI_In_DBx__DB6__BIE, CYREG_PRT2_BIE\r
+.set SCSI_In_DBx__DB6__BIT_MASK, CYREG_PRT2_BIT_MASK\r
+.set SCSI_In_DBx__DB6__BYP, CYREG_PRT2_BYP\r
+.set SCSI_In_DBx__DB6__CTL, CYREG_PRT2_CTL\r
+.set SCSI_In_DBx__DB6__DM0, CYREG_PRT2_DM0\r
+.set SCSI_In_DBx__DB6__DM1, CYREG_PRT2_DM1\r
+.set SCSI_In_DBx__DB6__DM2, CYREG_PRT2_DM2\r
+.set SCSI_In_DBx__DB6__DR, CYREG_PRT2_DR\r
+.set SCSI_In_DBx__DB6__INP_DIS, CYREG_PRT2_INP_DIS\r
+.set SCSI_In_DBx__DB6__INTTYPE, CYREG_PICU2_INTTYPE5\r
+.set SCSI_In_DBx__DB6__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG\r
+.set SCSI_In_DBx__DB6__LCD_EN, CYREG_PRT2_LCD_EN\r
+.set SCSI_In_DBx__DB6__MASK, 0x20\r
+.set SCSI_In_DBx__DB6__PC, CYREG_PRT2_PC5\r
+.set SCSI_In_DBx__DB6__PORT, 2\r
+.set SCSI_In_DBx__DB6__PRT, CYREG_PRT2_PRT\r
+.set SCSI_In_DBx__DB6__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL\r
+.set SCSI_In_DBx__DB6__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN\r
+.set SCSI_In_DBx__DB6__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0\r
+.set SCSI_In_DBx__DB6__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1\r
+.set SCSI_In_DBx__DB6__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0\r
+.set SCSI_In_DBx__DB6__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1\r
+.set SCSI_In_DBx__DB6__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT\r
+.set SCSI_In_DBx__DB6__PS, CYREG_PRT2_PS\r
+.set SCSI_In_DBx__DB6__SHIFT, 5\r
+.set SCSI_In_DBx__DB6__SLW, CYREG_PRT2_SLW\r
+.set SCSI_In_DBx__DB7__AG, CYREG_PRT2_AG\r
+.set SCSI_In_DBx__DB7__AMUX, CYREG_PRT2_AMUX\r
+.set SCSI_In_DBx__DB7__BIE, CYREG_PRT2_BIE\r
+.set SCSI_In_DBx__DB7__BIT_MASK, CYREG_PRT2_BIT_MASK\r
+.set SCSI_In_DBx__DB7__BYP, CYREG_PRT2_BYP\r
+.set SCSI_In_DBx__DB7__CTL, CYREG_PRT2_CTL\r
+.set SCSI_In_DBx__DB7__DM0, CYREG_PRT2_DM0\r
+.set SCSI_In_DBx__DB7__DM1, CYREG_PRT2_DM1\r
+.set SCSI_In_DBx__DB7__DM2, CYREG_PRT2_DM2\r
+.set SCSI_In_DBx__DB7__DR, CYREG_PRT2_DR\r
+.set SCSI_In_DBx__DB7__INP_DIS, CYREG_PRT2_INP_DIS\r
+.set SCSI_In_DBx__DB7__INTTYPE, CYREG_PICU2_INTTYPE4\r
+.set SCSI_In_DBx__DB7__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG\r
+.set SCSI_In_DBx__DB7__LCD_EN, CYREG_PRT2_LCD_EN\r
+.set SCSI_In_DBx__DB7__MASK, 0x10\r
+.set SCSI_In_DBx__DB7__PC, CYREG_PRT2_PC4\r
+.set SCSI_In_DBx__DB7__PORT, 2\r
+.set SCSI_In_DBx__DB7__PRT, CYREG_PRT2_PRT\r
+.set SCSI_In_DBx__DB7__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL\r
+.set SCSI_In_DBx__DB7__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN\r
+.set SCSI_In_DBx__DB7__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0\r
+.set SCSI_In_DBx__DB7__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1\r
+.set SCSI_In_DBx__DB7__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0\r
+.set SCSI_In_DBx__DB7__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1\r
+.set SCSI_In_DBx__DB7__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT\r
+.set SCSI_In_DBx__DB7__PS, CYREG_PRT2_PS\r
+.set SCSI_In_DBx__DB7__SHIFT, 4\r
+.set SCSI_In_DBx__DB7__SLW, CYREG_PRT2_SLW\r
+\r
+/* SD_MISO */\r
+.set SD_MISO__0__INTTYPE, CYREG_PICU3_INTTYPE1\r
+.set SD_MISO__0__MASK, 0x02\r
+.set SD_MISO__0__PC, CYREG_PRT3_PC1\r
+.set SD_MISO__0__PORT, 3\r
+.set SD_MISO__0__SHIFT, 1\r
+.set SD_MISO__AG, CYREG_PRT3_AG\r
+.set SD_MISO__AMUX, CYREG_PRT3_AMUX\r
+.set SD_MISO__BIE, CYREG_PRT3_BIE\r
+.set SD_MISO__BIT_MASK, CYREG_PRT3_BIT_MASK\r
+.set SD_MISO__BYP, CYREG_PRT3_BYP\r
+.set SD_MISO__CTL, CYREG_PRT3_CTL\r
+.set SD_MISO__DM0, CYREG_PRT3_DM0\r
+.set SD_MISO__DM1, CYREG_PRT3_DM1\r
+.set SD_MISO__DM2, CYREG_PRT3_DM2\r
+.set SD_MISO__DR, CYREG_PRT3_DR\r
+.set SD_MISO__INP_DIS, CYREG_PRT3_INP_DIS\r
+.set SD_MISO__INTTYPE_BASE, CYDEV_PICU_INTTYPE_PICU3_BASE\r
+.set SD_MISO__LCD_COM_SEG, CYREG_PRT3_LCD_COM_SEG\r
+.set SD_MISO__LCD_EN, CYREG_PRT3_LCD_EN\r
+.set SD_MISO__MASK, 0x02\r
+.set SD_MISO__PORT, 3\r
+.set SD_MISO__PRT, CYREG_PRT3_PRT\r
+.set SD_MISO__PRTDSI__CAPS_SEL, CYREG_PRT3_CAPS_SEL\r
+.set SD_MISO__PRTDSI__DBL_SYNC_IN, CYREG_PRT3_DBL_SYNC_IN\r
+.set SD_MISO__PRTDSI__OE_SEL0, CYREG_PRT3_OE_SEL0\r
+.set SD_MISO__PRTDSI__OE_SEL1, CYREG_PRT3_OE_SEL1\r
+.set SD_MISO__PRTDSI__OUT_SEL0, CYREG_PRT3_OUT_SEL0\r
+.set SD_MISO__PRTDSI__OUT_SEL1, CYREG_PRT3_OUT_SEL1\r
+.set SD_MISO__PRTDSI__SYNC_OUT, CYREG_PRT3_SYNC_OUT\r
+.set SD_MISO__PS, CYREG_PRT3_PS\r
+.set SD_MISO__SHIFT, 1\r
+.set SD_MISO__SLW, CYREG_PRT3_SLW\r
+\r
+/* SD_MOSI */\r
+.set SD_MOSI__0__INTTYPE, CYREG_PICU3_INTTYPE3\r
+.set SD_MOSI__0__MASK, 0x08\r
+.set SD_MOSI__0__PC, CYREG_PRT3_PC3\r
+.set SD_MOSI__0__PORT, 3\r
+.set SD_MOSI__0__SHIFT, 3\r
+.set SD_MOSI__AG, CYREG_PRT3_AG\r
+.set SD_MOSI__AMUX, CYREG_PRT3_AMUX\r
+.set SD_MOSI__BIE, CYREG_PRT3_BIE\r
+.set SD_MOSI__BIT_MASK, CYREG_PRT3_BIT_MASK\r
+.set SD_MOSI__BYP, CYREG_PRT3_BYP\r
+.set SD_MOSI__CTL, CYREG_PRT3_CTL\r
+.set SD_MOSI__DM0, CYREG_PRT3_DM0\r
+.set SD_MOSI__DM1, CYREG_PRT3_DM1\r
+.set SD_MOSI__DM2, CYREG_PRT3_DM2\r
+.set SD_MOSI__DR, CYREG_PRT3_DR\r
+.set SD_MOSI__INP_DIS, CYREG_PRT3_INP_DIS\r
+.set SD_MOSI__INTTYPE_BASE, CYDEV_PICU_INTTYPE_PICU3_BASE\r
+.set SD_MOSI__LCD_COM_SEG, CYREG_PRT3_LCD_COM_SEG\r
+.set SD_MOSI__LCD_EN, CYREG_PRT3_LCD_EN\r
+.set SD_MOSI__MASK, 0x08\r
+.set SD_MOSI__PORT, 3\r
+.set SD_MOSI__PRT, CYREG_PRT3_PRT\r
+.set SD_MOSI__PRTDSI__CAPS_SEL, CYREG_PRT3_CAPS_SEL\r
+.set SD_MOSI__PRTDSI__DBL_SYNC_IN, CYREG_PRT3_DBL_SYNC_IN\r
+.set SD_MOSI__PRTDSI__OE_SEL0, CYREG_PRT3_OE_SEL0\r
+.set SD_MOSI__PRTDSI__OE_SEL1, CYREG_PRT3_OE_SEL1\r
+.set SD_MOSI__PRTDSI__OUT_SEL0, CYREG_PRT3_OUT_SEL0\r
+.set SD_MOSI__PRTDSI__OUT_SEL1, CYREG_PRT3_OUT_SEL1\r
+.set SD_MOSI__PRTDSI__SYNC_OUT, CYREG_PRT3_SYNC_OUT\r
+.set SD_MOSI__PS, CYREG_PRT3_PS\r
+.set SD_MOSI__SHIFT, 3\r
+.set SD_MOSI__SLW, CYREG_PRT3_SLW\r
+\r
+/* SCSI_CLK */\r
+.set SCSI_CLK__CFG0, CYREG_CLKDIST_DCFG1_CFG0\r
+.set SCSI_CLK__CFG1, CYREG_CLKDIST_DCFG1_CFG1\r
+.set SCSI_CLK__CFG2, CYREG_CLKDIST_DCFG1_CFG2\r
+.set SCSI_CLK__CFG2_SRC_SEL_MASK, 0x07\r
+.set SCSI_CLK__INDEX, 0x01\r
+.set SCSI_CLK__PM_ACT_CFG, CYREG_PM_ACT_CFG2\r
+.set SCSI_CLK__PM_ACT_MSK, 0x02\r
+.set SCSI_CLK__PM_STBY_CFG, CYREG_PM_STBY_CFG2\r
+.set SCSI_CLK__PM_STBY_MSK, 0x02\r
+\r
+/* SCSI_Out */\r
+.set SCSI_Out__0__AG, CYREG_PRT15_AG\r
+.set SCSI_Out__0__AMUX, CYREG_PRT15_AMUX\r
+.set SCSI_Out__0__BIE, CYREG_PRT15_BIE\r
+.set SCSI_Out__0__BIT_MASK, CYREG_PRT15_BIT_MASK\r
+.set SCSI_Out__0__BYP, CYREG_PRT15_BYP\r
+.set SCSI_Out__0__CTL, CYREG_PRT15_CTL\r
+.set SCSI_Out__0__DM0, CYREG_PRT15_DM0\r
+.set SCSI_Out__0__DM1, CYREG_PRT15_DM1\r
+.set SCSI_Out__0__DM2, CYREG_PRT15_DM2\r
+.set SCSI_Out__0__DR, CYREG_PRT15_DR\r
+.set SCSI_Out__0__INP_DIS, CYREG_PRT15_INP_DIS\r
+.set SCSI_Out__0__INTTYPE, CYREG_PICU15_INTTYPE5\r
+.set SCSI_Out__0__LCD_COM_SEG, CYREG_PRT15_LCD_COM_SEG\r
+.set SCSI_Out__0__LCD_EN, CYREG_PRT15_LCD_EN\r
+.set SCSI_Out__0__MASK, 0x20\r
+.set SCSI_Out__0__PC, CYREG_IO_PC_PRT15_PC5\r
+.set SCSI_Out__0__PORT, 15\r
+.set SCSI_Out__0__PRT, CYREG_PRT15_PRT\r
+.set SCSI_Out__0__PRTDSI__CAPS_SEL, CYREG_PRT15_CAPS_SEL\r
+.set SCSI_Out__0__PRTDSI__DBL_SYNC_IN, CYREG_PRT15_DBL_SYNC_IN\r
+.set SCSI_Out__0__PRTDSI__OE_SEL0, CYREG_PRT15_OE_SEL0\r
+.set SCSI_Out__0__PRTDSI__OE_SEL1, CYREG_PRT15_OE_SEL1\r
+.set SCSI_Out__0__PRTDSI__OUT_SEL0, CYREG_PRT15_OUT_SEL0\r
+.set SCSI_Out__0__PRTDSI__OUT_SEL1, CYREG_PRT15_OUT_SEL1\r
+.set SCSI_Out__0__PRTDSI__SYNC_OUT, CYREG_PRT15_SYNC_OUT\r
+.set SCSI_Out__0__PS, CYREG_PRT15_PS\r
+.set SCSI_Out__0__SHIFT, 5\r
+.set SCSI_Out__0__SLW, CYREG_PRT15_SLW\r
+.set SCSI_Out__1__AG, CYREG_PRT15_AG\r
+.set SCSI_Out__1__AMUX, CYREG_PRT15_AMUX\r
+.set SCSI_Out__1__BIE, CYREG_PRT15_BIE\r
+.set SCSI_Out__1__BIT_MASK, CYREG_PRT15_BIT_MASK\r
+.set SCSI_Out__1__BYP, CYREG_PRT15_BYP\r
+.set SCSI_Out__1__CTL, CYREG_PRT15_CTL\r
+.set SCSI_Out__1__DM0, CYREG_PRT15_DM0\r
+.set SCSI_Out__1__DM1, CYREG_PRT15_DM1\r
+.set SCSI_Out__1__DM2, CYREG_PRT15_DM2\r
+.set SCSI_Out__1__DR, CYREG_PRT15_DR\r
+.set SCSI_Out__1__INP_DIS, CYREG_PRT15_INP_DIS\r
+.set SCSI_Out__1__INTTYPE, CYREG_PICU15_INTTYPE4\r
+.set SCSI_Out__1__LCD_COM_SEG, CYREG_PRT15_LCD_COM_SEG\r
+.set SCSI_Out__1__LCD_EN, CYREG_PRT15_LCD_EN\r
+.set SCSI_Out__1__MASK, 0x10\r
+.set SCSI_Out__1__PC, CYREG_IO_PC_PRT15_PC4\r
+.set SCSI_Out__1__PORT, 15\r
+.set SCSI_Out__1__PRT, CYREG_PRT15_PRT\r
+.set SCSI_Out__1__PRTDSI__CAPS_SEL, CYREG_PRT15_CAPS_SEL\r
+.set SCSI_Out__1__PRTDSI__DBL_SYNC_IN, CYREG_PRT15_DBL_SYNC_IN\r
+.set SCSI_Out__1__PRTDSI__OE_SEL0, CYREG_PRT15_OE_SEL0\r
+.set SCSI_Out__1__PRTDSI__OE_SEL1, CYREG_PRT15_OE_SEL1\r
+.set SCSI_Out__1__PRTDSI__OUT_SEL0, CYREG_PRT15_OUT_SEL0\r
+.set SCSI_Out__1__PRTDSI__OUT_SEL1, CYREG_PRT15_OUT_SEL1\r
+.set SCSI_Out__1__PRTDSI__SYNC_OUT, CYREG_PRT15_SYNC_OUT\r
+.set SCSI_Out__1__PS, CYREG_PRT15_PS\r
+.set SCSI_Out__1__SHIFT, 4\r
+.set SCSI_Out__1__SLW, CYREG_PRT15_SLW\r
+.set SCSI_Out__2__AG, CYREG_PRT6_AG\r
+.set SCSI_Out__2__AMUX, CYREG_PRT6_AMUX\r
+.set SCSI_Out__2__BIE, CYREG_PRT6_BIE\r
+.set SCSI_Out__2__BIT_MASK, CYREG_PRT6_BIT_MASK\r
+.set SCSI_Out__2__BYP, CYREG_PRT6_BYP\r
+.set SCSI_Out__2__CTL, CYREG_PRT6_CTL\r
+.set SCSI_Out__2__DM0, CYREG_PRT6_DM0\r
+.set SCSI_Out__2__DM1, CYREG_PRT6_DM1\r
+.set SCSI_Out__2__DM2, CYREG_PRT6_DM2\r
+.set SCSI_Out__2__DR, CYREG_PRT6_DR\r
+.set SCSI_Out__2__INP_DIS, CYREG_PRT6_INP_DIS\r
+.set SCSI_Out__2__INTTYPE, CYREG_PICU6_INTTYPE1\r
+.set SCSI_Out__2__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
+.set SCSI_Out__2__LCD_EN, CYREG_PRT6_LCD_EN\r
+.set SCSI_Out__2__MASK, 0x02\r
+.set SCSI_Out__2__PC, CYREG_PRT6_PC1\r
+.set SCSI_Out__2__PORT, 6\r
+.set SCSI_Out__2__PRT, CYREG_PRT6_PRT\r
+.set SCSI_Out__2__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
+.set SCSI_Out__2__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
+.set SCSI_Out__2__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
+.set SCSI_Out__2__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
+.set SCSI_Out__2__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
+.set SCSI_Out__2__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
+.set SCSI_Out__2__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
+.set SCSI_Out__2__PS, CYREG_PRT6_PS\r
+.set SCSI_Out__2__SHIFT, 1\r
+.set SCSI_Out__2__SLW, CYREG_PRT6_SLW\r
+.set SCSI_Out__3__AG, CYREG_PRT6_AG\r
+.set SCSI_Out__3__AMUX, CYREG_PRT6_AMUX\r
+.set SCSI_Out__3__BIE, CYREG_PRT6_BIE\r
+.set SCSI_Out__3__BIT_MASK, CYREG_PRT6_BIT_MASK\r
+.set SCSI_Out__3__BYP, CYREG_PRT6_BYP\r
+.set SCSI_Out__3__CTL, CYREG_PRT6_CTL\r
+.set SCSI_Out__3__DM0, CYREG_PRT6_DM0\r
+.set SCSI_Out__3__DM1, CYREG_PRT6_DM1\r
+.set SCSI_Out__3__DM2, CYREG_PRT6_DM2\r
+.set SCSI_Out__3__DR, CYREG_PRT6_DR\r
+.set SCSI_Out__3__INP_DIS, CYREG_PRT6_INP_DIS\r
+.set SCSI_Out__3__INTTYPE, CYREG_PICU6_INTTYPE0\r
+.set SCSI_Out__3__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
+.set SCSI_Out__3__LCD_EN, CYREG_PRT6_LCD_EN\r
+.set SCSI_Out__3__MASK, 0x01\r
+.set SCSI_Out__3__PC, CYREG_PRT6_PC0\r
+.set SCSI_Out__3__PORT, 6\r
+.set SCSI_Out__3__PRT, CYREG_PRT6_PRT\r
+.set SCSI_Out__3__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
+.set SCSI_Out__3__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
+.set SCSI_Out__3__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
+.set SCSI_Out__3__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
+.set SCSI_Out__3__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
+.set SCSI_Out__3__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
+.set SCSI_Out__3__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
+.set SCSI_Out__3__PS, CYREG_PRT6_PS\r
+.set SCSI_Out__3__SHIFT, 0\r
+.set SCSI_Out__3__SLW, CYREG_PRT6_SLW\r
+.set SCSI_Out__4__AG, CYREG_PRT4_AG\r
+.set SCSI_Out__4__AMUX, CYREG_PRT4_AMUX\r
+.set SCSI_Out__4__BIE, CYREG_PRT4_BIE\r
+.set SCSI_Out__4__BIT_MASK, CYREG_PRT4_BIT_MASK\r
+.set SCSI_Out__4__BYP, CYREG_PRT4_BYP\r
+.set SCSI_Out__4__CTL, CYREG_PRT4_CTL\r
+.set SCSI_Out__4__DM0, CYREG_PRT4_DM0\r
+.set SCSI_Out__4__DM1, CYREG_PRT4_DM1\r
+.set SCSI_Out__4__DM2, CYREG_PRT4_DM2\r
+.set SCSI_Out__4__DR, CYREG_PRT4_DR\r
+.set SCSI_Out__4__INP_DIS, CYREG_PRT4_INP_DIS\r
+.set SCSI_Out__4__INTTYPE, CYREG_PICU4_INTTYPE5\r
+.set SCSI_Out__4__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
+.set SCSI_Out__4__LCD_EN, CYREG_PRT4_LCD_EN\r
+.set SCSI_Out__4__MASK, 0x20\r
+.set SCSI_Out__4__PC, CYREG_PRT4_PC5\r
+.set SCSI_Out__4__PORT, 4\r
+.set SCSI_Out__4__PRT, CYREG_PRT4_PRT\r
+.set SCSI_Out__4__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
+.set SCSI_Out__4__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
+.set SCSI_Out__4__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
+.set SCSI_Out__4__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
+.set SCSI_Out__4__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
+.set SCSI_Out__4__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
+.set SCSI_Out__4__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
+.set SCSI_Out__4__PS, CYREG_PRT4_PS\r
+.set SCSI_Out__4__SHIFT, 5\r
+.set SCSI_Out__4__SLW, CYREG_PRT4_SLW\r
+.set SCSI_Out__5__AG, CYREG_PRT4_AG\r
+.set SCSI_Out__5__AMUX, CYREG_PRT4_AMUX\r
+.set SCSI_Out__5__BIE, CYREG_PRT4_BIE\r
+.set SCSI_Out__5__BIT_MASK, CYREG_PRT4_BIT_MASK\r
+.set SCSI_Out__5__BYP, CYREG_PRT4_BYP\r
+.set SCSI_Out__5__CTL, CYREG_PRT4_CTL\r
+.set SCSI_Out__5__DM0, CYREG_PRT4_DM0\r
+.set SCSI_Out__5__DM1, CYREG_PRT4_DM1\r
+.set SCSI_Out__5__DM2, CYREG_PRT4_DM2\r
+.set SCSI_Out__5__DR, CYREG_PRT4_DR\r
+.set SCSI_Out__5__INP_DIS, CYREG_PRT4_INP_DIS\r
+.set SCSI_Out__5__INTTYPE, CYREG_PICU4_INTTYPE4\r
+.set SCSI_Out__5__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
+.set SCSI_Out__5__LCD_EN, CYREG_PRT4_LCD_EN\r
+.set SCSI_Out__5__MASK, 0x10\r
+.set SCSI_Out__5__PC, CYREG_PRT4_PC4\r
+.set SCSI_Out__5__PORT, 4\r
+.set SCSI_Out__5__PRT, CYREG_PRT4_PRT\r
+.set SCSI_Out__5__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
+.set SCSI_Out__5__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
+.set SCSI_Out__5__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
+.set SCSI_Out__5__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
+.set SCSI_Out__5__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
+.set SCSI_Out__5__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
+.set SCSI_Out__5__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
+.set SCSI_Out__5__PS, CYREG_PRT4_PS\r
+.set SCSI_Out__5__SHIFT, 4\r
+.set SCSI_Out__5__SLW, CYREG_PRT4_SLW\r
+.set SCSI_Out__6__AG, CYREG_PRT0_AG\r
+.set SCSI_Out__6__AMUX, CYREG_PRT0_AMUX\r
+.set SCSI_Out__6__BIE, CYREG_PRT0_BIE\r
+.set SCSI_Out__6__BIT_MASK, CYREG_PRT0_BIT_MASK\r
+.set SCSI_Out__6__BYP, CYREG_PRT0_BYP\r
+.set SCSI_Out__6__CTL, CYREG_PRT0_CTL\r
+.set SCSI_Out__6__DM0, CYREG_PRT0_DM0\r
+.set SCSI_Out__6__DM1, CYREG_PRT0_DM1\r
+.set SCSI_Out__6__DM2, CYREG_PRT0_DM2\r
+.set SCSI_Out__6__DR, CYREG_PRT0_DR\r
+.set SCSI_Out__6__INP_DIS, CYREG_PRT0_INP_DIS\r
+.set SCSI_Out__6__INTTYPE, CYREG_PICU0_INTTYPE7\r
+.set SCSI_Out__6__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
+.set SCSI_Out__6__LCD_EN, CYREG_PRT0_LCD_EN\r
+.set SCSI_Out__6__MASK, 0x80\r
+.set SCSI_Out__6__PC, CYREG_PRT0_PC7\r
+.set SCSI_Out__6__PORT, 0\r
+.set SCSI_Out__6__PRT, CYREG_PRT0_PRT\r
+.set SCSI_Out__6__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
+.set SCSI_Out__6__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
+.set SCSI_Out__6__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
+.set SCSI_Out__6__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
+.set SCSI_Out__6__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
+.set SCSI_Out__6__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
+.set SCSI_Out__6__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
+.set SCSI_Out__6__PS, CYREG_PRT0_PS\r
+.set SCSI_Out__6__SHIFT, 7\r
+.set SCSI_Out__6__SLW, CYREG_PRT0_SLW\r
+.set SCSI_Out__7__AG, CYREG_PRT0_AG\r
+.set SCSI_Out__7__AMUX, CYREG_PRT0_AMUX\r
+.set SCSI_Out__7__BIE, CYREG_PRT0_BIE\r
+.set SCSI_Out__7__BIT_MASK, CYREG_PRT0_BIT_MASK\r
+.set SCSI_Out__7__BYP, CYREG_PRT0_BYP\r
+.set SCSI_Out__7__CTL, CYREG_PRT0_CTL\r
+.set SCSI_Out__7__DM0, CYREG_PRT0_DM0\r
+.set SCSI_Out__7__DM1, CYREG_PRT0_DM1\r
+.set SCSI_Out__7__DM2, CYREG_PRT0_DM2\r
+.set SCSI_Out__7__DR, CYREG_PRT0_DR\r
+.set SCSI_Out__7__INP_DIS, CYREG_PRT0_INP_DIS\r
+.set SCSI_Out__7__INTTYPE, CYREG_PICU0_INTTYPE6\r
+.set SCSI_Out__7__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
+.set SCSI_Out__7__LCD_EN, CYREG_PRT0_LCD_EN\r
+.set SCSI_Out__7__MASK, 0x40\r
+.set SCSI_Out__7__PC, CYREG_PRT0_PC6\r
+.set SCSI_Out__7__PORT, 0\r
+.set SCSI_Out__7__PRT, CYREG_PRT0_PRT\r
+.set SCSI_Out__7__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
+.set SCSI_Out__7__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
+.set SCSI_Out__7__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
+.set SCSI_Out__7__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
+.set SCSI_Out__7__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
+.set SCSI_Out__7__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
+.set SCSI_Out__7__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
+.set SCSI_Out__7__PS, CYREG_PRT0_PS\r
+.set SCSI_Out__7__SHIFT, 6\r
+.set SCSI_Out__7__SLW, CYREG_PRT0_SLW\r
+.set SCSI_Out__8__AG, CYREG_PRT0_AG\r
+.set SCSI_Out__8__AMUX, CYREG_PRT0_AMUX\r
+.set SCSI_Out__8__BIE, CYREG_PRT0_BIE\r
+.set SCSI_Out__8__BIT_MASK, CYREG_PRT0_BIT_MASK\r
+.set SCSI_Out__8__BYP, CYREG_PRT0_BYP\r
+.set SCSI_Out__8__CTL, CYREG_PRT0_CTL\r
+.set SCSI_Out__8__DM0, CYREG_PRT0_DM0\r
+.set SCSI_Out__8__DM1, CYREG_PRT0_DM1\r
+.set SCSI_Out__8__DM2, CYREG_PRT0_DM2\r
+.set SCSI_Out__8__DR, CYREG_PRT0_DR\r
+.set SCSI_Out__8__INP_DIS, CYREG_PRT0_INP_DIS\r
+.set SCSI_Out__8__INTTYPE, CYREG_PICU0_INTTYPE3\r
+.set SCSI_Out__8__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
+.set SCSI_Out__8__LCD_EN, CYREG_PRT0_LCD_EN\r
+.set SCSI_Out__8__MASK, 0x08\r
+.set SCSI_Out__8__PC, CYREG_PRT0_PC3\r
+.set SCSI_Out__8__PORT, 0\r
+.set SCSI_Out__8__PRT, CYREG_PRT0_PRT\r
+.set SCSI_Out__8__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
+.set SCSI_Out__8__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
+.set SCSI_Out__8__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
+.set SCSI_Out__8__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
+.set SCSI_Out__8__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
+.set SCSI_Out__8__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
+.set SCSI_Out__8__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
+.set SCSI_Out__8__PS, CYREG_PRT0_PS\r
+.set SCSI_Out__8__SHIFT, 3\r
+.set SCSI_Out__8__SLW, CYREG_PRT0_SLW\r
+.set SCSI_Out__9__AG, CYREG_PRT0_AG\r
+.set SCSI_Out__9__AMUX, CYREG_PRT0_AMUX\r
+.set SCSI_Out__9__BIE, CYREG_PRT0_BIE\r
+.set SCSI_Out__9__BIT_MASK, CYREG_PRT0_BIT_MASK\r
+.set SCSI_Out__9__BYP, CYREG_PRT0_BYP\r
+.set SCSI_Out__9__CTL, CYREG_PRT0_CTL\r
+.set SCSI_Out__9__DM0, CYREG_PRT0_DM0\r
+.set SCSI_Out__9__DM1, CYREG_PRT0_DM1\r
+.set SCSI_Out__9__DM2, CYREG_PRT0_DM2\r
+.set SCSI_Out__9__DR, CYREG_PRT0_DR\r
+.set SCSI_Out__9__INP_DIS, CYREG_PRT0_INP_DIS\r
+.set SCSI_Out__9__INTTYPE, CYREG_PICU0_INTTYPE2\r
+.set SCSI_Out__9__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
+.set SCSI_Out__9__LCD_EN, CYREG_PRT0_LCD_EN\r
+.set SCSI_Out__9__MASK, 0x04\r
+.set SCSI_Out__9__PC, CYREG_PRT0_PC2\r
+.set SCSI_Out__9__PORT, 0\r
+.set SCSI_Out__9__PRT, CYREG_PRT0_PRT\r
+.set SCSI_Out__9__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
+.set SCSI_Out__9__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
+.set SCSI_Out__9__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
+.set SCSI_Out__9__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
+.set SCSI_Out__9__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
+.set SCSI_Out__9__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
+.set SCSI_Out__9__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
+.set SCSI_Out__9__PS, CYREG_PRT0_PS\r
+.set SCSI_Out__9__SHIFT, 2\r
+.set SCSI_Out__9__SLW, CYREG_PRT0_SLW\r
+.set SCSI_Out__ACK__AG, CYREG_PRT6_AG\r
+.set SCSI_Out__ACK__AMUX, CYREG_PRT6_AMUX\r
+.set SCSI_Out__ACK__BIE, CYREG_PRT6_BIE\r
+.set SCSI_Out__ACK__BIT_MASK, CYREG_PRT6_BIT_MASK\r
+.set SCSI_Out__ACK__BYP, CYREG_PRT6_BYP\r
+.set SCSI_Out__ACK__CTL, CYREG_PRT6_CTL\r
+.set SCSI_Out__ACK__DM0, CYREG_PRT6_DM0\r
+.set SCSI_Out__ACK__DM1, CYREG_PRT6_DM1\r
+.set SCSI_Out__ACK__DM2, CYREG_PRT6_DM2\r
+.set SCSI_Out__ACK__DR, CYREG_PRT6_DR\r
+.set SCSI_Out__ACK__INP_DIS, CYREG_PRT6_INP_DIS\r
+.set SCSI_Out__ACK__INTTYPE, CYREG_PICU6_INTTYPE0\r
+.set SCSI_Out__ACK__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
+.set SCSI_Out__ACK__LCD_EN, CYREG_PRT6_LCD_EN\r
+.set SCSI_Out__ACK__MASK, 0x01\r
+.set SCSI_Out__ACK__PC, CYREG_PRT6_PC0\r
+.set SCSI_Out__ACK__PORT, 6\r
+.set SCSI_Out__ACK__PRT, CYREG_PRT6_PRT\r
+.set SCSI_Out__ACK__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
+.set SCSI_Out__ACK__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
+.set SCSI_Out__ACK__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
+.set SCSI_Out__ACK__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
+.set SCSI_Out__ACK__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
+.set SCSI_Out__ACK__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
+.set SCSI_Out__ACK__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
+.set SCSI_Out__ACK__PS, CYREG_PRT6_PS\r
+.set SCSI_Out__ACK__SHIFT, 0\r
+.set SCSI_Out__ACK__SLW, CYREG_PRT6_SLW\r
+.set SCSI_Out__ATN__AG, CYREG_PRT15_AG\r
+.set SCSI_Out__ATN__AMUX, CYREG_PRT15_AMUX\r
+.set SCSI_Out__ATN__BIE, CYREG_PRT15_BIE\r
+.set SCSI_Out__ATN__BIT_MASK, CYREG_PRT15_BIT_MASK\r
+.set SCSI_Out__ATN__BYP, CYREG_PRT15_BYP\r
+.set SCSI_Out__ATN__CTL, CYREG_PRT15_CTL\r
+.set SCSI_Out__ATN__DM0, CYREG_PRT15_DM0\r
+.set SCSI_Out__ATN__DM1, CYREG_PRT15_DM1\r
+.set SCSI_Out__ATN__DM2, CYREG_PRT15_DM2\r
+.set SCSI_Out__ATN__DR, CYREG_PRT15_DR\r
+.set SCSI_Out__ATN__INP_DIS, CYREG_PRT15_INP_DIS\r
+.set SCSI_Out__ATN__INTTYPE, CYREG_PICU15_INTTYPE4\r
+.set SCSI_Out__ATN__LCD_COM_SEG, CYREG_PRT15_LCD_COM_SEG\r
+.set SCSI_Out__ATN__LCD_EN, CYREG_PRT15_LCD_EN\r
+.set SCSI_Out__ATN__MASK, 0x10\r
+.set SCSI_Out__ATN__PC, CYREG_IO_PC_PRT15_PC4\r
+.set SCSI_Out__ATN__PORT, 15\r
+.set SCSI_Out__ATN__PRT, CYREG_PRT15_PRT\r
+.set SCSI_Out__ATN__PRTDSI__CAPS_SEL, CYREG_PRT15_CAPS_SEL\r
+.set SCSI_Out__ATN__PRTDSI__DBL_SYNC_IN, CYREG_PRT15_DBL_SYNC_IN\r
+.set SCSI_Out__ATN__PRTDSI__OE_SEL0, CYREG_PRT15_OE_SEL0\r
+.set SCSI_Out__ATN__PRTDSI__OE_SEL1, CYREG_PRT15_OE_SEL1\r
+.set SCSI_Out__ATN__PRTDSI__OUT_SEL0, CYREG_PRT15_OUT_SEL0\r
+.set SCSI_Out__ATN__PRTDSI__OUT_SEL1, CYREG_PRT15_OUT_SEL1\r
+.set SCSI_Out__ATN__PRTDSI__SYNC_OUT, CYREG_PRT15_SYNC_OUT\r
+.set SCSI_Out__ATN__PS, CYREG_PRT15_PS\r
+.set SCSI_Out__ATN__SHIFT, 4\r
+.set SCSI_Out__ATN__SLW, CYREG_PRT15_SLW\r
+.set SCSI_Out__BSY__AG, CYREG_PRT6_AG\r
+.set SCSI_Out__BSY__AMUX, CYREG_PRT6_AMUX\r
+.set SCSI_Out__BSY__BIE, CYREG_PRT6_BIE\r
+.set SCSI_Out__BSY__BIT_MASK, CYREG_PRT6_BIT_MASK\r
+.set SCSI_Out__BSY__BYP, CYREG_PRT6_BYP\r
+.set SCSI_Out__BSY__CTL, CYREG_PRT6_CTL\r
+.set SCSI_Out__BSY__DM0, CYREG_PRT6_DM0\r
+.set SCSI_Out__BSY__DM1, CYREG_PRT6_DM1\r
+.set SCSI_Out__BSY__DM2, CYREG_PRT6_DM2\r
+.set SCSI_Out__BSY__DR, CYREG_PRT6_DR\r
+.set SCSI_Out__BSY__INP_DIS, CYREG_PRT6_INP_DIS\r
+.set SCSI_Out__BSY__INTTYPE, CYREG_PICU6_INTTYPE1\r
+.set SCSI_Out__BSY__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
+.set SCSI_Out__BSY__LCD_EN, CYREG_PRT6_LCD_EN\r
+.set SCSI_Out__BSY__MASK, 0x02\r
+.set SCSI_Out__BSY__PC, CYREG_PRT6_PC1\r
+.set SCSI_Out__BSY__PORT, 6\r
+.set SCSI_Out__BSY__PRT, CYREG_PRT6_PRT\r
+.set SCSI_Out__BSY__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
+.set SCSI_Out__BSY__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
+.set SCSI_Out__BSY__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
+.set SCSI_Out__BSY__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
+.set SCSI_Out__BSY__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
+.set SCSI_Out__BSY__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
+.set SCSI_Out__BSY__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
+.set SCSI_Out__BSY__PS, CYREG_PRT6_PS\r
+.set SCSI_Out__BSY__SHIFT, 1\r
+.set SCSI_Out__BSY__SLW, CYREG_PRT6_SLW\r
+.set SCSI_Out__CD_raw__AG, CYREG_PRT0_AG\r
+.set SCSI_Out__CD_raw__AMUX, CYREG_PRT0_AMUX\r
+.set SCSI_Out__CD_raw__BIE, CYREG_PRT0_BIE\r
+.set SCSI_Out__CD_raw__BIT_MASK, CYREG_PRT0_BIT_MASK\r
+.set SCSI_Out__CD_raw__BYP, CYREG_PRT0_BYP\r
+.set SCSI_Out__CD_raw__CTL, CYREG_PRT0_CTL\r
+.set SCSI_Out__CD_raw__DM0, CYREG_PRT0_DM0\r
+.set SCSI_Out__CD_raw__DM1, CYREG_PRT0_DM1\r
+.set SCSI_Out__CD_raw__DM2, CYREG_PRT0_DM2\r
+.set SCSI_Out__CD_raw__DR, CYREG_PRT0_DR\r
+.set SCSI_Out__CD_raw__INP_DIS, CYREG_PRT0_INP_DIS\r
+.set SCSI_Out__CD_raw__INTTYPE, CYREG_PICU0_INTTYPE6\r
+.set SCSI_Out__CD_raw__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
+.set SCSI_Out__CD_raw__LCD_EN, CYREG_PRT0_LCD_EN\r
+.set SCSI_Out__CD_raw__MASK, 0x40\r
+.set SCSI_Out__CD_raw__PC, CYREG_PRT0_PC6\r
+.set SCSI_Out__CD_raw__PORT, 0\r
+.set SCSI_Out__CD_raw__PRT, CYREG_PRT0_PRT\r
+.set SCSI_Out__CD_raw__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
+.set SCSI_Out__CD_raw__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
+.set SCSI_Out__CD_raw__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
+.set SCSI_Out__CD_raw__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
+.set SCSI_Out__CD_raw__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
+.set SCSI_Out__CD_raw__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
+.set SCSI_Out__CD_raw__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
+.set SCSI_Out__CD_raw__PS, CYREG_PRT0_PS\r
+.set SCSI_Out__CD_raw__SHIFT, 6\r
+.set SCSI_Out__CD_raw__SLW, CYREG_PRT0_SLW\r
+.set SCSI_Out__DBP_raw__AG, CYREG_PRT15_AG\r
+.set SCSI_Out__DBP_raw__AMUX, CYREG_PRT15_AMUX\r
+.set SCSI_Out__DBP_raw__BIE, CYREG_PRT15_BIE\r
+.set SCSI_Out__DBP_raw__BIT_MASK, CYREG_PRT15_BIT_MASK\r
+.set SCSI_Out__DBP_raw__BYP, CYREG_PRT15_BYP\r
+.set SCSI_Out__DBP_raw__CTL, CYREG_PRT15_CTL\r
+.set SCSI_Out__DBP_raw__DM0, CYREG_PRT15_DM0\r
+.set SCSI_Out__DBP_raw__DM1, CYREG_PRT15_DM1\r
+.set SCSI_Out__DBP_raw__DM2, CYREG_PRT15_DM2\r
+.set SCSI_Out__DBP_raw__DR, CYREG_PRT15_DR\r
+.set SCSI_Out__DBP_raw__INP_DIS, CYREG_PRT15_INP_DIS\r
+.set SCSI_Out__DBP_raw__INTTYPE, CYREG_PICU15_INTTYPE5\r
+.set SCSI_Out__DBP_raw__LCD_COM_SEG, CYREG_PRT15_LCD_COM_SEG\r
+.set SCSI_Out__DBP_raw__LCD_EN, CYREG_PRT15_LCD_EN\r
+.set SCSI_Out__DBP_raw__MASK, 0x20\r
+.set SCSI_Out__DBP_raw__PC, CYREG_IO_PC_PRT15_PC5\r
+.set SCSI_Out__DBP_raw__PORT, 15\r
+.set SCSI_Out__DBP_raw__PRT, CYREG_PRT15_PRT\r
+.set SCSI_Out__DBP_raw__PRTDSI__CAPS_SEL, CYREG_PRT15_CAPS_SEL\r
+.set SCSI_Out__DBP_raw__PRTDSI__DBL_SYNC_IN, CYREG_PRT15_DBL_SYNC_IN\r
+.set SCSI_Out__DBP_raw__PRTDSI__OE_SEL0, CYREG_PRT15_OE_SEL0\r
+.set SCSI_Out__DBP_raw__PRTDSI__OE_SEL1, CYREG_PRT15_OE_SEL1\r
+.set SCSI_Out__DBP_raw__PRTDSI__OUT_SEL0, CYREG_PRT15_OUT_SEL0\r
+.set SCSI_Out__DBP_raw__PRTDSI__OUT_SEL1, CYREG_PRT15_OUT_SEL1\r
+.set SCSI_Out__DBP_raw__PRTDSI__SYNC_OUT, CYREG_PRT15_SYNC_OUT\r
+.set SCSI_Out__DBP_raw__PS, CYREG_PRT15_PS\r
+.set SCSI_Out__DBP_raw__SHIFT, 5\r
+.set SCSI_Out__DBP_raw__SLW, CYREG_PRT15_SLW\r
+.set SCSI_Out__IO_raw__AG, CYREG_PRT0_AG\r
+.set SCSI_Out__IO_raw__AMUX, CYREG_PRT0_AMUX\r
+.set SCSI_Out__IO_raw__BIE, CYREG_PRT0_BIE\r
+.set SCSI_Out__IO_raw__BIT_MASK, CYREG_PRT0_BIT_MASK\r
+.set SCSI_Out__IO_raw__BYP, CYREG_PRT0_BYP\r
+.set SCSI_Out__IO_raw__CTL, CYREG_PRT0_CTL\r
+.set SCSI_Out__IO_raw__DM0, CYREG_PRT0_DM0\r
+.set SCSI_Out__IO_raw__DM1, CYREG_PRT0_DM1\r
+.set SCSI_Out__IO_raw__DM2, CYREG_PRT0_DM2\r
+.set SCSI_Out__IO_raw__DR, CYREG_PRT0_DR\r
+.set SCSI_Out__IO_raw__INP_DIS, CYREG_PRT0_INP_DIS\r
+.set SCSI_Out__IO_raw__INTTYPE, CYREG_PICU0_INTTYPE2\r
+.set SCSI_Out__IO_raw__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
+.set SCSI_Out__IO_raw__LCD_EN, CYREG_PRT0_LCD_EN\r
+.set SCSI_Out__IO_raw__MASK, 0x04\r
+.set SCSI_Out__IO_raw__PC, CYREG_PRT0_PC2\r
+.set SCSI_Out__IO_raw__PORT, 0\r
+.set SCSI_Out__IO_raw__PRT, CYREG_PRT0_PRT\r
+.set SCSI_Out__IO_raw__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
+.set SCSI_Out__IO_raw__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
+.set SCSI_Out__IO_raw__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
+.set SCSI_Out__IO_raw__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
+.set SCSI_Out__IO_raw__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
+.set SCSI_Out__IO_raw__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
+.set SCSI_Out__IO_raw__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
+.set SCSI_Out__IO_raw__PS, CYREG_PRT0_PS\r
+.set SCSI_Out__IO_raw__SHIFT, 2\r
+.set SCSI_Out__IO_raw__SLW, CYREG_PRT0_SLW\r
+.set SCSI_Out__MSG_raw__AG, CYREG_PRT4_AG\r
+.set SCSI_Out__MSG_raw__AMUX, CYREG_PRT4_AMUX\r
+.set SCSI_Out__MSG_raw__BIE, CYREG_PRT4_BIE\r
+.set SCSI_Out__MSG_raw__BIT_MASK, CYREG_PRT4_BIT_MASK\r
+.set SCSI_Out__MSG_raw__BYP, CYREG_PRT4_BYP\r
+.set SCSI_Out__MSG_raw__CTL, CYREG_PRT4_CTL\r
+.set SCSI_Out__MSG_raw__DM0, CYREG_PRT4_DM0\r
+.set SCSI_Out__MSG_raw__DM1, CYREG_PRT4_DM1\r
+.set SCSI_Out__MSG_raw__DM2, CYREG_PRT4_DM2\r
+.set SCSI_Out__MSG_raw__DR, CYREG_PRT4_DR\r
+.set SCSI_Out__MSG_raw__INP_DIS, CYREG_PRT4_INP_DIS\r
+.set SCSI_Out__MSG_raw__INTTYPE, CYREG_PICU4_INTTYPE4\r
+.set SCSI_Out__MSG_raw__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
+.set SCSI_Out__MSG_raw__LCD_EN, CYREG_PRT4_LCD_EN\r
+.set SCSI_Out__MSG_raw__MASK, 0x10\r
+.set SCSI_Out__MSG_raw__PC, CYREG_PRT4_PC4\r
+.set SCSI_Out__MSG_raw__PORT, 4\r
+.set SCSI_Out__MSG_raw__PRT, CYREG_PRT4_PRT\r
+.set SCSI_Out__MSG_raw__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
+.set SCSI_Out__MSG_raw__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
+.set SCSI_Out__MSG_raw__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
+.set SCSI_Out__MSG_raw__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
+.set SCSI_Out__MSG_raw__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
+.set SCSI_Out__MSG_raw__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
+.set SCSI_Out__MSG_raw__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
+.set SCSI_Out__MSG_raw__PS, CYREG_PRT4_PS\r
+.set SCSI_Out__MSG_raw__SHIFT, 4\r
+.set SCSI_Out__MSG_raw__SLW, CYREG_PRT4_SLW\r
+.set SCSI_Out__REQ__AG, CYREG_PRT0_AG\r
+.set SCSI_Out__REQ__AMUX, CYREG_PRT0_AMUX\r
+.set SCSI_Out__REQ__BIE, CYREG_PRT0_BIE\r
+.set SCSI_Out__REQ__BIT_MASK, CYREG_PRT0_BIT_MASK\r
+.set SCSI_Out__REQ__BYP, CYREG_PRT0_BYP\r
+.set SCSI_Out__REQ__CTL, CYREG_PRT0_CTL\r
+.set SCSI_Out__REQ__DM0, CYREG_PRT0_DM0\r
+.set SCSI_Out__REQ__DM1, CYREG_PRT0_DM1\r
+.set SCSI_Out__REQ__DM2, CYREG_PRT0_DM2\r
+.set SCSI_Out__REQ__DR, CYREG_PRT0_DR\r
+.set SCSI_Out__REQ__INP_DIS, CYREG_PRT0_INP_DIS\r
+.set SCSI_Out__REQ__INTTYPE, CYREG_PICU0_INTTYPE3\r
+.set SCSI_Out__REQ__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
+.set SCSI_Out__REQ__LCD_EN, CYREG_PRT0_LCD_EN\r
+.set SCSI_Out__REQ__MASK, 0x08\r
+.set SCSI_Out__REQ__PC, CYREG_PRT0_PC3\r
+.set SCSI_Out__REQ__PORT, 0\r
+.set SCSI_Out__REQ__PRT, CYREG_PRT0_PRT\r
+.set SCSI_Out__REQ__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
+.set SCSI_Out__REQ__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
+.set SCSI_Out__REQ__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
+.set SCSI_Out__REQ__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
+.set SCSI_Out__REQ__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
+.set SCSI_Out__REQ__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
+.set SCSI_Out__REQ__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
+.set SCSI_Out__REQ__PS, CYREG_PRT0_PS\r
+.set SCSI_Out__REQ__SHIFT, 3\r
+.set SCSI_Out__REQ__SLW, CYREG_PRT0_SLW\r
+.set SCSI_Out__RST__AG, CYREG_PRT4_AG\r
+.set SCSI_Out__RST__AMUX, CYREG_PRT4_AMUX\r
+.set SCSI_Out__RST__BIE, CYREG_PRT4_BIE\r
+.set SCSI_Out__RST__BIT_MASK, CYREG_PRT4_BIT_MASK\r
+.set SCSI_Out__RST__BYP, CYREG_PRT4_BYP\r
+.set SCSI_Out__RST__CTL, CYREG_PRT4_CTL\r
+.set SCSI_Out__RST__DM0, CYREG_PRT4_DM0\r
+.set SCSI_Out__RST__DM1, CYREG_PRT4_DM1\r
+.set SCSI_Out__RST__DM2, CYREG_PRT4_DM2\r
+.set SCSI_Out__RST__DR, CYREG_PRT4_DR\r
+.set SCSI_Out__RST__INP_DIS, CYREG_PRT4_INP_DIS\r
+.set SCSI_Out__RST__INTTYPE, CYREG_PICU4_INTTYPE5\r
+.set SCSI_Out__RST__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
+.set SCSI_Out__RST__LCD_EN, CYREG_PRT4_LCD_EN\r
+.set SCSI_Out__RST__MASK, 0x20\r
+.set SCSI_Out__RST__PC, CYREG_PRT4_PC5\r
+.set SCSI_Out__RST__PORT, 4\r
+.set SCSI_Out__RST__PRT, CYREG_PRT4_PRT\r
+.set SCSI_Out__RST__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
+.set SCSI_Out__RST__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
+.set SCSI_Out__RST__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
+.set SCSI_Out__RST__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
+.set SCSI_Out__RST__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
+.set SCSI_Out__RST__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
+.set SCSI_Out__RST__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
+.set SCSI_Out__RST__PS, CYREG_PRT4_PS\r
+.set SCSI_Out__RST__SHIFT, 5\r
+.set SCSI_Out__RST__SLW, CYREG_PRT4_SLW\r
+.set SCSI_Out__SEL__AG, CYREG_PRT0_AG\r
+.set SCSI_Out__SEL__AMUX, CYREG_PRT0_AMUX\r
+.set SCSI_Out__SEL__BIE, CYREG_PRT0_BIE\r
+.set SCSI_Out__SEL__BIT_MASK, CYREG_PRT0_BIT_MASK\r
+.set SCSI_Out__SEL__BYP, CYREG_PRT0_BYP\r
+.set SCSI_Out__SEL__CTL, CYREG_PRT0_CTL\r
+.set SCSI_Out__SEL__DM0, CYREG_PRT0_DM0\r
+.set SCSI_Out__SEL__DM1, CYREG_PRT0_DM1\r
+.set SCSI_Out__SEL__DM2, CYREG_PRT0_DM2\r
+.set SCSI_Out__SEL__DR, CYREG_PRT0_DR\r
+.set SCSI_Out__SEL__INP_DIS, CYREG_PRT0_INP_DIS\r
+.set SCSI_Out__SEL__INTTYPE, CYREG_PICU0_INTTYPE7\r
+.set SCSI_Out__SEL__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
+.set SCSI_Out__SEL__LCD_EN, CYREG_PRT0_LCD_EN\r
+.set SCSI_Out__SEL__MASK, 0x80\r
+.set SCSI_Out__SEL__PC, CYREG_PRT0_PC7\r
+.set SCSI_Out__SEL__PORT, 0\r
+.set SCSI_Out__SEL__PRT, CYREG_PRT0_PRT\r
+.set SCSI_Out__SEL__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
+.set SCSI_Out__SEL__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
+.set SCSI_Out__SEL__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
+.set SCSI_Out__SEL__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
+.set SCSI_Out__SEL__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
+.set SCSI_Out__SEL__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
+.set SCSI_Out__SEL__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
+.set SCSI_Out__SEL__PS, CYREG_PRT0_PS\r
+.set SCSI_Out__SEL__SHIFT, 7\r
+.set SCSI_Out__SEL__SLW, CYREG_PRT0_SLW\r
+.set SCSI_Out_Bits_Sync_ctrl_reg__0__MASK, 0x01\r
+.set SCSI_Out_Bits_Sync_ctrl_reg__0__POS, 0\r
+.set SCSI_Out_Bits_Sync_ctrl_reg__1__MASK, 0x02\r
+.set SCSI_Out_Bits_Sync_ctrl_reg__1__POS, 1\r
+.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG, CYREG_B0_UDB10_11_ACTL\r
+.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG, CYREG_B0_UDB10_11_CTL\r
+.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG, CYREG_B0_UDB10_11_CTL\r
+.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG, CYREG_B0_UDB10_11_CTL\r
+.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG, CYREG_B0_UDB10_11_CTL\r
+.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_MASK_REG, CYREG_B0_UDB10_11_MSK\r
+.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG, CYREG_B0_UDB10_11_MSK\r
+.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG, CYREG_B0_UDB10_11_MSK\r
+.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG, CYREG_B0_UDB10_11_MSK\r
+.set SCSI_Out_Bits_Sync_ctrl_reg__2__MASK, 0x04\r
+.set SCSI_Out_Bits_Sync_ctrl_reg__2__POS, 2\r
+.set SCSI_Out_Bits_Sync_ctrl_reg__3__MASK, 0x08\r
+.set SCSI_Out_Bits_Sync_ctrl_reg__3__POS, 3\r
+.set SCSI_Out_Bits_Sync_ctrl_reg__4__MASK, 0x10\r
+.set SCSI_Out_Bits_Sync_ctrl_reg__4__POS, 4\r
+.set SCSI_Out_Bits_Sync_ctrl_reg__5__MASK, 0x20\r
+.set SCSI_Out_Bits_Sync_ctrl_reg__5__POS, 5\r
+.set SCSI_Out_Bits_Sync_ctrl_reg__6__MASK, 0x40\r
+.set SCSI_Out_Bits_Sync_ctrl_reg__6__POS, 6\r
+.set SCSI_Out_Bits_Sync_ctrl_reg__7__MASK, 0x80\r
+.set SCSI_Out_Bits_Sync_ctrl_reg__7__POS, 7\r
+.set SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_AUX_CTL_REG, CYREG_B0_UDB10_ACTL\r
+.set SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_REG, CYREG_B0_UDB10_CTL\r
+.set SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_ST_REG, CYREG_B0_UDB10_ST_CTL\r
+.set SCSI_Out_Bits_Sync_ctrl_reg__COUNT_REG, CYREG_B0_UDB10_CTL\r
+.set SCSI_Out_Bits_Sync_ctrl_reg__COUNT_ST_REG, CYREG_B0_UDB10_ST_CTL\r
+.set SCSI_Out_Bits_Sync_ctrl_reg__MASK, 0xFF\r
+.set SCSI_Out_Bits_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG, CYREG_B0_UDB10_MSK_ACTL\r
+.set SCSI_Out_Bits_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG, CYREG_B0_UDB10_MSK_ACTL\r
+.set SCSI_Out_Bits_Sync_ctrl_reg__PERIOD_REG, CYREG_B0_UDB10_MSK\r
+.set SCSI_Out_Ctl_Sync_ctrl_reg__0__MASK, 0x01\r
+.set SCSI_Out_Ctl_Sync_ctrl_reg__0__POS, 0\r
+.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG, CYREG_B0_UDB07_08_ACTL\r
+.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG, CYREG_B0_UDB07_08_CTL\r
+.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG, CYREG_B0_UDB07_08_CTL\r
+.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG, CYREG_B0_UDB07_08_CTL\r
+.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG, CYREG_B0_UDB07_08_CTL\r
+.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG, CYREG_B0_UDB07_08_MSK\r
+.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG, CYREG_B0_UDB07_08_MSK\r
+.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG, CYREG_B0_UDB07_08_MSK\r
+.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG, CYREG_B0_UDB07_08_MSK\r
+.set SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG, CYREG_B0_UDB07_ACTL\r
+.set SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_REG, CYREG_B0_UDB07_CTL\r
+.set SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_ST_REG, CYREG_B0_UDB07_ST_CTL\r
+.set SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_REG, CYREG_B0_UDB07_CTL\r
+.set SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_ST_REG, CYREG_B0_UDB07_ST_CTL\r
+.set SCSI_Out_Ctl_Sync_ctrl_reg__MASK, 0x01\r
+.set SCSI_Out_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG, CYREG_B0_UDB07_MSK_ACTL\r
+.set SCSI_Out_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG, CYREG_B0_UDB07_MSK_ACTL\r
+.set SCSI_Out_Ctl_Sync_ctrl_reg__PERIOD_REG, CYREG_B0_UDB07_MSK\r
+.set SCSI_Out_DBx__0__AG, CYREG_PRT5_AG\r
+.set SCSI_Out_DBx__0__AMUX, CYREG_PRT5_AMUX\r
+.set SCSI_Out_DBx__0__BIE, CYREG_PRT5_BIE\r
+.set SCSI_Out_DBx__0__BIT_MASK, CYREG_PRT5_BIT_MASK\r
+.set SCSI_Out_DBx__0__BYP, CYREG_PRT5_BYP\r
+.set SCSI_Out_DBx__0__CTL, CYREG_PRT5_CTL\r
+.set SCSI_Out_DBx__0__DM0, CYREG_PRT5_DM0\r
+.set SCSI_Out_DBx__0__DM1, CYREG_PRT5_DM1\r
+.set SCSI_Out_DBx__0__DM2, CYREG_PRT5_DM2\r
+.set SCSI_Out_DBx__0__DR, CYREG_PRT5_DR\r
+.set SCSI_Out_DBx__0__INP_DIS, CYREG_PRT5_INP_DIS\r
+.set SCSI_Out_DBx__0__INTTYPE, CYREG_PICU5_INTTYPE1\r
+.set SCSI_Out_DBx__0__LCD_COM_SEG, CYREG_PRT5_LCD_COM_SEG\r
+.set SCSI_Out_DBx__0__LCD_EN, CYREG_PRT5_LCD_EN\r
+.set SCSI_Out_DBx__0__MASK, 0x02\r
+.set SCSI_Out_DBx__0__PC, CYREG_PRT5_PC1\r
+.set SCSI_Out_DBx__0__PORT, 5\r
+.set SCSI_Out_DBx__0__PRT, CYREG_PRT5_PRT\r
+.set SCSI_Out_DBx__0__PRTDSI__CAPS_SEL, CYREG_PRT5_CAPS_SEL\r
+.set SCSI_Out_DBx__0__PRTDSI__DBL_SYNC_IN, CYREG_PRT5_DBL_SYNC_IN\r
+.set SCSI_Out_DBx__0__PRTDSI__OE_SEL0, CYREG_PRT5_OE_SEL0\r
+.set SCSI_Out_DBx__0__PRTDSI__OE_SEL1, CYREG_PRT5_OE_SEL1\r
+.set SCSI_Out_DBx__0__PRTDSI__OUT_SEL0, CYREG_PRT5_OUT_SEL0\r
+.set SCSI_Out_DBx__0__PRTDSI__OUT_SEL1, CYREG_PRT5_OUT_SEL1\r
+.set SCSI_Out_DBx__0__PRTDSI__SYNC_OUT, CYREG_PRT5_SYNC_OUT\r
+.set SCSI_Out_DBx__0__PS, CYREG_PRT5_PS\r
+.set SCSI_Out_DBx__0__SHIFT, 1\r
+.set SCSI_Out_DBx__0__SLW, CYREG_PRT5_SLW\r
+.set SCSI_Out_DBx__1__AG, CYREG_PRT5_AG\r
+.set SCSI_Out_DBx__1__AMUX, CYREG_PRT5_AMUX\r
+.set SCSI_Out_DBx__1__BIE, CYREG_PRT5_BIE\r
+.set SCSI_Out_DBx__1__BIT_MASK, CYREG_PRT5_BIT_MASK\r
+.set SCSI_Out_DBx__1__BYP, CYREG_PRT5_BYP\r
+.set SCSI_Out_DBx__1__CTL, CYREG_PRT5_CTL\r
+.set SCSI_Out_DBx__1__DM0, CYREG_PRT5_DM0\r
+.set SCSI_Out_DBx__1__DM1, CYREG_PRT5_DM1\r
+.set SCSI_Out_DBx__1__DM2, CYREG_PRT5_DM2\r
+.set SCSI_Out_DBx__1__DR, CYREG_PRT5_DR\r
+.set SCSI_Out_DBx__1__INP_DIS, CYREG_PRT5_INP_DIS\r
+.set SCSI_Out_DBx__1__INTTYPE, CYREG_PICU5_INTTYPE0\r
+.set SCSI_Out_DBx__1__LCD_COM_SEG, CYREG_PRT5_LCD_COM_SEG\r
+.set SCSI_Out_DBx__1__LCD_EN, CYREG_PRT5_LCD_EN\r
+.set SCSI_Out_DBx__1__MASK, 0x01\r
+.set SCSI_Out_DBx__1__PC, CYREG_PRT5_PC0\r
+.set SCSI_Out_DBx__1__PORT, 5\r
+.set SCSI_Out_DBx__1__PRT, CYREG_PRT5_PRT\r
+.set SCSI_Out_DBx__1__PRTDSI__CAPS_SEL, CYREG_PRT5_CAPS_SEL\r
+.set SCSI_Out_DBx__1__PRTDSI__DBL_SYNC_IN, CYREG_PRT5_DBL_SYNC_IN\r
+.set SCSI_Out_DBx__1__PRTDSI__OE_SEL0, CYREG_PRT5_OE_SEL0\r
+.set SCSI_Out_DBx__1__PRTDSI__OE_SEL1, CYREG_PRT5_OE_SEL1\r
+.set SCSI_Out_DBx__1__PRTDSI__OUT_SEL0, CYREG_PRT5_OUT_SEL0\r
+.set SCSI_Out_DBx__1__PRTDSI__OUT_SEL1, CYREG_PRT5_OUT_SEL1\r
+.set SCSI_Out_DBx__1__PRTDSI__SYNC_OUT, CYREG_PRT5_SYNC_OUT\r
+.set SCSI_Out_DBx__1__PS, CYREG_PRT5_PS\r
+.set SCSI_Out_DBx__1__SHIFT, 0\r
+.set SCSI_Out_DBx__1__SLW, CYREG_PRT5_SLW\r
+.set SCSI_Out_DBx__2__AG, CYREG_PRT6_AG\r
+.set SCSI_Out_DBx__2__AMUX, CYREG_PRT6_AMUX\r
+.set SCSI_Out_DBx__2__BIE, CYREG_PRT6_BIE\r
+.set SCSI_Out_DBx__2__BIT_MASK, CYREG_PRT6_BIT_MASK\r
+.set SCSI_Out_DBx__2__BYP, CYREG_PRT6_BYP\r
+.set SCSI_Out_DBx__2__CTL, CYREG_PRT6_CTL\r
+.set SCSI_Out_DBx__2__DM0, CYREG_PRT6_DM0\r
+.set SCSI_Out_DBx__2__DM1, CYREG_PRT6_DM1\r
+.set SCSI_Out_DBx__2__DM2, CYREG_PRT6_DM2\r
+.set SCSI_Out_DBx__2__DR, CYREG_PRT6_DR\r
+.set SCSI_Out_DBx__2__INP_DIS, CYREG_PRT6_INP_DIS\r
+.set SCSI_Out_DBx__2__INTTYPE, CYREG_PICU6_INTTYPE5\r
+.set SCSI_Out_DBx__2__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
+.set SCSI_Out_DBx__2__LCD_EN, CYREG_PRT6_LCD_EN\r
+.set SCSI_Out_DBx__2__MASK, 0x20\r
+.set SCSI_Out_DBx__2__PC, CYREG_PRT6_PC5\r
+.set SCSI_Out_DBx__2__PORT, 6\r
+.set SCSI_Out_DBx__2__PRT, CYREG_PRT6_PRT\r
+.set SCSI_Out_DBx__2__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
+.set SCSI_Out_DBx__2__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
+.set SCSI_Out_DBx__2__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
+.set SCSI_Out_DBx__2__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
+.set SCSI_Out_DBx__2__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
+.set SCSI_Out_DBx__2__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
+.set SCSI_Out_DBx__2__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
+.set SCSI_Out_DBx__2__PS, CYREG_PRT6_PS\r
+.set SCSI_Out_DBx__2__SHIFT, 5\r
+.set SCSI_Out_DBx__2__SLW, CYREG_PRT6_SLW\r
+.set SCSI_Out_DBx__3__AG, CYREG_PRT6_AG\r
+.set SCSI_Out_DBx__3__AMUX, CYREG_PRT6_AMUX\r
+.set SCSI_Out_DBx__3__BIE, CYREG_PRT6_BIE\r
+.set SCSI_Out_DBx__3__BIT_MASK, CYREG_PRT6_BIT_MASK\r
+.set SCSI_Out_DBx__3__BYP, CYREG_PRT6_BYP\r
+.set SCSI_Out_DBx__3__CTL, CYREG_PRT6_CTL\r
+.set SCSI_Out_DBx__3__DM0, CYREG_PRT6_DM0\r
+.set SCSI_Out_DBx__3__DM1, CYREG_PRT6_DM1\r
+.set SCSI_Out_DBx__3__DM2, CYREG_PRT6_DM2\r
+.set SCSI_Out_DBx__3__DR, CYREG_PRT6_DR\r
+.set SCSI_Out_DBx__3__INP_DIS, CYREG_PRT6_INP_DIS\r
+.set SCSI_Out_DBx__3__INTTYPE, CYREG_PICU6_INTTYPE4\r
+.set SCSI_Out_DBx__3__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
+.set SCSI_Out_DBx__3__LCD_EN, CYREG_PRT6_LCD_EN\r
+.set SCSI_Out_DBx__3__MASK, 0x10\r
+.set SCSI_Out_DBx__3__PC, CYREG_PRT6_PC4\r
+.set SCSI_Out_DBx__3__PORT, 6\r
+.set SCSI_Out_DBx__3__PRT, CYREG_PRT6_PRT\r
+.set SCSI_Out_DBx__3__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
+.set SCSI_Out_DBx__3__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
+.set SCSI_Out_DBx__3__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
+.set SCSI_Out_DBx__3__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
+.set SCSI_Out_DBx__3__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
+.set SCSI_Out_DBx__3__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
+.set SCSI_Out_DBx__3__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
+.set SCSI_Out_DBx__3__PS, CYREG_PRT6_PS\r
+.set SCSI_Out_DBx__3__SHIFT, 4\r
+.set SCSI_Out_DBx__3__SLW, CYREG_PRT6_SLW\r
+.set SCSI_Out_DBx__4__AG, CYREG_PRT2_AG\r
+.set SCSI_Out_DBx__4__AMUX, CYREG_PRT2_AMUX\r
+.set SCSI_Out_DBx__4__BIE, CYREG_PRT2_BIE\r
+.set SCSI_Out_DBx__4__BIT_MASK, CYREG_PRT2_BIT_MASK\r
+.set SCSI_Out_DBx__4__BYP, CYREG_PRT2_BYP\r
+.set SCSI_Out_DBx__4__CTL, CYREG_PRT2_CTL\r
+.set SCSI_Out_DBx__4__DM0, CYREG_PRT2_DM0\r
+.set SCSI_Out_DBx__4__DM1, CYREG_PRT2_DM1\r
+.set SCSI_Out_DBx__4__DM2, CYREG_PRT2_DM2\r
+.set SCSI_Out_DBx__4__DR, CYREG_PRT2_DR\r
+.set SCSI_Out_DBx__4__INP_DIS, CYREG_PRT2_INP_DIS\r
+.set SCSI_Out_DBx__4__INTTYPE, CYREG_PICU2_INTTYPE7\r
+.set SCSI_Out_DBx__4__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG\r
+.set SCSI_Out_DBx__4__LCD_EN, CYREG_PRT2_LCD_EN\r
+.set SCSI_Out_DBx__4__MASK, 0x80\r
+.set SCSI_Out_DBx__4__PC, CYREG_PRT2_PC7\r
+.set SCSI_Out_DBx__4__PORT, 2\r
+.set SCSI_Out_DBx__4__PRT, CYREG_PRT2_PRT\r
+.set SCSI_Out_DBx__4__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL\r
+.set SCSI_Out_DBx__4__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN\r
+.set SCSI_Out_DBx__4__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0\r
+.set SCSI_Out_DBx__4__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1\r
+.set SCSI_Out_DBx__4__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0\r
+.set SCSI_Out_DBx__4__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1\r
+.set SCSI_Out_DBx__4__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT\r
+.set SCSI_Out_DBx__4__PS, CYREG_PRT2_PS\r
+.set SCSI_Out_DBx__4__SHIFT, 7\r
+.set SCSI_Out_DBx__4__SLW, CYREG_PRT2_SLW\r
+.set SCSI_Out_DBx__5__AG, CYREG_PRT2_AG\r
+.set SCSI_Out_DBx__5__AMUX, CYREG_PRT2_AMUX\r
+.set SCSI_Out_DBx__5__BIE, CYREG_PRT2_BIE\r
+.set SCSI_Out_DBx__5__BIT_MASK, CYREG_PRT2_BIT_MASK\r
+.set SCSI_Out_DBx__5__BYP, CYREG_PRT2_BYP\r
+.set SCSI_Out_DBx__5__CTL, CYREG_PRT2_CTL\r
+.set SCSI_Out_DBx__5__DM0, CYREG_PRT2_DM0\r
+.set SCSI_Out_DBx__5__DM1, CYREG_PRT2_DM1\r
+.set SCSI_Out_DBx__5__DM2, CYREG_PRT2_DM2\r
+.set SCSI_Out_DBx__5__DR, CYREG_PRT2_DR\r
+.set SCSI_Out_DBx__5__INP_DIS, CYREG_PRT2_INP_DIS\r
+.set SCSI_Out_DBx__5__INTTYPE, CYREG_PICU2_INTTYPE6\r
+.set SCSI_Out_DBx__5__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG\r
+.set SCSI_Out_DBx__5__LCD_EN, CYREG_PRT2_LCD_EN\r
+.set SCSI_Out_DBx__5__MASK, 0x40\r
+.set SCSI_Out_DBx__5__PC, CYREG_PRT2_PC6\r
+.set SCSI_Out_DBx__5__PORT, 2\r
+.set SCSI_Out_DBx__5__PRT, CYREG_PRT2_PRT\r
+.set SCSI_Out_DBx__5__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL\r
+.set SCSI_Out_DBx__5__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN\r
+.set SCSI_Out_DBx__5__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0\r
+.set SCSI_Out_DBx__5__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1\r
+.set SCSI_Out_DBx__5__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0\r
+.set SCSI_Out_DBx__5__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1\r
+.set SCSI_Out_DBx__5__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT\r
+.set SCSI_Out_DBx__5__PS, CYREG_PRT2_PS\r
+.set SCSI_Out_DBx__5__SHIFT, 6\r
+.set SCSI_Out_DBx__5__SLW, CYREG_PRT2_SLW\r
+.set SCSI_Out_DBx__6__AG, CYREG_PRT2_AG\r
+.set SCSI_Out_DBx__6__AMUX, CYREG_PRT2_AMUX\r
+.set SCSI_Out_DBx__6__BIE, CYREG_PRT2_BIE\r
+.set SCSI_Out_DBx__6__BIT_MASK, CYREG_PRT2_BIT_MASK\r
+.set SCSI_Out_DBx__6__BYP, CYREG_PRT2_BYP\r
+.set SCSI_Out_DBx__6__CTL, CYREG_PRT2_CTL\r
+.set SCSI_Out_DBx__6__DM0, CYREG_PRT2_DM0\r
+.set SCSI_Out_DBx__6__DM1, CYREG_PRT2_DM1\r
+.set SCSI_Out_DBx__6__DM2, CYREG_PRT2_DM2\r
+.set SCSI_Out_DBx__6__DR, CYREG_PRT2_DR\r
+.set SCSI_Out_DBx__6__INP_DIS, CYREG_PRT2_INP_DIS\r
+.set SCSI_Out_DBx__6__INTTYPE, CYREG_PICU2_INTTYPE3\r
+.set SCSI_Out_DBx__6__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG\r
+.set SCSI_Out_DBx__6__LCD_EN, CYREG_PRT2_LCD_EN\r
+.set SCSI_Out_DBx__6__MASK, 0x08\r
+.set SCSI_Out_DBx__6__PC, CYREG_PRT2_PC3\r
+.set SCSI_Out_DBx__6__PORT, 2\r
+.set SCSI_Out_DBx__6__PRT, CYREG_PRT2_PRT\r
+.set SCSI_Out_DBx__6__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL\r
+.set SCSI_Out_DBx__6__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN\r
+.set SCSI_Out_DBx__6__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0\r
+.set SCSI_Out_DBx__6__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1\r
+.set SCSI_Out_DBx__6__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0\r
+.set SCSI_Out_DBx__6__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1\r
+.set SCSI_Out_DBx__6__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT\r
+.set SCSI_Out_DBx__6__PS, CYREG_PRT2_PS\r
+.set SCSI_Out_DBx__6__SHIFT, 3\r
+.set SCSI_Out_DBx__6__SLW, CYREG_PRT2_SLW\r
+.set SCSI_Out_DBx__7__AG, CYREG_PRT2_AG\r
+.set SCSI_Out_DBx__7__AMUX, CYREG_PRT2_AMUX\r
+.set SCSI_Out_DBx__7__BIE, CYREG_PRT2_BIE\r
+.set SCSI_Out_DBx__7__BIT_MASK, CYREG_PRT2_BIT_MASK\r
+.set SCSI_Out_DBx__7__BYP, CYREG_PRT2_BYP\r
+.set SCSI_Out_DBx__7__CTL, CYREG_PRT2_CTL\r
+.set SCSI_Out_DBx__7__DM0, CYREG_PRT2_DM0\r
+.set SCSI_Out_DBx__7__DM1, CYREG_PRT2_DM1\r
+.set SCSI_Out_DBx__7__DM2, CYREG_PRT2_DM2\r
+.set SCSI_Out_DBx__7__DR, CYREG_PRT2_DR\r
+.set SCSI_Out_DBx__7__INP_DIS, CYREG_PRT2_INP_DIS\r
+.set SCSI_Out_DBx__7__INTTYPE, CYREG_PICU2_INTTYPE2\r
+.set SCSI_Out_DBx__7__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG\r
+.set SCSI_Out_DBx__7__LCD_EN, CYREG_PRT2_LCD_EN\r
+.set SCSI_Out_DBx__7__MASK, 0x04\r
+.set SCSI_Out_DBx__7__PC, CYREG_PRT2_PC2\r
+.set SCSI_Out_DBx__7__PORT, 2\r
+.set SCSI_Out_DBx__7__PRT, CYREG_PRT2_PRT\r
+.set SCSI_Out_DBx__7__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL\r
+.set SCSI_Out_DBx__7__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN\r
+.set SCSI_Out_DBx__7__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0\r
+.set SCSI_Out_DBx__7__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1\r
+.set SCSI_Out_DBx__7__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0\r
+.set SCSI_Out_DBx__7__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1\r
+.set SCSI_Out_DBx__7__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT\r
+.set SCSI_Out_DBx__7__PS, CYREG_PRT2_PS\r
+.set SCSI_Out_DBx__7__SHIFT, 2\r
+.set SCSI_Out_DBx__7__SLW, CYREG_PRT2_SLW\r
+.set SCSI_Out_DBx__DB0__AG, CYREG_PRT5_AG\r
+.set SCSI_Out_DBx__DB0__AMUX, CYREG_PRT5_AMUX\r
+.set SCSI_Out_DBx__DB0__BIE, CYREG_PRT5_BIE\r
+.set SCSI_Out_DBx__DB0__BIT_MASK, CYREG_PRT5_BIT_MASK\r
+.set SCSI_Out_DBx__DB0__BYP, CYREG_PRT5_BYP\r
+.set SCSI_Out_DBx__DB0__CTL, CYREG_PRT5_CTL\r
+.set SCSI_Out_DBx__DB0__DM0, CYREG_PRT5_DM0\r
+.set SCSI_Out_DBx__DB0__DM1, CYREG_PRT5_DM1\r
+.set SCSI_Out_DBx__DB0__DM2, CYREG_PRT5_DM2\r
+.set SCSI_Out_DBx__DB0__DR, CYREG_PRT5_DR\r
+.set SCSI_Out_DBx__DB0__INP_DIS, CYREG_PRT5_INP_DIS\r
+.set SCSI_Out_DBx__DB0__INTTYPE, CYREG_PICU5_INTTYPE1\r
+.set SCSI_Out_DBx__DB0__LCD_COM_SEG, CYREG_PRT5_LCD_COM_SEG\r
+.set SCSI_Out_DBx__DB0__LCD_EN, CYREG_PRT5_LCD_EN\r
+.set SCSI_Out_DBx__DB0__MASK, 0x02\r
+.set SCSI_Out_DBx__DB0__PC, CYREG_PRT5_PC1\r
+.set SCSI_Out_DBx__DB0__PORT, 5\r
+.set SCSI_Out_DBx__DB0__PRT, CYREG_PRT5_PRT\r
+.set SCSI_Out_DBx__DB0__PRTDSI__CAPS_SEL, CYREG_PRT5_CAPS_SEL\r
+.set SCSI_Out_DBx__DB0__PRTDSI__DBL_SYNC_IN, CYREG_PRT5_DBL_SYNC_IN\r
+.set SCSI_Out_DBx__DB0__PRTDSI__OE_SEL0, CYREG_PRT5_OE_SEL0\r
+.set SCSI_Out_DBx__DB0__PRTDSI__OE_SEL1, CYREG_PRT5_OE_SEL1\r
+.set SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL0, CYREG_PRT5_OUT_SEL0\r
+.set SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL1, CYREG_PRT5_OUT_SEL1\r
+.set SCSI_Out_DBx__DB0__PRTDSI__SYNC_OUT, CYREG_PRT5_SYNC_OUT\r
+.set SCSI_Out_DBx__DB0__PS, CYREG_PRT5_PS\r
+.set SCSI_Out_DBx__DB0__SHIFT, 1\r
+.set SCSI_Out_DBx__DB0__SLW, CYREG_PRT5_SLW\r
+.set SCSI_Out_DBx__DB1__AG, CYREG_PRT5_AG\r
+.set SCSI_Out_DBx__DB1__AMUX, CYREG_PRT5_AMUX\r
+.set SCSI_Out_DBx__DB1__BIE, CYREG_PRT5_BIE\r
+.set SCSI_Out_DBx__DB1__BIT_MASK, CYREG_PRT5_BIT_MASK\r
+.set SCSI_Out_DBx__DB1__BYP, CYREG_PRT5_BYP\r
+.set SCSI_Out_DBx__DB1__CTL, CYREG_PRT5_CTL\r
+.set SCSI_Out_DBx__DB1__DM0, CYREG_PRT5_DM0\r
+.set SCSI_Out_DBx__DB1__DM1, CYREG_PRT5_DM1\r
+.set SCSI_Out_DBx__DB1__DM2, CYREG_PRT5_DM2\r
+.set SCSI_Out_DBx__DB1__DR, CYREG_PRT5_DR\r
+.set SCSI_Out_DBx__DB1__INP_DIS, CYREG_PRT5_INP_DIS\r
+.set SCSI_Out_DBx__DB1__INTTYPE, CYREG_PICU5_INTTYPE0\r
+.set SCSI_Out_DBx__DB1__LCD_COM_SEG, CYREG_PRT5_LCD_COM_SEG\r
+.set SCSI_Out_DBx__DB1__LCD_EN, CYREG_PRT5_LCD_EN\r
+.set SCSI_Out_DBx__DB1__MASK, 0x01\r
+.set SCSI_Out_DBx__DB1__PC, CYREG_PRT5_PC0\r
+.set SCSI_Out_DBx__DB1__PORT, 5\r
+.set SCSI_Out_DBx__DB1__PRT, CYREG_PRT5_PRT\r
+.set SCSI_Out_DBx__DB1__PRTDSI__CAPS_SEL, CYREG_PRT5_CAPS_SEL\r
+.set SCSI_Out_DBx__DB1__PRTDSI__DBL_SYNC_IN, CYREG_PRT5_DBL_SYNC_IN\r
+.set SCSI_Out_DBx__DB1__PRTDSI__OE_SEL0, CYREG_PRT5_OE_SEL0\r
+.set SCSI_Out_DBx__DB1__PRTDSI__OE_SEL1, CYREG_PRT5_OE_SEL1\r
+.set SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL0, CYREG_PRT5_OUT_SEL0\r
+.set SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL1, CYREG_PRT5_OUT_SEL1\r
+.set SCSI_Out_DBx__DB1__PRTDSI__SYNC_OUT, CYREG_PRT5_SYNC_OUT\r
+.set SCSI_Out_DBx__DB1__PS, CYREG_PRT5_PS\r
+.set SCSI_Out_DBx__DB1__SHIFT, 0\r
+.set SCSI_Out_DBx__DB1__SLW, CYREG_PRT5_SLW\r
+.set SCSI_Out_DBx__DB2__AG, CYREG_PRT6_AG\r
+.set SCSI_Out_DBx__DB2__AMUX, CYREG_PRT6_AMUX\r
+.set SCSI_Out_DBx__DB2__BIE, CYREG_PRT6_BIE\r
+.set SCSI_Out_DBx__DB2__BIT_MASK, CYREG_PRT6_BIT_MASK\r
+.set SCSI_Out_DBx__DB2__BYP, CYREG_PRT6_BYP\r
+.set SCSI_Out_DBx__DB2__CTL, CYREG_PRT6_CTL\r
+.set SCSI_Out_DBx__DB2__DM0, CYREG_PRT6_DM0\r
+.set SCSI_Out_DBx__DB2__DM1, CYREG_PRT6_DM1\r
+.set SCSI_Out_DBx__DB2__DM2, CYREG_PRT6_DM2\r
+.set SCSI_Out_DBx__DB2__DR, CYREG_PRT6_DR\r
+.set SCSI_Out_DBx__DB2__INP_DIS, CYREG_PRT6_INP_DIS\r
+.set SCSI_Out_DBx__DB2__INTTYPE, CYREG_PICU6_INTTYPE5\r
+.set SCSI_Out_DBx__DB2__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
+.set SCSI_Out_DBx__DB2__LCD_EN, CYREG_PRT6_LCD_EN\r
+.set SCSI_Out_DBx__DB2__MASK, 0x20\r
+.set SCSI_Out_DBx__DB2__PC, CYREG_PRT6_PC5\r
+.set SCSI_Out_DBx__DB2__PORT, 6\r
+.set SCSI_Out_DBx__DB2__PRT, CYREG_PRT6_PRT\r
+.set SCSI_Out_DBx__DB2__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
+.set SCSI_Out_DBx__DB2__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
+.set SCSI_Out_DBx__DB2__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
+.set SCSI_Out_DBx__DB2__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
+.set SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
+.set SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
+.set SCSI_Out_DBx__DB2__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
+.set SCSI_Out_DBx__DB2__PS, CYREG_PRT6_PS\r
+.set SCSI_Out_DBx__DB2__SHIFT, 5\r
+.set SCSI_Out_DBx__DB2__SLW, CYREG_PRT6_SLW\r
+.set SCSI_Out_DBx__DB3__AG, CYREG_PRT6_AG\r
+.set SCSI_Out_DBx__DB3__AMUX, CYREG_PRT6_AMUX\r
+.set SCSI_Out_DBx__DB3__BIE, CYREG_PRT6_BIE\r
+.set SCSI_Out_DBx__DB3__BIT_MASK, CYREG_PRT6_BIT_MASK\r
+.set SCSI_Out_DBx__DB3__BYP, CYREG_PRT6_BYP\r
+.set SCSI_Out_DBx__DB3__CTL, CYREG_PRT6_CTL\r
+.set SCSI_Out_DBx__DB3__DM0, CYREG_PRT6_DM0\r
+.set SCSI_Out_DBx__DB3__DM1, CYREG_PRT6_DM1\r
+.set SCSI_Out_DBx__DB3__DM2, CYREG_PRT6_DM2\r
+.set SCSI_Out_DBx__DB3__DR, CYREG_PRT6_DR\r
+.set SCSI_Out_DBx__DB3__INP_DIS, CYREG_PRT6_INP_DIS\r
+.set SCSI_Out_DBx__DB3__INTTYPE, CYREG_PICU6_INTTYPE4\r
+.set SCSI_Out_DBx__DB3__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
+.set SCSI_Out_DBx__DB3__LCD_EN, CYREG_PRT6_LCD_EN\r
+.set SCSI_Out_DBx__DB3__MASK, 0x10\r
+.set SCSI_Out_DBx__DB3__PC, CYREG_PRT6_PC4\r
+.set SCSI_Out_DBx__DB3__PORT, 6\r
+.set SCSI_Out_DBx__DB3__PRT, CYREG_PRT6_PRT\r
+.set SCSI_Out_DBx__DB3__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
+.set SCSI_Out_DBx__DB3__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
+.set SCSI_Out_DBx__DB3__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
+.set SCSI_Out_DBx__DB3__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
+.set SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
+.set SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
+.set SCSI_Out_DBx__DB3__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
+.set SCSI_Out_DBx__DB3__PS, CYREG_PRT6_PS\r
+.set SCSI_Out_DBx__DB3__SHIFT, 4\r
+.set SCSI_Out_DBx__DB3__SLW, CYREG_PRT6_SLW\r
+.set SCSI_Out_DBx__DB4__AG, CYREG_PRT2_AG\r
+.set SCSI_Out_DBx__DB4__AMUX, CYREG_PRT2_AMUX\r
+.set SCSI_Out_DBx__DB4__BIE, CYREG_PRT2_BIE\r
+.set SCSI_Out_DBx__DB4__BIT_MASK, CYREG_PRT2_BIT_MASK\r
+.set SCSI_Out_DBx__DB4__BYP, CYREG_PRT2_BYP\r
+.set SCSI_Out_DBx__DB4__CTL, CYREG_PRT2_CTL\r
+.set SCSI_Out_DBx__DB4__DM0, CYREG_PRT2_DM0\r
+.set SCSI_Out_DBx__DB4__DM1, CYREG_PRT2_DM1\r
+.set SCSI_Out_DBx__DB4__DM2, CYREG_PRT2_DM2\r
+.set SCSI_Out_DBx__DB4__DR, CYREG_PRT2_DR\r
+.set SCSI_Out_DBx__DB4__INP_DIS, CYREG_PRT2_INP_DIS\r
+.set SCSI_Out_DBx__DB4__INTTYPE, CYREG_PICU2_INTTYPE7\r
+.set SCSI_Out_DBx__DB4__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG\r
+.set SCSI_Out_DBx__DB4__LCD_EN, CYREG_PRT2_LCD_EN\r
+.set SCSI_Out_DBx__DB4__MASK, 0x80\r
+.set SCSI_Out_DBx__DB4__PC, CYREG_PRT2_PC7\r
+.set SCSI_Out_DBx__DB4__PORT, 2\r
+.set SCSI_Out_DBx__DB4__PRT, CYREG_PRT2_PRT\r
+.set SCSI_Out_DBx__DB4__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL\r
+.set SCSI_Out_DBx__DB4__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN\r
+.set SCSI_Out_DBx__DB4__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0\r
+.set SCSI_Out_DBx__DB4__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1\r
+.set SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0\r
+.set SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1\r
+.set SCSI_Out_DBx__DB4__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT\r
+.set SCSI_Out_DBx__DB4__PS, CYREG_PRT2_PS\r
+.set SCSI_Out_DBx__DB4__SHIFT, 7\r
+.set SCSI_Out_DBx__DB4__SLW, CYREG_PRT2_SLW\r
+.set SCSI_Out_DBx__DB5__AG, CYREG_PRT2_AG\r
+.set SCSI_Out_DBx__DB5__AMUX, CYREG_PRT2_AMUX\r
+.set SCSI_Out_DBx__DB5__BIE, CYREG_PRT2_BIE\r
+.set SCSI_Out_DBx__DB5__BIT_MASK, CYREG_PRT2_BIT_MASK\r
+.set SCSI_Out_DBx__DB5__BYP, CYREG_PRT2_BYP\r
+.set SCSI_Out_DBx__DB5__CTL, CYREG_PRT2_CTL\r
+.set SCSI_Out_DBx__DB5__DM0, CYREG_PRT2_DM0\r
+.set SCSI_Out_DBx__DB5__DM1, CYREG_PRT2_DM1\r
+.set SCSI_Out_DBx__DB5__DM2, CYREG_PRT2_DM2\r
+.set SCSI_Out_DBx__DB5__DR, CYREG_PRT2_DR\r
+.set SCSI_Out_DBx__DB5__INP_DIS, CYREG_PRT2_INP_DIS\r
+.set SCSI_Out_DBx__DB5__INTTYPE, CYREG_PICU2_INTTYPE6\r
+.set SCSI_Out_DBx__DB5__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG\r
+.set SCSI_Out_DBx__DB5__LCD_EN, CYREG_PRT2_LCD_EN\r
+.set SCSI_Out_DBx__DB5__MASK, 0x40\r
+.set SCSI_Out_DBx__DB5__PC, CYREG_PRT2_PC6\r
+.set SCSI_Out_DBx__DB5__PORT, 2\r
+.set SCSI_Out_DBx__DB5__PRT, CYREG_PRT2_PRT\r
+.set SCSI_Out_DBx__DB5__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL\r
+.set SCSI_Out_DBx__DB5__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN\r
+.set SCSI_Out_DBx__DB5__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0\r
+.set SCSI_Out_DBx__DB5__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1\r
+.set SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0\r
+.set SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1\r
+.set SCSI_Out_DBx__DB5__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT\r
+.set SCSI_Out_DBx__DB5__PS, CYREG_PRT2_PS\r
+.set SCSI_Out_DBx__DB5__SHIFT, 6\r
+.set SCSI_Out_DBx__DB5__SLW, CYREG_PRT2_SLW\r
+.set SCSI_Out_DBx__DB6__AG, CYREG_PRT2_AG\r
+.set SCSI_Out_DBx__DB6__AMUX, CYREG_PRT2_AMUX\r
+.set SCSI_Out_DBx__DB6__BIE, CYREG_PRT2_BIE\r
+.set SCSI_Out_DBx__DB6__BIT_MASK, CYREG_PRT2_BIT_MASK\r
+.set SCSI_Out_DBx__DB6__BYP, CYREG_PRT2_BYP\r
+.set SCSI_Out_DBx__DB6__CTL, CYREG_PRT2_CTL\r
+.set SCSI_Out_DBx__DB6__DM0, CYREG_PRT2_DM0\r
+.set SCSI_Out_DBx__DB6__DM1, CYREG_PRT2_DM1\r
+.set SCSI_Out_DBx__DB6__DM2, CYREG_PRT2_DM2\r
+.set SCSI_Out_DBx__DB6__DR, CYREG_PRT2_DR\r
+.set SCSI_Out_DBx__DB6__INP_DIS, CYREG_PRT2_INP_DIS\r
+.set SCSI_Out_DBx__DB6__INTTYPE, CYREG_PICU2_INTTYPE3\r
+.set SCSI_Out_DBx__DB6__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG\r
+.set SCSI_Out_DBx__DB6__LCD_EN, CYREG_PRT2_LCD_EN\r
+.set SCSI_Out_DBx__DB6__MASK, 0x08\r
+.set SCSI_Out_DBx__DB6__PC, CYREG_PRT2_PC3\r
+.set SCSI_Out_DBx__DB6__PORT, 2\r
+.set SCSI_Out_DBx__DB6__PRT, CYREG_PRT2_PRT\r
+.set SCSI_Out_DBx__DB6__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL\r
+.set SCSI_Out_DBx__DB6__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN\r
+.set SCSI_Out_DBx__DB6__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0\r
+.set SCSI_Out_DBx__DB6__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1\r
+.set SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0\r
+.set SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1\r
+.set SCSI_Out_DBx__DB6__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT\r
+.set SCSI_Out_DBx__DB6__PS, CYREG_PRT2_PS\r
+.set SCSI_Out_DBx__DB6__SHIFT, 3\r
+.set SCSI_Out_DBx__DB6__SLW, CYREG_PRT2_SLW\r
+.set SCSI_Out_DBx__DB7__AG, CYREG_PRT2_AG\r
+.set SCSI_Out_DBx__DB7__AMUX, CYREG_PRT2_AMUX\r
+.set SCSI_Out_DBx__DB7__BIE, CYREG_PRT2_BIE\r
+.set SCSI_Out_DBx__DB7__BIT_MASK, CYREG_PRT2_BIT_MASK\r
+.set SCSI_Out_DBx__DB7__BYP, CYREG_PRT2_BYP\r
+.set SCSI_Out_DBx__DB7__CTL, CYREG_PRT2_CTL\r
+.set SCSI_Out_DBx__DB7__DM0, CYREG_PRT2_DM0\r
+.set SCSI_Out_DBx__DB7__DM1, CYREG_PRT2_DM1\r
+.set SCSI_Out_DBx__DB7__DM2, CYREG_PRT2_DM2\r
+.set SCSI_Out_DBx__DB7__DR, CYREG_PRT2_DR\r
+.set SCSI_Out_DBx__DB7__INP_DIS, CYREG_PRT2_INP_DIS\r
+.set SCSI_Out_DBx__DB7__INTTYPE, CYREG_PICU2_INTTYPE2\r
+.set SCSI_Out_DBx__DB7__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG\r
+.set SCSI_Out_DBx__DB7__LCD_EN, CYREG_PRT2_LCD_EN\r
+.set SCSI_Out_DBx__DB7__MASK, 0x04\r
+.set SCSI_Out_DBx__DB7__PC, CYREG_PRT2_PC2\r
+.set SCSI_Out_DBx__DB7__PORT, 2\r
+.set SCSI_Out_DBx__DB7__PRT, CYREG_PRT2_PRT\r
+.set SCSI_Out_DBx__DB7__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL\r
+.set SCSI_Out_DBx__DB7__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN\r
+.set SCSI_Out_DBx__DB7__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0\r
+.set SCSI_Out_DBx__DB7__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1\r
+.set SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0\r
+.set SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1\r
+.set SCSI_Out_DBx__DB7__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT\r
+.set SCSI_Out_DBx__DB7__PS, CYREG_PRT2_PS\r
+.set SCSI_Out_DBx__DB7__SHIFT, 2\r
+.set SCSI_Out_DBx__DB7__SLW, CYREG_PRT2_SLW\r
+\r
+/* SD_RX_DMA */\r
+.set SD_RX_DMA__DRQ_CTL, CYREG_IDMUX_DRQ_CTL0\r
+.set SD_RX_DMA__DRQ_NUMBER, 2\r
+.set SD_RX_DMA__NUMBEROF_TDS, 0\r
+.set SD_RX_DMA__PRIORITY, 0\r
+.set SD_RX_DMA__TERMIN_EN, 0\r
+.set SD_RX_DMA__TERMIN_SEL, 0\r
+.set SD_RX_DMA__TERMOUT0_EN, 1\r
+.set SD_RX_DMA__TERMOUT0_SEL, 2\r
+.set SD_RX_DMA__TERMOUT1_EN, 0\r
+.set SD_RX_DMA__TERMOUT1_SEL, 0\r
+.set SD_RX_DMA_COMPLETE__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0\r
+.set SD_RX_DMA_COMPLETE__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0\r
+.set SD_RX_DMA_COMPLETE__INTC_MASK, 0x20\r
+.set SD_RX_DMA_COMPLETE__INTC_NUMBER, 5\r
+.set SD_RX_DMA_COMPLETE__INTC_PRIOR_NUM, 7\r
+.set SD_RX_DMA_COMPLETE__INTC_PRIOR_REG, CYREG_NVIC_PRI_5\r
+.set SD_RX_DMA_COMPLETE__INTC_SET_EN_REG, CYREG_NVIC_SETENA0\r
+.set SD_RX_DMA_COMPLETE__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0\r
+\r
+/* SD_TX_DMA */\r
+.set SD_TX_DMA__DRQ_CTL, CYREG_IDMUX_DRQ_CTL0\r
+.set SD_TX_DMA__DRQ_NUMBER, 3\r
+.set SD_TX_DMA__NUMBEROF_TDS, 0\r
+.set SD_TX_DMA__PRIORITY, 1\r
+.set SD_TX_DMA__TERMIN_EN, 0\r
+.set SD_TX_DMA__TERMIN_SEL, 0\r
+.set SD_TX_DMA__TERMOUT0_EN, 1\r
+.set SD_TX_DMA__TERMOUT0_SEL, 3\r
+.set SD_TX_DMA__TERMOUT1_EN, 0\r
+.set SD_TX_DMA__TERMOUT1_SEL, 0\r
+.set SD_TX_DMA_COMPLETE__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0\r
+.set SD_TX_DMA_COMPLETE__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0\r
+.set SD_TX_DMA_COMPLETE__INTC_MASK, 0x40\r
+.set SD_TX_DMA_COMPLETE__INTC_NUMBER, 6\r
+.set SD_TX_DMA_COMPLETE__INTC_PRIOR_NUM, 7\r
+.set SD_TX_DMA_COMPLETE__INTC_PRIOR_REG, CYREG_NVIC_PRI_6\r
+.set SD_TX_DMA_COMPLETE__INTC_SET_EN_REG, CYREG_NVIC_SETENA0\r
+.set SD_TX_DMA_COMPLETE__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0\r
+\r
+/* SCSI_Noise */\r
+.set SCSI_Noise__0__AG, CYREG_PRT2_AG\r
+.set SCSI_Noise__0__AMUX, CYREG_PRT2_AMUX\r
+.set SCSI_Noise__0__BIE, CYREG_PRT2_BIE\r
+.set SCSI_Noise__0__BIT_MASK, CYREG_PRT2_BIT_MASK\r
+.set SCSI_Noise__0__BYP, CYREG_PRT2_BYP\r
+.set SCSI_Noise__0__CTL, CYREG_PRT2_CTL\r
+.set SCSI_Noise__0__DM0, CYREG_PRT2_DM0\r
+.set SCSI_Noise__0__DM1, CYREG_PRT2_DM1\r
+.set SCSI_Noise__0__DM2, CYREG_PRT2_DM2\r
+.set SCSI_Noise__0__DR, CYREG_PRT2_DR\r
+.set SCSI_Noise__0__INP_DIS, CYREG_PRT2_INP_DIS\r
+.set SCSI_Noise__0__INTTYPE, CYREG_PICU2_INTTYPE0\r
+.set SCSI_Noise__0__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG\r
+.set SCSI_Noise__0__LCD_EN, CYREG_PRT2_LCD_EN\r
+.set SCSI_Noise__0__MASK, 0x01\r
+.set SCSI_Noise__0__PC, CYREG_PRT2_PC0\r
+.set SCSI_Noise__0__PORT, 2\r
+.set SCSI_Noise__0__PRT, CYREG_PRT2_PRT\r
+.set SCSI_Noise__0__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL\r
+.set SCSI_Noise__0__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN\r
+.set SCSI_Noise__0__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0\r
+.set SCSI_Noise__0__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1\r
+.set SCSI_Noise__0__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0\r
+.set SCSI_Noise__0__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1\r
+.set SCSI_Noise__0__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT\r
+.set SCSI_Noise__0__PS, CYREG_PRT2_PS\r
+.set SCSI_Noise__0__SHIFT, 0\r
+.set SCSI_Noise__0__SLW, CYREG_PRT2_SLW\r
+.set SCSI_Noise__1__AG, CYREG_PRT6_AG\r
+.set SCSI_Noise__1__AMUX, CYREG_PRT6_AMUX\r
+.set SCSI_Noise__1__BIE, CYREG_PRT6_BIE\r
+.set SCSI_Noise__1__BIT_MASK, CYREG_PRT6_BIT_MASK\r
+.set SCSI_Noise__1__BYP, CYREG_PRT6_BYP\r
+.set SCSI_Noise__1__CTL, CYREG_PRT6_CTL\r
+.set SCSI_Noise__1__DM0, CYREG_PRT6_DM0\r
+.set SCSI_Noise__1__DM1, CYREG_PRT6_DM1\r
+.set SCSI_Noise__1__DM2, CYREG_PRT6_DM2\r
+.set SCSI_Noise__1__DR, CYREG_PRT6_DR\r
+.set SCSI_Noise__1__INP_DIS, CYREG_PRT6_INP_DIS\r
+.set SCSI_Noise__1__INTTYPE, CYREG_PICU6_INTTYPE3\r
+.set SCSI_Noise__1__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
+.set SCSI_Noise__1__LCD_EN, CYREG_PRT6_LCD_EN\r
+.set SCSI_Noise__1__MASK, 0x08\r
+.set SCSI_Noise__1__PC, CYREG_PRT6_PC3\r
+.set SCSI_Noise__1__PORT, 6\r
+.set SCSI_Noise__1__PRT, CYREG_PRT6_PRT\r
+.set SCSI_Noise__1__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
+.set SCSI_Noise__1__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
+.set SCSI_Noise__1__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
+.set SCSI_Noise__1__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
+.set SCSI_Noise__1__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
+.set SCSI_Noise__1__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
+.set SCSI_Noise__1__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
+.set SCSI_Noise__1__PS, CYREG_PRT6_PS\r
+.set SCSI_Noise__1__SHIFT, 3\r
+.set SCSI_Noise__1__SLW, CYREG_PRT6_SLW\r
+.set SCSI_Noise__2__AG, CYREG_PRT4_AG\r
+.set SCSI_Noise__2__AMUX, CYREG_PRT4_AMUX\r
+.set SCSI_Noise__2__BIE, CYREG_PRT4_BIE\r
+.set SCSI_Noise__2__BIT_MASK, CYREG_PRT4_BIT_MASK\r
+.set SCSI_Noise__2__BYP, CYREG_PRT4_BYP\r
+.set SCSI_Noise__2__CTL, CYREG_PRT4_CTL\r
+.set SCSI_Noise__2__DM0, CYREG_PRT4_DM0\r
+.set SCSI_Noise__2__DM1, CYREG_PRT4_DM1\r
+.set SCSI_Noise__2__DM2, CYREG_PRT4_DM2\r
+.set SCSI_Noise__2__DR, CYREG_PRT4_DR\r
+.set SCSI_Noise__2__INP_DIS, CYREG_PRT4_INP_DIS\r
+.set SCSI_Noise__2__INTTYPE, CYREG_PICU4_INTTYPE3\r
+.set SCSI_Noise__2__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
+.set SCSI_Noise__2__LCD_EN, CYREG_PRT4_LCD_EN\r
+.set SCSI_Noise__2__MASK, 0x08\r
+.set SCSI_Noise__2__PC, CYREG_PRT4_PC3\r
+.set SCSI_Noise__2__PORT, 4\r
+.set SCSI_Noise__2__PRT, CYREG_PRT4_PRT\r
+.set SCSI_Noise__2__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
+.set SCSI_Noise__2__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
+.set SCSI_Noise__2__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
+.set SCSI_Noise__2__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
+.set SCSI_Noise__2__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
+.set SCSI_Noise__2__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
+.set SCSI_Noise__2__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
+.set SCSI_Noise__2__PS, CYREG_PRT4_PS\r
+.set SCSI_Noise__2__SHIFT, 3\r
+.set SCSI_Noise__2__SLW, CYREG_PRT4_SLW\r
+.set SCSI_Noise__3__AG, CYREG_PRT4_AG\r
+.set SCSI_Noise__3__AMUX, CYREG_PRT4_AMUX\r
+.set SCSI_Noise__3__BIE, CYREG_PRT4_BIE\r
+.set SCSI_Noise__3__BIT_MASK, CYREG_PRT4_BIT_MASK\r
+.set SCSI_Noise__3__BYP, CYREG_PRT4_BYP\r
+.set SCSI_Noise__3__CTL, CYREG_PRT4_CTL\r
+.set SCSI_Noise__3__DM0, CYREG_PRT4_DM0\r
+.set SCSI_Noise__3__DM1, CYREG_PRT4_DM1\r
+.set SCSI_Noise__3__DM2, CYREG_PRT4_DM2\r
+.set SCSI_Noise__3__DR, CYREG_PRT4_DR\r
+.set SCSI_Noise__3__INP_DIS, CYREG_PRT4_INP_DIS\r
+.set SCSI_Noise__3__INTTYPE, CYREG_PICU4_INTTYPE7\r
+.set SCSI_Noise__3__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
+.set SCSI_Noise__3__LCD_EN, CYREG_PRT4_LCD_EN\r
+.set SCSI_Noise__3__MASK, 0x80\r
+.set SCSI_Noise__3__PC, CYREG_PRT4_PC7\r
+.set SCSI_Noise__3__PORT, 4\r
+.set SCSI_Noise__3__PRT, CYREG_PRT4_PRT\r
+.set SCSI_Noise__3__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
+.set SCSI_Noise__3__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
+.set SCSI_Noise__3__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
+.set SCSI_Noise__3__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
+.set SCSI_Noise__3__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
+.set SCSI_Noise__3__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
+.set SCSI_Noise__3__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
+.set SCSI_Noise__3__PS, CYREG_PRT4_PS\r
+.set SCSI_Noise__3__SHIFT, 7\r
+.set SCSI_Noise__3__SLW, CYREG_PRT4_SLW\r
+.set SCSI_Noise__4__AG, CYREG_PRT6_AG\r
+.set SCSI_Noise__4__AMUX, CYREG_PRT6_AMUX\r
+.set SCSI_Noise__4__BIE, CYREG_PRT6_BIE\r
+.set SCSI_Noise__4__BIT_MASK, CYREG_PRT6_BIT_MASK\r
+.set SCSI_Noise__4__BYP, CYREG_PRT6_BYP\r
+.set SCSI_Noise__4__CTL, CYREG_PRT6_CTL\r
+.set SCSI_Noise__4__DM0, CYREG_PRT6_DM0\r
+.set SCSI_Noise__4__DM1, CYREG_PRT6_DM1\r
+.set SCSI_Noise__4__DM2, CYREG_PRT6_DM2\r
+.set SCSI_Noise__4__DR, CYREG_PRT6_DR\r
+.set SCSI_Noise__4__INP_DIS, CYREG_PRT6_INP_DIS\r
+.set SCSI_Noise__4__INTTYPE, CYREG_PICU6_INTTYPE2\r
+.set SCSI_Noise__4__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
+.set SCSI_Noise__4__LCD_EN, CYREG_PRT6_LCD_EN\r
+.set SCSI_Noise__4__MASK, 0x04\r
+.set SCSI_Noise__4__PC, CYREG_PRT6_PC2\r
+.set SCSI_Noise__4__PORT, 6\r
+.set SCSI_Noise__4__PRT, CYREG_PRT6_PRT\r
+.set SCSI_Noise__4__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
+.set SCSI_Noise__4__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
+.set SCSI_Noise__4__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
+.set SCSI_Noise__4__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
+.set SCSI_Noise__4__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
+.set SCSI_Noise__4__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
+.set SCSI_Noise__4__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
+.set SCSI_Noise__4__PS, CYREG_PRT6_PS\r
+.set SCSI_Noise__4__SHIFT, 2\r
+.set SCSI_Noise__4__SLW, CYREG_PRT6_SLW\r
+.set SCSI_Noise__ACK__AG, CYREG_PRT6_AG\r
+.set SCSI_Noise__ACK__AMUX, CYREG_PRT6_AMUX\r
+.set SCSI_Noise__ACK__BIE, CYREG_PRT6_BIE\r
+.set SCSI_Noise__ACK__BIT_MASK, CYREG_PRT6_BIT_MASK\r
+.set SCSI_Noise__ACK__BYP, CYREG_PRT6_BYP\r
+.set SCSI_Noise__ACK__CTL, CYREG_PRT6_CTL\r
+.set SCSI_Noise__ACK__DM0, CYREG_PRT6_DM0\r
+.set SCSI_Noise__ACK__DM1, CYREG_PRT6_DM1\r
+.set SCSI_Noise__ACK__DM2, CYREG_PRT6_DM2\r
+.set SCSI_Noise__ACK__DR, CYREG_PRT6_DR\r
+.set SCSI_Noise__ACK__INP_DIS, CYREG_PRT6_INP_DIS\r
+.set SCSI_Noise__ACK__INTTYPE, CYREG_PICU6_INTTYPE2\r
+.set SCSI_Noise__ACK__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
+.set SCSI_Noise__ACK__LCD_EN, CYREG_PRT6_LCD_EN\r
+.set SCSI_Noise__ACK__MASK, 0x04\r
+.set SCSI_Noise__ACK__PC, CYREG_PRT6_PC2\r
+.set SCSI_Noise__ACK__PORT, 6\r
+.set SCSI_Noise__ACK__PRT, CYREG_PRT6_PRT\r
+.set SCSI_Noise__ACK__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
+.set SCSI_Noise__ACK__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
+.set SCSI_Noise__ACK__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
+.set SCSI_Noise__ACK__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
+.set SCSI_Noise__ACK__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
+.set SCSI_Noise__ACK__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
+.set SCSI_Noise__ACK__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
+.set SCSI_Noise__ACK__PS, CYREG_PRT6_PS\r
+.set SCSI_Noise__ACK__SHIFT, 2\r
+.set SCSI_Noise__ACK__SLW, CYREG_PRT6_SLW\r
+.set SCSI_Noise__ATN__AG, CYREG_PRT2_AG\r
+.set SCSI_Noise__ATN__AMUX, CYREG_PRT2_AMUX\r
+.set SCSI_Noise__ATN__BIE, CYREG_PRT2_BIE\r
+.set SCSI_Noise__ATN__BIT_MASK, CYREG_PRT2_BIT_MASK\r
+.set SCSI_Noise__ATN__BYP, CYREG_PRT2_BYP\r
+.set SCSI_Noise__ATN__CTL, CYREG_PRT2_CTL\r
+.set SCSI_Noise__ATN__DM0, CYREG_PRT2_DM0\r
+.set SCSI_Noise__ATN__DM1, CYREG_PRT2_DM1\r
+.set SCSI_Noise__ATN__DM2, CYREG_PRT2_DM2\r
+.set SCSI_Noise__ATN__DR, CYREG_PRT2_DR\r
+.set SCSI_Noise__ATN__INP_DIS, CYREG_PRT2_INP_DIS\r
+.set SCSI_Noise__ATN__INTTYPE, CYREG_PICU2_INTTYPE0\r
+.set SCSI_Noise__ATN__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG\r
+.set SCSI_Noise__ATN__LCD_EN, CYREG_PRT2_LCD_EN\r
+.set SCSI_Noise__ATN__MASK, 0x01\r
+.set SCSI_Noise__ATN__PC, CYREG_PRT2_PC0\r
+.set SCSI_Noise__ATN__PORT, 2\r
+.set SCSI_Noise__ATN__PRT, CYREG_PRT2_PRT\r
+.set SCSI_Noise__ATN__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL\r
+.set SCSI_Noise__ATN__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN\r
+.set SCSI_Noise__ATN__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0\r
+.set SCSI_Noise__ATN__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1\r
+.set SCSI_Noise__ATN__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0\r
+.set SCSI_Noise__ATN__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1\r
+.set SCSI_Noise__ATN__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT\r
+.set SCSI_Noise__ATN__PS, CYREG_PRT2_PS\r
+.set SCSI_Noise__ATN__SHIFT, 0\r
+.set SCSI_Noise__ATN__SLW, CYREG_PRT2_SLW\r
+.set SCSI_Noise__BSY__AG, CYREG_PRT6_AG\r
+.set SCSI_Noise__BSY__AMUX, CYREG_PRT6_AMUX\r
+.set SCSI_Noise__BSY__BIE, CYREG_PRT6_BIE\r
+.set SCSI_Noise__BSY__BIT_MASK, CYREG_PRT6_BIT_MASK\r
+.set SCSI_Noise__BSY__BYP, CYREG_PRT6_BYP\r
+.set SCSI_Noise__BSY__CTL, CYREG_PRT6_CTL\r
+.set SCSI_Noise__BSY__DM0, CYREG_PRT6_DM0\r
+.set SCSI_Noise__BSY__DM1, CYREG_PRT6_DM1\r
+.set SCSI_Noise__BSY__DM2, CYREG_PRT6_DM2\r
+.set SCSI_Noise__BSY__DR, CYREG_PRT6_DR\r
+.set SCSI_Noise__BSY__INP_DIS, CYREG_PRT6_INP_DIS\r
+.set SCSI_Noise__BSY__INTTYPE, CYREG_PICU6_INTTYPE3\r
+.set SCSI_Noise__BSY__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
+.set SCSI_Noise__BSY__LCD_EN, CYREG_PRT6_LCD_EN\r
+.set SCSI_Noise__BSY__MASK, 0x08\r
+.set SCSI_Noise__BSY__PC, CYREG_PRT6_PC3\r
+.set SCSI_Noise__BSY__PORT, 6\r
+.set SCSI_Noise__BSY__PRT, CYREG_PRT6_PRT\r
+.set SCSI_Noise__BSY__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
+.set SCSI_Noise__BSY__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
+.set SCSI_Noise__BSY__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
+.set SCSI_Noise__BSY__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
+.set SCSI_Noise__BSY__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
+.set SCSI_Noise__BSY__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
+.set SCSI_Noise__BSY__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
+.set SCSI_Noise__BSY__PS, CYREG_PRT6_PS\r
+.set SCSI_Noise__BSY__SHIFT, 3\r
+.set SCSI_Noise__BSY__SLW, CYREG_PRT6_SLW\r
+.set SCSI_Noise__RST__AG, CYREG_PRT4_AG\r
+.set SCSI_Noise__RST__AMUX, CYREG_PRT4_AMUX\r
+.set SCSI_Noise__RST__BIE, CYREG_PRT4_BIE\r
+.set SCSI_Noise__RST__BIT_MASK, CYREG_PRT4_BIT_MASK\r
+.set SCSI_Noise__RST__BYP, CYREG_PRT4_BYP\r
+.set SCSI_Noise__RST__CTL, CYREG_PRT4_CTL\r
+.set SCSI_Noise__RST__DM0, CYREG_PRT4_DM0\r
+.set SCSI_Noise__RST__DM1, CYREG_PRT4_DM1\r
+.set SCSI_Noise__RST__DM2, CYREG_PRT4_DM2\r
+.set SCSI_Noise__RST__DR, CYREG_PRT4_DR\r
+.set SCSI_Noise__RST__INP_DIS, CYREG_PRT4_INP_DIS\r
+.set SCSI_Noise__RST__INTTYPE, CYREG_PICU4_INTTYPE7\r
+.set SCSI_Noise__RST__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
+.set SCSI_Noise__RST__LCD_EN, CYREG_PRT4_LCD_EN\r
+.set SCSI_Noise__RST__MASK, 0x80\r
+.set SCSI_Noise__RST__PC, CYREG_PRT4_PC7\r
+.set SCSI_Noise__RST__PORT, 4\r
+.set SCSI_Noise__RST__PRT, CYREG_PRT4_PRT\r
+.set SCSI_Noise__RST__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
+.set SCSI_Noise__RST__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
+.set SCSI_Noise__RST__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
+.set SCSI_Noise__RST__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
+.set SCSI_Noise__RST__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
+.set SCSI_Noise__RST__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
+.set SCSI_Noise__RST__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
+.set SCSI_Noise__RST__PS, CYREG_PRT4_PS\r
+.set SCSI_Noise__RST__SHIFT, 7\r
+.set SCSI_Noise__RST__SLW, CYREG_PRT4_SLW\r
+.set SCSI_Noise__SEL__AG, CYREG_PRT4_AG\r
+.set SCSI_Noise__SEL__AMUX, CYREG_PRT4_AMUX\r
+.set SCSI_Noise__SEL__BIE, CYREG_PRT4_BIE\r
+.set SCSI_Noise__SEL__BIT_MASK, CYREG_PRT4_BIT_MASK\r
+.set SCSI_Noise__SEL__BYP, CYREG_PRT4_BYP\r
+.set SCSI_Noise__SEL__CTL, CYREG_PRT4_CTL\r
+.set SCSI_Noise__SEL__DM0, CYREG_PRT4_DM0\r
+.set SCSI_Noise__SEL__DM1, CYREG_PRT4_DM1\r
+.set SCSI_Noise__SEL__DM2, CYREG_PRT4_DM2\r
+.set SCSI_Noise__SEL__DR, CYREG_PRT4_DR\r
+.set SCSI_Noise__SEL__INP_DIS, CYREG_PRT4_INP_DIS\r
+.set SCSI_Noise__SEL__INTTYPE, CYREG_PICU4_INTTYPE3\r
+.set SCSI_Noise__SEL__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
+.set SCSI_Noise__SEL__LCD_EN, CYREG_PRT4_LCD_EN\r
+.set SCSI_Noise__SEL__MASK, 0x08\r
+.set SCSI_Noise__SEL__PC, CYREG_PRT4_PC3\r
+.set SCSI_Noise__SEL__PORT, 4\r
+.set SCSI_Noise__SEL__PRT, CYREG_PRT4_PRT\r
+.set SCSI_Noise__SEL__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
+.set SCSI_Noise__SEL__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
+.set SCSI_Noise__SEL__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
+.set SCSI_Noise__SEL__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
+.set SCSI_Noise__SEL__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
+.set SCSI_Noise__SEL__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
+.set SCSI_Noise__SEL__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
+.set SCSI_Noise__SEL__PS, CYREG_PRT4_PS\r
+.set SCSI_Noise__SEL__SHIFT, 3\r
+.set SCSI_Noise__SEL__SLW, CYREG_PRT4_SLW\r
+\r
/* scsiTarget */\r
.set scsiTarget_datapath__16BIT_A0_REG, CYREG_B0_UDB00_01_A0\r
.set scsiTarget_datapath__16BIT_A1_REG, CYREG_B0_UDB00_01_A1\r
.set scsiTarget_StatusReg__0__POS, 0\r
.set scsiTarget_StatusReg__1__MASK, 0x02\r
.set scsiTarget_StatusReg__1__POS, 1\r
-.set scsiTarget_StatusReg__16BIT_STATUS_AUX_CTL_REG, CYREG_B0_UDB02_03_ACTL\r
-.set scsiTarget_StatusReg__16BIT_STATUS_REG, CYREG_B0_UDB02_03_ST\r
+.set scsiTarget_StatusReg__16BIT_STATUS_AUX_CTL_REG, CYREG_B0_UDB07_08_ACTL\r
+.set scsiTarget_StatusReg__16BIT_STATUS_REG, CYREG_B0_UDB07_08_ST\r
.set scsiTarget_StatusReg__2__MASK, 0x04\r
.set scsiTarget_StatusReg__2__POS, 2\r
.set scsiTarget_StatusReg__3__MASK, 0x08\r
.set scsiTarget_StatusReg__4__MASK, 0x10\r
.set scsiTarget_StatusReg__4__POS, 4\r
.set scsiTarget_StatusReg__MASK, 0x1F\r
-.set scsiTarget_StatusReg__MASK_REG, CYREG_B0_UDB02_MSK\r
-.set scsiTarget_StatusReg__STATUS_AUX_CTL_REG, CYREG_B0_UDB02_ACTL\r
-.set scsiTarget_StatusReg__STATUS_REG, CYREG_B0_UDB02_ST\r
+.set scsiTarget_StatusReg__MASK_REG, CYREG_B0_UDB07_MSK\r
+.set scsiTarget_StatusReg__MASK_ST_AUX_CTL_REG, CYREG_B0_UDB07_MSK_ACTL\r
+.set scsiTarget_StatusReg__PER_ST_AUX_CTL_REG, CYREG_B0_UDB07_MSK_ACTL\r
+.set scsiTarget_StatusReg__STATUS_AUX_CTL_REG, CYREG_B0_UDB07_ACTL\r
+.set scsiTarget_StatusReg__STATUS_CNT_REG, CYREG_B0_UDB07_ST_CTL\r
+.set scsiTarget_StatusReg__STATUS_CONTROL_REG, CYREG_B0_UDB07_ST_CTL\r
+.set scsiTarget_StatusReg__STATUS_REG, CYREG_B0_UDB07_ST\r
+\r
+/* Debug_Timer */\r
+.set Debug_Timer_Interrupt__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0\r
+.set Debug_Timer_Interrupt__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0\r
+.set Debug_Timer_Interrupt__INTC_MASK, 0x01\r
+.set Debug_Timer_Interrupt__INTC_NUMBER, 0\r
+.set Debug_Timer_Interrupt__INTC_PRIOR_NUM, 7\r
+.set Debug_Timer_Interrupt__INTC_PRIOR_REG, CYREG_NVIC_PRI_0\r
+.set Debug_Timer_Interrupt__INTC_SET_EN_REG, CYREG_NVIC_SETENA0\r
+.set Debug_Timer_Interrupt__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0\r
+.set Debug_Timer_TimerHW__CAP0, CYREG_TMR0_CAP0\r
+.set Debug_Timer_TimerHW__CAP1, CYREG_TMR0_CAP1\r
+.set Debug_Timer_TimerHW__CFG0, CYREG_TMR0_CFG0\r
+.set Debug_Timer_TimerHW__CFG1, CYREG_TMR0_CFG1\r
+.set Debug_Timer_TimerHW__CFG2, CYREG_TMR0_CFG2\r
+.set Debug_Timer_TimerHW__CNT_CMP0, CYREG_TMR0_CNT_CMP0\r
+.set Debug_Timer_TimerHW__CNT_CMP1, CYREG_TMR0_CNT_CMP1\r
+.set Debug_Timer_TimerHW__PER0, CYREG_TMR0_PER0\r
+.set Debug_Timer_TimerHW__PER1, CYREG_TMR0_PER1\r
+.set Debug_Timer_TimerHW__PM_ACT_CFG, CYREG_PM_ACT_CFG3\r
+.set Debug_Timer_TimerHW__PM_ACT_MSK, 0x01\r
+.set Debug_Timer_TimerHW__PM_STBY_CFG, CYREG_PM_STBY_CFG3\r
+.set Debug_Timer_TimerHW__PM_STBY_MSK, 0x01\r
+.set Debug_Timer_TimerHW__RT0, CYREG_TMR0_RT0\r
+.set Debug_Timer_TimerHW__RT1, CYREG_TMR0_RT1\r
+.set Debug_Timer_TimerHW__SR0, CYREG_TMR0_SR0\r
+\r
+/* SCSI_RX_DMA */\r
+.set SCSI_RX_DMA__DRQ_CTL, CYREG_IDMUX_DRQ_CTL0\r
+.set SCSI_RX_DMA__DRQ_NUMBER, 0\r
+.set SCSI_RX_DMA__NUMBEROF_TDS, 0\r
+.set SCSI_RX_DMA__PRIORITY, 2\r
+.set SCSI_RX_DMA__TERMIN_EN, 0\r
+.set SCSI_RX_DMA__TERMIN_SEL, 0\r
+.set SCSI_RX_DMA__TERMOUT0_EN, 1\r
+.set SCSI_RX_DMA__TERMOUT0_SEL, 0\r
+.set SCSI_RX_DMA__TERMOUT1_EN, 0\r
+.set SCSI_RX_DMA__TERMOUT1_SEL, 0\r
+.set SCSI_RX_DMA_COMPLETE__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0\r
+.set SCSI_RX_DMA_COMPLETE__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0\r
+.set SCSI_RX_DMA_COMPLETE__INTC_MASK, 0x04\r
+.set SCSI_RX_DMA_COMPLETE__INTC_NUMBER, 2\r
+.set SCSI_RX_DMA_COMPLETE__INTC_PRIOR_NUM, 7\r
+.set SCSI_RX_DMA_COMPLETE__INTC_PRIOR_REG, CYREG_NVIC_PRI_2\r
+.set SCSI_RX_DMA_COMPLETE__INTC_SET_EN_REG, CYREG_NVIC_SETENA0\r
+.set SCSI_RX_DMA_COMPLETE__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0\r
+\r
+/* SCSI_TX_DMA */\r
+.set SCSI_TX_DMA__DRQ_CTL, CYREG_IDMUX_DRQ_CTL0\r
+.set SCSI_TX_DMA__DRQ_NUMBER, 1\r
+.set SCSI_TX_DMA__NUMBEROF_TDS, 0\r
+.set SCSI_TX_DMA__PRIORITY, 2\r
+.set SCSI_TX_DMA__TERMIN_EN, 0\r
+.set SCSI_TX_DMA__TERMIN_SEL, 0\r
+.set SCSI_TX_DMA__TERMOUT0_EN, 1\r
+.set SCSI_TX_DMA__TERMOUT0_SEL, 1\r
+.set SCSI_TX_DMA__TERMOUT1_EN, 0\r
+.set SCSI_TX_DMA__TERMOUT1_SEL, 0\r
+.set SCSI_TX_DMA_COMPLETE__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0\r
+.set SCSI_TX_DMA_COMPLETE__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0\r
+.set SCSI_TX_DMA_COMPLETE__INTC_MASK, 0x10\r
+.set SCSI_TX_DMA_COMPLETE__INTC_NUMBER, 4\r
+.set SCSI_TX_DMA_COMPLETE__INTC_PRIOR_NUM, 7\r
+.set SCSI_TX_DMA_COMPLETE__INTC_PRIOR_REG, CYREG_NVIC_PRI_4\r
+.set SCSI_TX_DMA_COMPLETE__INTC_SET_EN_REG, CYREG_NVIC_SETENA0\r
+.set SCSI_TX_DMA_COMPLETE__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0\r
+\r
+/* SD_Data_Clk */\r
+.set SD_Data_Clk__CFG0, CYREG_CLKDIST_DCFG0_CFG0\r
+.set SD_Data_Clk__CFG1, CYREG_CLKDIST_DCFG0_CFG1\r
+.set SD_Data_Clk__CFG2, CYREG_CLKDIST_DCFG0_CFG2\r
+.set SD_Data_Clk__CFG2_SRC_SEL_MASK, 0x07\r
+.set SD_Data_Clk__INDEX, 0x00\r
+.set SD_Data_Clk__PM_ACT_CFG, CYREG_PM_ACT_CFG2\r
+.set SD_Data_Clk__PM_ACT_MSK, 0x01\r
+.set SD_Data_Clk__PM_STBY_CFG, CYREG_PM_STBY_CFG2\r
+.set SD_Data_Clk__PM_STBY_MSK, 0x01\r
\r
/* timer_clock */\r
.set timer_clock__CFG0, CYREG_CLKDIST_DCFG2_CFG0\r
.set timer_clock__PM_STBY_CFG, CYREG_PM_STBY_CFG2\r
.set timer_clock__PM_STBY_MSK, 0x04\r
\r
+/* SCSI_RST_ISR */\r
+.set SCSI_RST_ISR__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0\r
+.set SCSI_RST_ISR__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0\r
+.set SCSI_RST_ISR__INTC_MASK, 0x02\r
+.set SCSI_RST_ISR__INTC_NUMBER, 1\r
+.set SCSI_RST_ISR__INTC_PRIOR_NUM, 7\r
+.set SCSI_RST_ISR__INTC_PRIOR_REG, CYREG_NVIC_PRI_1\r
+.set SCSI_RST_ISR__INTC_SET_EN_REG, CYREG_NVIC_SETENA0\r
+.set SCSI_RST_ISR__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0\r
+\r
+/* SCSI_SEL_ISR */\r
+.set SCSI_SEL_ISR__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0\r
+.set SCSI_SEL_ISR__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0\r
+.set SCSI_SEL_ISR__INTC_MASK, 0x08\r
+.set SCSI_SEL_ISR__INTC_NUMBER, 3\r
+.set SCSI_SEL_ISR__INTC_PRIOR_NUM, 7\r
+.set SCSI_SEL_ISR__INTC_PRIOR_REG, CYREG_NVIC_PRI_3\r
+.set SCSI_SEL_ISR__INTC_SET_EN_REG, CYREG_NVIC_SETENA0\r
+.set SCSI_SEL_ISR__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0\r
+\r
+/* SCSI_Filtered */\r
+.set SCSI_Filtered_sts_sts_reg__0__MASK, 0x01\r
+.set SCSI_Filtered_sts_sts_reg__0__POS, 0\r
+.set SCSI_Filtered_sts_sts_reg__1__MASK, 0x02\r
+.set SCSI_Filtered_sts_sts_reg__1__POS, 1\r
+.set SCSI_Filtered_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG, CYREG_B0_UDB13_14_ACTL\r
+.set SCSI_Filtered_sts_sts_reg__16BIT_STATUS_REG, CYREG_B0_UDB13_14_ST\r
+.set SCSI_Filtered_sts_sts_reg__2__MASK, 0x04\r
+.set SCSI_Filtered_sts_sts_reg__2__POS, 2\r
+.set SCSI_Filtered_sts_sts_reg__3__MASK, 0x08\r
+.set SCSI_Filtered_sts_sts_reg__3__POS, 3\r
+.set SCSI_Filtered_sts_sts_reg__4__MASK, 0x10\r
+.set SCSI_Filtered_sts_sts_reg__4__POS, 4\r
+.set SCSI_Filtered_sts_sts_reg__MASK, 0x1F\r
+.set SCSI_Filtered_sts_sts_reg__MASK_REG, CYREG_B0_UDB13_MSK\r
+.set SCSI_Filtered_sts_sts_reg__STATUS_AUX_CTL_REG, CYREG_B0_UDB13_ACTL\r
+.set SCSI_Filtered_sts_sts_reg__STATUS_REG, CYREG_B0_UDB13_ST\r
+\r
+/* SCSI_CTL_PHASE */\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__0__MASK, 0x01\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__0__POS, 0\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__1__MASK, 0x02\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__1__POS, 1\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG, CYREG_B0_UDB02_03_ACTL\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG, CYREG_B0_UDB02_03_CTL\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG, CYREG_B0_UDB02_03_CTL\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG, CYREG_B0_UDB02_03_CTL\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG, CYREG_B0_UDB02_03_CTL\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_MASK_REG, CYREG_B0_UDB02_03_MSK\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG, CYREG_B0_UDB02_03_MSK\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG, CYREG_B0_UDB02_03_MSK\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG, CYREG_B0_UDB02_03_MSK\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__2__MASK, 0x04\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__2__POS, 2\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_AUX_CTL_REG, CYREG_B0_UDB02_ACTL\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_REG, CYREG_B0_UDB02_CTL\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_ST_REG, CYREG_B0_UDB02_ST_CTL\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_REG, CYREG_B0_UDB02_CTL\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_ST_REG, CYREG_B0_UDB02_ST_CTL\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__MASK, 0x07\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG, CYREG_B0_UDB02_MSK_ACTL\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG, CYREG_B0_UDB02_MSK_ACTL\r
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__PERIOD_REG, CYREG_B0_UDB02_MSK\r
+\r
+/* SCSI_Glitch_Ctl */\r
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__0__MASK, 0x01\r
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__0__POS, 0\r
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG, CYREG_B0_UDB03_04_ACTL\r
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG, CYREG_B0_UDB03_04_CTL\r
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG, CYREG_B0_UDB03_04_CTL\r
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG, CYREG_B0_UDB03_04_CTL\r
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG, CYREG_B0_UDB03_04_CTL\r
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG, CYREG_B0_UDB03_04_MSK\r
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG, CYREG_B0_UDB03_04_MSK\r
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG, CYREG_B0_UDB03_04_MSK\r
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG, CYREG_B0_UDB03_04_MSK\r
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG, CYREG_B0_UDB03_ACTL\r
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_REG, CYREG_B0_UDB03_CTL\r
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_ST_REG, CYREG_B0_UDB03_ST_CTL\r
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__COUNT_REG, CYREG_B0_UDB03_CTL\r
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__COUNT_ST_REG, CYREG_B0_UDB03_ST_CTL\r
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__MASK, 0x01\r
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG, CYREG_B0_UDB03_MSK_ACTL\r
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG, CYREG_B0_UDB03_MSK_ACTL\r
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__PERIOD_REG, CYREG_B0_UDB03_MSK\r
+\r
+/* SCSI_Parity_Error */\r
+.set SCSI_Parity_Error_sts_sts_reg__0__MASK, 0x01\r
+.set SCSI_Parity_Error_sts_sts_reg__0__POS, 0\r
+.set SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG, CYREG_B0_UDB11_12_ACTL\r
+.set SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_REG, CYREG_B0_UDB11_12_ST\r
+.set SCSI_Parity_Error_sts_sts_reg__MASK, 0x01\r
+.set SCSI_Parity_Error_sts_sts_reg__MASK_REG, CYREG_B0_UDB11_MSK\r
+.set SCSI_Parity_Error_sts_sts_reg__STATUS_AUX_CTL_REG, CYREG_B0_UDB11_ACTL\r
+.set SCSI_Parity_Error_sts_sts_reg__STATUS_REG, CYREG_B0_UDB11_ST\r
+\r
/* Miscellaneous */\r
.set BCLK__BUS_CLK__HZ, 50000000\r
.set BCLK__BUS_CLK__KHZ, 50000\r
.set BCLK__BUS_CLK__MHZ, 50\r
.set CYDEV_CHIP_DIE_LEOPARD, 1\r
-.set CYDEV_CHIP_DIE_PSOC4A, 16\r
+.set CYDEV_CHIP_DIE_PSOC4A, 18\r
.set CYDEV_CHIP_DIE_PSOC5LP, 2\r
.set CYDEV_CHIP_DIE_PSOC5TM, 3\r
.set CYDEV_CHIP_DIE_TMA4, 4\r
.set CYDEV_CHIP_FAMILY_USED, CYDEV_CHIP_FAMILY_PSOC5\r
.set CYDEV_CHIP_JTAG_ID, 0x2E133069\r
.set CYDEV_CHIP_MEMBER_3A, 1\r
-.set CYDEV_CHIP_MEMBER_4A, 16\r
-.set CYDEV_CHIP_MEMBER_4D, 12\r
+.set CYDEV_CHIP_MEMBER_4A, 18\r
+.set CYDEV_CHIP_MEMBER_4D, 13\r
.set CYDEV_CHIP_MEMBER_4E, 6\r
-.set CYDEV_CHIP_MEMBER_4F, 17\r
+.set CYDEV_CHIP_MEMBER_4F, 19\r
.set CYDEV_CHIP_MEMBER_4G, 4\r
-.set CYDEV_CHIP_MEMBER_4H, 15\r
-.set CYDEV_CHIP_MEMBER_4I, 21\r
-.set CYDEV_CHIP_MEMBER_4J, 13\r
-.set CYDEV_CHIP_MEMBER_4K, 14\r
-.set CYDEV_CHIP_MEMBER_4L, 20\r
-.set CYDEV_CHIP_MEMBER_4M, 19\r
-.set CYDEV_CHIP_MEMBER_4N, 9\r
+.set CYDEV_CHIP_MEMBER_4H, 17\r
+.set CYDEV_CHIP_MEMBER_4I, 23\r
+.set CYDEV_CHIP_MEMBER_4J, 14\r
+.set CYDEV_CHIP_MEMBER_4K, 15\r
+.set CYDEV_CHIP_MEMBER_4L, 22\r
+.set CYDEV_CHIP_MEMBER_4M, 21\r
+.set CYDEV_CHIP_MEMBER_4N, 10\r
.set CYDEV_CHIP_MEMBER_4O, 7\r
-.set CYDEV_CHIP_MEMBER_4P, 18\r
-.set CYDEV_CHIP_MEMBER_4Q, 11\r
+.set CYDEV_CHIP_MEMBER_4P, 20\r
+.set CYDEV_CHIP_MEMBER_4Q, 12\r
.set CYDEV_CHIP_MEMBER_4R, 8\r
-.set CYDEV_CHIP_MEMBER_4S, 10\r
+.set CYDEV_CHIP_MEMBER_4S, 11\r
+.set CYDEV_CHIP_MEMBER_4T, 9\r
.set CYDEV_CHIP_MEMBER_4U, 5\r
+.set CYDEV_CHIP_MEMBER_4V, 16\r
.set CYDEV_CHIP_MEMBER_5A, 3\r
.set CYDEV_CHIP_MEMBER_5B, 2\r
-.set CYDEV_CHIP_MEMBER_6A, 22\r
-.set CYDEV_CHIP_MEMBER_FM3, 26\r
-.set CYDEV_CHIP_MEMBER_FM4, 27\r
-.set CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE1, 23\r
-.set CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE2, 24\r
-.set CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE3, 25\r
+.set CYDEV_CHIP_MEMBER_6A, 24\r
+.set CYDEV_CHIP_MEMBER_FM3, 28\r
+.set CYDEV_CHIP_MEMBER_FM4, 29\r
+.set CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE1, 25\r
+.set CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE2, 26\r
+.set CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE3, 27\r
.set CYDEV_CHIP_MEMBER_UNKNOWN, 0\r
.set CYDEV_CHIP_MEMBER_USED, CYDEV_CHIP_MEMBER_5B\r
.set CYDEV_CHIP_DIE_EXPECT, CYDEV_CHIP_MEMBER_USED\r
.set CYDEV_CHIP_REVISION_4A_ES0, 17\r
.set CYDEV_CHIP_REVISION_4A_PRODUCTION, 17\r
.set CYDEV_CHIP_REVISION_4D_PRODUCTION, 0\r
+.set CYDEV_CHIP_REVISION_4E_CCG2_NO_USBPD, 0\r
.set CYDEV_CHIP_REVISION_4E_PRODUCTION, 0\r
.set CYDEV_CHIP_REVISION_4F_PRODUCTION, 0\r
.set CYDEV_CHIP_REVISION_4F_PRODUCTION_256DMA, 0\r
.set CYDEV_CHIP_REVISION_4Q_PRODUCTION, 0\r
.set CYDEV_CHIP_REVISION_4R_PRODUCTION, 0\r
.set CYDEV_CHIP_REVISION_4S_PRODUCTION, 0\r
+.set CYDEV_CHIP_REVISION_4T_PRODUCTION, 0\r
.set CYDEV_CHIP_REVISION_4U_PRODUCTION, 0\r
+.set CYDEV_CHIP_REVISION_4V_PRODUCTION, 0\r
.set CYDEV_CHIP_REVISION_5A_ES0, 0\r
.set CYDEV_CHIP_REVISION_5A_ES1, 1\r
.set CYDEV_CHIP_REVISION_5A_PRODUCTION, 1\r
.set CYDEV_CHIP_REVISION_5B_ES0, 0\r
.set CYDEV_CHIP_REVISION_5B_PRODUCTION, 0\r
-.set CYDEV_CHIP_REVISION_6A_NO_UDB, 0\r
-.set CYDEV_CHIP_REVISION_6A_PRODUCTION, 0\r
+.set CYDEV_CHIP_REVISION_6A_ES, 17\r
+.set CYDEV_CHIP_REVISION_6A_NO_UDB, 33\r
+.set CYDEV_CHIP_REVISION_6A_PRODUCTION, 33\r
.set CYDEV_CHIP_REVISION_FM3_PRODUCTION, 0\r
.set CYDEV_CHIP_REVISION_FM4_PRODUCTION, 0\r
.set CYDEV_CHIP_REVISION_PDL_FM0P_TYPE1_PRODUCTION, 0\r
;\r
; File Name: cyfitteriar.inc\r
; \r
-; PSoC Creator 4.1\r
+; PSoC Creator 4.2\r
;\r
; Description:\r
; \r
;\r
;-------------------------------------------------------------------------------\r
-; Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.\r
+; Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.\r
; You may use this file only in accordance with the license, terms, conditions, \r
; disclaimers, and limitations in the end user license agreement accompanying \r
; the software package with which this file was provided.\r
INCLUDE cydeviceiar.inc\r
INCLUDE cydeviceiar_trm.inc\r
\r
-/* Debug_Timer_Interrupt */\r
-Debug_Timer_Interrupt__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
-Debug_Timer_Interrupt__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
-Debug_Timer_Interrupt__INTC_MASK EQU 0x01\r
-Debug_Timer_Interrupt__INTC_NUMBER EQU 0\r
-Debug_Timer_Interrupt__INTC_PRIOR_NUM EQU 7\r
-Debug_Timer_Interrupt__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_0\r
-Debug_Timer_Interrupt__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
-Debug_Timer_Interrupt__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
-\r
-/* Debug_Timer_TimerHW */\r
-Debug_Timer_TimerHW__CAP0 EQU CYREG_TMR0_CAP0\r
-Debug_Timer_TimerHW__CAP1 EQU CYREG_TMR0_CAP1\r
-Debug_Timer_TimerHW__CFG0 EQU CYREG_TMR0_CFG0\r
-Debug_Timer_TimerHW__CFG1 EQU CYREG_TMR0_CFG1\r
-Debug_Timer_TimerHW__CFG2 EQU CYREG_TMR0_CFG2\r
-Debug_Timer_TimerHW__CNT_CMP0 EQU CYREG_TMR0_CNT_CMP0\r
-Debug_Timer_TimerHW__CNT_CMP1 EQU CYREG_TMR0_CNT_CMP1\r
-Debug_Timer_TimerHW__PER0 EQU CYREG_TMR0_PER0\r
-Debug_Timer_TimerHW__PER1 EQU CYREG_TMR0_PER1\r
-Debug_Timer_TimerHW__PM_ACT_CFG EQU CYREG_PM_ACT_CFG3\r
-Debug_Timer_TimerHW__PM_ACT_MSK EQU 0x01\r
-Debug_Timer_TimerHW__PM_STBY_CFG EQU CYREG_PM_STBY_CFG3\r
-Debug_Timer_TimerHW__PM_STBY_MSK EQU 0x01\r
-Debug_Timer_TimerHW__RT0 EQU CYREG_TMR0_RT0\r
-Debug_Timer_TimerHW__RT1 EQU CYREG_TMR0_RT1\r
-Debug_Timer_TimerHW__SR0 EQU CYREG_TMR0_SR0\r
-\r
-/* EXTLED */\r
-EXTLED__0__INTTYPE EQU CYREG_PICU0_INTTYPE0\r
-EXTLED__0__MASK EQU 0x01\r
-EXTLED__0__PC EQU CYREG_PRT0_PC0\r
-EXTLED__0__PORT EQU 0\r
-EXTLED__0__SHIFT EQU 0\r
-EXTLED__AG EQU CYREG_PRT0_AG\r
-EXTLED__AMUX EQU CYREG_PRT0_AMUX\r
-EXTLED__BIE EQU CYREG_PRT0_BIE\r
-EXTLED__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-EXTLED__BYP EQU CYREG_PRT0_BYP\r
-EXTLED__CTL EQU CYREG_PRT0_CTL\r
-EXTLED__DM0 EQU CYREG_PRT0_DM0\r
-EXTLED__DM1 EQU CYREG_PRT0_DM1\r
-EXTLED__DM2 EQU CYREG_PRT0_DM2\r
-EXTLED__DR EQU CYREG_PRT0_DR\r
-EXTLED__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-EXTLED__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU0_BASE\r
-EXTLED__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-EXTLED__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-EXTLED__MASK EQU 0x01\r
-EXTLED__PORT EQU 0\r
-EXTLED__PRT EQU CYREG_PRT0_PRT\r
-EXTLED__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-EXTLED__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-EXTLED__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-EXTLED__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-EXTLED__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-EXTLED__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-EXTLED__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-EXTLED__PS EQU CYREG_PRT0_PS\r
-EXTLED__SHIFT EQU 0\r
-EXTLED__SLW EQU CYREG_PRT0_SLW\r
-\r
/* LED1 */\r
LED1__0__INTTYPE EQU CYREG_PICU0_INTTYPE1\r
LED1__0__MASK EQU 0x02\r
LED1__SHIFT EQU 1\r
LED1__SLW EQU CYREG_PRT0_SLW\r
\r
-/* SCSI_CLK */\r
-SCSI_CLK__CFG0 EQU CYREG_CLKDIST_DCFG1_CFG0\r
-SCSI_CLK__CFG1 EQU CYREG_CLKDIST_DCFG1_CFG1\r
-SCSI_CLK__CFG2 EQU CYREG_CLKDIST_DCFG1_CFG2\r
-SCSI_CLK__CFG2_SRC_SEL_MASK EQU 0x07\r
-SCSI_CLK__INDEX EQU 0x01\r
-SCSI_CLK__PM_ACT_CFG EQU CYREG_PM_ACT_CFG2\r
-SCSI_CLK__PM_ACT_MSK EQU 0x02\r
-SCSI_CLK__PM_STBY_CFG EQU CYREG_PM_STBY_CFG2\r
-SCSI_CLK__PM_STBY_MSK EQU 0x02\r
-\r
-/* SCSI_CTL_PHASE */\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__0__MASK EQU 0x01\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__0__POS EQU 0\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__1__MASK EQU 0x02\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__1__POS EQU 1\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB06_07_ACTL\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB06_07_CTL\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB06_07_CTL\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB06_07_CTL\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB06_07_CTL\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB06_07_MSK\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB06_07_MSK\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB06_07_MSK\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB06_07_MSK\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__2__MASK EQU 0x04\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__2__POS EQU 2\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB06_ACTL\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB06_CTL\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB06_ST_CTL\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB06_CTL\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB06_ST_CTL\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__MASK EQU 0x07\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB06_MSK_ACTL\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB06_MSK_ACTL\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB06_MSK\r
-\r
-/* SCSI_Filtered */\r
-SCSI_Filtered_sts_sts_reg__0__MASK EQU 0x01\r
-SCSI_Filtered_sts_sts_reg__0__POS EQU 0\r
-SCSI_Filtered_sts_sts_reg__1__MASK EQU 0x02\r
-SCSI_Filtered_sts_sts_reg__1__POS EQU 1\r
-SCSI_Filtered_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB11_12_ACTL\r
-SCSI_Filtered_sts_sts_reg__16BIT_STATUS_REG EQU CYREG_B0_UDB11_12_ST\r
-SCSI_Filtered_sts_sts_reg__2__MASK EQU 0x04\r
-SCSI_Filtered_sts_sts_reg__2__POS EQU 2\r
-SCSI_Filtered_sts_sts_reg__3__MASK EQU 0x08\r
-SCSI_Filtered_sts_sts_reg__3__POS EQU 3\r
-SCSI_Filtered_sts_sts_reg__4__MASK EQU 0x10\r
-SCSI_Filtered_sts_sts_reg__4__POS EQU 4\r
-SCSI_Filtered_sts_sts_reg__MASK EQU 0x1F\r
-SCSI_Filtered_sts_sts_reg__MASK_REG EQU CYREG_B0_UDB11_MSK\r
-SCSI_Filtered_sts_sts_reg__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB11_ACTL\r
-SCSI_Filtered_sts_sts_reg__STATUS_REG EQU CYREG_B0_UDB11_ST\r
+/* SD_CD */\r
+SD_CD__0__INTTYPE EQU CYREG_PICU3_INTTYPE5\r
+SD_CD__0__MASK EQU 0x20\r
+SD_CD__0__PC EQU CYREG_PRT3_PC5\r
+SD_CD__0__PORT EQU 3\r
+SD_CD__0__SHIFT EQU 5\r
+SD_CD__AG EQU CYREG_PRT3_AG\r
+SD_CD__AMUX EQU CYREG_PRT3_AMUX\r
+SD_CD__BIE EQU CYREG_PRT3_BIE\r
+SD_CD__BIT_MASK EQU CYREG_PRT3_BIT_MASK\r
+SD_CD__BYP EQU CYREG_PRT3_BYP\r
+SD_CD__CTL EQU CYREG_PRT3_CTL\r
+SD_CD__DM0 EQU CYREG_PRT3_DM0\r
+SD_CD__DM1 EQU CYREG_PRT3_DM1\r
+SD_CD__DM2 EQU CYREG_PRT3_DM2\r
+SD_CD__DR EQU CYREG_PRT3_DR\r
+SD_CD__INP_DIS EQU CYREG_PRT3_INP_DIS\r
+SD_CD__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU3_BASE\r
+SD_CD__LCD_COM_SEG EQU CYREG_PRT3_LCD_COM_SEG\r
+SD_CD__LCD_EN EQU CYREG_PRT3_LCD_EN\r
+SD_CD__MASK EQU 0x20\r
+SD_CD__PORT EQU 3\r
+SD_CD__PRT EQU CYREG_PRT3_PRT\r
+SD_CD__PRTDSI__CAPS_SEL EQU CYREG_PRT3_CAPS_SEL\r
+SD_CD__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT3_DBL_SYNC_IN\r
+SD_CD__PRTDSI__OE_SEL0 EQU CYREG_PRT3_OE_SEL0\r
+SD_CD__PRTDSI__OE_SEL1 EQU CYREG_PRT3_OE_SEL1\r
+SD_CD__PRTDSI__OUT_SEL0 EQU CYREG_PRT3_OUT_SEL0\r
+SD_CD__PRTDSI__OUT_SEL1 EQU CYREG_PRT3_OUT_SEL1\r
+SD_CD__PRTDSI__SYNC_OUT EQU CYREG_PRT3_SYNC_OUT\r
+SD_CD__PS EQU CYREG_PRT3_PS\r
+SD_CD__SHIFT EQU 5\r
+SD_CD__SLW EQU CYREG_PRT3_SLW\r
\r
-/* SCSI_Glitch_Ctl */\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__0__MASK EQU 0x01\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__0__POS EQU 0\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB04_05_ACTL\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB04_05_CTL\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB04_05_CTL\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB04_05_CTL\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB04_05_CTL\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB04_05_MSK\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB04_05_MSK\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB04_05_MSK\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB04_05_MSK\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB04_ACTL\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB04_CTL\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB04_ST_CTL\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB04_CTL\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB04_ST_CTL\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__MASK EQU 0x01\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB04_MSK_ACTL\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB04_MSK_ACTL\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB04_MSK\r
-\r
-/* SCSI_In */\r
-SCSI_In__0__AG EQU CYREG_PRT2_AG\r
-SCSI_In__0__AMUX EQU CYREG_PRT2_AMUX\r
-SCSI_In__0__BIE EQU CYREG_PRT2_BIE\r
-SCSI_In__0__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
-SCSI_In__0__BYP EQU CYREG_PRT2_BYP\r
-SCSI_In__0__CTL EQU CYREG_PRT2_CTL\r
-SCSI_In__0__DM0 EQU CYREG_PRT2_DM0\r
-SCSI_In__0__DM1 EQU CYREG_PRT2_DM1\r
-SCSI_In__0__DM2 EQU CYREG_PRT2_DM2\r
-SCSI_In__0__DR EQU CYREG_PRT2_DR\r
-SCSI_In__0__INP_DIS EQU CYREG_PRT2_INP_DIS\r
-SCSI_In__0__INTTYPE EQU CYREG_PICU2_INTTYPE1\r
-SCSI_In__0__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
-SCSI_In__0__LCD_EN EQU CYREG_PRT2_LCD_EN\r
-SCSI_In__0__MASK EQU 0x02\r
-SCSI_In__0__PC EQU CYREG_PRT2_PC1\r
-SCSI_In__0__PORT EQU 2\r
-SCSI_In__0__PRT EQU CYREG_PRT2_PRT\r
-SCSI_In__0__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
-SCSI_In__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
-SCSI_In__0__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
-SCSI_In__0__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
-SCSI_In__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
-SCSI_In__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
-SCSI_In__0__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
-SCSI_In__0__PS EQU CYREG_PRT2_PS\r
-SCSI_In__0__SHIFT EQU 1\r
-SCSI_In__0__SLW EQU CYREG_PRT2_SLW\r
-SCSI_In__1__AG EQU CYREG_PRT4_AG\r
-SCSI_In__1__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_In__1__BIE EQU CYREG_PRT4_BIE\r
-SCSI_In__1__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_In__1__BYP EQU CYREG_PRT4_BYP\r
-SCSI_In__1__CTL EQU CYREG_PRT4_CTL\r
-SCSI_In__1__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_In__1__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_In__1__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_In__1__DR EQU CYREG_PRT4_DR\r
-SCSI_In__1__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_In__1__INTTYPE EQU CYREG_PICU4_INTTYPE6\r
-SCSI_In__1__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_In__1__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_In__1__MASK EQU 0x40\r
-SCSI_In__1__PC EQU CYREG_PRT4_PC6\r
-SCSI_In__1__PORT EQU 4\r
-SCSI_In__1__PRT EQU CYREG_PRT4_PRT\r
-SCSI_In__1__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_In__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_In__1__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_In__1__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_In__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_In__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_In__1__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_In__1__PS EQU CYREG_PRT4_PS\r
-SCSI_In__1__SHIFT EQU 6\r
-SCSI_In__1__SLW EQU CYREG_PRT4_SLW\r
-SCSI_In__2__AG EQU CYREG_PRT4_AG\r
-SCSI_In__2__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_In__2__BIE EQU CYREG_PRT4_BIE\r
-SCSI_In__2__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_In__2__BYP EQU CYREG_PRT4_BYP\r
-SCSI_In__2__CTL EQU CYREG_PRT4_CTL\r
-SCSI_In__2__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_In__2__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_In__2__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_In__2__DR EQU CYREG_PRT4_DR\r
-SCSI_In__2__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_In__2__INTTYPE EQU CYREG_PICU4_INTTYPE2\r
-SCSI_In__2__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_In__2__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_In__2__MASK EQU 0x04\r
-SCSI_In__2__PC EQU CYREG_PRT4_PC2\r
-SCSI_In__2__PORT EQU 4\r
-SCSI_In__2__PRT EQU CYREG_PRT4_PRT\r
-SCSI_In__2__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_In__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_In__2__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_In__2__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_In__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_In__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_In__2__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_In__2__PS EQU CYREG_PRT4_PS\r
-SCSI_In__2__SHIFT EQU 2\r
-SCSI_In__2__SLW EQU CYREG_PRT4_SLW\r
-SCSI_In__3__AG EQU CYREG_PRT0_AG\r
-SCSI_In__3__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_In__3__BIE EQU CYREG_PRT0_BIE\r
-SCSI_In__3__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_In__3__BYP EQU CYREG_PRT0_BYP\r
-SCSI_In__3__CTL EQU CYREG_PRT0_CTL\r
-SCSI_In__3__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_In__3__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_In__3__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_In__3__DR EQU CYREG_PRT0_DR\r
-SCSI_In__3__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_In__3__INTTYPE EQU CYREG_PICU0_INTTYPE5\r
-SCSI_In__3__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_In__3__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_In__3__MASK EQU 0x20\r
-SCSI_In__3__PC EQU CYREG_PRT0_PC5\r
-SCSI_In__3__PORT EQU 0\r
-SCSI_In__3__PRT EQU CYREG_PRT0_PRT\r
-SCSI_In__3__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_In__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_In__3__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_In__3__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_In__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_In__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_In__3__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_In__3__PS EQU CYREG_PRT0_PS\r
-SCSI_In__3__SHIFT EQU 5\r
-SCSI_In__3__SLW EQU CYREG_PRT0_SLW\r
-SCSI_In__4__AG EQU CYREG_PRT0_AG\r
-SCSI_In__4__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_In__4__BIE EQU CYREG_PRT0_BIE\r
-SCSI_In__4__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_In__4__BYP EQU CYREG_PRT0_BYP\r
-SCSI_In__4__CTL EQU CYREG_PRT0_CTL\r
-SCSI_In__4__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_In__4__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_In__4__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_In__4__DR EQU CYREG_PRT0_DR\r
-SCSI_In__4__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_In__4__INTTYPE EQU CYREG_PICU0_INTTYPE4\r
-SCSI_In__4__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_In__4__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_In__4__MASK EQU 0x10\r
-SCSI_In__4__PC EQU CYREG_PRT0_PC4\r
-SCSI_In__4__PORT EQU 0\r
-SCSI_In__4__PRT EQU CYREG_PRT0_PRT\r
-SCSI_In__4__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_In__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_In__4__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_In__4__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_In__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_In__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_In__4__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_In__4__PS EQU CYREG_PRT0_PS\r
-SCSI_In__4__SHIFT EQU 4\r
-SCSI_In__4__SLW EQU CYREG_PRT0_SLW\r
-SCSI_In__CD__AG EQU CYREG_PRT4_AG\r
-SCSI_In__CD__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_In__CD__BIE EQU CYREG_PRT4_BIE\r
-SCSI_In__CD__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_In__CD__BYP EQU CYREG_PRT4_BYP\r
-SCSI_In__CD__CTL EQU CYREG_PRT4_CTL\r
-SCSI_In__CD__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_In__CD__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_In__CD__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_In__CD__DR EQU CYREG_PRT4_DR\r
-SCSI_In__CD__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_In__CD__INTTYPE EQU CYREG_PICU4_INTTYPE2\r
-SCSI_In__CD__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_In__CD__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_In__CD__MASK EQU 0x04\r
-SCSI_In__CD__PC EQU CYREG_PRT4_PC2\r
-SCSI_In__CD__PORT EQU 4\r
-SCSI_In__CD__PRT EQU CYREG_PRT4_PRT\r
-SCSI_In__CD__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_In__CD__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_In__CD__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_In__CD__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_In__CD__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_In__CD__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_In__CD__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_In__CD__PS EQU CYREG_PRT4_PS\r
-SCSI_In__CD__SHIFT EQU 2\r
-SCSI_In__CD__SLW EQU CYREG_PRT4_SLW\r
-SCSI_In__DBP__AG EQU CYREG_PRT2_AG\r
-SCSI_In__DBP__AMUX EQU CYREG_PRT2_AMUX\r
-SCSI_In__DBP__BIE EQU CYREG_PRT2_BIE\r
-SCSI_In__DBP__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
-SCSI_In__DBP__BYP EQU CYREG_PRT2_BYP\r
-SCSI_In__DBP__CTL EQU CYREG_PRT2_CTL\r
-SCSI_In__DBP__DM0 EQU CYREG_PRT2_DM0\r
-SCSI_In__DBP__DM1 EQU CYREG_PRT2_DM1\r
-SCSI_In__DBP__DM2 EQU CYREG_PRT2_DM2\r
-SCSI_In__DBP__DR EQU CYREG_PRT2_DR\r
-SCSI_In__DBP__INP_DIS EQU CYREG_PRT2_INP_DIS\r
-SCSI_In__DBP__INTTYPE EQU CYREG_PICU2_INTTYPE1\r
-SCSI_In__DBP__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
-SCSI_In__DBP__LCD_EN EQU CYREG_PRT2_LCD_EN\r
-SCSI_In__DBP__MASK EQU 0x02\r
-SCSI_In__DBP__PC EQU CYREG_PRT2_PC1\r
-SCSI_In__DBP__PORT EQU 2\r
-SCSI_In__DBP__PRT EQU CYREG_PRT2_PRT\r
-SCSI_In__DBP__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
-SCSI_In__DBP__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
-SCSI_In__DBP__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
-SCSI_In__DBP__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
-SCSI_In__DBP__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
-SCSI_In__DBP__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
-SCSI_In__DBP__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
-SCSI_In__DBP__PS EQU CYREG_PRT2_PS\r
-SCSI_In__DBP__SHIFT EQU 1\r
-SCSI_In__DBP__SLW EQU CYREG_PRT2_SLW\r
-SCSI_In__IO__AG EQU CYREG_PRT0_AG\r
-SCSI_In__IO__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_In__IO__BIE EQU CYREG_PRT0_BIE\r
-SCSI_In__IO__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_In__IO__BYP EQU CYREG_PRT0_BYP\r
-SCSI_In__IO__CTL EQU CYREG_PRT0_CTL\r
-SCSI_In__IO__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_In__IO__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_In__IO__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_In__IO__DR EQU CYREG_PRT0_DR\r
-SCSI_In__IO__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_In__IO__INTTYPE EQU CYREG_PICU0_INTTYPE4\r
-SCSI_In__IO__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_In__IO__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_In__IO__MASK EQU 0x10\r
-SCSI_In__IO__PC EQU CYREG_PRT0_PC4\r
-SCSI_In__IO__PORT EQU 0\r
-SCSI_In__IO__PRT EQU CYREG_PRT0_PRT\r
-SCSI_In__IO__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_In__IO__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_In__IO__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_In__IO__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_In__IO__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_In__IO__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_In__IO__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_In__IO__PS EQU CYREG_PRT0_PS\r
-SCSI_In__IO__SHIFT EQU 4\r
-SCSI_In__IO__SLW EQU CYREG_PRT0_SLW\r
-SCSI_In__MSG__AG EQU CYREG_PRT4_AG\r
-SCSI_In__MSG__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_In__MSG__BIE EQU CYREG_PRT4_BIE\r
-SCSI_In__MSG__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_In__MSG__BYP EQU CYREG_PRT4_BYP\r
-SCSI_In__MSG__CTL EQU CYREG_PRT4_CTL\r
-SCSI_In__MSG__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_In__MSG__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_In__MSG__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_In__MSG__DR EQU CYREG_PRT4_DR\r
-SCSI_In__MSG__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_In__MSG__INTTYPE EQU CYREG_PICU4_INTTYPE6\r
-SCSI_In__MSG__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_In__MSG__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_In__MSG__MASK EQU 0x40\r
-SCSI_In__MSG__PC EQU CYREG_PRT4_PC6\r
-SCSI_In__MSG__PORT EQU 4\r
-SCSI_In__MSG__PRT EQU CYREG_PRT4_PRT\r
-SCSI_In__MSG__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_In__MSG__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_In__MSG__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_In__MSG__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_In__MSG__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_In__MSG__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_In__MSG__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_In__MSG__PS EQU CYREG_PRT4_PS\r
-SCSI_In__MSG__SHIFT EQU 6\r
-SCSI_In__MSG__SLW EQU CYREG_PRT4_SLW\r
-SCSI_In__REQ__AG EQU CYREG_PRT0_AG\r
-SCSI_In__REQ__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_In__REQ__BIE EQU CYREG_PRT0_BIE\r
-SCSI_In__REQ__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_In__REQ__BYP EQU CYREG_PRT0_BYP\r
-SCSI_In__REQ__CTL EQU CYREG_PRT0_CTL\r
-SCSI_In__REQ__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_In__REQ__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_In__REQ__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_In__REQ__DR EQU CYREG_PRT0_DR\r
-SCSI_In__REQ__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_In__REQ__INTTYPE EQU CYREG_PICU0_INTTYPE5\r
-SCSI_In__REQ__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_In__REQ__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_In__REQ__MASK EQU 0x20\r
-SCSI_In__REQ__PC EQU CYREG_PRT0_PC5\r
-SCSI_In__REQ__PORT EQU 0\r
-SCSI_In__REQ__PRT EQU CYREG_PRT0_PRT\r
-SCSI_In__REQ__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_In__REQ__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_In__REQ__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_In__REQ__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_In__REQ__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_In__REQ__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_In__REQ__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_In__REQ__PS EQU CYREG_PRT0_PS\r
-SCSI_In__REQ__SHIFT EQU 5\r
-SCSI_In__REQ__SLW EQU CYREG_PRT0_SLW\r
-SCSI_In_DBx__0__AG EQU CYREG_PRT5_AG\r
-SCSI_In_DBx__0__AMUX EQU CYREG_PRT5_AMUX\r
-SCSI_In_DBx__0__BIE EQU CYREG_PRT5_BIE\r
-SCSI_In_DBx__0__BIT_MASK EQU CYREG_PRT5_BIT_MASK\r
-SCSI_In_DBx__0__BYP EQU CYREG_PRT5_BYP\r
-SCSI_In_DBx__0__CTL EQU CYREG_PRT5_CTL\r
-SCSI_In_DBx__0__DM0 EQU CYREG_PRT5_DM0\r
-SCSI_In_DBx__0__DM1 EQU CYREG_PRT5_DM1\r
-SCSI_In_DBx__0__DM2 EQU CYREG_PRT5_DM2\r
-SCSI_In_DBx__0__DR EQU CYREG_PRT5_DR\r
-SCSI_In_DBx__0__INP_DIS EQU CYREG_PRT5_INP_DIS\r
-SCSI_In_DBx__0__INTTYPE EQU CYREG_PICU5_INTTYPE3\r
-SCSI_In_DBx__0__LCD_COM_SEG EQU CYREG_PRT5_LCD_COM_SEG\r
-SCSI_In_DBx__0__LCD_EN EQU CYREG_PRT5_LCD_EN\r
-SCSI_In_DBx__0__MASK EQU 0x08\r
-SCSI_In_DBx__0__PC EQU CYREG_PRT5_PC3\r
-SCSI_In_DBx__0__PORT EQU 5\r
-SCSI_In_DBx__0__PRT EQU CYREG_PRT5_PRT\r
-SCSI_In_DBx__0__PRTDSI__CAPS_SEL EQU CYREG_PRT5_CAPS_SEL\r
-SCSI_In_DBx__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT5_DBL_SYNC_IN\r
-SCSI_In_DBx__0__PRTDSI__OE_SEL0 EQU CYREG_PRT5_OE_SEL0\r
-SCSI_In_DBx__0__PRTDSI__OE_SEL1 EQU CYREG_PRT5_OE_SEL1\r
-SCSI_In_DBx__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT5_OUT_SEL0\r
-SCSI_In_DBx__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT5_OUT_SEL1\r
-SCSI_In_DBx__0__PRTDSI__SYNC_OUT EQU CYREG_PRT5_SYNC_OUT\r
-SCSI_In_DBx__0__PS EQU CYREG_PRT5_PS\r
-SCSI_In_DBx__0__SHIFT EQU 3\r
-SCSI_In_DBx__0__SLW EQU CYREG_PRT5_SLW\r
-SCSI_In_DBx__1__AG EQU CYREG_PRT5_AG\r
-SCSI_In_DBx__1__AMUX EQU CYREG_PRT5_AMUX\r
-SCSI_In_DBx__1__BIE EQU CYREG_PRT5_BIE\r
-SCSI_In_DBx__1__BIT_MASK EQU CYREG_PRT5_BIT_MASK\r
-SCSI_In_DBx__1__BYP EQU CYREG_PRT5_BYP\r
-SCSI_In_DBx__1__CTL EQU CYREG_PRT5_CTL\r
-SCSI_In_DBx__1__DM0 EQU CYREG_PRT5_DM0\r
-SCSI_In_DBx__1__DM1 EQU CYREG_PRT5_DM1\r
-SCSI_In_DBx__1__DM2 EQU CYREG_PRT5_DM2\r
-SCSI_In_DBx__1__DR EQU CYREG_PRT5_DR\r
-SCSI_In_DBx__1__INP_DIS EQU CYREG_PRT5_INP_DIS\r
-SCSI_In_DBx__1__INTTYPE EQU CYREG_PICU5_INTTYPE2\r
-SCSI_In_DBx__1__LCD_COM_SEG EQU CYREG_PRT5_LCD_COM_SEG\r
-SCSI_In_DBx__1__LCD_EN EQU CYREG_PRT5_LCD_EN\r
-SCSI_In_DBx__1__MASK EQU 0x04\r
-SCSI_In_DBx__1__PC EQU CYREG_PRT5_PC2\r
-SCSI_In_DBx__1__PORT EQU 5\r
-SCSI_In_DBx__1__PRT EQU CYREG_PRT5_PRT\r
-SCSI_In_DBx__1__PRTDSI__CAPS_SEL EQU CYREG_PRT5_CAPS_SEL\r
-SCSI_In_DBx__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT5_DBL_SYNC_IN\r
-SCSI_In_DBx__1__PRTDSI__OE_SEL0 EQU CYREG_PRT5_OE_SEL0\r
-SCSI_In_DBx__1__PRTDSI__OE_SEL1 EQU CYREG_PRT5_OE_SEL1\r
-SCSI_In_DBx__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT5_OUT_SEL0\r
-SCSI_In_DBx__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT5_OUT_SEL1\r
-SCSI_In_DBx__1__PRTDSI__SYNC_OUT EQU CYREG_PRT5_SYNC_OUT\r
-SCSI_In_DBx__1__PS EQU CYREG_PRT5_PS\r
-SCSI_In_DBx__1__SHIFT EQU 2\r
-SCSI_In_DBx__1__SLW EQU CYREG_PRT5_SLW\r
-SCSI_In_DBx__2__AG EQU CYREG_PRT6_AG\r
-SCSI_In_DBx__2__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_In_DBx__2__BIE EQU CYREG_PRT6_BIE\r
-SCSI_In_DBx__2__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_In_DBx__2__BYP EQU CYREG_PRT6_BYP\r
-SCSI_In_DBx__2__CTL EQU CYREG_PRT6_CTL\r
-SCSI_In_DBx__2__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_In_DBx__2__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_In_DBx__2__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_In_DBx__2__DR EQU CYREG_PRT6_DR\r
-SCSI_In_DBx__2__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_In_DBx__2__INTTYPE EQU CYREG_PICU6_INTTYPE7\r
-SCSI_In_DBx__2__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_In_DBx__2__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_In_DBx__2__MASK EQU 0x80\r
-SCSI_In_DBx__2__PC EQU CYREG_PRT6_PC7\r
-SCSI_In_DBx__2__PORT EQU 6\r
-SCSI_In_DBx__2__PRT EQU CYREG_PRT6_PRT\r
-SCSI_In_DBx__2__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_In_DBx__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_In_DBx__2__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_In_DBx__2__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_In_DBx__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_In_DBx__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_In_DBx__2__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_In_DBx__2__PS EQU CYREG_PRT6_PS\r
-SCSI_In_DBx__2__SHIFT EQU 7\r
-SCSI_In_DBx__2__SLW EQU CYREG_PRT6_SLW\r
-SCSI_In_DBx__3__AG EQU CYREG_PRT6_AG\r
-SCSI_In_DBx__3__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_In_DBx__3__BIE EQU CYREG_PRT6_BIE\r
-SCSI_In_DBx__3__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_In_DBx__3__BYP EQU CYREG_PRT6_BYP\r
-SCSI_In_DBx__3__CTL EQU CYREG_PRT6_CTL\r
-SCSI_In_DBx__3__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_In_DBx__3__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_In_DBx__3__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_In_DBx__3__DR EQU CYREG_PRT6_DR\r
-SCSI_In_DBx__3__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_In_DBx__3__INTTYPE EQU CYREG_PICU6_INTTYPE6\r
-SCSI_In_DBx__3__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_In_DBx__3__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_In_DBx__3__MASK EQU 0x40\r
-SCSI_In_DBx__3__PC EQU CYREG_PRT6_PC6\r
-SCSI_In_DBx__3__PORT EQU 6\r
-SCSI_In_DBx__3__PRT EQU CYREG_PRT6_PRT\r
-SCSI_In_DBx__3__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_In_DBx__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_In_DBx__3__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_In_DBx__3__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_In_DBx__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_In_DBx__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_In_DBx__3__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_In_DBx__3__PS EQU CYREG_PRT6_PS\r
-SCSI_In_DBx__3__SHIFT EQU 6\r
-SCSI_In_DBx__3__SLW EQU CYREG_PRT6_SLW\r
-SCSI_In_DBx__4__AG EQU CYREG_PRT12_AG\r
-SCSI_In_DBx__4__BIE EQU CYREG_PRT12_BIE\r
-SCSI_In_DBx__4__BIT_MASK EQU CYREG_PRT12_BIT_MASK\r
-SCSI_In_DBx__4__BYP EQU CYREG_PRT12_BYP\r
-SCSI_In_DBx__4__DM0 EQU CYREG_PRT12_DM0\r
-SCSI_In_DBx__4__DM1 EQU CYREG_PRT12_DM1\r
-SCSI_In_DBx__4__DM2 EQU CYREG_PRT12_DM2\r
-SCSI_In_DBx__4__DR EQU CYREG_PRT12_DR\r
-SCSI_In_DBx__4__INP_DIS EQU CYREG_PRT12_INP_DIS\r
-SCSI_In_DBx__4__INTTYPE EQU CYREG_PICU12_INTTYPE5\r
-SCSI_In_DBx__4__MASK EQU 0x20\r
-SCSI_In_DBx__4__PC EQU CYREG_PRT12_PC5\r
-SCSI_In_DBx__4__PORT EQU 12\r
-SCSI_In_DBx__4__PRT EQU CYREG_PRT12_PRT\r
-SCSI_In_DBx__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN\r
-SCSI_In_DBx__4__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0\r
-SCSI_In_DBx__4__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1\r
-SCSI_In_DBx__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0\r
-SCSI_In_DBx__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1\r
-SCSI_In_DBx__4__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT\r
-SCSI_In_DBx__4__PS EQU CYREG_PRT12_PS\r
-SCSI_In_DBx__4__SHIFT EQU 5\r
-SCSI_In_DBx__4__SIO_CFG EQU CYREG_PRT12_SIO_CFG\r
-SCSI_In_DBx__4__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF\r
-SCSI_In_DBx__4__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN\r
-SCSI_In_DBx__4__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ\r
-SCSI_In_DBx__4__SLW EQU CYREG_PRT12_SLW\r
-SCSI_In_DBx__5__AG EQU CYREG_PRT12_AG\r
-SCSI_In_DBx__5__BIE EQU CYREG_PRT12_BIE\r
-SCSI_In_DBx__5__BIT_MASK EQU CYREG_PRT12_BIT_MASK\r
-SCSI_In_DBx__5__BYP EQU CYREG_PRT12_BYP\r
-SCSI_In_DBx__5__DM0 EQU CYREG_PRT12_DM0\r
-SCSI_In_DBx__5__DM1 EQU CYREG_PRT12_DM1\r
-SCSI_In_DBx__5__DM2 EQU CYREG_PRT12_DM2\r
-SCSI_In_DBx__5__DR EQU CYREG_PRT12_DR\r
-SCSI_In_DBx__5__INP_DIS EQU CYREG_PRT12_INP_DIS\r
-SCSI_In_DBx__5__INTTYPE EQU CYREG_PICU12_INTTYPE4\r
-SCSI_In_DBx__5__MASK EQU 0x10\r
-SCSI_In_DBx__5__PC EQU CYREG_PRT12_PC4\r
-SCSI_In_DBx__5__PORT EQU 12\r
-SCSI_In_DBx__5__PRT EQU CYREG_PRT12_PRT\r
-SCSI_In_DBx__5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN\r
-SCSI_In_DBx__5__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0\r
-SCSI_In_DBx__5__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1\r
-SCSI_In_DBx__5__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0\r
-SCSI_In_DBx__5__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1\r
-SCSI_In_DBx__5__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT\r
-SCSI_In_DBx__5__PS EQU CYREG_PRT12_PS\r
-SCSI_In_DBx__5__SHIFT EQU 4\r
-SCSI_In_DBx__5__SIO_CFG EQU CYREG_PRT12_SIO_CFG\r
-SCSI_In_DBx__5__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF\r
-SCSI_In_DBx__5__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN\r
-SCSI_In_DBx__5__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ\r
-SCSI_In_DBx__5__SLW EQU CYREG_PRT12_SLW\r
-SCSI_In_DBx__6__AG EQU CYREG_PRT2_AG\r
-SCSI_In_DBx__6__AMUX EQU CYREG_PRT2_AMUX\r
-SCSI_In_DBx__6__BIE EQU CYREG_PRT2_BIE\r
-SCSI_In_DBx__6__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
-SCSI_In_DBx__6__BYP EQU CYREG_PRT2_BYP\r
-SCSI_In_DBx__6__CTL EQU CYREG_PRT2_CTL\r
-SCSI_In_DBx__6__DM0 EQU CYREG_PRT2_DM0\r
-SCSI_In_DBx__6__DM1 EQU CYREG_PRT2_DM1\r
-SCSI_In_DBx__6__DM2 EQU CYREG_PRT2_DM2\r
-SCSI_In_DBx__6__DR EQU CYREG_PRT2_DR\r
-SCSI_In_DBx__6__INP_DIS EQU CYREG_PRT2_INP_DIS\r
-SCSI_In_DBx__6__INTTYPE EQU CYREG_PICU2_INTTYPE5\r
-SCSI_In_DBx__6__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
-SCSI_In_DBx__6__LCD_EN EQU CYREG_PRT2_LCD_EN\r
-SCSI_In_DBx__6__MASK EQU 0x20\r
-SCSI_In_DBx__6__PC EQU CYREG_PRT2_PC5\r
-SCSI_In_DBx__6__PORT EQU 2\r
-SCSI_In_DBx__6__PRT EQU CYREG_PRT2_PRT\r
-SCSI_In_DBx__6__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
-SCSI_In_DBx__6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
-SCSI_In_DBx__6__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
-SCSI_In_DBx__6__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
-SCSI_In_DBx__6__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
-SCSI_In_DBx__6__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
-SCSI_In_DBx__6__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
-SCSI_In_DBx__6__PS EQU CYREG_PRT2_PS\r
-SCSI_In_DBx__6__SHIFT EQU 5\r
-SCSI_In_DBx__6__SLW EQU CYREG_PRT2_SLW\r
-SCSI_In_DBx__7__AG EQU CYREG_PRT2_AG\r
-SCSI_In_DBx__7__AMUX EQU CYREG_PRT2_AMUX\r
-SCSI_In_DBx__7__BIE EQU CYREG_PRT2_BIE\r
-SCSI_In_DBx__7__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
-SCSI_In_DBx__7__BYP EQU CYREG_PRT2_BYP\r
-SCSI_In_DBx__7__CTL EQU CYREG_PRT2_CTL\r
-SCSI_In_DBx__7__DM0 EQU CYREG_PRT2_DM0\r
-SCSI_In_DBx__7__DM1 EQU CYREG_PRT2_DM1\r
-SCSI_In_DBx__7__DM2 EQU CYREG_PRT2_DM2\r
-SCSI_In_DBx__7__DR EQU CYREG_PRT2_DR\r
-SCSI_In_DBx__7__INP_DIS EQU CYREG_PRT2_INP_DIS\r
-SCSI_In_DBx__7__INTTYPE EQU CYREG_PICU2_INTTYPE4\r
-SCSI_In_DBx__7__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
-SCSI_In_DBx__7__LCD_EN EQU CYREG_PRT2_LCD_EN\r
-SCSI_In_DBx__7__MASK EQU 0x10\r
-SCSI_In_DBx__7__PC EQU CYREG_PRT2_PC4\r
-SCSI_In_DBx__7__PORT EQU 2\r
-SCSI_In_DBx__7__PRT EQU CYREG_PRT2_PRT\r
-SCSI_In_DBx__7__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
-SCSI_In_DBx__7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
-SCSI_In_DBx__7__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
-SCSI_In_DBx__7__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
-SCSI_In_DBx__7__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
-SCSI_In_DBx__7__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
-SCSI_In_DBx__7__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
-SCSI_In_DBx__7__PS EQU CYREG_PRT2_PS\r
-SCSI_In_DBx__7__SHIFT EQU 4\r
-SCSI_In_DBx__7__SLW EQU CYREG_PRT2_SLW\r
-SCSI_In_DBx__DB0__AG EQU CYREG_PRT5_AG\r
-SCSI_In_DBx__DB0__AMUX EQU CYREG_PRT5_AMUX\r
-SCSI_In_DBx__DB0__BIE EQU CYREG_PRT5_BIE\r
-SCSI_In_DBx__DB0__BIT_MASK EQU CYREG_PRT5_BIT_MASK\r
-SCSI_In_DBx__DB0__BYP EQU CYREG_PRT5_BYP\r
-SCSI_In_DBx__DB0__CTL EQU CYREG_PRT5_CTL\r
-SCSI_In_DBx__DB0__DM0 EQU CYREG_PRT5_DM0\r
-SCSI_In_DBx__DB0__DM1 EQU CYREG_PRT5_DM1\r
-SCSI_In_DBx__DB0__DM2 EQU CYREG_PRT5_DM2\r
-SCSI_In_DBx__DB0__DR EQU CYREG_PRT5_DR\r
-SCSI_In_DBx__DB0__INP_DIS EQU CYREG_PRT5_INP_DIS\r
-SCSI_In_DBx__DB0__INTTYPE EQU CYREG_PICU5_INTTYPE3\r
-SCSI_In_DBx__DB0__LCD_COM_SEG EQU CYREG_PRT5_LCD_COM_SEG\r
-SCSI_In_DBx__DB0__LCD_EN EQU CYREG_PRT5_LCD_EN\r
-SCSI_In_DBx__DB0__MASK EQU 0x08\r
-SCSI_In_DBx__DB0__PC EQU CYREG_PRT5_PC3\r
-SCSI_In_DBx__DB0__PORT EQU 5\r
-SCSI_In_DBx__DB0__PRT EQU CYREG_PRT5_PRT\r
-SCSI_In_DBx__DB0__PRTDSI__CAPS_SEL EQU CYREG_PRT5_CAPS_SEL\r
-SCSI_In_DBx__DB0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT5_DBL_SYNC_IN\r
-SCSI_In_DBx__DB0__PRTDSI__OE_SEL0 EQU CYREG_PRT5_OE_SEL0\r
-SCSI_In_DBx__DB0__PRTDSI__OE_SEL1 EQU CYREG_PRT5_OE_SEL1\r
-SCSI_In_DBx__DB0__PRTDSI__OUT_SEL0 EQU CYREG_PRT5_OUT_SEL0\r
-SCSI_In_DBx__DB0__PRTDSI__OUT_SEL1 EQU CYREG_PRT5_OUT_SEL1\r
-SCSI_In_DBx__DB0__PRTDSI__SYNC_OUT EQU CYREG_PRT5_SYNC_OUT\r
-SCSI_In_DBx__DB0__PS EQU CYREG_PRT5_PS\r
-SCSI_In_DBx__DB0__SHIFT EQU 3\r
-SCSI_In_DBx__DB0__SLW EQU CYREG_PRT5_SLW\r
-SCSI_In_DBx__DB1__AG EQU CYREG_PRT5_AG\r
-SCSI_In_DBx__DB1__AMUX EQU CYREG_PRT5_AMUX\r
-SCSI_In_DBx__DB1__BIE EQU CYREG_PRT5_BIE\r
-SCSI_In_DBx__DB1__BIT_MASK EQU CYREG_PRT5_BIT_MASK\r
-SCSI_In_DBx__DB1__BYP EQU CYREG_PRT5_BYP\r
-SCSI_In_DBx__DB1__CTL EQU CYREG_PRT5_CTL\r
-SCSI_In_DBx__DB1__DM0 EQU CYREG_PRT5_DM0\r
-SCSI_In_DBx__DB1__DM1 EQU CYREG_PRT5_DM1\r
-SCSI_In_DBx__DB1__DM2 EQU CYREG_PRT5_DM2\r
-SCSI_In_DBx__DB1__DR EQU CYREG_PRT5_DR\r
-SCSI_In_DBx__DB1__INP_DIS EQU CYREG_PRT5_INP_DIS\r
-SCSI_In_DBx__DB1__INTTYPE EQU CYREG_PICU5_INTTYPE2\r
-SCSI_In_DBx__DB1__LCD_COM_SEG EQU CYREG_PRT5_LCD_COM_SEG\r
-SCSI_In_DBx__DB1__LCD_EN EQU CYREG_PRT5_LCD_EN\r
-SCSI_In_DBx__DB1__MASK EQU 0x04\r
-SCSI_In_DBx__DB1__PC EQU CYREG_PRT5_PC2\r
-SCSI_In_DBx__DB1__PORT EQU 5\r
-SCSI_In_DBx__DB1__PRT EQU CYREG_PRT5_PRT\r
-SCSI_In_DBx__DB1__PRTDSI__CAPS_SEL EQU CYREG_PRT5_CAPS_SEL\r
-SCSI_In_DBx__DB1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT5_DBL_SYNC_IN\r
-SCSI_In_DBx__DB1__PRTDSI__OE_SEL0 EQU CYREG_PRT5_OE_SEL0\r
-SCSI_In_DBx__DB1__PRTDSI__OE_SEL1 EQU CYREG_PRT5_OE_SEL1\r
-SCSI_In_DBx__DB1__PRTDSI__OUT_SEL0 EQU CYREG_PRT5_OUT_SEL0\r
-SCSI_In_DBx__DB1__PRTDSI__OUT_SEL1 EQU CYREG_PRT5_OUT_SEL1\r
-SCSI_In_DBx__DB1__PRTDSI__SYNC_OUT EQU CYREG_PRT5_SYNC_OUT\r
-SCSI_In_DBx__DB1__PS EQU CYREG_PRT5_PS\r
-SCSI_In_DBx__DB1__SHIFT EQU 2\r
-SCSI_In_DBx__DB1__SLW EQU CYREG_PRT5_SLW\r
-SCSI_In_DBx__DB2__AG EQU CYREG_PRT6_AG\r
-SCSI_In_DBx__DB2__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_In_DBx__DB2__BIE EQU CYREG_PRT6_BIE\r
-SCSI_In_DBx__DB2__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_In_DBx__DB2__BYP EQU CYREG_PRT6_BYP\r
-SCSI_In_DBx__DB2__CTL EQU CYREG_PRT6_CTL\r
-SCSI_In_DBx__DB2__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_In_DBx__DB2__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_In_DBx__DB2__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_In_DBx__DB2__DR EQU CYREG_PRT6_DR\r
-SCSI_In_DBx__DB2__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_In_DBx__DB2__INTTYPE EQU CYREG_PICU6_INTTYPE7\r
-SCSI_In_DBx__DB2__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_In_DBx__DB2__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_In_DBx__DB2__MASK EQU 0x80\r
-SCSI_In_DBx__DB2__PC EQU CYREG_PRT6_PC7\r
-SCSI_In_DBx__DB2__PORT EQU 6\r
-SCSI_In_DBx__DB2__PRT EQU CYREG_PRT6_PRT\r
-SCSI_In_DBx__DB2__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_In_DBx__DB2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_In_DBx__DB2__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_In_DBx__DB2__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_In_DBx__DB2__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_In_DBx__DB2__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_In_DBx__DB2__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_In_DBx__DB2__PS EQU CYREG_PRT6_PS\r
-SCSI_In_DBx__DB2__SHIFT EQU 7\r
-SCSI_In_DBx__DB2__SLW EQU CYREG_PRT6_SLW\r
-SCSI_In_DBx__DB3__AG EQU CYREG_PRT6_AG\r
-SCSI_In_DBx__DB3__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_In_DBx__DB3__BIE EQU CYREG_PRT6_BIE\r
-SCSI_In_DBx__DB3__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_In_DBx__DB3__BYP EQU CYREG_PRT6_BYP\r
-SCSI_In_DBx__DB3__CTL EQU CYREG_PRT6_CTL\r
-SCSI_In_DBx__DB3__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_In_DBx__DB3__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_In_DBx__DB3__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_In_DBx__DB3__DR EQU CYREG_PRT6_DR\r
-SCSI_In_DBx__DB3__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_In_DBx__DB3__INTTYPE EQU CYREG_PICU6_INTTYPE6\r
-SCSI_In_DBx__DB3__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_In_DBx__DB3__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_In_DBx__DB3__MASK EQU 0x40\r
-SCSI_In_DBx__DB3__PC EQU CYREG_PRT6_PC6\r
-SCSI_In_DBx__DB3__PORT EQU 6\r
-SCSI_In_DBx__DB3__PRT EQU CYREG_PRT6_PRT\r
-SCSI_In_DBx__DB3__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_In_DBx__DB3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_In_DBx__DB3__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_In_DBx__DB3__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_In_DBx__DB3__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_In_DBx__DB3__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_In_DBx__DB3__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_In_DBx__DB3__PS EQU CYREG_PRT6_PS\r
-SCSI_In_DBx__DB3__SHIFT EQU 6\r
-SCSI_In_DBx__DB3__SLW EQU CYREG_PRT6_SLW\r
-SCSI_In_DBx__DB4__AG EQU CYREG_PRT12_AG\r
-SCSI_In_DBx__DB4__BIE EQU CYREG_PRT12_BIE\r
-SCSI_In_DBx__DB4__BIT_MASK EQU CYREG_PRT12_BIT_MASK\r
-SCSI_In_DBx__DB4__BYP EQU CYREG_PRT12_BYP\r
-SCSI_In_DBx__DB4__DM0 EQU CYREG_PRT12_DM0\r
-SCSI_In_DBx__DB4__DM1 EQU CYREG_PRT12_DM1\r
-SCSI_In_DBx__DB4__DM2 EQU CYREG_PRT12_DM2\r
-SCSI_In_DBx__DB4__DR EQU CYREG_PRT12_DR\r
-SCSI_In_DBx__DB4__INP_DIS EQU CYREG_PRT12_INP_DIS\r
-SCSI_In_DBx__DB4__INTTYPE EQU CYREG_PICU12_INTTYPE5\r
-SCSI_In_DBx__DB4__MASK EQU 0x20\r
-SCSI_In_DBx__DB4__PC EQU CYREG_PRT12_PC5\r
-SCSI_In_DBx__DB4__PORT EQU 12\r
-SCSI_In_DBx__DB4__PRT EQU CYREG_PRT12_PRT\r
-SCSI_In_DBx__DB4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN\r
-SCSI_In_DBx__DB4__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0\r
-SCSI_In_DBx__DB4__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1\r
-SCSI_In_DBx__DB4__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0\r
-SCSI_In_DBx__DB4__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1\r
-SCSI_In_DBx__DB4__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT\r
-SCSI_In_DBx__DB4__PS EQU CYREG_PRT12_PS\r
-SCSI_In_DBx__DB4__SHIFT EQU 5\r
-SCSI_In_DBx__DB4__SIO_CFG EQU CYREG_PRT12_SIO_CFG\r
-SCSI_In_DBx__DB4__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF\r
-SCSI_In_DBx__DB4__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN\r
-SCSI_In_DBx__DB4__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ\r
-SCSI_In_DBx__DB4__SLW EQU CYREG_PRT12_SLW\r
-SCSI_In_DBx__DB5__AG EQU CYREG_PRT12_AG\r
-SCSI_In_DBx__DB5__BIE EQU CYREG_PRT12_BIE\r
-SCSI_In_DBx__DB5__BIT_MASK EQU CYREG_PRT12_BIT_MASK\r
-SCSI_In_DBx__DB5__BYP EQU CYREG_PRT12_BYP\r
-SCSI_In_DBx__DB5__DM0 EQU CYREG_PRT12_DM0\r
-SCSI_In_DBx__DB5__DM1 EQU CYREG_PRT12_DM1\r
-SCSI_In_DBx__DB5__DM2 EQU CYREG_PRT12_DM2\r
-SCSI_In_DBx__DB5__DR EQU CYREG_PRT12_DR\r
-SCSI_In_DBx__DB5__INP_DIS EQU CYREG_PRT12_INP_DIS\r
-SCSI_In_DBx__DB5__INTTYPE EQU CYREG_PICU12_INTTYPE4\r
-SCSI_In_DBx__DB5__MASK EQU 0x10\r
-SCSI_In_DBx__DB5__PC EQU CYREG_PRT12_PC4\r
-SCSI_In_DBx__DB5__PORT EQU 12\r
-SCSI_In_DBx__DB5__PRT EQU CYREG_PRT12_PRT\r
-SCSI_In_DBx__DB5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN\r
-SCSI_In_DBx__DB5__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0\r
-SCSI_In_DBx__DB5__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1\r
-SCSI_In_DBx__DB5__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0\r
-SCSI_In_DBx__DB5__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1\r
-SCSI_In_DBx__DB5__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT\r
-SCSI_In_DBx__DB5__PS EQU CYREG_PRT12_PS\r
-SCSI_In_DBx__DB5__SHIFT EQU 4\r
-SCSI_In_DBx__DB5__SIO_CFG EQU CYREG_PRT12_SIO_CFG\r
-SCSI_In_DBx__DB5__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF\r
-SCSI_In_DBx__DB5__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN\r
-SCSI_In_DBx__DB5__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ\r
-SCSI_In_DBx__DB5__SLW EQU CYREG_PRT12_SLW\r
-SCSI_In_DBx__DB6__AG EQU CYREG_PRT2_AG\r
-SCSI_In_DBx__DB6__AMUX EQU CYREG_PRT2_AMUX\r
-SCSI_In_DBx__DB6__BIE EQU CYREG_PRT2_BIE\r
-SCSI_In_DBx__DB6__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
-SCSI_In_DBx__DB6__BYP EQU CYREG_PRT2_BYP\r
-SCSI_In_DBx__DB6__CTL EQU CYREG_PRT2_CTL\r
-SCSI_In_DBx__DB6__DM0 EQU CYREG_PRT2_DM0\r
-SCSI_In_DBx__DB6__DM1 EQU CYREG_PRT2_DM1\r
-SCSI_In_DBx__DB6__DM2 EQU CYREG_PRT2_DM2\r
-SCSI_In_DBx__DB6__DR EQU CYREG_PRT2_DR\r
-SCSI_In_DBx__DB6__INP_DIS EQU CYREG_PRT2_INP_DIS\r
-SCSI_In_DBx__DB6__INTTYPE EQU CYREG_PICU2_INTTYPE5\r
-SCSI_In_DBx__DB6__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
-SCSI_In_DBx__DB6__LCD_EN EQU CYREG_PRT2_LCD_EN\r
-SCSI_In_DBx__DB6__MASK EQU 0x20\r
-SCSI_In_DBx__DB6__PC EQU CYREG_PRT2_PC5\r
-SCSI_In_DBx__DB6__PORT EQU 2\r
-SCSI_In_DBx__DB6__PRT EQU CYREG_PRT2_PRT\r
-SCSI_In_DBx__DB6__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
-SCSI_In_DBx__DB6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
-SCSI_In_DBx__DB6__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
-SCSI_In_DBx__DB6__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
-SCSI_In_DBx__DB6__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
-SCSI_In_DBx__DB6__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
-SCSI_In_DBx__DB6__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
-SCSI_In_DBx__DB6__PS EQU CYREG_PRT2_PS\r
-SCSI_In_DBx__DB6__SHIFT EQU 5\r
-SCSI_In_DBx__DB6__SLW EQU CYREG_PRT2_SLW\r
-SCSI_In_DBx__DB7__AG EQU CYREG_PRT2_AG\r
-SCSI_In_DBx__DB7__AMUX EQU CYREG_PRT2_AMUX\r
-SCSI_In_DBx__DB7__BIE EQU CYREG_PRT2_BIE\r
-SCSI_In_DBx__DB7__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
-SCSI_In_DBx__DB7__BYP EQU CYREG_PRT2_BYP\r
-SCSI_In_DBx__DB7__CTL EQU CYREG_PRT2_CTL\r
-SCSI_In_DBx__DB7__DM0 EQU CYREG_PRT2_DM0\r
-SCSI_In_DBx__DB7__DM1 EQU CYREG_PRT2_DM1\r
-SCSI_In_DBx__DB7__DM2 EQU CYREG_PRT2_DM2\r
-SCSI_In_DBx__DB7__DR EQU CYREG_PRT2_DR\r
-SCSI_In_DBx__DB7__INP_DIS EQU CYREG_PRT2_INP_DIS\r
-SCSI_In_DBx__DB7__INTTYPE EQU CYREG_PICU2_INTTYPE4\r
-SCSI_In_DBx__DB7__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
-SCSI_In_DBx__DB7__LCD_EN EQU CYREG_PRT2_LCD_EN\r
-SCSI_In_DBx__DB7__MASK EQU 0x10\r
-SCSI_In_DBx__DB7__PC EQU CYREG_PRT2_PC4\r
-SCSI_In_DBx__DB7__PORT EQU 2\r
-SCSI_In_DBx__DB7__PRT EQU CYREG_PRT2_PRT\r
-SCSI_In_DBx__DB7__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
-SCSI_In_DBx__DB7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
-SCSI_In_DBx__DB7__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
-SCSI_In_DBx__DB7__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
-SCSI_In_DBx__DB7__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
-SCSI_In_DBx__DB7__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
-SCSI_In_DBx__DB7__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
-SCSI_In_DBx__DB7__PS EQU CYREG_PRT2_PS\r
-SCSI_In_DBx__DB7__SHIFT EQU 4\r
-SCSI_In_DBx__DB7__SLW EQU CYREG_PRT2_SLW\r
-\r
-/* SCSI_Noise */\r
-SCSI_Noise__0__AG EQU CYREG_PRT2_AG\r
-SCSI_Noise__0__AMUX EQU CYREG_PRT2_AMUX\r
-SCSI_Noise__0__BIE EQU CYREG_PRT2_BIE\r
-SCSI_Noise__0__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
-SCSI_Noise__0__BYP EQU CYREG_PRT2_BYP\r
-SCSI_Noise__0__CTL EQU CYREG_PRT2_CTL\r
-SCSI_Noise__0__DM0 EQU CYREG_PRT2_DM0\r
-SCSI_Noise__0__DM1 EQU CYREG_PRT2_DM1\r
-SCSI_Noise__0__DM2 EQU CYREG_PRT2_DM2\r
-SCSI_Noise__0__DR EQU CYREG_PRT2_DR\r
-SCSI_Noise__0__INP_DIS EQU CYREG_PRT2_INP_DIS\r
-SCSI_Noise__0__INTTYPE EQU CYREG_PICU2_INTTYPE0\r
-SCSI_Noise__0__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
-SCSI_Noise__0__LCD_EN EQU CYREG_PRT2_LCD_EN\r
-SCSI_Noise__0__MASK EQU 0x01\r
-SCSI_Noise__0__PC EQU CYREG_PRT2_PC0\r
-SCSI_Noise__0__PORT EQU 2\r
-SCSI_Noise__0__PRT EQU CYREG_PRT2_PRT\r
-SCSI_Noise__0__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
-SCSI_Noise__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
-SCSI_Noise__0__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
-SCSI_Noise__0__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
-SCSI_Noise__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
-SCSI_Noise__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
-SCSI_Noise__0__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
-SCSI_Noise__0__PS EQU CYREG_PRT2_PS\r
-SCSI_Noise__0__SHIFT EQU 0\r
-SCSI_Noise__0__SLW EQU CYREG_PRT2_SLW\r
-SCSI_Noise__1__AG EQU CYREG_PRT6_AG\r
-SCSI_Noise__1__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Noise__1__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Noise__1__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Noise__1__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Noise__1__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Noise__1__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Noise__1__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Noise__1__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Noise__1__DR EQU CYREG_PRT6_DR\r
-SCSI_Noise__1__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Noise__1__INTTYPE EQU CYREG_PICU6_INTTYPE3\r
-SCSI_Noise__1__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Noise__1__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Noise__1__MASK EQU 0x08\r
-SCSI_Noise__1__PC EQU CYREG_PRT6_PC3\r
-SCSI_Noise__1__PORT EQU 6\r
-SCSI_Noise__1__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Noise__1__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Noise__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Noise__1__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Noise__1__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Noise__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Noise__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Noise__1__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Noise__1__PS EQU CYREG_PRT6_PS\r
-SCSI_Noise__1__SHIFT EQU 3\r
-SCSI_Noise__1__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Noise__2__AG EQU CYREG_PRT4_AG\r
-SCSI_Noise__2__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Noise__2__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Noise__2__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Noise__2__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Noise__2__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Noise__2__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Noise__2__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Noise__2__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Noise__2__DR EQU CYREG_PRT4_DR\r
-SCSI_Noise__2__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Noise__2__INTTYPE EQU CYREG_PICU4_INTTYPE3\r
-SCSI_Noise__2__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Noise__2__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Noise__2__MASK EQU 0x08\r
-SCSI_Noise__2__PC EQU CYREG_PRT4_PC3\r
-SCSI_Noise__2__PORT EQU 4\r
-SCSI_Noise__2__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Noise__2__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Noise__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Noise__2__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Noise__2__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Noise__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Noise__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Noise__2__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Noise__2__PS EQU CYREG_PRT4_PS\r
-SCSI_Noise__2__SHIFT EQU 3\r
-SCSI_Noise__2__SLW EQU CYREG_PRT4_SLW\r
-SCSI_Noise__3__AG EQU CYREG_PRT4_AG\r
-SCSI_Noise__3__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Noise__3__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Noise__3__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Noise__3__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Noise__3__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Noise__3__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Noise__3__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Noise__3__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Noise__3__DR EQU CYREG_PRT4_DR\r
-SCSI_Noise__3__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Noise__3__INTTYPE EQU CYREG_PICU4_INTTYPE7\r
-SCSI_Noise__3__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Noise__3__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Noise__3__MASK EQU 0x80\r
-SCSI_Noise__3__PC EQU CYREG_PRT4_PC7\r
-SCSI_Noise__3__PORT EQU 4\r
-SCSI_Noise__3__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Noise__3__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Noise__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Noise__3__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Noise__3__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Noise__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Noise__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Noise__3__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Noise__3__PS EQU CYREG_PRT4_PS\r
-SCSI_Noise__3__SHIFT EQU 7\r
-SCSI_Noise__3__SLW EQU CYREG_PRT4_SLW\r
-SCSI_Noise__4__AG EQU CYREG_PRT6_AG\r
-SCSI_Noise__4__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Noise__4__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Noise__4__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Noise__4__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Noise__4__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Noise__4__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Noise__4__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Noise__4__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Noise__4__DR EQU CYREG_PRT6_DR\r
-SCSI_Noise__4__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Noise__4__INTTYPE EQU CYREG_PICU6_INTTYPE2\r
-SCSI_Noise__4__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Noise__4__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Noise__4__MASK EQU 0x04\r
-SCSI_Noise__4__PC EQU CYREG_PRT6_PC2\r
-SCSI_Noise__4__PORT EQU 6\r
-SCSI_Noise__4__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Noise__4__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Noise__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Noise__4__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Noise__4__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Noise__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Noise__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Noise__4__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Noise__4__PS EQU CYREG_PRT6_PS\r
-SCSI_Noise__4__SHIFT EQU 2\r
-SCSI_Noise__4__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Noise__ACK__AG EQU CYREG_PRT6_AG\r
-SCSI_Noise__ACK__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Noise__ACK__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Noise__ACK__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Noise__ACK__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Noise__ACK__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Noise__ACK__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Noise__ACK__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Noise__ACK__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Noise__ACK__DR EQU CYREG_PRT6_DR\r
-SCSI_Noise__ACK__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Noise__ACK__INTTYPE EQU CYREG_PICU6_INTTYPE2\r
-SCSI_Noise__ACK__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Noise__ACK__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Noise__ACK__MASK EQU 0x04\r
-SCSI_Noise__ACK__PC EQU CYREG_PRT6_PC2\r
-SCSI_Noise__ACK__PORT EQU 6\r
-SCSI_Noise__ACK__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Noise__ACK__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Noise__ACK__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Noise__ACK__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Noise__ACK__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Noise__ACK__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Noise__ACK__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Noise__ACK__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Noise__ACK__PS EQU CYREG_PRT6_PS\r
-SCSI_Noise__ACK__SHIFT EQU 2\r
-SCSI_Noise__ACK__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Noise__ATN__AG EQU CYREG_PRT2_AG\r
-SCSI_Noise__ATN__AMUX EQU CYREG_PRT2_AMUX\r
-SCSI_Noise__ATN__BIE EQU CYREG_PRT2_BIE\r
-SCSI_Noise__ATN__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
-SCSI_Noise__ATN__BYP EQU CYREG_PRT2_BYP\r
-SCSI_Noise__ATN__CTL EQU CYREG_PRT2_CTL\r
-SCSI_Noise__ATN__DM0 EQU CYREG_PRT2_DM0\r
-SCSI_Noise__ATN__DM1 EQU CYREG_PRT2_DM1\r
-SCSI_Noise__ATN__DM2 EQU CYREG_PRT2_DM2\r
-SCSI_Noise__ATN__DR EQU CYREG_PRT2_DR\r
-SCSI_Noise__ATN__INP_DIS EQU CYREG_PRT2_INP_DIS\r
-SCSI_Noise__ATN__INTTYPE EQU CYREG_PICU2_INTTYPE0\r
-SCSI_Noise__ATN__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
-SCSI_Noise__ATN__LCD_EN EQU CYREG_PRT2_LCD_EN\r
-SCSI_Noise__ATN__MASK EQU 0x01\r
-SCSI_Noise__ATN__PC EQU CYREG_PRT2_PC0\r
-SCSI_Noise__ATN__PORT EQU 2\r
-SCSI_Noise__ATN__PRT EQU CYREG_PRT2_PRT\r
-SCSI_Noise__ATN__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
-SCSI_Noise__ATN__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
-SCSI_Noise__ATN__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
-SCSI_Noise__ATN__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
-SCSI_Noise__ATN__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
-SCSI_Noise__ATN__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
-SCSI_Noise__ATN__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
-SCSI_Noise__ATN__PS EQU CYREG_PRT2_PS\r
-SCSI_Noise__ATN__SHIFT EQU 0\r
-SCSI_Noise__ATN__SLW EQU CYREG_PRT2_SLW\r
-SCSI_Noise__BSY__AG EQU CYREG_PRT6_AG\r
-SCSI_Noise__BSY__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Noise__BSY__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Noise__BSY__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Noise__BSY__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Noise__BSY__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Noise__BSY__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Noise__BSY__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Noise__BSY__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Noise__BSY__DR EQU CYREG_PRT6_DR\r
-SCSI_Noise__BSY__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Noise__BSY__INTTYPE EQU CYREG_PICU6_INTTYPE3\r
-SCSI_Noise__BSY__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Noise__BSY__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Noise__BSY__MASK EQU 0x08\r
-SCSI_Noise__BSY__PC EQU CYREG_PRT6_PC3\r
-SCSI_Noise__BSY__PORT EQU 6\r
-SCSI_Noise__BSY__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Noise__BSY__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Noise__BSY__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Noise__BSY__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Noise__BSY__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Noise__BSY__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Noise__BSY__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Noise__BSY__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Noise__BSY__PS EQU CYREG_PRT6_PS\r
-SCSI_Noise__BSY__SHIFT EQU 3\r
-SCSI_Noise__BSY__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Noise__RST__AG EQU CYREG_PRT4_AG\r
-SCSI_Noise__RST__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Noise__RST__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Noise__RST__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Noise__RST__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Noise__RST__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Noise__RST__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Noise__RST__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Noise__RST__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Noise__RST__DR EQU CYREG_PRT4_DR\r
-SCSI_Noise__RST__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Noise__RST__INTTYPE EQU CYREG_PICU4_INTTYPE7\r
-SCSI_Noise__RST__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Noise__RST__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Noise__RST__MASK EQU 0x80\r
-SCSI_Noise__RST__PC EQU CYREG_PRT4_PC7\r
-SCSI_Noise__RST__PORT EQU 4\r
-SCSI_Noise__RST__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Noise__RST__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Noise__RST__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Noise__RST__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Noise__RST__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Noise__RST__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Noise__RST__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Noise__RST__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Noise__RST__PS EQU CYREG_PRT4_PS\r
-SCSI_Noise__RST__SHIFT EQU 7\r
-SCSI_Noise__RST__SLW EQU CYREG_PRT4_SLW\r
-SCSI_Noise__SEL__AG EQU CYREG_PRT4_AG\r
-SCSI_Noise__SEL__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Noise__SEL__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Noise__SEL__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Noise__SEL__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Noise__SEL__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Noise__SEL__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Noise__SEL__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Noise__SEL__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Noise__SEL__DR EQU CYREG_PRT4_DR\r
-SCSI_Noise__SEL__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Noise__SEL__INTTYPE EQU CYREG_PICU4_INTTYPE3\r
-SCSI_Noise__SEL__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Noise__SEL__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Noise__SEL__MASK EQU 0x08\r
-SCSI_Noise__SEL__PC EQU CYREG_PRT4_PC3\r
-SCSI_Noise__SEL__PORT EQU 4\r
-SCSI_Noise__SEL__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Noise__SEL__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Noise__SEL__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Noise__SEL__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Noise__SEL__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Noise__SEL__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Noise__SEL__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Noise__SEL__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Noise__SEL__PS EQU CYREG_PRT4_PS\r
-SCSI_Noise__SEL__SHIFT EQU 3\r
-SCSI_Noise__SEL__SLW EQU CYREG_PRT4_SLW\r
-\r
-/* SCSI_Out */\r
-SCSI_Out__0__AG EQU CYREG_PRT15_AG\r
-SCSI_Out__0__AMUX EQU CYREG_PRT15_AMUX\r
-SCSI_Out__0__BIE EQU CYREG_PRT15_BIE\r
-SCSI_Out__0__BIT_MASK EQU CYREG_PRT15_BIT_MASK\r
-SCSI_Out__0__BYP EQU CYREG_PRT15_BYP\r
-SCSI_Out__0__CTL EQU CYREG_PRT15_CTL\r
-SCSI_Out__0__DM0 EQU CYREG_PRT15_DM0\r
-SCSI_Out__0__DM1 EQU CYREG_PRT15_DM1\r
-SCSI_Out__0__DM2 EQU CYREG_PRT15_DM2\r
-SCSI_Out__0__DR EQU CYREG_PRT15_DR\r
-SCSI_Out__0__INP_DIS EQU CYREG_PRT15_INP_DIS\r
-SCSI_Out__0__INTTYPE EQU CYREG_PICU15_INTTYPE5\r
-SCSI_Out__0__LCD_COM_SEG EQU CYREG_PRT15_LCD_COM_SEG\r
-SCSI_Out__0__LCD_EN EQU CYREG_PRT15_LCD_EN\r
-SCSI_Out__0__MASK EQU 0x20\r
-SCSI_Out__0__PC EQU CYREG_IO_PC_PRT15_PC5\r
-SCSI_Out__0__PORT EQU 15\r
-SCSI_Out__0__PRT EQU CYREG_PRT15_PRT\r
-SCSI_Out__0__PRTDSI__CAPS_SEL EQU CYREG_PRT15_CAPS_SEL\r
-SCSI_Out__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT15_DBL_SYNC_IN\r
-SCSI_Out__0__PRTDSI__OE_SEL0 EQU CYREG_PRT15_OE_SEL0\r
-SCSI_Out__0__PRTDSI__OE_SEL1 EQU CYREG_PRT15_OE_SEL1\r
-SCSI_Out__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT15_OUT_SEL0\r
-SCSI_Out__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT15_OUT_SEL1\r
-SCSI_Out__0__PRTDSI__SYNC_OUT EQU CYREG_PRT15_SYNC_OUT\r
-SCSI_Out__0__PS EQU CYREG_PRT15_PS\r
-SCSI_Out__0__SHIFT EQU 5\r
-SCSI_Out__0__SLW EQU CYREG_PRT15_SLW\r
-SCSI_Out__1__AG EQU CYREG_PRT15_AG\r
-SCSI_Out__1__AMUX EQU CYREG_PRT15_AMUX\r
-SCSI_Out__1__BIE EQU CYREG_PRT15_BIE\r
-SCSI_Out__1__BIT_MASK EQU CYREG_PRT15_BIT_MASK\r
-SCSI_Out__1__BYP EQU CYREG_PRT15_BYP\r
-SCSI_Out__1__CTL EQU CYREG_PRT15_CTL\r
-SCSI_Out__1__DM0 EQU CYREG_PRT15_DM0\r
-SCSI_Out__1__DM1 EQU CYREG_PRT15_DM1\r
-SCSI_Out__1__DM2 EQU CYREG_PRT15_DM2\r
-SCSI_Out__1__DR EQU CYREG_PRT15_DR\r
-SCSI_Out__1__INP_DIS EQU CYREG_PRT15_INP_DIS\r
-SCSI_Out__1__INTTYPE EQU CYREG_PICU15_INTTYPE4\r
-SCSI_Out__1__LCD_COM_SEG EQU CYREG_PRT15_LCD_COM_SEG\r
-SCSI_Out__1__LCD_EN EQU CYREG_PRT15_LCD_EN\r
-SCSI_Out__1__MASK EQU 0x10\r
-SCSI_Out__1__PC EQU CYREG_IO_PC_PRT15_PC4\r
-SCSI_Out__1__PORT EQU 15\r
-SCSI_Out__1__PRT EQU CYREG_PRT15_PRT\r
-SCSI_Out__1__PRTDSI__CAPS_SEL EQU CYREG_PRT15_CAPS_SEL\r
-SCSI_Out__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT15_DBL_SYNC_IN\r
-SCSI_Out__1__PRTDSI__OE_SEL0 EQU CYREG_PRT15_OE_SEL0\r
-SCSI_Out__1__PRTDSI__OE_SEL1 EQU CYREG_PRT15_OE_SEL1\r
-SCSI_Out__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT15_OUT_SEL0\r
-SCSI_Out__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT15_OUT_SEL1\r
-SCSI_Out__1__PRTDSI__SYNC_OUT EQU CYREG_PRT15_SYNC_OUT\r
-SCSI_Out__1__PS EQU CYREG_PRT15_PS\r
-SCSI_Out__1__SHIFT EQU 4\r
-SCSI_Out__1__SLW EQU CYREG_PRT15_SLW\r
-SCSI_Out__2__AG EQU CYREG_PRT6_AG\r
-SCSI_Out__2__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Out__2__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Out__2__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Out__2__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Out__2__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Out__2__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Out__2__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Out__2__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Out__2__DR EQU CYREG_PRT6_DR\r
-SCSI_Out__2__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Out__2__INTTYPE EQU CYREG_PICU6_INTTYPE1\r
-SCSI_Out__2__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Out__2__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Out__2__MASK EQU 0x02\r
-SCSI_Out__2__PC EQU CYREG_PRT6_PC1\r
-SCSI_Out__2__PORT EQU 6\r
-SCSI_Out__2__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Out__2__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Out__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Out__2__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Out__2__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Out__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Out__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Out__2__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Out__2__PS EQU CYREG_PRT6_PS\r
-SCSI_Out__2__SHIFT EQU 1\r
-SCSI_Out__2__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Out__3__AG EQU CYREG_PRT6_AG\r
-SCSI_Out__3__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Out__3__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Out__3__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Out__3__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Out__3__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Out__3__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Out__3__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Out__3__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Out__3__DR EQU CYREG_PRT6_DR\r
-SCSI_Out__3__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Out__3__INTTYPE EQU CYREG_PICU6_INTTYPE0\r
-SCSI_Out__3__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Out__3__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Out__3__MASK EQU 0x01\r
-SCSI_Out__3__PC EQU CYREG_PRT6_PC0\r
-SCSI_Out__3__PORT EQU 6\r
-SCSI_Out__3__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Out__3__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Out__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Out__3__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Out__3__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Out__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Out__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Out__3__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Out__3__PS EQU CYREG_PRT6_PS\r
-SCSI_Out__3__SHIFT EQU 0\r
-SCSI_Out__3__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Out__4__AG EQU CYREG_PRT4_AG\r
-SCSI_Out__4__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Out__4__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Out__4__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Out__4__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Out__4__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Out__4__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Out__4__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Out__4__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Out__4__DR EQU CYREG_PRT4_DR\r
-SCSI_Out__4__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Out__4__INTTYPE EQU CYREG_PICU4_INTTYPE5\r
-SCSI_Out__4__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Out__4__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Out__4__MASK EQU 0x20\r
-SCSI_Out__4__PC EQU CYREG_PRT4_PC5\r
-SCSI_Out__4__PORT EQU 4\r
-SCSI_Out__4__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Out__4__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Out__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Out__4__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Out__4__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Out__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Out__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Out__4__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Out__4__PS EQU CYREG_PRT4_PS\r
-SCSI_Out__4__SHIFT EQU 5\r
-SCSI_Out__4__SLW EQU CYREG_PRT4_SLW\r
-SCSI_Out__5__AG EQU CYREG_PRT4_AG\r
-SCSI_Out__5__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Out__5__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Out__5__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Out__5__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Out__5__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Out__5__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Out__5__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Out__5__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Out__5__DR EQU CYREG_PRT4_DR\r
-SCSI_Out__5__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Out__5__INTTYPE EQU CYREG_PICU4_INTTYPE4\r
-SCSI_Out__5__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Out__5__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Out__5__MASK EQU 0x10\r
-SCSI_Out__5__PC EQU CYREG_PRT4_PC4\r
-SCSI_Out__5__PORT EQU 4\r
-SCSI_Out__5__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Out__5__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Out__5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Out__5__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Out__5__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Out__5__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Out__5__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Out__5__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Out__5__PS EQU CYREG_PRT4_PS\r
-SCSI_Out__5__SHIFT EQU 4\r
-SCSI_Out__5__SLW EQU CYREG_PRT4_SLW\r
-SCSI_Out__6__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__6__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__6__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__6__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__6__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__6__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__6__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__6__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__6__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__6__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__6__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__6__INTTYPE EQU CYREG_PICU0_INTTYPE7\r
-SCSI_Out__6__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__6__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__6__MASK EQU 0x80\r
-SCSI_Out__6__PC EQU CYREG_PRT0_PC7\r
-SCSI_Out__6__PORT EQU 0\r
-SCSI_Out__6__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__6__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__6__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__6__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__6__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__6__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__6__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__6__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__6__SHIFT EQU 7\r
-SCSI_Out__6__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__7__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__7__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__7__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__7__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__7__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__7__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__7__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__7__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__7__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__7__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__7__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__7__INTTYPE EQU CYREG_PICU0_INTTYPE6\r
-SCSI_Out__7__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__7__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__7__MASK EQU 0x40\r
-SCSI_Out__7__PC EQU CYREG_PRT0_PC6\r
-SCSI_Out__7__PORT EQU 0\r
-SCSI_Out__7__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__7__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__7__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__7__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__7__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__7__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__7__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__7__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__7__SHIFT EQU 6\r
-SCSI_Out__7__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__8__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__8__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__8__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__8__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__8__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__8__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__8__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__8__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__8__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__8__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__8__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__8__INTTYPE EQU CYREG_PICU0_INTTYPE3\r
-SCSI_Out__8__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__8__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__8__MASK EQU 0x08\r
-SCSI_Out__8__PC EQU CYREG_PRT0_PC3\r
-SCSI_Out__8__PORT EQU 0\r
-SCSI_Out__8__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__8__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__8__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__8__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__8__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__8__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__8__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__8__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__8__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__8__SHIFT EQU 3\r
-SCSI_Out__8__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__9__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__9__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__9__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__9__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__9__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__9__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__9__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__9__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__9__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__9__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__9__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__9__INTTYPE EQU CYREG_PICU0_INTTYPE2\r
-SCSI_Out__9__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__9__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__9__MASK EQU 0x04\r
-SCSI_Out__9__PC EQU CYREG_PRT0_PC2\r
-SCSI_Out__9__PORT EQU 0\r
-SCSI_Out__9__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__9__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__9__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__9__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__9__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__9__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__9__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__9__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__9__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__9__SHIFT EQU 2\r
-SCSI_Out__9__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__ACK__AG EQU CYREG_PRT6_AG\r
-SCSI_Out__ACK__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Out__ACK__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Out__ACK__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Out__ACK__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Out__ACK__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Out__ACK__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Out__ACK__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Out__ACK__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Out__ACK__DR EQU CYREG_PRT6_DR\r
-SCSI_Out__ACK__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Out__ACK__INTTYPE EQU CYREG_PICU6_INTTYPE0\r
-SCSI_Out__ACK__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Out__ACK__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Out__ACK__MASK EQU 0x01\r
-SCSI_Out__ACK__PC EQU CYREG_PRT6_PC0\r
-SCSI_Out__ACK__PORT EQU 6\r
-SCSI_Out__ACK__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Out__ACK__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Out__ACK__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Out__ACK__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Out__ACK__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Out__ACK__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Out__ACK__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Out__ACK__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Out__ACK__PS EQU CYREG_PRT6_PS\r
-SCSI_Out__ACK__SHIFT EQU 0\r
-SCSI_Out__ACK__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Out__ATN__AG EQU CYREG_PRT15_AG\r
-SCSI_Out__ATN__AMUX EQU CYREG_PRT15_AMUX\r
-SCSI_Out__ATN__BIE EQU CYREG_PRT15_BIE\r
-SCSI_Out__ATN__BIT_MASK EQU CYREG_PRT15_BIT_MASK\r
-SCSI_Out__ATN__BYP EQU CYREG_PRT15_BYP\r
-SCSI_Out__ATN__CTL EQU CYREG_PRT15_CTL\r
-SCSI_Out__ATN__DM0 EQU CYREG_PRT15_DM0\r
-SCSI_Out__ATN__DM1 EQU CYREG_PRT15_DM1\r
-SCSI_Out__ATN__DM2 EQU CYREG_PRT15_DM2\r
-SCSI_Out__ATN__DR EQU CYREG_PRT15_DR\r
-SCSI_Out__ATN__INP_DIS EQU CYREG_PRT15_INP_DIS\r
-SCSI_Out__ATN__INTTYPE EQU CYREG_PICU15_INTTYPE4\r
-SCSI_Out__ATN__LCD_COM_SEG EQU CYREG_PRT15_LCD_COM_SEG\r
-SCSI_Out__ATN__LCD_EN EQU CYREG_PRT15_LCD_EN\r
-SCSI_Out__ATN__MASK EQU 0x10\r
-SCSI_Out__ATN__PC EQU CYREG_IO_PC_PRT15_PC4\r
-SCSI_Out__ATN__PORT EQU 15\r
-SCSI_Out__ATN__PRT EQU CYREG_PRT15_PRT\r
-SCSI_Out__ATN__PRTDSI__CAPS_SEL EQU CYREG_PRT15_CAPS_SEL\r
-SCSI_Out__ATN__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT15_DBL_SYNC_IN\r
-SCSI_Out__ATN__PRTDSI__OE_SEL0 EQU CYREG_PRT15_OE_SEL0\r
-SCSI_Out__ATN__PRTDSI__OE_SEL1 EQU CYREG_PRT15_OE_SEL1\r
-SCSI_Out__ATN__PRTDSI__OUT_SEL0 EQU CYREG_PRT15_OUT_SEL0\r
-SCSI_Out__ATN__PRTDSI__OUT_SEL1 EQU CYREG_PRT15_OUT_SEL1\r
-SCSI_Out__ATN__PRTDSI__SYNC_OUT EQU CYREG_PRT15_SYNC_OUT\r
-SCSI_Out__ATN__PS EQU CYREG_PRT15_PS\r
-SCSI_Out__ATN__SHIFT EQU 4\r
-SCSI_Out__ATN__SLW EQU CYREG_PRT15_SLW\r
-SCSI_Out__BSY__AG EQU CYREG_PRT6_AG\r
-SCSI_Out__BSY__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Out__BSY__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Out__BSY__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Out__BSY__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Out__BSY__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Out__BSY__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Out__BSY__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Out__BSY__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Out__BSY__DR EQU CYREG_PRT6_DR\r
-SCSI_Out__BSY__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Out__BSY__INTTYPE EQU CYREG_PICU6_INTTYPE1\r
-SCSI_Out__BSY__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Out__BSY__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Out__BSY__MASK EQU 0x02\r
-SCSI_Out__BSY__PC EQU CYREG_PRT6_PC1\r
-SCSI_Out__BSY__PORT EQU 6\r
-SCSI_Out__BSY__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Out__BSY__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Out__BSY__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Out__BSY__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Out__BSY__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Out__BSY__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Out__BSY__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Out__BSY__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Out__BSY__PS EQU CYREG_PRT6_PS\r
-SCSI_Out__BSY__SHIFT EQU 1\r
-SCSI_Out__BSY__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Out__CD_raw__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__CD_raw__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__CD_raw__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__CD_raw__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__CD_raw__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__CD_raw__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__CD_raw__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__CD_raw__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__CD_raw__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__CD_raw__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__CD_raw__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__CD_raw__INTTYPE EQU CYREG_PICU0_INTTYPE6\r
-SCSI_Out__CD_raw__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__CD_raw__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__CD_raw__MASK EQU 0x40\r
-SCSI_Out__CD_raw__PC EQU CYREG_PRT0_PC6\r
-SCSI_Out__CD_raw__PORT EQU 0\r
-SCSI_Out__CD_raw__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__CD_raw__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__CD_raw__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__CD_raw__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__CD_raw__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__CD_raw__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__CD_raw__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__CD_raw__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__CD_raw__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__CD_raw__SHIFT EQU 6\r
-SCSI_Out__CD_raw__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__DBP_raw__AG EQU CYREG_PRT15_AG\r
-SCSI_Out__DBP_raw__AMUX EQU CYREG_PRT15_AMUX\r
-SCSI_Out__DBP_raw__BIE EQU CYREG_PRT15_BIE\r
-SCSI_Out__DBP_raw__BIT_MASK EQU CYREG_PRT15_BIT_MASK\r
-SCSI_Out__DBP_raw__BYP EQU CYREG_PRT15_BYP\r
-SCSI_Out__DBP_raw__CTL EQU CYREG_PRT15_CTL\r
-SCSI_Out__DBP_raw__DM0 EQU CYREG_PRT15_DM0\r
-SCSI_Out__DBP_raw__DM1 EQU CYREG_PRT15_DM1\r
-SCSI_Out__DBP_raw__DM2 EQU CYREG_PRT15_DM2\r
-SCSI_Out__DBP_raw__DR EQU CYREG_PRT15_DR\r
-SCSI_Out__DBP_raw__INP_DIS EQU CYREG_PRT15_INP_DIS\r
-SCSI_Out__DBP_raw__INTTYPE EQU CYREG_PICU15_INTTYPE5\r
-SCSI_Out__DBP_raw__LCD_COM_SEG EQU CYREG_PRT15_LCD_COM_SEG\r
-SCSI_Out__DBP_raw__LCD_EN EQU CYREG_PRT15_LCD_EN\r
-SCSI_Out__DBP_raw__MASK EQU 0x20\r
-SCSI_Out__DBP_raw__PC EQU CYREG_IO_PC_PRT15_PC5\r
-SCSI_Out__DBP_raw__PORT EQU 15\r
-SCSI_Out__DBP_raw__PRT EQU CYREG_PRT15_PRT\r
-SCSI_Out__DBP_raw__PRTDSI__CAPS_SEL EQU CYREG_PRT15_CAPS_SEL\r
-SCSI_Out__DBP_raw__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT15_DBL_SYNC_IN\r
-SCSI_Out__DBP_raw__PRTDSI__OE_SEL0 EQU CYREG_PRT15_OE_SEL0\r
-SCSI_Out__DBP_raw__PRTDSI__OE_SEL1 EQU CYREG_PRT15_OE_SEL1\r
-SCSI_Out__DBP_raw__PRTDSI__OUT_SEL0 EQU CYREG_PRT15_OUT_SEL0\r
-SCSI_Out__DBP_raw__PRTDSI__OUT_SEL1 EQU CYREG_PRT15_OUT_SEL1\r
-SCSI_Out__DBP_raw__PRTDSI__SYNC_OUT EQU CYREG_PRT15_SYNC_OUT\r
-SCSI_Out__DBP_raw__PS EQU CYREG_PRT15_PS\r
-SCSI_Out__DBP_raw__SHIFT EQU 5\r
-SCSI_Out__DBP_raw__SLW EQU CYREG_PRT15_SLW\r
-SCSI_Out__IO_raw__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__IO_raw__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__IO_raw__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__IO_raw__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__IO_raw__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__IO_raw__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__IO_raw__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__IO_raw__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__IO_raw__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__IO_raw__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__IO_raw__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__IO_raw__INTTYPE EQU CYREG_PICU0_INTTYPE2\r
-SCSI_Out__IO_raw__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__IO_raw__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__IO_raw__MASK EQU 0x04\r
-SCSI_Out__IO_raw__PC EQU CYREG_PRT0_PC2\r
-SCSI_Out__IO_raw__PORT EQU 0\r
-SCSI_Out__IO_raw__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__IO_raw__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__IO_raw__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__IO_raw__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__IO_raw__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__IO_raw__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__IO_raw__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__IO_raw__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__IO_raw__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__IO_raw__SHIFT EQU 2\r
-SCSI_Out__IO_raw__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__MSG_raw__AG EQU CYREG_PRT4_AG\r
-SCSI_Out__MSG_raw__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Out__MSG_raw__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Out__MSG_raw__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Out__MSG_raw__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Out__MSG_raw__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Out__MSG_raw__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Out__MSG_raw__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Out__MSG_raw__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Out__MSG_raw__DR EQU CYREG_PRT4_DR\r
-SCSI_Out__MSG_raw__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Out__MSG_raw__INTTYPE EQU CYREG_PICU4_INTTYPE4\r
-SCSI_Out__MSG_raw__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Out__MSG_raw__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Out__MSG_raw__MASK EQU 0x10\r
-SCSI_Out__MSG_raw__PC EQU CYREG_PRT4_PC4\r
-SCSI_Out__MSG_raw__PORT EQU 4\r
-SCSI_Out__MSG_raw__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Out__MSG_raw__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Out__MSG_raw__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Out__MSG_raw__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Out__MSG_raw__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Out__MSG_raw__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Out__MSG_raw__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Out__MSG_raw__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Out__MSG_raw__PS EQU CYREG_PRT4_PS\r
-SCSI_Out__MSG_raw__SHIFT EQU 4\r
-SCSI_Out__MSG_raw__SLW EQU CYREG_PRT4_SLW\r
-SCSI_Out__REQ__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__REQ__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__REQ__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__REQ__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__REQ__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__REQ__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__REQ__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__REQ__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__REQ__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__REQ__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__REQ__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__REQ__INTTYPE EQU CYREG_PICU0_INTTYPE3\r
-SCSI_Out__REQ__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__REQ__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__REQ__MASK EQU 0x08\r
-SCSI_Out__REQ__PC EQU CYREG_PRT0_PC3\r
-SCSI_Out__REQ__PORT EQU 0\r
-SCSI_Out__REQ__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__REQ__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__REQ__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__REQ__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__REQ__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__REQ__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__REQ__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__REQ__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__REQ__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__REQ__SHIFT EQU 3\r
-SCSI_Out__REQ__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__RST__AG EQU CYREG_PRT4_AG\r
-SCSI_Out__RST__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Out__RST__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Out__RST__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Out__RST__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Out__RST__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Out__RST__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Out__RST__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Out__RST__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Out__RST__DR EQU CYREG_PRT4_DR\r
-SCSI_Out__RST__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Out__RST__INTTYPE EQU CYREG_PICU4_INTTYPE5\r
-SCSI_Out__RST__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Out__RST__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Out__RST__MASK EQU 0x20\r
-SCSI_Out__RST__PC EQU CYREG_PRT4_PC5\r
-SCSI_Out__RST__PORT EQU 4\r
-SCSI_Out__RST__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Out__RST__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Out__RST__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Out__RST__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Out__RST__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Out__RST__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Out__RST__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Out__RST__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Out__RST__PS EQU CYREG_PRT4_PS\r
-SCSI_Out__RST__SHIFT EQU 5\r
-SCSI_Out__RST__SLW EQU CYREG_PRT4_SLW\r
-SCSI_Out__SEL__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__SEL__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__SEL__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__SEL__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__SEL__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__SEL__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__SEL__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__SEL__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__SEL__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__SEL__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__SEL__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__SEL__INTTYPE EQU CYREG_PICU0_INTTYPE7\r
-SCSI_Out__SEL__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__SEL__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__SEL__MASK EQU 0x80\r
-SCSI_Out__SEL__PC EQU CYREG_PRT0_PC7\r
-SCSI_Out__SEL__PORT EQU 0\r
-SCSI_Out__SEL__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__SEL__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__SEL__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__SEL__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__SEL__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__SEL__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__SEL__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__SEL__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__SEL__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__SEL__SHIFT EQU 7\r
-SCSI_Out__SEL__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out_Bits_Sync_ctrl_reg__0__MASK EQU 0x01\r
-SCSI_Out_Bits_Sync_ctrl_reg__0__POS EQU 0\r
-SCSI_Out_Bits_Sync_ctrl_reg__1__MASK EQU 0x02\r
-SCSI_Out_Bits_Sync_ctrl_reg__1__POS EQU 1\r
-SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB14_15_ACTL\r
-SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB14_15_CTL\r
-SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB14_15_CTL\r
-SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB14_15_CTL\r
-SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB14_15_CTL\r
-SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB14_15_MSK\r
-SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB14_15_MSK\r
-SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB14_15_MSK\r
-SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB14_15_MSK\r
-SCSI_Out_Bits_Sync_ctrl_reg__2__MASK EQU 0x04\r
-SCSI_Out_Bits_Sync_ctrl_reg__2__POS EQU 2\r
-SCSI_Out_Bits_Sync_ctrl_reg__3__MASK EQU 0x08\r
-SCSI_Out_Bits_Sync_ctrl_reg__3__POS EQU 3\r
-SCSI_Out_Bits_Sync_ctrl_reg__4__MASK EQU 0x10\r
-SCSI_Out_Bits_Sync_ctrl_reg__4__POS EQU 4\r
-SCSI_Out_Bits_Sync_ctrl_reg__5__MASK EQU 0x20\r
-SCSI_Out_Bits_Sync_ctrl_reg__5__POS EQU 5\r
-SCSI_Out_Bits_Sync_ctrl_reg__6__MASK EQU 0x40\r
-SCSI_Out_Bits_Sync_ctrl_reg__6__POS EQU 6\r
-SCSI_Out_Bits_Sync_ctrl_reg__7__MASK EQU 0x80\r
-SCSI_Out_Bits_Sync_ctrl_reg__7__POS EQU 7\r
-SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB14_ACTL\r
-SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB14_CTL\r
-SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB14_ST_CTL\r
-SCSI_Out_Bits_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB14_CTL\r
-SCSI_Out_Bits_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB14_ST_CTL\r
-SCSI_Out_Bits_Sync_ctrl_reg__MASK EQU 0xFF\r
-SCSI_Out_Bits_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB14_MSK_ACTL\r
-SCSI_Out_Bits_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB14_MSK_ACTL\r
-SCSI_Out_Bits_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB14_MSK\r
-SCSI_Out_Ctl_Sync_ctrl_reg__0__MASK EQU 0x01\r
-SCSI_Out_Ctl_Sync_ctrl_reg__0__POS EQU 0\r
-SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB12_13_ACTL\r
-SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB12_13_CTL\r
-SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB12_13_CTL\r
-SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB12_13_CTL\r
-SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB12_13_CTL\r
-SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB12_13_MSK\r
-SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB12_13_MSK\r
-SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB12_13_MSK\r
-SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB12_13_MSK\r
-SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB12_ACTL\r
-SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB12_CTL\r
-SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB12_ST_CTL\r
-SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB12_CTL\r
-SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB12_ST_CTL\r
-SCSI_Out_Ctl_Sync_ctrl_reg__MASK EQU 0x01\r
-SCSI_Out_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB12_MSK_ACTL\r
-SCSI_Out_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB12_MSK_ACTL\r
-SCSI_Out_Ctl_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB12_MSK\r
-SCSI_Out_DBx__0__AG EQU CYREG_PRT5_AG\r
-SCSI_Out_DBx__0__AMUX EQU CYREG_PRT5_AMUX\r
-SCSI_Out_DBx__0__BIE EQU CYREG_PRT5_BIE\r
-SCSI_Out_DBx__0__BIT_MASK EQU CYREG_PRT5_BIT_MASK\r
-SCSI_Out_DBx__0__BYP EQU CYREG_PRT5_BYP\r
-SCSI_Out_DBx__0__CTL EQU CYREG_PRT5_CTL\r
-SCSI_Out_DBx__0__DM0 EQU CYREG_PRT5_DM0\r
-SCSI_Out_DBx__0__DM1 EQU CYREG_PRT5_DM1\r
-SCSI_Out_DBx__0__DM2 EQU CYREG_PRT5_DM2\r
-SCSI_Out_DBx__0__DR EQU CYREG_PRT5_DR\r
-SCSI_Out_DBx__0__INP_DIS EQU CYREG_PRT5_INP_DIS\r
-SCSI_Out_DBx__0__INTTYPE EQU CYREG_PICU5_INTTYPE1\r
-SCSI_Out_DBx__0__LCD_COM_SEG EQU CYREG_PRT5_LCD_COM_SEG\r
-SCSI_Out_DBx__0__LCD_EN EQU CYREG_PRT5_LCD_EN\r
-SCSI_Out_DBx__0__MASK EQU 0x02\r
-SCSI_Out_DBx__0__PC EQU CYREG_PRT5_PC1\r
-SCSI_Out_DBx__0__PORT EQU 5\r
-SCSI_Out_DBx__0__PRT EQU CYREG_PRT5_PRT\r
-SCSI_Out_DBx__0__PRTDSI__CAPS_SEL EQU CYREG_PRT5_CAPS_SEL\r
-SCSI_Out_DBx__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT5_DBL_SYNC_IN\r
-SCSI_Out_DBx__0__PRTDSI__OE_SEL0 EQU CYREG_PRT5_OE_SEL0\r
-SCSI_Out_DBx__0__PRTDSI__OE_SEL1 EQU CYREG_PRT5_OE_SEL1\r
-SCSI_Out_DBx__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT5_OUT_SEL0\r
-SCSI_Out_DBx__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT5_OUT_SEL1\r
-SCSI_Out_DBx__0__PRTDSI__SYNC_OUT EQU CYREG_PRT5_SYNC_OUT\r
-SCSI_Out_DBx__0__PS EQU CYREG_PRT5_PS\r
-SCSI_Out_DBx__0__SHIFT EQU 1\r
-SCSI_Out_DBx__0__SLW EQU CYREG_PRT5_SLW\r
-SCSI_Out_DBx__1__AG EQU CYREG_PRT5_AG\r
-SCSI_Out_DBx__1__AMUX EQU CYREG_PRT5_AMUX\r
-SCSI_Out_DBx__1__BIE EQU CYREG_PRT5_BIE\r
-SCSI_Out_DBx__1__BIT_MASK EQU CYREG_PRT5_BIT_MASK\r
-SCSI_Out_DBx__1__BYP EQU CYREG_PRT5_BYP\r
-SCSI_Out_DBx__1__CTL EQU CYREG_PRT5_CTL\r
-SCSI_Out_DBx__1__DM0 EQU CYREG_PRT5_DM0\r
-SCSI_Out_DBx__1__DM1 EQU CYREG_PRT5_DM1\r
-SCSI_Out_DBx__1__DM2 EQU CYREG_PRT5_DM2\r
-SCSI_Out_DBx__1__DR EQU CYREG_PRT5_DR\r
-SCSI_Out_DBx__1__INP_DIS EQU CYREG_PRT5_INP_DIS\r
-SCSI_Out_DBx__1__INTTYPE EQU CYREG_PICU5_INTTYPE0\r
-SCSI_Out_DBx__1__LCD_COM_SEG EQU CYREG_PRT5_LCD_COM_SEG\r
-SCSI_Out_DBx__1__LCD_EN EQU CYREG_PRT5_LCD_EN\r
-SCSI_Out_DBx__1__MASK EQU 0x01\r
-SCSI_Out_DBx__1__PC EQU CYREG_PRT5_PC0\r
-SCSI_Out_DBx__1__PORT EQU 5\r
-SCSI_Out_DBx__1__PRT EQU CYREG_PRT5_PRT\r
-SCSI_Out_DBx__1__PRTDSI__CAPS_SEL EQU CYREG_PRT5_CAPS_SEL\r
-SCSI_Out_DBx__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT5_DBL_SYNC_IN\r
-SCSI_Out_DBx__1__PRTDSI__OE_SEL0 EQU CYREG_PRT5_OE_SEL0\r
-SCSI_Out_DBx__1__PRTDSI__OE_SEL1 EQU CYREG_PRT5_OE_SEL1\r
-SCSI_Out_DBx__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT5_OUT_SEL0\r
-SCSI_Out_DBx__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT5_OUT_SEL1\r
-SCSI_Out_DBx__1__PRTDSI__SYNC_OUT EQU CYREG_PRT5_SYNC_OUT\r
-SCSI_Out_DBx__1__PS EQU CYREG_PRT5_PS\r
-SCSI_Out_DBx__1__SHIFT EQU 0\r
-SCSI_Out_DBx__1__SLW EQU CYREG_PRT5_SLW\r
-SCSI_Out_DBx__2__AG EQU CYREG_PRT6_AG\r
-SCSI_Out_DBx__2__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Out_DBx__2__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Out_DBx__2__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Out_DBx__2__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Out_DBx__2__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Out_DBx__2__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Out_DBx__2__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Out_DBx__2__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Out_DBx__2__DR EQU CYREG_PRT6_DR\r
-SCSI_Out_DBx__2__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Out_DBx__2__INTTYPE EQU CYREG_PICU6_INTTYPE5\r
-SCSI_Out_DBx__2__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Out_DBx__2__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Out_DBx__2__MASK EQU 0x20\r
-SCSI_Out_DBx__2__PC EQU CYREG_PRT6_PC5\r
-SCSI_Out_DBx__2__PORT EQU 6\r
-SCSI_Out_DBx__2__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Out_DBx__2__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Out_DBx__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Out_DBx__2__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Out_DBx__2__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Out_DBx__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Out_DBx__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Out_DBx__2__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Out_DBx__2__PS EQU CYREG_PRT6_PS\r
-SCSI_Out_DBx__2__SHIFT EQU 5\r
-SCSI_Out_DBx__2__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Out_DBx__3__AG EQU CYREG_PRT6_AG\r
-SCSI_Out_DBx__3__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Out_DBx__3__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Out_DBx__3__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Out_DBx__3__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Out_DBx__3__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Out_DBx__3__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Out_DBx__3__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Out_DBx__3__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Out_DBx__3__DR EQU CYREG_PRT6_DR\r
-SCSI_Out_DBx__3__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Out_DBx__3__INTTYPE EQU CYREG_PICU6_INTTYPE4\r
-SCSI_Out_DBx__3__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Out_DBx__3__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Out_DBx__3__MASK EQU 0x10\r
-SCSI_Out_DBx__3__PC EQU CYREG_PRT6_PC4\r
-SCSI_Out_DBx__3__PORT EQU 6\r
-SCSI_Out_DBx__3__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Out_DBx__3__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Out_DBx__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Out_DBx__3__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Out_DBx__3__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Out_DBx__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Out_DBx__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Out_DBx__3__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Out_DBx__3__PS EQU CYREG_PRT6_PS\r
-SCSI_Out_DBx__3__SHIFT EQU 4\r
-SCSI_Out_DBx__3__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Out_DBx__4__AG EQU CYREG_PRT2_AG\r
-SCSI_Out_DBx__4__AMUX EQU CYREG_PRT2_AMUX\r
-SCSI_Out_DBx__4__BIE EQU CYREG_PRT2_BIE\r
-SCSI_Out_DBx__4__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
-SCSI_Out_DBx__4__BYP EQU CYREG_PRT2_BYP\r
-SCSI_Out_DBx__4__CTL EQU CYREG_PRT2_CTL\r
-SCSI_Out_DBx__4__DM0 EQU CYREG_PRT2_DM0\r
-SCSI_Out_DBx__4__DM1 EQU CYREG_PRT2_DM1\r
-SCSI_Out_DBx__4__DM2 EQU CYREG_PRT2_DM2\r
-SCSI_Out_DBx__4__DR EQU CYREG_PRT2_DR\r
-SCSI_Out_DBx__4__INP_DIS EQU CYREG_PRT2_INP_DIS\r
-SCSI_Out_DBx__4__INTTYPE EQU CYREG_PICU2_INTTYPE7\r
-SCSI_Out_DBx__4__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
-SCSI_Out_DBx__4__LCD_EN EQU CYREG_PRT2_LCD_EN\r
-SCSI_Out_DBx__4__MASK EQU 0x80\r
-SCSI_Out_DBx__4__PC EQU CYREG_PRT2_PC7\r
-SCSI_Out_DBx__4__PORT EQU 2\r
-SCSI_Out_DBx__4__PRT EQU CYREG_PRT2_PRT\r
-SCSI_Out_DBx__4__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
-SCSI_Out_DBx__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
-SCSI_Out_DBx__4__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
-SCSI_Out_DBx__4__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
-SCSI_Out_DBx__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
-SCSI_Out_DBx__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
-SCSI_Out_DBx__4__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
-SCSI_Out_DBx__4__PS EQU CYREG_PRT2_PS\r
-SCSI_Out_DBx__4__SHIFT EQU 7\r
-SCSI_Out_DBx__4__SLW EQU CYREG_PRT2_SLW\r
-SCSI_Out_DBx__5__AG EQU CYREG_PRT2_AG\r
-SCSI_Out_DBx__5__AMUX EQU CYREG_PRT2_AMUX\r
-SCSI_Out_DBx__5__BIE EQU CYREG_PRT2_BIE\r
-SCSI_Out_DBx__5__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
-SCSI_Out_DBx__5__BYP EQU CYREG_PRT2_BYP\r
-SCSI_Out_DBx__5__CTL EQU CYREG_PRT2_CTL\r
-SCSI_Out_DBx__5__DM0 EQU CYREG_PRT2_DM0\r
-SCSI_Out_DBx__5__DM1 EQU CYREG_PRT2_DM1\r
-SCSI_Out_DBx__5__DM2 EQU CYREG_PRT2_DM2\r
-SCSI_Out_DBx__5__DR EQU CYREG_PRT2_DR\r
-SCSI_Out_DBx__5__INP_DIS EQU CYREG_PRT2_INP_DIS\r
-SCSI_Out_DBx__5__INTTYPE EQU CYREG_PICU2_INTTYPE6\r
-SCSI_Out_DBx__5__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
-SCSI_Out_DBx__5__LCD_EN EQU CYREG_PRT2_LCD_EN\r
-SCSI_Out_DBx__5__MASK EQU 0x40\r
-SCSI_Out_DBx__5__PC EQU CYREG_PRT2_PC6\r
-SCSI_Out_DBx__5__PORT EQU 2\r
-SCSI_Out_DBx__5__PRT EQU CYREG_PRT2_PRT\r
-SCSI_Out_DBx__5__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
-SCSI_Out_DBx__5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
-SCSI_Out_DBx__5__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
-SCSI_Out_DBx__5__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
-SCSI_Out_DBx__5__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
-SCSI_Out_DBx__5__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
-SCSI_Out_DBx__5__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
-SCSI_Out_DBx__5__PS EQU CYREG_PRT2_PS\r
-SCSI_Out_DBx__5__SHIFT EQU 6\r
-SCSI_Out_DBx__5__SLW EQU CYREG_PRT2_SLW\r
-SCSI_Out_DBx__6__AG EQU CYREG_PRT2_AG\r
-SCSI_Out_DBx__6__AMUX EQU CYREG_PRT2_AMUX\r
-SCSI_Out_DBx__6__BIE EQU CYREG_PRT2_BIE\r
-SCSI_Out_DBx__6__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
-SCSI_Out_DBx__6__BYP EQU CYREG_PRT2_BYP\r
-SCSI_Out_DBx__6__CTL EQU CYREG_PRT2_CTL\r
-SCSI_Out_DBx__6__DM0 EQU CYREG_PRT2_DM0\r
-SCSI_Out_DBx__6__DM1 EQU CYREG_PRT2_DM1\r
-SCSI_Out_DBx__6__DM2 EQU CYREG_PRT2_DM2\r
-SCSI_Out_DBx__6__DR EQU CYREG_PRT2_DR\r
-SCSI_Out_DBx__6__INP_DIS EQU CYREG_PRT2_INP_DIS\r
-SCSI_Out_DBx__6__INTTYPE EQU CYREG_PICU2_INTTYPE3\r
-SCSI_Out_DBx__6__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
-SCSI_Out_DBx__6__LCD_EN EQU CYREG_PRT2_LCD_EN\r
-SCSI_Out_DBx__6__MASK EQU 0x08\r
-SCSI_Out_DBx__6__PC EQU CYREG_PRT2_PC3\r
-SCSI_Out_DBx__6__PORT EQU 2\r
-SCSI_Out_DBx__6__PRT EQU CYREG_PRT2_PRT\r
-SCSI_Out_DBx__6__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
-SCSI_Out_DBx__6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
-SCSI_Out_DBx__6__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
-SCSI_Out_DBx__6__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
-SCSI_Out_DBx__6__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
-SCSI_Out_DBx__6__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
-SCSI_Out_DBx__6__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
-SCSI_Out_DBx__6__PS EQU CYREG_PRT2_PS\r
-SCSI_Out_DBx__6__SHIFT EQU 3\r
-SCSI_Out_DBx__6__SLW EQU CYREG_PRT2_SLW\r
-SCSI_Out_DBx__7__AG EQU CYREG_PRT2_AG\r
-SCSI_Out_DBx__7__AMUX EQU CYREG_PRT2_AMUX\r
-SCSI_Out_DBx__7__BIE EQU CYREG_PRT2_BIE\r
-SCSI_Out_DBx__7__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
-SCSI_Out_DBx__7__BYP EQU CYREG_PRT2_BYP\r
-SCSI_Out_DBx__7__CTL EQU CYREG_PRT2_CTL\r
-SCSI_Out_DBx__7__DM0 EQU CYREG_PRT2_DM0\r
-SCSI_Out_DBx__7__DM1 EQU CYREG_PRT2_DM1\r
-SCSI_Out_DBx__7__DM2 EQU CYREG_PRT2_DM2\r
-SCSI_Out_DBx__7__DR EQU CYREG_PRT2_DR\r
-SCSI_Out_DBx__7__INP_DIS EQU CYREG_PRT2_INP_DIS\r
-SCSI_Out_DBx__7__INTTYPE EQU CYREG_PICU2_INTTYPE2\r
-SCSI_Out_DBx__7__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
-SCSI_Out_DBx__7__LCD_EN EQU CYREG_PRT2_LCD_EN\r
-SCSI_Out_DBx__7__MASK EQU 0x04\r
-SCSI_Out_DBx__7__PC EQU CYREG_PRT2_PC2\r
-SCSI_Out_DBx__7__PORT EQU 2\r
-SCSI_Out_DBx__7__PRT EQU CYREG_PRT2_PRT\r
-SCSI_Out_DBx__7__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
-SCSI_Out_DBx__7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
-SCSI_Out_DBx__7__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
-SCSI_Out_DBx__7__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
-SCSI_Out_DBx__7__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
-SCSI_Out_DBx__7__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
-SCSI_Out_DBx__7__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
-SCSI_Out_DBx__7__PS EQU CYREG_PRT2_PS\r
-SCSI_Out_DBx__7__SHIFT EQU 2\r
-SCSI_Out_DBx__7__SLW EQU CYREG_PRT2_SLW\r
-SCSI_Out_DBx__DB0__AG EQU CYREG_PRT5_AG\r
-SCSI_Out_DBx__DB0__AMUX EQU CYREG_PRT5_AMUX\r
-SCSI_Out_DBx__DB0__BIE EQU CYREG_PRT5_BIE\r
-SCSI_Out_DBx__DB0__BIT_MASK EQU CYREG_PRT5_BIT_MASK\r
-SCSI_Out_DBx__DB0__BYP EQU CYREG_PRT5_BYP\r
-SCSI_Out_DBx__DB0__CTL EQU CYREG_PRT5_CTL\r
-SCSI_Out_DBx__DB0__DM0 EQU CYREG_PRT5_DM0\r
-SCSI_Out_DBx__DB0__DM1 EQU CYREG_PRT5_DM1\r
-SCSI_Out_DBx__DB0__DM2 EQU CYREG_PRT5_DM2\r
-SCSI_Out_DBx__DB0__DR EQU CYREG_PRT5_DR\r
-SCSI_Out_DBx__DB0__INP_DIS EQU CYREG_PRT5_INP_DIS\r
-SCSI_Out_DBx__DB0__INTTYPE EQU CYREG_PICU5_INTTYPE1\r
-SCSI_Out_DBx__DB0__LCD_COM_SEG EQU CYREG_PRT5_LCD_COM_SEG\r
-SCSI_Out_DBx__DB0__LCD_EN EQU CYREG_PRT5_LCD_EN\r
-SCSI_Out_DBx__DB0__MASK EQU 0x02\r
-SCSI_Out_DBx__DB0__PC EQU CYREG_PRT5_PC1\r
-SCSI_Out_DBx__DB0__PORT EQU 5\r
-SCSI_Out_DBx__DB0__PRT EQU CYREG_PRT5_PRT\r
-SCSI_Out_DBx__DB0__PRTDSI__CAPS_SEL EQU CYREG_PRT5_CAPS_SEL\r
-SCSI_Out_DBx__DB0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT5_DBL_SYNC_IN\r
-SCSI_Out_DBx__DB0__PRTDSI__OE_SEL0 EQU CYREG_PRT5_OE_SEL0\r
-SCSI_Out_DBx__DB0__PRTDSI__OE_SEL1 EQU CYREG_PRT5_OE_SEL1\r
-SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL0 EQU CYREG_PRT5_OUT_SEL0\r
-SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL1 EQU CYREG_PRT5_OUT_SEL1\r
-SCSI_Out_DBx__DB0__PRTDSI__SYNC_OUT EQU CYREG_PRT5_SYNC_OUT\r
-SCSI_Out_DBx__DB0__PS EQU CYREG_PRT5_PS\r
-SCSI_Out_DBx__DB0__SHIFT EQU 1\r
-SCSI_Out_DBx__DB0__SLW EQU CYREG_PRT5_SLW\r
-SCSI_Out_DBx__DB1__AG EQU CYREG_PRT5_AG\r
-SCSI_Out_DBx__DB1__AMUX EQU CYREG_PRT5_AMUX\r
-SCSI_Out_DBx__DB1__BIE EQU CYREG_PRT5_BIE\r
-SCSI_Out_DBx__DB1__BIT_MASK EQU CYREG_PRT5_BIT_MASK\r
-SCSI_Out_DBx__DB1__BYP EQU CYREG_PRT5_BYP\r
-SCSI_Out_DBx__DB1__CTL EQU CYREG_PRT5_CTL\r
-SCSI_Out_DBx__DB1__DM0 EQU CYREG_PRT5_DM0\r
-SCSI_Out_DBx__DB1__DM1 EQU CYREG_PRT5_DM1\r
-SCSI_Out_DBx__DB1__DM2 EQU CYREG_PRT5_DM2\r
-SCSI_Out_DBx__DB1__DR EQU CYREG_PRT5_DR\r
-SCSI_Out_DBx__DB1__INP_DIS EQU CYREG_PRT5_INP_DIS\r
-SCSI_Out_DBx__DB1__INTTYPE EQU CYREG_PICU5_INTTYPE0\r
-SCSI_Out_DBx__DB1__LCD_COM_SEG EQU CYREG_PRT5_LCD_COM_SEG\r
-SCSI_Out_DBx__DB1__LCD_EN EQU CYREG_PRT5_LCD_EN\r
-SCSI_Out_DBx__DB1__MASK EQU 0x01\r
-SCSI_Out_DBx__DB1__PC EQU CYREG_PRT5_PC0\r
-SCSI_Out_DBx__DB1__PORT EQU 5\r
-SCSI_Out_DBx__DB1__PRT EQU CYREG_PRT5_PRT\r
-SCSI_Out_DBx__DB1__PRTDSI__CAPS_SEL EQU CYREG_PRT5_CAPS_SEL\r
-SCSI_Out_DBx__DB1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT5_DBL_SYNC_IN\r
-SCSI_Out_DBx__DB1__PRTDSI__OE_SEL0 EQU CYREG_PRT5_OE_SEL0\r
-SCSI_Out_DBx__DB1__PRTDSI__OE_SEL1 EQU CYREG_PRT5_OE_SEL1\r
-SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL0 EQU CYREG_PRT5_OUT_SEL0\r
-SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL1 EQU CYREG_PRT5_OUT_SEL1\r
-SCSI_Out_DBx__DB1__PRTDSI__SYNC_OUT EQU CYREG_PRT5_SYNC_OUT\r
-SCSI_Out_DBx__DB1__PS EQU CYREG_PRT5_PS\r
-SCSI_Out_DBx__DB1__SHIFT EQU 0\r
-SCSI_Out_DBx__DB1__SLW EQU CYREG_PRT5_SLW\r
-SCSI_Out_DBx__DB2__AG EQU CYREG_PRT6_AG\r
-SCSI_Out_DBx__DB2__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Out_DBx__DB2__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Out_DBx__DB2__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Out_DBx__DB2__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Out_DBx__DB2__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Out_DBx__DB2__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Out_DBx__DB2__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Out_DBx__DB2__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Out_DBx__DB2__DR EQU CYREG_PRT6_DR\r
-SCSI_Out_DBx__DB2__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Out_DBx__DB2__INTTYPE EQU CYREG_PICU6_INTTYPE5\r
-SCSI_Out_DBx__DB2__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Out_DBx__DB2__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Out_DBx__DB2__MASK EQU 0x20\r
-SCSI_Out_DBx__DB2__PC EQU CYREG_PRT6_PC5\r
-SCSI_Out_DBx__DB2__PORT EQU 6\r
-SCSI_Out_DBx__DB2__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Out_DBx__DB2__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Out_DBx__DB2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Out_DBx__DB2__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Out_DBx__DB2__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Out_DBx__DB2__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Out_DBx__DB2__PS EQU CYREG_PRT6_PS\r
-SCSI_Out_DBx__DB2__SHIFT EQU 5\r
-SCSI_Out_DBx__DB2__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Out_DBx__DB3__AG EQU CYREG_PRT6_AG\r
-SCSI_Out_DBx__DB3__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Out_DBx__DB3__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Out_DBx__DB3__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Out_DBx__DB3__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Out_DBx__DB3__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Out_DBx__DB3__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Out_DBx__DB3__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Out_DBx__DB3__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Out_DBx__DB3__DR EQU CYREG_PRT6_DR\r
-SCSI_Out_DBx__DB3__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Out_DBx__DB3__INTTYPE EQU CYREG_PICU6_INTTYPE4\r
-SCSI_Out_DBx__DB3__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Out_DBx__DB3__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Out_DBx__DB3__MASK EQU 0x10\r
-SCSI_Out_DBx__DB3__PC EQU CYREG_PRT6_PC4\r
-SCSI_Out_DBx__DB3__PORT EQU 6\r
-SCSI_Out_DBx__DB3__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Out_DBx__DB3__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Out_DBx__DB3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Out_DBx__DB3__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Out_DBx__DB3__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Out_DBx__DB3__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Out_DBx__DB3__PS EQU CYREG_PRT6_PS\r
-SCSI_Out_DBx__DB3__SHIFT EQU 4\r
-SCSI_Out_DBx__DB3__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Out_DBx__DB4__AG EQU CYREG_PRT2_AG\r
-SCSI_Out_DBx__DB4__AMUX EQU CYREG_PRT2_AMUX\r
-SCSI_Out_DBx__DB4__BIE EQU CYREG_PRT2_BIE\r
-SCSI_Out_DBx__DB4__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
-SCSI_Out_DBx__DB4__BYP EQU CYREG_PRT2_BYP\r
-SCSI_Out_DBx__DB4__CTL EQU CYREG_PRT2_CTL\r
-SCSI_Out_DBx__DB4__DM0 EQU CYREG_PRT2_DM0\r
-SCSI_Out_DBx__DB4__DM1 EQU CYREG_PRT2_DM1\r
-SCSI_Out_DBx__DB4__DM2 EQU CYREG_PRT2_DM2\r
-SCSI_Out_DBx__DB4__DR EQU CYREG_PRT2_DR\r
-SCSI_Out_DBx__DB4__INP_DIS EQU CYREG_PRT2_INP_DIS\r
-SCSI_Out_DBx__DB4__INTTYPE EQU CYREG_PICU2_INTTYPE7\r
-SCSI_Out_DBx__DB4__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
-SCSI_Out_DBx__DB4__LCD_EN EQU CYREG_PRT2_LCD_EN\r
-SCSI_Out_DBx__DB4__MASK EQU 0x80\r
-SCSI_Out_DBx__DB4__PC EQU CYREG_PRT2_PC7\r
-SCSI_Out_DBx__DB4__PORT EQU 2\r
-SCSI_Out_DBx__DB4__PRT EQU CYREG_PRT2_PRT\r
-SCSI_Out_DBx__DB4__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
-SCSI_Out_DBx__DB4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
-SCSI_Out_DBx__DB4__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
-SCSI_Out_DBx__DB4__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
-SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
-SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
-SCSI_Out_DBx__DB4__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
-SCSI_Out_DBx__DB4__PS EQU CYREG_PRT2_PS\r
-SCSI_Out_DBx__DB4__SHIFT EQU 7\r
-SCSI_Out_DBx__DB4__SLW EQU CYREG_PRT2_SLW\r
-SCSI_Out_DBx__DB5__AG EQU CYREG_PRT2_AG\r
-SCSI_Out_DBx__DB5__AMUX EQU CYREG_PRT2_AMUX\r
-SCSI_Out_DBx__DB5__BIE EQU CYREG_PRT2_BIE\r
-SCSI_Out_DBx__DB5__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
-SCSI_Out_DBx__DB5__BYP EQU CYREG_PRT2_BYP\r
-SCSI_Out_DBx__DB5__CTL EQU CYREG_PRT2_CTL\r
-SCSI_Out_DBx__DB5__DM0 EQU CYREG_PRT2_DM0\r
-SCSI_Out_DBx__DB5__DM1 EQU CYREG_PRT2_DM1\r
-SCSI_Out_DBx__DB5__DM2 EQU CYREG_PRT2_DM2\r
-SCSI_Out_DBx__DB5__DR EQU CYREG_PRT2_DR\r
-SCSI_Out_DBx__DB5__INP_DIS EQU CYREG_PRT2_INP_DIS\r
-SCSI_Out_DBx__DB5__INTTYPE EQU CYREG_PICU2_INTTYPE6\r
-SCSI_Out_DBx__DB5__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
-SCSI_Out_DBx__DB5__LCD_EN EQU CYREG_PRT2_LCD_EN\r
-SCSI_Out_DBx__DB5__MASK EQU 0x40\r
-SCSI_Out_DBx__DB5__PC EQU CYREG_PRT2_PC6\r
-SCSI_Out_DBx__DB5__PORT EQU 2\r
-SCSI_Out_DBx__DB5__PRT EQU CYREG_PRT2_PRT\r
-SCSI_Out_DBx__DB5__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
-SCSI_Out_DBx__DB5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
-SCSI_Out_DBx__DB5__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
-SCSI_Out_DBx__DB5__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
-SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
-SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
-SCSI_Out_DBx__DB5__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
-SCSI_Out_DBx__DB5__PS EQU CYREG_PRT2_PS\r
-SCSI_Out_DBx__DB5__SHIFT EQU 6\r
-SCSI_Out_DBx__DB5__SLW EQU CYREG_PRT2_SLW\r
-SCSI_Out_DBx__DB6__AG EQU CYREG_PRT2_AG\r
-SCSI_Out_DBx__DB6__AMUX EQU CYREG_PRT2_AMUX\r
-SCSI_Out_DBx__DB6__BIE EQU CYREG_PRT2_BIE\r
-SCSI_Out_DBx__DB6__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
-SCSI_Out_DBx__DB6__BYP EQU CYREG_PRT2_BYP\r
-SCSI_Out_DBx__DB6__CTL EQU CYREG_PRT2_CTL\r
-SCSI_Out_DBx__DB6__DM0 EQU CYREG_PRT2_DM0\r
-SCSI_Out_DBx__DB6__DM1 EQU CYREG_PRT2_DM1\r
-SCSI_Out_DBx__DB6__DM2 EQU CYREG_PRT2_DM2\r
-SCSI_Out_DBx__DB6__DR EQU CYREG_PRT2_DR\r
-SCSI_Out_DBx__DB6__INP_DIS EQU CYREG_PRT2_INP_DIS\r
-SCSI_Out_DBx__DB6__INTTYPE EQU CYREG_PICU2_INTTYPE3\r
-SCSI_Out_DBx__DB6__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
-SCSI_Out_DBx__DB6__LCD_EN EQU CYREG_PRT2_LCD_EN\r
-SCSI_Out_DBx__DB6__MASK EQU 0x08\r
-SCSI_Out_DBx__DB6__PC EQU CYREG_PRT2_PC3\r
-SCSI_Out_DBx__DB6__PORT EQU 2\r
-SCSI_Out_DBx__DB6__PRT EQU CYREG_PRT2_PRT\r
-SCSI_Out_DBx__DB6__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
-SCSI_Out_DBx__DB6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
-SCSI_Out_DBx__DB6__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
-SCSI_Out_DBx__DB6__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
-SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
-SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
-SCSI_Out_DBx__DB6__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
-SCSI_Out_DBx__DB6__PS EQU CYREG_PRT2_PS\r
-SCSI_Out_DBx__DB6__SHIFT EQU 3\r
-SCSI_Out_DBx__DB6__SLW EQU CYREG_PRT2_SLW\r
-SCSI_Out_DBx__DB7__AG EQU CYREG_PRT2_AG\r
-SCSI_Out_DBx__DB7__AMUX EQU CYREG_PRT2_AMUX\r
-SCSI_Out_DBx__DB7__BIE EQU CYREG_PRT2_BIE\r
-SCSI_Out_DBx__DB7__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
-SCSI_Out_DBx__DB7__BYP EQU CYREG_PRT2_BYP\r
-SCSI_Out_DBx__DB7__CTL EQU CYREG_PRT2_CTL\r
-SCSI_Out_DBx__DB7__DM0 EQU CYREG_PRT2_DM0\r
-SCSI_Out_DBx__DB7__DM1 EQU CYREG_PRT2_DM1\r
-SCSI_Out_DBx__DB7__DM2 EQU CYREG_PRT2_DM2\r
-SCSI_Out_DBx__DB7__DR EQU CYREG_PRT2_DR\r
-SCSI_Out_DBx__DB7__INP_DIS EQU CYREG_PRT2_INP_DIS\r
-SCSI_Out_DBx__DB7__INTTYPE EQU CYREG_PICU2_INTTYPE2\r
-SCSI_Out_DBx__DB7__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
-SCSI_Out_DBx__DB7__LCD_EN EQU CYREG_PRT2_LCD_EN\r
-SCSI_Out_DBx__DB7__MASK EQU 0x04\r
-SCSI_Out_DBx__DB7__PC EQU CYREG_PRT2_PC2\r
-SCSI_Out_DBx__DB7__PORT EQU 2\r
-SCSI_Out_DBx__DB7__PRT EQU CYREG_PRT2_PRT\r
-SCSI_Out_DBx__DB7__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
-SCSI_Out_DBx__DB7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
-SCSI_Out_DBx__DB7__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
-SCSI_Out_DBx__DB7__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
-SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
-SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
-SCSI_Out_DBx__DB7__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
-SCSI_Out_DBx__DB7__PS EQU CYREG_PRT2_PS\r
-SCSI_Out_DBx__DB7__SHIFT EQU 2\r
-SCSI_Out_DBx__DB7__SLW EQU CYREG_PRT2_SLW\r
-\r
-/* SCSI_Parity_Error */\r
-SCSI_Parity_Error_sts_sts_reg__0__MASK EQU 0x01\r
-SCSI_Parity_Error_sts_sts_reg__0__POS EQU 0\r
-SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB05_06_ACTL\r
-SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_REG EQU CYREG_B0_UDB05_06_ST\r
-SCSI_Parity_Error_sts_sts_reg__MASK EQU 0x01\r
-SCSI_Parity_Error_sts_sts_reg__MASK_REG EQU CYREG_B0_UDB05_MSK\r
-SCSI_Parity_Error_sts_sts_reg__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB05_ACTL\r
-SCSI_Parity_Error_sts_sts_reg__STATUS_REG EQU CYREG_B0_UDB05_ST\r
-\r
-/* SCSI_RST_ISR */\r
-SCSI_RST_ISR__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
-SCSI_RST_ISR__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
-SCSI_RST_ISR__INTC_MASK EQU 0x02\r
-SCSI_RST_ISR__INTC_NUMBER EQU 1\r
-SCSI_RST_ISR__INTC_PRIOR_NUM EQU 7\r
-SCSI_RST_ISR__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_1\r
-SCSI_RST_ISR__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
-SCSI_RST_ISR__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
-\r
-/* SCSI_RX_DMA */\r
-SCSI_RX_DMA__DRQ_CTL EQU CYREG_IDMUX_DRQ_CTL0\r
-SCSI_RX_DMA__DRQ_NUMBER EQU 0\r
-SCSI_RX_DMA__NUMBEROF_TDS EQU 0\r
-SCSI_RX_DMA__PRIORITY EQU 2\r
-SCSI_RX_DMA__TERMIN_EN EQU 0\r
-SCSI_RX_DMA__TERMIN_SEL EQU 0\r
-SCSI_RX_DMA__TERMOUT0_EN EQU 1\r
-SCSI_RX_DMA__TERMOUT0_SEL EQU 0\r
-SCSI_RX_DMA__TERMOUT1_EN EQU 0\r
-SCSI_RX_DMA__TERMOUT1_SEL EQU 0\r
-SCSI_RX_DMA_COMPLETE__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
-SCSI_RX_DMA_COMPLETE__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
-SCSI_RX_DMA_COMPLETE__INTC_MASK EQU 0x04\r
-SCSI_RX_DMA_COMPLETE__INTC_NUMBER EQU 2\r
-SCSI_RX_DMA_COMPLETE__INTC_PRIOR_NUM EQU 7\r
-SCSI_RX_DMA_COMPLETE__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_2\r
-SCSI_RX_DMA_COMPLETE__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
-SCSI_RX_DMA_COMPLETE__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
-\r
-/* SCSI_SEL_ISR */\r
-SCSI_SEL_ISR__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
-SCSI_SEL_ISR__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
-SCSI_SEL_ISR__INTC_MASK EQU 0x08\r
-SCSI_SEL_ISR__INTC_NUMBER EQU 3\r
-SCSI_SEL_ISR__INTC_PRIOR_NUM EQU 7\r
-SCSI_SEL_ISR__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_3\r
-SCSI_SEL_ISR__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
-SCSI_SEL_ISR__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
-\r
-/* SCSI_TX_DMA */\r
-SCSI_TX_DMA__DRQ_CTL EQU CYREG_IDMUX_DRQ_CTL0\r
-SCSI_TX_DMA__DRQ_NUMBER EQU 1\r
-SCSI_TX_DMA__NUMBEROF_TDS EQU 0\r
-SCSI_TX_DMA__PRIORITY EQU 2\r
-SCSI_TX_DMA__TERMIN_EN EQU 0\r
-SCSI_TX_DMA__TERMIN_SEL EQU 0\r
-SCSI_TX_DMA__TERMOUT0_EN EQU 1\r
-SCSI_TX_DMA__TERMOUT0_SEL EQU 1\r
-SCSI_TX_DMA__TERMOUT1_EN EQU 0\r
-SCSI_TX_DMA__TERMOUT1_SEL EQU 0\r
-SCSI_TX_DMA_COMPLETE__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
-SCSI_TX_DMA_COMPLETE__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
-SCSI_TX_DMA_COMPLETE__INTC_MASK EQU 0x10\r
-SCSI_TX_DMA_COMPLETE__INTC_NUMBER EQU 4\r
-SCSI_TX_DMA_COMPLETE__INTC_PRIOR_NUM EQU 7\r
-SCSI_TX_DMA_COMPLETE__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_4\r
-SCSI_TX_DMA_COMPLETE__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
-SCSI_TX_DMA_COMPLETE__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
-\r
-/* SDCard_BSPIM */\r
-SDCard_BSPIM_BitCounter__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B1_UDB05_06_ACTL\r
-SDCard_BSPIM_BitCounter__16BIT_CONTROL_CONTROL_REG EQU CYREG_B1_UDB05_06_CTL\r
-SDCard_BSPIM_BitCounter__16BIT_CONTROL_COUNT_REG EQU CYREG_B1_UDB05_06_CTL\r
-SDCard_BSPIM_BitCounter__16BIT_COUNT_CONTROL_REG EQU CYREG_B1_UDB05_06_CTL\r
-SDCard_BSPIM_BitCounter__16BIT_COUNT_COUNT_REG EQU CYREG_B1_UDB05_06_CTL\r
-SDCard_BSPIM_BitCounter__16BIT_MASK_MASK_REG EQU CYREG_B1_UDB05_06_MSK\r
-SDCard_BSPIM_BitCounter__16BIT_MASK_PERIOD_REG EQU CYREG_B1_UDB05_06_MSK\r
-SDCard_BSPIM_BitCounter__16BIT_PERIOD_MASK_REG EQU CYREG_B1_UDB05_06_MSK\r
-SDCard_BSPIM_BitCounter__16BIT_PERIOD_PERIOD_REG EQU CYREG_B1_UDB05_06_MSK\r
-SDCard_BSPIM_BitCounter__CONTROL_AUX_CTL_REG EQU CYREG_B1_UDB05_ACTL\r
-SDCard_BSPIM_BitCounter__CONTROL_REG EQU CYREG_B1_UDB05_CTL\r
-SDCard_BSPIM_BitCounter__CONTROL_ST_REG EQU CYREG_B1_UDB05_ST_CTL\r
-SDCard_BSPIM_BitCounter__COUNT_REG EQU CYREG_B1_UDB05_CTL\r
-SDCard_BSPIM_BitCounter__COUNT_ST_REG EQU CYREG_B1_UDB05_ST_CTL\r
-SDCard_BSPIM_BitCounter__MASK_CTL_AUX_CTL_REG EQU CYREG_B1_UDB05_MSK_ACTL\r
-SDCard_BSPIM_BitCounter__PER_CTL_AUX_CTL_REG EQU CYREG_B1_UDB05_MSK_ACTL\r
-SDCard_BSPIM_BitCounter__PERIOD_REG EQU CYREG_B1_UDB05_MSK\r
-SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B1_UDB05_06_ACTL\r
-SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_REG EQU CYREG_B1_UDB05_06_ST\r
-SDCard_BSPIM_BitCounter_ST__MASK_REG EQU CYREG_B1_UDB05_MSK\r
-SDCard_BSPIM_BitCounter_ST__MASK_ST_AUX_CTL_REG EQU CYREG_B1_UDB05_MSK_ACTL\r
-SDCard_BSPIM_BitCounter_ST__PER_ST_AUX_CTL_REG EQU CYREG_B1_UDB05_MSK_ACTL\r
-SDCard_BSPIM_BitCounter_ST__STATUS_AUX_CTL_REG EQU CYREG_B1_UDB05_ACTL\r
-SDCard_BSPIM_BitCounter_ST__STATUS_CNT_REG EQU CYREG_B1_UDB05_ST_CTL\r
-SDCard_BSPIM_BitCounter_ST__STATUS_CONTROL_REG EQU CYREG_B1_UDB05_ST_CTL\r
-SDCard_BSPIM_BitCounter_ST__STATUS_REG EQU CYREG_B1_UDB05_ST\r
-SDCard_BSPIM_RxStsReg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B1_UDB07_08_ACTL\r
-SDCard_BSPIM_RxStsReg__16BIT_STATUS_REG EQU CYREG_B1_UDB07_08_ST\r
-SDCard_BSPIM_RxStsReg__4__MASK EQU 0x10\r
-SDCard_BSPIM_RxStsReg__4__POS EQU 4\r
-SDCard_BSPIM_RxStsReg__5__MASK EQU 0x20\r
-SDCard_BSPIM_RxStsReg__5__POS EQU 5\r
-SDCard_BSPIM_RxStsReg__6__MASK EQU 0x40\r
-SDCard_BSPIM_RxStsReg__6__POS EQU 6\r
-SDCard_BSPIM_RxStsReg__MASK EQU 0x70\r
-SDCard_BSPIM_RxStsReg__MASK_REG EQU CYREG_B1_UDB07_MSK\r
-SDCard_BSPIM_RxStsReg__STATUS_AUX_CTL_REG EQU CYREG_B1_UDB07_ACTL\r
-SDCard_BSPIM_RxStsReg__STATUS_REG EQU CYREG_B1_UDB07_ST\r
-SDCard_BSPIM_sR8_Dp_u0__16BIT_A0_REG EQU CYREG_B1_UDB04_05_A0\r
-SDCard_BSPIM_sR8_Dp_u0__16BIT_A1_REG EQU CYREG_B1_UDB04_05_A1\r
-SDCard_BSPIM_sR8_Dp_u0__16BIT_D0_REG EQU CYREG_B1_UDB04_05_D0\r
-SDCard_BSPIM_sR8_Dp_u0__16BIT_D1_REG EQU CYREG_B1_UDB04_05_D1\r
-SDCard_BSPIM_sR8_Dp_u0__16BIT_DP_AUX_CTL_REG EQU CYREG_B1_UDB04_05_ACTL\r
-SDCard_BSPIM_sR8_Dp_u0__16BIT_F0_REG EQU CYREG_B1_UDB04_05_F0\r
-SDCard_BSPIM_sR8_Dp_u0__16BIT_F1_REG EQU CYREG_B1_UDB04_05_F1\r
-SDCard_BSPIM_sR8_Dp_u0__A0_A1_REG EQU CYREG_B1_UDB04_A0_A1\r
-SDCard_BSPIM_sR8_Dp_u0__A0_REG EQU CYREG_B1_UDB04_A0\r
-SDCard_BSPIM_sR8_Dp_u0__A1_REG EQU CYREG_B1_UDB04_A1\r
-SDCard_BSPIM_sR8_Dp_u0__D0_D1_REG EQU CYREG_B1_UDB04_D0_D1\r
-SDCard_BSPIM_sR8_Dp_u0__D0_REG EQU CYREG_B1_UDB04_D0\r
-SDCard_BSPIM_sR8_Dp_u0__D1_REG EQU CYREG_B1_UDB04_D1\r
-SDCard_BSPIM_sR8_Dp_u0__DP_AUX_CTL_REG EQU CYREG_B1_UDB04_ACTL\r
-SDCard_BSPIM_sR8_Dp_u0__F0_F1_REG EQU CYREG_B1_UDB04_F0_F1\r
-SDCard_BSPIM_sR8_Dp_u0__F0_REG EQU CYREG_B1_UDB04_F0\r
-SDCard_BSPIM_sR8_Dp_u0__F1_REG EQU CYREG_B1_UDB04_F1\r
-SDCard_BSPIM_TxStsReg__0__MASK EQU 0x01\r
-SDCard_BSPIM_TxStsReg__0__POS EQU 0\r
-SDCard_BSPIM_TxStsReg__1__MASK EQU 0x02\r
-SDCard_BSPIM_TxStsReg__1__POS EQU 1\r
-SDCard_BSPIM_TxStsReg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B1_UDB06_07_ACTL\r
-SDCard_BSPIM_TxStsReg__16BIT_STATUS_REG EQU CYREG_B1_UDB06_07_ST\r
-SDCard_BSPIM_TxStsReg__2__MASK EQU 0x04\r
-SDCard_BSPIM_TxStsReg__2__POS EQU 2\r
-SDCard_BSPIM_TxStsReg__3__MASK EQU 0x08\r
-SDCard_BSPIM_TxStsReg__3__POS EQU 3\r
-SDCard_BSPIM_TxStsReg__4__MASK EQU 0x10\r
-SDCard_BSPIM_TxStsReg__4__POS EQU 4\r
-SDCard_BSPIM_TxStsReg__MASK EQU 0x1F\r
-SDCard_BSPIM_TxStsReg__MASK_REG EQU CYREG_B1_UDB06_MSK\r
-SDCard_BSPIM_TxStsReg__STATUS_AUX_CTL_REG EQU CYREG_B1_UDB06_ACTL\r
-SDCard_BSPIM_TxStsReg__STATUS_REG EQU CYREG_B1_UDB06_ST\r
-\r
-/* SD_CD */\r
-SD_CD__0__INTTYPE EQU CYREG_PICU3_INTTYPE5\r
-SD_CD__0__MASK EQU 0x20\r
-SD_CD__0__PC EQU CYREG_PRT3_PC5\r
-SD_CD__0__PORT EQU 3\r
-SD_CD__0__SHIFT EQU 5\r
-SD_CD__AG EQU CYREG_PRT3_AG\r
-SD_CD__AMUX EQU CYREG_PRT3_AMUX\r
-SD_CD__BIE EQU CYREG_PRT3_BIE\r
-SD_CD__BIT_MASK EQU CYREG_PRT3_BIT_MASK\r
-SD_CD__BYP EQU CYREG_PRT3_BYP\r
-SD_CD__CTL EQU CYREG_PRT3_CTL\r
-SD_CD__DM0 EQU CYREG_PRT3_DM0\r
-SD_CD__DM1 EQU CYREG_PRT3_DM1\r
-SD_CD__DM2 EQU CYREG_PRT3_DM2\r
-SD_CD__DR EQU CYREG_PRT3_DR\r
-SD_CD__INP_DIS EQU CYREG_PRT3_INP_DIS\r
-SD_CD__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU3_BASE\r
-SD_CD__LCD_COM_SEG EQU CYREG_PRT3_LCD_COM_SEG\r
-SD_CD__LCD_EN EQU CYREG_PRT3_LCD_EN\r
-SD_CD__MASK EQU 0x20\r
-SD_CD__PORT EQU 3\r
-SD_CD__PRT EQU CYREG_PRT3_PRT\r
-SD_CD__PRTDSI__CAPS_SEL EQU CYREG_PRT3_CAPS_SEL\r
-SD_CD__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT3_DBL_SYNC_IN\r
-SD_CD__PRTDSI__OE_SEL0 EQU CYREG_PRT3_OE_SEL0\r
-SD_CD__PRTDSI__OE_SEL1 EQU CYREG_PRT3_OE_SEL1\r
-SD_CD__PRTDSI__OUT_SEL0 EQU CYREG_PRT3_OUT_SEL0\r
-SD_CD__PRTDSI__OUT_SEL1 EQU CYREG_PRT3_OUT_SEL1\r
-SD_CD__PRTDSI__SYNC_OUT EQU CYREG_PRT3_SYNC_OUT\r
-SD_CD__PS EQU CYREG_PRT3_PS\r
-SD_CD__SHIFT EQU 5\r
-SD_CD__SLW EQU CYREG_PRT3_SLW\r
-\r
-/* SD_CS */\r
-SD_CS__0__INTTYPE EQU CYREG_PICU3_INTTYPE4\r
-SD_CS__0__MASK EQU 0x10\r
-SD_CS__0__PC EQU CYREG_PRT3_PC4\r
-SD_CS__0__PORT EQU 3\r
-SD_CS__0__SHIFT EQU 4\r
-SD_CS__AG EQU CYREG_PRT3_AG\r
-SD_CS__AMUX EQU CYREG_PRT3_AMUX\r
-SD_CS__BIE EQU CYREG_PRT3_BIE\r
-SD_CS__BIT_MASK EQU CYREG_PRT3_BIT_MASK\r
-SD_CS__BYP EQU CYREG_PRT3_BYP\r
-SD_CS__CTL EQU CYREG_PRT3_CTL\r
-SD_CS__DM0 EQU CYREG_PRT3_DM0\r
-SD_CS__DM1 EQU CYREG_PRT3_DM1\r
-SD_CS__DM2 EQU CYREG_PRT3_DM2\r
-SD_CS__DR EQU CYREG_PRT3_DR\r
-SD_CS__INP_DIS EQU CYREG_PRT3_INP_DIS\r
-SD_CS__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU3_BASE\r
-SD_CS__LCD_COM_SEG EQU CYREG_PRT3_LCD_COM_SEG\r
-SD_CS__LCD_EN EQU CYREG_PRT3_LCD_EN\r
-SD_CS__MASK EQU 0x10\r
-SD_CS__PORT EQU 3\r
-SD_CS__PRT EQU CYREG_PRT3_PRT\r
-SD_CS__PRTDSI__CAPS_SEL EQU CYREG_PRT3_CAPS_SEL\r
-SD_CS__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT3_DBL_SYNC_IN\r
-SD_CS__PRTDSI__OE_SEL0 EQU CYREG_PRT3_OE_SEL0\r
-SD_CS__PRTDSI__OE_SEL1 EQU CYREG_PRT3_OE_SEL1\r
-SD_CS__PRTDSI__OUT_SEL0 EQU CYREG_PRT3_OUT_SEL0\r
-SD_CS__PRTDSI__OUT_SEL1 EQU CYREG_PRT3_OUT_SEL1\r
-SD_CS__PRTDSI__SYNC_OUT EQU CYREG_PRT3_SYNC_OUT\r
-SD_CS__PS EQU CYREG_PRT3_PS\r
-SD_CS__SHIFT EQU 4\r
-SD_CS__SLW EQU CYREG_PRT3_SLW\r
-\r
-/* SD_Data_Clk */\r
-SD_Data_Clk__CFG0 EQU CYREG_CLKDIST_DCFG0_CFG0\r
-SD_Data_Clk__CFG1 EQU CYREG_CLKDIST_DCFG0_CFG1\r
-SD_Data_Clk__CFG2 EQU CYREG_CLKDIST_DCFG0_CFG2\r
-SD_Data_Clk__CFG2_SRC_SEL_MASK EQU 0x07\r
-SD_Data_Clk__INDEX EQU 0x00\r
-SD_Data_Clk__PM_ACT_CFG EQU CYREG_PM_ACT_CFG2\r
-SD_Data_Clk__PM_ACT_MSK EQU 0x01\r
-SD_Data_Clk__PM_STBY_CFG EQU CYREG_PM_STBY_CFG2\r
-SD_Data_Clk__PM_STBY_MSK EQU 0x01\r
-\r
-/* SD_MISO */\r
-SD_MISO__0__INTTYPE EQU CYREG_PICU3_INTTYPE1\r
-SD_MISO__0__MASK EQU 0x02\r
-SD_MISO__0__PC EQU CYREG_PRT3_PC1\r
-SD_MISO__0__PORT EQU 3\r
-SD_MISO__0__SHIFT EQU 1\r
-SD_MISO__AG EQU CYREG_PRT3_AG\r
-SD_MISO__AMUX EQU CYREG_PRT3_AMUX\r
-SD_MISO__BIE EQU CYREG_PRT3_BIE\r
-SD_MISO__BIT_MASK EQU CYREG_PRT3_BIT_MASK\r
-SD_MISO__BYP EQU CYREG_PRT3_BYP\r
-SD_MISO__CTL EQU CYREG_PRT3_CTL\r
-SD_MISO__DM0 EQU CYREG_PRT3_DM0\r
-SD_MISO__DM1 EQU CYREG_PRT3_DM1\r
-SD_MISO__DM2 EQU CYREG_PRT3_DM2\r
-SD_MISO__DR EQU CYREG_PRT3_DR\r
-SD_MISO__INP_DIS EQU CYREG_PRT3_INP_DIS\r
-SD_MISO__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU3_BASE\r
-SD_MISO__LCD_COM_SEG EQU CYREG_PRT3_LCD_COM_SEG\r
-SD_MISO__LCD_EN EQU CYREG_PRT3_LCD_EN\r
-SD_MISO__MASK EQU 0x02\r
-SD_MISO__PORT EQU 3\r
-SD_MISO__PRT EQU CYREG_PRT3_PRT\r
-SD_MISO__PRTDSI__CAPS_SEL EQU CYREG_PRT3_CAPS_SEL\r
-SD_MISO__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT3_DBL_SYNC_IN\r
-SD_MISO__PRTDSI__OE_SEL0 EQU CYREG_PRT3_OE_SEL0\r
-SD_MISO__PRTDSI__OE_SEL1 EQU CYREG_PRT3_OE_SEL1\r
-SD_MISO__PRTDSI__OUT_SEL0 EQU CYREG_PRT3_OUT_SEL0\r
-SD_MISO__PRTDSI__OUT_SEL1 EQU CYREG_PRT3_OUT_SEL1\r
-SD_MISO__PRTDSI__SYNC_OUT EQU CYREG_PRT3_SYNC_OUT\r
-SD_MISO__PS EQU CYREG_PRT3_PS\r
-SD_MISO__SHIFT EQU 1\r
-SD_MISO__SLW EQU CYREG_PRT3_SLW\r
-\r
-/* SD_MOSI */\r
-SD_MOSI__0__INTTYPE EQU CYREG_PICU3_INTTYPE3\r
-SD_MOSI__0__MASK EQU 0x08\r
-SD_MOSI__0__PC EQU CYREG_PRT3_PC3\r
-SD_MOSI__0__PORT EQU 3\r
-SD_MOSI__0__SHIFT EQU 3\r
-SD_MOSI__AG EQU CYREG_PRT3_AG\r
-SD_MOSI__AMUX EQU CYREG_PRT3_AMUX\r
-SD_MOSI__BIE EQU CYREG_PRT3_BIE\r
-SD_MOSI__BIT_MASK EQU CYREG_PRT3_BIT_MASK\r
-SD_MOSI__BYP EQU CYREG_PRT3_BYP\r
-SD_MOSI__CTL EQU CYREG_PRT3_CTL\r
-SD_MOSI__DM0 EQU CYREG_PRT3_DM0\r
-SD_MOSI__DM1 EQU CYREG_PRT3_DM1\r
-SD_MOSI__DM2 EQU CYREG_PRT3_DM2\r
-SD_MOSI__DR EQU CYREG_PRT3_DR\r
-SD_MOSI__INP_DIS EQU CYREG_PRT3_INP_DIS\r
-SD_MOSI__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU3_BASE\r
-SD_MOSI__LCD_COM_SEG EQU CYREG_PRT3_LCD_COM_SEG\r
-SD_MOSI__LCD_EN EQU CYREG_PRT3_LCD_EN\r
-SD_MOSI__MASK EQU 0x08\r
-SD_MOSI__PORT EQU 3\r
-SD_MOSI__PRT EQU CYREG_PRT3_PRT\r
-SD_MOSI__PRTDSI__CAPS_SEL EQU CYREG_PRT3_CAPS_SEL\r
-SD_MOSI__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT3_DBL_SYNC_IN\r
-SD_MOSI__PRTDSI__OE_SEL0 EQU CYREG_PRT3_OE_SEL0\r
-SD_MOSI__PRTDSI__OE_SEL1 EQU CYREG_PRT3_OE_SEL1\r
-SD_MOSI__PRTDSI__OUT_SEL0 EQU CYREG_PRT3_OUT_SEL0\r
-SD_MOSI__PRTDSI__OUT_SEL1 EQU CYREG_PRT3_OUT_SEL1\r
-SD_MOSI__PRTDSI__SYNC_OUT EQU CYREG_PRT3_SYNC_OUT\r
-SD_MOSI__PS EQU CYREG_PRT3_PS\r
-SD_MOSI__SHIFT EQU 3\r
-SD_MOSI__SLW EQU CYREG_PRT3_SLW\r
-\r
-/* SD_RX_DMA */\r
-SD_RX_DMA__DRQ_CTL EQU CYREG_IDMUX_DRQ_CTL0\r
-SD_RX_DMA__DRQ_NUMBER EQU 2\r
-SD_RX_DMA__NUMBEROF_TDS EQU 0\r
-SD_RX_DMA__PRIORITY EQU 0\r
-SD_RX_DMA__TERMIN_EN EQU 0\r
-SD_RX_DMA__TERMIN_SEL EQU 0\r
-SD_RX_DMA__TERMOUT0_EN EQU 1\r
-SD_RX_DMA__TERMOUT0_SEL EQU 2\r
-SD_RX_DMA__TERMOUT1_EN EQU 0\r
-SD_RX_DMA__TERMOUT1_SEL EQU 0\r
-SD_RX_DMA_COMPLETE__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
-SD_RX_DMA_COMPLETE__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
-SD_RX_DMA_COMPLETE__INTC_MASK EQU 0x20\r
-SD_RX_DMA_COMPLETE__INTC_NUMBER EQU 5\r
-SD_RX_DMA_COMPLETE__INTC_PRIOR_NUM EQU 7\r
-SD_RX_DMA_COMPLETE__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_5\r
-SD_RX_DMA_COMPLETE__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
-SD_RX_DMA_COMPLETE__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
-\r
-/* SD_SCK */\r
-SD_SCK__0__INTTYPE EQU CYREG_PICU3_INTTYPE2\r
-SD_SCK__0__MASK EQU 0x04\r
-SD_SCK__0__PC EQU CYREG_PRT3_PC2\r
-SD_SCK__0__PORT EQU 3\r
-SD_SCK__0__SHIFT EQU 2\r
-SD_SCK__AG EQU CYREG_PRT3_AG\r
-SD_SCK__AMUX EQU CYREG_PRT3_AMUX\r
-SD_SCK__BIE EQU CYREG_PRT3_BIE\r
-SD_SCK__BIT_MASK EQU CYREG_PRT3_BIT_MASK\r
-SD_SCK__BYP EQU CYREG_PRT3_BYP\r
-SD_SCK__CTL EQU CYREG_PRT3_CTL\r
-SD_SCK__DM0 EQU CYREG_PRT3_DM0\r
-SD_SCK__DM1 EQU CYREG_PRT3_DM1\r
-SD_SCK__DM2 EQU CYREG_PRT3_DM2\r
-SD_SCK__DR EQU CYREG_PRT3_DR\r
-SD_SCK__INP_DIS EQU CYREG_PRT3_INP_DIS\r
-SD_SCK__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU3_BASE\r
-SD_SCK__LCD_COM_SEG EQU CYREG_PRT3_LCD_COM_SEG\r
-SD_SCK__LCD_EN EQU CYREG_PRT3_LCD_EN\r
-SD_SCK__MASK EQU 0x04\r
-SD_SCK__PORT EQU 3\r
-SD_SCK__PRT EQU CYREG_PRT3_PRT\r
-SD_SCK__PRTDSI__CAPS_SEL EQU CYREG_PRT3_CAPS_SEL\r
-SD_SCK__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT3_DBL_SYNC_IN\r
-SD_SCK__PRTDSI__OE_SEL0 EQU CYREG_PRT3_OE_SEL0\r
-SD_SCK__PRTDSI__OE_SEL1 EQU CYREG_PRT3_OE_SEL1\r
-SD_SCK__PRTDSI__OUT_SEL0 EQU CYREG_PRT3_OUT_SEL0\r
-SD_SCK__PRTDSI__OUT_SEL1 EQU CYREG_PRT3_OUT_SEL1\r
-SD_SCK__PRTDSI__SYNC_OUT EQU CYREG_PRT3_SYNC_OUT\r
-SD_SCK__PS EQU CYREG_PRT3_PS\r
-SD_SCK__SHIFT EQU 2\r
-SD_SCK__SLW EQU CYREG_PRT3_SLW\r
-\r
-/* SD_TX_DMA */\r
-SD_TX_DMA__DRQ_CTL EQU CYREG_IDMUX_DRQ_CTL0\r
-SD_TX_DMA__DRQ_NUMBER EQU 3\r
-SD_TX_DMA__NUMBEROF_TDS EQU 0\r
-SD_TX_DMA__PRIORITY EQU 1\r
-SD_TX_DMA__TERMIN_EN EQU 0\r
-SD_TX_DMA__TERMIN_SEL EQU 0\r
-SD_TX_DMA__TERMOUT0_EN EQU 1\r
-SD_TX_DMA__TERMOUT0_SEL EQU 3\r
-SD_TX_DMA__TERMOUT1_EN EQU 0\r
-SD_TX_DMA__TERMOUT1_SEL EQU 0\r
-SD_TX_DMA_COMPLETE__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
-SD_TX_DMA_COMPLETE__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
-SD_TX_DMA_COMPLETE__INTC_MASK EQU 0x40\r
-SD_TX_DMA_COMPLETE__INTC_NUMBER EQU 6\r
-SD_TX_DMA_COMPLETE__INTC_PRIOR_NUM EQU 7\r
-SD_TX_DMA_COMPLETE__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_6\r
-SD_TX_DMA_COMPLETE__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
-SD_TX_DMA_COMPLETE__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
+/* SD_CS */\r
+SD_CS__0__INTTYPE EQU CYREG_PICU3_INTTYPE4\r
+SD_CS__0__MASK EQU 0x10\r
+SD_CS__0__PC EQU CYREG_PRT3_PC4\r
+SD_CS__0__PORT EQU 3\r
+SD_CS__0__SHIFT EQU 4\r
+SD_CS__AG EQU CYREG_PRT3_AG\r
+SD_CS__AMUX EQU CYREG_PRT3_AMUX\r
+SD_CS__BIE EQU CYREG_PRT3_BIE\r
+SD_CS__BIT_MASK EQU CYREG_PRT3_BIT_MASK\r
+SD_CS__BYP EQU CYREG_PRT3_BYP\r
+SD_CS__CTL EQU CYREG_PRT3_CTL\r
+SD_CS__DM0 EQU CYREG_PRT3_DM0\r
+SD_CS__DM1 EQU CYREG_PRT3_DM1\r
+SD_CS__DM2 EQU CYREG_PRT3_DM2\r
+SD_CS__DR EQU CYREG_PRT3_DR\r
+SD_CS__INP_DIS EQU CYREG_PRT3_INP_DIS\r
+SD_CS__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU3_BASE\r
+SD_CS__LCD_COM_SEG EQU CYREG_PRT3_LCD_COM_SEG\r
+SD_CS__LCD_EN EQU CYREG_PRT3_LCD_EN\r
+SD_CS__MASK EQU 0x10\r
+SD_CS__PORT EQU 3\r
+SD_CS__PRT EQU CYREG_PRT3_PRT\r
+SD_CS__PRTDSI__CAPS_SEL EQU CYREG_PRT3_CAPS_SEL\r
+SD_CS__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT3_DBL_SYNC_IN\r
+SD_CS__PRTDSI__OE_SEL0 EQU CYREG_PRT3_OE_SEL0\r
+SD_CS__PRTDSI__OE_SEL1 EQU CYREG_PRT3_OE_SEL1\r
+SD_CS__PRTDSI__OUT_SEL0 EQU CYREG_PRT3_OUT_SEL0\r
+SD_CS__PRTDSI__OUT_SEL1 EQU CYREG_PRT3_OUT_SEL1\r
+SD_CS__PRTDSI__SYNC_OUT EQU CYREG_PRT3_SYNC_OUT\r
+SD_CS__PS EQU CYREG_PRT3_PS\r
+SD_CS__SHIFT EQU 4\r
+SD_CS__SLW EQU CYREG_PRT3_SLW\r
\r
/* USBFS */\r
USBFS_arb_int__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
USBFS_USB__USBIO_CR0 EQU CYREG_USB_USBIO_CR0\r
USBFS_USB__USBIO_CR1 EQU CYREG_USB_USBIO_CR1\r
\r
+/* EXTLED */\r
+EXTLED__0__INTTYPE EQU CYREG_PICU0_INTTYPE0\r
+EXTLED__0__MASK EQU 0x01\r
+EXTLED__0__PC EQU CYREG_PRT0_PC0\r
+EXTLED__0__PORT EQU 0\r
+EXTLED__0__SHIFT EQU 0\r
+EXTLED__AG EQU CYREG_PRT0_AG\r
+EXTLED__AMUX EQU CYREG_PRT0_AMUX\r
+EXTLED__BIE EQU CYREG_PRT0_BIE\r
+EXTLED__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
+EXTLED__BYP EQU CYREG_PRT0_BYP\r
+EXTLED__CTL EQU CYREG_PRT0_CTL\r
+EXTLED__DM0 EQU CYREG_PRT0_DM0\r
+EXTLED__DM1 EQU CYREG_PRT0_DM1\r
+EXTLED__DM2 EQU CYREG_PRT0_DM2\r
+EXTLED__DR EQU CYREG_PRT0_DR\r
+EXTLED__INP_DIS EQU CYREG_PRT0_INP_DIS\r
+EXTLED__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU0_BASE\r
+EXTLED__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
+EXTLED__LCD_EN EQU CYREG_PRT0_LCD_EN\r
+EXTLED__MASK EQU 0x01\r
+EXTLED__PORT EQU 0\r
+EXTLED__PRT EQU CYREG_PRT0_PRT\r
+EXTLED__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
+EXTLED__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
+EXTLED__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
+EXTLED__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
+EXTLED__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
+EXTLED__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
+EXTLED__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
+EXTLED__PS EQU CYREG_PRT0_PS\r
+EXTLED__SHIFT EQU 0\r
+EXTLED__SLW EQU CYREG_PRT0_SLW\r
+\r
+/* SDCard */\r
+SDCard_BSPIM_BitCounter__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B1_UDB07_08_ACTL\r
+SDCard_BSPIM_BitCounter__16BIT_CONTROL_CONTROL_REG EQU CYREG_B1_UDB07_08_CTL\r
+SDCard_BSPIM_BitCounter__16BIT_CONTROL_COUNT_REG EQU CYREG_B1_UDB07_08_CTL\r
+SDCard_BSPIM_BitCounter__16BIT_COUNT_CONTROL_REG EQU CYREG_B1_UDB07_08_CTL\r
+SDCard_BSPIM_BitCounter__16BIT_COUNT_COUNT_REG EQU CYREG_B1_UDB07_08_CTL\r
+SDCard_BSPIM_BitCounter__16BIT_MASK_MASK_REG EQU CYREG_B1_UDB07_08_MSK\r
+SDCard_BSPIM_BitCounter__16BIT_MASK_PERIOD_REG EQU CYREG_B1_UDB07_08_MSK\r
+SDCard_BSPIM_BitCounter__16BIT_PERIOD_MASK_REG EQU CYREG_B1_UDB07_08_MSK\r
+SDCard_BSPIM_BitCounter__16BIT_PERIOD_PERIOD_REG EQU CYREG_B1_UDB07_08_MSK\r
+SDCard_BSPIM_BitCounter__CONTROL_AUX_CTL_REG EQU CYREG_B1_UDB07_ACTL\r
+SDCard_BSPIM_BitCounter__CONTROL_REG EQU CYREG_B1_UDB07_CTL\r
+SDCard_BSPIM_BitCounter__CONTROL_ST_REG EQU CYREG_B1_UDB07_ST_CTL\r
+SDCard_BSPIM_BitCounter__COUNT_REG EQU CYREG_B1_UDB07_CTL\r
+SDCard_BSPIM_BitCounter__COUNT_ST_REG EQU CYREG_B1_UDB07_ST_CTL\r
+SDCard_BSPIM_BitCounter__MASK_CTL_AUX_CTL_REG EQU CYREG_B1_UDB07_MSK_ACTL\r
+SDCard_BSPIM_BitCounter__PER_CTL_AUX_CTL_REG EQU CYREG_B1_UDB07_MSK_ACTL\r
+SDCard_BSPIM_BitCounter__PERIOD_REG EQU CYREG_B1_UDB07_MSK\r
+SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B1_UDB07_08_ACTL\r
+SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_REG EQU CYREG_B1_UDB07_08_ST\r
+SDCard_BSPIM_BitCounter_ST__MASK_REG EQU CYREG_B1_UDB07_MSK\r
+SDCard_BSPIM_BitCounter_ST__MASK_ST_AUX_CTL_REG EQU CYREG_B1_UDB07_MSK_ACTL\r
+SDCard_BSPIM_BitCounter_ST__PER_ST_AUX_CTL_REG EQU CYREG_B1_UDB07_MSK_ACTL\r
+SDCard_BSPIM_BitCounter_ST__STATUS_AUX_CTL_REG EQU CYREG_B1_UDB07_ACTL\r
+SDCard_BSPIM_BitCounter_ST__STATUS_CNT_REG EQU CYREG_B1_UDB07_ST_CTL\r
+SDCard_BSPIM_BitCounter_ST__STATUS_CONTROL_REG EQU CYREG_B1_UDB07_ST_CTL\r
+SDCard_BSPIM_BitCounter_ST__STATUS_REG EQU CYREG_B1_UDB07_ST\r
+SDCard_BSPIM_RxStsReg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B1_UDB04_05_ACTL\r
+SDCard_BSPIM_RxStsReg__16BIT_STATUS_REG EQU CYREG_B1_UDB04_05_ST\r
+SDCard_BSPIM_RxStsReg__4__MASK EQU 0x10\r
+SDCard_BSPIM_RxStsReg__4__POS EQU 4\r
+SDCard_BSPIM_RxStsReg__5__MASK EQU 0x20\r
+SDCard_BSPIM_RxStsReg__5__POS EQU 5\r
+SDCard_BSPIM_RxStsReg__6__MASK EQU 0x40\r
+SDCard_BSPIM_RxStsReg__6__POS EQU 6\r
+SDCard_BSPIM_RxStsReg__MASK EQU 0x70\r
+SDCard_BSPIM_RxStsReg__MASK_REG EQU CYREG_B1_UDB04_MSK\r
+SDCard_BSPIM_RxStsReg__STATUS_AUX_CTL_REG EQU CYREG_B1_UDB04_ACTL\r
+SDCard_BSPIM_RxStsReg__STATUS_REG EQU CYREG_B1_UDB04_ST\r
+SDCard_BSPIM_sR8_Dp_u0__16BIT_A0_REG EQU CYREG_B1_UDB04_05_A0\r
+SDCard_BSPIM_sR8_Dp_u0__16BIT_A1_REG EQU CYREG_B1_UDB04_05_A1\r
+SDCard_BSPIM_sR8_Dp_u0__16BIT_D0_REG EQU CYREG_B1_UDB04_05_D0\r
+SDCard_BSPIM_sR8_Dp_u0__16BIT_D1_REG EQU CYREG_B1_UDB04_05_D1\r
+SDCard_BSPIM_sR8_Dp_u0__16BIT_DP_AUX_CTL_REG EQU CYREG_B1_UDB04_05_ACTL\r
+SDCard_BSPIM_sR8_Dp_u0__16BIT_F0_REG EQU CYREG_B1_UDB04_05_F0\r
+SDCard_BSPIM_sR8_Dp_u0__16BIT_F1_REG EQU CYREG_B1_UDB04_05_F1\r
+SDCard_BSPIM_sR8_Dp_u0__A0_A1_REG EQU CYREG_B1_UDB04_A0_A1\r
+SDCard_BSPIM_sR8_Dp_u0__A0_REG EQU CYREG_B1_UDB04_A0\r
+SDCard_BSPIM_sR8_Dp_u0__A1_REG EQU CYREG_B1_UDB04_A1\r
+SDCard_BSPIM_sR8_Dp_u0__D0_D1_REG EQU CYREG_B1_UDB04_D0_D1\r
+SDCard_BSPIM_sR8_Dp_u0__D0_REG EQU CYREG_B1_UDB04_D0\r
+SDCard_BSPIM_sR8_Dp_u0__D1_REG EQU CYREG_B1_UDB04_D1\r
+SDCard_BSPIM_sR8_Dp_u0__DP_AUX_CTL_REG EQU CYREG_B1_UDB04_ACTL\r
+SDCard_BSPIM_sR8_Dp_u0__F0_F1_REG EQU CYREG_B1_UDB04_F0_F1\r
+SDCard_BSPIM_sR8_Dp_u0__F0_REG EQU CYREG_B1_UDB04_F0\r
+SDCard_BSPIM_sR8_Dp_u0__F1_REG EQU CYREG_B1_UDB04_F1\r
+SDCard_BSPIM_TxStsReg__0__MASK EQU 0x01\r
+SDCard_BSPIM_TxStsReg__0__POS EQU 0\r
+SDCard_BSPIM_TxStsReg__1__MASK EQU 0x02\r
+SDCard_BSPIM_TxStsReg__1__POS EQU 1\r
+SDCard_BSPIM_TxStsReg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B1_UDB06_07_ACTL\r
+SDCard_BSPIM_TxStsReg__16BIT_STATUS_REG EQU CYREG_B1_UDB06_07_ST\r
+SDCard_BSPIM_TxStsReg__2__MASK EQU 0x04\r
+SDCard_BSPIM_TxStsReg__2__POS EQU 2\r
+SDCard_BSPIM_TxStsReg__3__MASK EQU 0x08\r
+SDCard_BSPIM_TxStsReg__3__POS EQU 3\r
+SDCard_BSPIM_TxStsReg__4__MASK EQU 0x10\r
+SDCard_BSPIM_TxStsReg__4__POS EQU 4\r
+SDCard_BSPIM_TxStsReg__MASK EQU 0x1F\r
+SDCard_BSPIM_TxStsReg__MASK_REG EQU CYREG_B1_UDB06_MSK\r
+SDCard_BSPIM_TxStsReg__STATUS_AUX_CTL_REG EQU CYREG_B1_UDB06_ACTL\r
+SDCard_BSPIM_TxStsReg__STATUS_REG EQU CYREG_B1_UDB06_ST\r
+\r
+/* SD_SCK */\r
+SD_SCK__0__INTTYPE EQU CYREG_PICU3_INTTYPE2\r
+SD_SCK__0__MASK EQU 0x04\r
+SD_SCK__0__PC EQU CYREG_PRT3_PC2\r
+SD_SCK__0__PORT EQU 3\r
+SD_SCK__0__SHIFT EQU 2\r
+SD_SCK__AG EQU CYREG_PRT3_AG\r
+SD_SCK__AMUX EQU CYREG_PRT3_AMUX\r
+SD_SCK__BIE EQU CYREG_PRT3_BIE\r
+SD_SCK__BIT_MASK EQU CYREG_PRT3_BIT_MASK\r
+SD_SCK__BYP EQU CYREG_PRT3_BYP\r
+SD_SCK__CTL EQU CYREG_PRT3_CTL\r
+SD_SCK__DM0 EQU CYREG_PRT3_DM0\r
+SD_SCK__DM1 EQU CYREG_PRT3_DM1\r
+SD_SCK__DM2 EQU CYREG_PRT3_DM2\r
+SD_SCK__DR EQU CYREG_PRT3_DR\r
+SD_SCK__INP_DIS EQU CYREG_PRT3_INP_DIS\r
+SD_SCK__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU3_BASE\r
+SD_SCK__LCD_COM_SEG EQU CYREG_PRT3_LCD_COM_SEG\r
+SD_SCK__LCD_EN EQU CYREG_PRT3_LCD_EN\r
+SD_SCK__MASK EQU 0x04\r
+SD_SCK__PORT EQU 3\r
+SD_SCK__PRT EQU CYREG_PRT3_PRT\r
+SD_SCK__PRTDSI__CAPS_SEL EQU CYREG_PRT3_CAPS_SEL\r
+SD_SCK__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT3_DBL_SYNC_IN\r
+SD_SCK__PRTDSI__OE_SEL0 EQU CYREG_PRT3_OE_SEL0\r
+SD_SCK__PRTDSI__OE_SEL1 EQU CYREG_PRT3_OE_SEL1\r
+SD_SCK__PRTDSI__OUT_SEL0 EQU CYREG_PRT3_OUT_SEL0\r
+SD_SCK__PRTDSI__OUT_SEL1 EQU CYREG_PRT3_OUT_SEL1\r
+SD_SCK__PRTDSI__SYNC_OUT EQU CYREG_PRT3_SYNC_OUT\r
+SD_SCK__PS EQU CYREG_PRT3_PS\r
+SD_SCK__SHIFT EQU 2\r
+SD_SCK__SLW EQU CYREG_PRT3_SLW\r
+\r
+/* SCSI_In */\r
+SCSI_In__0__AG EQU CYREG_PRT2_AG\r
+SCSI_In__0__AMUX EQU CYREG_PRT2_AMUX\r
+SCSI_In__0__BIE EQU CYREG_PRT2_BIE\r
+SCSI_In__0__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
+SCSI_In__0__BYP EQU CYREG_PRT2_BYP\r
+SCSI_In__0__CTL EQU CYREG_PRT2_CTL\r
+SCSI_In__0__DM0 EQU CYREG_PRT2_DM0\r
+SCSI_In__0__DM1 EQU CYREG_PRT2_DM1\r
+SCSI_In__0__DM2 EQU CYREG_PRT2_DM2\r
+SCSI_In__0__DR EQU CYREG_PRT2_DR\r
+SCSI_In__0__INP_DIS EQU CYREG_PRT2_INP_DIS\r
+SCSI_In__0__INTTYPE EQU CYREG_PICU2_INTTYPE1\r
+SCSI_In__0__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
+SCSI_In__0__LCD_EN EQU CYREG_PRT2_LCD_EN\r
+SCSI_In__0__MASK EQU 0x02\r
+SCSI_In__0__PC EQU CYREG_PRT2_PC1\r
+SCSI_In__0__PORT EQU 2\r
+SCSI_In__0__PRT EQU CYREG_PRT2_PRT\r
+SCSI_In__0__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
+SCSI_In__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
+SCSI_In__0__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
+SCSI_In__0__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
+SCSI_In__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
+SCSI_In__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
+SCSI_In__0__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
+SCSI_In__0__PS EQU CYREG_PRT2_PS\r
+SCSI_In__0__SHIFT EQU 1\r
+SCSI_In__0__SLW EQU CYREG_PRT2_SLW\r
+SCSI_In__1__AG EQU CYREG_PRT4_AG\r
+SCSI_In__1__AMUX EQU CYREG_PRT4_AMUX\r
+SCSI_In__1__BIE EQU CYREG_PRT4_BIE\r
+SCSI_In__1__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
+SCSI_In__1__BYP EQU CYREG_PRT4_BYP\r
+SCSI_In__1__CTL EQU CYREG_PRT4_CTL\r
+SCSI_In__1__DM0 EQU CYREG_PRT4_DM0\r
+SCSI_In__1__DM1 EQU CYREG_PRT4_DM1\r
+SCSI_In__1__DM2 EQU CYREG_PRT4_DM2\r
+SCSI_In__1__DR EQU CYREG_PRT4_DR\r
+SCSI_In__1__INP_DIS EQU CYREG_PRT4_INP_DIS\r
+SCSI_In__1__INTTYPE EQU CYREG_PICU4_INTTYPE6\r
+SCSI_In__1__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
+SCSI_In__1__LCD_EN EQU CYREG_PRT4_LCD_EN\r
+SCSI_In__1__MASK EQU 0x40\r
+SCSI_In__1__PC EQU CYREG_PRT4_PC6\r
+SCSI_In__1__PORT EQU 4\r
+SCSI_In__1__PRT EQU CYREG_PRT4_PRT\r
+SCSI_In__1__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
+SCSI_In__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
+SCSI_In__1__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
+SCSI_In__1__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
+SCSI_In__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
+SCSI_In__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
+SCSI_In__1__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
+SCSI_In__1__PS EQU CYREG_PRT4_PS\r
+SCSI_In__1__SHIFT EQU 6\r
+SCSI_In__1__SLW EQU CYREG_PRT4_SLW\r
+SCSI_In__2__AG EQU CYREG_PRT4_AG\r
+SCSI_In__2__AMUX EQU CYREG_PRT4_AMUX\r
+SCSI_In__2__BIE EQU CYREG_PRT4_BIE\r
+SCSI_In__2__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
+SCSI_In__2__BYP EQU CYREG_PRT4_BYP\r
+SCSI_In__2__CTL EQU CYREG_PRT4_CTL\r
+SCSI_In__2__DM0 EQU CYREG_PRT4_DM0\r
+SCSI_In__2__DM1 EQU CYREG_PRT4_DM1\r
+SCSI_In__2__DM2 EQU CYREG_PRT4_DM2\r
+SCSI_In__2__DR EQU CYREG_PRT4_DR\r
+SCSI_In__2__INP_DIS EQU CYREG_PRT4_INP_DIS\r
+SCSI_In__2__INTTYPE EQU CYREG_PICU4_INTTYPE2\r
+SCSI_In__2__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
+SCSI_In__2__LCD_EN EQU CYREG_PRT4_LCD_EN\r
+SCSI_In__2__MASK EQU 0x04\r
+SCSI_In__2__PC EQU CYREG_PRT4_PC2\r
+SCSI_In__2__PORT EQU 4\r
+SCSI_In__2__PRT EQU CYREG_PRT4_PRT\r
+SCSI_In__2__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
+SCSI_In__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
+SCSI_In__2__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
+SCSI_In__2__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
+SCSI_In__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
+SCSI_In__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
+SCSI_In__2__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
+SCSI_In__2__PS EQU CYREG_PRT4_PS\r
+SCSI_In__2__SHIFT EQU 2\r
+SCSI_In__2__SLW EQU CYREG_PRT4_SLW\r
+SCSI_In__3__AG EQU CYREG_PRT0_AG\r
+SCSI_In__3__AMUX EQU CYREG_PRT0_AMUX\r
+SCSI_In__3__BIE EQU CYREG_PRT0_BIE\r
+SCSI_In__3__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
+SCSI_In__3__BYP EQU CYREG_PRT0_BYP\r
+SCSI_In__3__CTL EQU CYREG_PRT0_CTL\r
+SCSI_In__3__DM0 EQU CYREG_PRT0_DM0\r
+SCSI_In__3__DM1 EQU CYREG_PRT0_DM1\r
+SCSI_In__3__DM2 EQU CYREG_PRT0_DM2\r
+SCSI_In__3__DR EQU CYREG_PRT0_DR\r
+SCSI_In__3__INP_DIS EQU CYREG_PRT0_INP_DIS\r
+SCSI_In__3__INTTYPE EQU CYREG_PICU0_INTTYPE5\r
+SCSI_In__3__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
+SCSI_In__3__LCD_EN EQU CYREG_PRT0_LCD_EN\r
+SCSI_In__3__MASK EQU 0x20\r
+SCSI_In__3__PC EQU CYREG_PRT0_PC5\r
+SCSI_In__3__PORT EQU 0\r
+SCSI_In__3__PRT EQU CYREG_PRT0_PRT\r
+SCSI_In__3__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
+SCSI_In__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
+SCSI_In__3__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
+SCSI_In__3__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
+SCSI_In__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
+SCSI_In__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
+SCSI_In__3__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
+SCSI_In__3__PS EQU CYREG_PRT0_PS\r
+SCSI_In__3__SHIFT EQU 5\r
+SCSI_In__3__SLW EQU CYREG_PRT0_SLW\r
+SCSI_In__4__AG EQU CYREG_PRT0_AG\r
+SCSI_In__4__AMUX EQU CYREG_PRT0_AMUX\r
+SCSI_In__4__BIE EQU CYREG_PRT0_BIE\r
+SCSI_In__4__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
+SCSI_In__4__BYP EQU CYREG_PRT0_BYP\r
+SCSI_In__4__CTL EQU CYREG_PRT0_CTL\r
+SCSI_In__4__DM0 EQU CYREG_PRT0_DM0\r
+SCSI_In__4__DM1 EQU CYREG_PRT0_DM1\r
+SCSI_In__4__DM2 EQU CYREG_PRT0_DM2\r
+SCSI_In__4__DR EQU CYREG_PRT0_DR\r
+SCSI_In__4__INP_DIS EQU CYREG_PRT0_INP_DIS\r
+SCSI_In__4__INTTYPE EQU CYREG_PICU0_INTTYPE4\r
+SCSI_In__4__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
+SCSI_In__4__LCD_EN EQU CYREG_PRT0_LCD_EN\r
+SCSI_In__4__MASK EQU 0x10\r
+SCSI_In__4__PC EQU CYREG_PRT0_PC4\r
+SCSI_In__4__PORT EQU 0\r
+SCSI_In__4__PRT EQU CYREG_PRT0_PRT\r
+SCSI_In__4__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
+SCSI_In__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
+SCSI_In__4__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
+SCSI_In__4__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
+SCSI_In__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
+SCSI_In__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
+SCSI_In__4__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
+SCSI_In__4__PS EQU CYREG_PRT0_PS\r
+SCSI_In__4__SHIFT EQU 4\r
+SCSI_In__4__SLW EQU CYREG_PRT0_SLW\r
+SCSI_In__CD__AG EQU CYREG_PRT4_AG\r
+SCSI_In__CD__AMUX EQU CYREG_PRT4_AMUX\r
+SCSI_In__CD__BIE EQU CYREG_PRT4_BIE\r
+SCSI_In__CD__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
+SCSI_In__CD__BYP EQU CYREG_PRT4_BYP\r
+SCSI_In__CD__CTL EQU CYREG_PRT4_CTL\r
+SCSI_In__CD__DM0 EQU CYREG_PRT4_DM0\r
+SCSI_In__CD__DM1 EQU CYREG_PRT4_DM1\r
+SCSI_In__CD__DM2 EQU CYREG_PRT4_DM2\r
+SCSI_In__CD__DR EQU CYREG_PRT4_DR\r
+SCSI_In__CD__INP_DIS EQU CYREG_PRT4_INP_DIS\r
+SCSI_In__CD__INTTYPE EQU CYREG_PICU4_INTTYPE2\r
+SCSI_In__CD__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
+SCSI_In__CD__LCD_EN EQU CYREG_PRT4_LCD_EN\r
+SCSI_In__CD__MASK EQU 0x04\r
+SCSI_In__CD__PC EQU CYREG_PRT4_PC2\r
+SCSI_In__CD__PORT EQU 4\r
+SCSI_In__CD__PRT EQU CYREG_PRT4_PRT\r
+SCSI_In__CD__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
+SCSI_In__CD__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
+SCSI_In__CD__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
+SCSI_In__CD__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
+SCSI_In__CD__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
+SCSI_In__CD__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
+SCSI_In__CD__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
+SCSI_In__CD__PS EQU CYREG_PRT4_PS\r
+SCSI_In__CD__SHIFT EQU 2\r
+SCSI_In__CD__SLW EQU CYREG_PRT4_SLW\r
+SCSI_In__DBP__AG EQU CYREG_PRT2_AG\r
+SCSI_In__DBP__AMUX EQU CYREG_PRT2_AMUX\r
+SCSI_In__DBP__BIE EQU CYREG_PRT2_BIE\r
+SCSI_In__DBP__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
+SCSI_In__DBP__BYP EQU CYREG_PRT2_BYP\r
+SCSI_In__DBP__CTL EQU CYREG_PRT2_CTL\r
+SCSI_In__DBP__DM0 EQU CYREG_PRT2_DM0\r
+SCSI_In__DBP__DM1 EQU CYREG_PRT2_DM1\r
+SCSI_In__DBP__DM2 EQU CYREG_PRT2_DM2\r
+SCSI_In__DBP__DR EQU CYREG_PRT2_DR\r
+SCSI_In__DBP__INP_DIS EQU CYREG_PRT2_INP_DIS\r
+SCSI_In__DBP__INTTYPE EQU CYREG_PICU2_INTTYPE1\r
+SCSI_In__DBP__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
+SCSI_In__DBP__LCD_EN EQU CYREG_PRT2_LCD_EN\r
+SCSI_In__DBP__MASK EQU 0x02\r
+SCSI_In__DBP__PC EQU CYREG_PRT2_PC1\r
+SCSI_In__DBP__PORT EQU 2\r
+SCSI_In__DBP__PRT EQU CYREG_PRT2_PRT\r
+SCSI_In__DBP__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
+SCSI_In__DBP__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
+SCSI_In__DBP__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
+SCSI_In__DBP__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
+SCSI_In__DBP__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
+SCSI_In__DBP__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
+SCSI_In__DBP__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
+SCSI_In__DBP__PS EQU CYREG_PRT2_PS\r
+SCSI_In__DBP__SHIFT EQU 1\r
+SCSI_In__DBP__SLW EQU CYREG_PRT2_SLW\r
+SCSI_In__IO__AG EQU CYREG_PRT0_AG\r
+SCSI_In__IO__AMUX EQU CYREG_PRT0_AMUX\r
+SCSI_In__IO__BIE EQU CYREG_PRT0_BIE\r
+SCSI_In__IO__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
+SCSI_In__IO__BYP EQU CYREG_PRT0_BYP\r
+SCSI_In__IO__CTL EQU CYREG_PRT0_CTL\r
+SCSI_In__IO__DM0 EQU CYREG_PRT0_DM0\r
+SCSI_In__IO__DM1 EQU CYREG_PRT0_DM1\r
+SCSI_In__IO__DM2 EQU CYREG_PRT0_DM2\r
+SCSI_In__IO__DR EQU CYREG_PRT0_DR\r
+SCSI_In__IO__INP_DIS EQU CYREG_PRT0_INP_DIS\r
+SCSI_In__IO__INTTYPE EQU CYREG_PICU0_INTTYPE4\r
+SCSI_In__IO__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
+SCSI_In__IO__LCD_EN EQU CYREG_PRT0_LCD_EN\r
+SCSI_In__IO__MASK EQU 0x10\r
+SCSI_In__IO__PC EQU CYREG_PRT0_PC4\r
+SCSI_In__IO__PORT EQU 0\r
+SCSI_In__IO__PRT EQU CYREG_PRT0_PRT\r
+SCSI_In__IO__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
+SCSI_In__IO__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
+SCSI_In__IO__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
+SCSI_In__IO__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
+SCSI_In__IO__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
+SCSI_In__IO__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
+SCSI_In__IO__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
+SCSI_In__IO__PS EQU CYREG_PRT0_PS\r
+SCSI_In__IO__SHIFT EQU 4\r
+SCSI_In__IO__SLW EQU CYREG_PRT0_SLW\r
+SCSI_In__MSG__AG EQU CYREG_PRT4_AG\r
+SCSI_In__MSG__AMUX EQU CYREG_PRT4_AMUX\r
+SCSI_In__MSG__BIE EQU CYREG_PRT4_BIE\r
+SCSI_In__MSG__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
+SCSI_In__MSG__BYP EQU CYREG_PRT4_BYP\r
+SCSI_In__MSG__CTL EQU CYREG_PRT4_CTL\r
+SCSI_In__MSG__DM0 EQU CYREG_PRT4_DM0\r
+SCSI_In__MSG__DM1 EQU CYREG_PRT4_DM1\r
+SCSI_In__MSG__DM2 EQU CYREG_PRT4_DM2\r
+SCSI_In__MSG__DR EQU CYREG_PRT4_DR\r
+SCSI_In__MSG__INP_DIS EQU CYREG_PRT4_INP_DIS\r
+SCSI_In__MSG__INTTYPE EQU CYREG_PICU4_INTTYPE6\r
+SCSI_In__MSG__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
+SCSI_In__MSG__LCD_EN EQU CYREG_PRT4_LCD_EN\r
+SCSI_In__MSG__MASK EQU 0x40\r
+SCSI_In__MSG__PC EQU CYREG_PRT4_PC6\r
+SCSI_In__MSG__PORT EQU 4\r
+SCSI_In__MSG__PRT EQU CYREG_PRT4_PRT\r
+SCSI_In__MSG__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
+SCSI_In__MSG__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
+SCSI_In__MSG__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
+SCSI_In__MSG__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
+SCSI_In__MSG__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
+SCSI_In__MSG__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
+SCSI_In__MSG__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
+SCSI_In__MSG__PS EQU CYREG_PRT4_PS\r
+SCSI_In__MSG__SHIFT EQU 6\r
+SCSI_In__MSG__SLW EQU CYREG_PRT4_SLW\r
+SCSI_In__REQ__AG EQU CYREG_PRT0_AG\r
+SCSI_In__REQ__AMUX EQU CYREG_PRT0_AMUX\r
+SCSI_In__REQ__BIE EQU CYREG_PRT0_BIE\r
+SCSI_In__REQ__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
+SCSI_In__REQ__BYP EQU CYREG_PRT0_BYP\r
+SCSI_In__REQ__CTL EQU CYREG_PRT0_CTL\r
+SCSI_In__REQ__DM0 EQU CYREG_PRT0_DM0\r
+SCSI_In__REQ__DM1 EQU CYREG_PRT0_DM1\r
+SCSI_In__REQ__DM2 EQU CYREG_PRT0_DM2\r
+SCSI_In__REQ__DR EQU CYREG_PRT0_DR\r
+SCSI_In__REQ__INP_DIS EQU CYREG_PRT0_INP_DIS\r
+SCSI_In__REQ__INTTYPE EQU CYREG_PICU0_INTTYPE5\r
+SCSI_In__REQ__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
+SCSI_In__REQ__LCD_EN EQU CYREG_PRT0_LCD_EN\r
+SCSI_In__REQ__MASK EQU 0x20\r
+SCSI_In__REQ__PC EQU CYREG_PRT0_PC5\r
+SCSI_In__REQ__PORT EQU 0\r
+SCSI_In__REQ__PRT EQU CYREG_PRT0_PRT\r
+SCSI_In__REQ__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
+SCSI_In__REQ__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
+SCSI_In__REQ__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
+SCSI_In__REQ__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
+SCSI_In__REQ__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
+SCSI_In__REQ__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
+SCSI_In__REQ__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
+SCSI_In__REQ__PS EQU CYREG_PRT0_PS\r
+SCSI_In__REQ__SHIFT EQU 5\r
+SCSI_In__REQ__SLW EQU CYREG_PRT0_SLW\r
+SCSI_In_DBx__0__AG EQU CYREG_PRT5_AG\r
+SCSI_In_DBx__0__AMUX EQU CYREG_PRT5_AMUX\r
+SCSI_In_DBx__0__BIE EQU CYREG_PRT5_BIE\r
+SCSI_In_DBx__0__BIT_MASK EQU CYREG_PRT5_BIT_MASK\r
+SCSI_In_DBx__0__BYP EQU CYREG_PRT5_BYP\r
+SCSI_In_DBx__0__CTL EQU CYREG_PRT5_CTL\r
+SCSI_In_DBx__0__DM0 EQU CYREG_PRT5_DM0\r
+SCSI_In_DBx__0__DM1 EQU CYREG_PRT5_DM1\r
+SCSI_In_DBx__0__DM2 EQU CYREG_PRT5_DM2\r
+SCSI_In_DBx__0__DR EQU CYREG_PRT5_DR\r
+SCSI_In_DBx__0__INP_DIS EQU CYREG_PRT5_INP_DIS\r
+SCSI_In_DBx__0__INTTYPE EQU CYREG_PICU5_INTTYPE3\r
+SCSI_In_DBx__0__LCD_COM_SEG EQU CYREG_PRT5_LCD_COM_SEG\r
+SCSI_In_DBx__0__LCD_EN EQU CYREG_PRT5_LCD_EN\r
+SCSI_In_DBx__0__MASK EQU 0x08\r
+SCSI_In_DBx__0__PC EQU CYREG_PRT5_PC3\r
+SCSI_In_DBx__0__PORT EQU 5\r
+SCSI_In_DBx__0__PRT EQU CYREG_PRT5_PRT\r
+SCSI_In_DBx__0__PRTDSI__CAPS_SEL EQU CYREG_PRT5_CAPS_SEL\r
+SCSI_In_DBx__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT5_DBL_SYNC_IN\r
+SCSI_In_DBx__0__PRTDSI__OE_SEL0 EQU CYREG_PRT5_OE_SEL0\r
+SCSI_In_DBx__0__PRTDSI__OE_SEL1 EQU CYREG_PRT5_OE_SEL1\r
+SCSI_In_DBx__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT5_OUT_SEL0\r
+SCSI_In_DBx__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT5_OUT_SEL1\r
+SCSI_In_DBx__0__PRTDSI__SYNC_OUT EQU CYREG_PRT5_SYNC_OUT\r
+SCSI_In_DBx__0__PS EQU CYREG_PRT5_PS\r
+SCSI_In_DBx__0__SHIFT EQU 3\r
+SCSI_In_DBx__0__SLW EQU CYREG_PRT5_SLW\r
+SCSI_In_DBx__1__AG EQU CYREG_PRT5_AG\r
+SCSI_In_DBx__1__AMUX EQU CYREG_PRT5_AMUX\r
+SCSI_In_DBx__1__BIE EQU CYREG_PRT5_BIE\r
+SCSI_In_DBx__1__BIT_MASK EQU CYREG_PRT5_BIT_MASK\r
+SCSI_In_DBx__1__BYP EQU CYREG_PRT5_BYP\r
+SCSI_In_DBx__1__CTL EQU CYREG_PRT5_CTL\r
+SCSI_In_DBx__1__DM0 EQU CYREG_PRT5_DM0\r
+SCSI_In_DBx__1__DM1 EQU CYREG_PRT5_DM1\r
+SCSI_In_DBx__1__DM2 EQU CYREG_PRT5_DM2\r
+SCSI_In_DBx__1__DR EQU CYREG_PRT5_DR\r
+SCSI_In_DBx__1__INP_DIS EQU CYREG_PRT5_INP_DIS\r
+SCSI_In_DBx__1__INTTYPE EQU CYREG_PICU5_INTTYPE2\r
+SCSI_In_DBx__1__LCD_COM_SEG EQU CYREG_PRT5_LCD_COM_SEG\r
+SCSI_In_DBx__1__LCD_EN EQU CYREG_PRT5_LCD_EN\r
+SCSI_In_DBx__1__MASK EQU 0x04\r
+SCSI_In_DBx__1__PC EQU CYREG_PRT5_PC2\r
+SCSI_In_DBx__1__PORT EQU 5\r
+SCSI_In_DBx__1__PRT EQU CYREG_PRT5_PRT\r
+SCSI_In_DBx__1__PRTDSI__CAPS_SEL EQU CYREG_PRT5_CAPS_SEL\r
+SCSI_In_DBx__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT5_DBL_SYNC_IN\r
+SCSI_In_DBx__1__PRTDSI__OE_SEL0 EQU CYREG_PRT5_OE_SEL0\r
+SCSI_In_DBx__1__PRTDSI__OE_SEL1 EQU CYREG_PRT5_OE_SEL1\r
+SCSI_In_DBx__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT5_OUT_SEL0\r
+SCSI_In_DBx__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT5_OUT_SEL1\r
+SCSI_In_DBx__1__PRTDSI__SYNC_OUT EQU CYREG_PRT5_SYNC_OUT\r
+SCSI_In_DBx__1__PS EQU CYREG_PRT5_PS\r
+SCSI_In_DBx__1__SHIFT EQU 2\r
+SCSI_In_DBx__1__SLW EQU CYREG_PRT5_SLW\r
+SCSI_In_DBx__2__AG EQU CYREG_PRT6_AG\r
+SCSI_In_DBx__2__AMUX EQU CYREG_PRT6_AMUX\r
+SCSI_In_DBx__2__BIE EQU CYREG_PRT6_BIE\r
+SCSI_In_DBx__2__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
+SCSI_In_DBx__2__BYP EQU CYREG_PRT6_BYP\r
+SCSI_In_DBx__2__CTL EQU CYREG_PRT6_CTL\r
+SCSI_In_DBx__2__DM0 EQU CYREG_PRT6_DM0\r
+SCSI_In_DBx__2__DM1 EQU CYREG_PRT6_DM1\r
+SCSI_In_DBx__2__DM2 EQU CYREG_PRT6_DM2\r
+SCSI_In_DBx__2__DR EQU CYREG_PRT6_DR\r
+SCSI_In_DBx__2__INP_DIS EQU CYREG_PRT6_INP_DIS\r
+SCSI_In_DBx__2__INTTYPE EQU CYREG_PICU6_INTTYPE7\r
+SCSI_In_DBx__2__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
+SCSI_In_DBx__2__LCD_EN EQU CYREG_PRT6_LCD_EN\r
+SCSI_In_DBx__2__MASK EQU 0x80\r
+SCSI_In_DBx__2__PC EQU CYREG_PRT6_PC7\r
+SCSI_In_DBx__2__PORT EQU 6\r
+SCSI_In_DBx__2__PRT EQU CYREG_PRT6_PRT\r
+SCSI_In_DBx__2__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
+SCSI_In_DBx__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
+SCSI_In_DBx__2__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
+SCSI_In_DBx__2__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
+SCSI_In_DBx__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
+SCSI_In_DBx__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
+SCSI_In_DBx__2__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
+SCSI_In_DBx__2__PS EQU CYREG_PRT6_PS\r
+SCSI_In_DBx__2__SHIFT EQU 7\r
+SCSI_In_DBx__2__SLW EQU CYREG_PRT6_SLW\r
+SCSI_In_DBx__3__AG EQU CYREG_PRT6_AG\r
+SCSI_In_DBx__3__AMUX EQU CYREG_PRT6_AMUX\r
+SCSI_In_DBx__3__BIE EQU CYREG_PRT6_BIE\r
+SCSI_In_DBx__3__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
+SCSI_In_DBx__3__BYP EQU CYREG_PRT6_BYP\r
+SCSI_In_DBx__3__CTL EQU CYREG_PRT6_CTL\r
+SCSI_In_DBx__3__DM0 EQU CYREG_PRT6_DM0\r
+SCSI_In_DBx__3__DM1 EQU CYREG_PRT6_DM1\r
+SCSI_In_DBx__3__DM2 EQU CYREG_PRT6_DM2\r
+SCSI_In_DBx__3__DR EQU CYREG_PRT6_DR\r
+SCSI_In_DBx__3__INP_DIS EQU CYREG_PRT6_INP_DIS\r
+SCSI_In_DBx__3__INTTYPE EQU CYREG_PICU6_INTTYPE6\r
+SCSI_In_DBx__3__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
+SCSI_In_DBx__3__LCD_EN EQU CYREG_PRT6_LCD_EN\r
+SCSI_In_DBx__3__MASK EQU 0x40\r
+SCSI_In_DBx__3__PC EQU CYREG_PRT6_PC6\r
+SCSI_In_DBx__3__PORT EQU 6\r
+SCSI_In_DBx__3__PRT EQU CYREG_PRT6_PRT\r
+SCSI_In_DBx__3__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
+SCSI_In_DBx__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
+SCSI_In_DBx__3__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
+SCSI_In_DBx__3__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
+SCSI_In_DBx__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
+SCSI_In_DBx__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
+SCSI_In_DBx__3__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
+SCSI_In_DBx__3__PS EQU CYREG_PRT6_PS\r
+SCSI_In_DBx__3__SHIFT EQU 6\r
+SCSI_In_DBx__3__SLW EQU CYREG_PRT6_SLW\r
+SCSI_In_DBx__4__AG EQU CYREG_PRT12_AG\r
+SCSI_In_DBx__4__BIE EQU CYREG_PRT12_BIE\r
+SCSI_In_DBx__4__BIT_MASK EQU CYREG_PRT12_BIT_MASK\r
+SCSI_In_DBx__4__BYP EQU CYREG_PRT12_BYP\r
+SCSI_In_DBx__4__DM0 EQU CYREG_PRT12_DM0\r
+SCSI_In_DBx__4__DM1 EQU CYREG_PRT12_DM1\r
+SCSI_In_DBx__4__DM2 EQU CYREG_PRT12_DM2\r
+SCSI_In_DBx__4__DR EQU CYREG_PRT12_DR\r
+SCSI_In_DBx__4__INP_DIS EQU CYREG_PRT12_INP_DIS\r
+SCSI_In_DBx__4__INTTYPE EQU CYREG_PICU12_INTTYPE5\r
+SCSI_In_DBx__4__MASK EQU 0x20\r
+SCSI_In_DBx__4__PC EQU CYREG_PRT12_PC5\r
+SCSI_In_DBx__4__PORT EQU 12\r
+SCSI_In_DBx__4__PRT EQU CYREG_PRT12_PRT\r
+SCSI_In_DBx__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN\r
+SCSI_In_DBx__4__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0\r
+SCSI_In_DBx__4__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1\r
+SCSI_In_DBx__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0\r
+SCSI_In_DBx__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1\r
+SCSI_In_DBx__4__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT\r
+SCSI_In_DBx__4__PS EQU CYREG_PRT12_PS\r
+SCSI_In_DBx__4__SHIFT EQU 5\r
+SCSI_In_DBx__4__SIO_CFG EQU CYREG_PRT12_SIO_CFG\r
+SCSI_In_DBx__4__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF\r
+SCSI_In_DBx__4__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN\r
+SCSI_In_DBx__4__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ\r
+SCSI_In_DBx__4__SLW EQU CYREG_PRT12_SLW\r
+SCSI_In_DBx__5__AG EQU CYREG_PRT12_AG\r
+SCSI_In_DBx__5__BIE EQU CYREG_PRT12_BIE\r
+SCSI_In_DBx__5__BIT_MASK EQU CYREG_PRT12_BIT_MASK\r
+SCSI_In_DBx__5__BYP EQU CYREG_PRT12_BYP\r
+SCSI_In_DBx__5__DM0 EQU CYREG_PRT12_DM0\r
+SCSI_In_DBx__5__DM1 EQU CYREG_PRT12_DM1\r
+SCSI_In_DBx__5__DM2 EQU CYREG_PRT12_DM2\r
+SCSI_In_DBx__5__DR EQU CYREG_PRT12_DR\r
+SCSI_In_DBx__5__INP_DIS EQU CYREG_PRT12_INP_DIS\r
+SCSI_In_DBx__5__INTTYPE EQU CYREG_PICU12_INTTYPE4\r
+SCSI_In_DBx__5__MASK EQU 0x10\r
+SCSI_In_DBx__5__PC EQU CYREG_PRT12_PC4\r
+SCSI_In_DBx__5__PORT EQU 12\r
+SCSI_In_DBx__5__PRT EQU CYREG_PRT12_PRT\r
+SCSI_In_DBx__5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN\r
+SCSI_In_DBx__5__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0\r
+SCSI_In_DBx__5__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1\r
+SCSI_In_DBx__5__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0\r
+SCSI_In_DBx__5__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1\r
+SCSI_In_DBx__5__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT\r
+SCSI_In_DBx__5__PS EQU CYREG_PRT12_PS\r
+SCSI_In_DBx__5__SHIFT EQU 4\r
+SCSI_In_DBx__5__SIO_CFG EQU CYREG_PRT12_SIO_CFG\r
+SCSI_In_DBx__5__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF\r
+SCSI_In_DBx__5__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN\r
+SCSI_In_DBx__5__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ\r
+SCSI_In_DBx__5__SLW EQU CYREG_PRT12_SLW\r
+SCSI_In_DBx__6__AG EQU CYREG_PRT2_AG\r
+SCSI_In_DBx__6__AMUX EQU CYREG_PRT2_AMUX\r
+SCSI_In_DBx__6__BIE EQU CYREG_PRT2_BIE\r
+SCSI_In_DBx__6__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
+SCSI_In_DBx__6__BYP EQU CYREG_PRT2_BYP\r
+SCSI_In_DBx__6__CTL EQU CYREG_PRT2_CTL\r
+SCSI_In_DBx__6__DM0 EQU CYREG_PRT2_DM0\r
+SCSI_In_DBx__6__DM1 EQU CYREG_PRT2_DM1\r
+SCSI_In_DBx__6__DM2 EQU CYREG_PRT2_DM2\r
+SCSI_In_DBx__6__DR EQU CYREG_PRT2_DR\r
+SCSI_In_DBx__6__INP_DIS EQU CYREG_PRT2_INP_DIS\r
+SCSI_In_DBx__6__INTTYPE EQU CYREG_PICU2_INTTYPE5\r
+SCSI_In_DBx__6__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
+SCSI_In_DBx__6__LCD_EN EQU CYREG_PRT2_LCD_EN\r
+SCSI_In_DBx__6__MASK EQU 0x20\r
+SCSI_In_DBx__6__PC EQU CYREG_PRT2_PC5\r
+SCSI_In_DBx__6__PORT EQU 2\r
+SCSI_In_DBx__6__PRT EQU CYREG_PRT2_PRT\r
+SCSI_In_DBx__6__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
+SCSI_In_DBx__6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
+SCSI_In_DBx__6__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
+SCSI_In_DBx__6__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
+SCSI_In_DBx__6__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
+SCSI_In_DBx__6__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
+SCSI_In_DBx__6__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
+SCSI_In_DBx__6__PS EQU CYREG_PRT2_PS\r
+SCSI_In_DBx__6__SHIFT EQU 5\r
+SCSI_In_DBx__6__SLW EQU CYREG_PRT2_SLW\r
+SCSI_In_DBx__7__AG EQU CYREG_PRT2_AG\r
+SCSI_In_DBx__7__AMUX EQU CYREG_PRT2_AMUX\r
+SCSI_In_DBx__7__BIE EQU CYREG_PRT2_BIE\r
+SCSI_In_DBx__7__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
+SCSI_In_DBx__7__BYP EQU CYREG_PRT2_BYP\r
+SCSI_In_DBx__7__CTL EQU CYREG_PRT2_CTL\r
+SCSI_In_DBx__7__DM0 EQU CYREG_PRT2_DM0\r
+SCSI_In_DBx__7__DM1 EQU CYREG_PRT2_DM1\r
+SCSI_In_DBx__7__DM2 EQU CYREG_PRT2_DM2\r
+SCSI_In_DBx__7__DR EQU CYREG_PRT2_DR\r
+SCSI_In_DBx__7__INP_DIS EQU CYREG_PRT2_INP_DIS\r
+SCSI_In_DBx__7__INTTYPE EQU CYREG_PICU2_INTTYPE4\r
+SCSI_In_DBx__7__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
+SCSI_In_DBx__7__LCD_EN EQU CYREG_PRT2_LCD_EN\r
+SCSI_In_DBx__7__MASK EQU 0x10\r
+SCSI_In_DBx__7__PC EQU CYREG_PRT2_PC4\r
+SCSI_In_DBx__7__PORT EQU 2\r
+SCSI_In_DBx__7__PRT EQU CYREG_PRT2_PRT\r
+SCSI_In_DBx__7__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
+SCSI_In_DBx__7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
+SCSI_In_DBx__7__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
+SCSI_In_DBx__7__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
+SCSI_In_DBx__7__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
+SCSI_In_DBx__7__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
+SCSI_In_DBx__7__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
+SCSI_In_DBx__7__PS EQU CYREG_PRT2_PS\r
+SCSI_In_DBx__7__SHIFT EQU 4\r
+SCSI_In_DBx__7__SLW EQU CYREG_PRT2_SLW\r
+SCSI_In_DBx__DB0__AG EQU CYREG_PRT5_AG\r
+SCSI_In_DBx__DB0__AMUX EQU CYREG_PRT5_AMUX\r
+SCSI_In_DBx__DB0__BIE EQU CYREG_PRT5_BIE\r
+SCSI_In_DBx__DB0__BIT_MASK EQU CYREG_PRT5_BIT_MASK\r
+SCSI_In_DBx__DB0__BYP EQU CYREG_PRT5_BYP\r
+SCSI_In_DBx__DB0__CTL EQU CYREG_PRT5_CTL\r
+SCSI_In_DBx__DB0__DM0 EQU CYREG_PRT5_DM0\r
+SCSI_In_DBx__DB0__DM1 EQU CYREG_PRT5_DM1\r
+SCSI_In_DBx__DB0__DM2 EQU CYREG_PRT5_DM2\r
+SCSI_In_DBx__DB0__DR EQU CYREG_PRT5_DR\r
+SCSI_In_DBx__DB0__INP_DIS EQU CYREG_PRT5_INP_DIS\r
+SCSI_In_DBx__DB0__INTTYPE EQU CYREG_PICU5_INTTYPE3\r
+SCSI_In_DBx__DB0__LCD_COM_SEG EQU CYREG_PRT5_LCD_COM_SEG\r
+SCSI_In_DBx__DB0__LCD_EN EQU CYREG_PRT5_LCD_EN\r
+SCSI_In_DBx__DB0__MASK EQU 0x08\r
+SCSI_In_DBx__DB0__PC EQU CYREG_PRT5_PC3\r
+SCSI_In_DBx__DB0__PORT EQU 5\r
+SCSI_In_DBx__DB0__PRT EQU CYREG_PRT5_PRT\r
+SCSI_In_DBx__DB0__PRTDSI__CAPS_SEL EQU CYREG_PRT5_CAPS_SEL\r
+SCSI_In_DBx__DB0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT5_DBL_SYNC_IN\r
+SCSI_In_DBx__DB0__PRTDSI__OE_SEL0 EQU CYREG_PRT5_OE_SEL0\r
+SCSI_In_DBx__DB0__PRTDSI__OE_SEL1 EQU CYREG_PRT5_OE_SEL1\r
+SCSI_In_DBx__DB0__PRTDSI__OUT_SEL0 EQU CYREG_PRT5_OUT_SEL0\r
+SCSI_In_DBx__DB0__PRTDSI__OUT_SEL1 EQU CYREG_PRT5_OUT_SEL1\r
+SCSI_In_DBx__DB0__PRTDSI__SYNC_OUT EQU CYREG_PRT5_SYNC_OUT\r
+SCSI_In_DBx__DB0__PS EQU CYREG_PRT5_PS\r
+SCSI_In_DBx__DB0__SHIFT EQU 3\r
+SCSI_In_DBx__DB0__SLW EQU CYREG_PRT5_SLW\r
+SCSI_In_DBx__DB1__AG EQU CYREG_PRT5_AG\r
+SCSI_In_DBx__DB1__AMUX EQU CYREG_PRT5_AMUX\r
+SCSI_In_DBx__DB1__BIE EQU CYREG_PRT5_BIE\r
+SCSI_In_DBx__DB1__BIT_MASK EQU CYREG_PRT5_BIT_MASK\r
+SCSI_In_DBx__DB1__BYP EQU CYREG_PRT5_BYP\r
+SCSI_In_DBx__DB1__CTL EQU CYREG_PRT5_CTL\r
+SCSI_In_DBx__DB1__DM0 EQU CYREG_PRT5_DM0\r
+SCSI_In_DBx__DB1__DM1 EQU CYREG_PRT5_DM1\r
+SCSI_In_DBx__DB1__DM2 EQU CYREG_PRT5_DM2\r
+SCSI_In_DBx__DB1__DR EQU CYREG_PRT5_DR\r
+SCSI_In_DBx__DB1__INP_DIS EQU CYREG_PRT5_INP_DIS\r
+SCSI_In_DBx__DB1__INTTYPE EQU CYREG_PICU5_INTTYPE2\r
+SCSI_In_DBx__DB1__LCD_COM_SEG EQU CYREG_PRT5_LCD_COM_SEG\r
+SCSI_In_DBx__DB1__LCD_EN EQU CYREG_PRT5_LCD_EN\r
+SCSI_In_DBx__DB1__MASK EQU 0x04\r
+SCSI_In_DBx__DB1__PC EQU CYREG_PRT5_PC2\r
+SCSI_In_DBx__DB1__PORT EQU 5\r
+SCSI_In_DBx__DB1__PRT EQU CYREG_PRT5_PRT\r
+SCSI_In_DBx__DB1__PRTDSI__CAPS_SEL EQU CYREG_PRT5_CAPS_SEL\r
+SCSI_In_DBx__DB1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT5_DBL_SYNC_IN\r
+SCSI_In_DBx__DB1__PRTDSI__OE_SEL0 EQU CYREG_PRT5_OE_SEL0\r
+SCSI_In_DBx__DB1__PRTDSI__OE_SEL1 EQU CYREG_PRT5_OE_SEL1\r
+SCSI_In_DBx__DB1__PRTDSI__OUT_SEL0 EQU CYREG_PRT5_OUT_SEL0\r
+SCSI_In_DBx__DB1__PRTDSI__OUT_SEL1 EQU CYREG_PRT5_OUT_SEL1\r
+SCSI_In_DBx__DB1__PRTDSI__SYNC_OUT EQU CYREG_PRT5_SYNC_OUT\r
+SCSI_In_DBx__DB1__PS EQU CYREG_PRT5_PS\r
+SCSI_In_DBx__DB1__SHIFT EQU 2\r
+SCSI_In_DBx__DB1__SLW EQU CYREG_PRT5_SLW\r
+SCSI_In_DBx__DB2__AG EQU CYREG_PRT6_AG\r
+SCSI_In_DBx__DB2__AMUX EQU CYREG_PRT6_AMUX\r
+SCSI_In_DBx__DB2__BIE EQU CYREG_PRT6_BIE\r
+SCSI_In_DBx__DB2__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
+SCSI_In_DBx__DB2__BYP EQU CYREG_PRT6_BYP\r
+SCSI_In_DBx__DB2__CTL EQU CYREG_PRT6_CTL\r
+SCSI_In_DBx__DB2__DM0 EQU CYREG_PRT6_DM0\r
+SCSI_In_DBx__DB2__DM1 EQU CYREG_PRT6_DM1\r
+SCSI_In_DBx__DB2__DM2 EQU CYREG_PRT6_DM2\r
+SCSI_In_DBx__DB2__DR EQU CYREG_PRT6_DR\r
+SCSI_In_DBx__DB2__INP_DIS EQU CYREG_PRT6_INP_DIS\r
+SCSI_In_DBx__DB2__INTTYPE EQU CYREG_PICU6_INTTYPE7\r
+SCSI_In_DBx__DB2__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
+SCSI_In_DBx__DB2__LCD_EN EQU CYREG_PRT6_LCD_EN\r
+SCSI_In_DBx__DB2__MASK EQU 0x80\r
+SCSI_In_DBx__DB2__PC EQU CYREG_PRT6_PC7\r
+SCSI_In_DBx__DB2__PORT EQU 6\r
+SCSI_In_DBx__DB2__PRT EQU CYREG_PRT6_PRT\r
+SCSI_In_DBx__DB2__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
+SCSI_In_DBx__DB2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
+SCSI_In_DBx__DB2__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
+SCSI_In_DBx__DB2__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
+SCSI_In_DBx__DB2__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
+SCSI_In_DBx__DB2__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
+SCSI_In_DBx__DB2__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
+SCSI_In_DBx__DB2__PS EQU CYREG_PRT6_PS\r
+SCSI_In_DBx__DB2__SHIFT EQU 7\r
+SCSI_In_DBx__DB2__SLW EQU CYREG_PRT6_SLW\r
+SCSI_In_DBx__DB3__AG EQU CYREG_PRT6_AG\r
+SCSI_In_DBx__DB3__AMUX EQU CYREG_PRT6_AMUX\r
+SCSI_In_DBx__DB3__BIE EQU CYREG_PRT6_BIE\r
+SCSI_In_DBx__DB3__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
+SCSI_In_DBx__DB3__BYP EQU CYREG_PRT6_BYP\r
+SCSI_In_DBx__DB3__CTL EQU CYREG_PRT6_CTL\r
+SCSI_In_DBx__DB3__DM0 EQU CYREG_PRT6_DM0\r
+SCSI_In_DBx__DB3__DM1 EQU CYREG_PRT6_DM1\r
+SCSI_In_DBx__DB3__DM2 EQU CYREG_PRT6_DM2\r
+SCSI_In_DBx__DB3__DR EQU CYREG_PRT6_DR\r
+SCSI_In_DBx__DB3__INP_DIS EQU CYREG_PRT6_INP_DIS\r
+SCSI_In_DBx__DB3__INTTYPE EQU CYREG_PICU6_INTTYPE6\r
+SCSI_In_DBx__DB3__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
+SCSI_In_DBx__DB3__LCD_EN EQU CYREG_PRT6_LCD_EN\r
+SCSI_In_DBx__DB3__MASK EQU 0x40\r
+SCSI_In_DBx__DB3__PC EQU CYREG_PRT6_PC6\r
+SCSI_In_DBx__DB3__PORT EQU 6\r
+SCSI_In_DBx__DB3__PRT EQU CYREG_PRT6_PRT\r
+SCSI_In_DBx__DB3__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
+SCSI_In_DBx__DB3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
+SCSI_In_DBx__DB3__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
+SCSI_In_DBx__DB3__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
+SCSI_In_DBx__DB3__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
+SCSI_In_DBx__DB3__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
+SCSI_In_DBx__DB3__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
+SCSI_In_DBx__DB3__PS EQU CYREG_PRT6_PS\r
+SCSI_In_DBx__DB3__SHIFT EQU 6\r
+SCSI_In_DBx__DB3__SLW EQU CYREG_PRT6_SLW\r
+SCSI_In_DBx__DB4__AG EQU CYREG_PRT12_AG\r
+SCSI_In_DBx__DB4__BIE EQU CYREG_PRT12_BIE\r
+SCSI_In_DBx__DB4__BIT_MASK EQU CYREG_PRT12_BIT_MASK\r
+SCSI_In_DBx__DB4__BYP EQU CYREG_PRT12_BYP\r
+SCSI_In_DBx__DB4__DM0 EQU CYREG_PRT12_DM0\r
+SCSI_In_DBx__DB4__DM1 EQU CYREG_PRT12_DM1\r
+SCSI_In_DBx__DB4__DM2 EQU CYREG_PRT12_DM2\r
+SCSI_In_DBx__DB4__DR EQU CYREG_PRT12_DR\r
+SCSI_In_DBx__DB4__INP_DIS EQU CYREG_PRT12_INP_DIS\r
+SCSI_In_DBx__DB4__INTTYPE EQU CYREG_PICU12_INTTYPE5\r
+SCSI_In_DBx__DB4__MASK EQU 0x20\r
+SCSI_In_DBx__DB4__PC EQU CYREG_PRT12_PC5\r
+SCSI_In_DBx__DB4__PORT EQU 12\r
+SCSI_In_DBx__DB4__PRT EQU CYREG_PRT12_PRT\r
+SCSI_In_DBx__DB4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN\r
+SCSI_In_DBx__DB4__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0\r
+SCSI_In_DBx__DB4__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1\r
+SCSI_In_DBx__DB4__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0\r
+SCSI_In_DBx__DB4__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1\r
+SCSI_In_DBx__DB4__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT\r
+SCSI_In_DBx__DB4__PS EQU CYREG_PRT12_PS\r
+SCSI_In_DBx__DB4__SHIFT EQU 5\r
+SCSI_In_DBx__DB4__SIO_CFG EQU CYREG_PRT12_SIO_CFG\r
+SCSI_In_DBx__DB4__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF\r
+SCSI_In_DBx__DB4__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN\r
+SCSI_In_DBx__DB4__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ\r
+SCSI_In_DBx__DB4__SLW EQU CYREG_PRT12_SLW\r
+SCSI_In_DBx__DB5__AG EQU CYREG_PRT12_AG\r
+SCSI_In_DBx__DB5__BIE EQU CYREG_PRT12_BIE\r
+SCSI_In_DBx__DB5__BIT_MASK EQU CYREG_PRT12_BIT_MASK\r
+SCSI_In_DBx__DB5__BYP EQU CYREG_PRT12_BYP\r
+SCSI_In_DBx__DB5__DM0 EQU CYREG_PRT12_DM0\r
+SCSI_In_DBx__DB5__DM1 EQU CYREG_PRT12_DM1\r
+SCSI_In_DBx__DB5__DM2 EQU CYREG_PRT12_DM2\r
+SCSI_In_DBx__DB5__DR EQU CYREG_PRT12_DR\r
+SCSI_In_DBx__DB5__INP_DIS EQU CYREG_PRT12_INP_DIS\r
+SCSI_In_DBx__DB5__INTTYPE EQU CYREG_PICU12_INTTYPE4\r
+SCSI_In_DBx__DB5__MASK EQU 0x10\r
+SCSI_In_DBx__DB5__PC EQU CYREG_PRT12_PC4\r
+SCSI_In_DBx__DB5__PORT EQU 12\r
+SCSI_In_DBx__DB5__PRT EQU CYREG_PRT12_PRT\r
+SCSI_In_DBx__DB5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN\r
+SCSI_In_DBx__DB5__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0\r
+SCSI_In_DBx__DB5__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1\r
+SCSI_In_DBx__DB5__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0\r
+SCSI_In_DBx__DB5__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1\r
+SCSI_In_DBx__DB5__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT\r
+SCSI_In_DBx__DB5__PS EQU CYREG_PRT12_PS\r
+SCSI_In_DBx__DB5__SHIFT EQU 4\r
+SCSI_In_DBx__DB5__SIO_CFG EQU CYREG_PRT12_SIO_CFG\r
+SCSI_In_DBx__DB5__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF\r
+SCSI_In_DBx__DB5__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN\r
+SCSI_In_DBx__DB5__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ\r
+SCSI_In_DBx__DB5__SLW EQU CYREG_PRT12_SLW\r
+SCSI_In_DBx__DB6__AG EQU CYREG_PRT2_AG\r
+SCSI_In_DBx__DB6__AMUX EQU CYREG_PRT2_AMUX\r
+SCSI_In_DBx__DB6__BIE EQU CYREG_PRT2_BIE\r
+SCSI_In_DBx__DB6__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
+SCSI_In_DBx__DB6__BYP EQU CYREG_PRT2_BYP\r
+SCSI_In_DBx__DB6__CTL EQU CYREG_PRT2_CTL\r
+SCSI_In_DBx__DB6__DM0 EQU CYREG_PRT2_DM0\r
+SCSI_In_DBx__DB6__DM1 EQU CYREG_PRT2_DM1\r
+SCSI_In_DBx__DB6__DM2 EQU CYREG_PRT2_DM2\r
+SCSI_In_DBx__DB6__DR EQU CYREG_PRT2_DR\r
+SCSI_In_DBx__DB6__INP_DIS EQU CYREG_PRT2_INP_DIS\r
+SCSI_In_DBx__DB6__INTTYPE EQU CYREG_PICU2_INTTYPE5\r
+SCSI_In_DBx__DB6__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
+SCSI_In_DBx__DB6__LCD_EN EQU CYREG_PRT2_LCD_EN\r
+SCSI_In_DBx__DB6__MASK EQU 0x20\r
+SCSI_In_DBx__DB6__PC EQU CYREG_PRT2_PC5\r
+SCSI_In_DBx__DB6__PORT EQU 2\r
+SCSI_In_DBx__DB6__PRT EQU CYREG_PRT2_PRT\r
+SCSI_In_DBx__DB6__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
+SCSI_In_DBx__DB6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
+SCSI_In_DBx__DB6__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
+SCSI_In_DBx__DB6__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
+SCSI_In_DBx__DB6__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
+SCSI_In_DBx__DB6__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
+SCSI_In_DBx__DB6__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
+SCSI_In_DBx__DB6__PS EQU CYREG_PRT2_PS\r
+SCSI_In_DBx__DB6__SHIFT EQU 5\r
+SCSI_In_DBx__DB6__SLW EQU CYREG_PRT2_SLW\r
+SCSI_In_DBx__DB7__AG EQU CYREG_PRT2_AG\r
+SCSI_In_DBx__DB7__AMUX EQU CYREG_PRT2_AMUX\r
+SCSI_In_DBx__DB7__BIE EQU CYREG_PRT2_BIE\r
+SCSI_In_DBx__DB7__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
+SCSI_In_DBx__DB7__BYP EQU CYREG_PRT2_BYP\r
+SCSI_In_DBx__DB7__CTL EQU CYREG_PRT2_CTL\r
+SCSI_In_DBx__DB7__DM0 EQU CYREG_PRT2_DM0\r
+SCSI_In_DBx__DB7__DM1 EQU CYREG_PRT2_DM1\r
+SCSI_In_DBx__DB7__DM2 EQU CYREG_PRT2_DM2\r
+SCSI_In_DBx__DB7__DR EQU CYREG_PRT2_DR\r
+SCSI_In_DBx__DB7__INP_DIS EQU CYREG_PRT2_INP_DIS\r
+SCSI_In_DBx__DB7__INTTYPE EQU CYREG_PICU2_INTTYPE4\r
+SCSI_In_DBx__DB7__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
+SCSI_In_DBx__DB7__LCD_EN EQU CYREG_PRT2_LCD_EN\r
+SCSI_In_DBx__DB7__MASK EQU 0x10\r
+SCSI_In_DBx__DB7__PC EQU CYREG_PRT2_PC4\r
+SCSI_In_DBx__DB7__PORT EQU 2\r
+SCSI_In_DBx__DB7__PRT EQU CYREG_PRT2_PRT\r
+SCSI_In_DBx__DB7__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
+SCSI_In_DBx__DB7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
+SCSI_In_DBx__DB7__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
+SCSI_In_DBx__DB7__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
+SCSI_In_DBx__DB7__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
+SCSI_In_DBx__DB7__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
+SCSI_In_DBx__DB7__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
+SCSI_In_DBx__DB7__PS EQU CYREG_PRT2_PS\r
+SCSI_In_DBx__DB7__SHIFT EQU 4\r
+SCSI_In_DBx__DB7__SLW EQU CYREG_PRT2_SLW\r
+\r
+/* SD_MISO */\r
+SD_MISO__0__INTTYPE EQU CYREG_PICU3_INTTYPE1\r
+SD_MISO__0__MASK EQU 0x02\r
+SD_MISO__0__PC EQU CYREG_PRT3_PC1\r
+SD_MISO__0__PORT EQU 3\r
+SD_MISO__0__SHIFT EQU 1\r
+SD_MISO__AG EQU CYREG_PRT3_AG\r
+SD_MISO__AMUX EQU CYREG_PRT3_AMUX\r
+SD_MISO__BIE EQU CYREG_PRT3_BIE\r
+SD_MISO__BIT_MASK EQU CYREG_PRT3_BIT_MASK\r
+SD_MISO__BYP EQU CYREG_PRT3_BYP\r
+SD_MISO__CTL EQU CYREG_PRT3_CTL\r
+SD_MISO__DM0 EQU CYREG_PRT3_DM0\r
+SD_MISO__DM1 EQU CYREG_PRT3_DM1\r
+SD_MISO__DM2 EQU CYREG_PRT3_DM2\r
+SD_MISO__DR EQU CYREG_PRT3_DR\r
+SD_MISO__INP_DIS EQU CYREG_PRT3_INP_DIS\r
+SD_MISO__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU3_BASE\r
+SD_MISO__LCD_COM_SEG EQU CYREG_PRT3_LCD_COM_SEG\r
+SD_MISO__LCD_EN EQU CYREG_PRT3_LCD_EN\r
+SD_MISO__MASK EQU 0x02\r
+SD_MISO__PORT EQU 3\r
+SD_MISO__PRT EQU CYREG_PRT3_PRT\r
+SD_MISO__PRTDSI__CAPS_SEL EQU CYREG_PRT3_CAPS_SEL\r
+SD_MISO__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT3_DBL_SYNC_IN\r
+SD_MISO__PRTDSI__OE_SEL0 EQU CYREG_PRT3_OE_SEL0\r
+SD_MISO__PRTDSI__OE_SEL1 EQU CYREG_PRT3_OE_SEL1\r
+SD_MISO__PRTDSI__OUT_SEL0 EQU CYREG_PRT3_OUT_SEL0\r
+SD_MISO__PRTDSI__OUT_SEL1 EQU CYREG_PRT3_OUT_SEL1\r
+SD_MISO__PRTDSI__SYNC_OUT EQU CYREG_PRT3_SYNC_OUT\r
+SD_MISO__PS EQU CYREG_PRT3_PS\r
+SD_MISO__SHIFT EQU 1\r
+SD_MISO__SLW EQU CYREG_PRT3_SLW\r
+\r
+/* SD_MOSI */\r
+SD_MOSI__0__INTTYPE EQU CYREG_PICU3_INTTYPE3\r
+SD_MOSI__0__MASK EQU 0x08\r
+SD_MOSI__0__PC EQU CYREG_PRT3_PC3\r
+SD_MOSI__0__PORT EQU 3\r
+SD_MOSI__0__SHIFT EQU 3\r
+SD_MOSI__AG EQU CYREG_PRT3_AG\r
+SD_MOSI__AMUX EQU CYREG_PRT3_AMUX\r
+SD_MOSI__BIE EQU CYREG_PRT3_BIE\r
+SD_MOSI__BIT_MASK EQU CYREG_PRT3_BIT_MASK\r
+SD_MOSI__BYP EQU CYREG_PRT3_BYP\r
+SD_MOSI__CTL EQU CYREG_PRT3_CTL\r
+SD_MOSI__DM0 EQU CYREG_PRT3_DM0\r
+SD_MOSI__DM1 EQU CYREG_PRT3_DM1\r
+SD_MOSI__DM2 EQU CYREG_PRT3_DM2\r
+SD_MOSI__DR EQU CYREG_PRT3_DR\r
+SD_MOSI__INP_DIS EQU CYREG_PRT3_INP_DIS\r
+SD_MOSI__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU3_BASE\r
+SD_MOSI__LCD_COM_SEG EQU CYREG_PRT3_LCD_COM_SEG\r
+SD_MOSI__LCD_EN EQU CYREG_PRT3_LCD_EN\r
+SD_MOSI__MASK EQU 0x08\r
+SD_MOSI__PORT EQU 3\r
+SD_MOSI__PRT EQU CYREG_PRT3_PRT\r
+SD_MOSI__PRTDSI__CAPS_SEL EQU CYREG_PRT3_CAPS_SEL\r
+SD_MOSI__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT3_DBL_SYNC_IN\r
+SD_MOSI__PRTDSI__OE_SEL0 EQU CYREG_PRT3_OE_SEL0\r
+SD_MOSI__PRTDSI__OE_SEL1 EQU CYREG_PRT3_OE_SEL1\r
+SD_MOSI__PRTDSI__OUT_SEL0 EQU CYREG_PRT3_OUT_SEL0\r
+SD_MOSI__PRTDSI__OUT_SEL1 EQU CYREG_PRT3_OUT_SEL1\r
+SD_MOSI__PRTDSI__SYNC_OUT EQU CYREG_PRT3_SYNC_OUT\r
+SD_MOSI__PS EQU CYREG_PRT3_PS\r
+SD_MOSI__SHIFT EQU 3\r
+SD_MOSI__SLW EQU CYREG_PRT3_SLW\r
+\r
+/* SCSI_CLK */\r
+SCSI_CLK__CFG0 EQU CYREG_CLKDIST_DCFG1_CFG0\r
+SCSI_CLK__CFG1 EQU CYREG_CLKDIST_DCFG1_CFG1\r
+SCSI_CLK__CFG2 EQU CYREG_CLKDIST_DCFG1_CFG2\r
+SCSI_CLK__CFG2_SRC_SEL_MASK EQU 0x07\r
+SCSI_CLK__INDEX EQU 0x01\r
+SCSI_CLK__PM_ACT_CFG EQU CYREG_PM_ACT_CFG2\r
+SCSI_CLK__PM_ACT_MSK EQU 0x02\r
+SCSI_CLK__PM_STBY_CFG EQU CYREG_PM_STBY_CFG2\r
+SCSI_CLK__PM_STBY_MSK EQU 0x02\r
+\r
+/* SCSI_Out */\r
+SCSI_Out__0__AG EQU CYREG_PRT15_AG\r
+SCSI_Out__0__AMUX EQU CYREG_PRT15_AMUX\r
+SCSI_Out__0__BIE EQU CYREG_PRT15_BIE\r
+SCSI_Out__0__BIT_MASK EQU CYREG_PRT15_BIT_MASK\r
+SCSI_Out__0__BYP EQU CYREG_PRT15_BYP\r
+SCSI_Out__0__CTL EQU CYREG_PRT15_CTL\r
+SCSI_Out__0__DM0 EQU CYREG_PRT15_DM0\r
+SCSI_Out__0__DM1 EQU CYREG_PRT15_DM1\r
+SCSI_Out__0__DM2 EQU CYREG_PRT15_DM2\r
+SCSI_Out__0__DR EQU CYREG_PRT15_DR\r
+SCSI_Out__0__INP_DIS EQU CYREG_PRT15_INP_DIS\r
+SCSI_Out__0__INTTYPE EQU CYREG_PICU15_INTTYPE5\r
+SCSI_Out__0__LCD_COM_SEG EQU CYREG_PRT15_LCD_COM_SEG\r
+SCSI_Out__0__LCD_EN EQU CYREG_PRT15_LCD_EN\r
+SCSI_Out__0__MASK EQU 0x20\r
+SCSI_Out__0__PC EQU CYREG_IO_PC_PRT15_PC5\r
+SCSI_Out__0__PORT EQU 15\r
+SCSI_Out__0__PRT EQU CYREG_PRT15_PRT\r
+SCSI_Out__0__PRTDSI__CAPS_SEL EQU CYREG_PRT15_CAPS_SEL\r
+SCSI_Out__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT15_DBL_SYNC_IN\r
+SCSI_Out__0__PRTDSI__OE_SEL0 EQU CYREG_PRT15_OE_SEL0\r
+SCSI_Out__0__PRTDSI__OE_SEL1 EQU CYREG_PRT15_OE_SEL1\r
+SCSI_Out__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT15_OUT_SEL0\r
+SCSI_Out__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT15_OUT_SEL1\r
+SCSI_Out__0__PRTDSI__SYNC_OUT EQU CYREG_PRT15_SYNC_OUT\r
+SCSI_Out__0__PS EQU CYREG_PRT15_PS\r
+SCSI_Out__0__SHIFT EQU 5\r
+SCSI_Out__0__SLW EQU CYREG_PRT15_SLW\r
+SCSI_Out__1__AG EQU CYREG_PRT15_AG\r
+SCSI_Out__1__AMUX EQU CYREG_PRT15_AMUX\r
+SCSI_Out__1__BIE EQU CYREG_PRT15_BIE\r
+SCSI_Out__1__BIT_MASK EQU CYREG_PRT15_BIT_MASK\r
+SCSI_Out__1__BYP EQU CYREG_PRT15_BYP\r
+SCSI_Out__1__CTL EQU CYREG_PRT15_CTL\r
+SCSI_Out__1__DM0 EQU CYREG_PRT15_DM0\r
+SCSI_Out__1__DM1 EQU CYREG_PRT15_DM1\r
+SCSI_Out__1__DM2 EQU CYREG_PRT15_DM2\r
+SCSI_Out__1__DR EQU CYREG_PRT15_DR\r
+SCSI_Out__1__INP_DIS EQU CYREG_PRT15_INP_DIS\r
+SCSI_Out__1__INTTYPE EQU CYREG_PICU15_INTTYPE4\r
+SCSI_Out__1__LCD_COM_SEG EQU CYREG_PRT15_LCD_COM_SEG\r
+SCSI_Out__1__LCD_EN EQU CYREG_PRT15_LCD_EN\r
+SCSI_Out__1__MASK EQU 0x10\r
+SCSI_Out__1__PC EQU CYREG_IO_PC_PRT15_PC4\r
+SCSI_Out__1__PORT EQU 15\r
+SCSI_Out__1__PRT EQU CYREG_PRT15_PRT\r
+SCSI_Out__1__PRTDSI__CAPS_SEL EQU CYREG_PRT15_CAPS_SEL\r
+SCSI_Out__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT15_DBL_SYNC_IN\r
+SCSI_Out__1__PRTDSI__OE_SEL0 EQU CYREG_PRT15_OE_SEL0\r
+SCSI_Out__1__PRTDSI__OE_SEL1 EQU CYREG_PRT15_OE_SEL1\r
+SCSI_Out__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT15_OUT_SEL0\r
+SCSI_Out__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT15_OUT_SEL1\r
+SCSI_Out__1__PRTDSI__SYNC_OUT EQU CYREG_PRT15_SYNC_OUT\r
+SCSI_Out__1__PS EQU CYREG_PRT15_PS\r
+SCSI_Out__1__SHIFT EQU 4\r
+SCSI_Out__1__SLW EQU CYREG_PRT15_SLW\r
+SCSI_Out__2__AG EQU CYREG_PRT6_AG\r
+SCSI_Out__2__AMUX EQU CYREG_PRT6_AMUX\r
+SCSI_Out__2__BIE EQU CYREG_PRT6_BIE\r
+SCSI_Out__2__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
+SCSI_Out__2__BYP EQU CYREG_PRT6_BYP\r
+SCSI_Out__2__CTL EQU CYREG_PRT6_CTL\r
+SCSI_Out__2__DM0 EQU CYREG_PRT6_DM0\r
+SCSI_Out__2__DM1 EQU CYREG_PRT6_DM1\r
+SCSI_Out__2__DM2 EQU CYREG_PRT6_DM2\r
+SCSI_Out__2__DR EQU CYREG_PRT6_DR\r
+SCSI_Out__2__INP_DIS EQU CYREG_PRT6_INP_DIS\r
+SCSI_Out__2__INTTYPE EQU CYREG_PICU6_INTTYPE1\r
+SCSI_Out__2__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
+SCSI_Out__2__LCD_EN EQU CYREG_PRT6_LCD_EN\r
+SCSI_Out__2__MASK EQU 0x02\r
+SCSI_Out__2__PC EQU CYREG_PRT6_PC1\r
+SCSI_Out__2__PORT EQU 6\r
+SCSI_Out__2__PRT EQU CYREG_PRT6_PRT\r
+SCSI_Out__2__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
+SCSI_Out__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
+SCSI_Out__2__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
+SCSI_Out__2__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
+SCSI_Out__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
+SCSI_Out__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
+SCSI_Out__2__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
+SCSI_Out__2__PS EQU CYREG_PRT6_PS\r
+SCSI_Out__2__SHIFT EQU 1\r
+SCSI_Out__2__SLW EQU CYREG_PRT6_SLW\r
+SCSI_Out__3__AG EQU CYREG_PRT6_AG\r
+SCSI_Out__3__AMUX EQU CYREG_PRT6_AMUX\r
+SCSI_Out__3__BIE EQU CYREG_PRT6_BIE\r
+SCSI_Out__3__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
+SCSI_Out__3__BYP EQU CYREG_PRT6_BYP\r
+SCSI_Out__3__CTL EQU CYREG_PRT6_CTL\r
+SCSI_Out__3__DM0 EQU CYREG_PRT6_DM0\r
+SCSI_Out__3__DM1 EQU CYREG_PRT6_DM1\r
+SCSI_Out__3__DM2 EQU CYREG_PRT6_DM2\r
+SCSI_Out__3__DR EQU CYREG_PRT6_DR\r
+SCSI_Out__3__INP_DIS EQU CYREG_PRT6_INP_DIS\r
+SCSI_Out__3__INTTYPE EQU CYREG_PICU6_INTTYPE0\r
+SCSI_Out__3__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
+SCSI_Out__3__LCD_EN EQU CYREG_PRT6_LCD_EN\r
+SCSI_Out__3__MASK EQU 0x01\r
+SCSI_Out__3__PC EQU CYREG_PRT6_PC0\r
+SCSI_Out__3__PORT EQU 6\r
+SCSI_Out__3__PRT EQU CYREG_PRT6_PRT\r
+SCSI_Out__3__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
+SCSI_Out__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
+SCSI_Out__3__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
+SCSI_Out__3__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
+SCSI_Out__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
+SCSI_Out__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
+SCSI_Out__3__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
+SCSI_Out__3__PS EQU CYREG_PRT6_PS\r
+SCSI_Out__3__SHIFT EQU 0\r
+SCSI_Out__3__SLW EQU CYREG_PRT6_SLW\r
+SCSI_Out__4__AG EQU CYREG_PRT4_AG\r
+SCSI_Out__4__AMUX EQU CYREG_PRT4_AMUX\r
+SCSI_Out__4__BIE EQU CYREG_PRT4_BIE\r
+SCSI_Out__4__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
+SCSI_Out__4__BYP EQU CYREG_PRT4_BYP\r
+SCSI_Out__4__CTL EQU CYREG_PRT4_CTL\r
+SCSI_Out__4__DM0 EQU CYREG_PRT4_DM0\r
+SCSI_Out__4__DM1 EQU CYREG_PRT4_DM1\r
+SCSI_Out__4__DM2 EQU CYREG_PRT4_DM2\r
+SCSI_Out__4__DR EQU CYREG_PRT4_DR\r
+SCSI_Out__4__INP_DIS EQU CYREG_PRT4_INP_DIS\r
+SCSI_Out__4__INTTYPE EQU CYREG_PICU4_INTTYPE5\r
+SCSI_Out__4__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
+SCSI_Out__4__LCD_EN EQU CYREG_PRT4_LCD_EN\r
+SCSI_Out__4__MASK EQU 0x20\r
+SCSI_Out__4__PC EQU CYREG_PRT4_PC5\r
+SCSI_Out__4__PORT EQU 4\r
+SCSI_Out__4__PRT EQU CYREG_PRT4_PRT\r
+SCSI_Out__4__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
+SCSI_Out__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
+SCSI_Out__4__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
+SCSI_Out__4__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
+SCSI_Out__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
+SCSI_Out__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
+SCSI_Out__4__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
+SCSI_Out__4__PS EQU CYREG_PRT4_PS\r
+SCSI_Out__4__SHIFT EQU 5\r
+SCSI_Out__4__SLW EQU CYREG_PRT4_SLW\r
+SCSI_Out__5__AG EQU CYREG_PRT4_AG\r
+SCSI_Out__5__AMUX EQU CYREG_PRT4_AMUX\r
+SCSI_Out__5__BIE EQU CYREG_PRT4_BIE\r
+SCSI_Out__5__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
+SCSI_Out__5__BYP EQU CYREG_PRT4_BYP\r
+SCSI_Out__5__CTL EQU CYREG_PRT4_CTL\r
+SCSI_Out__5__DM0 EQU CYREG_PRT4_DM0\r
+SCSI_Out__5__DM1 EQU CYREG_PRT4_DM1\r
+SCSI_Out__5__DM2 EQU CYREG_PRT4_DM2\r
+SCSI_Out__5__DR EQU CYREG_PRT4_DR\r
+SCSI_Out__5__INP_DIS EQU CYREG_PRT4_INP_DIS\r
+SCSI_Out__5__INTTYPE EQU CYREG_PICU4_INTTYPE4\r
+SCSI_Out__5__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
+SCSI_Out__5__LCD_EN EQU CYREG_PRT4_LCD_EN\r
+SCSI_Out__5__MASK EQU 0x10\r
+SCSI_Out__5__PC EQU CYREG_PRT4_PC4\r
+SCSI_Out__5__PORT EQU 4\r
+SCSI_Out__5__PRT EQU CYREG_PRT4_PRT\r
+SCSI_Out__5__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
+SCSI_Out__5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
+SCSI_Out__5__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
+SCSI_Out__5__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
+SCSI_Out__5__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
+SCSI_Out__5__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
+SCSI_Out__5__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
+SCSI_Out__5__PS EQU CYREG_PRT4_PS\r
+SCSI_Out__5__SHIFT EQU 4\r
+SCSI_Out__5__SLW EQU CYREG_PRT4_SLW\r
+SCSI_Out__6__AG EQU CYREG_PRT0_AG\r
+SCSI_Out__6__AMUX EQU CYREG_PRT0_AMUX\r
+SCSI_Out__6__BIE EQU CYREG_PRT0_BIE\r
+SCSI_Out__6__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
+SCSI_Out__6__BYP EQU CYREG_PRT0_BYP\r
+SCSI_Out__6__CTL EQU CYREG_PRT0_CTL\r
+SCSI_Out__6__DM0 EQU CYREG_PRT0_DM0\r
+SCSI_Out__6__DM1 EQU CYREG_PRT0_DM1\r
+SCSI_Out__6__DM2 EQU CYREG_PRT0_DM2\r
+SCSI_Out__6__DR EQU CYREG_PRT0_DR\r
+SCSI_Out__6__INP_DIS EQU CYREG_PRT0_INP_DIS\r
+SCSI_Out__6__INTTYPE EQU CYREG_PICU0_INTTYPE7\r
+SCSI_Out__6__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
+SCSI_Out__6__LCD_EN EQU CYREG_PRT0_LCD_EN\r
+SCSI_Out__6__MASK EQU 0x80\r
+SCSI_Out__6__PC EQU CYREG_PRT0_PC7\r
+SCSI_Out__6__PORT EQU 0\r
+SCSI_Out__6__PRT EQU CYREG_PRT0_PRT\r
+SCSI_Out__6__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
+SCSI_Out__6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
+SCSI_Out__6__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
+SCSI_Out__6__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
+SCSI_Out__6__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
+SCSI_Out__6__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
+SCSI_Out__6__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
+SCSI_Out__6__PS EQU CYREG_PRT0_PS\r
+SCSI_Out__6__SHIFT EQU 7\r
+SCSI_Out__6__SLW EQU CYREG_PRT0_SLW\r
+SCSI_Out__7__AG EQU CYREG_PRT0_AG\r
+SCSI_Out__7__AMUX EQU CYREG_PRT0_AMUX\r
+SCSI_Out__7__BIE EQU CYREG_PRT0_BIE\r
+SCSI_Out__7__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
+SCSI_Out__7__BYP EQU CYREG_PRT0_BYP\r
+SCSI_Out__7__CTL EQU CYREG_PRT0_CTL\r
+SCSI_Out__7__DM0 EQU CYREG_PRT0_DM0\r
+SCSI_Out__7__DM1 EQU CYREG_PRT0_DM1\r
+SCSI_Out__7__DM2 EQU CYREG_PRT0_DM2\r
+SCSI_Out__7__DR EQU CYREG_PRT0_DR\r
+SCSI_Out__7__INP_DIS EQU CYREG_PRT0_INP_DIS\r
+SCSI_Out__7__INTTYPE EQU CYREG_PICU0_INTTYPE6\r
+SCSI_Out__7__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
+SCSI_Out__7__LCD_EN EQU CYREG_PRT0_LCD_EN\r
+SCSI_Out__7__MASK EQU 0x40\r
+SCSI_Out__7__PC EQU CYREG_PRT0_PC6\r
+SCSI_Out__7__PORT EQU 0\r
+SCSI_Out__7__PRT EQU CYREG_PRT0_PRT\r
+SCSI_Out__7__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
+SCSI_Out__7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
+SCSI_Out__7__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
+SCSI_Out__7__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
+SCSI_Out__7__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
+SCSI_Out__7__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
+SCSI_Out__7__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
+SCSI_Out__7__PS EQU CYREG_PRT0_PS\r
+SCSI_Out__7__SHIFT EQU 6\r
+SCSI_Out__7__SLW EQU CYREG_PRT0_SLW\r
+SCSI_Out__8__AG EQU CYREG_PRT0_AG\r
+SCSI_Out__8__AMUX EQU CYREG_PRT0_AMUX\r
+SCSI_Out__8__BIE EQU CYREG_PRT0_BIE\r
+SCSI_Out__8__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
+SCSI_Out__8__BYP EQU CYREG_PRT0_BYP\r
+SCSI_Out__8__CTL EQU CYREG_PRT0_CTL\r
+SCSI_Out__8__DM0 EQU CYREG_PRT0_DM0\r
+SCSI_Out__8__DM1 EQU CYREG_PRT0_DM1\r
+SCSI_Out__8__DM2 EQU CYREG_PRT0_DM2\r
+SCSI_Out__8__DR EQU CYREG_PRT0_DR\r
+SCSI_Out__8__INP_DIS EQU CYREG_PRT0_INP_DIS\r
+SCSI_Out__8__INTTYPE EQU CYREG_PICU0_INTTYPE3\r
+SCSI_Out__8__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
+SCSI_Out__8__LCD_EN EQU CYREG_PRT0_LCD_EN\r
+SCSI_Out__8__MASK EQU 0x08\r
+SCSI_Out__8__PC EQU CYREG_PRT0_PC3\r
+SCSI_Out__8__PORT EQU 0\r
+SCSI_Out__8__PRT EQU CYREG_PRT0_PRT\r
+SCSI_Out__8__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
+SCSI_Out__8__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
+SCSI_Out__8__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
+SCSI_Out__8__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
+SCSI_Out__8__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
+SCSI_Out__8__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
+SCSI_Out__8__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
+SCSI_Out__8__PS EQU CYREG_PRT0_PS\r
+SCSI_Out__8__SHIFT EQU 3\r
+SCSI_Out__8__SLW EQU CYREG_PRT0_SLW\r
+SCSI_Out__9__AG EQU CYREG_PRT0_AG\r
+SCSI_Out__9__AMUX EQU CYREG_PRT0_AMUX\r
+SCSI_Out__9__BIE EQU CYREG_PRT0_BIE\r
+SCSI_Out__9__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
+SCSI_Out__9__BYP EQU CYREG_PRT0_BYP\r
+SCSI_Out__9__CTL EQU CYREG_PRT0_CTL\r
+SCSI_Out__9__DM0 EQU CYREG_PRT0_DM0\r
+SCSI_Out__9__DM1 EQU CYREG_PRT0_DM1\r
+SCSI_Out__9__DM2 EQU CYREG_PRT0_DM2\r
+SCSI_Out__9__DR EQU CYREG_PRT0_DR\r
+SCSI_Out__9__INP_DIS EQU CYREG_PRT0_INP_DIS\r
+SCSI_Out__9__INTTYPE EQU CYREG_PICU0_INTTYPE2\r
+SCSI_Out__9__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
+SCSI_Out__9__LCD_EN EQU CYREG_PRT0_LCD_EN\r
+SCSI_Out__9__MASK EQU 0x04\r
+SCSI_Out__9__PC EQU CYREG_PRT0_PC2\r
+SCSI_Out__9__PORT EQU 0\r
+SCSI_Out__9__PRT EQU CYREG_PRT0_PRT\r
+SCSI_Out__9__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
+SCSI_Out__9__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
+SCSI_Out__9__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
+SCSI_Out__9__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
+SCSI_Out__9__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
+SCSI_Out__9__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
+SCSI_Out__9__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
+SCSI_Out__9__PS EQU CYREG_PRT0_PS\r
+SCSI_Out__9__SHIFT EQU 2\r
+SCSI_Out__9__SLW EQU CYREG_PRT0_SLW\r
+SCSI_Out__ACK__AG EQU CYREG_PRT6_AG\r
+SCSI_Out__ACK__AMUX EQU CYREG_PRT6_AMUX\r
+SCSI_Out__ACK__BIE EQU CYREG_PRT6_BIE\r
+SCSI_Out__ACK__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
+SCSI_Out__ACK__BYP EQU CYREG_PRT6_BYP\r
+SCSI_Out__ACK__CTL EQU CYREG_PRT6_CTL\r
+SCSI_Out__ACK__DM0 EQU CYREG_PRT6_DM0\r
+SCSI_Out__ACK__DM1 EQU CYREG_PRT6_DM1\r
+SCSI_Out__ACK__DM2 EQU CYREG_PRT6_DM2\r
+SCSI_Out__ACK__DR EQU CYREG_PRT6_DR\r
+SCSI_Out__ACK__INP_DIS EQU CYREG_PRT6_INP_DIS\r
+SCSI_Out__ACK__INTTYPE EQU CYREG_PICU6_INTTYPE0\r
+SCSI_Out__ACK__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
+SCSI_Out__ACK__LCD_EN EQU CYREG_PRT6_LCD_EN\r
+SCSI_Out__ACK__MASK EQU 0x01\r
+SCSI_Out__ACK__PC EQU CYREG_PRT6_PC0\r
+SCSI_Out__ACK__PORT EQU 6\r
+SCSI_Out__ACK__PRT EQU CYREG_PRT6_PRT\r
+SCSI_Out__ACK__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
+SCSI_Out__ACK__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
+SCSI_Out__ACK__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
+SCSI_Out__ACK__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
+SCSI_Out__ACK__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
+SCSI_Out__ACK__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
+SCSI_Out__ACK__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
+SCSI_Out__ACK__PS EQU CYREG_PRT6_PS\r
+SCSI_Out__ACK__SHIFT EQU 0\r
+SCSI_Out__ACK__SLW EQU CYREG_PRT6_SLW\r
+SCSI_Out__ATN__AG EQU CYREG_PRT15_AG\r
+SCSI_Out__ATN__AMUX EQU CYREG_PRT15_AMUX\r
+SCSI_Out__ATN__BIE EQU CYREG_PRT15_BIE\r
+SCSI_Out__ATN__BIT_MASK EQU CYREG_PRT15_BIT_MASK\r
+SCSI_Out__ATN__BYP EQU CYREG_PRT15_BYP\r
+SCSI_Out__ATN__CTL EQU CYREG_PRT15_CTL\r
+SCSI_Out__ATN__DM0 EQU CYREG_PRT15_DM0\r
+SCSI_Out__ATN__DM1 EQU CYREG_PRT15_DM1\r
+SCSI_Out__ATN__DM2 EQU CYREG_PRT15_DM2\r
+SCSI_Out__ATN__DR EQU CYREG_PRT15_DR\r
+SCSI_Out__ATN__INP_DIS EQU CYREG_PRT15_INP_DIS\r
+SCSI_Out__ATN__INTTYPE EQU CYREG_PICU15_INTTYPE4\r
+SCSI_Out__ATN__LCD_COM_SEG EQU CYREG_PRT15_LCD_COM_SEG\r
+SCSI_Out__ATN__LCD_EN EQU CYREG_PRT15_LCD_EN\r
+SCSI_Out__ATN__MASK EQU 0x10\r
+SCSI_Out__ATN__PC EQU CYREG_IO_PC_PRT15_PC4\r
+SCSI_Out__ATN__PORT EQU 15\r
+SCSI_Out__ATN__PRT EQU CYREG_PRT15_PRT\r
+SCSI_Out__ATN__PRTDSI__CAPS_SEL EQU CYREG_PRT15_CAPS_SEL\r
+SCSI_Out__ATN__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT15_DBL_SYNC_IN\r
+SCSI_Out__ATN__PRTDSI__OE_SEL0 EQU CYREG_PRT15_OE_SEL0\r
+SCSI_Out__ATN__PRTDSI__OE_SEL1 EQU CYREG_PRT15_OE_SEL1\r
+SCSI_Out__ATN__PRTDSI__OUT_SEL0 EQU CYREG_PRT15_OUT_SEL0\r
+SCSI_Out__ATN__PRTDSI__OUT_SEL1 EQU CYREG_PRT15_OUT_SEL1\r
+SCSI_Out__ATN__PRTDSI__SYNC_OUT EQU CYREG_PRT15_SYNC_OUT\r
+SCSI_Out__ATN__PS EQU CYREG_PRT15_PS\r
+SCSI_Out__ATN__SHIFT EQU 4\r
+SCSI_Out__ATN__SLW EQU CYREG_PRT15_SLW\r
+SCSI_Out__BSY__AG EQU CYREG_PRT6_AG\r
+SCSI_Out__BSY__AMUX EQU CYREG_PRT6_AMUX\r
+SCSI_Out__BSY__BIE EQU CYREG_PRT6_BIE\r
+SCSI_Out__BSY__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
+SCSI_Out__BSY__BYP EQU CYREG_PRT6_BYP\r
+SCSI_Out__BSY__CTL EQU CYREG_PRT6_CTL\r
+SCSI_Out__BSY__DM0 EQU CYREG_PRT6_DM0\r
+SCSI_Out__BSY__DM1 EQU CYREG_PRT6_DM1\r
+SCSI_Out__BSY__DM2 EQU CYREG_PRT6_DM2\r
+SCSI_Out__BSY__DR EQU CYREG_PRT6_DR\r
+SCSI_Out__BSY__INP_DIS EQU CYREG_PRT6_INP_DIS\r
+SCSI_Out__BSY__INTTYPE EQU CYREG_PICU6_INTTYPE1\r
+SCSI_Out__BSY__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
+SCSI_Out__BSY__LCD_EN EQU CYREG_PRT6_LCD_EN\r
+SCSI_Out__BSY__MASK EQU 0x02\r
+SCSI_Out__BSY__PC EQU CYREG_PRT6_PC1\r
+SCSI_Out__BSY__PORT EQU 6\r
+SCSI_Out__BSY__PRT EQU CYREG_PRT6_PRT\r
+SCSI_Out__BSY__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
+SCSI_Out__BSY__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
+SCSI_Out__BSY__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
+SCSI_Out__BSY__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
+SCSI_Out__BSY__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
+SCSI_Out__BSY__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
+SCSI_Out__BSY__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
+SCSI_Out__BSY__PS EQU CYREG_PRT6_PS\r
+SCSI_Out__BSY__SHIFT EQU 1\r
+SCSI_Out__BSY__SLW EQU CYREG_PRT6_SLW\r
+SCSI_Out__CD_raw__AG EQU CYREG_PRT0_AG\r
+SCSI_Out__CD_raw__AMUX EQU CYREG_PRT0_AMUX\r
+SCSI_Out__CD_raw__BIE EQU CYREG_PRT0_BIE\r
+SCSI_Out__CD_raw__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
+SCSI_Out__CD_raw__BYP EQU CYREG_PRT0_BYP\r
+SCSI_Out__CD_raw__CTL EQU CYREG_PRT0_CTL\r
+SCSI_Out__CD_raw__DM0 EQU CYREG_PRT0_DM0\r
+SCSI_Out__CD_raw__DM1 EQU CYREG_PRT0_DM1\r
+SCSI_Out__CD_raw__DM2 EQU CYREG_PRT0_DM2\r
+SCSI_Out__CD_raw__DR EQU CYREG_PRT0_DR\r
+SCSI_Out__CD_raw__INP_DIS EQU CYREG_PRT0_INP_DIS\r
+SCSI_Out__CD_raw__INTTYPE EQU CYREG_PICU0_INTTYPE6\r
+SCSI_Out__CD_raw__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
+SCSI_Out__CD_raw__LCD_EN EQU CYREG_PRT0_LCD_EN\r
+SCSI_Out__CD_raw__MASK EQU 0x40\r
+SCSI_Out__CD_raw__PC EQU CYREG_PRT0_PC6\r
+SCSI_Out__CD_raw__PORT EQU 0\r
+SCSI_Out__CD_raw__PRT EQU CYREG_PRT0_PRT\r
+SCSI_Out__CD_raw__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
+SCSI_Out__CD_raw__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
+SCSI_Out__CD_raw__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
+SCSI_Out__CD_raw__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
+SCSI_Out__CD_raw__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
+SCSI_Out__CD_raw__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
+SCSI_Out__CD_raw__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
+SCSI_Out__CD_raw__PS EQU CYREG_PRT0_PS\r
+SCSI_Out__CD_raw__SHIFT EQU 6\r
+SCSI_Out__CD_raw__SLW EQU CYREG_PRT0_SLW\r
+SCSI_Out__DBP_raw__AG EQU CYREG_PRT15_AG\r
+SCSI_Out__DBP_raw__AMUX EQU CYREG_PRT15_AMUX\r
+SCSI_Out__DBP_raw__BIE EQU CYREG_PRT15_BIE\r
+SCSI_Out__DBP_raw__BIT_MASK EQU CYREG_PRT15_BIT_MASK\r
+SCSI_Out__DBP_raw__BYP EQU CYREG_PRT15_BYP\r
+SCSI_Out__DBP_raw__CTL EQU CYREG_PRT15_CTL\r
+SCSI_Out__DBP_raw__DM0 EQU CYREG_PRT15_DM0\r
+SCSI_Out__DBP_raw__DM1 EQU CYREG_PRT15_DM1\r
+SCSI_Out__DBP_raw__DM2 EQU CYREG_PRT15_DM2\r
+SCSI_Out__DBP_raw__DR EQU CYREG_PRT15_DR\r
+SCSI_Out__DBP_raw__INP_DIS EQU CYREG_PRT15_INP_DIS\r
+SCSI_Out__DBP_raw__INTTYPE EQU CYREG_PICU15_INTTYPE5\r
+SCSI_Out__DBP_raw__LCD_COM_SEG EQU CYREG_PRT15_LCD_COM_SEG\r
+SCSI_Out__DBP_raw__LCD_EN EQU CYREG_PRT15_LCD_EN\r
+SCSI_Out__DBP_raw__MASK EQU 0x20\r
+SCSI_Out__DBP_raw__PC EQU CYREG_IO_PC_PRT15_PC5\r
+SCSI_Out__DBP_raw__PORT EQU 15\r
+SCSI_Out__DBP_raw__PRT EQU CYREG_PRT15_PRT\r
+SCSI_Out__DBP_raw__PRTDSI__CAPS_SEL EQU CYREG_PRT15_CAPS_SEL\r
+SCSI_Out__DBP_raw__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT15_DBL_SYNC_IN\r
+SCSI_Out__DBP_raw__PRTDSI__OE_SEL0 EQU CYREG_PRT15_OE_SEL0\r
+SCSI_Out__DBP_raw__PRTDSI__OE_SEL1 EQU CYREG_PRT15_OE_SEL1\r
+SCSI_Out__DBP_raw__PRTDSI__OUT_SEL0 EQU CYREG_PRT15_OUT_SEL0\r
+SCSI_Out__DBP_raw__PRTDSI__OUT_SEL1 EQU CYREG_PRT15_OUT_SEL1\r
+SCSI_Out__DBP_raw__PRTDSI__SYNC_OUT EQU CYREG_PRT15_SYNC_OUT\r
+SCSI_Out__DBP_raw__PS EQU CYREG_PRT15_PS\r
+SCSI_Out__DBP_raw__SHIFT EQU 5\r
+SCSI_Out__DBP_raw__SLW EQU CYREG_PRT15_SLW\r
+SCSI_Out__IO_raw__AG EQU CYREG_PRT0_AG\r
+SCSI_Out__IO_raw__AMUX EQU CYREG_PRT0_AMUX\r
+SCSI_Out__IO_raw__BIE EQU CYREG_PRT0_BIE\r
+SCSI_Out__IO_raw__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
+SCSI_Out__IO_raw__BYP EQU CYREG_PRT0_BYP\r
+SCSI_Out__IO_raw__CTL EQU CYREG_PRT0_CTL\r
+SCSI_Out__IO_raw__DM0 EQU CYREG_PRT0_DM0\r
+SCSI_Out__IO_raw__DM1 EQU CYREG_PRT0_DM1\r
+SCSI_Out__IO_raw__DM2 EQU CYREG_PRT0_DM2\r
+SCSI_Out__IO_raw__DR EQU CYREG_PRT0_DR\r
+SCSI_Out__IO_raw__INP_DIS EQU CYREG_PRT0_INP_DIS\r
+SCSI_Out__IO_raw__INTTYPE EQU CYREG_PICU0_INTTYPE2\r
+SCSI_Out__IO_raw__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
+SCSI_Out__IO_raw__LCD_EN EQU CYREG_PRT0_LCD_EN\r
+SCSI_Out__IO_raw__MASK EQU 0x04\r
+SCSI_Out__IO_raw__PC EQU CYREG_PRT0_PC2\r
+SCSI_Out__IO_raw__PORT EQU 0\r
+SCSI_Out__IO_raw__PRT EQU CYREG_PRT0_PRT\r
+SCSI_Out__IO_raw__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
+SCSI_Out__IO_raw__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
+SCSI_Out__IO_raw__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
+SCSI_Out__IO_raw__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
+SCSI_Out__IO_raw__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
+SCSI_Out__IO_raw__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
+SCSI_Out__IO_raw__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
+SCSI_Out__IO_raw__PS EQU CYREG_PRT0_PS\r
+SCSI_Out__IO_raw__SHIFT EQU 2\r
+SCSI_Out__IO_raw__SLW EQU CYREG_PRT0_SLW\r
+SCSI_Out__MSG_raw__AG EQU CYREG_PRT4_AG\r
+SCSI_Out__MSG_raw__AMUX EQU CYREG_PRT4_AMUX\r
+SCSI_Out__MSG_raw__BIE EQU CYREG_PRT4_BIE\r
+SCSI_Out__MSG_raw__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
+SCSI_Out__MSG_raw__BYP EQU CYREG_PRT4_BYP\r
+SCSI_Out__MSG_raw__CTL EQU CYREG_PRT4_CTL\r
+SCSI_Out__MSG_raw__DM0 EQU CYREG_PRT4_DM0\r
+SCSI_Out__MSG_raw__DM1 EQU CYREG_PRT4_DM1\r
+SCSI_Out__MSG_raw__DM2 EQU CYREG_PRT4_DM2\r
+SCSI_Out__MSG_raw__DR EQU CYREG_PRT4_DR\r
+SCSI_Out__MSG_raw__INP_DIS EQU CYREG_PRT4_INP_DIS\r
+SCSI_Out__MSG_raw__INTTYPE EQU CYREG_PICU4_INTTYPE4\r
+SCSI_Out__MSG_raw__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
+SCSI_Out__MSG_raw__LCD_EN EQU CYREG_PRT4_LCD_EN\r
+SCSI_Out__MSG_raw__MASK EQU 0x10\r
+SCSI_Out__MSG_raw__PC EQU CYREG_PRT4_PC4\r
+SCSI_Out__MSG_raw__PORT EQU 4\r
+SCSI_Out__MSG_raw__PRT EQU CYREG_PRT4_PRT\r
+SCSI_Out__MSG_raw__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
+SCSI_Out__MSG_raw__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
+SCSI_Out__MSG_raw__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
+SCSI_Out__MSG_raw__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
+SCSI_Out__MSG_raw__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
+SCSI_Out__MSG_raw__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
+SCSI_Out__MSG_raw__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
+SCSI_Out__MSG_raw__PS EQU CYREG_PRT4_PS\r
+SCSI_Out__MSG_raw__SHIFT EQU 4\r
+SCSI_Out__MSG_raw__SLW EQU CYREG_PRT4_SLW\r
+SCSI_Out__REQ__AG EQU CYREG_PRT0_AG\r
+SCSI_Out__REQ__AMUX EQU CYREG_PRT0_AMUX\r
+SCSI_Out__REQ__BIE EQU CYREG_PRT0_BIE\r
+SCSI_Out__REQ__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
+SCSI_Out__REQ__BYP EQU CYREG_PRT0_BYP\r
+SCSI_Out__REQ__CTL EQU CYREG_PRT0_CTL\r
+SCSI_Out__REQ__DM0 EQU CYREG_PRT0_DM0\r
+SCSI_Out__REQ__DM1 EQU CYREG_PRT0_DM1\r
+SCSI_Out__REQ__DM2 EQU CYREG_PRT0_DM2\r
+SCSI_Out__REQ__DR EQU CYREG_PRT0_DR\r
+SCSI_Out__REQ__INP_DIS EQU CYREG_PRT0_INP_DIS\r
+SCSI_Out__REQ__INTTYPE EQU CYREG_PICU0_INTTYPE3\r
+SCSI_Out__REQ__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
+SCSI_Out__REQ__LCD_EN EQU CYREG_PRT0_LCD_EN\r
+SCSI_Out__REQ__MASK EQU 0x08\r
+SCSI_Out__REQ__PC EQU CYREG_PRT0_PC3\r
+SCSI_Out__REQ__PORT EQU 0\r
+SCSI_Out__REQ__PRT EQU CYREG_PRT0_PRT\r
+SCSI_Out__REQ__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
+SCSI_Out__REQ__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
+SCSI_Out__REQ__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
+SCSI_Out__REQ__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
+SCSI_Out__REQ__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
+SCSI_Out__REQ__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
+SCSI_Out__REQ__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
+SCSI_Out__REQ__PS EQU CYREG_PRT0_PS\r
+SCSI_Out__REQ__SHIFT EQU 3\r
+SCSI_Out__REQ__SLW EQU CYREG_PRT0_SLW\r
+SCSI_Out__RST__AG EQU CYREG_PRT4_AG\r
+SCSI_Out__RST__AMUX EQU CYREG_PRT4_AMUX\r
+SCSI_Out__RST__BIE EQU CYREG_PRT4_BIE\r
+SCSI_Out__RST__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
+SCSI_Out__RST__BYP EQU CYREG_PRT4_BYP\r
+SCSI_Out__RST__CTL EQU CYREG_PRT4_CTL\r
+SCSI_Out__RST__DM0 EQU CYREG_PRT4_DM0\r
+SCSI_Out__RST__DM1 EQU CYREG_PRT4_DM1\r
+SCSI_Out__RST__DM2 EQU CYREG_PRT4_DM2\r
+SCSI_Out__RST__DR EQU CYREG_PRT4_DR\r
+SCSI_Out__RST__INP_DIS EQU CYREG_PRT4_INP_DIS\r
+SCSI_Out__RST__INTTYPE EQU CYREG_PICU4_INTTYPE5\r
+SCSI_Out__RST__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
+SCSI_Out__RST__LCD_EN EQU CYREG_PRT4_LCD_EN\r
+SCSI_Out__RST__MASK EQU 0x20\r
+SCSI_Out__RST__PC EQU CYREG_PRT4_PC5\r
+SCSI_Out__RST__PORT EQU 4\r
+SCSI_Out__RST__PRT EQU CYREG_PRT4_PRT\r
+SCSI_Out__RST__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
+SCSI_Out__RST__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
+SCSI_Out__RST__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
+SCSI_Out__RST__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
+SCSI_Out__RST__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
+SCSI_Out__RST__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
+SCSI_Out__RST__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
+SCSI_Out__RST__PS EQU CYREG_PRT4_PS\r
+SCSI_Out__RST__SHIFT EQU 5\r
+SCSI_Out__RST__SLW EQU CYREG_PRT4_SLW\r
+SCSI_Out__SEL__AG EQU CYREG_PRT0_AG\r
+SCSI_Out__SEL__AMUX EQU CYREG_PRT0_AMUX\r
+SCSI_Out__SEL__BIE EQU CYREG_PRT0_BIE\r
+SCSI_Out__SEL__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
+SCSI_Out__SEL__BYP EQU CYREG_PRT0_BYP\r
+SCSI_Out__SEL__CTL EQU CYREG_PRT0_CTL\r
+SCSI_Out__SEL__DM0 EQU CYREG_PRT0_DM0\r
+SCSI_Out__SEL__DM1 EQU CYREG_PRT0_DM1\r
+SCSI_Out__SEL__DM2 EQU CYREG_PRT0_DM2\r
+SCSI_Out__SEL__DR EQU CYREG_PRT0_DR\r
+SCSI_Out__SEL__INP_DIS EQU CYREG_PRT0_INP_DIS\r
+SCSI_Out__SEL__INTTYPE EQU CYREG_PICU0_INTTYPE7\r
+SCSI_Out__SEL__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
+SCSI_Out__SEL__LCD_EN EQU CYREG_PRT0_LCD_EN\r
+SCSI_Out__SEL__MASK EQU 0x80\r
+SCSI_Out__SEL__PC EQU CYREG_PRT0_PC7\r
+SCSI_Out__SEL__PORT EQU 0\r
+SCSI_Out__SEL__PRT EQU CYREG_PRT0_PRT\r
+SCSI_Out__SEL__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
+SCSI_Out__SEL__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
+SCSI_Out__SEL__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
+SCSI_Out__SEL__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
+SCSI_Out__SEL__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
+SCSI_Out__SEL__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
+SCSI_Out__SEL__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
+SCSI_Out__SEL__PS EQU CYREG_PRT0_PS\r
+SCSI_Out__SEL__SHIFT EQU 7\r
+SCSI_Out__SEL__SLW EQU CYREG_PRT0_SLW\r
+SCSI_Out_Bits_Sync_ctrl_reg__0__MASK EQU 0x01\r
+SCSI_Out_Bits_Sync_ctrl_reg__0__POS EQU 0\r
+SCSI_Out_Bits_Sync_ctrl_reg__1__MASK EQU 0x02\r
+SCSI_Out_Bits_Sync_ctrl_reg__1__POS EQU 1\r
+SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB10_11_ACTL\r
+SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB10_11_CTL\r
+SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB10_11_CTL\r
+SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB10_11_CTL\r
+SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB10_11_CTL\r
+SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB10_11_MSK\r
+SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB10_11_MSK\r
+SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB10_11_MSK\r
+SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB10_11_MSK\r
+SCSI_Out_Bits_Sync_ctrl_reg__2__MASK EQU 0x04\r
+SCSI_Out_Bits_Sync_ctrl_reg__2__POS EQU 2\r
+SCSI_Out_Bits_Sync_ctrl_reg__3__MASK EQU 0x08\r
+SCSI_Out_Bits_Sync_ctrl_reg__3__POS EQU 3\r
+SCSI_Out_Bits_Sync_ctrl_reg__4__MASK EQU 0x10\r
+SCSI_Out_Bits_Sync_ctrl_reg__4__POS EQU 4\r
+SCSI_Out_Bits_Sync_ctrl_reg__5__MASK EQU 0x20\r
+SCSI_Out_Bits_Sync_ctrl_reg__5__POS EQU 5\r
+SCSI_Out_Bits_Sync_ctrl_reg__6__MASK EQU 0x40\r
+SCSI_Out_Bits_Sync_ctrl_reg__6__POS EQU 6\r
+SCSI_Out_Bits_Sync_ctrl_reg__7__MASK EQU 0x80\r
+SCSI_Out_Bits_Sync_ctrl_reg__7__POS EQU 7\r
+SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB10_ACTL\r
+SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB10_CTL\r
+SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB10_ST_CTL\r
+SCSI_Out_Bits_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB10_CTL\r
+SCSI_Out_Bits_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB10_ST_CTL\r
+SCSI_Out_Bits_Sync_ctrl_reg__MASK EQU 0xFF\r
+SCSI_Out_Bits_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB10_MSK_ACTL\r
+SCSI_Out_Bits_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB10_MSK_ACTL\r
+SCSI_Out_Bits_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB10_MSK\r
+SCSI_Out_Ctl_Sync_ctrl_reg__0__MASK EQU 0x01\r
+SCSI_Out_Ctl_Sync_ctrl_reg__0__POS EQU 0\r
+SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB07_08_ACTL\r
+SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB07_08_CTL\r
+SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB07_08_CTL\r
+SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB07_08_CTL\r
+SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB07_08_CTL\r
+SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB07_08_MSK\r
+SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB07_08_MSK\r
+SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB07_08_MSK\r
+SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB07_08_MSK\r
+SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB07_ACTL\r
+SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB07_CTL\r
+SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB07_ST_CTL\r
+SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB07_CTL\r
+SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB07_ST_CTL\r
+SCSI_Out_Ctl_Sync_ctrl_reg__MASK EQU 0x01\r
+SCSI_Out_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB07_MSK_ACTL\r
+SCSI_Out_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB07_MSK_ACTL\r
+SCSI_Out_Ctl_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB07_MSK\r
+SCSI_Out_DBx__0__AG EQU CYREG_PRT5_AG\r
+SCSI_Out_DBx__0__AMUX EQU CYREG_PRT5_AMUX\r
+SCSI_Out_DBx__0__BIE EQU CYREG_PRT5_BIE\r
+SCSI_Out_DBx__0__BIT_MASK EQU CYREG_PRT5_BIT_MASK\r
+SCSI_Out_DBx__0__BYP EQU CYREG_PRT5_BYP\r
+SCSI_Out_DBx__0__CTL EQU CYREG_PRT5_CTL\r
+SCSI_Out_DBx__0__DM0 EQU CYREG_PRT5_DM0\r
+SCSI_Out_DBx__0__DM1 EQU CYREG_PRT5_DM1\r
+SCSI_Out_DBx__0__DM2 EQU CYREG_PRT5_DM2\r
+SCSI_Out_DBx__0__DR EQU CYREG_PRT5_DR\r
+SCSI_Out_DBx__0__INP_DIS EQU CYREG_PRT5_INP_DIS\r
+SCSI_Out_DBx__0__INTTYPE EQU CYREG_PICU5_INTTYPE1\r
+SCSI_Out_DBx__0__LCD_COM_SEG EQU CYREG_PRT5_LCD_COM_SEG\r
+SCSI_Out_DBx__0__LCD_EN EQU CYREG_PRT5_LCD_EN\r
+SCSI_Out_DBx__0__MASK EQU 0x02\r
+SCSI_Out_DBx__0__PC EQU CYREG_PRT5_PC1\r
+SCSI_Out_DBx__0__PORT EQU 5\r
+SCSI_Out_DBx__0__PRT EQU CYREG_PRT5_PRT\r
+SCSI_Out_DBx__0__PRTDSI__CAPS_SEL EQU CYREG_PRT5_CAPS_SEL\r
+SCSI_Out_DBx__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT5_DBL_SYNC_IN\r
+SCSI_Out_DBx__0__PRTDSI__OE_SEL0 EQU CYREG_PRT5_OE_SEL0\r
+SCSI_Out_DBx__0__PRTDSI__OE_SEL1 EQU CYREG_PRT5_OE_SEL1\r
+SCSI_Out_DBx__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT5_OUT_SEL0\r
+SCSI_Out_DBx__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT5_OUT_SEL1\r
+SCSI_Out_DBx__0__PRTDSI__SYNC_OUT EQU CYREG_PRT5_SYNC_OUT\r
+SCSI_Out_DBx__0__PS EQU CYREG_PRT5_PS\r
+SCSI_Out_DBx__0__SHIFT EQU 1\r
+SCSI_Out_DBx__0__SLW EQU CYREG_PRT5_SLW\r
+SCSI_Out_DBx__1__AG EQU CYREG_PRT5_AG\r
+SCSI_Out_DBx__1__AMUX EQU CYREG_PRT5_AMUX\r
+SCSI_Out_DBx__1__BIE EQU CYREG_PRT5_BIE\r
+SCSI_Out_DBx__1__BIT_MASK EQU CYREG_PRT5_BIT_MASK\r
+SCSI_Out_DBx__1__BYP EQU CYREG_PRT5_BYP\r
+SCSI_Out_DBx__1__CTL EQU CYREG_PRT5_CTL\r
+SCSI_Out_DBx__1__DM0 EQU CYREG_PRT5_DM0\r
+SCSI_Out_DBx__1__DM1 EQU CYREG_PRT5_DM1\r
+SCSI_Out_DBx__1__DM2 EQU CYREG_PRT5_DM2\r
+SCSI_Out_DBx__1__DR EQU CYREG_PRT5_DR\r
+SCSI_Out_DBx__1__INP_DIS EQU CYREG_PRT5_INP_DIS\r
+SCSI_Out_DBx__1__INTTYPE EQU CYREG_PICU5_INTTYPE0\r
+SCSI_Out_DBx__1__LCD_COM_SEG EQU CYREG_PRT5_LCD_COM_SEG\r
+SCSI_Out_DBx__1__LCD_EN EQU CYREG_PRT5_LCD_EN\r
+SCSI_Out_DBx__1__MASK EQU 0x01\r
+SCSI_Out_DBx__1__PC EQU CYREG_PRT5_PC0\r
+SCSI_Out_DBx__1__PORT EQU 5\r
+SCSI_Out_DBx__1__PRT EQU CYREG_PRT5_PRT\r
+SCSI_Out_DBx__1__PRTDSI__CAPS_SEL EQU CYREG_PRT5_CAPS_SEL\r
+SCSI_Out_DBx__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT5_DBL_SYNC_IN\r
+SCSI_Out_DBx__1__PRTDSI__OE_SEL0 EQU CYREG_PRT5_OE_SEL0\r
+SCSI_Out_DBx__1__PRTDSI__OE_SEL1 EQU CYREG_PRT5_OE_SEL1\r
+SCSI_Out_DBx__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT5_OUT_SEL0\r
+SCSI_Out_DBx__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT5_OUT_SEL1\r
+SCSI_Out_DBx__1__PRTDSI__SYNC_OUT EQU CYREG_PRT5_SYNC_OUT\r
+SCSI_Out_DBx__1__PS EQU CYREG_PRT5_PS\r
+SCSI_Out_DBx__1__SHIFT EQU 0\r
+SCSI_Out_DBx__1__SLW EQU CYREG_PRT5_SLW\r
+SCSI_Out_DBx__2__AG EQU CYREG_PRT6_AG\r
+SCSI_Out_DBx__2__AMUX EQU CYREG_PRT6_AMUX\r
+SCSI_Out_DBx__2__BIE EQU CYREG_PRT6_BIE\r
+SCSI_Out_DBx__2__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
+SCSI_Out_DBx__2__BYP EQU CYREG_PRT6_BYP\r
+SCSI_Out_DBx__2__CTL EQU CYREG_PRT6_CTL\r
+SCSI_Out_DBx__2__DM0 EQU CYREG_PRT6_DM0\r
+SCSI_Out_DBx__2__DM1 EQU CYREG_PRT6_DM1\r
+SCSI_Out_DBx__2__DM2 EQU CYREG_PRT6_DM2\r
+SCSI_Out_DBx__2__DR EQU CYREG_PRT6_DR\r
+SCSI_Out_DBx__2__INP_DIS EQU CYREG_PRT6_INP_DIS\r
+SCSI_Out_DBx__2__INTTYPE EQU CYREG_PICU6_INTTYPE5\r
+SCSI_Out_DBx__2__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
+SCSI_Out_DBx__2__LCD_EN EQU CYREG_PRT6_LCD_EN\r
+SCSI_Out_DBx__2__MASK EQU 0x20\r
+SCSI_Out_DBx__2__PC EQU CYREG_PRT6_PC5\r
+SCSI_Out_DBx__2__PORT EQU 6\r
+SCSI_Out_DBx__2__PRT EQU CYREG_PRT6_PRT\r
+SCSI_Out_DBx__2__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
+SCSI_Out_DBx__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
+SCSI_Out_DBx__2__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
+SCSI_Out_DBx__2__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
+SCSI_Out_DBx__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
+SCSI_Out_DBx__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
+SCSI_Out_DBx__2__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
+SCSI_Out_DBx__2__PS EQU CYREG_PRT6_PS\r
+SCSI_Out_DBx__2__SHIFT EQU 5\r
+SCSI_Out_DBx__2__SLW EQU CYREG_PRT6_SLW\r
+SCSI_Out_DBx__3__AG EQU CYREG_PRT6_AG\r
+SCSI_Out_DBx__3__AMUX EQU CYREG_PRT6_AMUX\r
+SCSI_Out_DBx__3__BIE EQU CYREG_PRT6_BIE\r
+SCSI_Out_DBx__3__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
+SCSI_Out_DBx__3__BYP EQU CYREG_PRT6_BYP\r
+SCSI_Out_DBx__3__CTL EQU CYREG_PRT6_CTL\r
+SCSI_Out_DBx__3__DM0 EQU CYREG_PRT6_DM0\r
+SCSI_Out_DBx__3__DM1 EQU CYREG_PRT6_DM1\r
+SCSI_Out_DBx__3__DM2 EQU CYREG_PRT6_DM2\r
+SCSI_Out_DBx__3__DR EQU CYREG_PRT6_DR\r
+SCSI_Out_DBx__3__INP_DIS EQU CYREG_PRT6_INP_DIS\r
+SCSI_Out_DBx__3__INTTYPE EQU CYREG_PICU6_INTTYPE4\r
+SCSI_Out_DBx__3__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
+SCSI_Out_DBx__3__LCD_EN EQU CYREG_PRT6_LCD_EN\r
+SCSI_Out_DBx__3__MASK EQU 0x10\r
+SCSI_Out_DBx__3__PC EQU CYREG_PRT6_PC4\r
+SCSI_Out_DBx__3__PORT EQU 6\r
+SCSI_Out_DBx__3__PRT EQU CYREG_PRT6_PRT\r
+SCSI_Out_DBx__3__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
+SCSI_Out_DBx__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
+SCSI_Out_DBx__3__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
+SCSI_Out_DBx__3__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
+SCSI_Out_DBx__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
+SCSI_Out_DBx__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
+SCSI_Out_DBx__3__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
+SCSI_Out_DBx__3__PS EQU CYREG_PRT6_PS\r
+SCSI_Out_DBx__3__SHIFT EQU 4\r
+SCSI_Out_DBx__3__SLW EQU CYREG_PRT6_SLW\r
+SCSI_Out_DBx__4__AG EQU CYREG_PRT2_AG\r
+SCSI_Out_DBx__4__AMUX EQU CYREG_PRT2_AMUX\r
+SCSI_Out_DBx__4__BIE EQU CYREG_PRT2_BIE\r
+SCSI_Out_DBx__4__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
+SCSI_Out_DBx__4__BYP EQU CYREG_PRT2_BYP\r
+SCSI_Out_DBx__4__CTL EQU CYREG_PRT2_CTL\r
+SCSI_Out_DBx__4__DM0 EQU CYREG_PRT2_DM0\r
+SCSI_Out_DBx__4__DM1 EQU CYREG_PRT2_DM1\r
+SCSI_Out_DBx__4__DM2 EQU CYREG_PRT2_DM2\r
+SCSI_Out_DBx__4__DR EQU CYREG_PRT2_DR\r
+SCSI_Out_DBx__4__INP_DIS EQU CYREG_PRT2_INP_DIS\r
+SCSI_Out_DBx__4__INTTYPE EQU CYREG_PICU2_INTTYPE7\r
+SCSI_Out_DBx__4__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
+SCSI_Out_DBx__4__LCD_EN EQU CYREG_PRT2_LCD_EN\r
+SCSI_Out_DBx__4__MASK EQU 0x80\r
+SCSI_Out_DBx__4__PC EQU CYREG_PRT2_PC7\r
+SCSI_Out_DBx__4__PORT EQU 2\r
+SCSI_Out_DBx__4__PRT EQU CYREG_PRT2_PRT\r
+SCSI_Out_DBx__4__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
+SCSI_Out_DBx__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
+SCSI_Out_DBx__4__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
+SCSI_Out_DBx__4__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
+SCSI_Out_DBx__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
+SCSI_Out_DBx__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
+SCSI_Out_DBx__4__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
+SCSI_Out_DBx__4__PS EQU CYREG_PRT2_PS\r
+SCSI_Out_DBx__4__SHIFT EQU 7\r
+SCSI_Out_DBx__4__SLW EQU CYREG_PRT2_SLW\r
+SCSI_Out_DBx__5__AG EQU CYREG_PRT2_AG\r
+SCSI_Out_DBx__5__AMUX EQU CYREG_PRT2_AMUX\r
+SCSI_Out_DBx__5__BIE EQU CYREG_PRT2_BIE\r
+SCSI_Out_DBx__5__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
+SCSI_Out_DBx__5__BYP EQU CYREG_PRT2_BYP\r
+SCSI_Out_DBx__5__CTL EQU CYREG_PRT2_CTL\r
+SCSI_Out_DBx__5__DM0 EQU CYREG_PRT2_DM0\r
+SCSI_Out_DBx__5__DM1 EQU CYREG_PRT2_DM1\r
+SCSI_Out_DBx__5__DM2 EQU CYREG_PRT2_DM2\r
+SCSI_Out_DBx__5__DR EQU CYREG_PRT2_DR\r
+SCSI_Out_DBx__5__INP_DIS EQU CYREG_PRT2_INP_DIS\r
+SCSI_Out_DBx__5__INTTYPE EQU CYREG_PICU2_INTTYPE6\r
+SCSI_Out_DBx__5__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
+SCSI_Out_DBx__5__LCD_EN EQU CYREG_PRT2_LCD_EN\r
+SCSI_Out_DBx__5__MASK EQU 0x40\r
+SCSI_Out_DBx__5__PC EQU CYREG_PRT2_PC6\r
+SCSI_Out_DBx__5__PORT EQU 2\r
+SCSI_Out_DBx__5__PRT EQU CYREG_PRT2_PRT\r
+SCSI_Out_DBx__5__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
+SCSI_Out_DBx__5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
+SCSI_Out_DBx__5__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
+SCSI_Out_DBx__5__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
+SCSI_Out_DBx__5__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
+SCSI_Out_DBx__5__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
+SCSI_Out_DBx__5__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
+SCSI_Out_DBx__5__PS EQU CYREG_PRT2_PS\r
+SCSI_Out_DBx__5__SHIFT EQU 6\r
+SCSI_Out_DBx__5__SLW EQU CYREG_PRT2_SLW\r
+SCSI_Out_DBx__6__AG EQU CYREG_PRT2_AG\r
+SCSI_Out_DBx__6__AMUX EQU CYREG_PRT2_AMUX\r
+SCSI_Out_DBx__6__BIE EQU CYREG_PRT2_BIE\r
+SCSI_Out_DBx__6__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
+SCSI_Out_DBx__6__BYP EQU CYREG_PRT2_BYP\r
+SCSI_Out_DBx__6__CTL EQU CYREG_PRT2_CTL\r
+SCSI_Out_DBx__6__DM0 EQU CYREG_PRT2_DM0\r
+SCSI_Out_DBx__6__DM1 EQU CYREG_PRT2_DM1\r
+SCSI_Out_DBx__6__DM2 EQU CYREG_PRT2_DM2\r
+SCSI_Out_DBx__6__DR EQU CYREG_PRT2_DR\r
+SCSI_Out_DBx__6__INP_DIS EQU CYREG_PRT2_INP_DIS\r
+SCSI_Out_DBx__6__INTTYPE EQU CYREG_PICU2_INTTYPE3\r
+SCSI_Out_DBx__6__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
+SCSI_Out_DBx__6__LCD_EN EQU CYREG_PRT2_LCD_EN\r
+SCSI_Out_DBx__6__MASK EQU 0x08\r
+SCSI_Out_DBx__6__PC EQU CYREG_PRT2_PC3\r
+SCSI_Out_DBx__6__PORT EQU 2\r
+SCSI_Out_DBx__6__PRT EQU CYREG_PRT2_PRT\r
+SCSI_Out_DBx__6__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
+SCSI_Out_DBx__6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
+SCSI_Out_DBx__6__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
+SCSI_Out_DBx__6__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
+SCSI_Out_DBx__6__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
+SCSI_Out_DBx__6__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
+SCSI_Out_DBx__6__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
+SCSI_Out_DBx__6__PS EQU CYREG_PRT2_PS\r
+SCSI_Out_DBx__6__SHIFT EQU 3\r
+SCSI_Out_DBx__6__SLW EQU CYREG_PRT2_SLW\r
+SCSI_Out_DBx__7__AG EQU CYREG_PRT2_AG\r
+SCSI_Out_DBx__7__AMUX EQU CYREG_PRT2_AMUX\r
+SCSI_Out_DBx__7__BIE EQU CYREG_PRT2_BIE\r
+SCSI_Out_DBx__7__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
+SCSI_Out_DBx__7__BYP EQU CYREG_PRT2_BYP\r
+SCSI_Out_DBx__7__CTL EQU CYREG_PRT2_CTL\r
+SCSI_Out_DBx__7__DM0 EQU CYREG_PRT2_DM0\r
+SCSI_Out_DBx__7__DM1 EQU CYREG_PRT2_DM1\r
+SCSI_Out_DBx__7__DM2 EQU CYREG_PRT2_DM2\r
+SCSI_Out_DBx__7__DR EQU CYREG_PRT2_DR\r
+SCSI_Out_DBx__7__INP_DIS EQU CYREG_PRT2_INP_DIS\r
+SCSI_Out_DBx__7__INTTYPE EQU CYREG_PICU2_INTTYPE2\r
+SCSI_Out_DBx__7__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
+SCSI_Out_DBx__7__LCD_EN EQU CYREG_PRT2_LCD_EN\r
+SCSI_Out_DBx__7__MASK EQU 0x04\r
+SCSI_Out_DBx__7__PC EQU CYREG_PRT2_PC2\r
+SCSI_Out_DBx__7__PORT EQU 2\r
+SCSI_Out_DBx__7__PRT EQU CYREG_PRT2_PRT\r
+SCSI_Out_DBx__7__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
+SCSI_Out_DBx__7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
+SCSI_Out_DBx__7__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
+SCSI_Out_DBx__7__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
+SCSI_Out_DBx__7__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
+SCSI_Out_DBx__7__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
+SCSI_Out_DBx__7__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
+SCSI_Out_DBx__7__PS EQU CYREG_PRT2_PS\r
+SCSI_Out_DBx__7__SHIFT EQU 2\r
+SCSI_Out_DBx__7__SLW EQU CYREG_PRT2_SLW\r
+SCSI_Out_DBx__DB0__AG EQU CYREG_PRT5_AG\r
+SCSI_Out_DBx__DB0__AMUX EQU CYREG_PRT5_AMUX\r
+SCSI_Out_DBx__DB0__BIE EQU CYREG_PRT5_BIE\r
+SCSI_Out_DBx__DB0__BIT_MASK EQU CYREG_PRT5_BIT_MASK\r
+SCSI_Out_DBx__DB0__BYP EQU CYREG_PRT5_BYP\r
+SCSI_Out_DBx__DB0__CTL EQU CYREG_PRT5_CTL\r
+SCSI_Out_DBx__DB0__DM0 EQU CYREG_PRT5_DM0\r
+SCSI_Out_DBx__DB0__DM1 EQU CYREG_PRT5_DM1\r
+SCSI_Out_DBx__DB0__DM2 EQU CYREG_PRT5_DM2\r
+SCSI_Out_DBx__DB0__DR EQU CYREG_PRT5_DR\r
+SCSI_Out_DBx__DB0__INP_DIS EQU CYREG_PRT5_INP_DIS\r
+SCSI_Out_DBx__DB0__INTTYPE EQU CYREG_PICU5_INTTYPE1\r
+SCSI_Out_DBx__DB0__LCD_COM_SEG EQU CYREG_PRT5_LCD_COM_SEG\r
+SCSI_Out_DBx__DB0__LCD_EN EQU CYREG_PRT5_LCD_EN\r
+SCSI_Out_DBx__DB0__MASK EQU 0x02\r
+SCSI_Out_DBx__DB0__PC EQU CYREG_PRT5_PC1\r
+SCSI_Out_DBx__DB0__PORT EQU 5\r
+SCSI_Out_DBx__DB0__PRT EQU CYREG_PRT5_PRT\r
+SCSI_Out_DBx__DB0__PRTDSI__CAPS_SEL EQU CYREG_PRT5_CAPS_SEL\r
+SCSI_Out_DBx__DB0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT5_DBL_SYNC_IN\r
+SCSI_Out_DBx__DB0__PRTDSI__OE_SEL0 EQU CYREG_PRT5_OE_SEL0\r
+SCSI_Out_DBx__DB0__PRTDSI__OE_SEL1 EQU CYREG_PRT5_OE_SEL1\r
+SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL0 EQU CYREG_PRT5_OUT_SEL0\r
+SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL1 EQU CYREG_PRT5_OUT_SEL1\r
+SCSI_Out_DBx__DB0__PRTDSI__SYNC_OUT EQU CYREG_PRT5_SYNC_OUT\r
+SCSI_Out_DBx__DB0__PS EQU CYREG_PRT5_PS\r
+SCSI_Out_DBx__DB0__SHIFT EQU 1\r
+SCSI_Out_DBx__DB0__SLW EQU CYREG_PRT5_SLW\r
+SCSI_Out_DBx__DB1__AG EQU CYREG_PRT5_AG\r
+SCSI_Out_DBx__DB1__AMUX EQU CYREG_PRT5_AMUX\r
+SCSI_Out_DBx__DB1__BIE EQU CYREG_PRT5_BIE\r
+SCSI_Out_DBx__DB1__BIT_MASK EQU CYREG_PRT5_BIT_MASK\r
+SCSI_Out_DBx__DB1__BYP EQU CYREG_PRT5_BYP\r
+SCSI_Out_DBx__DB1__CTL EQU CYREG_PRT5_CTL\r
+SCSI_Out_DBx__DB1__DM0 EQU CYREG_PRT5_DM0\r
+SCSI_Out_DBx__DB1__DM1 EQU CYREG_PRT5_DM1\r
+SCSI_Out_DBx__DB1__DM2 EQU CYREG_PRT5_DM2\r
+SCSI_Out_DBx__DB1__DR EQU CYREG_PRT5_DR\r
+SCSI_Out_DBx__DB1__INP_DIS EQU CYREG_PRT5_INP_DIS\r
+SCSI_Out_DBx__DB1__INTTYPE EQU CYREG_PICU5_INTTYPE0\r
+SCSI_Out_DBx__DB1__LCD_COM_SEG EQU CYREG_PRT5_LCD_COM_SEG\r
+SCSI_Out_DBx__DB1__LCD_EN EQU CYREG_PRT5_LCD_EN\r
+SCSI_Out_DBx__DB1__MASK EQU 0x01\r
+SCSI_Out_DBx__DB1__PC EQU CYREG_PRT5_PC0\r
+SCSI_Out_DBx__DB1__PORT EQU 5\r
+SCSI_Out_DBx__DB1__PRT EQU CYREG_PRT5_PRT\r
+SCSI_Out_DBx__DB1__PRTDSI__CAPS_SEL EQU CYREG_PRT5_CAPS_SEL\r
+SCSI_Out_DBx__DB1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT5_DBL_SYNC_IN\r
+SCSI_Out_DBx__DB1__PRTDSI__OE_SEL0 EQU CYREG_PRT5_OE_SEL0\r
+SCSI_Out_DBx__DB1__PRTDSI__OE_SEL1 EQU CYREG_PRT5_OE_SEL1\r
+SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL0 EQU CYREG_PRT5_OUT_SEL0\r
+SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL1 EQU CYREG_PRT5_OUT_SEL1\r
+SCSI_Out_DBx__DB1__PRTDSI__SYNC_OUT EQU CYREG_PRT5_SYNC_OUT\r
+SCSI_Out_DBx__DB1__PS EQU CYREG_PRT5_PS\r
+SCSI_Out_DBx__DB1__SHIFT EQU 0\r
+SCSI_Out_DBx__DB1__SLW EQU CYREG_PRT5_SLW\r
+SCSI_Out_DBx__DB2__AG EQU CYREG_PRT6_AG\r
+SCSI_Out_DBx__DB2__AMUX EQU CYREG_PRT6_AMUX\r
+SCSI_Out_DBx__DB2__BIE EQU CYREG_PRT6_BIE\r
+SCSI_Out_DBx__DB2__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
+SCSI_Out_DBx__DB2__BYP EQU CYREG_PRT6_BYP\r
+SCSI_Out_DBx__DB2__CTL EQU CYREG_PRT6_CTL\r
+SCSI_Out_DBx__DB2__DM0 EQU CYREG_PRT6_DM0\r
+SCSI_Out_DBx__DB2__DM1 EQU CYREG_PRT6_DM1\r
+SCSI_Out_DBx__DB2__DM2 EQU CYREG_PRT6_DM2\r
+SCSI_Out_DBx__DB2__DR EQU CYREG_PRT6_DR\r
+SCSI_Out_DBx__DB2__INP_DIS EQU CYREG_PRT6_INP_DIS\r
+SCSI_Out_DBx__DB2__INTTYPE EQU CYREG_PICU6_INTTYPE5\r
+SCSI_Out_DBx__DB2__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
+SCSI_Out_DBx__DB2__LCD_EN EQU CYREG_PRT6_LCD_EN\r
+SCSI_Out_DBx__DB2__MASK EQU 0x20\r
+SCSI_Out_DBx__DB2__PC EQU CYREG_PRT6_PC5\r
+SCSI_Out_DBx__DB2__PORT EQU 6\r
+SCSI_Out_DBx__DB2__PRT EQU CYREG_PRT6_PRT\r
+SCSI_Out_DBx__DB2__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
+SCSI_Out_DBx__DB2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
+SCSI_Out_DBx__DB2__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
+SCSI_Out_DBx__DB2__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
+SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
+SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
+SCSI_Out_DBx__DB2__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
+SCSI_Out_DBx__DB2__PS EQU CYREG_PRT6_PS\r
+SCSI_Out_DBx__DB2__SHIFT EQU 5\r
+SCSI_Out_DBx__DB2__SLW EQU CYREG_PRT6_SLW\r
+SCSI_Out_DBx__DB3__AG EQU CYREG_PRT6_AG\r
+SCSI_Out_DBx__DB3__AMUX EQU CYREG_PRT6_AMUX\r
+SCSI_Out_DBx__DB3__BIE EQU CYREG_PRT6_BIE\r
+SCSI_Out_DBx__DB3__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
+SCSI_Out_DBx__DB3__BYP EQU CYREG_PRT6_BYP\r
+SCSI_Out_DBx__DB3__CTL EQU CYREG_PRT6_CTL\r
+SCSI_Out_DBx__DB3__DM0 EQU CYREG_PRT6_DM0\r
+SCSI_Out_DBx__DB3__DM1 EQU CYREG_PRT6_DM1\r
+SCSI_Out_DBx__DB3__DM2 EQU CYREG_PRT6_DM2\r
+SCSI_Out_DBx__DB3__DR EQU CYREG_PRT6_DR\r
+SCSI_Out_DBx__DB3__INP_DIS EQU CYREG_PRT6_INP_DIS\r
+SCSI_Out_DBx__DB3__INTTYPE EQU CYREG_PICU6_INTTYPE4\r
+SCSI_Out_DBx__DB3__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
+SCSI_Out_DBx__DB3__LCD_EN EQU CYREG_PRT6_LCD_EN\r
+SCSI_Out_DBx__DB3__MASK EQU 0x10\r
+SCSI_Out_DBx__DB3__PC EQU CYREG_PRT6_PC4\r
+SCSI_Out_DBx__DB3__PORT EQU 6\r
+SCSI_Out_DBx__DB3__PRT EQU CYREG_PRT6_PRT\r
+SCSI_Out_DBx__DB3__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
+SCSI_Out_DBx__DB3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
+SCSI_Out_DBx__DB3__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
+SCSI_Out_DBx__DB3__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
+SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
+SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
+SCSI_Out_DBx__DB3__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
+SCSI_Out_DBx__DB3__PS EQU CYREG_PRT6_PS\r
+SCSI_Out_DBx__DB3__SHIFT EQU 4\r
+SCSI_Out_DBx__DB3__SLW EQU CYREG_PRT6_SLW\r
+SCSI_Out_DBx__DB4__AG EQU CYREG_PRT2_AG\r
+SCSI_Out_DBx__DB4__AMUX EQU CYREG_PRT2_AMUX\r
+SCSI_Out_DBx__DB4__BIE EQU CYREG_PRT2_BIE\r
+SCSI_Out_DBx__DB4__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
+SCSI_Out_DBx__DB4__BYP EQU CYREG_PRT2_BYP\r
+SCSI_Out_DBx__DB4__CTL EQU CYREG_PRT2_CTL\r
+SCSI_Out_DBx__DB4__DM0 EQU CYREG_PRT2_DM0\r
+SCSI_Out_DBx__DB4__DM1 EQU CYREG_PRT2_DM1\r
+SCSI_Out_DBx__DB4__DM2 EQU CYREG_PRT2_DM2\r
+SCSI_Out_DBx__DB4__DR EQU CYREG_PRT2_DR\r
+SCSI_Out_DBx__DB4__INP_DIS EQU CYREG_PRT2_INP_DIS\r
+SCSI_Out_DBx__DB4__INTTYPE EQU CYREG_PICU2_INTTYPE7\r
+SCSI_Out_DBx__DB4__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
+SCSI_Out_DBx__DB4__LCD_EN EQU CYREG_PRT2_LCD_EN\r
+SCSI_Out_DBx__DB4__MASK EQU 0x80\r
+SCSI_Out_DBx__DB4__PC EQU CYREG_PRT2_PC7\r
+SCSI_Out_DBx__DB4__PORT EQU 2\r
+SCSI_Out_DBx__DB4__PRT EQU CYREG_PRT2_PRT\r
+SCSI_Out_DBx__DB4__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
+SCSI_Out_DBx__DB4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
+SCSI_Out_DBx__DB4__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
+SCSI_Out_DBx__DB4__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
+SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
+SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
+SCSI_Out_DBx__DB4__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
+SCSI_Out_DBx__DB4__PS EQU CYREG_PRT2_PS\r
+SCSI_Out_DBx__DB4__SHIFT EQU 7\r
+SCSI_Out_DBx__DB4__SLW EQU CYREG_PRT2_SLW\r
+SCSI_Out_DBx__DB5__AG EQU CYREG_PRT2_AG\r
+SCSI_Out_DBx__DB5__AMUX EQU CYREG_PRT2_AMUX\r
+SCSI_Out_DBx__DB5__BIE EQU CYREG_PRT2_BIE\r
+SCSI_Out_DBx__DB5__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
+SCSI_Out_DBx__DB5__BYP EQU CYREG_PRT2_BYP\r
+SCSI_Out_DBx__DB5__CTL EQU CYREG_PRT2_CTL\r
+SCSI_Out_DBx__DB5__DM0 EQU CYREG_PRT2_DM0\r
+SCSI_Out_DBx__DB5__DM1 EQU CYREG_PRT2_DM1\r
+SCSI_Out_DBx__DB5__DM2 EQU CYREG_PRT2_DM2\r
+SCSI_Out_DBx__DB5__DR EQU CYREG_PRT2_DR\r
+SCSI_Out_DBx__DB5__INP_DIS EQU CYREG_PRT2_INP_DIS\r
+SCSI_Out_DBx__DB5__INTTYPE EQU CYREG_PICU2_INTTYPE6\r
+SCSI_Out_DBx__DB5__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
+SCSI_Out_DBx__DB5__LCD_EN EQU CYREG_PRT2_LCD_EN\r
+SCSI_Out_DBx__DB5__MASK EQU 0x40\r
+SCSI_Out_DBx__DB5__PC EQU CYREG_PRT2_PC6\r
+SCSI_Out_DBx__DB5__PORT EQU 2\r
+SCSI_Out_DBx__DB5__PRT EQU CYREG_PRT2_PRT\r
+SCSI_Out_DBx__DB5__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
+SCSI_Out_DBx__DB5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
+SCSI_Out_DBx__DB5__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
+SCSI_Out_DBx__DB5__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
+SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
+SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
+SCSI_Out_DBx__DB5__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
+SCSI_Out_DBx__DB5__PS EQU CYREG_PRT2_PS\r
+SCSI_Out_DBx__DB5__SHIFT EQU 6\r
+SCSI_Out_DBx__DB5__SLW EQU CYREG_PRT2_SLW\r
+SCSI_Out_DBx__DB6__AG EQU CYREG_PRT2_AG\r
+SCSI_Out_DBx__DB6__AMUX EQU CYREG_PRT2_AMUX\r
+SCSI_Out_DBx__DB6__BIE EQU CYREG_PRT2_BIE\r
+SCSI_Out_DBx__DB6__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
+SCSI_Out_DBx__DB6__BYP EQU CYREG_PRT2_BYP\r
+SCSI_Out_DBx__DB6__CTL EQU CYREG_PRT2_CTL\r
+SCSI_Out_DBx__DB6__DM0 EQU CYREG_PRT2_DM0\r
+SCSI_Out_DBx__DB6__DM1 EQU CYREG_PRT2_DM1\r
+SCSI_Out_DBx__DB6__DM2 EQU CYREG_PRT2_DM2\r
+SCSI_Out_DBx__DB6__DR EQU CYREG_PRT2_DR\r
+SCSI_Out_DBx__DB6__INP_DIS EQU CYREG_PRT2_INP_DIS\r
+SCSI_Out_DBx__DB6__INTTYPE EQU CYREG_PICU2_INTTYPE3\r
+SCSI_Out_DBx__DB6__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
+SCSI_Out_DBx__DB6__LCD_EN EQU CYREG_PRT2_LCD_EN\r
+SCSI_Out_DBx__DB6__MASK EQU 0x08\r
+SCSI_Out_DBx__DB6__PC EQU CYREG_PRT2_PC3\r
+SCSI_Out_DBx__DB6__PORT EQU 2\r
+SCSI_Out_DBx__DB6__PRT EQU CYREG_PRT2_PRT\r
+SCSI_Out_DBx__DB6__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
+SCSI_Out_DBx__DB6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
+SCSI_Out_DBx__DB6__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
+SCSI_Out_DBx__DB6__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
+SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
+SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
+SCSI_Out_DBx__DB6__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
+SCSI_Out_DBx__DB6__PS EQU CYREG_PRT2_PS\r
+SCSI_Out_DBx__DB6__SHIFT EQU 3\r
+SCSI_Out_DBx__DB6__SLW EQU CYREG_PRT2_SLW\r
+SCSI_Out_DBx__DB7__AG EQU CYREG_PRT2_AG\r
+SCSI_Out_DBx__DB7__AMUX EQU CYREG_PRT2_AMUX\r
+SCSI_Out_DBx__DB7__BIE EQU CYREG_PRT2_BIE\r
+SCSI_Out_DBx__DB7__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
+SCSI_Out_DBx__DB7__BYP EQU CYREG_PRT2_BYP\r
+SCSI_Out_DBx__DB7__CTL EQU CYREG_PRT2_CTL\r
+SCSI_Out_DBx__DB7__DM0 EQU CYREG_PRT2_DM0\r
+SCSI_Out_DBx__DB7__DM1 EQU CYREG_PRT2_DM1\r
+SCSI_Out_DBx__DB7__DM2 EQU CYREG_PRT2_DM2\r
+SCSI_Out_DBx__DB7__DR EQU CYREG_PRT2_DR\r
+SCSI_Out_DBx__DB7__INP_DIS EQU CYREG_PRT2_INP_DIS\r
+SCSI_Out_DBx__DB7__INTTYPE EQU CYREG_PICU2_INTTYPE2\r
+SCSI_Out_DBx__DB7__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
+SCSI_Out_DBx__DB7__LCD_EN EQU CYREG_PRT2_LCD_EN\r
+SCSI_Out_DBx__DB7__MASK EQU 0x04\r
+SCSI_Out_DBx__DB7__PC EQU CYREG_PRT2_PC2\r
+SCSI_Out_DBx__DB7__PORT EQU 2\r
+SCSI_Out_DBx__DB7__PRT EQU CYREG_PRT2_PRT\r
+SCSI_Out_DBx__DB7__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
+SCSI_Out_DBx__DB7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
+SCSI_Out_DBx__DB7__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
+SCSI_Out_DBx__DB7__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
+SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
+SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
+SCSI_Out_DBx__DB7__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
+SCSI_Out_DBx__DB7__PS EQU CYREG_PRT2_PS\r
+SCSI_Out_DBx__DB7__SHIFT EQU 2\r
+SCSI_Out_DBx__DB7__SLW EQU CYREG_PRT2_SLW\r
+\r
+/* SD_RX_DMA */\r
+SD_RX_DMA__DRQ_CTL EQU CYREG_IDMUX_DRQ_CTL0\r
+SD_RX_DMA__DRQ_NUMBER EQU 2\r
+SD_RX_DMA__NUMBEROF_TDS EQU 0\r
+SD_RX_DMA__PRIORITY EQU 0\r
+SD_RX_DMA__TERMIN_EN EQU 0\r
+SD_RX_DMA__TERMIN_SEL EQU 0\r
+SD_RX_DMA__TERMOUT0_EN EQU 1\r
+SD_RX_DMA__TERMOUT0_SEL EQU 2\r
+SD_RX_DMA__TERMOUT1_EN EQU 0\r
+SD_RX_DMA__TERMOUT1_SEL EQU 0\r
+SD_RX_DMA_COMPLETE__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
+SD_RX_DMA_COMPLETE__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
+SD_RX_DMA_COMPLETE__INTC_MASK EQU 0x20\r
+SD_RX_DMA_COMPLETE__INTC_NUMBER EQU 5\r
+SD_RX_DMA_COMPLETE__INTC_PRIOR_NUM EQU 7\r
+SD_RX_DMA_COMPLETE__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_5\r
+SD_RX_DMA_COMPLETE__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
+SD_RX_DMA_COMPLETE__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
+\r
+/* SD_TX_DMA */\r
+SD_TX_DMA__DRQ_CTL EQU CYREG_IDMUX_DRQ_CTL0\r
+SD_TX_DMA__DRQ_NUMBER EQU 3\r
+SD_TX_DMA__NUMBEROF_TDS EQU 0\r
+SD_TX_DMA__PRIORITY EQU 1\r
+SD_TX_DMA__TERMIN_EN EQU 0\r
+SD_TX_DMA__TERMIN_SEL EQU 0\r
+SD_TX_DMA__TERMOUT0_EN EQU 1\r
+SD_TX_DMA__TERMOUT0_SEL EQU 3\r
+SD_TX_DMA__TERMOUT1_EN EQU 0\r
+SD_TX_DMA__TERMOUT1_SEL EQU 0\r
+SD_TX_DMA_COMPLETE__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
+SD_TX_DMA_COMPLETE__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
+SD_TX_DMA_COMPLETE__INTC_MASK EQU 0x40\r
+SD_TX_DMA_COMPLETE__INTC_NUMBER EQU 6\r
+SD_TX_DMA_COMPLETE__INTC_PRIOR_NUM EQU 7\r
+SD_TX_DMA_COMPLETE__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_6\r
+SD_TX_DMA_COMPLETE__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
+SD_TX_DMA_COMPLETE__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
+\r
+/* SCSI_Noise */\r
+SCSI_Noise__0__AG EQU CYREG_PRT2_AG\r
+SCSI_Noise__0__AMUX EQU CYREG_PRT2_AMUX\r
+SCSI_Noise__0__BIE EQU CYREG_PRT2_BIE\r
+SCSI_Noise__0__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
+SCSI_Noise__0__BYP EQU CYREG_PRT2_BYP\r
+SCSI_Noise__0__CTL EQU CYREG_PRT2_CTL\r
+SCSI_Noise__0__DM0 EQU CYREG_PRT2_DM0\r
+SCSI_Noise__0__DM1 EQU CYREG_PRT2_DM1\r
+SCSI_Noise__0__DM2 EQU CYREG_PRT2_DM2\r
+SCSI_Noise__0__DR EQU CYREG_PRT2_DR\r
+SCSI_Noise__0__INP_DIS EQU CYREG_PRT2_INP_DIS\r
+SCSI_Noise__0__INTTYPE EQU CYREG_PICU2_INTTYPE0\r
+SCSI_Noise__0__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
+SCSI_Noise__0__LCD_EN EQU CYREG_PRT2_LCD_EN\r
+SCSI_Noise__0__MASK EQU 0x01\r
+SCSI_Noise__0__PC EQU CYREG_PRT2_PC0\r
+SCSI_Noise__0__PORT EQU 2\r
+SCSI_Noise__0__PRT EQU CYREG_PRT2_PRT\r
+SCSI_Noise__0__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
+SCSI_Noise__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
+SCSI_Noise__0__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
+SCSI_Noise__0__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
+SCSI_Noise__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
+SCSI_Noise__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
+SCSI_Noise__0__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
+SCSI_Noise__0__PS EQU CYREG_PRT2_PS\r
+SCSI_Noise__0__SHIFT EQU 0\r
+SCSI_Noise__0__SLW EQU CYREG_PRT2_SLW\r
+SCSI_Noise__1__AG EQU CYREG_PRT6_AG\r
+SCSI_Noise__1__AMUX EQU CYREG_PRT6_AMUX\r
+SCSI_Noise__1__BIE EQU CYREG_PRT6_BIE\r
+SCSI_Noise__1__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
+SCSI_Noise__1__BYP EQU CYREG_PRT6_BYP\r
+SCSI_Noise__1__CTL EQU CYREG_PRT6_CTL\r
+SCSI_Noise__1__DM0 EQU CYREG_PRT6_DM0\r
+SCSI_Noise__1__DM1 EQU CYREG_PRT6_DM1\r
+SCSI_Noise__1__DM2 EQU CYREG_PRT6_DM2\r
+SCSI_Noise__1__DR EQU CYREG_PRT6_DR\r
+SCSI_Noise__1__INP_DIS EQU CYREG_PRT6_INP_DIS\r
+SCSI_Noise__1__INTTYPE EQU CYREG_PICU6_INTTYPE3\r
+SCSI_Noise__1__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
+SCSI_Noise__1__LCD_EN EQU CYREG_PRT6_LCD_EN\r
+SCSI_Noise__1__MASK EQU 0x08\r
+SCSI_Noise__1__PC EQU CYREG_PRT6_PC3\r
+SCSI_Noise__1__PORT EQU 6\r
+SCSI_Noise__1__PRT EQU CYREG_PRT6_PRT\r
+SCSI_Noise__1__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
+SCSI_Noise__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
+SCSI_Noise__1__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
+SCSI_Noise__1__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
+SCSI_Noise__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
+SCSI_Noise__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
+SCSI_Noise__1__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
+SCSI_Noise__1__PS EQU CYREG_PRT6_PS\r
+SCSI_Noise__1__SHIFT EQU 3\r
+SCSI_Noise__1__SLW EQU CYREG_PRT6_SLW\r
+SCSI_Noise__2__AG EQU CYREG_PRT4_AG\r
+SCSI_Noise__2__AMUX EQU CYREG_PRT4_AMUX\r
+SCSI_Noise__2__BIE EQU CYREG_PRT4_BIE\r
+SCSI_Noise__2__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
+SCSI_Noise__2__BYP EQU CYREG_PRT4_BYP\r
+SCSI_Noise__2__CTL EQU CYREG_PRT4_CTL\r
+SCSI_Noise__2__DM0 EQU CYREG_PRT4_DM0\r
+SCSI_Noise__2__DM1 EQU CYREG_PRT4_DM1\r
+SCSI_Noise__2__DM2 EQU CYREG_PRT4_DM2\r
+SCSI_Noise__2__DR EQU CYREG_PRT4_DR\r
+SCSI_Noise__2__INP_DIS EQU CYREG_PRT4_INP_DIS\r
+SCSI_Noise__2__INTTYPE EQU CYREG_PICU4_INTTYPE3\r
+SCSI_Noise__2__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
+SCSI_Noise__2__LCD_EN EQU CYREG_PRT4_LCD_EN\r
+SCSI_Noise__2__MASK EQU 0x08\r
+SCSI_Noise__2__PC EQU CYREG_PRT4_PC3\r
+SCSI_Noise__2__PORT EQU 4\r
+SCSI_Noise__2__PRT EQU CYREG_PRT4_PRT\r
+SCSI_Noise__2__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
+SCSI_Noise__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
+SCSI_Noise__2__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
+SCSI_Noise__2__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
+SCSI_Noise__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
+SCSI_Noise__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
+SCSI_Noise__2__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
+SCSI_Noise__2__PS EQU CYREG_PRT4_PS\r
+SCSI_Noise__2__SHIFT EQU 3\r
+SCSI_Noise__2__SLW EQU CYREG_PRT4_SLW\r
+SCSI_Noise__3__AG EQU CYREG_PRT4_AG\r
+SCSI_Noise__3__AMUX EQU CYREG_PRT4_AMUX\r
+SCSI_Noise__3__BIE EQU CYREG_PRT4_BIE\r
+SCSI_Noise__3__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
+SCSI_Noise__3__BYP EQU CYREG_PRT4_BYP\r
+SCSI_Noise__3__CTL EQU CYREG_PRT4_CTL\r
+SCSI_Noise__3__DM0 EQU CYREG_PRT4_DM0\r
+SCSI_Noise__3__DM1 EQU CYREG_PRT4_DM1\r
+SCSI_Noise__3__DM2 EQU CYREG_PRT4_DM2\r
+SCSI_Noise__3__DR EQU CYREG_PRT4_DR\r
+SCSI_Noise__3__INP_DIS EQU CYREG_PRT4_INP_DIS\r
+SCSI_Noise__3__INTTYPE EQU CYREG_PICU4_INTTYPE7\r
+SCSI_Noise__3__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
+SCSI_Noise__3__LCD_EN EQU CYREG_PRT4_LCD_EN\r
+SCSI_Noise__3__MASK EQU 0x80\r
+SCSI_Noise__3__PC EQU CYREG_PRT4_PC7\r
+SCSI_Noise__3__PORT EQU 4\r
+SCSI_Noise__3__PRT EQU CYREG_PRT4_PRT\r
+SCSI_Noise__3__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
+SCSI_Noise__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
+SCSI_Noise__3__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
+SCSI_Noise__3__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
+SCSI_Noise__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
+SCSI_Noise__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
+SCSI_Noise__3__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
+SCSI_Noise__3__PS EQU CYREG_PRT4_PS\r
+SCSI_Noise__3__SHIFT EQU 7\r
+SCSI_Noise__3__SLW EQU CYREG_PRT4_SLW\r
+SCSI_Noise__4__AG EQU CYREG_PRT6_AG\r
+SCSI_Noise__4__AMUX EQU CYREG_PRT6_AMUX\r
+SCSI_Noise__4__BIE EQU CYREG_PRT6_BIE\r
+SCSI_Noise__4__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
+SCSI_Noise__4__BYP EQU CYREG_PRT6_BYP\r
+SCSI_Noise__4__CTL EQU CYREG_PRT6_CTL\r
+SCSI_Noise__4__DM0 EQU CYREG_PRT6_DM0\r
+SCSI_Noise__4__DM1 EQU CYREG_PRT6_DM1\r
+SCSI_Noise__4__DM2 EQU CYREG_PRT6_DM2\r
+SCSI_Noise__4__DR EQU CYREG_PRT6_DR\r
+SCSI_Noise__4__INP_DIS EQU CYREG_PRT6_INP_DIS\r
+SCSI_Noise__4__INTTYPE EQU CYREG_PICU6_INTTYPE2\r
+SCSI_Noise__4__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
+SCSI_Noise__4__LCD_EN EQU CYREG_PRT6_LCD_EN\r
+SCSI_Noise__4__MASK EQU 0x04\r
+SCSI_Noise__4__PC EQU CYREG_PRT6_PC2\r
+SCSI_Noise__4__PORT EQU 6\r
+SCSI_Noise__4__PRT EQU CYREG_PRT6_PRT\r
+SCSI_Noise__4__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
+SCSI_Noise__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
+SCSI_Noise__4__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
+SCSI_Noise__4__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
+SCSI_Noise__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
+SCSI_Noise__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
+SCSI_Noise__4__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
+SCSI_Noise__4__PS EQU CYREG_PRT6_PS\r
+SCSI_Noise__4__SHIFT EQU 2\r
+SCSI_Noise__4__SLW EQU CYREG_PRT6_SLW\r
+SCSI_Noise__ACK__AG EQU CYREG_PRT6_AG\r
+SCSI_Noise__ACK__AMUX EQU CYREG_PRT6_AMUX\r
+SCSI_Noise__ACK__BIE EQU CYREG_PRT6_BIE\r
+SCSI_Noise__ACK__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
+SCSI_Noise__ACK__BYP EQU CYREG_PRT6_BYP\r
+SCSI_Noise__ACK__CTL EQU CYREG_PRT6_CTL\r
+SCSI_Noise__ACK__DM0 EQU CYREG_PRT6_DM0\r
+SCSI_Noise__ACK__DM1 EQU CYREG_PRT6_DM1\r
+SCSI_Noise__ACK__DM2 EQU CYREG_PRT6_DM2\r
+SCSI_Noise__ACK__DR EQU CYREG_PRT6_DR\r
+SCSI_Noise__ACK__INP_DIS EQU CYREG_PRT6_INP_DIS\r
+SCSI_Noise__ACK__INTTYPE EQU CYREG_PICU6_INTTYPE2\r
+SCSI_Noise__ACK__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
+SCSI_Noise__ACK__LCD_EN EQU CYREG_PRT6_LCD_EN\r
+SCSI_Noise__ACK__MASK EQU 0x04\r
+SCSI_Noise__ACK__PC EQU CYREG_PRT6_PC2\r
+SCSI_Noise__ACK__PORT EQU 6\r
+SCSI_Noise__ACK__PRT EQU CYREG_PRT6_PRT\r
+SCSI_Noise__ACK__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
+SCSI_Noise__ACK__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
+SCSI_Noise__ACK__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
+SCSI_Noise__ACK__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
+SCSI_Noise__ACK__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
+SCSI_Noise__ACK__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
+SCSI_Noise__ACK__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
+SCSI_Noise__ACK__PS EQU CYREG_PRT6_PS\r
+SCSI_Noise__ACK__SHIFT EQU 2\r
+SCSI_Noise__ACK__SLW EQU CYREG_PRT6_SLW\r
+SCSI_Noise__ATN__AG EQU CYREG_PRT2_AG\r
+SCSI_Noise__ATN__AMUX EQU CYREG_PRT2_AMUX\r
+SCSI_Noise__ATN__BIE EQU CYREG_PRT2_BIE\r
+SCSI_Noise__ATN__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
+SCSI_Noise__ATN__BYP EQU CYREG_PRT2_BYP\r
+SCSI_Noise__ATN__CTL EQU CYREG_PRT2_CTL\r
+SCSI_Noise__ATN__DM0 EQU CYREG_PRT2_DM0\r
+SCSI_Noise__ATN__DM1 EQU CYREG_PRT2_DM1\r
+SCSI_Noise__ATN__DM2 EQU CYREG_PRT2_DM2\r
+SCSI_Noise__ATN__DR EQU CYREG_PRT2_DR\r
+SCSI_Noise__ATN__INP_DIS EQU CYREG_PRT2_INP_DIS\r
+SCSI_Noise__ATN__INTTYPE EQU CYREG_PICU2_INTTYPE0\r
+SCSI_Noise__ATN__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
+SCSI_Noise__ATN__LCD_EN EQU CYREG_PRT2_LCD_EN\r
+SCSI_Noise__ATN__MASK EQU 0x01\r
+SCSI_Noise__ATN__PC EQU CYREG_PRT2_PC0\r
+SCSI_Noise__ATN__PORT EQU 2\r
+SCSI_Noise__ATN__PRT EQU CYREG_PRT2_PRT\r
+SCSI_Noise__ATN__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
+SCSI_Noise__ATN__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
+SCSI_Noise__ATN__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
+SCSI_Noise__ATN__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
+SCSI_Noise__ATN__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
+SCSI_Noise__ATN__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
+SCSI_Noise__ATN__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
+SCSI_Noise__ATN__PS EQU CYREG_PRT2_PS\r
+SCSI_Noise__ATN__SHIFT EQU 0\r
+SCSI_Noise__ATN__SLW EQU CYREG_PRT2_SLW\r
+SCSI_Noise__BSY__AG EQU CYREG_PRT6_AG\r
+SCSI_Noise__BSY__AMUX EQU CYREG_PRT6_AMUX\r
+SCSI_Noise__BSY__BIE EQU CYREG_PRT6_BIE\r
+SCSI_Noise__BSY__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
+SCSI_Noise__BSY__BYP EQU CYREG_PRT6_BYP\r
+SCSI_Noise__BSY__CTL EQU CYREG_PRT6_CTL\r
+SCSI_Noise__BSY__DM0 EQU CYREG_PRT6_DM0\r
+SCSI_Noise__BSY__DM1 EQU CYREG_PRT6_DM1\r
+SCSI_Noise__BSY__DM2 EQU CYREG_PRT6_DM2\r
+SCSI_Noise__BSY__DR EQU CYREG_PRT6_DR\r
+SCSI_Noise__BSY__INP_DIS EQU CYREG_PRT6_INP_DIS\r
+SCSI_Noise__BSY__INTTYPE EQU CYREG_PICU6_INTTYPE3\r
+SCSI_Noise__BSY__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
+SCSI_Noise__BSY__LCD_EN EQU CYREG_PRT6_LCD_EN\r
+SCSI_Noise__BSY__MASK EQU 0x08\r
+SCSI_Noise__BSY__PC EQU CYREG_PRT6_PC3\r
+SCSI_Noise__BSY__PORT EQU 6\r
+SCSI_Noise__BSY__PRT EQU CYREG_PRT6_PRT\r
+SCSI_Noise__BSY__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
+SCSI_Noise__BSY__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
+SCSI_Noise__BSY__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
+SCSI_Noise__BSY__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
+SCSI_Noise__BSY__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
+SCSI_Noise__BSY__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
+SCSI_Noise__BSY__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
+SCSI_Noise__BSY__PS EQU CYREG_PRT6_PS\r
+SCSI_Noise__BSY__SHIFT EQU 3\r
+SCSI_Noise__BSY__SLW EQU CYREG_PRT6_SLW\r
+SCSI_Noise__RST__AG EQU CYREG_PRT4_AG\r
+SCSI_Noise__RST__AMUX EQU CYREG_PRT4_AMUX\r
+SCSI_Noise__RST__BIE EQU CYREG_PRT4_BIE\r
+SCSI_Noise__RST__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
+SCSI_Noise__RST__BYP EQU CYREG_PRT4_BYP\r
+SCSI_Noise__RST__CTL EQU CYREG_PRT4_CTL\r
+SCSI_Noise__RST__DM0 EQU CYREG_PRT4_DM0\r
+SCSI_Noise__RST__DM1 EQU CYREG_PRT4_DM1\r
+SCSI_Noise__RST__DM2 EQU CYREG_PRT4_DM2\r
+SCSI_Noise__RST__DR EQU CYREG_PRT4_DR\r
+SCSI_Noise__RST__INP_DIS EQU CYREG_PRT4_INP_DIS\r
+SCSI_Noise__RST__INTTYPE EQU CYREG_PICU4_INTTYPE7\r
+SCSI_Noise__RST__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
+SCSI_Noise__RST__LCD_EN EQU CYREG_PRT4_LCD_EN\r
+SCSI_Noise__RST__MASK EQU 0x80\r
+SCSI_Noise__RST__PC EQU CYREG_PRT4_PC7\r
+SCSI_Noise__RST__PORT EQU 4\r
+SCSI_Noise__RST__PRT EQU CYREG_PRT4_PRT\r
+SCSI_Noise__RST__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
+SCSI_Noise__RST__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
+SCSI_Noise__RST__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
+SCSI_Noise__RST__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
+SCSI_Noise__RST__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
+SCSI_Noise__RST__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
+SCSI_Noise__RST__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
+SCSI_Noise__RST__PS EQU CYREG_PRT4_PS\r
+SCSI_Noise__RST__SHIFT EQU 7\r
+SCSI_Noise__RST__SLW EQU CYREG_PRT4_SLW\r
+SCSI_Noise__SEL__AG EQU CYREG_PRT4_AG\r
+SCSI_Noise__SEL__AMUX EQU CYREG_PRT4_AMUX\r
+SCSI_Noise__SEL__BIE EQU CYREG_PRT4_BIE\r
+SCSI_Noise__SEL__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
+SCSI_Noise__SEL__BYP EQU CYREG_PRT4_BYP\r
+SCSI_Noise__SEL__CTL EQU CYREG_PRT4_CTL\r
+SCSI_Noise__SEL__DM0 EQU CYREG_PRT4_DM0\r
+SCSI_Noise__SEL__DM1 EQU CYREG_PRT4_DM1\r
+SCSI_Noise__SEL__DM2 EQU CYREG_PRT4_DM2\r
+SCSI_Noise__SEL__DR EQU CYREG_PRT4_DR\r
+SCSI_Noise__SEL__INP_DIS EQU CYREG_PRT4_INP_DIS\r
+SCSI_Noise__SEL__INTTYPE EQU CYREG_PICU4_INTTYPE3\r
+SCSI_Noise__SEL__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
+SCSI_Noise__SEL__LCD_EN EQU CYREG_PRT4_LCD_EN\r
+SCSI_Noise__SEL__MASK EQU 0x08\r
+SCSI_Noise__SEL__PC EQU CYREG_PRT4_PC3\r
+SCSI_Noise__SEL__PORT EQU 4\r
+SCSI_Noise__SEL__PRT EQU CYREG_PRT4_PRT\r
+SCSI_Noise__SEL__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
+SCSI_Noise__SEL__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
+SCSI_Noise__SEL__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
+SCSI_Noise__SEL__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
+SCSI_Noise__SEL__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
+SCSI_Noise__SEL__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
+SCSI_Noise__SEL__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
+SCSI_Noise__SEL__PS EQU CYREG_PRT4_PS\r
+SCSI_Noise__SEL__SHIFT EQU 3\r
+SCSI_Noise__SEL__SLW EQU CYREG_PRT4_SLW\r
+\r
/* scsiTarget */\r
scsiTarget_datapath__16BIT_A0_REG EQU CYREG_B0_UDB00_01_A0\r
scsiTarget_datapath__16BIT_A1_REG EQU CYREG_B0_UDB00_01_A1\r
scsiTarget_StatusReg__0__POS EQU 0\r
scsiTarget_StatusReg__1__MASK EQU 0x02\r
scsiTarget_StatusReg__1__POS EQU 1\r
-scsiTarget_StatusReg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB02_03_ACTL\r
-scsiTarget_StatusReg__16BIT_STATUS_REG EQU CYREG_B0_UDB02_03_ST\r
+scsiTarget_StatusReg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB07_08_ACTL\r
+scsiTarget_StatusReg__16BIT_STATUS_REG EQU CYREG_B0_UDB07_08_ST\r
scsiTarget_StatusReg__2__MASK EQU 0x04\r
scsiTarget_StatusReg__2__POS EQU 2\r
scsiTarget_StatusReg__3__MASK EQU 0x08\r
scsiTarget_StatusReg__4__MASK EQU 0x10\r
scsiTarget_StatusReg__4__POS EQU 4\r
scsiTarget_StatusReg__MASK EQU 0x1F\r
-scsiTarget_StatusReg__MASK_REG EQU CYREG_B0_UDB02_MSK\r
-scsiTarget_StatusReg__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB02_ACTL\r
-scsiTarget_StatusReg__STATUS_REG EQU CYREG_B0_UDB02_ST\r
+scsiTarget_StatusReg__MASK_REG EQU CYREG_B0_UDB07_MSK\r
+scsiTarget_StatusReg__MASK_ST_AUX_CTL_REG EQU CYREG_B0_UDB07_MSK_ACTL\r
+scsiTarget_StatusReg__PER_ST_AUX_CTL_REG EQU CYREG_B0_UDB07_MSK_ACTL\r
+scsiTarget_StatusReg__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB07_ACTL\r
+scsiTarget_StatusReg__STATUS_CNT_REG EQU CYREG_B0_UDB07_ST_CTL\r
+scsiTarget_StatusReg__STATUS_CONTROL_REG EQU CYREG_B0_UDB07_ST_CTL\r
+scsiTarget_StatusReg__STATUS_REG EQU CYREG_B0_UDB07_ST\r
+\r
+/* Debug_Timer */\r
+Debug_Timer_Interrupt__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
+Debug_Timer_Interrupt__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
+Debug_Timer_Interrupt__INTC_MASK EQU 0x01\r
+Debug_Timer_Interrupt__INTC_NUMBER EQU 0\r
+Debug_Timer_Interrupt__INTC_PRIOR_NUM EQU 7\r
+Debug_Timer_Interrupt__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_0\r
+Debug_Timer_Interrupt__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
+Debug_Timer_Interrupt__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
+Debug_Timer_TimerHW__CAP0 EQU CYREG_TMR0_CAP0\r
+Debug_Timer_TimerHW__CAP1 EQU CYREG_TMR0_CAP1\r
+Debug_Timer_TimerHW__CFG0 EQU CYREG_TMR0_CFG0\r
+Debug_Timer_TimerHW__CFG1 EQU CYREG_TMR0_CFG1\r
+Debug_Timer_TimerHW__CFG2 EQU CYREG_TMR0_CFG2\r
+Debug_Timer_TimerHW__CNT_CMP0 EQU CYREG_TMR0_CNT_CMP0\r
+Debug_Timer_TimerHW__CNT_CMP1 EQU CYREG_TMR0_CNT_CMP1\r
+Debug_Timer_TimerHW__PER0 EQU CYREG_TMR0_PER0\r
+Debug_Timer_TimerHW__PER1 EQU CYREG_TMR0_PER1\r
+Debug_Timer_TimerHW__PM_ACT_CFG EQU CYREG_PM_ACT_CFG3\r
+Debug_Timer_TimerHW__PM_ACT_MSK EQU 0x01\r
+Debug_Timer_TimerHW__PM_STBY_CFG EQU CYREG_PM_STBY_CFG3\r
+Debug_Timer_TimerHW__PM_STBY_MSK EQU 0x01\r
+Debug_Timer_TimerHW__RT0 EQU CYREG_TMR0_RT0\r
+Debug_Timer_TimerHW__RT1 EQU CYREG_TMR0_RT1\r
+Debug_Timer_TimerHW__SR0 EQU CYREG_TMR0_SR0\r
+\r
+/* SCSI_RX_DMA */\r
+SCSI_RX_DMA__DRQ_CTL EQU CYREG_IDMUX_DRQ_CTL0\r
+SCSI_RX_DMA__DRQ_NUMBER EQU 0\r
+SCSI_RX_DMA__NUMBEROF_TDS EQU 0\r
+SCSI_RX_DMA__PRIORITY EQU 2\r
+SCSI_RX_DMA__TERMIN_EN EQU 0\r
+SCSI_RX_DMA__TERMIN_SEL EQU 0\r
+SCSI_RX_DMA__TERMOUT0_EN EQU 1\r
+SCSI_RX_DMA__TERMOUT0_SEL EQU 0\r
+SCSI_RX_DMA__TERMOUT1_EN EQU 0\r
+SCSI_RX_DMA__TERMOUT1_SEL EQU 0\r
+SCSI_RX_DMA_COMPLETE__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
+SCSI_RX_DMA_COMPLETE__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
+SCSI_RX_DMA_COMPLETE__INTC_MASK EQU 0x04\r
+SCSI_RX_DMA_COMPLETE__INTC_NUMBER EQU 2\r
+SCSI_RX_DMA_COMPLETE__INTC_PRIOR_NUM EQU 7\r
+SCSI_RX_DMA_COMPLETE__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_2\r
+SCSI_RX_DMA_COMPLETE__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
+SCSI_RX_DMA_COMPLETE__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
+\r
+/* SCSI_TX_DMA */\r
+SCSI_TX_DMA__DRQ_CTL EQU CYREG_IDMUX_DRQ_CTL0\r
+SCSI_TX_DMA__DRQ_NUMBER EQU 1\r
+SCSI_TX_DMA__NUMBEROF_TDS EQU 0\r
+SCSI_TX_DMA__PRIORITY EQU 2\r
+SCSI_TX_DMA__TERMIN_EN EQU 0\r
+SCSI_TX_DMA__TERMIN_SEL EQU 0\r
+SCSI_TX_DMA__TERMOUT0_EN EQU 1\r
+SCSI_TX_DMA__TERMOUT0_SEL EQU 1\r
+SCSI_TX_DMA__TERMOUT1_EN EQU 0\r
+SCSI_TX_DMA__TERMOUT1_SEL EQU 0\r
+SCSI_TX_DMA_COMPLETE__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
+SCSI_TX_DMA_COMPLETE__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
+SCSI_TX_DMA_COMPLETE__INTC_MASK EQU 0x10\r
+SCSI_TX_DMA_COMPLETE__INTC_NUMBER EQU 4\r
+SCSI_TX_DMA_COMPLETE__INTC_PRIOR_NUM EQU 7\r
+SCSI_TX_DMA_COMPLETE__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_4\r
+SCSI_TX_DMA_COMPLETE__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
+SCSI_TX_DMA_COMPLETE__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
+\r
+/* SD_Data_Clk */\r
+SD_Data_Clk__CFG0 EQU CYREG_CLKDIST_DCFG0_CFG0\r
+SD_Data_Clk__CFG1 EQU CYREG_CLKDIST_DCFG0_CFG1\r
+SD_Data_Clk__CFG2 EQU CYREG_CLKDIST_DCFG0_CFG2\r
+SD_Data_Clk__CFG2_SRC_SEL_MASK EQU 0x07\r
+SD_Data_Clk__INDEX EQU 0x00\r
+SD_Data_Clk__PM_ACT_CFG EQU CYREG_PM_ACT_CFG2\r
+SD_Data_Clk__PM_ACT_MSK EQU 0x01\r
+SD_Data_Clk__PM_STBY_CFG EQU CYREG_PM_STBY_CFG2\r
+SD_Data_Clk__PM_STBY_MSK EQU 0x01\r
\r
/* timer_clock */\r
timer_clock__CFG0 EQU CYREG_CLKDIST_DCFG2_CFG0\r
timer_clock__PM_STBY_CFG EQU CYREG_PM_STBY_CFG2\r
timer_clock__PM_STBY_MSK EQU 0x04\r
\r
+/* SCSI_RST_ISR */\r
+SCSI_RST_ISR__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
+SCSI_RST_ISR__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
+SCSI_RST_ISR__INTC_MASK EQU 0x02\r
+SCSI_RST_ISR__INTC_NUMBER EQU 1\r
+SCSI_RST_ISR__INTC_PRIOR_NUM EQU 7\r
+SCSI_RST_ISR__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_1\r
+SCSI_RST_ISR__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
+SCSI_RST_ISR__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
+\r
+/* SCSI_SEL_ISR */\r
+SCSI_SEL_ISR__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
+SCSI_SEL_ISR__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
+SCSI_SEL_ISR__INTC_MASK EQU 0x08\r
+SCSI_SEL_ISR__INTC_NUMBER EQU 3\r
+SCSI_SEL_ISR__INTC_PRIOR_NUM EQU 7\r
+SCSI_SEL_ISR__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_3\r
+SCSI_SEL_ISR__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
+SCSI_SEL_ISR__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
+\r
+/* SCSI_Filtered */\r
+SCSI_Filtered_sts_sts_reg__0__MASK EQU 0x01\r
+SCSI_Filtered_sts_sts_reg__0__POS EQU 0\r
+SCSI_Filtered_sts_sts_reg__1__MASK EQU 0x02\r
+SCSI_Filtered_sts_sts_reg__1__POS EQU 1\r
+SCSI_Filtered_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB13_14_ACTL\r
+SCSI_Filtered_sts_sts_reg__16BIT_STATUS_REG EQU CYREG_B0_UDB13_14_ST\r
+SCSI_Filtered_sts_sts_reg__2__MASK EQU 0x04\r
+SCSI_Filtered_sts_sts_reg__2__POS EQU 2\r
+SCSI_Filtered_sts_sts_reg__3__MASK EQU 0x08\r
+SCSI_Filtered_sts_sts_reg__3__POS EQU 3\r
+SCSI_Filtered_sts_sts_reg__4__MASK EQU 0x10\r
+SCSI_Filtered_sts_sts_reg__4__POS EQU 4\r
+SCSI_Filtered_sts_sts_reg__MASK EQU 0x1F\r
+SCSI_Filtered_sts_sts_reg__MASK_REG EQU CYREG_B0_UDB13_MSK\r
+SCSI_Filtered_sts_sts_reg__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB13_ACTL\r
+SCSI_Filtered_sts_sts_reg__STATUS_REG EQU CYREG_B0_UDB13_ST\r
+\r
+/* SCSI_CTL_PHASE */\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__0__MASK EQU 0x01\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__0__POS EQU 0\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__1__MASK EQU 0x02\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__1__POS EQU 1\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB02_03_ACTL\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB02_03_CTL\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB02_03_CTL\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB02_03_CTL\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB02_03_CTL\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB02_03_MSK\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB02_03_MSK\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB02_03_MSK\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB02_03_MSK\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__2__MASK EQU 0x04\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__2__POS EQU 2\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB02_ACTL\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB02_CTL\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB02_ST_CTL\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB02_CTL\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB02_ST_CTL\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__MASK EQU 0x07\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB02_MSK_ACTL\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB02_MSK_ACTL\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB02_MSK\r
+\r
+/* SCSI_Glitch_Ctl */\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__0__MASK EQU 0x01\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__0__POS EQU 0\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB03_04_ACTL\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB03_04_CTL\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB03_04_CTL\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB03_04_CTL\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB03_04_CTL\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB03_04_MSK\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB03_04_MSK\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB03_04_MSK\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB03_04_MSK\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB03_ACTL\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB03_CTL\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB03_ST_CTL\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB03_CTL\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB03_ST_CTL\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__MASK EQU 0x01\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB03_MSK_ACTL\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB03_MSK_ACTL\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB03_MSK\r
+\r
+/* SCSI_Parity_Error */\r
+SCSI_Parity_Error_sts_sts_reg__0__MASK EQU 0x01\r
+SCSI_Parity_Error_sts_sts_reg__0__POS EQU 0\r
+SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB11_12_ACTL\r
+SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_REG EQU CYREG_B0_UDB11_12_ST\r
+SCSI_Parity_Error_sts_sts_reg__MASK EQU 0x01\r
+SCSI_Parity_Error_sts_sts_reg__MASK_REG EQU CYREG_B0_UDB11_MSK\r
+SCSI_Parity_Error_sts_sts_reg__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB11_ACTL\r
+SCSI_Parity_Error_sts_sts_reg__STATUS_REG EQU CYREG_B0_UDB11_ST\r
+\r
/* Miscellaneous */\r
BCLK__BUS_CLK__HZ EQU 50000000\r
BCLK__BUS_CLK__KHZ EQU 50000\r
BCLK__BUS_CLK__MHZ EQU 50\r
CYDEV_CHIP_DIE_LEOPARD EQU 1\r
-CYDEV_CHIP_DIE_PSOC4A EQU 16\r
+CYDEV_CHIP_DIE_PSOC4A EQU 18\r
CYDEV_CHIP_DIE_PSOC5LP EQU 2\r
CYDEV_CHIP_DIE_PSOC5TM EQU 3\r
CYDEV_CHIP_DIE_TMA4 EQU 4\r
CYDEV_CHIP_FAMILY_USED EQU CYDEV_CHIP_FAMILY_PSOC5\r
CYDEV_CHIP_JTAG_ID EQU 0x2E133069\r
CYDEV_CHIP_MEMBER_3A EQU 1\r
-CYDEV_CHIP_MEMBER_4A EQU 16\r
-CYDEV_CHIP_MEMBER_4D EQU 12\r
+CYDEV_CHIP_MEMBER_4A EQU 18\r
+CYDEV_CHIP_MEMBER_4D EQU 13\r
CYDEV_CHIP_MEMBER_4E EQU 6\r
-CYDEV_CHIP_MEMBER_4F EQU 17\r
+CYDEV_CHIP_MEMBER_4F EQU 19\r
CYDEV_CHIP_MEMBER_4G EQU 4\r
-CYDEV_CHIP_MEMBER_4H EQU 15\r
-CYDEV_CHIP_MEMBER_4I EQU 21\r
-CYDEV_CHIP_MEMBER_4J EQU 13\r
-CYDEV_CHIP_MEMBER_4K EQU 14\r
-CYDEV_CHIP_MEMBER_4L EQU 20\r
-CYDEV_CHIP_MEMBER_4M EQU 19\r
-CYDEV_CHIP_MEMBER_4N EQU 9\r
+CYDEV_CHIP_MEMBER_4H EQU 17\r
+CYDEV_CHIP_MEMBER_4I EQU 23\r
+CYDEV_CHIP_MEMBER_4J EQU 14\r
+CYDEV_CHIP_MEMBER_4K EQU 15\r
+CYDEV_CHIP_MEMBER_4L EQU 22\r
+CYDEV_CHIP_MEMBER_4M EQU 21\r
+CYDEV_CHIP_MEMBER_4N EQU 10\r
CYDEV_CHIP_MEMBER_4O EQU 7\r
-CYDEV_CHIP_MEMBER_4P EQU 18\r
-CYDEV_CHIP_MEMBER_4Q EQU 11\r
+CYDEV_CHIP_MEMBER_4P EQU 20\r
+CYDEV_CHIP_MEMBER_4Q EQU 12\r
CYDEV_CHIP_MEMBER_4R EQU 8\r
-CYDEV_CHIP_MEMBER_4S EQU 10\r
+CYDEV_CHIP_MEMBER_4S EQU 11\r
+CYDEV_CHIP_MEMBER_4T EQU 9\r
CYDEV_CHIP_MEMBER_4U EQU 5\r
+CYDEV_CHIP_MEMBER_4V EQU 16\r
CYDEV_CHIP_MEMBER_5A EQU 3\r
CYDEV_CHIP_MEMBER_5B EQU 2\r
-CYDEV_CHIP_MEMBER_6A EQU 22\r
-CYDEV_CHIP_MEMBER_FM3 EQU 26\r
-CYDEV_CHIP_MEMBER_FM4 EQU 27\r
-CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE1 EQU 23\r
-CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE2 EQU 24\r
-CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE3 EQU 25\r
+CYDEV_CHIP_MEMBER_6A EQU 24\r
+CYDEV_CHIP_MEMBER_FM3 EQU 28\r
+CYDEV_CHIP_MEMBER_FM4 EQU 29\r
+CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE1 EQU 25\r
+CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE2 EQU 26\r
+CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE3 EQU 27\r
CYDEV_CHIP_MEMBER_UNKNOWN EQU 0\r
CYDEV_CHIP_MEMBER_USED EQU CYDEV_CHIP_MEMBER_5B\r
CYDEV_CHIP_DIE_EXPECT EQU CYDEV_CHIP_MEMBER_USED\r
CYDEV_CHIP_REVISION_4A_ES0 EQU 17\r
CYDEV_CHIP_REVISION_4A_PRODUCTION EQU 17\r
CYDEV_CHIP_REVISION_4D_PRODUCTION EQU 0\r
+CYDEV_CHIP_REVISION_4E_CCG2_NO_USBPD EQU 0\r
CYDEV_CHIP_REVISION_4E_PRODUCTION EQU 0\r
CYDEV_CHIP_REVISION_4F_PRODUCTION EQU 0\r
CYDEV_CHIP_REVISION_4F_PRODUCTION_256DMA EQU 0\r
CYDEV_CHIP_REVISION_4Q_PRODUCTION EQU 0\r
CYDEV_CHIP_REVISION_4R_PRODUCTION EQU 0\r
CYDEV_CHIP_REVISION_4S_PRODUCTION EQU 0\r
+CYDEV_CHIP_REVISION_4T_PRODUCTION EQU 0\r
CYDEV_CHIP_REVISION_4U_PRODUCTION EQU 0\r
+CYDEV_CHIP_REVISION_4V_PRODUCTION EQU 0\r
CYDEV_CHIP_REVISION_5A_ES0 EQU 0\r
CYDEV_CHIP_REVISION_5A_ES1 EQU 1\r
CYDEV_CHIP_REVISION_5A_PRODUCTION EQU 1\r
CYDEV_CHIP_REVISION_5B_ES0 EQU 0\r
CYDEV_CHIP_REVISION_5B_PRODUCTION EQU 0\r
-CYDEV_CHIP_REVISION_6A_NO_UDB EQU 0\r
-CYDEV_CHIP_REVISION_6A_PRODUCTION EQU 0\r
+CYDEV_CHIP_REVISION_6A_ES EQU 17\r
+CYDEV_CHIP_REVISION_6A_NO_UDB EQU 33\r
+CYDEV_CHIP_REVISION_6A_PRODUCTION EQU 33\r
CYDEV_CHIP_REVISION_FM3_PRODUCTION EQU 0\r
CYDEV_CHIP_REVISION_FM4_PRODUCTION EQU 0\r
CYDEV_CHIP_REVISION_PDL_FM0P_TYPE1_PRODUCTION EQU 0\r
;\r
; File Name: cyfitterrv.inc\r
; \r
-; PSoC Creator 4.1\r
+; PSoC Creator 4.2\r
;\r
; Description:\r
; \r
;\r
;-------------------------------------------------------------------------------\r
-; Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.\r
+; Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.\r
; You may use this file only in accordance with the license, terms, conditions, \r
; disclaimers, and limitations in the end user license agreement accompanying \r
; the software package with which this file was provided.\r
GET cydevicerv.inc\r
GET cydevicerv_trm.inc\r
\r
-; Debug_Timer_Interrupt\r
-Debug_Timer_Interrupt__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
-Debug_Timer_Interrupt__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
-Debug_Timer_Interrupt__INTC_MASK EQU 0x01\r
-Debug_Timer_Interrupt__INTC_NUMBER EQU 0\r
-Debug_Timer_Interrupt__INTC_PRIOR_NUM EQU 7\r
-Debug_Timer_Interrupt__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_0\r
-Debug_Timer_Interrupt__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
-Debug_Timer_Interrupt__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
-\r
-; Debug_Timer_TimerHW\r
-Debug_Timer_TimerHW__CAP0 EQU CYREG_TMR0_CAP0\r
-Debug_Timer_TimerHW__CAP1 EQU CYREG_TMR0_CAP1\r
-Debug_Timer_TimerHW__CFG0 EQU CYREG_TMR0_CFG0\r
-Debug_Timer_TimerHW__CFG1 EQU CYREG_TMR0_CFG1\r
-Debug_Timer_TimerHW__CFG2 EQU CYREG_TMR0_CFG2\r
-Debug_Timer_TimerHW__CNT_CMP0 EQU CYREG_TMR0_CNT_CMP0\r
-Debug_Timer_TimerHW__CNT_CMP1 EQU CYREG_TMR0_CNT_CMP1\r
-Debug_Timer_TimerHW__PER0 EQU CYREG_TMR0_PER0\r
-Debug_Timer_TimerHW__PER1 EQU CYREG_TMR0_PER1\r
-Debug_Timer_TimerHW__PM_ACT_CFG EQU CYREG_PM_ACT_CFG3\r
-Debug_Timer_TimerHW__PM_ACT_MSK EQU 0x01\r
-Debug_Timer_TimerHW__PM_STBY_CFG EQU CYREG_PM_STBY_CFG3\r
-Debug_Timer_TimerHW__PM_STBY_MSK EQU 0x01\r
-Debug_Timer_TimerHW__RT0 EQU CYREG_TMR0_RT0\r
-Debug_Timer_TimerHW__RT1 EQU CYREG_TMR0_RT1\r
-Debug_Timer_TimerHW__SR0 EQU CYREG_TMR0_SR0\r
-\r
-; EXTLED\r
-EXTLED__0__INTTYPE EQU CYREG_PICU0_INTTYPE0\r
-EXTLED__0__MASK EQU 0x01\r
-EXTLED__0__PC EQU CYREG_PRT0_PC0\r
-EXTLED__0__PORT EQU 0\r
-EXTLED__0__SHIFT EQU 0\r
-EXTLED__AG EQU CYREG_PRT0_AG\r
-EXTLED__AMUX EQU CYREG_PRT0_AMUX\r
-EXTLED__BIE EQU CYREG_PRT0_BIE\r
-EXTLED__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-EXTLED__BYP EQU CYREG_PRT0_BYP\r
-EXTLED__CTL EQU CYREG_PRT0_CTL\r
-EXTLED__DM0 EQU CYREG_PRT0_DM0\r
-EXTLED__DM1 EQU CYREG_PRT0_DM1\r
-EXTLED__DM2 EQU CYREG_PRT0_DM2\r
-EXTLED__DR EQU CYREG_PRT0_DR\r
-EXTLED__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-EXTLED__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU0_BASE\r
-EXTLED__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-EXTLED__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-EXTLED__MASK EQU 0x01\r
-EXTLED__PORT EQU 0\r
-EXTLED__PRT EQU CYREG_PRT0_PRT\r
-EXTLED__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-EXTLED__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-EXTLED__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-EXTLED__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-EXTLED__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-EXTLED__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-EXTLED__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-EXTLED__PS EQU CYREG_PRT0_PS\r
-EXTLED__SHIFT EQU 0\r
-EXTLED__SLW EQU CYREG_PRT0_SLW\r
-\r
; LED1\r
LED1__0__INTTYPE EQU CYREG_PICU0_INTTYPE1\r
LED1__0__MASK EQU 0x02\r
LED1__SHIFT EQU 1\r
LED1__SLW EQU CYREG_PRT0_SLW\r
\r
-; SCSI_CLK\r
-SCSI_CLK__CFG0 EQU CYREG_CLKDIST_DCFG1_CFG0\r
-SCSI_CLK__CFG1 EQU CYREG_CLKDIST_DCFG1_CFG1\r
-SCSI_CLK__CFG2 EQU CYREG_CLKDIST_DCFG1_CFG2\r
-SCSI_CLK__CFG2_SRC_SEL_MASK EQU 0x07\r
-SCSI_CLK__INDEX EQU 0x01\r
-SCSI_CLK__PM_ACT_CFG EQU CYREG_PM_ACT_CFG2\r
-SCSI_CLK__PM_ACT_MSK EQU 0x02\r
-SCSI_CLK__PM_STBY_CFG EQU CYREG_PM_STBY_CFG2\r
-SCSI_CLK__PM_STBY_MSK EQU 0x02\r
-\r
-; SCSI_CTL_PHASE\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__0__MASK EQU 0x01\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__0__POS EQU 0\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__1__MASK EQU 0x02\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__1__POS EQU 1\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB06_07_ACTL\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB06_07_CTL\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB06_07_CTL\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB06_07_CTL\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB06_07_CTL\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB06_07_MSK\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB06_07_MSK\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB06_07_MSK\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB06_07_MSK\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__2__MASK EQU 0x04\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__2__POS EQU 2\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB06_ACTL\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB06_CTL\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB06_ST_CTL\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB06_CTL\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB06_ST_CTL\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__MASK EQU 0x07\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB06_MSK_ACTL\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB06_MSK_ACTL\r
-SCSI_CTL_PHASE_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB06_MSK\r
-\r
-; SCSI_Filtered\r
-SCSI_Filtered_sts_sts_reg__0__MASK EQU 0x01\r
-SCSI_Filtered_sts_sts_reg__0__POS EQU 0\r
-SCSI_Filtered_sts_sts_reg__1__MASK EQU 0x02\r
-SCSI_Filtered_sts_sts_reg__1__POS EQU 1\r
-SCSI_Filtered_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB11_12_ACTL\r
-SCSI_Filtered_sts_sts_reg__16BIT_STATUS_REG EQU CYREG_B0_UDB11_12_ST\r
-SCSI_Filtered_sts_sts_reg__2__MASK EQU 0x04\r
-SCSI_Filtered_sts_sts_reg__2__POS EQU 2\r
-SCSI_Filtered_sts_sts_reg__3__MASK EQU 0x08\r
-SCSI_Filtered_sts_sts_reg__3__POS EQU 3\r
-SCSI_Filtered_sts_sts_reg__4__MASK EQU 0x10\r
-SCSI_Filtered_sts_sts_reg__4__POS EQU 4\r
-SCSI_Filtered_sts_sts_reg__MASK EQU 0x1F\r
-SCSI_Filtered_sts_sts_reg__MASK_REG EQU CYREG_B0_UDB11_MSK\r
-SCSI_Filtered_sts_sts_reg__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB11_ACTL\r
-SCSI_Filtered_sts_sts_reg__STATUS_REG EQU CYREG_B0_UDB11_ST\r
+; SD_CD\r
+SD_CD__0__INTTYPE EQU CYREG_PICU3_INTTYPE5\r
+SD_CD__0__MASK EQU 0x20\r
+SD_CD__0__PC EQU CYREG_PRT3_PC5\r
+SD_CD__0__PORT EQU 3\r
+SD_CD__0__SHIFT EQU 5\r
+SD_CD__AG EQU CYREG_PRT3_AG\r
+SD_CD__AMUX EQU CYREG_PRT3_AMUX\r
+SD_CD__BIE EQU CYREG_PRT3_BIE\r
+SD_CD__BIT_MASK EQU CYREG_PRT3_BIT_MASK\r
+SD_CD__BYP EQU CYREG_PRT3_BYP\r
+SD_CD__CTL EQU CYREG_PRT3_CTL\r
+SD_CD__DM0 EQU CYREG_PRT3_DM0\r
+SD_CD__DM1 EQU CYREG_PRT3_DM1\r
+SD_CD__DM2 EQU CYREG_PRT3_DM2\r
+SD_CD__DR EQU CYREG_PRT3_DR\r
+SD_CD__INP_DIS EQU CYREG_PRT3_INP_DIS\r
+SD_CD__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU3_BASE\r
+SD_CD__LCD_COM_SEG EQU CYREG_PRT3_LCD_COM_SEG\r
+SD_CD__LCD_EN EQU CYREG_PRT3_LCD_EN\r
+SD_CD__MASK EQU 0x20\r
+SD_CD__PORT EQU 3\r
+SD_CD__PRT EQU CYREG_PRT3_PRT\r
+SD_CD__PRTDSI__CAPS_SEL EQU CYREG_PRT3_CAPS_SEL\r
+SD_CD__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT3_DBL_SYNC_IN\r
+SD_CD__PRTDSI__OE_SEL0 EQU CYREG_PRT3_OE_SEL0\r
+SD_CD__PRTDSI__OE_SEL1 EQU CYREG_PRT3_OE_SEL1\r
+SD_CD__PRTDSI__OUT_SEL0 EQU CYREG_PRT3_OUT_SEL0\r
+SD_CD__PRTDSI__OUT_SEL1 EQU CYREG_PRT3_OUT_SEL1\r
+SD_CD__PRTDSI__SYNC_OUT EQU CYREG_PRT3_SYNC_OUT\r
+SD_CD__PS EQU CYREG_PRT3_PS\r
+SD_CD__SHIFT EQU 5\r
+SD_CD__SLW EQU CYREG_PRT3_SLW\r
\r
-; SCSI_Glitch_Ctl\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__0__MASK EQU 0x01\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__0__POS EQU 0\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB04_05_ACTL\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB04_05_CTL\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB04_05_CTL\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB04_05_CTL\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB04_05_CTL\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB04_05_MSK\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB04_05_MSK\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB04_05_MSK\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB04_05_MSK\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB04_ACTL\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB04_CTL\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB04_ST_CTL\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB04_CTL\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB04_ST_CTL\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__MASK EQU 0x01\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB04_MSK_ACTL\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB04_MSK_ACTL\r
-SCSI_Glitch_Ctl_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB04_MSK\r
-\r
-; SCSI_In\r
-SCSI_In__0__AG EQU CYREG_PRT2_AG\r
-SCSI_In__0__AMUX EQU CYREG_PRT2_AMUX\r
-SCSI_In__0__BIE EQU CYREG_PRT2_BIE\r
-SCSI_In__0__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
-SCSI_In__0__BYP EQU CYREG_PRT2_BYP\r
-SCSI_In__0__CTL EQU CYREG_PRT2_CTL\r
-SCSI_In__0__DM0 EQU CYREG_PRT2_DM0\r
-SCSI_In__0__DM1 EQU CYREG_PRT2_DM1\r
-SCSI_In__0__DM2 EQU CYREG_PRT2_DM2\r
-SCSI_In__0__DR EQU CYREG_PRT2_DR\r
-SCSI_In__0__INP_DIS EQU CYREG_PRT2_INP_DIS\r
-SCSI_In__0__INTTYPE EQU CYREG_PICU2_INTTYPE1\r
-SCSI_In__0__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
-SCSI_In__0__LCD_EN EQU CYREG_PRT2_LCD_EN\r
-SCSI_In__0__MASK EQU 0x02\r
-SCSI_In__0__PC EQU CYREG_PRT2_PC1\r
-SCSI_In__0__PORT EQU 2\r
-SCSI_In__0__PRT EQU CYREG_PRT2_PRT\r
-SCSI_In__0__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
-SCSI_In__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
-SCSI_In__0__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
-SCSI_In__0__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
-SCSI_In__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
-SCSI_In__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
-SCSI_In__0__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
-SCSI_In__0__PS EQU CYREG_PRT2_PS\r
-SCSI_In__0__SHIFT EQU 1\r
-SCSI_In__0__SLW EQU CYREG_PRT2_SLW\r
-SCSI_In__1__AG EQU CYREG_PRT4_AG\r
-SCSI_In__1__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_In__1__BIE EQU CYREG_PRT4_BIE\r
-SCSI_In__1__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_In__1__BYP EQU CYREG_PRT4_BYP\r
-SCSI_In__1__CTL EQU CYREG_PRT4_CTL\r
-SCSI_In__1__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_In__1__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_In__1__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_In__1__DR EQU CYREG_PRT4_DR\r
-SCSI_In__1__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_In__1__INTTYPE EQU CYREG_PICU4_INTTYPE6\r
-SCSI_In__1__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_In__1__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_In__1__MASK EQU 0x40\r
-SCSI_In__1__PC EQU CYREG_PRT4_PC6\r
-SCSI_In__1__PORT EQU 4\r
-SCSI_In__1__PRT EQU CYREG_PRT4_PRT\r
-SCSI_In__1__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_In__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_In__1__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_In__1__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_In__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_In__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_In__1__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_In__1__PS EQU CYREG_PRT4_PS\r
-SCSI_In__1__SHIFT EQU 6\r
-SCSI_In__1__SLW EQU CYREG_PRT4_SLW\r
-SCSI_In__2__AG EQU CYREG_PRT4_AG\r
-SCSI_In__2__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_In__2__BIE EQU CYREG_PRT4_BIE\r
-SCSI_In__2__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_In__2__BYP EQU CYREG_PRT4_BYP\r
-SCSI_In__2__CTL EQU CYREG_PRT4_CTL\r
-SCSI_In__2__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_In__2__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_In__2__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_In__2__DR EQU CYREG_PRT4_DR\r
-SCSI_In__2__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_In__2__INTTYPE EQU CYREG_PICU4_INTTYPE2\r
-SCSI_In__2__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_In__2__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_In__2__MASK EQU 0x04\r
-SCSI_In__2__PC EQU CYREG_PRT4_PC2\r
-SCSI_In__2__PORT EQU 4\r
-SCSI_In__2__PRT EQU CYREG_PRT4_PRT\r
-SCSI_In__2__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_In__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_In__2__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_In__2__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_In__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_In__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_In__2__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_In__2__PS EQU CYREG_PRT4_PS\r
-SCSI_In__2__SHIFT EQU 2\r
-SCSI_In__2__SLW EQU CYREG_PRT4_SLW\r
-SCSI_In__3__AG EQU CYREG_PRT0_AG\r
-SCSI_In__3__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_In__3__BIE EQU CYREG_PRT0_BIE\r
-SCSI_In__3__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_In__3__BYP EQU CYREG_PRT0_BYP\r
-SCSI_In__3__CTL EQU CYREG_PRT0_CTL\r
-SCSI_In__3__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_In__3__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_In__3__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_In__3__DR EQU CYREG_PRT0_DR\r
-SCSI_In__3__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_In__3__INTTYPE EQU CYREG_PICU0_INTTYPE5\r
-SCSI_In__3__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_In__3__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_In__3__MASK EQU 0x20\r
-SCSI_In__3__PC EQU CYREG_PRT0_PC5\r
-SCSI_In__3__PORT EQU 0\r
-SCSI_In__3__PRT EQU CYREG_PRT0_PRT\r
-SCSI_In__3__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_In__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_In__3__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_In__3__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_In__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_In__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_In__3__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_In__3__PS EQU CYREG_PRT0_PS\r
-SCSI_In__3__SHIFT EQU 5\r
-SCSI_In__3__SLW EQU CYREG_PRT0_SLW\r
-SCSI_In__4__AG EQU CYREG_PRT0_AG\r
-SCSI_In__4__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_In__4__BIE EQU CYREG_PRT0_BIE\r
-SCSI_In__4__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_In__4__BYP EQU CYREG_PRT0_BYP\r
-SCSI_In__4__CTL EQU CYREG_PRT0_CTL\r
-SCSI_In__4__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_In__4__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_In__4__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_In__4__DR EQU CYREG_PRT0_DR\r
-SCSI_In__4__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_In__4__INTTYPE EQU CYREG_PICU0_INTTYPE4\r
-SCSI_In__4__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_In__4__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_In__4__MASK EQU 0x10\r
-SCSI_In__4__PC EQU CYREG_PRT0_PC4\r
-SCSI_In__4__PORT EQU 0\r
-SCSI_In__4__PRT EQU CYREG_PRT0_PRT\r
-SCSI_In__4__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_In__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_In__4__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_In__4__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_In__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_In__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_In__4__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_In__4__PS EQU CYREG_PRT0_PS\r
-SCSI_In__4__SHIFT EQU 4\r
-SCSI_In__4__SLW EQU CYREG_PRT0_SLW\r
-SCSI_In__CD__AG EQU CYREG_PRT4_AG\r
-SCSI_In__CD__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_In__CD__BIE EQU CYREG_PRT4_BIE\r
-SCSI_In__CD__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_In__CD__BYP EQU CYREG_PRT4_BYP\r
-SCSI_In__CD__CTL EQU CYREG_PRT4_CTL\r
-SCSI_In__CD__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_In__CD__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_In__CD__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_In__CD__DR EQU CYREG_PRT4_DR\r
-SCSI_In__CD__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_In__CD__INTTYPE EQU CYREG_PICU4_INTTYPE2\r
-SCSI_In__CD__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_In__CD__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_In__CD__MASK EQU 0x04\r
-SCSI_In__CD__PC EQU CYREG_PRT4_PC2\r
-SCSI_In__CD__PORT EQU 4\r
-SCSI_In__CD__PRT EQU CYREG_PRT4_PRT\r
-SCSI_In__CD__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_In__CD__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_In__CD__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_In__CD__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_In__CD__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_In__CD__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_In__CD__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_In__CD__PS EQU CYREG_PRT4_PS\r
-SCSI_In__CD__SHIFT EQU 2\r
-SCSI_In__CD__SLW EQU CYREG_PRT4_SLW\r
-SCSI_In__DBP__AG EQU CYREG_PRT2_AG\r
-SCSI_In__DBP__AMUX EQU CYREG_PRT2_AMUX\r
-SCSI_In__DBP__BIE EQU CYREG_PRT2_BIE\r
-SCSI_In__DBP__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
-SCSI_In__DBP__BYP EQU CYREG_PRT2_BYP\r
-SCSI_In__DBP__CTL EQU CYREG_PRT2_CTL\r
-SCSI_In__DBP__DM0 EQU CYREG_PRT2_DM0\r
-SCSI_In__DBP__DM1 EQU CYREG_PRT2_DM1\r
-SCSI_In__DBP__DM2 EQU CYREG_PRT2_DM2\r
-SCSI_In__DBP__DR EQU CYREG_PRT2_DR\r
-SCSI_In__DBP__INP_DIS EQU CYREG_PRT2_INP_DIS\r
-SCSI_In__DBP__INTTYPE EQU CYREG_PICU2_INTTYPE1\r
-SCSI_In__DBP__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
-SCSI_In__DBP__LCD_EN EQU CYREG_PRT2_LCD_EN\r
-SCSI_In__DBP__MASK EQU 0x02\r
-SCSI_In__DBP__PC EQU CYREG_PRT2_PC1\r
-SCSI_In__DBP__PORT EQU 2\r
-SCSI_In__DBP__PRT EQU CYREG_PRT2_PRT\r
-SCSI_In__DBP__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
-SCSI_In__DBP__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
-SCSI_In__DBP__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
-SCSI_In__DBP__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
-SCSI_In__DBP__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
-SCSI_In__DBP__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
-SCSI_In__DBP__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
-SCSI_In__DBP__PS EQU CYREG_PRT2_PS\r
-SCSI_In__DBP__SHIFT EQU 1\r
-SCSI_In__DBP__SLW EQU CYREG_PRT2_SLW\r
-SCSI_In__IO__AG EQU CYREG_PRT0_AG\r
-SCSI_In__IO__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_In__IO__BIE EQU CYREG_PRT0_BIE\r
-SCSI_In__IO__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_In__IO__BYP EQU CYREG_PRT0_BYP\r
-SCSI_In__IO__CTL EQU CYREG_PRT0_CTL\r
-SCSI_In__IO__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_In__IO__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_In__IO__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_In__IO__DR EQU CYREG_PRT0_DR\r
-SCSI_In__IO__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_In__IO__INTTYPE EQU CYREG_PICU0_INTTYPE4\r
-SCSI_In__IO__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_In__IO__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_In__IO__MASK EQU 0x10\r
-SCSI_In__IO__PC EQU CYREG_PRT0_PC4\r
-SCSI_In__IO__PORT EQU 0\r
-SCSI_In__IO__PRT EQU CYREG_PRT0_PRT\r
-SCSI_In__IO__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_In__IO__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_In__IO__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_In__IO__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_In__IO__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_In__IO__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_In__IO__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_In__IO__PS EQU CYREG_PRT0_PS\r
-SCSI_In__IO__SHIFT EQU 4\r
-SCSI_In__IO__SLW EQU CYREG_PRT0_SLW\r
-SCSI_In__MSG__AG EQU CYREG_PRT4_AG\r
-SCSI_In__MSG__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_In__MSG__BIE EQU CYREG_PRT4_BIE\r
-SCSI_In__MSG__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_In__MSG__BYP EQU CYREG_PRT4_BYP\r
-SCSI_In__MSG__CTL EQU CYREG_PRT4_CTL\r
-SCSI_In__MSG__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_In__MSG__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_In__MSG__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_In__MSG__DR EQU CYREG_PRT4_DR\r
-SCSI_In__MSG__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_In__MSG__INTTYPE EQU CYREG_PICU4_INTTYPE6\r
-SCSI_In__MSG__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_In__MSG__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_In__MSG__MASK EQU 0x40\r
-SCSI_In__MSG__PC EQU CYREG_PRT4_PC6\r
-SCSI_In__MSG__PORT EQU 4\r
-SCSI_In__MSG__PRT EQU CYREG_PRT4_PRT\r
-SCSI_In__MSG__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_In__MSG__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_In__MSG__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_In__MSG__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_In__MSG__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_In__MSG__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_In__MSG__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_In__MSG__PS EQU CYREG_PRT4_PS\r
-SCSI_In__MSG__SHIFT EQU 6\r
-SCSI_In__MSG__SLW EQU CYREG_PRT4_SLW\r
-SCSI_In__REQ__AG EQU CYREG_PRT0_AG\r
-SCSI_In__REQ__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_In__REQ__BIE EQU CYREG_PRT0_BIE\r
-SCSI_In__REQ__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_In__REQ__BYP EQU CYREG_PRT0_BYP\r
-SCSI_In__REQ__CTL EQU CYREG_PRT0_CTL\r
-SCSI_In__REQ__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_In__REQ__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_In__REQ__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_In__REQ__DR EQU CYREG_PRT0_DR\r
-SCSI_In__REQ__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_In__REQ__INTTYPE EQU CYREG_PICU0_INTTYPE5\r
-SCSI_In__REQ__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_In__REQ__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_In__REQ__MASK EQU 0x20\r
-SCSI_In__REQ__PC EQU CYREG_PRT0_PC5\r
-SCSI_In__REQ__PORT EQU 0\r
-SCSI_In__REQ__PRT EQU CYREG_PRT0_PRT\r
-SCSI_In__REQ__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_In__REQ__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_In__REQ__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_In__REQ__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_In__REQ__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_In__REQ__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_In__REQ__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_In__REQ__PS EQU CYREG_PRT0_PS\r
-SCSI_In__REQ__SHIFT EQU 5\r
-SCSI_In__REQ__SLW EQU CYREG_PRT0_SLW\r
-SCSI_In_DBx__0__AG EQU CYREG_PRT5_AG\r
-SCSI_In_DBx__0__AMUX EQU CYREG_PRT5_AMUX\r
-SCSI_In_DBx__0__BIE EQU CYREG_PRT5_BIE\r
-SCSI_In_DBx__0__BIT_MASK EQU CYREG_PRT5_BIT_MASK\r
-SCSI_In_DBx__0__BYP EQU CYREG_PRT5_BYP\r
-SCSI_In_DBx__0__CTL EQU CYREG_PRT5_CTL\r
-SCSI_In_DBx__0__DM0 EQU CYREG_PRT5_DM0\r
-SCSI_In_DBx__0__DM1 EQU CYREG_PRT5_DM1\r
-SCSI_In_DBx__0__DM2 EQU CYREG_PRT5_DM2\r
-SCSI_In_DBx__0__DR EQU CYREG_PRT5_DR\r
-SCSI_In_DBx__0__INP_DIS EQU CYREG_PRT5_INP_DIS\r
-SCSI_In_DBx__0__INTTYPE EQU CYREG_PICU5_INTTYPE3\r
-SCSI_In_DBx__0__LCD_COM_SEG EQU CYREG_PRT5_LCD_COM_SEG\r
-SCSI_In_DBx__0__LCD_EN EQU CYREG_PRT5_LCD_EN\r
-SCSI_In_DBx__0__MASK EQU 0x08\r
-SCSI_In_DBx__0__PC EQU CYREG_PRT5_PC3\r
-SCSI_In_DBx__0__PORT EQU 5\r
-SCSI_In_DBx__0__PRT EQU CYREG_PRT5_PRT\r
-SCSI_In_DBx__0__PRTDSI__CAPS_SEL EQU CYREG_PRT5_CAPS_SEL\r
-SCSI_In_DBx__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT5_DBL_SYNC_IN\r
-SCSI_In_DBx__0__PRTDSI__OE_SEL0 EQU CYREG_PRT5_OE_SEL0\r
-SCSI_In_DBx__0__PRTDSI__OE_SEL1 EQU CYREG_PRT5_OE_SEL1\r
-SCSI_In_DBx__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT5_OUT_SEL0\r
-SCSI_In_DBx__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT5_OUT_SEL1\r
-SCSI_In_DBx__0__PRTDSI__SYNC_OUT EQU CYREG_PRT5_SYNC_OUT\r
-SCSI_In_DBx__0__PS EQU CYREG_PRT5_PS\r
-SCSI_In_DBx__0__SHIFT EQU 3\r
-SCSI_In_DBx__0__SLW EQU CYREG_PRT5_SLW\r
-SCSI_In_DBx__1__AG EQU CYREG_PRT5_AG\r
-SCSI_In_DBx__1__AMUX EQU CYREG_PRT5_AMUX\r
-SCSI_In_DBx__1__BIE EQU CYREG_PRT5_BIE\r
-SCSI_In_DBx__1__BIT_MASK EQU CYREG_PRT5_BIT_MASK\r
-SCSI_In_DBx__1__BYP EQU CYREG_PRT5_BYP\r
-SCSI_In_DBx__1__CTL EQU CYREG_PRT5_CTL\r
-SCSI_In_DBx__1__DM0 EQU CYREG_PRT5_DM0\r
-SCSI_In_DBx__1__DM1 EQU CYREG_PRT5_DM1\r
-SCSI_In_DBx__1__DM2 EQU CYREG_PRT5_DM2\r
-SCSI_In_DBx__1__DR EQU CYREG_PRT5_DR\r
-SCSI_In_DBx__1__INP_DIS EQU CYREG_PRT5_INP_DIS\r
-SCSI_In_DBx__1__INTTYPE EQU CYREG_PICU5_INTTYPE2\r
-SCSI_In_DBx__1__LCD_COM_SEG EQU CYREG_PRT5_LCD_COM_SEG\r
-SCSI_In_DBx__1__LCD_EN EQU CYREG_PRT5_LCD_EN\r
-SCSI_In_DBx__1__MASK EQU 0x04\r
-SCSI_In_DBx__1__PC EQU CYREG_PRT5_PC2\r
-SCSI_In_DBx__1__PORT EQU 5\r
-SCSI_In_DBx__1__PRT EQU CYREG_PRT5_PRT\r
-SCSI_In_DBx__1__PRTDSI__CAPS_SEL EQU CYREG_PRT5_CAPS_SEL\r
-SCSI_In_DBx__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT5_DBL_SYNC_IN\r
-SCSI_In_DBx__1__PRTDSI__OE_SEL0 EQU CYREG_PRT5_OE_SEL0\r
-SCSI_In_DBx__1__PRTDSI__OE_SEL1 EQU CYREG_PRT5_OE_SEL1\r
-SCSI_In_DBx__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT5_OUT_SEL0\r
-SCSI_In_DBx__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT5_OUT_SEL1\r
-SCSI_In_DBx__1__PRTDSI__SYNC_OUT EQU CYREG_PRT5_SYNC_OUT\r
-SCSI_In_DBx__1__PS EQU CYREG_PRT5_PS\r
-SCSI_In_DBx__1__SHIFT EQU 2\r
-SCSI_In_DBx__1__SLW EQU CYREG_PRT5_SLW\r
-SCSI_In_DBx__2__AG EQU CYREG_PRT6_AG\r
-SCSI_In_DBx__2__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_In_DBx__2__BIE EQU CYREG_PRT6_BIE\r
-SCSI_In_DBx__2__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_In_DBx__2__BYP EQU CYREG_PRT6_BYP\r
-SCSI_In_DBx__2__CTL EQU CYREG_PRT6_CTL\r
-SCSI_In_DBx__2__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_In_DBx__2__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_In_DBx__2__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_In_DBx__2__DR EQU CYREG_PRT6_DR\r
-SCSI_In_DBx__2__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_In_DBx__2__INTTYPE EQU CYREG_PICU6_INTTYPE7\r
-SCSI_In_DBx__2__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_In_DBx__2__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_In_DBx__2__MASK EQU 0x80\r
-SCSI_In_DBx__2__PC EQU CYREG_PRT6_PC7\r
-SCSI_In_DBx__2__PORT EQU 6\r
-SCSI_In_DBx__2__PRT EQU CYREG_PRT6_PRT\r
-SCSI_In_DBx__2__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_In_DBx__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_In_DBx__2__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_In_DBx__2__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_In_DBx__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_In_DBx__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_In_DBx__2__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_In_DBx__2__PS EQU CYREG_PRT6_PS\r
-SCSI_In_DBx__2__SHIFT EQU 7\r
-SCSI_In_DBx__2__SLW EQU CYREG_PRT6_SLW\r
-SCSI_In_DBx__3__AG EQU CYREG_PRT6_AG\r
-SCSI_In_DBx__3__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_In_DBx__3__BIE EQU CYREG_PRT6_BIE\r
-SCSI_In_DBx__3__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_In_DBx__3__BYP EQU CYREG_PRT6_BYP\r
-SCSI_In_DBx__3__CTL EQU CYREG_PRT6_CTL\r
-SCSI_In_DBx__3__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_In_DBx__3__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_In_DBx__3__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_In_DBx__3__DR EQU CYREG_PRT6_DR\r
-SCSI_In_DBx__3__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_In_DBx__3__INTTYPE EQU CYREG_PICU6_INTTYPE6\r
-SCSI_In_DBx__3__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_In_DBx__3__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_In_DBx__3__MASK EQU 0x40\r
-SCSI_In_DBx__3__PC EQU CYREG_PRT6_PC6\r
-SCSI_In_DBx__3__PORT EQU 6\r
-SCSI_In_DBx__3__PRT EQU CYREG_PRT6_PRT\r
-SCSI_In_DBx__3__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_In_DBx__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_In_DBx__3__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_In_DBx__3__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_In_DBx__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_In_DBx__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_In_DBx__3__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_In_DBx__3__PS EQU CYREG_PRT6_PS\r
-SCSI_In_DBx__3__SHIFT EQU 6\r
-SCSI_In_DBx__3__SLW EQU CYREG_PRT6_SLW\r
-SCSI_In_DBx__4__AG EQU CYREG_PRT12_AG\r
-SCSI_In_DBx__4__BIE EQU CYREG_PRT12_BIE\r
-SCSI_In_DBx__4__BIT_MASK EQU CYREG_PRT12_BIT_MASK\r
-SCSI_In_DBx__4__BYP EQU CYREG_PRT12_BYP\r
-SCSI_In_DBx__4__DM0 EQU CYREG_PRT12_DM0\r
-SCSI_In_DBx__4__DM1 EQU CYREG_PRT12_DM1\r
-SCSI_In_DBx__4__DM2 EQU CYREG_PRT12_DM2\r
-SCSI_In_DBx__4__DR EQU CYREG_PRT12_DR\r
-SCSI_In_DBx__4__INP_DIS EQU CYREG_PRT12_INP_DIS\r
-SCSI_In_DBx__4__INTTYPE EQU CYREG_PICU12_INTTYPE5\r
-SCSI_In_DBx__4__MASK EQU 0x20\r
-SCSI_In_DBx__4__PC EQU CYREG_PRT12_PC5\r
-SCSI_In_DBx__4__PORT EQU 12\r
-SCSI_In_DBx__4__PRT EQU CYREG_PRT12_PRT\r
-SCSI_In_DBx__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN\r
-SCSI_In_DBx__4__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0\r
-SCSI_In_DBx__4__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1\r
-SCSI_In_DBx__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0\r
-SCSI_In_DBx__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1\r
-SCSI_In_DBx__4__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT\r
-SCSI_In_DBx__4__PS EQU CYREG_PRT12_PS\r
-SCSI_In_DBx__4__SHIFT EQU 5\r
-SCSI_In_DBx__4__SIO_CFG EQU CYREG_PRT12_SIO_CFG\r
-SCSI_In_DBx__4__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF\r
-SCSI_In_DBx__4__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN\r
-SCSI_In_DBx__4__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ\r
-SCSI_In_DBx__4__SLW EQU CYREG_PRT12_SLW\r
-SCSI_In_DBx__5__AG EQU CYREG_PRT12_AG\r
-SCSI_In_DBx__5__BIE EQU CYREG_PRT12_BIE\r
-SCSI_In_DBx__5__BIT_MASK EQU CYREG_PRT12_BIT_MASK\r
-SCSI_In_DBx__5__BYP EQU CYREG_PRT12_BYP\r
-SCSI_In_DBx__5__DM0 EQU CYREG_PRT12_DM0\r
-SCSI_In_DBx__5__DM1 EQU CYREG_PRT12_DM1\r
-SCSI_In_DBx__5__DM2 EQU CYREG_PRT12_DM2\r
-SCSI_In_DBx__5__DR EQU CYREG_PRT12_DR\r
-SCSI_In_DBx__5__INP_DIS EQU CYREG_PRT12_INP_DIS\r
-SCSI_In_DBx__5__INTTYPE EQU CYREG_PICU12_INTTYPE4\r
-SCSI_In_DBx__5__MASK EQU 0x10\r
-SCSI_In_DBx__5__PC EQU CYREG_PRT12_PC4\r
-SCSI_In_DBx__5__PORT EQU 12\r
-SCSI_In_DBx__5__PRT EQU CYREG_PRT12_PRT\r
-SCSI_In_DBx__5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN\r
-SCSI_In_DBx__5__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0\r
-SCSI_In_DBx__5__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1\r
-SCSI_In_DBx__5__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0\r
-SCSI_In_DBx__5__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1\r
-SCSI_In_DBx__5__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT\r
-SCSI_In_DBx__5__PS EQU CYREG_PRT12_PS\r
-SCSI_In_DBx__5__SHIFT EQU 4\r
-SCSI_In_DBx__5__SIO_CFG EQU CYREG_PRT12_SIO_CFG\r
-SCSI_In_DBx__5__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF\r
-SCSI_In_DBx__5__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN\r
-SCSI_In_DBx__5__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ\r
-SCSI_In_DBx__5__SLW EQU CYREG_PRT12_SLW\r
-SCSI_In_DBx__6__AG EQU CYREG_PRT2_AG\r
-SCSI_In_DBx__6__AMUX EQU CYREG_PRT2_AMUX\r
-SCSI_In_DBx__6__BIE EQU CYREG_PRT2_BIE\r
-SCSI_In_DBx__6__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
-SCSI_In_DBx__6__BYP EQU CYREG_PRT2_BYP\r
-SCSI_In_DBx__6__CTL EQU CYREG_PRT2_CTL\r
-SCSI_In_DBx__6__DM0 EQU CYREG_PRT2_DM0\r
-SCSI_In_DBx__6__DM1 EQU CYREG_PRT2_DM1\r
-SCSI_In_DBx__6__DM2 EQU CYREG_PRT2_DM2\r
-SCSI_In_DBx__6__DR EQU CYREG_PRT2_DR\r
-SCSI_In_DBx__6__INP_DIS EQU CYREG_PRT2_INP_DIS\r
-SCSI_In_DBx__6__INTTYPE EQU CYREG_PICU2_INTTYPE5\r
-SCSI_In_DBx__6__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
-SCSI_In_DBx__6__LCD_EN EQU CYREG_PRT2_LCD_EN\r
-SCSI_In_DBx__6__MASK EQU 0x20\r
-SCSI_In_DBx__6__PC EQU CYREG_PRT2_PC5\r
-SCSI_In_DBx__6__PORT EQU 2\r
-SCSI_In_DBx__6__PRT EQU CYREG_PRT2_PRT\r
-SCSI_In_DBx__6__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
-SCSI_In_DBx__6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
-SCSI_In_DBx__6__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
-SCSI_In_DBx__6__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
-SCSI_In_DBx__6__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
-SCSI_In_DBx__6__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
-SCSI_In_DBx__6__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
-SCSI_In_DBx__6__PS EQU CYREG_PRT2_PS\r
-SCSI_In_DBx__6__SHIFT EQU 5\r
-SCSI_In_DBx__6__SLW EQU CYREG_PRT2_SLW\r
-SCSI_In_DBx__7__AG EQU CYREG_PRT2_AG\r
-SCSI_In_DBx__7__AMUX EQU CYREG_PRT2_AMUX\r
-SCSI_In_DBx__7__BIE EQU CYREG_PRT2_BIE\r
-SCSI_In_DBx__7__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
-SCSI_In_DBx__7__BYP EQU CYREG_PRT2_BYP\r
-SCSI_In_DBx__7__CTL EQU CYREG_PRT2_CTL\r
-SCSI_In_DBx__7__DM0 EQU CYREG_PRT2_DM0\r
-SCSI_In_DBx__7__DM1 EQU CYREG_PRT2_DM1\r
-SCSI_In_DBx__7__DM2 EQU CYREG_PRT2_DM2\r
-SCSI_In_DBx__7__DR EQU CYREG_PRT2_DR\r
-SCSI_In_DBx__7__INP_DIS EQU CYREG_PRT2_INP_DIS\r
-SCSI_In_DBx__7__INTTYPE EQU CYREG_PICU2_INTTYPE4\r
-SCSI_In_DBx__7__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
-SCSI_In_DBx__7__LCD_EN EQU CYREG_PRT2_LCD_EN\r
-SCSI_In_DBx__7__MASK EQU 0x10\r
-SCSI_In_DBx__7__PC EQU CYREG_PRT2_PC4\r
-SCSI_In_DBx__7__PORT EQU 2\r
-SCSI_In_DBx__7__PRT EQU CYREG_PRT2_PRT\r
-SCSI_In_DBx__7__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
-SCSI_In_DBx__7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
-SCSI_In_DBx__7__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
-SCSI_In_DBx__7__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
-SCSI_In_DBx__7__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
-SCSI_In_DBx__7__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
-SCSI_In_DBx__7__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
-SCSI_In_DBx__7__PS EQU CYREG_PRT2_PS\r
-SCSI_In_DBx__7__SHIFT EQU 4\r
-SCSI_In_DBx__7__SLW EQU CYREG_PRT2_SLW\r
-SCSI_In_DBx__DB0__AG EQU CYREG_PRT5_AG\r
-SCSI_In_DBx__DB0__AMUX EQU CYREG_PRT5_AMUX\r
-SCSI_In_DBx__DB0__BIE EQU CYREG_PRT5_BIE\r
-SCSI_In_DBx__DB0__BIT_MASK EQU CYREG_PRT5_BIT_MASK\r
-SCSI_In_DBx__DB0__BYP EQU CYREG_PRT5_BYP\r
-SCSI_In_DBx__DB0__CTL EQU CYREG_PRT5_CTL\r
-SCSI_In_DBx__DB0__DM0 EQU CYREG_PRT5_DM0\r
-SCSI_In_DBx__DB0__DM1 EQU CYREG_PRT5_DM1\r
-SCSI_In_DBx__DB0__DM2 EQU CYREG_PRT5_DM2\r
-SCSI_In_DBx__DB0__DR EQU CYREG_PRT5_DR\r
-SCSI_In_DBx__DB0__INP_DIS EQU CYREG_PRT5_INP_DIS\r
-SCSI_In_DBx__DB0__INTTYPE EQU CYREG_PICU5_INTTYPE3\r
-SCSI_In_DBx__DB0__LCD_COM_SEG EQU CYREG_PRT5_LCD_COM_SEG\r
-SCSI_In_DBx__DB0__LCD_EN EQU CYREG_PRT5_LCD_EN\r
-SCSI_In_DBx__DB0__MASK EQU 0x08\r
-SCSI_In_DBx__DB0__PC EQU CYREG_PRT5_PC3\r
-SCSI_In_DBx__DB0__PORT EQU 5\r
-SCSI_In_DBx__DB0__PRT EQU CYREG_PRT5_PRT\r
-SCSI_In_DBx__DB0__PRTDSI__CAPS_SEL EQU CYREG_PRT5_CAPS_SEL\r
-SCSI_In_DBx__DB0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT5_DBL_SYNC_IN\r
-SCSI_In_DBx__DB0__PRTDSI__OE_SEL0 EQU CYREG_PRT5_OE_SEL0\r
-SCSI_In_DBx__DB0__PRTDSI__OE_SEL1 EQU CYREG_PRT5_OE_SEL1\r
-SCSI_In_DBx__DB0__PRTDSI__OUT_SEL0 EQU CYREG_PRT5_OUT_SEL0\r
-SCSI_In_DBx__DB0__PRTDSI__OUT_SEL1 EQU CYREG_PRT5_OUT_SEL1\r
-SCSI_In_DBx__DB0__PRTDSI__SYNC_OUT EQU CYREG_PRT5_SYNC_OUT\r
-SCSI_In_DBx__DB0__PS EQU CYREG_PRT5_PS\r
-SCSI_In_DBx__DB0__SHIFT EQU 3\r
-SCSI_In_DBx__DB0__SLW EQU CYREG_PRT5_SLW\r
-SCSI_In_DBx__DB1__AG EQU CYREG_PRT5_AG\r
-SCSI_In_DBx__DB1__AMUX EQU CYREG_PRT5_AMUX\r
-SCSI_In_DBx__DB1__BIE EQU CYREG_PRT5_BIE\r
-SCSI_In_DBx__DB1__BIT_MASK EQU CYREG_PRT5_BIT_MASK\r
-SCSI_In_DBx__DB1__BYP EQU CYREG_PRT5_BYP\r
-SCSI_In_DBx__DB1__CTL EQU CYREG_PRT5_CTL\r
-SCSI_In_DBx__DB1__DM0 EQU CYREG_PRT5_DM0\r
-SCSI_In_DBx__DB1__DM1 EQU CYREG_PRT5_DM1\r
-SCSI_In_DBx__DB1__DM2 EQU CYREG_PRT5_DM2\r
-SCSI_In_DBx__DB1__DR EQU CYREG_PRT5_DR\r
-SCSI_In_DBx__DB1__INP_DIS EQU CYREG_PRT5_INP_DIS\r
-SCSI_In_DBx__DB1__INTTYPE EQU CYREG_PICU5_INTTYPE2\r
-SCSI_In_DBx__DB1__LCD_COM_SEG EQU CYREG_PRT5_LCD_COM_SEG\r
-SCSI_In_DBx__DB1__LCD_EN EQU CYREG_PRT5_LCD_EN\r
-SCSI_In_DBx__DB1__MASK EQU 0x04\r
-SCSI_In_DBx__DB1__PC EQU CYREG_PRT5_PC2\r
-SCSI_In_DBx__DB1__PORT EQU 5\r
-SCSI_In_DBx__DB1__PRT EQU CYREG_PRT5_PRT\r
-SCSI_In_DBx__DB1__PRTDSI__CAPS_SEL EQU CYREG_PRT5_CAPS_SEL\r
-SCSI_In_DBx__DB1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT5_DBL_SYNC_IN\r
-SCSI_In_DBx__DB1__PRTDSI__OE_SEL0 EQU CYREG_PRT5_OE_SEL0\r
-SCSI_In_DBx__DB1__PRTDSI__OE_SEL1 EQU CYREG_PRT5_OE_SEL1\r
-SCSI_In_DBx__DB1__PRTDSI__OUT_SEL0 EQU CYREG_PRT5_OUT_SEL0\r
-SCSI_In_DBx__DB1__PRTDSI__OUT_SEL1 EQU CYREG_PRT5_OUT_SEL1\r
-SCSI_In_DBx__DB1__PRTDSI__SYNC_OUT EQU CYREG_PRT5_SYNC_OUT\r
-SCSI_In_DBx__DB1__PS EQU CYREG_PRT5_PS\r
-SCSI_In_DBx__DB1__SHIFT EQU 2\r
-SCSI_In_DBx__DB1__SLW EQU CYREG_PRT5_SLW\r
-SCSI_In_DBx__DB2__AG EQU CYREG_PRT6_AG\r
-SCSI_In_DBx__DB2__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_In_DBx__DB2__BIE EQU CYREG_PRT6_BIE\r
-SCSI_In_DBx__DB2__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_In_DBx__DB2__BYP EQU CYREG_PRT6_BYP\r
-SCSI_In_DBx__DB2__CTL EQU CYREG_PRT6_CTL\r
-SCSI_In_DBx__DB2__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_In_DBx__DB2__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_In_DBx__DB2__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_In_DBx__DB2__DR EQU CYREG_PRT6_DR\r
-SCSI_In_DBx__DB2__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_In_DBx__DB2__INTTYPE EQU CYREG_PICU6_INTTYPE7\r
-SCSI_In_DBx__DB2__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_In_DBx__DB2__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_In_DBx__DB2__MASK EQU 0x80\r
-SCSI_In_DBx__DB2__PC EQU CYREG_PRT6_PC7\r
-SCSI_In_DBx__DB2__PORT EQU 6\r
-SCSI_In_DBx__DB2__PRT EQU CYREG_PRT6_PRT\r
-SCSI_In_DBx__DB2__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_In_DBx__DB2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_In_DBx__DB2__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_In_DBx__DB2__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_In_DBx__DB2__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_In_DBx__DB2__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_In_DBx__DB2__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_In_DBx__DB2__PS EQU CYREG_PRT6_PS\r
-SCSI_In_DBx__DB2__SHIFT EQU 7\r
-SCSI_In_DBx__DB2__SLW EQU CYREG_PRT6_SLW\r
-SCSI_In_DBx__DB3__AG EQU CYREG_PRT6_AG\r
-SCSI_In_DBx__DB3__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_In_DBx__DB3__BIE EQU CYREG_PRT6_BIE\r
-SCSI_In_DBx__DB3__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_In_DBx__DB3__BYP EQU CYREG_PRT6_BYP\r
-SCSI_In_DBx__DB3__CTL EQU CYREG_PRT6_CTL\r
-SCSI_In_DBx__DB3__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_In_DBx__DB3__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_In_DBx__DB3__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_In_DBx__DB3__DR EQU CYREG_PRT6_DR\r
-SCSI_In_DBx__DB3__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_In_DBx__DB3__INTTYPE EQU CYREG_PICU6_INTTYPE6\r
-SCSI_In_DBx__DB3__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_In_DBx__DB3__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_In_DBx__DB3__MASK EQU 0x40\r
-SCSI_In_DBx__DB3__PC EQU CYREG_PRT6_PC6\r
-SCSI_In_DBx__DB3__PORT EQU 6\r
-SCSI_In_DBx__DB3__PRT EQU CYREG_PRT6_PRT\r
-SCSI_In_DBx__DB3__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_In_DBx__DB3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_In_DBx__DB3__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_In_DBx__DB3__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_In_DBx__DB3__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_In_DBx__DB3__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_In_DBx__DB3__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_In_DBx__DB3__PS EQU CYREG_PRT6_PS\r
-SCSI_In_DBx__DB3__SHIFT EQU 6\r
-SCSI_In_DBx__DB3__SLW EQU CYREG_PRT6_SLW\r
-SCSI_In_DBx__DB4__AG EQU CYREG_PRT12_AG\r
-SCSI_In_DBx__DB4__BIE EQU CYREG_PRT12_BIE\r
-SCSI_In_DBx__DB4__BIT_MASK EQU CYREG_PRT12_BIT_MASK\r
-SCSI_In_DBx__DB4__BYP EQU CYREG_PRT12_BYP\r
-SCSI_In_DBx__DB4__DM0 EQU CYREG_PRT12_DM0\r
-SCSI_In_DBx__DB4__DM1 EQU CYREG_PRT12_DM1\r
-SCSI_In_DBx__DB4__DM2 EQU CYREG_PRT12_DM2\r
-SCSI_In_DBx__DB4__DR EQU CYREG_PRT12_DR\r
-SCSI_In_DBx__DB4__INP_DIS EQU CYREG_PRT12_INP_DIS\r
-SCSI_In_DBx__DB4__INTTYPE EQU CYREG_PICU12_INTTYPE5\r
-SCSI_In_DBx__DB4__MASK EQU 0x20\r
-SCSI_In_DBx__DB4__PC EQU CYREG_PRT12_PC5\r
-SCSI_In_DBx__DB4__PORT EQU 12\r
-SCSI_In_DBx__DB4__PRT EQU CYREG_PRT12_PRT\r
-SCSI_In_DBx__DB4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN\r
-SCSI_In_DBx__DB4__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0\r
-SCSI_In_DBx__DB4__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1\r
-SCSI_In_DBx__DB4__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0\r
-SCSI_In_DBx__DB4__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1\r
-SCSI_In_DBx__DB4__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT\r
-SCSI_In_DBx__DB4__PS EQU CYREG_PRT12_PS\r
-SCSI_In_DBx__DB4__SHIFT EQU 5\r
-SCSI_In_DBx__DB4__SIO_CFG EQU CYREG_PRT12_SIO_CFG\r
-SCSI_In_DBx__DB4__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF\r
-SCSI_In_DBx__DB4__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN\r
-SCSI_In_DBx__DB4__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ\r
-SCSI_In_DBx__DB4__SLW EQU CYREG_PRT12_SLW\r
-SCSI_In_DBx__DB5__AG EQU CYREG_PRT12_AG\r
-SCSI_In_DBx__DB5__BIE EQU CYREG_PRT12_BIE\r
-SCSI_In_DBx__DB5__BIT_MASK EQU CYREG_PRT12_BIT_MASK\r
-SCSI_In_DBx__DB5__BYP EQU CYREG_PRT12_BYP\r
-SCSI_In_DBx__DB5__DM0 EQU CYREG_PRT12_DM0\r
-SCSI_In_DBx__DB5__DM1 EQU CYREG_PRT12_DM1\r
-SCSI_In_DBx__DB5__DM2 EQU CYREG_PRT12_DM2\r
-SCSI_In_DBx__DB5__DR EQU CYREG_PRT12_DR\r
-SCSI_In_DBx__DB5__INP_DIS EQU CYREG_PRT12_INP_DIS\r
-SCSI_In_DBx__DB5__INTTYPE EQU CYREG_PICU12_INTTYPE4\r
-SCSI_In_DBx__DB5__MASK EQU 0x10\r
-SCSI_In_DBx__DB5__PC EQU CYREG_PRT12_PC4\r
-SCSI_In_DBx__DB5__PORT EQU 12\r
-SCSI_In_DBx__DB5__PRT EQU CYREG_PRT12_PRT\r
-SCSI_In_DBx__DB5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN\r
-SCSI_In_DBx__DB5__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0\r
-SCSI_In_DBx__DB5__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1\r
-SCSI_In_DBx__DB5__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0\r
-SCSI_In_DBx__DB5__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1\r
-SCSI_In_DBx__DB5__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT\r
-SCSI_In_DBx__DB5__PS EQU CYREG_PRT12_PS\r
-SCSI_In_DBx__DB5__SHIFT EQU 4\r
-SCSI_In_DBx__DB5__SIO_CFG EQU CYREG_PRT12_SIO_CFG\r
-SCSI_In_DBx__DB5__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF\r
-SCSI_In_DBx__DB5__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN\r
-SCSI_In_DBx__DB5__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ\r
-SCSI_In_DBx__DB5__SLW EQU CYREG_PRT12_SLW\r
-SCSI_In_DBx__DB6__AG EQU CYREG_PRT2_AG\r
-SCSI_In_DBx__DB6__AMUX EQU CYREG_PRT2_AMUX\r
-SCSI_In_DBx__DB6__BIE EQU CYREG_PRT2_BIE\r
-SCSI_In_DBx__DB6__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
-SCSI_In_DBx__DB6__BYP EQU CYREG_PRT2_BYP\r
-SCSI_In_DBx__DB6__CTL EQU CYREG_PRT2_CTL\r
-SCSI_In_DBx__DB6__DM0 EQU CYREG_PRT2_DM0\r
-SCSI_In_DBx__DB6__DM1 EQU CYREG_PRT2_DM1\r
-SCSI_In_DBx__DB6__DM2 EQU CYREG_PRT2_DM2\r
-SCSI_In_DBx__DB6__DR EQU CYREG_PRT2_DR\r
-SCSI_In_DBx__DB6__INP_DIS EQU CYREG_PRT2_INP_DIS\r
-SCSI_In_DBx__DB6__INTTYPE EQU CYREG_PICU2_INTTYPE5\r
-SCSI_In_DBx__DB6__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
-SCSI_In_DBx__DB6__LCD_EN EQU CYREG_PRT2_LCD_EN\r
-SCSI_In_DBx__DB6__MASK EQU 0x20\r
-SCSI_In_DBx__DB6__PC EQU CYREG_PRT2_PC5\r
-SCSI_In_DBx__DB6__PORT EQU 2\r
-SCSI_In_DBx__DB6__PRT EQU CYREG_PRT2_PRT\r
-SCSI_In_DBx__DB6__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
-SCSI_In_DBx__DB6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
-SCSI_In_DBx__DB6__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
-SCSI_In_DBx__DB6__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
-SCSI_In_DBx__DB6__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
-SCSI_In_DBx__DB6__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
-SCSI_In_DBx__DB6__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
-SCSI_In_DBx__DB6__PS EQU CYREG_PRT2_PS\r
-SCSI_In_DBx__DB6__SHIFT EQU 5\r
-SCSI_In_DBx__DB6__SLW EQU CYREG_PRT2_SLW\r
-SCSI_In_DBx__DB7__AG EQU CYREG_PRT2_AG\r
-SCSI_In_DBx__DB7__AMUX EQU CYREG_PRT2_AMUX\r
-SCSI_In_DBx__DB7__BIE EQU CYREG_PRT2_BIE\r
-SCSI_In_DBx__DB7__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
-SCSI_In_DBx__DB7__BYP EQU CYREG_PRT2_BYP\r
-SCSI_In_DBx__DB7__CTL EQU CYREG_PRT2_CTL\r
-SCSI_In_DBx__DB7__DM0 EQU CYREG_PRT2_DM0\r
-SCSI_In_DBx__DB7__DM1 EQU CYREG_PRT2_DM1\r
-SCSI_In_DBx__DB7__DM2 EQU CYREG_PRT2_DM2\r
-SCSI_In_DBx__DB7__DR EQU CYREG_PRT2_DR\r
-SCSI_In_DBx__DB7__INP_DIS EQU CYREG_PRT2_INP_DIS\r
-SCSI_In_DBx__DB7__INTTYPE EQU CYREG_PICU2_INTTYPE4\r
-SCSI_In_DBx__DB7__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
-SCSI_In_DBx__DB7__LCD_EN EQU CYREG_PRT2_LCD_EN\r
-SCSI_In_DBx__DB7__MASK EQU 0x10\r
-SCSI_In_DBx__DB7__PC EQU CYREG_PRT2_PC4\r
-SCSI_In_DBx__DB7__PORT EQU 2\r
-SCSI_In_DBx__DB7__PRT EQU CYREG_PRT2_PRT\r
-SCSI_In_DBx__DB7__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
-SCSI_In_DBx__DB7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
-SCSI_In_DBx__DB7__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
-SCSI_In_DBx__DB7__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
-SCSI_In_DBx__DB7__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
-SCSI_In_DBx__DB7__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
-SCSI_In_DBx__DB7__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
-SCSI_In_DBx__DB7__PS EQU CYREG_PRT2_PS\r
-SCSI_In_DBx__DB7__SHIFT EQU 4\r
-SCSI_In_DBx__DB7__SLW EQU CYREG_PRT2_SLW\r
-\r
-; SCSI_Noise\r
-SCSI_Noise__0__AG EQU CYREG_PRT2_AG\r
-SCSI_Noise__0__AMUX EQU CYREG_PRT2_AMUX\r
-SCSI_Noise__0__BIE EQU CYREG_PRT2_BIE\r
-SCSI_Noise__0__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
-SCSI_Noise__0__BYP EQU CYREG_PRT2_BYP\r
-SCSI_Noise__0__CTL EQU CYREG_PRT2_CTL\r
-SCSI_Noise__0__DM0 EQU CYREG_PRT2_DM0\r
-SCSI_Noise__0__DM1 EQU CYREG_PRT2_DM1\r
-SCSI_Noise__0__DM2 EQU CYREG_PRT2_DM2\r
-SCSI_Noise__0__DR EQU CYREG_PRT2_DR\r
-SCSI_Noise__0__INP_DIS EQU CYREG_PRT2_INP_DIS\r
-SCSI_Noise__0__INTTYPE EQU CYREG_PICU2_INTTYPE0\r
-SCSI_Noise__0__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
-SCSI_Noise__0__LCD_EN EQU CYREG_PRT2_LCD_EN\r
-SCSI_Noise__0__MASK EQU 0x01\r
-SCSI_Noise__0__PC EQU CYREG_PRT2_PC0\r
-SCSI_Noise__0__PORT EQU 2\r
-SCSI_Noise__0__PRT EQU CYREG_PRT2_PRT\r
-SCSI_Noise__0__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
-SCSI_Noise__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
-SCSI_Noise__0__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
-SCSI_Noise__0__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
-SCSI_Noise__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
-SCSI_Noise__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
-SCSI_Noise__0__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
-SCSI_Noise__0__PS EQU CYREG_PRT2_PS\r
-SCSI_Noise__0__SHIFT EQU 0\r
-SCSI_Noise__0__SLW EQU CYREG_PRT2_SLW\r
-SCSI_Noise__1__AG EQU CYREG_PRT6_AG\r
-SCSI_Noise__1__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Noise__1__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Noise__1__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Noise__1__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Noise__1__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Noise__1__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Noise__1__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Noise__1__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Noise__1__DR EQU CYREG_PRT6_DR\r
-SCSI_Noise__1__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Noise__1__INTTYPE EQU CYREG_PICU6_INTTYPE3\r
-SCSI_Noise__1__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Noise__1__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Noise__1__MASK EQU 0x08\r
-SCSI_Noise__1__PC EQU CYREG_PRT6_PC3\r
-SCSI_Noise__1__PORT EQU 6\r
-SCSI_Noise__1__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Noise__1__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Noise__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Noise__1__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Noise__1__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Noise__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Noise__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Noise__1__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Noise__1__PS EQU CYREG_PRT6_PS\r
-SCSI_Noise__1__SHIFT EQU 3\r
-SCSI_Noise__1__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Noise__2__AG EQU CYREG_PRT4_AG\r
-SCSI_Noise__2__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Noise__2__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Noise__2__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Noise__2__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Noise__2__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Noise__2__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Noise__2__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Noise__2__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Noise__2__DR EQU CYREG_PRT4_DR\r
-SCSI_Noise__2__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Noise__2__INTTYPE EQU CYREG_PICU4_INTTYPE3\r
-SCSI_Noise__2__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Noise__2__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Noise__2__MASK EQU 0x08\r
-SCSI_Noise__2__PC EQU CYREG_PRT4_PC3\r
-SCSI_Noise__2__PORT EQU 4\r
-SCSI_Noise__2__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Noise__2__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Noise__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Noise__2__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Noise__2__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Noise__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Noise__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Noise__2__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Noise__2__PS EQU CYREG_PRT4_PS\r
-SCSI_Noise__2__SHIFT EQU 3\r
-SCSI_Noise__2__SLW EQU CYREG_PRT4_SLW\r
-SCSI_Noise__3__AG EQU CYREG_PRT4_AG\r
-SCSI_Noise__3__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Noise__3__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Noise__3__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Noise__3__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Noise__3__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Noise__3__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Noise__3__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Noise__3__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Noise__3__DR EQU CYREG_PRT4_DR\r
-SCSI_Noise__3__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Noise__3__INTTYPE EQU CYREG_PICU4_INTTYPE7\r
-SCSI_Noise__3__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Noise__3__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Noise__3__MASK EQU 0x80\r
-SCSI_Noise__3__PC EQU CYREG_PRT4_PC7\r
-SCSI_Noise__3__PORT EQU 4\r
-SCSI_Noise__3__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Noise__3__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Noise__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Noise__3__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Noise__3__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Noise__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Noise__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Noise__3__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Noise__3__PS EQU CYREG_PRT4_PS\r
-SCSI_Noise__3__SHIFT EQU 7\r
-SCSI_Noise__3__SLW EQU CYREG_PRT4_SLW\r
-SCSI_Noise__4__AG EQU CYREG_PRT6_AG\r
-SCSI_Noise__4__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Noise__4__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Noise__4__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Noise__4__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Noise__4__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Noise__4__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Noise__4__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Noise__4__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Noise__4__DR EQU CYREG_PRT6_DR\r
-SCSI_Noise__4__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Noise__4__INTTYPE EQU CYREG_PICU6_INTTYPE2\r
-SCSI_Noise__4__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Noise__4__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Noise__4__MASK EQU 0x04\r
-SCSI_Noise__4__PC EQU CYREG_PRT6_PC2\r
-SCSI_Noise__4__PORT EQU 6\r
-SCSI_Noise__4__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Noise__4__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Noise__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Noise__4__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Noise__4__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Noise__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Noise__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Noise__4__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Noise__4__PS EQU CYREG_PRT6_PS\r
-SCSI_Noise__4__SHIFT EQU 2\r
-SCSI_Noise__4__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Noise__ACK__AG EQU CYREG_PRT6_AG\r
-SCSI_Noise__ACK__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Noise__ACK__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Noise__ACK__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Noise__ACK__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Noise__ACK__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Noise__ACK__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Noise__ACK__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Noise__ACK__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Noise__ACK__DR EQU CYREG_PRT6_DR\r
-SCSI_Noise__ACK__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Noise__ACK__INTTYPE EQU CYREG_PICU6_INTTYPE2\r
-SCSI_Noise__ACK__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Noise__ACK__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Noise__ACK__MASK EQU 0x04\r
-SCSI_Noise__ACK__PC EQU CYREG_PRT6_PC2\r
-SCSI_Noise__ACK__PORT EQU 6\r
-SCSI_Noise__ACK__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Noise__ACK__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Noise__ACK__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Noise__ACK__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Noise__ACK__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Noise__ACK__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Noise__ACK__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Noise__ACK__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Noise__ACK__PS EQU CYREG_PRT6_PS\r
-SCSI_Noise__ACK__SHIFT EQU 2\r
-SCSI_Noise__ACK__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Noise__ATN__AG EQU CYREG_PRT2_AG\r
-SCSI_Noise__ATN__AMUX EQU CYREG_PRT2_AMUX\r
-SCSI_Noise__ATN__BIE EQU CYREG_PRT2_BIE\r
-SCSI_Noise__ATN__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
-SCSI_Noise__ATN__BYP EQU CYREG_PRT2_BYP\r
-SCSI_Noise__ATN__CTL EQU CYREG_PRT2_CTL\r
-SCSI_Noise__ATN__DM0 EQU CYREG_PRT2_DM0\r
-SCSI_Noise__ATN__DM1 EQU CYREG_PRT2_DM1\r
-SCSI_Noise__ATN__DM2 EQU CYREG_PRT2_DM2\r
-SCSI_Noise__ATN__DR EQU CYREG_PRT2_DR\r
-SCSI_Noise__ATN__INP_DIS EQU CYREG_PRT2_INP_DIS\r
-SCSI_Noise__ATN__INTTYPE EQU CYREG_PICU2_INTTYPE0\r
-SCSI_Noise__ATN__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
-SCSI_Noise__ATN__LCD_EN EQU CYREG_PRT2_LCD_EN\r
-SCSI_Noise__ATN__MASK EQU 0x01\r
-SCSI_Noise__ATN__PC EQU CYREG_PRT2_PC0\r
-SCSI_Noise__ATN__PORT EQU 2\r
-SCSI_Noise__ATN__PRT EQU CYREG_PRT2_PRT\r
-SCSI_Noise__ATN__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
-SCSI_Noise__ATN__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
-SCSI_Noise__ATN__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
-SCSI_Noise__ATN__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
-SCSI_Noise__ATN__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
-SCSI_Noise__ATN__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
-SCSI_Noise__ATN__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
-SCSI_Noise__ATN__PS EQU CYREG_PRT2_PS\r
-SCSI_Noise__ATN__SHIFT EQU 0\r
-SCSI_Noise__ATN__SLW EQU CYREG_PRT2_SLW\r
-SCSI_Noise__BSY__AG EQU CYREG_PRT6_AG\r
-SCSI_Noise__BSY__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Noise__BSY__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Noise__BSY__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Noise__BSY__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Noise__BSY__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Noise__BSY__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Noise__BSY__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Noise__BSY__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Noise__BSY__DR EQU CYREG_PRT6_DR\r
-SCSI_Noise__BSY__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Noise__BSY__INTTYPE EQU CYREG_PICU6_INTTYPE3\r
-SCSI_Noise__BSY__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Noise__BSY__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Noise__BSY__MASK EQU 0x08\r
-SCSI_Noise__BSY__PC EQU CYREG_PRT6_PC3\r
-SCSI_Noise__BSY__PORT EQU 6\r
-SCSI_Noise__BSY__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Noise__BSY__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Noise__BSY__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Noise__BSY__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Noise__BSY__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Noise__BSY__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Noise__BSY__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Noise__BSY__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Noise__BSY__PS EQU CYREG_PRT6_PS\r
-SCSI_Noise__BSY__SHIFT EQU 3\r
-SCSI_Noise__BSY__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Noise__RST__AG EQU CYREG_PRT4_AG\r
-SCSI_Noise__RST__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Noise__RST__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Noise__RST__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Noise__RST__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Noise__RST__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Noise__RST__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Noise__RST__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Noise__RST__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Noise__RST__DR EQU CYREG_PRT4_DR\r
-SCSI_Noise__RST__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Noise__RST__INTTYPE EQU CYREG_PICU4_INTTYPE7\r
-SCSI_Noise__RST__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Noise__RST__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Noise__RST__MASK EQU 0x80\r
-SCSI_Noise__RST__PC EQU CYREG_PRT4_PC7\r
-SCSI_Noise__RST__PORT EQU 4\r
-SCSI_Noise__RST__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Noise__RST__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Noise__RST__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Noise__RST__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Noise__RST__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Noise__RST__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Noise__RST__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Noise__RST__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Noise__RST__PS EQU CYREG_PRT4_PS\r
-SCSI_Noise__RST__SHIFT EQU 7\r
-SCSI_Noise__RST__SLW EQU CYREG_PRT4_SLW\r
-SCSI_Noise__SEL__AG EQU CYREG_PRT4_AG\r
-SCSI_Noise__SEL__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Noise__SEL__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Noise__SEL__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Noise__SEL__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Noise__SEL__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Noise__SEL__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Noise__SEL__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Noise__SEL__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Noise__SEL__DR EQU CYREG_PRT4_DR\r
-SCSI_Noise__SEL__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Noise__SEL__INTTYPE EQU CYREG_PICU4_INTTYPE3\r
-SCSI_Noise__SEL__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Noise__SEL__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Noise__SEL__MASK EQU 0x08\r
-SCSI_Noise__SEL__PC EQU CYREG_PRT4_PC3\r
-SCSI_Noise__SEL__PORT EQU 4\r
-SCSI_Noise__SEL__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Noise__SEL__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Noise__SEL__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Noise__SEL__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Noise__SEL__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Noise__SEL__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Noise__SEL__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Noise__SEL__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Noise__SEL__PS EQU CYREG_PRT4_PS\r
-SCSI_Noise__SEL__SHIFT EQU 3\r
-SCSI_Noise__SEL__SLW EQU CYREG_PRT4_SLW\r
-\r
-; SCSI_Out\r
-SCSI_Out__0__AG EQU CYREG_PRT15_AG\r
-SCSI_Out__0__AMUX EQU CYREG_PRT15_AMUX\r
-SCSI_Out__0__BIE EQU CYREG_PRT15_BIE\r
-SCSI_Out__0__BIT_MASK EQU CYREG_PRT15_BIT_MASK\r
-SCSI_Out__0__BYP EQU CYREG_PRT15_BYP\r
-SCSI_Out__0__CTL EQU CYREG_PRT15_CTL\r
-SCSI_Out__0__DM0 EQU CYREG_PRT15_DM0\r
-SCSI_Out__0__DM1 EQU CYREG_PRT15_DM1\r
-SCSI_Out__0__DM2 EQU CYREG_PRT15_DM2\r
-SCSI_Out__0__DR EQU CYREG_PRT15_DR\r
-SCSI_Out__0__INP_DIS EQU CYREG_PRT15_INP_DIS\r
-SCSI_Out__0__INTTYPE EQU CYREG_PICU15_INTTYPE5\r
-SCSI_Out__0__LCD_COM_SEG EQU CYREG_PRT15_LCD_COM_SEG\r
-SCSI_Out__0__LCD_EN EQU CYREG_PRT15_LCD_EN\r
-SCSI_Out__0__MASK EQU 0x20\r
-SCSI_Out__0__PC EQU CYREG_IO_PC_PRT15_PC5\r
-SCSI_Out__0__PORT EQU 15\r
-SCSI_Out__0__PRT EQU CYREG_PRT15_PRT\r
-SCSI_Out__0__PRTDSI__CAPS_SEL EQU CYREG_PRT15_CAPS_SEL\r
-SCSI_Out__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT15_DBL_SYNC_IN\r
-SCSI_Out__0__PRTDSI__OE_SEL0 EQU CYREG_PRT15_OE_SEL0\r
-SCSI_Out__0__PRTDSI__OE_SEL1 EQU CYREG_PRT15_OE_SEL1\r
-SCSI_Out__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT15_OUT_SEL0\r
-SCSI_Out__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT15_OUT_SEL1\r
-SCSI_Out__0__PRTDSI__SYNC_OUT EQU CYREG_PRT15_SYNC_OUT\r
-SCSI_Out__0__PS EQU CYREG_PRT15_PS\r
-SCSI_Out__0__SHIFT EQU 5\r
-SCSI_Out__0__SLW EQU CYREG_PRT15_SLW\r
-SCSI_Out__1__AG EQU CYREG_PRT15_AG\r
-SCSI_Out__1__AMUX EQU CYREG_PRT15_AMUX\r
-SCSI_Out__1__BIE EQU CYREG_PRT15_BIE\r
-SCSI_Out__1__BIT_MASK EQU CYREG_PRT15_BIT_MASK\r
-SCSI_Out__1__BYP EQU CYREG_PRT15_BYP\r
-SCSI_Out__1__CTL EQU CYREG_PRT15_CTL\r
-SCSI_Out__1__DM0 EQU CYREG_PRT15_DM0\r
-SCSI_Out__1__DM1 EQU CYREG_PRT15_DM1\r
-SCSI_Out__1__DM2 EQU CYREG_PRT15_DM2\r
-SCSI_Out__1__DR EQU CYREG_PRT15_DR\r
-SCSI_Out__1__INP_DIS EQU CYREG_PRT15_INP_DIS\r
-SCSI_Out__1__INTTYPE EQU CYREG_PICU15_INTTYPE4\r
-SCSI_Out__1__LCD_COM_SEG EQU CYREG_PRT15_LCD_COM_SEG\r
-SCSI_Out__1__LCD_EN EQU CYREG_PRT15_LCD_EN\r
-SCSI_Out__1__MASK EQU 0x10\r
-SCSI_Out__1__PC EQU CYREG_IO_PC_PRT15_PC4\r
-SCSI_Out__1__PORT EQU 15\r
-SCSI_Out__1__PRT EQU CYREG_PRT15_PRT\r
-SCSI_Out__1__PRTDSI__CAPS_SEL EQU CYREG_PRT15_CAPS_SEL\r
-SCSI_Out__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT15_DBL_SYNC_IN\r
-SCSI_Out__1__PRTDSI__OE_SEL0 EQU CYREG_PRT15_OE_SEL0\r
-SCSI_Out__1__PRTDSI__OE_SEL1 EQU CYREG_PRT15_OE_SEL1\r
-SCSI_Out__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT15_OUT_SEL0\r
-SCSI_Out__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT15_OUT_SEL1\r
-SCSI_Out__1__PRTDSI__SYNC_OUT EQU CYREG_PRT15_SYNC_OUT\r
-SCSI_Out__1__PS EQU CYREG_PRT15_PS\r
-SCSI_Out__1__SHIFT EQU 4\r
-SCSI_Out__1__SLW EQU CYREG_PRT15_SLW\r
-SCSI_Out__2__AG EQU CYREG_PRT6_AG\r
-SCSI_Out__2__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Out__2__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Out__2__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Out__2__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Out__2__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Out__2__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Out__2__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Out__2__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Out__2__DR EQU CYREG_PRT6_DR\r
-SCSI_Out__2__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Out__2__INTTYPE EQU CYREG_PICU6_INTTYPE1\r
-SCSI_Out__2__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Out__2__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Out__2__MASK EQU 0x02\r
-SCSI_Out__2__PC EQU CYREG_PRT6_PC1\r
-SCSI_Out__2__PORT EQU 6\r
-SCSI_Out__2__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Out__2__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Out__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Out__2__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Out__2__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Out__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Out__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Out__2__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Out__2__PS EQU CYREG_PRT6_PS\r
-SCSI_Out__2__SHIFT EQU 1\r
-SCSI_Out__2__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Out__3__AG EQU CYREG_PRT6_AG\r
-SCSI_Out__3__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Out__3__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Out__3__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Out__3__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Out__3__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Out__3__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Out__3__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Out__3__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Out__3__DR EQU CYREG_PRT6_DR\r
-SCSI_Out__3__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Out__3__INTTYPE EQU CYREG_PICU6_INTTYPE0\r
-SCSI_Out__3__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Out__3__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Out__3__MASK EQU 0x01\r
-SCSI_Out__3__PC EQU CYREG_PRT6_PC0\r
-SCSI_Out__3__PORT EQU 6\r
-SCSI_Out__3__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Out__3__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Out__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Out__3__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Out__3__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Out__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Out__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Out__3__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Out__3__PS EQU CYREG_PRT6_PS\r
-SCSI_Out__3__SHIFT EQU 0\r
-SCSI_Out__3__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Out__4__AG EQU CYREG_PRT4_AG\r
-SCSI_Out__4__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Out__4__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Out__4__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Out__4__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Out__4__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Out__4__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Out__4__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Out__4__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Out__4__DR EQU CYREG_PRT4_DR\r
-SCSI_Out__4__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Out__4__INTTYPE EQU CYREG_PICU4_INTTYPE5\r
-SCSI_Out__4__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Out__4__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Out__4__MASK EQU 0x20\r
-SCSI_Out__4__PC EQU CYREG_PRT4_PC5\r
-SCSI_Out__4__PORT EQU 4\r
-SCSI_Out__4__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Out__4__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Out__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Out__4__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Out__4__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Out__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Out__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Out__4__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Out__4__PS EQU CYREG_PRT4_PS\r
-SCSI_Out__4__SHIFT EQU 5\r
-SCSI_Out__4__SLW EQU CYREG_PRT4_SLW\r
-SCSI_Out__5__AG EQU CYREG_PRT4_AG\r
-SCSI_Out__5__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Out__5__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Out__5__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Out__5__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Out__5__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Out__5__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Out__5__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Out__5__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Out__5__DR EQU CYREG_PRT4_DR\r
-SCSI_Out__5__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Out__5__INTTYPE EQU CYREG_PICU4_INTTYPE4\r
-SCSI_Out__5__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Out__5__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Out__5__MASK EQU 0x10\r
-SCSI_Out__5__PC EQU CYREG_PRT4_PC4\r
-SCSI_Out__5__PORT EQU 4\r
-SCSI_Out__5__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Out__5__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Out__5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Out__5__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Out__5__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Out__5__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Out__5__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Out__5__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Out__5__PS EQU CYREG_PRT4_PS\r
-SCSI_Out__5__SHIFT EQU 4\r
-SCSI_Out__5__SLW EQU CYREG_PRT4_SLW\r
-SCSI_Out__6__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__6__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__6__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__6__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__6__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__6__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__6__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__6__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__6__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__6__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__6__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__6__INTTYPE EQU CYREG_PICU0_INTTYPE7\r
-SCSI_Out__6__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__6__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__6__MASK EQU 0x80\r
-SCSI_Out__6__PC EQU CYREG_PRT0_PC7\r
-SCSI_Out__6__PORT EQU 0\r
-SCSI_Out__6__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__6__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__6__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__6__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__6__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__6__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__6__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__6__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__6__SHIFT EQU 7\r
-SCSI_Out__6__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__7__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__7__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__7__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__7__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__7__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__7__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__7__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__7__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__7__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__7__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__7__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__7__INTTYPE EQU CYREG_PICU0_INTTYPE6\r
-SCSI_Out__7__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__7__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__7__MASK EQU 0x40\r
-SCSI_Out__7__PC EQU CYREG_PRT0_PC6\r
-SCSI_Out__7__PORT EQU 0\r
-SCSI_Out__7__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__7__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__7__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__7__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__7__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__7__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__7__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__7__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__7__SHIFT EQU 6\r
-SCSI_Out__7__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__8__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__8__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__8__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__8__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__8__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__8__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__8__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__8__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__8__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__8__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__8__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__8__INTTYPE EQU CYREG_PICU0_INTTYPE3\r
-SCSI_Out__8__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__8__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__8__MASK EQU 0x08\r
-SCSI_Out__8__PC EQU CYREG_PRT0_PC3\r
-SCSI_Out__8__PORT EQU 0\r
-SCSI_Out__8__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__8__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__8__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__8__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__8__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__8__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__8__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__8__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__8__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__8__SHIFT EQU 3\r
-SCSI_Out__8__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__9__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__9__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__9__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__9__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__9__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__9__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__9__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__9__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__9__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__9__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__9__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__9__INTTYPE EQU CYREG_PICU0_INTTYPE2\r
-SCSI_Out__9__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__9__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__9__MASK EQU 0x04\r
-SCSI_Out__9__PC EQU CYREG_PRT0_PC2\r
-SCSI_Out__9__PORT EQU 0\r
-SCSI_Out__9__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__9__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__9__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__9__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__9__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__9__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__9__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__9__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__9__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__9__SHIFT EQU 2\r
-SCSI_Out__9__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__ACK__AG EQU CYREG_PRT6_AG\r
-SCSI_Out__ACK__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Out__ACK__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Out__ACK__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Out__ACK__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Out__ACK__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Out__ACK__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Out__ACK__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Out__ACK__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Out__ACK__DR EQU CYREG_PRT6_DR\r
-SCSI_Out__ACK__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Out__ACK__INTTYPE EQU CYREG_PICU6_INTTYPE0\r
-SCSI_Out__ACK__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Out__ACK__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Out__ACK__MASK EQU 0x01\r
-SCSI_Out__ACK__PC EQU CYREG_PRT6_PC0\r
-SCSI_Out__ACK__PORT EQU 6\r
-SCSI_Out__ACK__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Out__ACK__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Out__ACK__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Out__ACK__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Out__ACK__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Out__ACK__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Out__ACK__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Out__ACK__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Out__ACK__PS EQU CYREG_PRT6_PS\r
-SCSI_Out__ACK__SHIFT EQU 0\r
-SCSI_Out__ACK__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Out__ATN__AG EQU CYREG_PRT15_AG\r
-SCSI_Out__ATN__AMUX EQU CYREG_PRT15_AMUX\r
-SCSI_Out__ATN__BIE EQU CYREG_PRT15_BIE\r
-SCSI_Out__ATN__BIT_MASK EQU CYREG_PRT15_BIT_MASK\r
-SCSI_Out__ATN__BYP EQU CYREG_PRT15_BYP\r
-SCSI_Out__ATN__CTL EQU CYREG_PRT15_CTL\r
-SCSI_Out__ATN__DM0 EQU CYREG_PRT15_DM0\r
-SCSI_Out__ATN__DM1 EQU CYREG_PRT15_DM1\r
-SCSI_Out__ATN__DM2 EQU CYREG_PRT15_DM2\r
-SCSI_Out__ATN__DR EQU CYREG_PRT15_DR\r
-SCSI_Out__ATN__INP_DIS EQU CYREG_PRT15_INP_DIS\r
-SCSI_Out__ATN__INTTYPE EQU CYREG_PICU15_INTTYPE4\r
-SCSI_Out__ATN__LCD_COM_SEG EQU CYREG_PRT15_LCD_COM_SEG\r
-SCSI_Out__ATN__LCD_EN EQU CYREG_PRT15_LCD_EN\r
-SCSI_Out__ATN__MASK EQU 0x10\r
-SCSI_Out__ATN__PC EQU CYREG_IO_PC_PRT15_PC4\r
-SCSI_Out__ATN__PORT EQU 15\r
-SCSI_Out__ATN__PRT EQU CYREG_PRT15_PRT\r
-SCSI_Out__ATN__PRTDSI__CAPS_SEL EQU CYREG_PRT15_CAPS_SEL\r
-SCSI_Out__ATN__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT15_DBL_SYNC_IN\r
-SCSI_Out__ATN__PRTDSI__OE_SEL0 EQU CYREG_PRT15_OE_SEL0\r
-SCSI_Out__ATN__PRTDSI__OE_SEL1 EQU CYREG_PRT15_OE_SEL1\r
-SCSI_Out__ATN__PRTDSI__OUT_SEL0 EQU CYREG_PRT15_OUT_SEL0\r
-SCSI_Out__ATN__PRTDSI__OUT_SEL1 EQU CYREG_PRT15_OUT_SEL1\r
-SCSI_Out__ATN__PRTDSI__SYNC_OUT EQU CYREG_PRT15_SYNC_OUT\r
-SCSI_Out__ATN__PS EQU CYREG_PRT15_PS\r
-SCSI_Out__ATN__SHIFT EQU 4\r
-SCSI_Out__ATN__SLW EQU CYREG_PRT15_SLW\r
-SCSI_Out__BSY__AG EQU CYREG_PRT6_AG\r
-SCSI_Out__BSY__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Out__BSY__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Out__BSY__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Out__BSY__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Out__BSY__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Out__BSY__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Out__BSY__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Out__BSY__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Out__BSY__DR EQU CYREG_PRT6_DR\r
-SCSI_Out__BSY__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Out__BSY__INTTYPE EQU CYREG_PICU6_INTTYPE1\r
-SCSI_Out__BSY__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Out__BSY__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Out__BSY__MASK EQU 0x02\r
-SCSI_Out__BSY__PC EQU CYREG_PRT6_PC1\r
-SCSI_Out__BSY__PORT EQU 6\r
-SCSI_Out__BSY__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Out__BSY__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Out__BSY__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Out__BSY__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Out__BSY__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Out__BSY__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Out__BSY__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Out__BSY__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Out__BSY__PS EQU CYREG_PRT6_PS\r
-SCSI_Out__BSY__SHIFT EQU 1\r
-SCSI_Out__BSY__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Out__CD_raw__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__CD_raw__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__CD_raw__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__CD_raw__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__CD_raw__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__CD_raw__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__CD_raw__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__CD_raw__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__CD_raw__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__CD_raw__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__CD_raw__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__CD_raw__INTTYPE EQU CYREG_PICU0_INTTYPE6\r
-SCSI_Out__CD_raw__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__CD_raw__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__CD_raw__MASK EQU 0x40\r
-SCSI_Out__CD_raw__PC EQU CYREG_PRT0_PC6\r
-SCSI_Out__CD_raw__PORT EQU 0\r
-SCSI_Out__CD_raw__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__CD_raw__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__CD_raw__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__CD_raw__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__CD_raw__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__CD_raw__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__CD_raw__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__CD_raw__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__CD_raw__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__CD_raw__SHIFT EQU 6\r
-SCSI_Out__CD_raw__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__DBP_raw__AG EQU CYREG_PRT15_AG\r
-SCSI_Out__DBP_raw__AMUX EQU CYREG_PRT15_AMUX\r
-SCSI_Out__DBP_raw__BIE EQU CYREG_PRT15_BIE\r
-SCSI_Out__DBP_raw__BIT_MASK EQU CYREG_PRT15_BIT_MASK\r
-SCSI_Out__DBP_raw__BYP EQU CYREG_PRT15_BYP\r
-SCSI_Out__DBP_raw__CTL EQU CYREG_PRT15_CTL\r
-SCSI_Out__DBP_raw__DM0 EQU CYREG_PRT15_DM0\r
-SCSI_Out__DBP_raw__DM1 EQU CYREG_PRT15_DM1\r
-SCSI_Out__DBP_raw__DM2 EQU CYREG_PRT15_DM2\r
-SCSI_Out__DBP_raw__DR EQU CYREG_PRT15_DR\r
-SCSI_Out__DBP_raw__INP_DIS EQU CYREG_PRT15_INP_DIS\r
-SCSI_Out__DBP_raw__INTTYPE EQU CYREG_PICU15_INTTYPE5\r
-SCSI_Out__DBP_raw__LCD_COM_SEG EQU CYREG_PRT15_LCD_COM_SEG\r
-SCSI_Out__DBP_raw__LCD_EN EQU CYREG_PRT15_LCD_EN\r
-SCSI_Out__DBP_raw__MASK EQU 0x20\r
-SCSI_Out__DBP_raw__PC EQU CYREG_IO_PC_PRT15_PC5\r
-SCSI_Out__DBP_raw__PORT EQU 15\r
-SCSI_Out__DBP_raw__PRT EQU CYREG_PRT15_PRT\r
-SCSI_Out__DBP_raw__PRTDSI__CAPS_SEL EQU CYREG_PRT15_CAPS_SEL\r
-SCSI_Out__DBP_raw__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT15_DBL_SYNC_IN\r
-SCSI_Out__DBP_raw__PRTDSI__OE_SEL0 EQU CYREG_PRT15_OE_SEL0\r
-SCSI_Out__DBP_raw__PRTDSI__OE_SEL1 EQU CYREG_PRT15_OE_SEL1\r
-SCSI_Out__DBP_raw__PRTDSI__OUT_SEL0 EQU CYREG_PRT15_OUT_SEL0\r
-SCSI_Out__DBP_raw__PRTDSI__OUT_SEL1 EQU CYREG_PRT15_OUT_SEL1\r
-SCSI_Out__DBP_raw__PRTDSI__SYNC_OUT EQU CYREG_PRT15_SYNC_OUT\r
-SCSI_Out__DBP_raw__PS EQU CYREG_PRT15_PS\r
-SCSI_Out__DBP_raw__SHIFT EQU 5\r
-SCSI_Out__DBP_raw__SLW EQU CYREG_PRT15_SLW\r
-SCSI_Out__IO_raw__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__IO_raw__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__IO_raw__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__IO_raw__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__IO_raw__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__IO_raw__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__IO_raw__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__IO_raw__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__IO_raw__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__IO_raw__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__IO_raw__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__IO_raw__INTTYPE EQU CYREG_PICU0_INTTYPE2\r
-SCSI_Out__IO_raw__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__IO_raw__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__IO_raw__MASK EQU 0x04\r
-SCSI_Out__IO_raw__PC EQU CYREG_PRT0_PC2\r
-SCSI_Out__IO_raw__PORT EQU 0\r
-SCSI_Out__IO_raw__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__IO_raw__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__IO_raw__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__IO_raw__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__IO_raw__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__IO_raw__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__IO_raw__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__IO_raw__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__IO_raw__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__IO_raw__SHIFT EQU 2\r
-SCSI_Out__IO_raw__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__MSG_raw__AG EQU CYREG_PRT4_AG\r
-SCSI_Out__MSG_raw__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Out__MSG_raw__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Out__MSG_raw__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Out__MSG_raw__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Out__MSG_raw__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Out__MSG_raw__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Out__MSG_raw__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Out__MSG_raw__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Out__MSG_raw__DR EQU CYREG_PRT4_DR\r
-SCSI_Out__MSG_raw__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Out__MSG_raw__INTTYPE EQU CYREG_PICU4_INTTYPE4\r
-SCSI_Out__MSG_raw__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Out__MSG_raw__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Out__MSG_raw__MASK EQU 0x10\r
-SCSI_Out__MSG_raw__PC EQU CYREG_PRT4_PC4\r
-SCSI_Out__MSG_raw__PORT EQU 4\r
-SCSI_Out__MSG_raw__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Out__MSG_raw__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Out__MSG_raw__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Out__MSG_raw__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Out__MSG_raw__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Out__MSG_raw__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Out__MSG_raw__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Out__MSG_raw__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Out__MSG_raw__PS EQU CYREG_PRT4_PS\r
-SCSI_Out__MSG_raw__SHIFT EQU 4\r
-SCSI_Out__MSG_raw__SLW EQU CYREG_PRT4_SLW\r
-SCSI_Out__REQ__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__REQ__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__REQ__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__REQ__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__REQ__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__REQ__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__REQ__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__REQ__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__REQ__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__REQ__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__REQ__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__REQ__INTTYPE EQU CYREG_PICU0_INTTYPE3\r
-SCSI_Out__REQ__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__REQ__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__REQ__MASK EQU 0x08\r
-SCSI_Out__REQ__PC EQU CYREG_PRT0_PC3\r
-SCSI_Out__REQ__PORT EQU 0\r
-SCSI_Out__REQ__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__REQ__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__REQ__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__REQ__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__REQ__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__REQ__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__REQ__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__REQ__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__REQ__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__REQ__SHIFT EQU 3\r
-SCSI_Out__REQ__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__RST__AG EQU CYREG_PRT4_AG\r
-SCSI_Out__RST__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Out__RST__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Out__RST__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Out__RST__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Out__RST__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Out__RST__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Out__RST__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Out__RST__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Out__RST__DR EQU CYREG_PRT4_DR\r
-SCSI_Out__RST__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Out__RST__INTTYPE EQU CYREG_PICU4_INTTYPE5\r
-SCSI_Out__RST__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Out__RST__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Out__RST__MASK EQU 0x20\r
-SCSI_Out__RST__PC EQU CYREG_PRT4_PC5\r
-SCSI_Out__RST__PORT EQU 4\r
-SCSI_Out__RST__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Out__RST__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Out__RST__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Out__RST__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Out__RST__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Out__RST__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Out__RST__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Out__RST__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Out__RST__PS EQU CYREG_PRT4_PS\r
-SCSI_Out__RST__SHIFT EQU 5\r
-SCSI_Out__RST__SLW EQU CYREG_PRT4_SLW\r
-SCSI_Out__SEL__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__SEL__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__SEL__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__SEL__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__SEL__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__SEL__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__SEL__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__SEL__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__SEL__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__SEL__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__SEL__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__SEL__INTTYPE EQU CYREG_PICU0_INTTYPE7\r
-SCSI_Out__SEL__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__SEL__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__SEL__MASK EQU 0x80\r
-SCSI_Out__SEL__PC EQU CYREG_PRT0_PC7\r
-SCSI_Out__SEL__PORT EQU 0\r
-SCSI_Out__SEL__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__SEL__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__SEL__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__SEL__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__SEL__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__SEL__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__SEL__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__SEL__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__SEL__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__SEL__SHIFT EQU 7\r
-SCSI_Out__SEL__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out_Bits_Sync_ctrl_reg__0__MASK EQU 0x01\r
-SCSI_Out_Bits_Sync_ctrl_reg__0__POS EQU 0\r
-SCSI_Out_Bits_Sync_ctrl_reg__1__MASK EQU 0x02\r
-SCSI_Out_Bits_Sync_ctrl_reg__1__POS EQU 1\r
-SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB14_15_ACTL\r
-SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB14_15_CTL\r
-SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB14_15_CTL\r
-SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB14_15_CTL\r
-SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB14_15_CTL\r
-SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB14_15_MSK\r
-SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB14_15_MSK\r
-SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB14_15_MSK\r
-SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB14_15_MSK\r
-SCSI_Out_Bits_Sync_ctrl_reg__2__MASK EQU 0x04\r
-SCSI_Out_Bits_Sync_ctrl_reg__2__POS EQU 2\r
-SCSI_Out_Bits_Sync_ctrl_reg__3__MASK EQU 0x08\r
-SCSI_Out_Bits_Sync_ctrl_reg__3__POS EQU 3\r
-SCSI_Out_Bits_Sync_ctrl_reg__4__MASK EQU 0x10\r
-SCSI_Out_Bits_Sync_ctrl_reg__4__POS EQU 4\r
-SCSI_Out_Bits_Sync_ctrl_reg__5__MASK EQU 0x20\r
-SCSI_Out_Bits_Sync_ctrl_reg__5__POS EQU 5\r
-SCSI_Out_Bits_Sync_ctrl_reg__6__MASK EQU 0x40\r
-SCSI_Out_Bits_Sync_ctrl_reg__6__POS EQU 6\r
-SCSI_Out_Bits_Sync_ctrl_reg__7__MASK EQU 0x80\r
-SCSI_Out_Bits_Sync_ctrl_reg__7__POS EQU 7\r
-SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB14_ACTL\r
-SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB14_CTL\r
-SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB14_ST_CTL\r
-SCSI_Out_Bits_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB14_CTL\r
-SCSI_Out_Bits_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB14_ST_CTL\r
-SCSI_Out_Bits_Sync_ctrl_reg__MASK EQU 0xFF\r
-SCSI_Out_Bits_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB14_MSK_ACTL\r
-SCSI_Out_Bits_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB14_MSK_ACTL\r
-SCSI_Out_Bits_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB14_MSK\r
-SCSI_Out_Ctl_Sync_ctrl_reg__0__MASK EQU 0x01\r
-SCSI_Out_Ctl_Sync_ctrl_reg__0__POS EQU 0\r
-SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB12_13_ACTL\r
-SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB12_13_CTL\r
-SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB12_13_CTL\r
-SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB12_13_CTL\r
-SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB12_13_CTL\r
-SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB12_13_MSK\r
-SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB12_13_MSK\r
-SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB12_13_MSK\r
-SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB12_13_MSK\r
-SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB12_ACTL\r
-SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB12_CTL\r
-SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB12_ST_CTL\r
-SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB12_CTL\r
-SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB12_ST_CTL\r
-SCSI_Out_Ctl_Sync_ctrl_reg__MASK EQU 0x01\r
-SCSI_Out_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB12_MSK_ACTL\r
-SCSI_Out_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB12_MSK_ACTL\r
-SCSI_Out_Ctl_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB12_MSK\r
-SCSI_Out_DBx__0__AG EQU CYREG_PRT5_AG\r
-SCSI_Out_DBx__0__AMUX EQU CYREG_PRT5_AMUX\r
-SCSI_Out_DBx__0__BIE EQU CYREG_PRT5_BIE\r
-SCSI_Out_DBx__0__BIT_MASK EQU CYREG_PRT5_BIT_MASK\r
-SCSI_Out_DBx__0__BYP EQU CYREG_PRT5_BYP\r
-SCSI_Out_DBx__0__CTL EQU CYREG_PRT5_CTL\r
-SCSI_Out_DBx__0__DM0 EQU CYREG_PRT5_DM0\r
-SCSI_Out_DBx__0__DM1 EQU CYREG_PRT5_DM1\r
-SCSI_Out_DBx__0__DM2 EQU CYREG_PRT5_DM2\r
-SCSI_Out_DBx__0__DR EQU CYREG_PRT5_DR\r
-SCSI_Out_DBx__0__INP_DIS EQU CYREG_PRT5_INP_DIS\r
-SCSI_Out_DBx__0__INTTYPE EQU CYREG_PICU5_INTTYPE1\r
-SCSI_Out_DBx__0__LCD_COM_SEG EQU CYREG_PRT5_LCD_COM_SEG\r
-SCSI_Out_DBx__0__LCD_EN EQU CYREG_PRT5_LCD_EN\r
-SCSI_Out_DBx__0__MASK EQU 0x02\r
-SCSI_Out_DBx__0__PC EQU CYREG_PRT5_PC1\r
-SCSI_Out_DBx__0__PORT EQU 5\r
-SCSI_Out_DBx__0__PRT EQU CYREG_PRT5_PRT\r
-SCSI_Out_DBx__0__PRTDSI__CAPS_SEL EQU CYREG_PRT5_CAPS_SEL\r
-SCSI_Out_DBx__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT5_DBL_SYNC_IN\r
-SCSI_Out_DBx__0__PRTDSI__OE_SEL0 EQU CYREG_PRT5_OE_SEL0\r
-SCSI_Out_DBx__0__PRTDSI__OE_SEL1 EQU CYREG_PRT5_OE_SEL1\r
-SCSI_Out_DBx__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT5_OUT_SEL0\r
-SCSI_Out_DBx__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT5_OUT_SEL1\r
-SCSI_Out_DBx__0__PRTDSI__SYNC_OUT EQU CYREG_PRT5_SYNC_OUT\r
-SCSI_Out_DBx__0__PS EQU CYREG_PRT5_PS\r
-SCSI_Out_DBx__0__SHIFT EQU 1\r
-SCSI_Out_DBx__0__SLW EQU CYREG_PRT5_SLW\r
-SCSI_Out_DBx__1__AG EQU CYREG_PRT5_AG\r
-SCSI_Out_DBx__1__AMUX EQU CYREG_PRT5_AMUX\r
-SCSI_Out_DBx__1__BIE EQU CYREG_PRT5_BIE\r
-SCSI_Out_DBx__1__BIT_MASK EQU CYREG_PRT5_BIT_MASK\r
-SCSI_Out_DBx__1__BYP EQU CYREG_PRT5_BYP\r
-SCSI_Out_DBx__1__CTL EQU CYREG_PRT5_CTL\r
-SCSI_Out_DBx__1__DM0 EQU CYREG_PRT5_DM0\r
-SCSI_Out_DBx__1__DM1 EQU CYREG_PRT5_DM1\r
-SCSI_Out_DBx__1__DM2 EQU CYREG_PRT5_DM2\r
-SCSI_Out_DBx__1__DR EQU CYREG_PRT5_DR\r
-SCSI_Out_DBx__1__INP_DIS EQU CYREG_PRT5_INP_DIS\r
-SCSI_Out_DBx__1__INTTYPE EQU CYREG_PICU5_INTTYPE0\r
-SCSI_Out_DBx__1__LCD_COM_SEG EQU CYREG_PRT5_LCD_COM_SEG\r
-SCSI_Out_DBx__1__LCD_EN EQU CYREG_PRT5_LCD_EN\r
-SCSI_Out_DBx__1__MASK EQU 0x01\r
-SCSI_Out_DBx__1__PC EQU CYREG_PRT5_PC0\r
-SCSI_Out_DBx__1__PORT EQU 5\r
-SCSI_Out_DBx__1__PRT EQU CYREG_PRT5_PRT\r
-SCSI_Out_DBx__1__PRTDSI__CAPS_SEL EQU CYREG_PRT5_CAPS_SEL\r
-SCSI_Out_DBx__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT5_DBL_SYNC_IN\r
-SCSI_Out_DBx__1__PRTDSI__OE_SEL0 EQU CYREG_PRT5_OE_SEL0\r
-SCSI_Out_DBx__1__PRTDSI__OE_SEL1 EQU CYREG_PRT5_OE_SEL1\r
-SCSI_Out_DBx__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT5_OUT_SEL0\r
-SCSI_Out_DBx__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT5_OUT_SEL1\r
-SCSI_Out_DBx__1__PRTDSI__SYNC_OUT EQU CYREG_PRT5_SYNC_OUT\r
-SCSI_Out_DBx__1__PS EQU CYREG_PRT5_PS\r
-SCSI_Out_DBx__1__SHIFT EQU 0\r
-SCSI_Out_DBx__1__SLW EQU CYREG_PRT5_SLW\r
-SCSI_Out_DBx__2__AG EQU CYREG_PRT6_AG\r
-SCSI_Out_DBx__2__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Out_DBx__2__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Out_DBx__2__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Out_DBx__2__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Out_DBx__2__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Out_DBx__2__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Out_DBx__2__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Out_DBx__2__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Out_DBx__2__DR EQU CYREG_PRT6_DR\r
-SCSI_Out_DBx__2__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Out_DBx__2__INTTYPE EQU CYREG_PICU6_INTTYPE5\r
-SCSI_Out_DBx__2__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Out_DBx__2__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Out_DBx__2__MASK EQU 0x20\r
-SCSI_Out_DBx__2__PC EQU CYREG_PRT6_PC5\r
-SCSI_Out_DBx__2__PORT EQU 6\r
-SCSI_Out_DBx__2__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Out_DBx__2__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Out_DBx__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Out_DBx__2__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Out_DBx__2__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Out_DBx__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Out_DBx__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Out_DBx__2__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Out_DBx__2__PS EQU CYREG_PRT6_PS\r
-SCSI_Out_DBx__2__SHIFT EQU 5\r
-SCSI_Out_DBx__2__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Out_DBx__3__AG EQU CYREG_PRT6_AG\r
-SCSI_Out_DBx__3__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Out_DBx__3__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Out_DBx__3__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Out_DBx__3__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Out_DBx__3__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Out_DBx__3__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Out_DBx__3__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Out_DBx__3__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Out_DBx__3__DR EQU CYREG_PRT6_DR\r
-SCSI_Out_DBx__3__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Out_DBx__3__INTTYPE EQU CYREG_PICU6_INTTYPE4\r
-SCSI_Out_DBx__3__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Out_DBx__3__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Out_DBx__3__MASK EQU 0x10\r
-SCSI_Out_DBx__3__PC EQU CYREG_PRT6_PC4\r
-SCSI_Out_DBx__3__PORT EQU 6\r
-SCSI_Out_DBx__3__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Out_DBx__3__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Out_DBx__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Out_DBx__3__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Out_DBx__3__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Out_DBx__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Out_DBx__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Out_DBx__3__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Out_DBx__3__PS EQU CYREG_PRT6_PS\r
-SCSI_Out_DBx__3__SHIFT EQU 4\r
-SCSI_Out_DBx__3__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Out_DBx__4__AG EQU CYREG_PRT2_AG\r
-SCSI_Out_DBx__4__AMUX EQU CYREG_PRT2_AMUX\r
-SCSI_Out_DBx__4__BIE EQU CYREG_PRT2_BIE\r
-SCSI_Out_DBx__4__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
-SCSI_Out_DBx__4__BYP EQU CYREG_PRT2_BYP\r
-SCSI_Out_DBx__4__CTL EQU CYREG_PRT2_CTL\r
-SCSI_Out_DBx__4__DM0 EQU CYREG_PRT2_DM0\r
-SCSI_Out_DBx__4__DM1 EQU CYREG_PRT2_DM1\r
-SCSI_Out_DBx__4__DM2 EQU CYREG_PRT2_DM2\r
-SCSI_Out_DBx__4__DR EQU CYREG_PRT2_DR\r
-SCSI_Out_DBx__4__INP_DIS EQU CYREG_PRT2_INP_DIS\r
-SCSI_Out_DBx__4__INTTYPE EQU CYREG_PICU2_INTTYPE7\r
-SCSI_Out_DBx__4__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
-SCSI_Out_DBx__4__LCD_EN EQU CYREG_PRT2_LCD_EN\r
-SCSI_Out_DBx__4__MASK EQU 0x80\r
-SCSI_Out_DBx__4__PC EQU CYREG_PRT2_PC7\r
-SCSI_Out_DBx__4__PORT EQU 2\r
-SCSI_Out_DBx__4__PRT EQU CYREG_PRT2_PRT\r
-SCSI_Out_DBx__4__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
-SCSI_Out_DBx__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
-SCSI_Out_DBx__4__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
-SCSI_Out_DBx__4__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
-SCSI_Out_DBx__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
-SCSI_Out_DBx__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
-SCSI_Out_DBx__4__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
-SCSI_Out_DBx__4__PS EQU CYREG_PRT2_PS\r
-SCSI_Out_DBx__4__SHIFT EQU 7\r
-SCSI_Out_DBx__4__SLW EQU CYREG_PRT2_SLW\r
-SCSI_Out_DBx__5__AG EQU CYREG_PRT2_AG\r
-SCSI_Out_DBx__5__AMUX EQU CYREG_PRT2_AMUX\r
-SCSI_Out_DBx__5__BIE EQU CYREG_PRT2_BIE\r
-SCSI_Out_DBx__5__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
-SCSI_Out_DBx__5__BYP EQU CYREG_PRT2_BYP\r
-SCSI_Out_DBx__5__CTL EQU CYREG_PRT2_CTL\r
-SCSI_Out_DBx__5__DM0 EQU CYREG_PRT2_DM0\r
-SCSI_Out_DBx__5__DM1 EQU CYREG_PRT2_DM1\r
-SCSI_Out_DBx__5__DM2 EQU CYREG_PRT2_DM2\r
-SCSI_Out_DBx__5__DR EQU CYREG_PRT2_DR\r
-SCSI_Out_DBx__5__INP_DIS EQU CYREG_PRT2_INP_DIS\r
-SCSI_Out_DBx__5__INTTYPE EQU CYREG_PICU2_INTTYPE6\r
-SCSI_Out_DBx__5__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
-SCSI_Out_DBx__5__LCD_EN EQU CYREG_PRT2_LCD_EN\r
-SCSI_Out_DBx__5__MASK EQU 0x40\r
-SCSI_Out_DBx__5__PC EQU CYREG_PRT2_PC6\r
-SCSI_Out_DBx__5__PORT EQU 2\r
-SCSI_Out_DBx__5__PRT EQU CYREG_PRT2_PRT\r
-SCSI_Out_DBx__5__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
-SCSI_Out_DBx__5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
-SCSI_Out_DBx__5__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
-SCSI_Out_DBx__5__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
-SCSI_Out_DBx__5__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
-SCSI_Out_DBx__5__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
-SCSI_Out_DBx__5__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
-SCSI_Out_DBx__5__PS EQU CYREG_PRT2_PS\r
-SCSI_Out_DBx__5__SHIFT EQU 6\r
-SCSI_Out_DBx__5__SLW EQU CYREG_PRT2_SLW\r
-SCSI_Out_DBx__6__AG EQU CYREG_PRT2_AG\r
-SCSI_Out_DBx__6__AMUX EQU CYREG_PRT2_AMUX\r
-SCSI_Out_DBx__6__BIE EQU CYREG_PRT2_BIE\r
-SCSI_Out_DBx__6__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
-SCSI_Out_DBx__6__BYP EQU CYREG_PRT2_BYP\r
-SCSI_Out_DBx__6__CTL EQU CYREG_PRT2_CTL\r
-SCSI_Out_DBx__6__DM0 EQU CYREG_PRT2_DM0\r
-SCSI_Out_DBx__6__DM1 EQU CYREG_PRT2_DM1\r
-SCSI_Out_DBx__6__DM2 EQU CYREG_PRT2_DM2\r
-SCSI_Out_DBx__6__DR EQU CYREG_PRT2_DR\r
-SCSI_Out_DBx__6__INP_DIS EQU CYREG_PRT2_INP_DIS\r
-SCSI_Out_DBx__6__INTTYPE EQU CYREG_PICU2_INTTYPE3\r
-SCSI_Out_DBx__6__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
-SCSI_Out_DBx__6__LCD_EN EQU CYREG_PRT2_LCD_EN\r
-SCSI_Out_DBx__6__MASK EQU 0x08\r
-SCSI_Out_DBx__6__PC EQU CYREG_PRT2_PC3\r
-SCSI_Out_DBx__6__PORT EQU 2\r
-SCSI_Out_DBx__6__PRT EQU CYREG_PRT2_PRT\r
-SCSI_Out_DBx__6__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
-SCSI_Out_DBx__6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
-SCSI_Out_DBx__6__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
-SCSI_Out_DBx__6__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
-SCSI_Out_DBx__6__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
-SCSI_Out_DBx__6__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
-SCSI_Out_DBx__6__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
-SCSI_Out_DBx__6__PS EQU CYREG_PRT2_PS\r
-SCSI_Out_DBx__6__SHIFT EQU 3\r
-SCSI_Out_DBx__6__SLW EQU CYREG_PRT2_SLW\r
-SCSI_Out_DBx__7__AG EQU CYREG_PRT2_AG\r
-SCSI_Out_DBx__7__AMUX EQU CYREG_PRT2_AMUX\r
-SCSI_Out_DBx__7__BIE EQU CYREG_PRT2_BIE\r
-SCSI_Out_DBx__7__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
-SCSI_Out_DBx__7__BYP EQU CYREG_PRT2_BYP\r
-SCSI_Out_DBx__7__CTL EQU CYREG_PRT2_CTL\r
-SCSI_Out_DBx__7__DM0 EQU CYREG_PRT2_DM0\r
-SCSI_Out_DBx__7__DM1 EQU CYREG_PRT2_DM1\r
-SCSI_Out_DBx__7__DM2 EQU CYREG_PRT2_DM2\r
-SCSI_Out_DBx__7__DR EQU CYREG_PRT2_DR\r
-SCSI_Out_DBx__7__INP_DIS EQU CYREG_PRT2_INP_DIS\r
-SCSI_Out_DBx__7__INTTYPE EQU CYREG_PICU2_INTTYPE2\r
-SCSI_Out_DBx__7__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
-SCSI_Out_DBx__7__LCD_EN EQU CYREG_PRT2_LCD_EN\r
-SCSI_Out_DBx__7__MASK EQU 0x04\r
-SCSI_Out_DBx__7__PC EQU CYREG_PRT2_PC2\r
-SCSI_Out_DBx__7__PORT EQU 2\r
-SCSI_Out_DBx__7__PRT EQU CYREG_PRT2_PRT\r
-SCSI_Out_DBx__7__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
-SCSI_Out_DBx__7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
-SCSI_Out_DBx__7__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
-SCSI_Out_DBx__7__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
-SCSI_Out_DBx__7__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
-SCSI_Out_DBx__7__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
-SCSI_Out_DBx__7__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
-SCSI_Out_DBx__7__PS EQU CYREG_PRT2_PS\r
-SCSI_Out_DBx__7__SHIFT EQU 2\r
-SCSI_Out_DBx__7__SLW EQU CYREG_PRT2_SLW\r
-SCSI_Out_DBx__DB0__AG EQU CYREG_PRT5_AG\r
-SCSI_Out_DBx__DB0__AMUX EQU CYREG_PRT5_AMUX\r
-SCSI_Out_DBx__DB0__BIE EQU CYREG_PRT5_BIE\r
-SCSI_Out_DBx__DB0__BIT_MASK EQU CYREG_PRT5_BIT_MASK\r
-SCSI_Out_DBx__DB0__BYP EQU CYREG_PRT5_BYP\r
-SCSI_Out_DBx__DB0__CTL EQU CYREG_PRT5_CTL\r
-SCSI_Out_DBx__DB0__DM0 EQU CYREG_PRT5_DM0\r
-SCSI_Out_DBx__DB0__DM1 EQU CYREG_PRT5_DM1\r
-SCSI_Out_DBx__DB0__DM2 EQU CYREG_PRT5_DM2\r
-SCSI_Out_DBx__DB0__DR EQU CYREG_PRT5_DR\r
-SCSI_Out_DBx__DB0__INP_DIS EQU CYREG_PRT5_INP_DIS\r
-SCSI_Out_DBx__DB0__INTTYPE EQU CYREG_PICU5_INTTYPE1\r
-SCSI_Out_DBx__DB0__LCD_COM_SEG EQU CYREG_PRT5_LCD_COM_SEG\r
-SCSI_Out_DBx__DB0__LCD_EN EQU CYREG_PRT5_LCD_EN\r
-SCSI_Out_DBx__DB0__MASK EQU 0x02\r
-SCSI_Out_DBx__DB0__PC EQU CYREG_PRT5_PC1\r
-SCSI_Out_DBx__DB0__PORT EQU 5\r
-SCSI_Out_DBx__DB0__PRT EQU CYREG_PRT5_PRT\r
-SCSI_Out_DBx__DB0__PRTDSI__CAPS_SEL EQU CYREG_PRT5_CAPS_SEL\r
-SCSI_Out_DBx__DB0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT5_DBL_SYNC_IN\r
-SCSI_Out_DBx__DB0__PRTDSI__OE_SEL0 EQU CYREG_PRT5_OE_SEL0\r
-SCSI_Out_DBx__DB0__PRTDSI__OE_SEL1 EQU CYREG_PRT5_OE_SEL1\r
-SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL0 EQU CYREG_PRT5_OUT_SEL0\r
-SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL1 EQU CYREG_PRT5_OUT_SEL1\r
-SCSI_Out_DBx__DB0__PRTDSI__SYNC_OUT EQU CYREG_PRT5_SYNC_OUT\r
-SCSI_Out_DBx__DB0__PS EQU CYREG_PRT5_PS\r
-SCSI_Out_DBx__DB0__SHIFT EQU 1\r
-SCSI_Out_DBx__DB0__SLW EQU CYREG_PRT5_SLW\r
-SCSI_Out_DBx__DB1__AG EQU CYREG_PRT5_AG\r
-SCSI_Out_DBx__DB1__AMUX EQU CYREG_PRT5_AMUX\r
-SCSI_Out_DBx__DB1__BIE EQU CYREG_PRT5_BIE\r
-SCSI_Out_DBx__DB1__BIT_MASK EQU CYREG_PRT5_BIT_MASK\r
-SCSI_Out_DBx__DB1__BYP EQU CYREG_PRT5_BYP\r
-SCSI_Out_DBx__DB1__CTL EQU CYREG_PRT5_CTL\r
-SCSI_Out_DBx__DB1__DM0 EQU CYREG_PRT5_DM0\r
-SCSI_Out_DBx__DB1__DM1 EQU CYREG_PRT5_DM1\r
-SCSI_Out_DBx__DB1__DM2 EQU CYREG_PRT5_DM2\r
-SCSI_Out_DBx__DB1__DR EQU CYREG_PRT5_DR\r
-SCSI_Out_DBx__DB1__INP_DIS EQU CYREG_PRT5_INP_DIS\r
-SCSI_Out_DBx__DB1__INTTYPE EQU CYREG_PICU5_INTTYPE0\r
-SCSI_Out_DBx__DB1__LCD_COM_SEG EQU CYREG_PRT5_LCD_COM_SEG\r
-SCSI_Out_DBx__DB1__LCD_EN EQU CYREG_PRT5_LCD_EN\r
-SCSI_Out_DBx__DB1__MASK EQU 0x01\r
-SCSI_Out_DBx__DB1__PC EQU CYREG_PRT5_PC0\r
-SCSI_Out_DBx__DB1__PORT EQU 5\r
-SCSI_Out_DBx__DB1__PRT EQU CYREG_PRT5_PRT\r
-SCSI_Out_DBx__DB1__PRTDSI__CAPS_SEL EQU CYREG_PRT5_CAPS_SEL\r
-SCSI_Out_DBx__DB1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT5_DBL_SYNC_IN\r
-SCSI_Out_DBx__DB1__PRTDSI__OE_SEL0 EQU CYREG_PRT5_OE_SEL0\r
-SCSI_Out_DBx__DB1__PRTDSI__OE_SEL1 EQU CYREG_PRT5_OE_SEL1\r
-SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL0 EQU CYREG_PRT5_OUT_SEL0\r
-SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL1 EQU CYREG_PRT5_OUT_SEL1\r
-SCSI_Out_DBx__DB1__PRTDSI__SYNC_OUT EQU CYREG_PRT5_SYNC_OUT\r
-SCSI_Out_DBx__DB1__PS EQU CYREG_PRT5_PS\r
-SCSI_Out_DBx__DB1__SHIFT EQU 0\r
-SCSI_Out_DBx__DB1__SLW EQU CYREG_PRT5_SLW\r
-SCSI_Out_DBx__DB2__AG EQU CYREG_PRT6_AG\r
-SCSI_Out_DBx__DB2__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Out_DBx__DB2__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Out_DBx__DB2__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Out_DBx__DB2__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Out_DBx__DB2__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Out_DBx__DB2__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Out_DBx__DB2__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Out_DBx__DB2__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Out_DBx__DB2__DR EQU CYREG_PRT6_DR\r
-SCSI_Out_DBx__DB2__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Out_DBx__DB2__INTTYPE EQU CYREG_PICU6_INTTYPE5\r
-SCSI_Out_DBx__DB2__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Out_DBx__DB2__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Out_DBx__DB2__MASK EQU 0x20\r
-SCSI_Out_DBx__DB2__PC EQU CYREG_PRT6_PC5\r
-SCSI_Out_DBx__DB2__PORT EQU 6\r
-SCSI_Out_DBx__DB2__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Out_DBx__DB2__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Out_DBx__DB2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Out_DBx__DB2__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Out_DBx__DB2__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Out_DBx__DB2__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Out_DBx__DB2__PS EQU CYREG_PRT6_PS\r
-SCSI_Out_DBx__DB2__SHIFT EQU 5\r
-SCSI_Out_DBx__DB2__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Out_DBx__DB3__AG EQU CYREG_PRT6_AG\r
-SCSI_Out_DBx__DB3__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Out_DBx__DB3__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Out_DBx__DB3__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Out_DBx__DB3__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Out_DBx__DB3__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Out_DBx__DB3__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Out_DBx__DB3__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Out_DBx__DB3__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Out_DBx__DB3__DR EQU CYREG_PRT6_DR\r
-SCSI_Out_DBx__DB3__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Out_DBx__DB3__INTTYPE EQU CYREG_PICU6_INTTYPE4\r
-SCSI_Out_DBx__DB3__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Out_DBx__DB3__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Out_DBx__DB3__MASK EQU 0x10\r
-SCSI_Out_DBx__DB3__PC EQU CYREG_PRT6_PC4\r
-SCSI_Out_DBx__DB3__PORT EQU 6\r
-SCSI_Out_DBx__DB3__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Out_DBx__DB3__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Out_DBx__DB3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Out_DBx__DB3__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Out_DBx__DB3__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Out_DBx__DB3__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Out_DBx__DB3__PS EQU CYREG_PRT6_PS\r
-SCSI_Out_DBx__DB3__SHIFT EQU 4\r
-SCSI_Out_DBx__DB3__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Out_DBx__DB4__AG EQU CYREG_PRT2_AG\r
-SCSI_Out_DBx__DB4__AMUX EQU CYREG_PRT2_AMUX\r
-SCSI_Out_DBx__DB4__BIE EQU CYREG_PRT2_BIE\r
-SCSI_Out_DBx__DB4__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
-SCSI_Out_DBx__DB4__BYP EQU CYREG_PRT2_BYP\r
-SCSI_Out_DBx__DB4__CTL EQU CYREG_PRT2_CTL\r
-SCSI_Out_DBx__DB4__DM0 EQU CYREG_PRT2_DM0\r
-SCSI_Out_DBx__DB4__DM1 EQU CYREG_PRT2_DM1\r
-SCSI_Out_DBx__DB4__DM2 EQU CYREG_PRT2_DM2\r
-SCSI_Out_DBx__DB4__DR EQU CYREG_PRT2_DR\r
-SCSI_Out_DBx__DB4__INP_DIS EQU CYREG_PRT2_INP_DIS\r
-SCSI_Out_DBx__DB4__INTTYPE EQU CYREG_PICU2_INTTYPE7\r
-SCSI_Out_DBx__DB4__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
-SCSI_Out_DBx__DB4__LCD_EN EQU CYREG_PRT2_LCD_EN\r
-SCSI_Out_DBx__DB4__MASK EQU 0x80\r
-SCSI_Out_DBx__DB4__PC EQU CYREG_PRT2_PC7\r
-SCSI_Out_DBx__DB4__PORT EQU 2\r
-SCSI_Out_DBx__DB4__PRT EQU CYREG_PRT2_PRT\r
-SCSI_Out_DBx__DB4__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
-SCSI_Out_DBx__DB4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
-SCSI_Out_DBx__DB4__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
-SCSI_Out_DBx__DB4__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
-SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
-SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
-SCSI_Out_DBx__DB4__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
-SCSI_Out_DBx__DB4__PS EQU CYREG_PRT2_PS\r
-SCSI_Out_DBx__DB4__SHIFT EQU 7\r
-SCSI_Out_DBx__DB4__SLW EQU CYREG_PRT2_SLW\r
-SCSI_Out_DBx__DB5__AG EQU CYREG_PRT2_AG\r
-SCSI_Out_DBx__DB5__AMUX EQU CYREG_PRT2_AMUX\r
-SCSI_Out_DBx__DB5__BIE EQU CYREG_PRT2_BIE\r
-SCSI_Out_DBx__DB5__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
-SCSI_Out_DBx__DB5__BYP EQU CYREG_PRT2_BYP\r
-SCSI_Out_DBx__DB5__CTL EQU CYREG_PRT2_CTL\r
-SCSI_Out_DBx__DB5__DM0 EQU CYREG_PRT2_DM0\r
-SCSI_Out_DBx__DB5__DM1 EQU CYREG_PRT2_DM1\r
-SCSI_Out_DBx__DB5__DM2 EQU CYREG_PRT2_DM2\r
-SCSI_Out_DBx__DB5__DR EQU CYREG_PRT2_DR\r
-SCSI_Out_DBx__DB5__INP_DIS EQU CYREG_PRT2_INP_DIS\r
-SCSI_Out_DBx__DB5__INTTYPE EQU CYREG_PICU2_INTTYPE6\r
-SCSI_Out_DBx__DB5__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
-SCSI_Out_DBx__DB5__LCD_EN EQU CYREG_PRT2_LCD_EN\r
-SCSI_Out_DBx__DB5__MASK EQU 0x40\r
-SCSI_Out_DBx__DB5__PC EQU CYREG_PRT2_PC6\r
-SCSI_Out_DBx__DB5__PORT EQU 2\r
-SCSI_Out_DBx__DB5__PRT EQU CYREG_PRT2_PRT\r
-SCSI_Out_DBx__DB5__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
-SCSI_Out_DBx__DB5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
-SCSI_Out_DBx__DB5__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
-SCSI_Out_DBx__DB5__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
-SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
-SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
-SCSI_Out_DBx__DB5__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
-SCSI_Out_DBx__DB5__PS EQU CYREG_PRT2_PS\r
-SCSI_Out_DBx__DB5__SHIFT EQU 6\r
-SCSI_Out_DBx__DB5__SLW EQU CYREG_PRT2_SLW\r
-SCSI_Out_DBx__DB6__AG EQU CYREG_PRT2_AG\r
-SCSI_Out_DBx__DB6__AMUX EQU CYREG_PRT2_AMUX\r
-SCSI_Out_DBx__DB6__BIE EQU CYREG_PRT2_BIE\r
-SCSI_Out_DBx__DB6__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
-SCSI_Out_DBx__DB6__BYP EQU CYREG_PRT2_BYP\r
-SCSI_Out_DBx__DB6__CTL EQU CYREG_PRT2_CTL\r
-SCSI_Out_DBx__DB6__DM0 EQU CYREG_PRT2_DM0\r
-SCSI_Out_DBx__DB6__DM1 EQU CYREG_PRT2_DM1\r
-SCSI_Out_DBx__DB6__DM2 EQU CYREG_PRT2_DM2\r
-SCSI_Out_DBx__DB6__DR EQU CYREG_PRT2_DR\r
-SCSI_Out_DBx__DB6__INP_DIS EQU CYREG_PRT2_INP_DIS\r
-SCSI_Out_DBx__DB6__INTTYPE EQU CYREG_PICU2_INTTYPE3\r
-SCSI_Out_DBx__DB6__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
-SCSI_Out_DBx__DB6__LCD_EN EQU CYREG_PRT2_LCD_EN\r
-SCSI_Out_DBx__DB6__MASK EQU 0x08\r
-SCSI_Out_DBx__DB6__PC EQU CYREG_PRT2_PC3\r
-SCSI_Out_DBx__DB6__PORT EQU 2\r
-SCSI_Out_DBx__DB6__PRT EQU CYREG_PRT2_PRT\r
-SCSI_Out_DBx__DB6__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
-SCSI_Out_DBx__DB6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
-SCSI_Out_DBx__DB6__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
-SCSI_Out_DBx__DB6__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
-SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
-SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
-SCSI_Out_DBx__DB6__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
-SCSI_Out_DBx__DB6__PS EQU CYREG_PRT2_PS\r
-SCSI_Out_DBx__DB6__SHIFT EQU 3\r
-SCSI_Out_DBx__DB6__SLW EQU CYREG_PRT2_SLW\r
-SCSI_Out_DBx__DB7__AG EQU CYREG_PRT2_AG\r
-SCSI_Out_DBx__DB7__AMUX EQU CYREG_PRT2_AMUX\r
-SCSI_Out_DBx__DB7__BIE EQU CYREG_PRT2_BIE\r
-SCSI_Out_DBx__DB7__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
-SCSI_Out_DBx__DB7__BYP EQU CYREG_PRT2_BYP\r
-SCSI_Out_DBx__DB7__CTL EQU CYREG_PRT2_CTL\r
-SCSI_Out_DBx__DB7__DM0 EQU CYREG_PRT2_DM0\r
-SCSI_Out_DBx__DB7__DM1 EQU CYREG_PRT2_DM1\r
-SCSI_Out_DBx__DB7__DM2 EQU CYREG_PRT2_DM2\r
-SCSI_Out_DBx__DB7__DR EQU CYREG_PRT2_DR\r
-SCSI_Out_DBx__DB7__INP_DIS EQU CYREG_PRT2_INP_DIS\r
-SCSI_Out_DBx__DB7__INTTYPE EQU CYREG_PICU2_INTTYPE2\r
-SCSI_Out_DBx__DB7__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
-SCSI_Out_DBx__DB7__LCD_EN EQU CYREG_PRT2_LCD_EN\r
-SCSI_Out_DBx__DB7__MASK EQU 0x04\r
-SCSI_Out_DBx__DB7__PC EQU CYREG_PRT2_PC2\r
-SCSI_Out_DBx__DB7__PORT EQU 2\r
-SCSI_Out_DBx__DB7__PRT EQU CYREG_PRT2_PRT\r
-SCSI_Out_DBx__DB7__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
-SCSI_Out_DBx__DB7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
-SCSI_Out_DBx__DB7__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
-SCSI_Out_DBx__DB7__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
-SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
-SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
-SCSI_Out_DBx__DB7__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
-SCSI_Out_DBx__DB7__PS EQU CYREG_PRT2_PS\r
-SCSI_Out_DBx__DB7__SHIFT EQU 2\r
-SCSI_Out_DBx__DB7__SLW EQU CYREG_PRT2_SLW\r
-\r
-; SCSI_Parity_Error\r
-SCSI_Parity_Error_sts_sts_reg__0__MASK EQU 0x01\r
-SCSI_Parity_Error_sts_sts_reg__0__POS EQU 0\r
-SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB05_06_ACTL\r
-SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_REG EQU CYREG_B0_UDB05_06_ST\r
-SCSI_Parity_Error_sts_sts_reg__MASK EQU 0x01\r
-SCSI_Parity_Error_sts_sts_reg__MASK_REG EQU CYREG_B0_UDB05_MSK\r
-SCSI_Parity_Error_sts_sts_reg__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB05_ACTL\r
-SCSI_Parity_Error_sts_sts_reg__STATUS_REG EQU CYREG_B0_UDB05_ST\r
-\r
-; SCSI_RST_ISR\r
-SCSI_RST_ISR__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
-SCSI_RST_ISR__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
-SCSI_RST_ISR__INTC_MASK EQU 0x02\r
-SCSI_RST_ISR__INTC_NUMBER EQU 1\r
-SCSI_RST_ISR__INTC_PRIOR_NUM EQU 7\r
-SCSI_RST_ISR__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_1\r
-SCSI_RST_ISR__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
-SCSI_RST_ISR__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
-\r
-; SCSI_RX_DMA\r
-SCSI_RX_DMA__DRQ_CTL EQU CYREG_IDMUX_DRQ_CTL0\r
-SCSI_RX_DMA__DRQ_NUMBER EQU 0\r
-SCSI_RX_DMA__NUMBEROF_TDS EQU 0\r
-SCSI_RX_DMA__PRIORITY EQU 2\r
-SCSI_RX_DMA__TERMIN_EN EQU 0\r
-SCSI_RX_DMA__TERMIN_SEL EQU 0\r
-SCSI_RX_DMA__TERMOUT0_EN EQU 1\r
-SCSI_RX_DMA__TERMOUT0_SEL EQU 0\r
-SCSI_RX_DMA__TERMOUT1_EN EQU 0\r
-SCSI_RX_DMA__TERMOUT1_SEL EQU 0\r
-SCSI_RX_DMA_COMPLETE__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
-SCSI_RX_DMA_COMPLETE__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
-SCSI_RX_DMA_COMPLETE__INTC_MASK EQU 0x04\r
-SCSI_RX_DMA_COMPLETE__INTC_NUMBER EQU 2\r
-SCSI_RX_DMA_COMPLETE__INTC_PRIOR_NUM EQU 7\r
-SCSI_RX_DMA_COMPLETE__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_2\r
-SCSI_RX_DMA_COMPLETE__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
-SCSI_RX_DMA_COMPLETE__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
-\r
-; SCSI_SEL_ISR\r
-SCSI_SEL_ISR__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
-SCSI_SEL_ISR__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
-SCSI_SEL_ISR__INTC_MASK EQU 0x08\r
-SCSI_SEL_ISR__INTC_NUMBER EQU 3\r
-SCSI_SEL_ISR__INTC_PRIOR_NUM EQU 7\r
-SCSI_SEL_ISR__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_3\r
-SCSI_SEL_ISR__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
-SCSI_SEL_ISR__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
-\r
-; SCSI_TX_DMA\r
-SCSI_TX_DMA__DRQ_CTL EQU CYREG_IDMUX_DRQ_CTL0\r
-SCSI_TX_DMA__DRQ_NUMBER EQU 1\r
-SCSI_TX_DMA__NUMBEROF_TDS EQU 0\r
-SCSI_TX_DMA__PRIORITY EQU 2\r
-SCSI_TX_DMA__TERMIN_EN EQU 0\r
-SCSI_TX_DMA__TERMIN_SEL EQU 0\r
-SCSI_TX_DMA__TERMOUT0_EN EQU 1\r
-SCSI_TX_DMA__TERMOUT0_SEL EQU 1\r
-SCSI_TX_DMA__TERMOUT1_EN EQU 0\r
-SCSI_TX_DMA__TERMOUT1_SEL EQU 0\r
-SCSI_TX_DMA_COMPLETE__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
-SCSI_TX_DMA_COMPLETE__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
-SCSI_TX_DMA_COMPLETE__INTC_MASK EQU 0x10\r
-SCSI_TX_DMA_COMPLETE__INTC_NUMBER EQU 4\r
-SCSI_TX_DMA_COMPLETE__INTC_PRIOR_NUM EQU 7\r
-SCSI_TX_DMA_COMPLETE__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_4\r
-SCSI_TX_DMA_COMPLETE__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
-SCSI_TX_DMA_COMPLETE__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
-\r
-; SDCard_BSPIM\r
-SDCard_BSPIM_BitCounter__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B1_UDB05_06_ACTL\r
-SDCard_BSPIM_BitCounter__16BIT_CONTROL_CONTROL_REG EQU CYREG_B1_UDB05_06_CTL\r
-SDCard_BSPIM_BitCounter__16BIT_CONTROL_COUNT_REG EQU CYREG_B1_UDB05_06_CTL\r
-SDCard_BSPIM_BitCounter__16BIT_COUNT_CONTROL_REG EQU CYREG_B1_UDB05_06_CTL\r
-SDCard_BSPIM_BitCounter__16BIT_COUNT_COUNT_REG EQU CYREG_B1_UDB05_06_CTL\r
-SDCard_BSPIM_BitCounter__16BIT_MASK_MASK_REG EQU CYREG_B1_UDB05_06_MSK\r
-SDCard_BSPIM_BitCounter__16BIT_MASK_PERIOD_REG EQU CYREG_B1_UDB05_06_MSK\r
-SDCard_BSPIM_BitCounter__16BIT_PERIOD_MASK_REG EQU CYREG_B1_UDB05_06_MSK\r
-SDCard_BSPIM_BitCounter__16BIT_PERIOD_PERIOD_REG EQU CYREG_B1_UDB05_06_MSK\r
-SDCard_BSPIM_BitCounter__CONTROL_AUX_CTL_REG EQU CYREG_B1_UDB05_ACTL\r
-SDCard_BSPIM_BitCounter__CONTROL_REG EQU CYREG_B1_UDB05_CTL\r
-SDCard_BSPIM_BitCounter__CONTROL_ST_REG EQU CYREG_B1_UDB05_ST_CTL\r
-SDCard_BSPIM_BitCounter__COUNT_REG EQU CYREG_B1_UDB05_CTL\r
-SDCard_BSPIM_BitCounter__COUNT_ST_REG EQU CYREG_B1_UDB05_ST_CTL\r
-SDCard_BSPIM_BitCounter__MASK_CTL_AUX_CTL_REG EQU CYREG_B1_UDB05_MSK_ACTL\r
-SDCard_BSPIM_BitCounter__PER_CTL_AUX_CTL_REG EQU CYREG_B1_UDB05_MSK_ACTL\r
-SDCard_BSPIM_BitCounter__PERIOD_REG EQU CYREG_B1_UDB05_MSK\r
-SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B1_UDB05_06_ACTL\r
-SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_REG EQU CYREG_B1_UDB05_06_ST\r
-SDCard_BSPIM_BitCounter_ST__MASK_REG EQU CYREG_B1_UDB05_MSK\r
-SDCard_BSPIM_BitCounter_ST__MASK_ST_AUX_CTL_REG EQU CYREG_B1_UDB05_MSK_ACTL\r
-SDCard_BSPIM_BitCounter_ST__PER_ST_AUX_CTL_REG EQU CYREG_B1_UDB05_MSK_ACTL\r
-SDCard_BSPIM_BitCounter_ST__STATUS_AUX_CTL_REG EQU CYREG_B1_UDB05_ACTL\r
-SDCard_BSPIM_BitCounter_ST__STATUS_CNT_REG EQU CYREG_B1_UDB05_ST_CTL\r
-SDCard_BSPIM_BitCounter_ST__STATUS_CONTROL_REG EQU CYREG_B1_UDB05_ST_CTL\r
-SDCard_BSPIM_BitCounter_ST__STATUS_REG EQU CYREG_B1_UDB05_ST\r
-SDCard_BSPIM_RxStsReg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B1_UDB07_08_ACTL\r
-SDCard_BSPIM_RxStsReg__16BIT_STATUS_REG EQU CYREG_B1_UDB07_08_ST\r
-SDCard_BSPIM_RxStsReg__4__MASK EQU 0x10\r
-SDCard_BSPIM_RxStsReg__4__POS EQU 4\r
-SDCard_BSPIM_RxStsReg__5__MASK EQU 0x20\r
-SDCard_BSPIM_RxStsReg__5__POS EQU 5\r
-SDCard_BSPIM_RxStsReg__6__MASK EQU 0x40\r
-SDCard_BSPIM_RxStsReg__6__POS EQU 6\r
-SDCard_BSPIM_RxStsReg__MASK EQU 0x70\r
-SDCard_BSPIM_RxStsReg__MASK_REG EQU CYREG_B1_UDB07_MSK\r
-SDCard_BSPIM_RxStsReg__STATUS_AUX_CTL_REG EQU CYREG_B1_UDB07_ACTL\r
-SDCard_BSPIM_RxStsReg__STATUS_REG EQU CYREG_B1_UDB07_ST\r
-SDCard_BSPIM_sR8_Dp_u0__16BIT_A0_REG EQU CYREG_B1_UDB04_05_A0\r
-SDCard_BSPIM_sR8_Dp_u0__16BIT_A1_REG EQU CYREG_B1_UDB04_05_A1\r
-SDCard_BSPIM_sR8_Dp_u0__16BIT_D0_REG EQU CYREG_B1_UDB04_05_D0\r
-SDCard_BSPIM_sR8_Dp_u0__16BIT_D1_REG EQU CYREG_B1_UDB04_05_D1\r
-SDCard_BSPIM_sR8_Dp_u0__16BIT_DP_AUX_CTL_REG EQU CYREG_B1_UDB04_05_ACTL\r
-SDCard_BSPIM_sR8_Dp_u0__16BIT_F0_REG EQU CYREG_B1_UDB04_05_F0\r
-SDCard_BSPIM_sR8_Dp_u0__16BIT_F1_REG EQU CYREG_B1_UDB04_05_F1\r
-SDCard_BSPIM_sR8_Dp_u0__A0_A1_REG EQU CYREG_B1_UDB04_A0_A1\r
-SDCard_BSPIM_sR8_Dp_u0__A0_REG EQU CYREG_B1_UDB04_A0\r
-SDCard_BSPIM_sR8_Dp_u0__A1_REG EQU CYREG_B1_UDB04_A1\r
-SDCard_BSPIM_sR8_Dp_u0__D0_D1_REG EQU CYREG_B1_UDB04_D0_D1\r
-SDCard_BSPIM_sR8_Dp_u0__D0_REG EQU CYREG_B1_UDB04_D0\r
-SDCard_BSPIM_sR8_Dp_u0__D1_REG EQU CYREG_B1_UDB04_D1\r
-SDCard_BSPIM_sR8_Dp_u0__DP_AUX_CTL_REG EQU CYREG_B1_UDB04_ACTL\r
-SDCard_BSPIM_sR8_Dp_u0__F0_F1_REG EQU CYREG_B1_UDB04_F0_F1\r
-SDCard_BSPIM_sR8_Dp_u0__F0_REG EQU CYREG_B1_UDB04_F0\r
-SDCard_BSPIM_sR8_Dp_u0__F1_REG EQU CYREG_B1_UDB04_F1\r
-SDCard_BSPIM_TxStsReg__0__MASK EQU 0x01\r
-SDCard_BSPIM_TxStsReg__0__POS EQU 0\r
-SDCard_BSPIM_TxStsReg__1__MASK EQU 0x02\r
-SDCard_BSPIM_TxStsReg__1__POS EQU 1\r
-SDCard_BSPIM_TxStsReg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B1_UDB06_07_ACTL\r
-SDCard_BSPIM_TxStsReg__16BIT_STATUS_REG EQU CYREG_B1_UDB06_07_ST\r
-SDCard_BSPIM_TxStsReg__2__MASK EQU 0x04\r
-SDCard_BSPIM_TxStsReg__2__POS EQU 2\r
-SDCard_BSPIM_TxStsReg__3__MASK EQU 0x08\r
-SDCard_BSPIM_TxStsReg__3__POS EQU 3\r
-SDCard_BSPIM_TxStsReg__4__MASK EQU 0x10\r
-SDCard_BSPIM_TxStsReg__4__POS EQU 4\r
-SDCard_BSPIM_TxStsReg__MASK EQU 0x1F\r
-SDCard_BSPIM_TxStsReg__MASK_REG EQU CYREG_B1_UDB06_MSK\r
-SDCard_BSPIM_TxStsReg__STATUS_AUX_CTL_REG EQU CYREG_B1_UDB06_ACTL\r
-SDCard_BSPIM_TxStsReg__STATUS_REG EQU CYREG_B1_UDB06_ST\r
-\r
-; SD_CD\r
-SD_CD__0__INTTYPE EQU CYREG_PICU3_INTTYPE5\r
-SD_CD__0__MASK EQU 0x20\r
-SD_CD__0__PC EQU CYREG_PRT3_PC5\r
-SD_CD__0__PORT EQU 3\r
-SD_CD__0__SHIFT EQU 5\r
-SD_CD__AG EQU CYREG_PRT3_AG\r
-SD_CD__AMUX EQU CYREG_PRT3_AMUX\r
-SD_CD__BIE EQU CYREG_PRT3_BIE\r
-SD_CD__BIT_MASK EQU CYREG_PRT3_BIT_MASK\r
-SD_CD__BYP EQU CYREG_PRT3_BYP\r
-SD_CD__CTL EQU CYREG_PRT3_CTL\r
-SD_CD__DM0 EQU CYREG_PRT3_DM0\r
-SD_CD__DM1 EQU CYREG_PRT3_DM1\r
-SD_CD__DM2 EQU CYREG_PRT3_DM2\r
-SD_CD__DR EQU CYREG_PRT3_DR\r
-SD_CD__INP_DIS EQU CYREG_PRT3_INP_DIS\r
-SD_CD__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU3_BASE\r
-SD_CD__LCD_COM_SEG EQU CYREG_PRT3_LCD_COM_SEG\r
-SD_CD__LCD_EN EQU CYREG_PRT3_LCD_EN\r
-SD_CD__MASK EQU 0x20\r
-SD_CD__PORT EQU 3\r
-SD_CD__PRT EQU CYREG_PRT3_PRT\r
-SD_CD__PRTDSI__CAPS_SEL EQU CYREG_PRT3_CAPS_SEL\r
-SD_CD__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT3_DBL_SYNC_IN\r
-SD_CD__PRTDSI__OE_SEL0 EQU CYREG_PRT3_OE_SEL0\r
-SD_CD__PRTDSI__OE_SEL1 EQU CYREG_PRT3_OE_SEL1\r
-SD_CD__PRTDSI__OUT_SEL0 EQU CYREG_PRT3_OUT_SEL0\r
-SD_CD__PRTDSI__OUT_SEL1 EQU CYREG_PRT3_OUT_SEL1\r
-SD_CD__PRTDSI__SYNC_OUT EQU CYREG_PRT3_SYNC_OUT\r
-SD_CD__PS EQU CYREG_PRT3_PS\r
-SD_CD__SHIFT EQU 5\r
-SD_CD__SLW EQU CYREG_PRT3_SLW\r
-\r
-; SD_CS\r
-SD_CS__0__INTTYPE EQU CYREG_PICU3_INTTYPE4\r
-SD_CS__0__MASK EQU 0x10\r
-SD_CS__0__PC EQU CYREG_PRT3_PC4\r
-SD_CS__0__PORT EQU 3\r
-SD_CS__0__SHIFT EQU 4\r
-SD_CS__AG EQU CYREG_PRT3_AG\r
-SD_CS__AMUX EQU CYREG_PRT3_AMUX\r
-SD_CS__BIE EQU CYREG_PRT3_BIE\r
-SD_CS__BIT_MASK EQU CYREG_PRT3_BIT_MASK\r
-SD_CS__BYP EQU CYREG_PRT3_BYP\r
-SD_CS__CTL EQU CYREG_PRT3_CTL\r
-SD_CS__DM0 EQU CYREG_PRT3_DM0\r
-SD_CS__DM1 EQU CYREG_PRT3_DM1\r
-SD_CS__DM2 EQU CYREG_PRT3_DM2\r
-SD_CS__DR EQU CYREG_PRT3_DR\r
-SD_CS__INP_DIS EQU CYREG_PRT3_INP_DIS\r
-SD_CS__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU3_BASE\r
-SD_CS__LCD_COM_SEG EQU CYREG_PRT3_LCD_COM_SEG\r
-SD_CS__LCD_EN EQU CYREG_PRT3_LCD_EN\r
-SD_CS__MASK EQU 0x10\r
-SD_CS__PORT EQU 3\r
-SD_CS__PRT EQU CYREG_PRT3_PRT\r
-SD_CS__PRTDSI__CAPS_SEL EQU CYREG_PRT3_CAPS_SEL\r
-SD_CS__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT3_DBL_SYNC_IN\r
-SD_CS__PRTDSI__OE_SEL0 EQU CYREG_PRT3_OE_SEL0\r
-SD_CS__PRTDSI__OE_SEL1 EQU CYREG_PRT3_OE_SEL1\r
-SD_CS__PRTDSI__OUT_SEL0 EQU CYREG_PRT3_OUT_SEL0\r
-SD_CS__PRTDSI__OUT_SEL1 EQU CYREG_PRT3_OUT_SEL1\r
-SD_CS__PRTDSI__SYNC_OUT EQU CYREG_PRT3_SYNC_OUT\r
-SD_CS__PS EQU CYREG_PRT3_PS\r
-SD_CS__SHIFT EQU 4\r
-SD_CS__SLW EQU CYREG_PRT3_SLW\r
-\r
-; SD_Data_Clk\r
-SD_Data_Clk__CFG0 EQU CYREG_CLKDIST_DCFG0_CFG0\r
-SD_Data_Clk__CFG1 EQU CYREG_CLKDIST_DCFG0_CFG1\r
-SD_Data_Clk__CFG2 EQU CYREG_CLKDIST_DCFG0_CFG2\r
-SD_Data_Clk__CFG2_SRC_SEL_MASK EQU 0x07\r
-SD_Data_Clk__INDEX EQU 0x00\r
-SD_Data_Clk__PM_ACT_CFG EQU CYREG_PM_ACT_CFG2\r
-SD_Data_Clk__PM_ACT_MSK EQU 0x01\r
-SD_Data_Clk__PM_STBY_CFG EQU CYREG_PM_STBY_CFG2\r
-SD_Data_Clk__PM_STBY_MSK EQU 0x01\r
-\r
-; SD_MISO\r
-SD_MISO__0__INTTYPE EQU CYREG_PICU3_INTTYPE1\r
-SD_MISO__0__MASK EQU 0x02\r
-SD_MISO__0__PC EQU CYREG_PRT3_PC1\r
-SD_MISO__0__PORT EQU 3\r
-SD_MISO__0__SHIFT EQU 1\r
-SD_MISO__AG EQU CYREG_PRT3_AG\r
-SD_MISO__AMUX EQU CYREG_PRT3_AMUX\r
-SD_MISO__BIE EQU CYREG_PRT3_BIE\r
-SD_MISO__BIT_MASK EQU CYREG_PRT3_BIT_MASK\r
-SD_MISO__BYP EQU CYREG_PRT3_BYP\r
-SD_MISO__CTL EQU CYREG_PRT3_CTL\r
-SD_MISO__DM0 EQU CYREG_PRT3_DM0\r
-SD_MISO__DM1 EQU CYREG_PRT3_DM1\r
-SD_MISO__DM2 EQU CYREG_PRT3_DM2\r
-SD_MISO__DR EQU CYREG_PRT3_DR\r
-SD_MISO__INP_DIS EQU CYREG_PRT3_INP_DIS\r
-SD_MISO__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU3_BASE\r
-SD_MISO__LCD_COM_SEG EQU CYREG_PRT3_LCD_COM_SEG\r
-SD_MISO__LCD_EN EQU CYREG_PRT3_LCD_EN\r
-SD_MISO__MASK EQU 0x02\r
-SD_MISO__PORT EQU 3\r
-SD_MISO__PRT EQU CYREG_PRT3_PRT\r
-SD_MISO__PRTDSI__CAPS_SEL EQU CYREG_PRT3_CAPS_SEL\r
-SD_MISO__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT3_DBL_SYNC_IN\r
-SD_MISO__PRTDSI__OE_SEL0 EQU CYREG_PRT3_OE_SEL0\r
-SD_MISO__PRTDSI__OE_SEL1 EQU CYREG_PRT3_OE_SEL1\r
-SD_MISO__PRTDSI__OUT_SEL0 EQU CYREG_PRT3_OUT_SEL0\r
-SD_MISO__PRTDSI__OUT_SEL1 EQU CYREG_PRT3_OUT_SEL1\r
-SD_MISO__PRTDSI__SYNC_OUT EQU CYREG_PRT3_SYNC_OUT\r
-SD_MISO__PS EQU CYREG_PRT3_PS\r
-SD_MISO__SHIFT EQU 1\r
-SD_MISO__SLW EQU CYREG_PRT3_SLW\r
-\r
-; SD_MOSI\r
-SD_MOSI__0__INTTYPE EQU CYREG_PICU3_INTTYPE3\r
-SD_MOSI__0__MASK EQU 0x08\r
-SD_MOSI__0__PC EQU CYREG_PRT3_PC3\r
-SD_MOSI__0__PORT EQU 3\r
-SD_MOSI__0__SHIFT EQU 3\r
-SD_MOSI__AG EQU CYREG_PRT3_AG\r
-SD_MOSI__AMUX EQU CYREG_PRT3_AMUX\r
-SD_MOSI__BIE EQU CYREG_PRT3_BIE\r
-SD_MOSI__BIT_MASK EQU CYREG_PRT3_BIT_MASK\r
-SD_MOSI__BYP EQU CYREG_PRT3_BYP\r
-SD_MOSI__CTL EQU CYREG_PRT3_CTL\r
-SD_MOSI__DM0 EQU CYREG_PRT3_DM0\r
-SD_MOSI__DM1 EQU CYREG_PRT3_DM1\r
-SD_MOSI__DM2 EQU CYREG_PRT3_DM2\r
-SD_MOSI__DR EQU CYREG_PRT3_DR\r
-SD_MOSI__INP_DIS EQU CYREG_PRT3_INP_DIS\r
-SD_MOSI__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU3_BASE\r
-SD_MOSI__LCD_COM_SEG EQU CYREG_PRT3_LCD_COM_SEG\r
-SD_MOSI__LCD_EN EQU CYREG_PRT3_LCD_EN\r
-SD_MOSI__MASK EQU 0x08\r
-SD_MOSI__PORT EQU 3\r
-SD_MOSI__PRT EQU CYREG_PRT3_PRT\r
-SD_MOSI__PRTDSI__CAPS_SEL EQU CYREG_PRT3_CAPS_SEL\r
-SD_MOSI__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT3_DBL_SYNC_IN\r
-SD_MOSI__PRTDSI__OE_SEL0 EQU CYREG_PRT3_OE_SEL0\r
-SD_MOSI__PRTDSI__OE_SEL1 EQU CYREG_PRT3_OE_SEL1\r
-SD_MOSI__PRTDSI__OUT_SEL0 EQU CYREG_PRT3_OUT_SEL0\r
-SD_MOSI__PRTDSI__OUT_SEL1 EQU CYREG_PRT3_OUT_SEL1\r
-SD_MOSI__PRTDSI__SYNC_OUT EQU CYREG_PRT3_SYNC_OUT\r
-SD_MOSI__PS EQU CYREG_PRT3_PS\r
-SD_MOSI__SHIFT EQU 3\r
-SD_MOSI__SLW EQU CYREG_PRT3_SLW\r
-\r
-; SD_RX_DMA\r
-SD_RX_DMA__DRQ_CTL EQU CYREG_IDMUX_DRQ_CTL0\r
-SD_RX_DMA__DRQ_NUMBER EQU 2\r
-SD_RX_DMA__NUMBEROF_TDS EQU 0\r
-SD_RX_DMA__PRIORITY EQU 0\r
-SD_RX_DMA__TERMIN_EN EQU 0\r
-SD_RX_DMA__TERMIN_SEL EQU 0\r
-SD_RX_DMA__TERMOUT0_EN EQU 1\r
-SD_RX_DMA__TERMOUT0_SEL EQU 2\r
-SD_RX_DMA__TERMOUT1_EN EQU 0\r
-SD_RX_DMA__TERMOUT1_SEL EQU 0\r
-SD_RX_DMA_COMPLETE__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
-SD_RX_DMA_COMPLETE__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
-SD_RX_DMA_COMPLETE__INTC_MASK EQU 0x20\r
-SD_RX_DMA_COMPLETE__INTC_NUMBER EQU 5\r
-SD_RX_DMA_COMPLETE__INTC_PRIOR_NUM EQU 7\r
-SD_RX_DMA_COMPLETE__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_5\r
-SD_RX_DMA_COMPLETE__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
-SD_RX_DMA_COMPLETE__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
-\r
-; SD_SCK\r
-SD_SCK__0__INTTYPE EQU CYREG_PICU3_INTTYPE2\r
-SD_SCK__0__MASK EQU 0x04\r
-SD_SCK__0__PC EQU CYREG_PRT3_PC2\r
-SD_SCK__0__PORT EQU 3\r
-SD_SCK__0__SHIFT EQU 2\r
-SD_SCK__AG EQU CYREG_PRT3_AG\r
-SD_SCK__AMUX EQU CYREG_PRT3_AMUX\r
-SD_SCK__BIE EQU CYREG_PRT3_BIE\r
-SD_SCK__BIT_MASK EQU CYREG_PRT3_BIT_MASK\r
-SD_SCK__BYP EQU CYREG_PRT3_BYP\r
-SD_SCK__CTL EQU CYREG_PRT3_CTL\r
-SD_SCK__DM0 EQU CYREG_PRT3_DM0\r
-SD_SCK__DM1 EQU CYREG_PRT3_DM1\r
-SD_SCK__DM2 EQU CYREG_PRT3_DM2\r
-SD_SCK__DR EQU CYREG_PRT3_DR\r
-SD_SCK__INP_DIS EQU CYREG_PRT3_INP_DIS\r
-SD_SCK__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU3_BASE\r
-SD_SCK__LCD_COM_SEG EQU CYREG_PRT3_LCD_COM_SEG\r
-SD_SCK__LCD_EN EQU CYREG_PRT3_LCD_EN\r
-SD_SCK__MASK EQU 0x04\r
-SD_SCK__PORT EQU 3\r
-SD_SCK__PRT EQU CYREG_PRT3_PRT\r
-SD_SCK__PRTDSI__CAPS_SEL EQU CYREG_PRT3_CAPS_SEL\r
-SD_SCK__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT3_DBL_SYNC_IN\r
-SD_SCK__PRTDSI__OE_SEL0 EQU CYREG_PRT3_OE_SEL0\r
-SD_SCK__PRTDSI__OE_SEL1 EQU CYREG_PRT3_OE_SEL1\r
-SD_SCK__PRTDSI__OUT_SEL0 EQU CYREG_PRT3_OUT_SEL0\r
-SD_SCK__PRTDSI__OUT_SEL1 EQU CYREG_PRT3_OUT_SEL1\r
-SD_SCK__PRTDSI__SYNC_OUT EQU CYREG_PRT3_SYNC_OUT\r
-SD_SCK__PS EQU CYREG_PRT3_PS\r
-SD_SCK__SHIFT EQU 2\r
-SD_SCK__SLW EQU CYREG_PRT3_SLW\r
-\r
-; SD_TX_DMA\r
-SD_TX_DMA__DRQ_CTL EQU CYREG_IDMUX_DRQ_CTL0\r
-SD_TX_DMA__DRQ_NUMBER EQU 3\r
-SD_TX_DMA__NUMBEROF_TDS EQU 0\r
-SD_TX_DMA__PRIORITY EQU 1\r
-SD_TX_DMA__TERMIN_EN EQU 0\r
-SD_TX_DMA__TERMIN_SEL EQU 0\r
-SD_TX_DMA__TERMOUT0_EN EQU 1\r
-SD_TX_DMA__TERMOUT0_SEL EQU 3\r
-SD_TX_DMA__TERMOUT1_EN EQU 0\r
-SD_TX_DMA__TERMOUT1_SEL EQU 0\r
-SD_TX_DMA_COMPLETE__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
-SD_TX_DMA_COMPLETE__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
-SD_TX_DMA_COMPLETE__INTC_MASK EQU 0x40\r
-SD_TX_DMA_COMPLETE__INTC_NUMBER EQU 6\r
-SD_TX_DMA_COMPLETE__INTC_PRIOR_NUM EQU 7\r
-SD_TX_DMA_COMPLETE__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_6\r
-SD_TX_DMA_COMPLETE__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
-SD_TX_DMA_COMPLETE__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
+; SD_CS\r
+SD_CS__0__INTTYPE EQU CYREG_PICU3_INTTYPE4\r
+SD_CS__0__MASK EQU 0x10\r
+SD_CS__0__PC EQU CYREG_PRT3_PC4\r
+SD_CS__0__PORT EQU 3\r
+SD_CS__0__SHIFT EQU 4\r
+SD_CS__AG EQU CYREG_PRT3_AG\r
+SD_CS__AMUX EQU CYREG_PRT3_AMUX\r
+SD_CS__BIE EQU CYREG_PRT3_BIE\r
+SD_CS__BIT_MASK EQU CYREG_PRT3_BIT_MASK\r
+SD_CS__BYP EQU CYREG_PRT3_BYP\r
+SD_CS__CTL EQU CYREG_PRT3_CTL\r
+SD_CS__DM0 EQU CYREG_PRT3_DM0\r
+SD_CS__DM1 EQU CYREG_PRT3_DM1\r
+SD_CS__DM2 EQU CYREG_PRT3_DM2\r
+SD_CS__DR EQU CYREG_PRT3_DR\r
+SD_CS__INP_DIS EQU CYREG_PRT3_INP_DIS\r
+SD_CS__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU3_BASE\r
+SD_CS__LCD_COM_SEG EQU CYREG_PRT3_LCD_COM_SEG\r
+SD_CS__LCD_EN EQU CYREG_PRT3_LCD_EN\r
+SD_CS__MASK EQU 0x10\r
+SD_CS__PORT EQU 3\r
+SD_CS__PRT EQU CYREG_PRT3_PRT\r
+SD_CS__PRTDSI__CAPS_SEL EQU CYREG_PRT3_CAPS_SEL\r
+SD_CS__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT3_DBL_SYNC_IN\r
+SD_CS__PRTDSI__OE_SEL0 EQU CYREG_PRT3_OE_SEL0\r
+SD_CS__PRTDSI__OE_SEL1 EQU CYREG_PRT3_OE_SEL1\r
+SD_CS__PRTDSI__OUT_SEL0 EQU CYREG_PRT3_OUT_SEL0\r
+SD_CS__PRTDSI__OUT_SEL1 EQU CYREG_PRT3_OUT_SEL1\r
+SD_CS__PRTDSI__SYNC_OUT EQU CYREG_PRT3_SYNC_OUT\r
+SD_CS__PS EQU CYREG_PRT3_PS\r
+SD_CS__SHIFT EQU 4\r
+SD_CS__SLW EQU CYREG_PRT3_SLW\r
\r
; USBFS\r
USBFS_arb_int__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
USBFS_USB__USBIO_CR0 EQU CYREG_USB_USBIO_CR0\r
USBFS_USB__USBIO_CR1 EQU CYREG_USB_USBIO_CR1\r
\r
+; EXTLED\r
+EXTLED__0__INTTYPE EQU CYREG_PICU0_INTTYPE0\r
+EXTLED__0__MASK EQU 0x01\r
+EXTLED__0__PC EQU CYREG_PRT0_PC0\r
+EXTLED__0__PORT EQU 0\r
+EXTLED__0__SHIFT EQU 0\r
+EXTLED__AG EQU CYREG_PRT0_AG\r
+EXTLED__AMUX EQU CYREG_PRT0_AMUX\r
+EXTLED__BIE EQU CYREG_PRT0_BIE\r
+EXTLED__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
+EXTLED__BYP EQU CYREG_PRT0_BYP\r
+EXTLED__CTL EQU CYREG_PRT0_CTL\r
+EXTLED__DM0 EQU CYREG_PRT0_DM0\r
+EXTLED__DM1 EQU CYREG_PRT0_DM1\r
+EXTLED__DM2 EQU CYREG_PRT0_DM2\r
+EXTLED__DR EQU CYREG_PRT0_DR\r
+EXTLED__INP_DIS EQU CYREG_PRT0_INP_DIS\r
+EXTLED__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU0_BASE\r
+EXTLED__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
+EXTLED__LCD_EN EQU CYREG_PRT0_LCD_EN\r
+EXTLED__MASK EQU 0x01\r
+EXTLED__PORT EQU 0\r
+EXTLED__PRT EQU CYREG_PRT0_PRT\r
+EXTLED__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
+EXTLED__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
+EXTLED__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
+EXTLED__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
+EXTLED__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
+EXTLED__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
+EXTLED__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
+EXTLED__PS EQU CYREG_PRT0_PS\r
+EXTLED__SHIFT EQU 0\r
+EXTLED__SLW EQU CYREG_PRT0_SLW\r
+\r
+; SDCard\r
+SDCard_BSPIM_BitCounter__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B1_UDB07_08_ACTL\r
+SDCard_BSPIM_BitCounter__16BIT_CONTROL_CONTROL_REG EQU CYREG_B1_UDB07_08_CTL\r
+SDCard_BSPIM_BitCounter__16BIT_CONTROL_COUNT_REG EQU CYREG_B1_UDB07_08_CTL\r
+SDCard_BSPIM_BitCounter__16BIT_COUNT_CONTROL_REG EQU CYREG_B1_UDB07_08_CTL\r
+SDCard_BSPIM_BitCounter__16BIT_COUNT_COUNT_REG EQU CYREG_B1_UDB07_08_CTL\r
+SDCard_BSPIM_BitCounter__16BIT_MASK_MASK_REG EQU CYREG_B1_UDB07_08_MSK\r
+SDCard_BSPIM_BitCounter__16BIT_MASK_PERIOD_REG EQU CYREG_B1_UDB07_08_MSK\r
+SDCard_BSPIM_BitCounter__16BIT_PERIOD_MASK_REG EQU CYREG_B1_UDB07_08_MSK\r
+SDCard_BSPIM_BitCounter__16BIT_PERIOD_PERIOD_REG EQU CYREG_B1_UDB07_08_MSK\r
+SDCard_BSPIM_BitCounter__CONTROL_AUX_CTL_REG EQU CYREG_B1_UDB07_ACTL\r
+SDCard_BSPIM_BitCounter__CONTROL_REG EQU CYREG_B1_UDB07_CTL\r
+SDCard_BSPIM_BitCounter__CONTROL_ST_REG EQU CYREG_B1_UDB07_ST_CTL\r
+SDCard_BSPIM_BitCounter__COUNT_REG EQU CYREG_B1_UDB07_CTL\r
+SDCard_BSPIM_BitCounter__COUNT_ST_REG EQU CYREG_B1_UDB07_ST_CTL\r
+SDCard_BSPIM_BitCounter__MASK_CTL_AUX_CTL_REG EQU CYREG_B1_UDB07_MSK_ACTL\r
+SDCard_BSPIM_BitCounter__PER_CTL_AUX_CTL_REG EQU CYREG_B1_UDB07_MSK_ACTL\r
+SDCard_BSPIM_BitCounter__PERIOD_REG EQU CYREG_B1_UDB07_MSK\r
+SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B1_UDB07_08_ACTL\r
+SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_REG EQU CYREG_B1_UDB07_08_ST\r
+SDCard_BSPIM_BitCounter_ST__MASK_REG EQU CYREG_B1_UDB07_MSK\r
+SDCard_BSPIM_BitCounter_ST__MASK_ST_AUX_CTL_REG EQU CYREG_B1_UDB07_MSK_ACTL\r
+SDCard_BSPIM_BitCounter_ST__PER_ST_AUX_CTL_REG EQU CYREG_B1_UDB07_MSK_ACTL\r
+SDCard_BSPIM_BitCounter_ST__STATUS_AUX_CTL_REG EQU CYREG_B1_UDB07_ACTL\r
+SDCard_BSPIM_BitCounter_ST__STATUS_CNT_REG EQU CYREG_B1_UDB07_ST_CTL\r
+SDCard_BSPIM_BitCounter_ST__STATUS_CONTROL_REG EQU CYREG_B1_UDB07_ST_CTL\r
+SDCard_BSPIM_BitCounter_ST__STATUS_REG EQU CYREG_B1_UDB07_ST\r
+SDCard_BSPIM_RxStsReg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B1_UDB04_05_ACTL\r
+SDCard_BSPIM_RxStsReg__16BIT_STATUS_REG EQU CYREG_B1_UDB04_05_ST\r
+SDCard_BSPIM_RxStsReg__4__MASK EQU 0x10\r
+SDCard_BSPIM_RxStsReg__4__POS EQU 4\r
+SDCard_BSPIM_RxStsReg__5__MASK EQU 0x20\r
+SDCard_BSPIM_RxStsReg__5__POS EQU 5\r
+SDCard_BSPIM_RxStsReg__6__MASK EQU 0x40\r
+SDCard_BSPIM_RxStsReg__6__POS EQU 6\r
+SDCard_BSPIM_RxStsReg__MASK EQU 0x70\r
+SDCard_BSPIM_RxStsReg__MASK_REG EQU CYREG_B1_UDB04_MSK\r
+SDCard_BSPIM_RxStsReg__STATUS_AUX_CTL_REG EQU CYREG_B1_UDB04_ACTL\r
+SDCard_BSPIM_RxStsReg__STATUS_REG EQU CYREG_B1_UDB04_ST\r
+SDCard_BSPIM_sR8_Dp_u0__16BIT_A0_REG EQU CYREG_B1_UDB04_05_A0\r
+SDCard_BSPIM_sR8_Dp_u0__16BIT_A1_REG EQU CYREG_B1_UDB04_05_A1\r
+SDCard_BSPIM_sR8_Dp_u0__16BIT_D0_REG EQU CYREG_B1_UDB04_05_D0\r
+SDCard_BSPIM_sR8_Dp_u0__16BIT_D1_REG EQU CYREG_B1_UDB04_05_D1\r
+SDCard_BSPIM_sR8_Dp_u0__16BIT_DP_AUX_CTL_REG EQU CYREG_B1_UDB04_05_ACTL\r
+SDCard_BSPIM_sR8_Dp_u0__16BIT_F0_REG EQU CYREG_B1_UDB04_05_F0\r
+SDCard_BSPIM_sR8_Dp_u0__16BIT_F1_REG EQU CYREG_B1_UDB04_05_F1\r
+SDCard_BSPIM_sR8_Dp_u0__A0_A1_REG EQU CYREG_B1_UDB04_A0_A1\r
+SDCard_BSPIM_sR8_Dp_u0__A0_REG EQU CYREG_B1_UDB04_A0\r
+SDCard_BSPIM_sR8_Dp_u0__A1_REG EQU CYREG_B1_UDB04_A1\r
+SDCard_BSPIM_sR8_Dp_u0__D0_D1_REG EQU CYREG_B1_UDB04_D0_D1\r
+SDCard_BSPIM_sR8_Dp_u0__D0_REG EQU CYREG_B1_UDB04_D0\r
+SDCard_BSPIM_sR8_Dp_u0__D1_REG EQU CYREG_B1_UDB04_D1\r
+SDCard_BSPIM_sR8_Dp_u0__DP_AUX_CTL_REG EQU CYREG_B1_UDB04_ACTL\r
+SDCard_BSPIM_sR8_Dp_u0__F0_F1_REG EQU CYREG_B1_UDB04_F0_F1\r
+SDCard_BSPIM_sR8_Dp_u0__F0_REG EQU CYREG_B1_UDB04_F0\r
+SDCard_BSPIM_sR8_Dp_u0__F1_REG EQU CYREG_B1_UDB04_F1\r
+SDCard_BSPIM_TxStsReg__0__MASK EQU 0x01\r
+SDCard_BSPIM_TxStsReg__0__POS EQU 0\r
+SDCard_BSPIM_TxStsReg__1__MASK EQU 0x02\r
+SDCard_BSPIM_TxStsReg__1__POS EQU 1\r
+SDCard_BSPIM_TxStsReg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B1_UDB06_07_ACTL\r
+SDCard_BSPIM_TxStsReg__16BIT_STATUS_REG EQU CYREG_B1_UDB06_07_ST\r
+SDCard_BSPIM_TxStsReg__2__MASK EQU 0x04\r
+SDCard_BSPIM_TxStsReg__2__POS EQU 2\r
+SDCard_BSPIM_TxStsReg__3__MASK EQU 0x08\r
+SDCard_BSPIM_TxStsReg__3__POS EQU 3\r
+SDCard_BSPIM_TxStsReg__4__MASK EQU 0x10\r
+SDCard_BSPIM_TxStsReg__4__POS EQU 4\r
+SDCard_BSPIM_TxStsReg__MASK EQU 0x1F\r
+SDCard_BSPIM_TxStsReg__MASK_REG EQU CYREG_B1_UDB06_MSK\r
+SDCard_BSPIM_TxStsReg__STATUS_AUX_CTL_REG EQU CYREG_B1_UDB06_ACTL\r
+SDCard_BSPIM_TxStsReg__STATUS_REG EQU CYREG_B1_UDB06_ST\r
+\r
+; SD_SCK\r
+SD_SCK__0__INTTYPE EQU CYREG_PICU3_INTTYPE2\r
+SD_SCK__0__MASK EQU 0x04\r
+SD_SCK__0__PC EQU CYREG_PRT3_PC2\r
+SD_SCK__0__PORT EQU 3\r
+SD_SCK__0__SHIFT EQU 2\r
+SD_SCK__AG EQU CYREG_PRT3_AG\r
+SD_SCK__AMUX EQU CYREG_PRT3_AMUX\r
+SD_SCK__BIE EQU CYREG_PRT3_BIE\r
+SD_SCK__BIT_MASK EQU CYREG_PRT3_BIT_MASK\r
+SD_SCK__BYP EQU CYREG_PRT3_BYP\r
+SD_SCK__CTL EQU CYREG_PRT3_CTL\r
+SD_SCK__DM0 EQU CYREG_PRT3_DM0\r
+SD_SCK__DM1 EQU CYREG_PRT3_DM1\r
+SD_SCK__DM2 EQU CYREG_PRT3_DM2\r
+SD_SCK__DR EQU CYREG_PRT3_DR\r
+SD_SCK__INP_DIS EQU CYREG_PRT3_INP_DIS\r
+SD_SCK__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU3_BASE\r
+SD_SCK__LCD_COM_SEG EQU CYREG_PRT3_LCD_COM_SEG\r
+SD_SCK__LCD_EN EQU CYREG_PRT3_LCD_EN\r
+SD_SCK__MASK EQU 0x04\r
+SD_SCK__PORT EQU 3\r
+SD_SCK__PRT EQU CYREG_PRT3_PRT\r
+SD_SCK__PRTDSI__CAPS_SEL EQU CYREG_PRT3_CAPS_SEL\r
+SD_SCK__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT3_DBL_SYNC_IN\r
+SD_SCK__PRTDSI__OE_SEL0 EQU CYREG_PRT3_OE_SEL0\r
+SD_SCK__PRTDSI__OE_SEL1 EQU CYREG_PRT3_OE_SEL1\r
+SD_SCK__PRTDSI__OUT_SEL0 EQU CYREG_PRT3_OUT_SEL0\r
+SD_SCK__PRTDSI__OUT_SEL1 EQU CYREG_PRT3_OUT_SEL1\r
+SD_SCK__PRTDSI__SYNC_OUT EQU CYREG_PRT3_SYNC_OUT\r
+SD_SCK__PS EQU CYREG_PRT3_PS\r
+SD_SCK__SHIFT EQU 2\r
+SD_SCK__SLW EQU CYREG_PRT3_SLW\r
+\r
+; SCSI_In\r
+SCSI_In__0__AG EQU CYREG_PRT2_AG\r
+SCSI_In__0__AMUX EQU CYREG_PRT2_AMUX\r
+SCSI_In__0__BIE EQU CYREG_PRT2_BIE\r
+SCSI_In__0__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
+SCSI_In__0__BYP EQU CYREG_PRT2_BYP\r
+SCSI_In__0__CTL EQU CYREG_PRT2_CTL\r
+SCSI_In__0__DM0 EQU CYREG_PRT2_DM0\r
+SCSI_In__0__DM1 EQU CYREG_PRT2_DM1\r
+SCSI_In__0__DM2 EQU CYREG_PRT2_DM2\r
+SCSI_In__0__DR EQU CYREG_PRT2_DR\r
+SCSI_In__0__INP_DIS EQU CYREG_PRT2_INP_DIS\r
+SCSI_In__0__INTTYPE EQU CYREG_PICU2_INTTYPE1\r
+SCSI_In__0__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
+SCSI_In__0__LCD_EN EQU CYREG_PRT2_LCD_EN\r
+SCSI_In__0__MASK EQU 0x02\r
+SCSI_In__0__PC EQU CYREG_PRT2_PC1\r
+SCSI_In__0__PORT EQU 2\r
+SCSI_In__0__PRT EQU CYREG_PRT2_PRT\r
+SCSI_In__0__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
+SCSI_In__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
+SCSI_In__0__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
+SCSI_In__0__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
+SCSI_In__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
+SCSI_In__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
+SCSI_In__0__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
+SCSI_In__0__PS EQU CYREG_PRT2_PS\r
+SCSI_In__0__SHIFT EQU 1\r
+SCSI_In__0__SLW EQU CYREG_PRT2_SLW\r
+SCSI_In__1__AG EQU CYREG_PRT4_AG\r
+SCSI_In__1__AMUX EQU CYREG_PRT4_AMUX\r
+SCSI_In__1__BIE EQU CYREG_PRT4_BIE\r
+SCSI_In__1__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
+SCSI_In__1__BYP EQU CYREG_PRT4_BYP\r
+SCSI_In__1__CTL EQU CYREG_PRT4_CTL\r
+SCSI_In__1__DM0 EQU CYREG_PRT4_DM0\r
+SCSI_In__1__DM1 EQU CYREG_PRT4_DM1\r
+SCSI_In__1__DM2 EQU CYREG_PRT4_DM2\r
+SCSI_In__1__DR EQU CYREG_PRT4_DR\r
+SCSI_In__1__INP_DIS EQU CYREG_PRT4_INP_DIS\r
+SCSI_In__1__INTTYPE EQU CYREG_PICU4_INTTYPE6\r
+SCSI_In__1__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
+SCSI_In__1__LCD_EN EQU CYREG_PRT4_LCD_EN\r
+SCSI_In__1__MASK EQU 0x40\r
+SCSI_In__1__PC EQU CYREG_PRT4_PC6\r
+SCSI_In__1__PORT EQU 4\r
+SCSI_In__1__PRT EQU CYREG_PRT4_PRT\r
+SCSI_In__1__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
+SCSI_In__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
+SCSI_In__1__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
+SCSI_In__1__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
+SCSI_In__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
+SCSI_In__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
+SCSI_In__1__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
+SCSI_In__1__PS EQU CYREG_PRT4_PS\r
+SCSI_In__1__SHIFT EQU 6\r
+SCSI_In__1__SLW EQU CYREG_PRT4_SLW\r
+SCSI_In__2__AG EQU CYREG_PRT4_AG\r
+SCSI_In__2__AMUX EQU CYREG_PRT4_AMUX\r
+SCSI_In__2__BIE EQU CYREG_PRT4_BIE\r
+SCSI_In__2__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
+SCSI_In__2__BYP EQU CYREG_PRT4_BYP\r
+SCSI_In__2__CTL EQU CYREG_PRT4_CTL\r
+SCSI_In__2__DM0 EQU CYREG_PRT4_DM0\r
+SCSI_In__2__DM1 EQU CYREG_PRT4_DM1\r
+SCSI_In__2__DM2 EQU CYREG_PRT4_DM2\r
+SCSI_In__2__DR EQU CYREG_PRT4_DR\r
+SCSI_In__2__INP_DIS EQU CYREG_PRT4_INP_DIS\r
+SCSI_In__2__INTTYPE EQU CYREG_PICU4_INTTYPE2\r
+SCSI_In__2__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
+SCSI_In__2__LCD_EN EQU CYREG_PRT4_LCD_EN\r
+SCSI_In__2__MASK EQU 0x04\r
+SCSI_In__2__PC EQU CYREG_PRT4_PC2\r
+SCSI_In__2__PORT EQU 4\r
+SCSI_In__2__PRT EQU CYREG_PRT4_PRT\r
+SCSI_In__2__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
+SCSI_In__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
+SCSI_In__2__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
+SCSI_In__2__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
+SCSI_In__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
+SCSI_In__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
+SCSI_In__2__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
+SCSI_In__2__PS EQU CYREG_PRT4_PS\r
+SCSI_In__2__SHIFT EQU 2\r
+SCSI_In__2__SLW EQU CYREG_PRT4_SLW\r
+SCSI_In__3__AG EQU CYREG_PRT0_AG\r
+SCSI_In__3__AMUX EQU CYREG_PRT0_AMUX\r
+SCSI_In__3__BIE EQU CYREG_PRT0_BIE\r
+SCSI_In__3__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
+SCSI_In__3__BYP EQU CYREG_PRT0_BYP\r
+SCSI_In__3__CTL EQU CYREG_PRT0_CTL\r
+SCSI_In__3__DM0 EQU CYREG_PRT0_DM0\r
+SCSI_In__3__DM1 EQU CYREG_PRT0_DM1\r
+SCSI_In__3__DM2 EQU CYREG_PRT0_DM2\r
+SCSI_In__3__DR EQU CYREG_PRT0_DR\r
+SCSI_In__3__INP_DIS EQU CYREG_PRT0_INP_DIS\r
+SCSI_In__3__INTTYPE EQU CYREG_PICU0_INTTYPE5\r
+SCSI_In__3__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
+SCSI_In__3__LCD_EN EQU CYREG_PRT0_LCD_EN\r
+SCSI_In__3__MASK EQU 0x20\r
+SCSI_In__3__PC EQU CYREG_PRT0_PC5\r
+SCSI_In__3__PORT EQU 0\r
+SCSI_In__3__PRT EQU CYREG_PRT0_PRT\r
+SCSI_In__3__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
+SCSI_In__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
+SCSI_In__3__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
+SCSI_In__3__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
+SCSI_In__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
+SCSI_In__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
+SCSI_In__3__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
+SCSI_In__3__PS EQU CYREG_PRT0_PS\r
+SCSI_In__3__SHIFT EQU 5\r
+SCSI_In__3__SLW EQU CYREG_PRT0_SLW\r
+SCSI_In__4__AG EQU CYREG_PRT0_AG\r
+SCSI_In__4__AMUX EQU CYREG_PRT0_AMUX\r
+SCSI_In__4__BIE EQU CYREG_PRT0_BIE\r
+SCSI_In__4__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
+SCSI_In__4__BYP EQU CYREG_PRT0_BYP\r
+SCSI_In__4__CTL EQU CYREG_PRT0_CTL\r
+SCSI_In__4__DM0 EQU CYREG_PRT0_DM0\r
+SCSI_In__4__DM1 EQU CYREG_PRT0_DM1\r
+SCSI_In__4__DM2 EQU CYREG_PRT0_DM2\r
+SCSI_In__4__DR EQU CYREG_PRT0_DR\r
+SCSI_In__4__INP_DIS EQU CYREG_PRT0_INP_DIS\r
+SCSI_In__4__INTTYPE EQU CYREG_PICU0_INTTYPE4\r
+SCSI_In__4__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
+SCSI_In__4__LCD_EN EQU CYREG_PRT0_LCD_EN\r
+SCSI_In__4__MASK EQU 0x10\r
+SCSI_In__4__PC EQU CYREG_PRT0_PC4\r
+SCSI_In__4__PORT EQU 0\r
+SCSI_In__4__PRT EQU CYREG_PRT0_PRT\r
+SCSI_In__4__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
+SCSI_In__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
+SCSI_In__4__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
+SCSI_In__4__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
+SCSI_In__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
+SCSI_In__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
+SCSI_In__4__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
+SCSI_In__4__PS EQU CYREG_PRT0_PS\r
+SCSI_In__4__SHIFT EQU 4\r
+SCSI_In__4__SLW EQU CYREG_PRT0_SLW\r
+SCSI_In__CD__AG EQU CYREG_PRT4_AG\r
+SCSI_In__CD__AMUX EQU CYREG_PRT4_AMUX\r
+SCSI_In__CD__BIE EQU CYREG_PRT4_BIE\r
+SCSI_In__CD__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
+SCSI_In__CD__BYP EQU CYREG_PRT4_BYP\r
+SCSI_In__CD__CTL EQU CYREG_PRT4_CTL\r
+SCSI_In__CD__DM0 EQU CYREG_PRT4_DM0\r
+SCSI_In__CD__DM1 EQU CYREG_PRT4_DM1\r
+SCSI_In__CD__DM2 EQU CYREG_PRT4_DM2\r
+SCSI_In__CD__DR EQU CYREG_PRT4_DR\r
+SCSI_In__CD__INP_DIS EQU CYREG_PRT4_INP_DIS\r
+SCSI_In__CD__INTTYPE EQU CYREG_PICU4_INTTYPE2\r
+SCSI_In__CD__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
+SCSI_In__CD__LCD_EN EQU CYREG_PRT4_LCD_EN\r
+SCSI_In__CD__MASK EQU 0x04\r
+SCSI_In__CD__PC EQU CYREG_PRT4_PC2\r
+SCSI_In__CD__PORT EQU 4\r
+SCSI_In__CD__PRT EQU CYREG_PRT4_PRT\r
+SCSI_In__CD__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
+SCSI_In__CD__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
+SCSI_In__CD__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
+SCSI_In__CD__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
+SCSI_In__CD__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
+SCSI_In__CD__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
+SCSI_In__CD__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
+SCSI_In__CD__PS EQU CYREG_PRT4_PS\r
+SCSI_In__CD__SHIFT EQU 2\r
+SCSI_In__CD__SLW EQU CYREG_PRT4_SLW\r
+SCSI_In__DBP__AG EQU CYREG_PRT2_AG\r
+SCSI_In__DBP__AMUX EQU CYREG_PRT2_AMUX\r
+SCSI_In__DBP__BIE EQU CYREG_PRT2_BIE\r
+SCSI_In__DBP__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
+SCSI_In__DBP__BYP EQU CYREG_PRT2_BYP\r
+SCSI_In__DBP__CTL EQU CYREG_PRT2_CTL\r
+SCSI_In__DBP__DM0 EQU CYREG_PRT2_DM0\r
+SCSI_In__DBP__DM1 EQU CYREG_PRT2_DM1\r
+SCSI_In__DBP__DM2 EQU CYREG_PRT2_DM2\r
+SCSI_In__DBP__DR EQU CYREG_PRT2_DR\r
+SCSI_In__DBP__INP_DIS EQU CYREG_PRT2_INP_DIS\r
+SCSI_In__DBP__INTTYPE EQU CYREG_PICU2_INTTYPE1\r
+SCSI_In__DBP__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
+SCSI_In__DBP__LCD_EN EQU CYREG_PRT2_LCD_EN\r
+SCSI_In__DBP__MASK EQU 0x02\r
+SCSI_In__DBP__PC EQU CYREG_PRT2_PC1\r
+SCSI_In__DBP__PORT EQU 2\r
+SCSI_In__DBP__PRT EQU CYREG_PRT2_PRT\r
+SCSI_In__DBP__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
+SCSI_In__DBP__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
+SCSI_In__DBP__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
+SCSI_In__DBP__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
+SCSI_In__DBP__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
+SCSI_In__DBP__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
+SCSI_In__DBP__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
+SCSI_In__DBP__PS EQU CYREG_PRT2_PS\r
+SCSI_In__DBP__SHIFT EQU 1\r
+SCSI_In__DBP__SLW EQU CYREG_PRT2_SLW\r
+SCSI_In__IO__AG EQU CYREG_PRT0_AG\r
+SCSI_In__IO__AMUX EQU CYREG_PRT0_AMUX\r
+SCSI_In__IO__BIE EQU CYREG_PRT0_BIE\r
+SCSI_In__IO__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
+SCSI_In__IO__BYP EQU CYREG_PRT0_BYP\r
+SCSI_In__IO__CTL EQU CYREG_PRT0_CTL\r
+SCSI_In__IO__DM0 EQU CYREG_PRT0_DM0\r
+SCSI_In__IO__DM1 EQU CYREG_PRT0_DM1\r
+SCSI_In__IO__DM2 EQU CYREG_PRT0_DM2\r
+SCSI_In__IO__DR EQU CYREG_PRT0_DR\r
+SCSI_In__IO__INP_DIS EQU CYREG_PRT0_INP_DIS\r
+SCSI_In__IO__INTTYPE EQU CYREG_PICU0_INTTYPE4\r
+SCSI_In__IO__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
+SCSI_In__IO__LCD_EN EQU CYREG_PRT0_LCD_EN\r
+SCSI_In__IO__MASK EQU 0x10\r
+SCSI_In__IO__PC EQU CYREG_PRT0_PC4\r
+SCSI_In__IO__PORT EQU 0\r
+SCSI_In__IO__PRT EQU CYREG_PRT0_PRT\r
+SCSI_In__IO__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
+SCSI_In__IO__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
+SCSI_In__IO__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
+SCSI_In__IO__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
+SCSI_In__IO__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
+SCSI_In__IO__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
+SCSI_In__IO__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
+SCSI_In__IO__PS EQU CYREG_PRT0_PS\r
+SCSI_In__IO__SHIFT EQU 4\r
+SCSI_In__IO__SLW EQU CYREG_PRT0_SLW\r
+SCSI_In__MSG__AG EQU CYREG_PRT4_AG\r
+SCSI_In__MSG__AMUX EQU CYREG_PRT4_AMUX\r
+SCSI_In__MSG__BIE EQU CYREG_PRT4_BIE\r
+SCSI_In__MSG__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
+SCSI_In__MSG__BYP EQU CYREG_PRT4_BYP\r
+SCSI_In__MSG__CTL EQU CYREG_PRT4_CTL\r
+SCSI_In__MSG__DM0 EQU CYREG_PRT4_DM0\r
+SCSI_In__MSG__DM1 EQU CYREG_PRT4_DM1\r
+SCSI_In__MSG__DM2 EQU CYREG_PRT4_DM2\r
+SCSI_In__MSG__DR EQU CYREG_PRT4_DR\r
+SCSI_In__MSG__INP_DIS EQU CYREG_PRT4_INP_DIS\r
+SCSI_In__MSG__INTTYPE EQU CYREG_PICU4_INTTYPE6\r
+SCSI_In__MSG__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
+SCSI_In__MSG__LCD_EN EQU CYREG_PRT4_LCD_EN\r
+SCSI_In__MSG__MASK EQU 0x40\r
+SCSI_In__MSG__PC EQU CYREG_PRT4_PC6\r
+SCSI_In__MSG__PORT EQU 4\r
+SCSI_In__MSG__PRT EQU CYREG_PRT4_PRT\r
+SCSI_In__MSG__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
+SCSI_In__MSG__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
+SCSI_In__MSG__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
+SCSI_In__MSG__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
+SCSI_In__MSG__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
+SCSI_In__MSG__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
+SCSI_In__MSG__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
+SCSI_In__MSG__PS EQU CYREG_PRT4_PS\r
+SCSI_In__MSG__SHIFT EQU 6\r
+SCSI_In__MSG__SLW EQU CYREG_PRT4_SLW\r
+SCSI_In__REQ__AG EQU CYREG_PRT0_AG\r
+SCSI_In__REQ__AMUX EQU CYREG_PRT0_AMUX\r
+SCSI_In__REQ__BIE EQU CYREG_PRT0_BIE\r
+SCSI_In__REQ__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
+SCSI_In__REQ__BYP EQU CYREG_PRT0_BYP\r
+SCSI_In__REQ__CTL EQU CYREG_PRT0_CTL\r
+SCSI_In__REQ__DM0 EQU CYREG_PRT0_DM0\r
+SCSI_In__REQ__DM1 EQU CYREG_PRT0_DM1\r
+SCSI_In__REQ__DM2 EQU CYREG_PRT0_DM2\r
+SCSI_In__REQ__DR EQU CYREG_PRT0_DR\r
+SCSI_In__REQ__INP_DIS EQU CYREG_PRT0_INP_DIS\r
+SCSI_In__REQ__INTTYPE EQU CYREG_PICU0_INTTYPE5\r
+SCSI_In__REQ__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
+SCSI_In__REQ__LCD_EN EQU CYREG_PRT0_LCD_EN\r
+SCSI_In__REQ__MASK EQU 0x20\r
+SCSI_In__REQ__PC EQU CYREG_PRT0_PC5\r
+SCSI_In__REQ__PORT EQU 0\r
+SCSI_In__REQ__PRT EQU CYREG_PRT0_PRT\r
+SCSI_In__REQ__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
+SCSI_In__REQ__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
+SCSI_In__REQ__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
+SCSI_In__REQ__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
+SCSI_In__REQ__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
+SCSI_In__REQ__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
+SCSI_In__REQ__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
+SCSI_In__REQ__PS EQU CYREG_PRT0_PS\r
+SCSI_In__REQ__SHIFT EQU 5\r
+SCSI_In__REQ__SLW EQU CYREG_PRT0_SLW\r
+SCSI_In_DBx__0__AG EQU CYREG_PRT5_AG\r
+SCSI_In_DBx__0__AMUX EQU CYREG_PRT5_AMUX\r
+SCSI_In_DBx__0__BIE EQU CYREG_PRT5_BIE\r
+SCSI_In_DBx__0__BIT_MASK EQU CYREG_PRT5_BIT_MASK\r
+SCSI_In_DBx__0__BYP EQU CYREG_PRT5_BYP\r
+SCSI_In_DBx__0__CTL EQU CYREG_PRT5_CTL\r
+SCSI_In_DBx__0__DM0 EQU CYREG_PRT5_DM0\r
+SCSI_In_DBx__0__DM1 EQU CYREG_PRT5_DM1\r
+SCSI_In_DBx__0__DM2 EQU CYREG_PRT5_DM2\r
+SCSI_In_DBx__0__DR EQU CYREG_PRT5_DR\r
+SCSI_In_DBx__0__INP_DIS EQU CYREG_PRT5_INP_DIS\r
+SCSI_In_DBx__0__INTTYPE EQU CYREG_PICU5_INTTYPE3\r
+SCSI_In_DBx__0__LCD_COM_SEG EQU CYREG_PRT5_LCD_COM_SEG\r
+SCSI_In_DBx__0__LCD_EN EQU CYREG_PRT5_LCD_EN\r
+SCSI_In_DBx__0__MASK EQU 0x08\r
+SCSI_In_DBx__0__PC EQU CYREG_PRT5_PC3\r
+SCSI_In_DBx__0__PORT EQU 5\r
+SCSI_In_DBx__0__PRT EQU CYREG_PRT5_PRT\r
+SCSI_In_DBx__0__PRTDSI__CAPS_SEL EQU CYREG_PRT5_CAPS_SEL\r
+SCSI_In_DBx__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT5_DBL_SYNC_IN\r
+SCSI_In_DBx__0__PRTDSI__OE_SEL0 EQU CYREG_PRT5_OE_SEL0\r
+SCSI_In_DBx__0__PRTDSI__OE_SEL1 EQU CYREG_PRT5_OE_SEL1\r
+SCSI_In_DBx__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT5_OUT_SEL0\r
+SCSI_In_DBx__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT5_OUT_SEL1\r
+SCSI_In_DBx__0__PRTDSI__SYNC_OUT EQU CYREG_PRT5_SYNC_OUT\r
+SCSI_In_DBx__0__PS EQU CYREG_PRT5_PS\r
+SCSI_In_DBx__0__SHIFT EQU 3\r
+SCSI_In_DBx__0__SLW EQU CYREG_PRT5_SLW\r
+SCSI_In_DBx__1__AG EQU CYREG_PRT5_AG\r
+SCSI_In_DBx__1__AMUX EQU CYREG_PRT5_AMUX\r
+SCSI_In_DBx__1__BIE EQU CYREG_PRT5_BIE\r
+SCSI_In_DBx__1__BIT_MASK EQU CYREG_PRT5_BIT_MASK\r
+SCSI_In_DBx__1__BYP EQU CYREG_PRT5_BYP\r
+SCSI_In_DBx__1__CTL EQU CYREG_PRT5_CTL\r
+SCSI_In_DBx__1__DM0 EQU CYREG_PRT5_DM0\r
+SCSI_In_DBx__1__DM1 EQU CYREG_PRT5_DM1\r
+SCSI_In_DBx__1__DM2 EQU CYREG_PRT5_DM2\r
+SCSI_In_DBx__1__DR EQU CYREG_PRT5_DR\r
+SCSI_In_DBx__1__INP_DIS EQU CYREG_PRT5_INP_DIS\r
+SCSI_In_DBx__1__INTTYPE EQU CYREG_PICU5_INTTYPE2\r
+SCSI_In_DBx__1__LCD_COM_SEG EQU CYREG_PRT5_LCD_COM_SEG\r
+SCSI_In_DBx__1__LCD_EN EQU CYREG_PRT5_LCD_EN\r
+SCSI_In_DBx__1__MASK EQU 0x04\r
+SCSI_In_DBx__1__PC EQU CYREG_PRT5_PC2\r
+SCSI_In_DBx__1__PORT EQU 5\r
+SCSI_In_DBx__1__PRT EQU CYREG_PRT5_PRT\r
+SCSI_In_DBx__1__PRTDSI__CAPS_SEL EQU CYREG_PRT5_CAPS_SEL\r
+SCSI_In_DBx__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT5_DBL_SYNC_IN\r
+SCSI_In_DBx__1__PRTDSI__OE_SEL0 EQU CYREG_PRT5_OE_SEL0\r
+SCSI_In_DBx__1__PRTDSI__OE_SEL1 EQU CYREG_PRT5_OE_SEL1\r
+SCSI_In_DBx__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT5_OUT_SEL0\r
+SCSI_In_DBx__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT5_OUT_SEL1\r
+SCSI_In_DBx__1__PRTDSI__SYNC_OUT EQU CYREG_PRT5_SYNC_OUT\r
+SCSI_In_DBx__1__PS EQU CYREG_PRT5_PS\r
+SCSI_In_DBx__1__SHIFT EQU 2\r
+SCSI_In_DBx__1__SLW EQU CYREG_PRT5_SLW\r
+SCSI_In_DBx__2__AG EQU CYREG_PRT6_AG\r
+SCSI_In_DBx__2__AMUX EQU CYREG_PRT6_AMUX\r
+SCSI_In_DBx__2__BIE EQU CYREG_PRT6_BIE\r
+SCSI_In_DBx__2__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
+SCSI_In_DBx__2__BYP EQU CYREG_PRT6_BYP\r
+SCSI_In_DBx__2__CTL EQU CYREG_PRT6_CTL\r
+SCSI_In_DBx__2__DM0 EQU CYREG_PRT6_DM0\r
+SCSI_In_DBx__2__DM1 EQU CYREG_PRT6_DM1\r
+SCSI_In_DBx__2__DM2 EQU CYREG_PRT6_DM2\r
+SCSI_In_DBx__2__DR EQU CYREG_PRT6_DR\r
+SCSI_In_DBx__2__INP_DIS EQU CYREG_PRT6_INP_DIS\r
+SCSI_In_DBx__2__INTTYPE EQU CYREG_PICU6_INTTYPE7\r
+SCSI_In_DBx__2__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
+SCSI_In_DBx__2__LCD_EN EQU CYREG_PRT6_LCD_EN\r
+SCSI_In_DBx__2__MASK EQU 0x80\r
+SCSI_In_DBx__2__PC EQU CYREG_PRT6_PC7\r
+SCSI_In_DBx__2__PORT EQU 6\r
+SCSI_In_DBx__2__PRT EQU CYREG_PRT6_PRT\r
+SCSI_In_DBx__2__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
+SCSI_In_DBx__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
+SCSI_In_DBx__2__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
+SCSI_In_DBx__2__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
+SCSI_In_DBx__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
+SCSI_In_DBx__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
+SCSI_In_DBx__2__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
+SCSI_In_DBx__2__PS EQU CYREG_PRT6_PS\r
+SCSI_In_DBx__2__SHIFT EQU 7\r
+SCSI_In_DBx__2__SLW EQU CYREG_PRT6_SLW\r
+SCSI_In_DBx__3__AG EQU CYREG_PRT6_AG\r
+SCSI_In_DBx__3__AMUX EQU CYREG_PRT6_AMUX\r
+SCSI_In_DBx__3__BIE EQU CYREG_PRT6_BIE\r
+SCSI_In_DBx__3__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
+SCSI_In_DBx__3__BYP EQU CYREG_PRT6_BYP\r
+SCSI_In_DBx__3__CTL EQU CYREG_PRT6_CTL\r
+SCSI_In_DBx__3__DM0 EQU CYREG_PRT6_DM0\r
+SCSI_In_DBx__3__DM1 EQU CYREG_PRT6_DM1\r
+SCSI_In_DBx__3__DM2 EQU CYREG_PRT6_DM2\r
+SCSI_In_DBx__3__DR EQU CYREG_PRT6_DR\r
+SCSI_In_DBx__3__INP_DIS EQU CYREG_PRT6_INP_DIS\r
+SCSI_In_DBx__3__INTTYPE EQU CYREG_PICU6_INTTYPE6\r
+SCSI_In_DBx__3__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
+SCSI_In_DBx__3__LCD_EN EQU CYREG_PRT6_LCD_EN\r
+SCSI_In_DBx__3__MASK EQU 0x40\r
+SCSI_In_DBx__3__PC EQU CYREG_PRT6_PC6\r
+SCSI_In_DBx__3__PORT EQU 6\r
+SCSI_In_DBx__3__PRT EQU CYREG_PRT6_PRT\r
+SCSI_In_DBx__3__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
+SCSI_In_DBx__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
+SCSI_In_DBx__3__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
+SCSI_In_DBx__3__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
+SCSI_In_DBx__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
+SCSI_In_DBx__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
+SCSI_In_DBx__3__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
+SCSI_In_DBx__3__PS EQU CYREG_PRT6_PS\r
+SCSI_In_DBx__3__SHIFT EQU 6\r
+SCSI_In_DBx__3__SLW EQU CYREG_PRT6_SLW\r
+SCSI_In_DBx__4__AG EQU CYREG_PRT12_AG\r
+SCSI_In_DBx__4__BIE EQU CYREG_PRT12_BIE\r
+SCSI_In_DBx__4__BIT_MASK EQU CYREG_PRT12_BIT_MASK\r
+SCSI_In_DBx__4__BYP EQU CYREG_PRT12_BYP\r
+SCSI_In_DBx__4__DM0 EQU CYREG_PRT12_DM0\r
+SCSI_In_DBx__4__DM1 EQU CYREG_PRT12_DM1\r
+SCSI_In_DBx__4__DM2 EQU CYREG_PRT12_DM2\r
+SCSI_In_DBx__4__DR EQU CYREG_PRT12_DR\r
+SCSI_In_DBx__4__INP_DIS EQU CYREG_PRT12_INP_DIS\r
+SCSI_In_DBx__4__INTTYPE EQU CYREG_PICU12_INTTYPE5\r
+SCSI_In_DBx__4__MASK EQU 0x20\r
+SCSI_In_DBx__4__PC EQU CYREG_PRT12_PC5\r
+SCSI_In_DBx__4__PORT EQU 12\r
+SCSI_In_DBx__4__PRT EQU CYREG_PRT12_PRT\r
+SCSI_In_DBx__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN\r
+SCSI_In_DBx__4__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0\r
+SCSI_In_DBx__4__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1\r
+SCSI_In_DBx__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0\r
+SCSI_In_DBx__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1\r
+SCSI_In_DBx__4__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT\r
+SCSI_In_DBx__4__PS EQU CYREG_PRT12_PS\r
+SCSI_In_DBx__4__SHIFT EQU 5\r
+SCSI_In_DBx__4__SIO_CFG EQU CYREG_PRT12_SIO_CFG\r
+SCSI_In_DBx__4__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF\r
+SCSI_In_DBx__4__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN\r
+SCSI_In_DBx__4__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ\r
+SCSI_In_DBx__4__SLW EQU CYREG_PRT12_SLW\r
+SCSI_In_DBx__5__AG EQU CYREG_PRT12_AG\r
+SCSI_In_DBx__5__BIE EQU CYREG_PRT12_BIE\r
+SCSI_In_DBx__5__BIT_MASK EQU CYREG_PRT12_BIT_MASK\r
+SCSI_In_DBx__5__BYP EQU CYREG_PRT12_BYP\r
+SCSI_In_DBx__5__DM0 EQU CYREG_PRT12_DM0\r
+SCSI_In_DBx__5__DM1 EQU CYREG_PRT12_DM1\r
+SCSI_In_DBx__5__DM2 EQU CYREG_PRT12_DM2\r
+SCSI_In_DBx__5__DR EQU CYREG_PRT12_DR\r
+SCSI_In_DBx__5__INP_DIS EQU CYREG_PRT12_INP_DIS\r
+SCSI_In_DBx__5__INTTYPE EQU CYREG_PICU12_INTTYPE4\r
+SCSI_In_DBx__5__MASK EQU 0x10\r
+SCSI_In_DBx__5__PC EQU CYREG_PRT12_PC4\r
+SCSI_In_DBx__5__PORT EQU 12\r
+SCSI_In_DBx__5__PRT EQU CYREG_PRT12_PRT\r
+SCSI_In_DBx__5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN\r
+SCSI_In_DBx__5__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0\r
+SCSI_In_DBx__5__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1\r
+SCSI_In_DBx__5__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0\r
+SCSI_In_DBx__5__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1\r
+SCSI_In_DBx__5__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT\r
+SCSI_In_DBx__5__PS EQU CYREG_PRT12_PS\r
+SCSI_In_DBx__5__SHIFT EQU 4\r
+SCSI_In_DBx__5__SIO_CFG EQU CYREG_PRT12_SIO_CFG\r
+SCSI_In_DBx__5__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF\r
+SCSI_In_DBx__5__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN\r
+SCSI_In_DBx__5__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ\r
+SCSI_In_DBx__5__SLW EQU CYREG_PRT12_SLW\r
+SCSI_In_DBx__6__AG EQU CYREG_PRT2_AG\r
+SCSI_In_DBx__6__AMUX EQU CYREG_PRT2_AMUX\r
+SCSI_In_DBx__6__BIE EQU CYREG_PRT2_BIE\r
+SCSI_In_DBx__6__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
+SCSI_In_DBx__6__BYP EQU CYREG_PRT2_BYP\r
+SCSI_In_DBx__6__CTL EQU CYREG_PRT2_CTL\r
+SCSI_In_DBx__6__DM0 EQU CYREG_PRT2_DM0\r
+SCSI_In_DBx__6__DM1 EQU CYREG_PRT2_DM1\r
+SCSI_In_DBx__6__DM2 EQU CYREG_PRT2_DM2\r
+SCSI_In_DBx__6__DR EQU CYREG_PRT2_DR\r
+SCSI_In_DBx__6__INP_DIS EQU CYREG_PRT2_INP_DIS\r
+SCSI_In_DBx__6__INTTYPE EQU CYREG_PICU2_INTTYPE5\r
+SCSI_In_DBx__6__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
+SCSI_In_DBx__6__LCD_EN EQU CYREG_PRT2_LCD_EN\r
+SCSI_In_DBx__6__MASK EQU 0x20\r
+SCSI_In_DBx__6__PC EQU CYREG_PRT2_PC5\r
+SCSI_In_DBx__6__PORT EQU 2\r
+SCSI_In_DBx__6__PRT EQU CYREG_PRT2_PRT\r
+SCSI_In_DBx__6__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
+SCSI_In_DBx__6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
+SCSI_In_DBx__6__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
+SCSI_In_DBx__6__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
+SCSI_In_DBx__6__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
+SCSI_In_DBx__6__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
+SCSI_In_DBx__6__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
+SCSI_In_DBx__6__PS EQU CYREG_PRT2_PS\r
+SCSI_In_DBx__6__SHIFT EQU 5\r
+SCSI_In_DBx__6__SLW EQU CYREG_PRT2_SLW\r
+SCSI_In_DBx__7__AG EQU CYREG_PRT2_AG\r
+SCSI_In_DBx__7__AMUX EQU CYREG_PRT2_AMUX\r
+SCSI_In_DBx__7__BIE EQU CYREG_PRT2_BIE\r
+SCSI_In_DBx__7__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
+SCSI_In_DBx__7__BYP EQU CYREG_PRT2_BYP\r
+SCSI_In_DBx__7__CTL EQU CYREG_PRT2_CTL\r
+SCSI_In_DBx__7__DM0 EQU CYREG_PRT2_DM0\r
+SCSI_In_DBx__7__DM1 EQU CYREG_PRT2_DM1\r
+SCSI_In_DBx__7__DM2 EQU CYREG_PRT2_DM2\r
+SCSI_In_DBx__7__DR EQU CYREG_PRT2_DR\r
+SCSI_In_DBx__7__INP_DIS EQU CYREG_PRT2_INP_DIS\r
+SCSI_In_DBx__7__INTTYPE EQU CYREG_PICU2_INTTYPE4\r
+SCSI_In_DBx__7__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
+SCSI_In_DBx__7__LCD_EN EQU CYREG_PRT2_LCD_EN\r
+SCSI_In_DBx__7__MASK EQU 0x10\r
+SCSI_In_DBx__7__PC EQU CYREG_PRT2_PC4\r
+SCSI_In_DBx__7__PORT EQU 2\r
+SCSI_In_DBx__7__PRT EQU CYREG_PRT2_PRT\r
+SCSI_In_DBx__7__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
+SCSI_In_DBx__7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
+SCSI_In_DBx__7__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
+SCSI_In_DBx__7__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
+SCSI_In_DBx__7__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
+SCSI_In_DBx__7__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
+SCSI_In_DBx__7__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
+SCSI_In_DBx__7__PS EQU CYREG_PRT2_PS\r
+SCSI_In_DBx__7__SHIFT EQU 4\r
+SCSI_In_DBx__7__SLW EQU CYREG_PRT2_SLW\r
+SCSI_In_DBx__DB0__AG EQU CYREG_PRT5_AG\r
+SCSI_In_DBx__DB0__AMUX EQU CYREG_PRT5_AMUX\r
+SCSI_In_DBx__DB0__BIE EQU CYREG_PRT5_BIE\r
+SCSI_In_DBx__DB0__BIT_MASK EQU CYREG_PRT5_BIT_MASK\r
+SCSI_In_DBx__DB0__BYP EQU CYREG_PRT5_BYP\r
+SCSI_In_DBx__DB0__CTL EQU CYREG_PRT5_CTL\r
+SCSI_In_DBx__DB0__DM0 EQU CYREG_PRT5_DM0\r
+SCSI_In_DBx__DB0__DM1 EQU CYREG_PRT5_DM1\r
+SCSI_In_DBx__DB0__DM2 EQU CYREG_PRT5_DM2\r
+SCSI_In_DBx__DB0__DR EQU CYREG_PRT5_DR\r
+SCSI_In_DBx__DB0__INP_DIS EQU CYREG_PRT5_INP_DIS\r
+SCSI_In_DBx__DB0__INTTYPE EQU CYREG_PICU5_INTTYPE3\r
+SCSI_In_DBx__DB0__LCD_COM_SEG EQU CYREG_PRT5_LCD_COM_SEG\r
+SCSI_In_DBx__DB0__LCD_EN EQU CYREG_PRT5_LCD_EN\r
+SCSI_In_DBx__DB0__MASK EQU 0x08\r
+SCSI_In_DBx__DB0__PC EQU CYREG_PRT5_PC3\r
+SCSI_In_DBx__DB0__PORT EQU 5\r
+SCSI_In_DBx__DB0__PRT EQU CYREG_PRT5_PRT\r
+SCSI_In_DBx__DB0__PRTDSI__CAPS_SEL EQU CYREG_PRT5_CAPS_SEL\r
+SCSI_In_DBx__DB0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT5_DBL_SYNC_IN\r
+SCSI_In_DBx__DB0__PRTDSI__OE_SEL0 EQU CYREG_PRT5_OE_SEL0\r
+SCSI_In_DBx__DB0__PRTDSI__OE_SEL1 EQU CYREG_PRT5_OE_SEL1\r
+SCSI_In_DBx__DB0__PRTDSI__OUT_SEL0 EQU CYREG_PRT5_OUT_SEL0\r
+SCSI_In_DBx__DB0__PRTDSI__OUT_SEL1 EQU CYREG_PRT5_OUT_SEL1\r
+SCSI_In_DBx__DB0__PRTDSI__SYNC_OUT EQU CYREG_PRT5_SYNC_OUT\r
+SCSI_In_DBx__DB0__PS EQU CYREG_PRT5_PS\r
+SCSI_In_DBx__DB0__SHIFT EQU 3\r
+SCSI_In_DBx__DB0__SLW EQU CYREG_PRT5_SLW\r
+SCSI_In_DBx__DB1__AG EQU CYREG_PRT5_AG\r
+SCSI_In_DBx__DB1__AMUX EQU CYREG_PRT5_AMUX\r
+SCSI_In_DBx__DB1__BIE EQU CYREG_PRT5_BIE\r
+SCSI_In_DBx__DB1__BIT_MASK EQU CYREG_PRT5_BIT_MASK\r
+SCSI_In_DBx__DB1__BYP EQU CYREG_PRT5_BYP\r
+SCSI_In_DBx__DB1__CTL EQU CYREG_PRT5_CTL\r
+SCSI_In_DBx__DB1__DM0 EQU CYREG_PRT5_DM0\r
+SCSI_In_DBx__DB1__DM1 EQU CYREG_PRT5_DM1\r
+SCSI_In_DBx__DB1__DM2 EQU CYREG_PRT5_DM2\r
+SCSI_In_DBx__DB1__DR EQU CYREG_PRT5_DR\r
+SCSI_In_DBx__DB1__INP_DIS EQU CYREG_PRT5_INP_DIS\r
+SCSI_In_DBx__DB1__INTTYPE EQU CYREG_PICU5_INTTYPE2\r
+SCSI_In_DBx__DB1__LCD_COM_SEG EQU CYREG_PRT5_LCD_COM_SEG\r
+SCSI_In_DBx__DB1__LCD_EN EQU CYREG_PRT5_LCD_EN\r
+SCSI_In_DBx__DB1__MASK EQU 0x04\r
+SCSI_In_DBx__DB1__PC EQU CYREG_PRT5_PC2\r
+SCSI_In_DBx__DB1__PORT EQU 5\r
+SCSI_In_DBx__DB1__PRT EQU CYREG_PRT5_PRT\r
+SCSI_In_DBx__DB1__PRTDSI__CAPS_SEL EQU CYREG_PRT5_CAPS_SEL\r
+SCSI_In_DBx__DB1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT5_DBL_SYNC_IN\r
+SCSI_In_DBx__DB1__PRTDSI__OE_SEL0 EQU CYREG_PRT5_OE_SEL0\r
+SCSI_In_DBx__DB1__PRTDSI__OE_SEL1 EQU CYREG_PRT5_OE_SEL1\r
+SCSI_In_DBx__DB1__PRTDSI__OUT_SEL0 EQU CYREG_PRT5_OUT_SEL0\r
+SCSI_In_DBx__DB1__PRTDSI__OUT_SEL1 EQU CYREG_PRT5_OUT_SEL1\r
+SCSI_In_DBx__DB1__PRTDSI__SYNC_OUT EQU CYREG_PRT5_SYNC_OUT\r
+SCSI_In_DBx__DB1__PS EQU CYREG_PRT5_PS\r
+SCSI_In_DBx__DB1__SHIFT EQU 2\r
+SCSI_In_DBx__DB1__SLW EQU CYREG_PRT5_SLW\r
+SCSI_In_DBx__DB2__AG EQU CYREG_PRT6_AG\r
+SCSI_In_DBx__DB2__AMUX EQU CYREG_PRT6_AMUX\r
+SCSI_In_DBx__DB2__BIE EQU CYREG_PRT6_BIE\r
+SCSI_In_DBx__DB2__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
+SCSI_In_DBx__DB2__BYP EQU CYREG_PRT6_BYP\r
+SCSI_In_DBx__DB2__CTL EQU CYREG_PRT6_CTL\r
+SCSI_In_DBx__DB2__DM0 EQU CYREG_PRT6_DM0\r
+SCSI_In_DBx__DB2__DM1 EQU CYREG_PRT6_DM1\r
+SCSI_In_DBx__DB2__DM2 EQU CYREG_PRT6_DM2\r
+SCSI_In_DBx__DB2__DR EQU CYREG_PRT6_DR\r
+SCSI_In_DBx__DB2__INP_DIS EQU CYREG_PRT6_INP_DIS\r
+SCSI_In_DBx__DB2__INTTYPE EQU CYREG_PICU6_INTTYPE7\r
+SCSI_In_DBx__DB2__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
+SCSI_In_DBx__DB2__LCD_EN EQU CYREG_PRT6_LCD_EN\r
+SCSI_In_DBx__DB2__MASK EQU 0x80\r
+SCSI_In_DBx__DB2__PC EQU CYREG_PRT6_PC7\r
+SCSI_In_DBx__DB2__PORT EQU 6\r
+SCSI_In_DBx__DB2__PRT EQU CYREG_PRT6_PRT\r
+SCSI_In_DBx__DB2__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
+SCSI_In_DBx__DB2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
+SCSI_In_DBx__DB2__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
+SCSI_In_DBx__DB2__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
+SCSI_In_DBx__DB2__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
+SCSI_In_DBx__DB2__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
+SCSI_In_DBx__DB2__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
+SCSI_In_DBx__DB2__PS EQU CYREG_PRT6_PS\r
+SCSI_In_DBx__DB2__SHIFT EQU 7\r
+SCSI_In_DBx__DB2__SLW EQU CYREG_PRT6_SLW\r
+SCSI_In_DBx__DB3__AG EQU CYREG_PRT6_AG\r
+SCSI_In_DBx__DB3__AMUX EQU CYREG_PRT6_AMUX\r
+SCSI_In_DBx__DB3__BIE EQU CYREG_PRT6_BIE\r
+SCSI_In_DBx__DB3__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
+SCSI_In_DBx__DB3__BYP EQU CYREG_PRT6_BYP\r
+SCSI_In_DBx__DB3__CTL EQU CYREG_PRT6_CTL\r
+SCSI_In_DBx__DB3__DM0 EQU CYREG_PRT6_DM0\r
+SCSI_In_DBx__DB3__DM1 EQU CYREG_PRT6_DM1\r
+SCSI_In_DBx__DB3__DM2 EQU CYREG_PRT6_DM2\r
+SCSI_In_DBx__DB3__DR EQU CYREG_PRT6_DR\r
+SCSI_In_DBx__DB3__INP_DIS EQU CYREG_PRT6_INP_DIS\r
+SCSI_In_DBx__DB3__INTTYPE EQU CYREG_PICU6_INTTYPE6\r
+SCSI_In_DBx__DB3__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
+SCSI_In_DBx__DB3__LCD_EN EQU CYREG_PRT6_LCD_EN\r
+SCSI_In_DBx__DB3__MASK EQU 0x40\r
+SCSI_In_DBx__DB3__PC EQU CYREG_PRT6_PC6\r
+SCSI_In_DBx__DB3__PORT EQU 6\r
+SCSI_In_DBx__DB3__PRT EQU CYREG_PRT6_PRT\r
+SCSI_In_DBx__DB3__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
+SCSI_In_DBx__DB3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
+SCSI_In_DBx__DB3__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
+SCSI_In_DBx__DB3__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
+SCSI_In_DBx__DB3__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
+SCSI_In_DBx__DB3__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
+SCSI_In_DBx__DB3__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
+SCSI_In_DBx__DB3__PS EQU CYREG_PRT6_PS\r
+SCSI_In_DBx__DB3__SHIFT EQU 6\r
+SCSI_In_DBx__DB3__SLW EQU CYREG_PRT6_SLW\r
+SCSI_In_DBx__DB4__AG EQU CYREG_PRT12_AG\r
+SCSI_In_DBx__DB4__BIE EQU CYREG_PRT12_BIE\r
+SCSI_In_DBx__DB4__BIT_MASK EQU CYREG_PRT12_BIT_MASK\r
+SCSI_In_DBx__DB4__BYP EQU CYREG_PRT12_BYP\r
+SCSI_In_DBx__DB4__DM0 EQU CYREG_PRT12_DM0\r
+SCSI_In_DBx__DB4__DM1 EQU CYREG_PRT12_DM1\r
+SCSI_In_DBx__DB4__DM2 EQU CYREG_PRT12_DM2\r
+SCSI_In_DBx__DB4__DR EQU CYREG_PRT12_DR\r
+SCSI_In_DBx__DB4__INP_DIS EQU CYREG_PRT12_INP_DIS\r
+SCSI_In_DBx__DB4__INTTYPE EQU CYREG_PICU12_INTTYPE5\r
+SCSI_In_DBx__DB4__MASK EQU 0x20\r
+SCSI_In_DBx__DB4__PC EQU CYREG_PRT12_PC5\r
+SCSI_In_DBx__DB4__PORT EQU 12\r
+SCSI_In_DBx__DB4__PRT EQU CYREG_PRT12_PRT\r
+SCSI_In_DBx__DB4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN\r
+SCSI_In_DBx__DB4__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0\r
+SCSI_In_DBx__DB4__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1\r
+SCSI_In_DBx__DB4__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0\r
+SCSI_In_DBx__DB4__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1\r
+SCSI_In_DBx__DB4__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT\r
+SCSI_In_DBx__DB4__PS EQU CYREG_PRT12_PS\r
+SCSI_In_DBx__DB4__SHIFT EQU 5\r
+SCSI_In_DBx__DB4__SIO_CFG EQU CYREG_PRT12_SIO_CFG\r
+SCSI_In_DBx__DB4__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF\r
+SCSI_In_DBx__DB4__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN\r
+SCSI_In_DBx__DB4__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ\r
+SCSI_In_DBx__DB4__SLW EQU CYREG_PRT12_SLW\r
+SCSI_In_DBx__DB5__AG EQU CYREG_PRT12_AG\r
+SCSI_In_DBx__DB5__BIE EQU CYREG_PRT12_BIE\r
+SCSI_In_DBx__DB5__BIT_MASK EQU CYREG_PRT12_BIT_MASK\r
+SCSI_In_DBx__DB5__BYP EQU CYREG_PRT12_BYP\r
+SCSI_In_DBx__DB5__DM0 EQU CYREG_PRT12_DM0\r
+SCSI_In_DBx__DB5__DM1 EQU CYREG_PRT12_DM1\r
+SCSI_In_DBx__DB5__DM2 EQU CYREG_PRT12_DM2\r
+SCSI_In_DBx__DB5__DR EQU CYREG_PRT12_DR\r
+SCSI_In_DBx__DB5__INP_DIS EQU CYREG_PRT12_INP_DIS\r
+SCSI_In_DBx__DB5__INTTYPE EQU CYREG_PICU12_INTTYPE4\r
+SCSI_In_DBx__DB5__MASK EQU 0x10\r
+SCSI_In_DBx__DB5__PC EQU CYREG_PRT12_PC4\r
+SCSI_In_DBx__DB5__PORT EQU 12\r
+SCSI_In_DBx__DB5__PRT EQU CYREG_PRT12_PRT\r
+SCSI_In_DBx__DB5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN\r
+SCSI_In_DBx__DB5__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0\r
+SCSI_In_DBx__DB5__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1\r
+SCSI_In_DBx__DB5__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0\r
+SCSI_In_DBx__DB5__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1\r
+SCSI_In_DBx__DB5__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT\r
+SCSI_In_DBx__DB5__PS EQU CYREG_PRT12_PS\r
+SCSI_In_DBx__DB5__SHIFT EQU 4\r
+SCSI_In_DBx__DB5__SIO_CFG EQU CYREG_PRT12_SIO_CFG\r
+SCSI_In_DBx__DB5__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF\r
+SCSI_In_DBx__DB5__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN\r
+SCSI_In_DBx__DB5__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ\r
+SCSI_In_DBx__DB5__SLW EQU CYREG_PRT12_SLW\r
+SCSI_In_DBx__DB6__AG EQU CYREG_PRT2_AG\r
+SCSI_In_DBx__DB6__AMUX EQU CYREG_PRT2_AMUX\r
+SCSI_In_DBx__DB6__BIE EQU CYREG_PRT2_BIE\r
+SCSI_In_DBx__DB6__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
+SCSI_In_DBx__DB6__BYP EQU CYREG_PRT2_BYP\r
+SCSI_In_DBx__DB6__CTL EQU CYREG_PRT2_CTL\r
+SCSI_In_DBx__DB6__DM0 EQU CYREG_PRT2_DM0\r
+SCSI_In_DBx__DB6__DM1 EQU CYREG_PRT2_DM1\r
+SCSI_In_DBx__DB6__DM2 EQU CYREG_PRT2_DM2\r
+SCSI_In_DBx__DB6__DR EQU CYREG_PRT2_DR\r
+SCSI_In_DBx__DB6__INP_DIS EQU CYREG_PRT2_INP_DIS\r
+SCSI_In_DBx__DB6__INTTYPE EQU CYREG_PICU2_INTTYPE5\r
+SCSI_In_DBx__DB6__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
+SCSI_In_DBx__DB6__LCD_EN EQU CYREG_PRT2_LCD_EN\r
+SCSI_In_DBx__DB6__MASK EQU 0x20\r
+SCSI_In_DBx__DB6__PC EQU CYREG_PRT2_PC5\r
+SCSI_In_DBx__DB6__PORT EQU 2\r
+SCSI_In_DBx__DB6__PRT EQU CYREG_PRT2_PRT\r
+SCSI_In_DBx__DB6__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
+SCSI_In_DBx__DB6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
+SCSI_In_DBx__DB6__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
+SCSI_In_DBx__DB6__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
+SCSI_In_DBx__DB6__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
+SCSI_In_DBx__DB6__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
+SCSI_In_DBx__DB6__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
+SCSI_In_DBx__DB6__PS EQU CYREG_PRT2_PS\r
+SCSI_In_DBx__DB6__SHIFT EQU 5\r
+SCSI_In_DBx__DB6__SLW EQU CYREG_PRT2_SLW\r
+SCSI_In_DBx__DB7__AG EQU CYREG_PRT2_AG\r
+SCSI_In_DBx__DB7__AMUX EQU CYREG_PRT2_AMUX\r
+SCSI_In_DBx__DB7__BIE EQU CYREG_PRT2_BIE\r
+SCSI_In_DBx__DB7__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
+SCSI_In_DBx__DB7__BYP EQU CYREG_PRT2_BYP\r
+SCSI_In_DBx__DB7__CTL EQU CYREG_PRT2_CTL\r
+SCSI_In_DBx__DB7__DM0 EQU CYREG_PRT2_DM0\r
+SCSI_In_DBx__DB7__DM1 EQU CYREG_PRT2_DM1\r
+SCSI_In_DBx__DB7__DM2 EQU CYREG_PRT2_DM2\r
+SCSI_In_DBx__DB7__DR EQU CYREG_PRT2_DR\r
+SCSI_In_DBx__DB7__INP_DIS EQU CYREG_PRT2_INP_DIS\r
+SCSI_In_DBx__DB7__INTTYPE EQU CYREG_PICU2_INTTYPE4\r
+SCSI_In_DBx__DB7__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
+SCSI_In_DBx__DB7__LCD_EN EQU CYREG_PRT2_LCD_EN\r
+SCSI_In_DBx__DB7__MASK EQU 0x10\r
+SCSI_In_DBx__DB7__PC EQU CYREG_PRT2_PC4\r
+SCSI_In_DBx__DB7__PORT EQU 2\r
+SCSI_In_DBx__DB7__PRT EQU CYREG_PRT2_PRT\r
+SCSI_In_DBx__DB7__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
+SCSI_In_DBx__DB7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
+SCSI_In_DBx__DB7__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
+SCSI_In_DBx__DB7__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
+SCSI_In_DBx__DB7__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
+SCSI_In_DBx__DB7__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
+SCSI_In_DBx__DB7__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
+SCSI_In_DBx__DB7__PS EQU CYREG_PRT2_PS\r
+SCSI_In_DBx__DB7__SHIFT EQU 4\r
+SCSI_In_DBx__DB7__SLW EQU CYREG_PRT2_SLW\r
+\r
+; SD_MISO\r
+SD_MISO__0__INTTYPE EQU CYREG_PICU3_INTTYPE1\r
+SD_MISO__0__MASK EQU 0x02\r
+SD_MISO__0__PC EQU CYREG_PRT3_PC1\r
+SD_MISO__0__PORT EQU 3\r
+SD_MISO__0__SHIFT EQU 1\r
+SD_MISO__AG EQU CYREG_PRT3_AG\r
+SD_MISO__AMUX EQU CYREG_PRT3_AMUX\r
+SD_MISO__BIE EQU CYREG_PRT3_BIE\r
+SD_MISO__BIT_MASK EQU CYREG_PRT3_BIT_MASK\r
+SD_MISO__BYP EQU CYREG_PRT3_BYP\r
+SD_MISO__CTL EQU CYREG_PRT3_CTL\r
+SD_MISO__DM0 EQU CYREG_PRT3_DM0\r
+SD_MISO__DM1 EQU CYREG_PRT3_DM1\r
+SD_MISO__DM2 EQU CYREG_PRT3_DM2\r
+SD_MISO__DR EQU CYREG_PRT3_DR\r
+SD_MISO__INP_DIS EQU CYREG_PRT3_INP_DIS\r
+SD_MISO__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU3_BASE\r
+SD_MISO__LCD_COM_SEG EQU CYREG_PRT3_LCD_COM_SEG\r
+SD_MISO__LCD_EN EQU CYREG_PRT3_LCD_EN\r
+SD_MISO__MASK EQU 0x02\r
+SD_MISO__PORT EQU 3\r
+SD_MISO__PRT EQU CYREG_PRT3_PRT\r
+SD_MISO__PRTDSI__CAPS_SEL EQU CYREG_PRT3_CAPS_SEL\r
+SD_MISO__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT3_DBL_SYNC_IN\r
+SD_MISO__PRTDSI__OE_SEL0 EQU CYREG_PRT3_OE_SEL0\r
+SD_MISO__PRTDSI__OE_SEL1 EQU CYREG_PRT3_OE_SEL1\r
+SD_MISO__PRTDSI__OUT_SEL0 EQU CYREG_PRT3_OUT_SEL0\r
+SD_MISO__PRTDSI__OUT_SEL1 EQU CYREG_PRT3_OUT_SEL1\r
+SD_MISO__PRTDSI__SYNC_OUT EQU CYREG_PRT3_SYNC_OUT\r
+SD_MISO__PS EQU CYREG_PRT3_PS\r
+SD_MISO__SHIFT EQU 1\r
+SD_MISO__SLW EQU CYREG_PRT3_SLW\r
+\r
+; SD_MOSI\r
+SD_MOSI__0__INTTYPE EQU CYREG_PICU3_INTTYPE3\r
+SD_MOSI__0__MASK EQU 0x08\r
+SD_MOSI__0__PC EQU CYREG_PRT3_PC3\r
+SD_MOSI__0__PORT EQU 3\r
+SD_MOSI__0__SHIFT EQU 3\r
+SD_MOSI__AG EQU CYREG_PRT3_AG\r
+SD_MOSI__AMUX EQU CYREG_PRT3_AMUX\r
+SD_MOSI__BIE EQU CYREG_PRT3_BIE\r
+SD_MOSI__BIT_MASK EQU CYREG_PRT3_BIT_MASK\r
+SD_MOSI__BYP EQU CYREG_PRT3_BYP\r
+SD_MOSI__CTL EQU CYREG_PRT3_CTL\r
+SD_MOSI__DM0 EQU CYREG_PRT3_DM0\r
+SD_MOSI__DM1 EQU CYREG_PRT3_DM1\r
+SD_MOSI__DM2 EQU CYREG_PRT3_DM2\r
+SD_MOSI__DR EQU CYREG_PRT3_DR\r
+SD_MOSI__INP_DIS EQU CYREG_PRT3_INP_DIS\r
+SD_MOSI__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU3_BASE\r
+SD_MOSI__LCD_COM_SEG EQU CYREG_PRT3_LCD_COM_SEG\r
+SD_MOSI__LCD_EN EQU CYREG_PRT3_LCD_EN\r
+SD_MOSI__MASK EQU 0x08\r
+SD_MOSI__PORT EQU 3\r
+SD_MOSI__PRT EQU CYREG_PRT3_PRT\r
+SD_MOSI__PRTDSI__CAPS_SEL EQU CYREG_PRT3_CAPS_SEL\r
+SD_MOSI__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT3_DBL_SYNC_IN\r
+SD_MOSI__PRTDSI__OE_SEL0 EQU CYREG_PRT3_OE_SEL0\r
+SD_MOSI__PRTDSI__OE_SEL1 EQU CYREG_PRT3_OE_SEL1\r
+SD_MOSI__PRTDSI__OUT_SEL0 EQU CYREG_PRT3_OUT_SEL0\r
+SD_MOSI__PRTDSI__OUT_SEL1 EQU CYREG_PRT3_OUT_SEL1\r
+SD_MOSI__PRTDSI__SYNC_OUT EQU CYREG_PRT3_SYNC_OUT\r
+SD_MOSI__PS EQU CYREG_PRT3_PS\r
+SD_MOSI__SHIFT EQU 3\r
+SD_MOSI__SLW EQU CYREG_PRT3_SLW\r
+\r
+; SCSI_CLK\r
+SCSI_CLK__CFG0 EQU CYREG_CLKDIST_DCFG1_CFG0\r
+SCSI_CLK__CFG1 EQU CYREG_CLKDIST_DCFG1_CFG1\r
+SCSI_CLK__CFG2 EQU CYREG_CLKDIST_DCFG1_CFG2\r
+SCSI_CLK__CFG2_SRC_SEL_MASK EQU 0x07\r
+SCSI_CLK__INDEX EQU 0x01\r
+SCSI_CLK__PM_ACT_CFG EQU CYREG_PM_ACT_CFG2\r
+SCSI_CLK__PM_ACT_MSK EQU 0x02\r
+SCSI_CLK__PM_STBY_CFG EQU CYREG_PM_STBY_CFG2\r
+SCSI_CLK__PM_STBY_MSK EQU 0x02\r
+\r
+; SCSI_Out\r
+SCSI_Out__0__AG EQU CYREG_PRT15_AG\r
+SCSI_Out__0__AMUX EQU CYREG_PRT15_AMUX\r
+SCSI_Out__0__BIE EQU CYREG_PRT15_BIE\r
+SCSI_Out__0__BIT_MASK EQU CYREG_PRT15_BIT_MASK\r
+SCSI_Out__0__BYP EQU CYREG_PRT15_BYP\r
+SCSI_Out__0__CTL EQU CYREG_PRT15_CTL\r
+SCSI_Out__0__DM0 EQU CYREG_PRT15_DM0\r
+SCSI_Out__0__DM1 EQU CYREG_PRT15_DM1\r
+SCSI_Out__0__DM2 EQU CYREG_PRT15_DM2\r
+SCSI_Out__0__DR EQU CYREG_PRT15_DR\r
+SCSI_Out__0__INP_DIS EQU CYREG_PRT15_INP_DIS\r
+SCSI_Out__0__INTTYPE EQU CYREG_PICU15_INTTYPE5\r
+SCSI_Out__0__LCD_COM_SEG EQU CYREG_PRT15_LCD_COM_SEG\r
+SCSI_Out__0__LCD_EN EQU CYREG_PRT15_LCD_EN\r
+SCSI_Out__0__MASK EQU 0x20\r
+SCSI_Out__0__PC EQU CYREG_IO_PC_PRT15_PC5\r
+SCSI_Out__0__PORT EQU 15\r
+SCSI_Out__0__PRT EQU CYREG_PRT15_PRT\r
+SCSI_Out__0__PRTDSI__CAPS_SEL EQU CYREG_PRT15_CAPS_SEL\r
+SCSI_Out__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT15_DBL_SYNC_IN\r
+SCSI_Out__0__PRTDSI__OE_SEL0 EQU CYREG_PRT15_OE_SEL0\r
+SCSI_Out__0__PRTDSI__OE_SEL1 EQU CYREG_PRT15_OE_SEL1\r
+SCSI_Out__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT15_OUT_SEL0\r
+SCSI_Out__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT15_OUT_SEL1\r
+SCSI_Out__0__PRTDSI__SYNC_OUT EQU CYREG_PRT15_SYNC_OUT\r
+SCSI_Out__0__PS EQU CYREG_PRT15_PS\r
+SCSI_Out__0__SHIFT EQU 5\r
+SCSI_Out__0__SLW EQU CYREG_PRT15_SLW\r
+SCSI_Out__1__AG EQU CYREG_PRT15_AG\r
+SCSI_Out__1__AMUX EQU CYREG_PRT15_AMUX\r
+SCSI_Out__1__BIE EQU CYREG_PRT15_BIE\r
+SCSI_Out__1__BIT_MASK EQU CYREG_PRT15_BIT_MASK\r
+SCSI_Out__1__BYP EQU CYREG_PRT15_BYP\r
+SCSI_Out__1__CTL EQU CYREG_PRT15_CTL\r
+SCSI_Out__1__DM0 EQU CYREG_PRT15_DM0\r
+SCSI_Out__1__DM1 EQU CYREG_PRT15_DM1\r
+SCSI_Out__1__DM2 EQU CYREG_PRT15_DM2\r
+SCSI_Out__1__DR EQU CYREG_PRT15_DR\r
+SCSI_Out__1__INP_DIS EQU CYREG_PRT15_INP_DIS\r
+SCSI_Out__1__INTTYPE EQU CYREG_PICU15_INTTYPE4\r
+SCSI_Out__1__LCD_COM_SEG EQU CYREG_PRT15_LCD_COM_SEG\r
+SCSI_Out__1__LCD_EN EQU CYREG_PRT15_LCD_EN\r
+SCSI_Out__1__MASK EQU 0x10\r
+SCSI_Out__1__PC EQU CYREG_IO_PC_PRT15_PC4\r
+SCSI_Out__1__PORT EQU 15\r
+SCSI_Out__1__PRT EQU CYREG_PRT15_PRT\r
+SCSI_Out__1__PRTDSI__CAPS_SEL EQU CYREG_PRT15_CAPS_SEL\r
+SCSI_Out__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT15_DBL_SYNC_IN\r
+SCSI_Out__1__PRTDSI__OE_SEL0 EQU CYREG_PRT15_OE_SEL0\r
+SCSI_Out__1__PRTDSI__OE_SEL1 EQU CYREG_PRT15_OE_SEL1\r
+SCSI_Out__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT15_OUT_SEL0\r
+SCSI_Out__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT15_OUT_SEL1\r
+SCSI_Out__1__PRTDSI__SYNC_OUT EQU CYREG_PRT15_SYNC_OUT\r
+SCSI_Out__1__PS EQU CYREG_PRT15_PS\r
+SCSI_Out__1__SHIFT EQU 4\r
+SCSI_Out__1__SLW EQU CYREG_PRT15_SLW\r
+SCSI_Out__2__AG EQU CYREG_PRT6_AG\r
+SCSI_Out__2__AMUX EQU CYREG_PRT6_AMUX\r
+SCSI_Out__2__BIE EQU CYREG_PRT6_BIE\r
+SCSI_Out__2__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
+SCSI_Out__2__BYP EQU CYREG_PRT6_BYP\r
+SCSI_Out__2__CTL EQU CYREG_PRT6_CTL\r
+SCSI_Out__2__DM0 EQU CYREG_PRT6_DM0\r
+SCSI_Out__2__DM1 EQU CYREG_PRT6_DM1\r
+SCSI_Out__2__DM2 EQU CYREG_PRT6_DM2\r
+SCSI_Out__2__DR EQU CYREG_PRT6_DR\r
+SCSI_Out__2__INP_DIS EQU CYREG_PRT6_INP_DIS\r
+SCSI_Out__2__INTTYPE EQU CYREG_PICU6_INTTYPE1\r
+SCSI_Out__2__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
+SCSI_Out__2__LCD_EN EQU CYREG_PRT6_LCD_EN\r
+SCSI_Out__2__MASK EQU 0x02\r
+SCSI_Out__2__PC EQU CYREG_PRT6_PC1\r
+SCSI_Out__2__PORT EQU 6\r
+SCSI_Out__2__PRT EQU CYREG_PRT6_PRT\r
+SCSI_Out__2__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
+SCSI_Out__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
+SCSI_Out__2__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
+SCSI_Out__2__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
+SCSI_Out__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
+SCSI_Out__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
+SCSI_Out__2__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
+SCSI_Out__2__PS EQU CYREG_PRT6_PS\r
+SCSI_Out__2__SHIFT EQU 1\r
+SCSI_Out__2__SLW EQU CYREG_PRT6_SLW\r
+SCSI_Out__3__AG EQU CYREG_PRT6_AG\r
+SCSI_Out__3__AMUX EQU CYREG_PRT6_AMUX\r
+SCSI_Out__3__BIE EQU CYREG_PRT6_BIE\r
+SCSI_Out__3__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
+SCSI_Out__3__BYP EQU CYREG_PRT6_BYP\r
+SCSI_Out__3__CTL EQU CYREG_PRT6_CTL\r
+SCSI_Out__3__DM0 EQU CYREG_PRT6_DM0\r
+SCSI_Out__3__DM1 EQU CYREG_PRT6_DM1\r
+SCSI_Out__3__DM2 EQU CYREG_PRT6_DM2\r
+SCSI_Out__3__DR EQU CYREG_PRT6_DR\r
+SCSI_Out__3__INP_DIS EQU CYREG_PRT6_INP_DIS\r
+SCSI_Out__3__INTTYPE EQU CYREG_PICU6_INTTYPE0\r
+SCSI_Out__3__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
+SCSI_Out__3__LCD_EN EQU CYREG_PRT6_LCD_EN\r
+SCSI_Out__3__MASK EQU 0x01\r
+SCSI_Out__3__PC EQU CYREG_PRT6_PC0\r
+SCSI_Out__3__PORT EQU 6\r
+SCSI_Out__3__PRT EQU CYREG_PRT6_PRT\r
+SCSI_Out__3__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
+SCSI_Out__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
+SCSI_Out__3__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
+SCSI_Out__3__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
+SCSI_Out__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
+SCSI_Out__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
+SCSI_Out__3__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
+SCSI_Out__3__PS EQU CYREG_PRT6_PS\r
+SCSI_Out__3__SHIFT EQU 0\r
+SCSI_Out__3__SLW EQU CYREG_PRT6_SLW\r
+SCSI_Out__4__AG EQU CYREG_PRT4_AG\r
+SCSI_Out__4__AMUX EQU CYREG_PRT4_AMUX\r
+SCSI_Out__4__BIE EQU CYREG_PRT4_BIE\r
+SCSI_Out__4__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
+SCSI_Out__4__BYP EQU CYREG_PRT4_BYP\r
+SCSI_Out__4__CTL EQU CYREG_PRT4_CTL\r
+SCSI_Out__4__DM0 EQU CYREG_PRT4_DM0\r
+SCSI_Out__4__DM1 EQU CYREG_PRT4_DM1\r
+SCSI_Out__4__DM2 EQU CYREG_PRT4_DM2\r
+SCSI_Out__4__DR EQU CYREG_PRT4_DR\r
+SCSI_Out__4__INP_DIS EQU CYREG_PRT4_INP_DIS\r
+SCSI_Out__4__INTTYPE EQU CYREG_PICU4_INTTYPE5\r
+SCSI_Out__4__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
+SCSI_Out__4__LCD_EN EQU CYREG_PRT4_LCD_EN\r
+SCSI_Out__4__MASK EQU 0x20\r
+SCSI_Out__4__PC EQU CYREG_PRT4_PC5\r
+SCSI_Out__4__PORT EQU 4\r
+SCSI_Out__4__PRT EQU CYREG_PRT4_PRT\r
+SCSI_Out__4__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
+SCSI_Out__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
+SCSI_Out__4__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
+SCSI_Out__4__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
+SCSI_Out__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
+SCSI_Out__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
+SCSI_Out__4__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
+SCSI_Out__4__PS EQU CYREG_PRT4_PS\r
+SCSI_Out__4__SHIFT EQU 5\r
+SCSI_Out__4__SLW EQU CYREG_PRT4_SLW\r
+SCSI_Out__5__AG EQU CYREG_PRT4_AG\r
+SCSI_Out__5__AMUX EQU CYREG_PRT4_AMUX\r
+SCSI_Out__5__BIE EQU CYREG_PRT4_BIE\r
+SCSI_Out__5__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
+SCSI_Out__5__BYP EQU CYREG_PRT4_BYP\r
+SCSI_Out__5__CTL EQU CYREG_PRT4_CTL\r
+SCSI_Out__5__DM0 EQU CYREG_PRT4_DM0\r
+SCSI_Out__5__DM1 EQU CYREG_PRT4_DM1\r
+SCSI_Out__5__DM2 EQU CYREG_PRT4_DM2\r
+SCSI_Out__5__DR EQU CYREG_PRT4_DR\r
+SCSI_Out__5__INP_DIS EQU CYREG_PRT4_INP_DIS\r
+SCSI_Out__5__INTTYPE EQU CYREG_PICU4_INTTYPE4\r
+SCSI_Out__5__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
+SCSI_Out__5__LCD_EN EQU CYREG_PRT4_LCD_EN\r
+SCSI_Out__5__MASK EQU 0x10\r
+SCSI_Out__5__PC EQU CYREG_PRT4_PC4\r
+SCSI_Out__5__PORT EQU 4\r
+SCSI_Out__5__PRT EQU CYREG_PRT4_PRT\r
+SCSI_Out__5__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
+SCSI_Out__5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
+SCSI_Out__5__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
+SCSI_Out__5__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
+SCSI_Out__5__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
+SCSI_Out__5__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
+SCSI_Out__5__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
+SCSI_Out__5__PS EQU CYREG_PRT4_PS\r
+SCSI_Out__5__SHIFT EQU 4\r
+SCSI_Out__5__SLW EQU CYREG_PRT4_SLW\r
+SCSI_Out__6__AG EQU CYREG_PRT0_AG\r
+SCSI_Out__6__AMUX EQU CYREG_PRT0_AMUX\r
+SCSI_Out__6__BIE EQU CYREG_PRT0_BIE\r
+SCSI_Out__6__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
+SCSI_Out__6__BYP EQU CYREG_PRT0_BYP\r
+SCSI_Out__6__CTL EQU CYREG_PRT0_CTL\r
+SCSI_Out__6__DM0 EQU CYREG_PRT0_DM0\r
+SCSI_Out__6__DM1 EQU CYREG_PRT0_DM1\r
+SCSI_Out__6__DM2 EQU CYREG_PRT0_DM2\r
+SCSI_Out__6__DR EQU CYREG_PRT0_DR\r
+SCSI_Out__6__INP_DIS EQU CYREG_PRT0_INP_DIS\r
+SCSI_Out__6__INTTYPE EQU CYREG_PICU0_INTTYPE7\r
+SCSI_Out__6__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
+SCSI_Out__6__LCD_EN EQU CYREG_PRT0_LCD_EN\r
+SCSI_Out__6__MASK EQU 0x80\r
+SCSI_Out__6__PC EQU CYREG_PRT0_PC7\r
+SCSI_Out__6__PORT EQU 0\r
+SCSI_Out__6__PRT EQU CYREG_PRT0_PRT\r
+SCSI_Out__6__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
+SCSI_Out__6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
+SCSI_Out__6__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
+SCSI_Out__6__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
+SCSI_Out__6__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
+SCSI_Out__6__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
+SCSI_Out__6__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
+SCSI_Out__6__PS EQU CYREG_PRT0_PS\r
+SCSI_Out__6__SHIFT EQU 7\r
+SCSI_Out__6__SLW EQU CYREG_PRT0_SLW\r
+SCSI_Out__7__AG EQU CYREG_PRT0_AG\r
+SCSI_Out__7__AMUX EQU CYREG_PRT0_AMUX\r
+SCSI_Out__7__BIE EQU CYREG_PRT0_BIE\r
+SCSI_Out__7__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
+SCSI_Out__7__BYP EQU CYREG_PRT0_BYP\r
+SCSI_Out__7__CTL EQU CYREG_PRT0_CTL\r
+SCSI_Out__7__DM0 EQU CYREG_PRT0_DM0\r
+SCSI_Out__7__DM1 EQU CYREG_PRT0_DM1\r
+SCSI_Out__7__DM2 EQU CYREG_PRT0_DM2\r
+SCSI_Out__7__DR EQU CYREG_PRT0_DR\r
+SCSI_Out__7__INP_DIS EQU CYREG_PRT0_INP_DIS\r
+SCSI_Out__7__INTTYPE EQU CYREG_PICU0_INTTYPE6\r
+SCSI_Out__7__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
+SCSI_Out__7__LCD_EN EQU CYREG_PRT0_LCD_EN\r
+SCSI_Out__7__MASK EQU 0x40\r
+SCSI_Out__7__PC EQU CYREG_PRT0_PC6\r
+SCSI_Out__7__PORT EQU 0\r
+SCSI_Out__7__PRT EQU CYREG_PRT0_PRT\r
+SCSI_Out__7__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
+SCSI_Out__7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
+SCSI_Out__7__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
+SCSI_Out__7__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
+SCSI_Out__7__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
+SCSI_Out__7__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
+SCSI_Out__7__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
+SCSI_Out__7__PS EQU CYREG_PRT0_PS\r
+SCSI_Out__7__SHIFT EQU 6\r
+SCSI_Out__7__SLW EQU CYREG_PRT0_SLW\r
+SCSI_Out__8__AG EQU CYREG_PRT0_AG\r
+SCSI_Out__8__AMUX EQU CYREG_PRT0_AMUX\r
+SCSI_Out__8__BIE EQU CYREG_PRT0_BIE\r
+SCSI_Out__8__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
+SCSI_Out__8__BYP EQU CYREG_PRT0_BYP\r
+SCSI_Out__8__CTL EQU CYREG_PRT0_CTL\r
+SCSI_Out__8__DM0 EQU CYREG_PRT0_DM0\r
+SCSI_Out__8__DM1 EQU CYREG_PRT0_DM1\r
+SCSI_Out__8__DM2 EQU CYREG_PRT0_DM2\r
+SCSI_Out__8__DR EQU CYREG_PRT0_DR\r
+SCSI_Out__8__INP_DIS EQU CYREG_PRT0_INP_DIS\r
+SCSI_Out__8__INTTYPE EQU CYREG_PICU0_INTTYPE3\r
+SCSI_Out__8__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
+SCSI_Out__8__LCD_EN EQU CYREG_PRT0_LCD_EN\r
+SCSI_Out__8__MASK EQU 0x08\r
+SCSI_Out__8__PC EQU CYREG_PRT0_PC3\r
+SCSI_Out__8__PORT EQU 0\r
+SCSI_Out__8__PRT EQU CYREG_PRT0_PRT\r
+SCSI_Out__8__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
+SCSI_Out__8__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
+SCSI_Out__8__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
+SCSI_Out__8__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
+SCSI_Out__8__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
+SCSI_Out__8__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
+SCSI_Out__8__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
+SCSI_Out__8__PS EQU CYREG_PRT0_PS\r
+SCSI_Out__8__SHIFT EQU 3\r
+SCSI_Out__8__SLW EQU CYREG_PRT0_SLW\r
+SCSI_Out__9__AG EQU CYREG_PRT0_AG\r
+SCSI_Out__9__AMUX EQU CYREG_PRT0_AMUX\r
+SCSI_Out__9__BIE EQU CYREG_PRT0_BIE\r
+SCSI_Out__9__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
+SCSI_Out__9__BYP EQU CYREG_PRT0_BYP\r
+SCSI_Out__9__CTL EQU CYREG_PRT0_CTL\r
+SCSI_Out__9__DM0 EQU CYREG_PRT0_DM0\r
+SCSI_Out__9__DM1 EQU CYREG_PRT0_DM1\r
+SCSI_Out__9__DM2 EQU CYREG_PRT0_DM2\r
+SCSI_Out__9__DR EQU CYREG_PRT0_DR\r
+SCSI_Out__9__INP_DIS EQU CYREG_PRT0_INP_DIS\r
+SCSI_Out__9__INTTYPE EQU CYREG_PICU0_INTTYPE2\r
+SCSI_Out__9__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
+SCSI_Out__9__LCD_EN EQU CYREG_PRT0_LCD_EN\r
+SCSI_Out__9__MASK EQU 0x04\r
+SCSI_Out__9__PC EQU CYREG_PRT0_PC2\r
+SCSI_Out__9__PORT EQU 0\r
+SCSI_Out__9__PRT EQU CYREG_PRT0_PRT\r
+SCSI_Out__9__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
+SCSI_Out__9__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
+SCSI_Out__9__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
+SCSI_Out__9__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
+SCSI_Out__9__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
+SCSI_Out__9__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
+SCSI_Out__9__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
+SCSI_Out__9__PS EQU CYREG_PRT0_PS\r
+SCSI_Out__9__SHIFT EQU 2\r
+SCSI_Out__9__SLW EQU CYREG_PRT0_SLW\r
+SCSI_Out__ACK__AG EQU CYREG_PRT6_AG\r
+SCSI_Out__ACK__AMUX EQU CYREG_PRT6_AMUX\r
+SCSI_Out__ACK__BIE EQU CYREG_PRT6_BIE\r
+SCSI_Out__ACK__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
+SCSI_Out__ACK__BYP EQU CYREG_PRT6_BYP\r
+SCSI_Out__ACK__CTL EQU CYREG_PRT6_CTL\r
+SCSI_Out__ACK__DM0 EQU CYREG_PRT6_DM0\r
+SCSI_Out__ACK__DM1 EQU CYREG_PRT6_DM1\r
+SCSI_Out__ACK__DM2 EQU CYREG_PRT6_DM2\r
+SCSI_Out__ACK__DR EQU CYREG_PRT6_DR\r
+SCSI_Out__ACK__INP_DIS EQU CYREG_PRT6_INP_DIS\r
+SCSI_Out__ACK__INTTYPE EQU CYREG_PICU6_INTTYPE0\r
+SCSI_Out__ACK__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
+SCSI_Out__ACK__LCD_EN EQU CYREG_PRT6_LCD_EN\r
+SCSI_Out__ACK__MASK EQU 0x01\r
+SCSI_Out__ACK__PC EQU CYREG_PRT6_PC0\r
+SCSI_Out__ACK__PORT EQU 6\r
+SCSI_Out__ACK__PRT EQU CYREG_PRT6_PRT\r
+SCSI_Out__ACK__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
+SCSI_Out__ACK__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
+SCSI_Out__ACK__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
+SCSI_Out__ACK__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
+SCSI_Out__ACK__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
+SCSI_Out__ACK__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
+SCSI_Out__ACK__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
+SCSI_Out__ACK__PS EQU CYREG_PRT6_PS\r
+SCSI_Out__ACK__SHIFT EQU 0\r
+SCSI_Out__ACK__SLW EQU CYREG_PRT6_SLW\r
+SCSI_Out__ATN__AG EQU CYREG_PRT15_AG\r
+SCSI_Out__ATN__AMUX EQU CYREG_PRT15_AMUX\r
+SCSI_Out__ATN__BIE EQU CYREG_PRT15_BIE\r
+SCSI_Out__ATN__BIT_MASK EQU CYREG_PRT15_BIT_MASK\r
+SCSI_Out__ATN__BYP EQU CYREG_PRT15_BYP\r
+SCSI_Out__ATN__CTL EQU CYREG_PRT15_CTL\r
+SCSI_Out__ATN__DM0 EQU CYREG_PRT15_DM0\r
+SCSI_Out__ATN__DM1 EQU CYREG_PRT15_DM1\r
+SCSI_Out__ATN__DM2 EQU CYREG_PRT15_DM2\r
+SCSI_Out__ATN__DR EQU CYREG_PRT15_DR\r
+SCSI_Out__ATN__INP_DIS EQU CYREG_PRT15_INP_DIS\r
+SCSI_Out__ATN__INTTYPE EQU CYREG_PICU15_INTTYPE4\r
+SCSI_Out__ATN__LCD_COM_SEG EQU CYREG_PRT15_LCD_COM_SEG\r
+SCSI_Out__ATN__LCD_EN EQU CYREG_PRT15_LCD_EN\r
+SCSI_Out__ATN__MASK EQU 0x10\r
+SCSI_Out__ATN__PC EQU CYREG_IO_PC_PRT15_PC4\r
+SCSI_Out__ATN__PORT EQU 15\r
+SCSI_Out__ATN__PRT EQU CYREG_PRT15_PRT\r
+SCSI_Out__ATN__PRTDSI__CAPS_SEL EQU CYREG_PRT15_CAPS_SEL\r
+SCSI_Out__ATN__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT15_DBL_SYNC_IN\r
+SCSI_Out__ATN__PRTDSI__OE_SEL0 EQU CYREG_PRT15_OE_SEL0\r
+SCSI_Out__ATN__PRTDSI__OE_SEL1 EQU CYREG_PRT15_OE_SEL1\r
+SCSI_Out__ATN__PRTDSI__OUT_SEL0 EQU CYREG_PRT15_OUT_SEL0\r
+SCSI_Out__ATN__PRTDSI__OUT_SEL1 EQU CYREG_PRT15_OUT_SEL1\r
+SCSI_Out__ATN__PRTDSI__SYNC_OUT EQU CYREG_PRT15_SYNC_OUT\r
+SCSI_Out__ATN__PS EQU CYREG_PRT15_PS\r
+SCSI_Out__ATN__SHIFT EQU 4\r
+SCSI_Out__ATN__SLW EQU CYREG_PRT15_SLW\r
+SCSI_Out__BSY__AG EQU CYREG_PRT6_AG\r
+SCSI_Out__BSY__AMUX EQU CYREG_PRT6_AMUX\r
+SCSI_Out__BSY__BIE EQU CYREG_PRT6_BIE\r
+SCSI_Out__BSY__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
+SCSI_Out__BSY__BYP EQU CYREG_PRT6_BYP\r
+SCSI_Out__BSY__CTL EQU CYREG_PRT6_CTL\r
+SCSI_Out__BSY__DM0 EQU CYREG_PRT6_DM0\r
+SCSI_Out__BSY__DM1 EQU CYREG_PRT6_DM1\r
+SCSI_Out__BSY__DM2 EQU CYREG_PRT6_DM2\r
+SCSI_Out__BSY__DR EQU CYREG_PRT6_DR\r
+SCSI_Out__BSY__INP_DIS EQU CYREG_PRT6_INP_DIS\r
+SCSI_Out__BSY__INTTYPE EQU CYREG_PICU6_INTTYPE1\r
+SCSI_Out__BSY__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
+SCSI_Out__BSY__LCD_EN EQU CYREG_PRT6_LCD_EN\r
+SCSI_Out__BSY__MASK EQU 0x02\r
+SCSI_Out__BSY__PC EQU CYREG_PRT6_PC1\r
+SCSI_Out__BSY__PORT EQU 6\r
+SCSI_Out__BSY__PRT EQU CYREG_PRT6_PRT\r
+SCSI_Out__BSY__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
+SCSI_Out__BSY__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
+SCSI_Out__BSY__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
+SCSI_Out__BSY__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
+SCSI_Out__BSY__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
+SCSI_Out__BSY__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
+SCSI_Out__BSY__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
+SCSI_Out__BSY__PS EQU CYREG_PRT6_PS\r
+SCSI_Out__BSY__SHIFT EQU 1\r
+SCSI_Out__BSY__SLW EQU CYREG_PRT6_SLW\r
+SCSI_Out__CD_raw__AG EQU CYREG_PRT0_AG\r
+SCSI_Out__CD_raw__AMUX EQU CYREG_PRT0_AMUX\r
+SCSI_Out__CD_raw__BIE EQU CYREG_PRT0_BIE\r
+SCSI_Out__CD_raw__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
+SCSI_Out__CD_raw__BYP EQU CYREG_PRT0_BYP\r
+SCSI_Out__CD_raw__CTL EQU CYREG_PRT0_CTL\r
+SCSI_Out__CD_raw__DM0 EQU CYREG_PRT0_DM0\r
+SCSI_Out__CD_raw__DM1 EQU CYREG_PRT0_DM1\r
+SCSI_Out__CD_raw__DM2 EQU CYREG_PRT0_DM2\r
+SCSI_Out__CD_raw__DR EQU CYREG_PRT0_DR\r
+SCSI_Out__CD_raw__INP_DIS EQU CYREG_PRT0_INP_DIS\r
+SCSI_Out__CD_raw__INTTYPE EQU CYREG_PICU0_INTTYPE6\r
+SCSI_Out__CD_raw__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
+SCSI_Out__CD_raw__LCD_EN EQU CYREG_PRT0_LCD_EN\r
+SCSI_Out__CD_raw__MASK EQU 0x40\r
+SCSI_Out__CD_raw__PC EQU CYREG_PRT0_PC6\r
+SCSI_Out__CD_raw__PORT EQU 0\r
+SCSI_Out__CD_raw__PRT EQU CYREG_PRT0_PRT\r
+SCSI_Out__CD_raw__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
+SCSI_Out__CD_raw__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
+SCSI_Out__CD_raw__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
+SCSI_Out__CD_raw__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
+SCSI_Out__CD_raw__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
+SCSI_Out__CD_raw__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
+SCSI_Out__CD_raw__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
+SCSI_Out__CD_raw__PS EQU CYREG_PRT0_PS\r
+SCSI_Out__CD_raw__SHIFT EQU 6\r
+SCSI_Out__CD_raw__SLW EQU CYREG_PRT0_SLW\r
+SCSI_Out__DBP_raw__AG EQU CYREG_PRT15_AG\r
+SCSI_Out__DBP_raw__AMUX EQU CYREG_PRT15_AMUX\r
+SCSI_Out__DBP_raw__BIE EQU CYREG_PRT15_BIE\r
+SCSI_Out__DBP_raw__BIT_MASK EQU CYREG_PRT15_BIT_MASK\r
+SCSI_Out__DBP_raw__BYP EQU CYREG_PRT15_BYP\r
+SCSI_Out__DBP_raw__CTL EQU CYREG_PRT15_CTL\r
+SCSI_Out__DBP_raw__DM0 EQU CYREG_PRT15_DM0\r
+SCSI_Out__DBP_raw__DM1 EQU CYREG_PRT15_DM1\r
+SCSI_Out__DBP_raw__DM2 EQU CYREG_PRT15_DM2\r
+SCSI_Out__DBP_raw__DR EQU CYREG_PRT15_DR\r
+SCSI_Out__DBP_raw__INP_DIS EQU CYREG_PRT15_INP_DIS\r
+SCSI_Out__DBP_raw__INTTYPE EQU CYREG_PICU15_INTTYPE5\r
+SCSI_Out__DBP_raw__LCD_COM_SEG EQU CYREG_PRT15_LCD_COM_SEG\r
+SCSI_Out__DBP_raw__LCD_EN EQU CYREG_PRT15_LCD_EN\r
+SCSI_Out__DBP_raw__MASK EQU 0x20\r
+SCSI_Out__DBP_raw__PC EQU CYREG_IO_PC_PRT15_PC5\r
+SCSI_Out__DBP_raw__PORT EQU 15\r
+SCSI_Out__DBP_raw__PRT EQU CYREG_PRT15_PRT\r
+SCSI_Out__DBP_raw__PRTDSI__CAPS_SEL EQU CYREG_PRT15_CAPS_SEL\r
+SCSI_Out__DBP_raw__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT15_DBL_SYNC_IN\r
+SCSI_Out__DBP_raw__PRTDSI__OE_SEL0 EQU CYREG_PRT15_OE_SEL0\r
+SCSI_Out__DBP_raw__PRTDSI__OE_SEL1 EQU CYREG_PRT15_OE_SEL1\r
+SCSI_Out__DBP_raw__PRTDSI__OUT_SEL0 EQU CYREG_PRT15_OUT_SEL0\r
+SCSI_Out__DBP_raw__PRTDSI__OUT_SEL1 EQU CYREG_PRT15_OUT_SEL1\r
+SCSI_Out__DBP_raw__PRTDSI__SYNC_OUT EQU CYREG_PRT15_SYNC_OUT\r
+SCSI_Out__DBP_raw__PS EQU CYREG_PRT15_PS\r
+SCSI_Out__DBP_raw__SHIFT EQU 5\r
+SCSI_Out__DBP_raw__SLW EQU CYREG_PRT15_SLW\r
+SCSI_Out__IO_raw__AG EQU CYREG_PRT0_AG\r
+SCSI_Out__IO_raw__AMUX EQU CYREG_PRT0_AMUX\r
+SCSI_Out__IO_raw__BIE EQU CYREG_PRT0_BIE\r
+SCSI_Out__IO_raw__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
+SCSI_Out__IO_raw__BYP EQU CYREG_PRT0_BYP\r
+SCSI_Out__IO_raw__CTL EQU CYREG_PRT0_CTL\r
+SCSI_Out__IO_raw__DM0 EQU CYREG_PRT0_DM0\r
+SCSI_Out__IO_raw__DM1 EQU CYREG_PRT0_DM1\r
+SCSI_Out__IO_raw__DM2 EQU CYREG_PRT0_DM2\r
+SCSI_Out__IO_raw__DR EQU CYREG_PRT0_DR\r
+SCSI_Out__IO_raw__INP_DIS EQU CYREG_PRT0_INP_DIS\r
+SCSI_Out__IO_raw__INTTYPE EQU CYREG_PICU0_INTTYPE2\r
+SCSI_Out__IO_raw__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
+SCSI_Out__IO_raw__LCD_EN EQU CYREG_PRT0_LCD_EN\r
+SCSI_Out__IO_raw__MASK EQU 0x04\r
+SCSI_Out__IO_raw__PC EQU CYREG_PRT0_PC2\r
+SCSI_Out__IO_raw__PORT EQU 0\r
+SCSI_Out__IO_raw__PRT EQU CYREG_PRT0_PRT\r
+SCSI_Out__IO_raw__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
+SCSI_Out__IO_raw__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
+SCSI_Out__IO_raw__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
+SCSI_Out__IO_raw__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
+SCSI_Out__IO_raw__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
+SCSI_Out__IO_raw__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
+SCSI_Out__IO_raw__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
+SCSI_Out__IO_raw__PS EQU CYREG_PRT0_PS\r
+SCSI_Out__IO_raw__SHIFT EQU 2\r
+SCSI_Out__IO_raw__SLW EQU CYREG_PRT0_SLW\r
+SCSI_Out__MSG_raw__AG EQU CYREG_PRT4_AG\r
+SCSI_Out__MSG_raw__AMUX EQU CYREG_PRT4_AMUX\r
+SCSI_Out__MSG_raw__BIE EQU CYREG_PRT4_BIE\r
+SCSI_Out__MSG_raw__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
+SCSI_Out__MSG_raw__BYP EQU CYREG_PRT4_BYP\r
+SCSI_Out__MSG_raw__CTL EQU CYREG_PRT4_CTL\r
+SCSI_Out__MSG_raw__DM0 EQU CYREG_PRT4_DM0\r
+SCSI_Out__MSG_raw__DM1 EQU CYREG_PRT4_DM1\r
+SCSI_Out__MSG_raw__DM2 EQU CYREG_PRT4_DM2\r
+SCSI_Out__MSG_raw__DR EQU CYREG_PRT4_DR\r
+SCSI_Out__MSG_raw__INP_DIS EQU CYREG_PRT4_INP_DIS\r
+SCSI_Out__MSG_raw__INTTYPE EQU CYREG_PICU4_INTTYPE4\r
+SCSI_Out__MSG_raw__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
+SCSI_Out__MSG_raw__LCD_EN EQU CYREG_PRT4_LCD_EN\r
+SCSI_Out__MSG_raw__MASK EQU 0x10\r
+SCSI_Out__MSG_raw__PC EQU CYREG_PRT4_PC4\r
+SCSI_Out__MSG_raw__PORT EQU 4\r
+SCSI_Out__MSG_raw__PRT EQU CYREG_PRT4_PRT\r
+SCSI_Out__MSG_raw__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
+SCSI_Out__MSG_raw__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
+SCSI_Out__MSG_raw__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
+SCSI_Out__MSG_raw__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
+SCSI_Out__MSG_raw__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
+SCSI_Out__MSG_raw__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
+SCSI_Out__MSG_raw__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
+SCSI_Out__MSG_raw__PS EQU CYREG_PRT4_PS\r
+SCSI_Out__MSG_raw__SHIFT EQU 4\r
+SCSI_Out__MSG_raw__SLW EQU CYREG_PRT4_SLW\r
+SCSI_Out__REQ__AG EQU CYREG_PRT0_AG\r
+SCSI_Out__REQ__AMUX EQU CYREG_PRT0_AMUX\r
+SCSI_Out__REQ__BIE EQU CYREG_PRT0_BIE\r
+SCSI_Out__REQ__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
+SCSI_Out__REQ__BYP EQU CYREG_PRT0_BYP\r
+SCSI_Out__REQ__CTL EQU CYREG_PRT0_CTL\r
+SCSI_Out__REQ__DM0 EQU CYREG_PRT0_DM0\r
+SCSI_Out__REQ__DM1 EQU CYREG_PRT0_DM1\r
+SCSI_Out__REQ__DM2 EQU CYREG_PRT0_DM2\r
+SCSI_Out__REQ__DR EQU CYREG_PRT0_DR\r
+SCSI_Out__REQ__INP_DIS EQU CYREG_PRT0_INP_DIS\r
+SCSI_Out__REQ__INTTYPE EQU CYREG_PICU0_INTTYPE3\r
+SCSI_Out__REQ__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
+SCSI_Out__REQ__LCD_EN EQU CYREG_PRT0_LCD_EN\r
+SCSI_Out__REQ__MASK EQU 0x08\r
+SCSI_Out__REQ__PC EQU CYREG_PRT0_PC3\r
+SCSI_Out__REQ__PORT EQU 0\r
+SCSI_Out__REQ__PRT EQU CYREG_PRT0_PRT\r
+SCSI_Out__REQ__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
+SCSI_Out__REQ__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
+SCSI_Out__REQ__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
+SCSI_Out__REQ__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
+SCSI_Out__REQ__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
+SCSI_Out__REQ__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
+SCSI_Out__REQ__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
+SCSI_Out__REQ__PS EQU CYREG_PRT0_PS\r
+SCSI_Out__REQ__SHIFT EQU 3\r
+SCSI_Out__REQ__SLW EQU CYREG_PRT0_SLW\r
+SCSI_Out__RST__AG EQU CYREG_PRT4_AG\r
+SCSI_Out__RST__AMUX EQU CYREG_PRT4_AMUX\r
+SCSI_Out__RST__BIE EQU CYREG_PRT4_BIE\r
+SCSI_Out__RST__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
+SCSI_Out__RST__BYP EQU CYREG_PRT4_BYP\r
+SCSI_Out__RST__CTL EQU CYREG_PRT4_CTL\r
+SCSI_Out__RST__DM0 EQU CYREG_PRT4_DM0\r
+SCSI_Out__RST__DM1 EQU CYREG_PRT4_DM1\r
+SCSI_Out__RST__DM2 EQU CYREG_PRT4_DM2\r
+SCSI_Out__RST__DR EQU CYREG_PRT4_DR\r
+SCSI_Out__RST__INP_DIS EQU CYREG_PRT4_INP_DIS\r
+SCSI_Out__RST__INTTYPE EQU CYREG_PICU4_INTTYPE5\r
+SCSI_Out__RST__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
+SCSI_Out__RST__LCD_EN EQU CYREG_PRT4_LCD_EN\r
+SCSI_Out__RST__MASK EQU 0x20\r
+SCSI_Out__RST__PC EQU CYREG_PRT4_PC5\r
+SCSI_Out__RST__PORT EQU 4\r
+SCSI_Out__RST__PRT EQU CYREG_PRT4_PRT\r
+SCSI_Out__RST__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
+SCSI_Out__RST__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
+SCSI_Out__RST__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
+SCSI_Out__RST__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
+SCSI_Out__RST__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
+SCSI_Out__RST__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
+SCSI_Out__RST__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
+SCSI_Out__RST__PS EQU CYREG_PRT4_PS\r
+SCSI_Out__RST__SHIFT EQU 5\r
+SCSI_Out__RST__SLW EQU CYREG_PRT4_SLW\r
+SCSI_Out__SEL__AG EQU CYREG_PRT0_AG\r
+SCSI_Out__SEL__AMUX EQU CYREG_PRT0_AMUX\r
+SCSI_Out__SEL__BIE EQU CYREG_PRT0_BIE\r
+SCSI_Out__SEL__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
+SCSI_Out__SEL__BYP EQU CYREG_PRT0_BYP\r
+SCSI_Out__SEL__CTL EQU CYREG_PRT0_CTL\r
+SCSI_Out__SEL__DM0 EQU CYREG_PRT0_DM0\r
+SCSI_Out__SEL__DM1 EQU CYREG_PRT0_DM1\r
+SCSI_Out__SEL__DM2 EQU CYREG_PRT0_DM2\r
+SCSI_Out__SEL__DR EQU CYREG_PRT0_DR\r
+SCSI_Out__SEL__INP_DIS EQU CYREG_PRT0_INP_DIS\r
+SCSI_Out__SEL__INTTYPE EQU CYREG_PICU0_INTTYPE7\r
+SCSI_Out__SEL__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
+SCSI_Out__SEL__LCD_EN EQU CYREG_PRT0_LCD_EN\r
+SCSI_Out__SEL__MASK EQU 0x80\r
+SCSI_Out__SEL__PC EQU CYREG_PRT0_PC7\r
+SCSI_Out__SEL__PORT EQU 0\r
+SCSI_Out__SEL__PRT EQU CYREG_PRT0_PRT\r
+SCSI_Out__SEL__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
+SCSI_Out__SEL__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
+SCSI_Out__SEL__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
+SCSI_Out__SEL__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
+SCSI_Out__SEL__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
+SCSI_Out__SEL__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
+SCSI_Out__SEL__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
+SCSI_Out__SEL__PS EQU CYREG_PRT0_PS\r
+SCSI_Out__SEL__SHIFT EQU 7\r
+SCSI_Out__SEL__SLW EQU CYREG_PRT0_SLW\r
+SCSI_Out_Bits_Sync_ctrl_reg__0__MASK EQU 0x01\r
+SCSI_Out_Bits_Sync_ctrl_reg__0__POS EQU 0\r
+SCSI_Out_Bits_Sync_ctrl_reg__1__MASK EQU 0x02\r
+SCSI_Out_Bits_Sync_ctrl_reg__1__POS EQU 1\r
+SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB10_11_ACTL\r
+SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB10_11_CTL\r
+SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB10_11_CTL\r
+SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB10_11_CTL\r
+SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB10_11_CTL\r
+SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB10_11_MSK\r
+SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB10_11_MSK\r
+SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB10_11_MSK\r
+SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB10_11_MSK\r
+SCSI_Out_Bits_Sync_ctrl_reg__2__MASK EQU 0x04\r
+SCSI_Out_Bits_Sync_ctrl_reg__2__POS EQU 2\r
+SCSI_Out_Bits_Sync_ctrl_reg__3__MASK EQU 0x08\r
+SCSI_Out_Bits_Sync_ctrl_reg__3__POS EQU 3\r
+SCSI_Out_Bits_Sync_ctrl_reg__4__MASK EQU 0x10\r
+SCSI_Out_Bits_Sync_ctrl_reg__4__POS EQU 4\r
+SCSI_Out_Bits_Sync_ctrl_reg__5__MASK EQU 0x20\r
+SCSI_Out_Bits_Sync_ctrl_reg__5__POS EQU 5\r
+SCSI_Out_Bits_Sync_ctrl_reg__6__MASK EQU 0x40\r
+SCSI_Out_Bits_Sync_ctrl_reg__6__POS EQU 6\r
+SCSI_Out_Bits_Sync_ctrl_reg__7__MASK EQU 0x80\r
+SCSI_Out_Bits_Sync_ctrl_reg__7__POS EQU 7\r
+SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB10_ACTL\r
+SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB10_CTL\r
+SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB10_ST_CTL\r
+SCSI_Out_Bits_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB10_CTL\r
+SCSI_Out_Bits_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB10_ST_CTL\r
+SCSI_Out_Bits_Sync_ctrl_reg__MASK EQU 0xFF\r
+SCSI_Out_Bits_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB10_MSK_ACTL\r
+SCSI_Out_Bits_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB10_MSK_ACTL\r
+SCSI_Out_Bits_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB10_MSK\r
+SCSI_Out_Ctl_Sync_ctrl_reg__0__MASK EQU 0x01\r
+SCSI_Out_Ctl_Sync_ctrl_reg__0__POS EQU 0\r
+SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB07_08_ACTL\r
+SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB07_08_CTL\r
+SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB07_08_CTL\r
+SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB07_08_CTL\r
+SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB07_08_CTL\r
+SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB07_08_MSK\r
+SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB07_08_MSK\r
+SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB07_08_MSK\r
+SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB07_08_MSK\r
+SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB07_ACTL\r
+SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB07_CTL\r
+SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB07_ST_CTL\r
+SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB07_CTL\r
+SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB07_ST_CTL\r
+SCSI_Out_Ctl_Sync_ctrl_reg__MASK EQU 0x01\r
+SCSI_Out_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB07_MSK_ACTL\r
+SCSI_Out_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB07_MSK_ACTL\r
+SCSI_Out_Ctl_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB07_MSK\r
+SCSI_Out_DBx__0__AG EQU CYREG_PRT5_AG\r
+SCSI_Out_DBx__0__AMUX EQU CYREG_PRT5_AMUX\r
+SCSI_Out_DBx__0__BIE EQU CYREG_PRT5_BIE\r
+SCSI_Out_DBx__0__BIT_MASK EQU CYREG_PRT5_BIT_MASK\r
+SCSI_Out_DBx__0__BYP EQU CYREG_PRT5_BYP\r
+SCSI_Out_DBx__0__CTL EQU CYREG_PRT5_CTL\r
+SCSI_Out_DBx__0__DM0 EQU CYREG_PRT5_DM0\r
+SCSI_Out_DBx__0__DM1 EQU CYREG_PRT5_DM1\r
+SCSI_Out_DBx__0__DM2 EQU CYREG_PRT5_DM2\r
+SCSI_Out_DBx__0__DR EQU CYREG_PRT5_DR\r
+SCSI_Out_DBx__0__INP_DIS EQU CYREG_PRT5_INP_DIS\r
+SCSI_Out_DBx__0__INTTYPE EQU CYREG_PICU5_INTTYPE1\r
+SCSI_Out_DBx__0__LCD_COM_SEG EQU CYREG_PRT5_LCD_COM_SEG\r
+SCSI_Out_DBx__0__LCD_EN EQU CYREG_PRT5_LCD_EN\r
+SCSI_Out_DBx__0__MASK EQU 0x02\r
+SCSI_Out_DBx__0__PC EQU CYREG_PRT5_PC1\r
+SCSI_Out_DBx__0__PORT EQU 5\r
+SCSI_Out_DBx__0__PRT EQU CYREG_PRT5_PRT\r
+SCSI_Out_DBx__0__PRTDSI__CAPS_SEL EQU CYREG_PRT5_CAPS_SEL\r
+SCSI_Out_DBx__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT5_DBL_SYNC_IN\r
+SCSI_Out_DBx__0__PRTDSI__OE_SEL0 EQU CYREG_PRT5_OE_SEL0\r
+SCSI_Out_DBx__0__PRTDSI__OE_SEL1 EQU CYREG_PRT5_OE_SEL1\r
+SCSI_Out_DBx__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT5_OUT_SEL0\r
+SCSI_Out_DBx__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT5_OUT_SEL1\r
+SCSI_Out_DBx__0__PRTDSI__SYNC_OUT EQU CYREG_PRT5_SYNC_OUT\r
+SCSI_Out_DBx__0__PS EQU CYREG_PRT5_PS\r
+SCSI_Out_DBx__0__SHIFT EQU 1\r
+SCSI_Out_DBx__0__SLW EQU CYREG_PRT5_SLW\r
+SCSI_Out_DBx__1__AG EQU CYREG_PRT5_AG\r
+SCSI_Out_DBx__1__AMUX EQU CYREG_PRT5_AMUX\r
+SCSI_Out_DBx__1__BIE EQU CYREG_PRT5_BIE\r
+SCSI_Out_DBx__1__BIT_MASK EQU CYREG_PRT5_BIT_MASK\r
+SCSI_Out_DBx__1__BYP EQU CYREG_PRT5_BYP\r
+SCSI_Out_DBx__1__CTL EQU CYREG_PRT5_CTL\r
+SCSI_Out_DBx__1__DM0 EQU CYREG_PRT5_DM0\r
+SCSI_Out_DBx__1__DM1 EQU CYREG_PRT5_DM1\r
+SCSI_Out_DBx__1__DM2 EQU CYREG_PRT5_DM2\r
+SCSI_Out_DBx__1__DR EQU CYREG_PRT5_DR\r
+SCSI_Out_DBx__1__INP_DIS EQU CYREG_PRT5_INP_DIS\r
+SCSI_Out_DBx__1__INTTYPE EQU CYREG_PICU5_INTTYPE0\r
+SCSI_Out_DBx__1__LCD_COM_SEG EQU CYREG_PRT5_LCD_COM_SEG\r
+SCSI_Out_DBx__1__LCD_EN EQU CYREG_PRT5_LCD_EN\r
+SCSI_Out_DBx__1__MASK EQU 0x01\r
+SCSI_Out_DBx__1__PC EQU CYREG_PRT5_PC0\r
+SCSI_Out_DBx__1__PORT EQU 5\r
+SCSI_Out_DBx__1__PRT EQU CYREG_PRT5_PRT\r
+SCSI_Out_DBx__1__PRTDSI__CAPS_SEL EQU CYREG_PRT5_CAPS_SEL\r
+SCSI_Out_DBx__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT5_DBL_SYNC_IN\r
+SCSI_Out_DBx__1__PRTDSI__OE_SEL0 EQU CYREG_PRT5_OE_SEL0\r
+SCSI_Out_DBx__1__PRTDSI__OE_SEL1 EQU CYREG_PRT5_OE_SEL1\r
+SCSI_Out_DBx__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT5_OUT_SEL0\r
+SCSI_Out_DBx__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT5_OUT_SEL1\r
+SCSI_Out_DBx__1__PRTDSI__SYNC_OUT EQU CYREG_PRT5_SYNC_OUT\r
+SCSI_Out_DBx__1__PS EQU CYREG_PRT5_PS\r
+SCSI_Out_DBx__1__SHIFT EQU 0\r
+SCSI_Out_DBx__1__SLW EQU CYREG_PRT5_SLW\r
+SCSI_Out_DBx__2__AG EQU CYREG_PRT6_AG\r
+SCSI_Out_DBx__2__AMUX EQU CYREG_PRT6_AMUX\r
+SCSI_Out_DBx__2__BIE EQU CYREG_PRT6_BIE\r
+SCSI_Out_DBx__2__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
+SCSI_Out_DBx__2__BYP EQU CYREG_PRT6_BYP\r
+SCSI_Out_DBx__2__CTL EQU CYREG_PRT6_CTL\r
+SCSI_Out_DBx__2__DM0 EQU CYREG_PRT6_DM0\r
+SCSI_Out_DBx__2__DM1 EQU CYREG_PRT6_DM1\r
+SCSI_Out_DBx__2__DM2 EQU CYREG_PRT6_DM2\r
+SCSI_Out_DBx__2__DR EQU CYREG_PRT6_DR\r
+SCSI_Out_DBx__2__INP_DIS EQU CYREG_PRT6_INP_DIS\r
+SCSI_Out_DBx__2__INTTYPE EQU CYREG_PICU6_INTTYPE5\r
+SCSI_Out_DBx__2__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
+SCSI_Out_DBx__2__LCD_EN EQU CYREG_PRT6_LCD_EN\r
+SCSI_Out_DBx__2__MASK EQU 0x20\r
+SCSI_Out_DBx__2__PC EQU CYREG_PRT6_PC5\r
+SCSI_Out_DBx__2__PORT EQU 6\r
+SCSI_Out_DBx__2__PRT EQU CYREG_PRT6_PRT\r
+SCSI_Out_DBx__2__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
+SCSI_Out_DBx__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
+SCSI_Out_DBx__2__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
+SCSI_Out_DBx__2__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
+SCSI_Out_DBx__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
+SCSI_Out_DBx__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
+SCSI_Out_DBx__2__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
+SCSI_Out_DBx__2__PS EQU CYREG_PRT6_PS\r
+SCSI_Out_DBx__2__SHIFT EQU 5\r
+SCSI_Out_DBx__2__SLW EQU CYREG_PRT6_SLW\r
+SCSI_Out_DBx__3__AG EQU CYREG_PRT6_AG\r
+SCSI_Out_DBx__3__AMUX EQU CYREG_PRT6_AMUX\r
+SCSI_Out_DBx__3__BIE EQU CYREG_PRT6_BIE\r
+SCSI_Out_DBx__3__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
+SCSI_Out_DBx__3__BYP EQU CYREG_PRT6_BYP\r
+SCSI_Out_DBx__3__CTL EQU CYREG_PRT6_CTL\r
+SCSI_Out_DBx__3__DM0 EQU CYREG_PRT6_DM0\r
+SCSI_Out_DBx__3__DM1 EQU CYREG_PRT6_DM1\r
+SCSI_Out_DBx__3__DM2 EQU CYREG_PRT6_DM2\r
+SCSI_Out_DBx__3__DR EQU CYREG_PRT6_DR\r
+SCSI_Out_DBx__3__INP_DIS EQU CYREG_PRT6_INP_DIS\r
+SCSI_Out_DBx__3__INTTYPE EQU CYREG_PICU6_INTTYPE4\r
+SCSI_Out_DBx__3__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
+SCSI_Out_DBx__3__LCD_EN EQU CYREG_PRT6_LCD_EN\r
+SCSI_Out_DBx__3__MASK EQU 0x10\r
+SCSI_Out_DBx__3__PC EQU CYREG_PRT6_PC4\r
+SCSI_Out_DBx__3__PORT EQU 6\r
+SCSI_Out_DBx__3__PRT EQU CYREG_PRT6_PRT\r
+SCSI_Out_DBx__3__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
+SCSI_Out_DBx__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
+SCSI_Out_DBx__3__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
+SCSI_Out_DBx__3__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
+SCSI_Out_DBx__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
+SCSI_Out_DBx__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
+SCSI_Out_DBx__3__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
+SCSI_Out_DBx__3__PS EQU CYREG_PRT6_PS\r
+SCSI_Out_DBx__3__SHIFT EQU 4\r
+SCSI_Out_DBx__3__SLW EQU CYREG_PRT6_SLW\r
+SCSI_Out_DBx__4__AG EQU CYREG_PRT2_AG\r
+SCSI_Out_DBx__4__AMUX EQU CYREG_PRT2_AMUX\r
+SCSI_Out_DBx__4__BIE EQU CYREG_PRT2_BIE\r
+SCSI_Out_DBx__4__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
+SCSI_Out_DBx__4__BYP EQU CYREG_PRT2_BYP\r
+SCSI_Out_DBx__4__CTL EQU CYREG_PRT2_CTL\r
+SCSI_Out_DBx__4__DM0 EQU CYREG_PRT2_DM0\r
+SCSI_Out_DBx__4__DM1 EQU CYREG_PRT2_DM1\r
+SCSI_Out_DBx__4__DM2 EQU CYREG_PRT2_DM2\r
+SCSI_Out_DBx__4__DR EQU CYREG_PRT2_DR\r
+SCSI_Out_DBx__4__INP_DIS EQU CYREG_PRT2_INP_DIS\r
+SCSI_Out_DBx__4__INTTYPE EQU CYREG_PICU2_INTTYPE7\r
+SCSI_Out_DBx__4__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
+SCSI_Out_DBx__4__LCD_EN EQU CYREG_PRT2_LCD_EN\r
+SCSI_Out_DBx__4__MASK EQU 0x80\r
+SCSI_Out_DBx__4__PC EQU CYREG_PRT2_PC7\r
+SCSI_Out_DBx__4__PORT EQU 2\r
+SCSI_Out_DBx__4__PRT EQU CYREG_PRT2_PRT\r
+SCSI_Out_DBx__4__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
+SCSI_Out_DBx__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
+SCSI_Out_DBx__4__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
+SCSI_Out_DBx__4__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
+SCSI_Out_DBx__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
+SCSI_Out_DBx__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
+SCSI_Out_DBx__4__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
+SCSI_Out_DBx__4__PS EQU CYREG_PRT2_PS\r
+SCSI_Out_DBx__4__SHIFT EQU 7\r
+SCSI_Out_DBx__4__SLW EQU CYREG_PRT2_SLW\r
+SCSI_Out_DBx__5__AG EQU CYREG_PRT2_AG\r
+SCSI_Out_DBx__5__AMUX EQU CYREG_PRT2_AMUX\r
+SCSI_Out_DBx__5__BIE EQU CYREG_PRT2_BIE\r
+SCSI_Out_DBx__5__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
+SCSI_Out_DBx__5__BYP EQU CYREG_PRT2_BYP\r
+SCSI_Out_DBx__5__CTL EQU CYREG_PRT2_CTL\r
+SCSI_Out_DBx__5__DM0 EQU CYREG_PRT2_DM0\r
+SCSI_Out_DBx__5__DM1 EQU CYREG_PRT2_DM1\r
+SCSI_Out_DBx__5__DM2 EQU CYREG_PRT2_DM2\r
+SCSI_Out_DBx__5__DR EQU CYREG_PRT2_DR\r
+SCSI_Out_DBx__5__INP_DIS EQU CYREG_PRT2_INP_DIS\r
+SCSI_Out_DBx__5__INTTYPE EQU CYREG_PICU2_INTTYPE6\r
+SCSI_Out_DBx__5__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
+SCSI_Out_DBx__5__LCD_EN EQU CYREG_PRT2_LCD_EN\r
+SCSI_Out_DBx__5__MASK EQU 0x40\r
+SCSI_Out_DBx__5__PC EQU CYREG_PRT2_PC6\r
+SCSI_Out_DBx__5__PORT EQU 2\r
+SCSI_Out_DBx__5__PRT EQU CYREG_PRT2_PRT\r
+SCSI_Out_DBx__5__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
+SCSI_Out_DBx__5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
+SCSI_Out_DBx__5__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
+SCSI_Out_DBx__5__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
+SCSI_Out_DBx__5__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
+SCSI_Out_DBx__5__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
+SCSI_Out_DBx__5__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
+SCSI_Out_DBx__5__PS EQU CYREG_PRT2_PS\r
+SCSI_Out_DBx__5__SHIFT EQU 6\r
+SCSI_Out_DBx__5__SLW EQU CYREG_PRT2_SLW\r
+SCSI_Out_DBx__6__AG EQU CYREG_PRT2_AG\r
+SCSI_Out_DBx__6__AMUX EQU CYREG_PRT2_AMUX\r
+SCSI_Out_DBx__6__BIE EQU CYREG_PRT2_BIE\r
+SCSI_Out_DBx__6__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
+SCSI_Out_DBx__6__BYP EQU CYREG_PRT2_BYP\r
+SCSI_Out_DBx__6__CTL EQU CYREG_PRT2_CTL\r
+SCSI_Out_DBx__6__DM0 EQU CYREG_PRT2_DM0\r
+SCSI_Out_DBx__6__DM1 EQU CYREG_PRT2_DM1\r
+SCSI_Out_DBx__6__DM2 EQU CYREG_PRT2_DM2\r
+SCSI_Out_DBx__6__DR EQU CYREG_PRT2_DR\r
+SCSI_Out_DBx__6__INP_DIS EQU CYREG_PRT2_INP_DIS\r
+SCSI_Out_DBx__6__INTTYPE EQU CYREG_PICU2_INTTYPE3\r
+SCSI_Out_DBx__6__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
+SCSI_Out_DBx__6__LCD_EN EQU CYREG_PRT2_LCD_EN\r
+SCSI_Out_DBx__6__MASK EQU 0x08\r
+SCSI_Out_DBx__6__PC EQU CYREG_PRT2_PC3\r
+SCSI_Out_DBx__6__PORT EQU 2\r
+SCSI_Out_DBx__6__PRT EQU CYREG_PRT2_PRT\r
+SCSI_Out_DBx__6__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
+SCSI_Out_DBx__6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
+SCSI_Out_DBx__6__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
+SCSI_Out_DBx__6__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
+SCSI_Out_DBx__6__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
+SCSI_Out_DBx__6__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
+SCSI_Out_DBx__6__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
+SCSI_Out_DBx__6__PS EQU CYREG_PRT2_PS\r
+SCSI_Out_DBx__6__SHIFT EQU 3\r
+SCSI_Out_DBx__6__SLW EQU CYREG_PRT2_SLW\r
+SCSI_Out_DBx__7__AG EQU CYREG_PRT2_AG\r
+SCSI_Out_DBx__7__AMUX EQU CYREG_PRT2_AMUX\r
+SCSI_Out_DBx__7__BIE EQU CYREG_PRT2_BIE\r
+SCSI_Out_DBx__7__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
+SCSI_Out_DBx__7__BYP EQU CYREG_PRT2_BYP\r
+SCSI_Out_DBx__7__CTL EQU CYREG_PRT2_CTL\r
+SCSI_Out_DBx__7__DM0 EQU CYREG_PRT2_DM0\r
+SCSI_Out_DBx__7__DM1 EQU CYREG_PRT2_DM1\r
+SCSI_Out_DBx__7__DM2 EQU CYREG_PRT2_DM2\r
+SCSI_Out_DBx__7__DR EQU CYREG_PRT2_DR\r
+SCSI_Out_DBx__7__INP_DIS EQU CYREG_PRT2_INP_DIS\r
+SCSI_Out_DBx__7__INTTYPE EQU CYREG_PICU2_INTTYPE2\r
+SCSI_Out_DBx__7__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
+SCSI_Out_DBx__7__LCD_EN EQU CYREG_PRT2_LCD_EN\r
+SCSI_Out_DBx__7__MASK EQU 0x04\r
+SCSI_Out_DBx__7__PC EQU CYREG_PRT2_PC2\r
+SCSI_Out_DBx__7__PORT EQU 2\r
+SCSI_Out_DBx__7__PRT EQU CYREG_PRT2_PRT\r
+SCSI_Out_DBx__7__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
+SCSI_Out_DBx__7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
+SCSI_Out_DBx__7__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
+SCSI_Out_DBx__7__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
+SCSI_Out_DBx__7__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
+SCSI_Out_DBx__7__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
+SCSI_Out_DBx__7__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
+SCSI_Out_DBx__7__PS EQU CYREG_PRT2_PS\r
+SCSI_Out_DBx__7__SHIFT EQU 2\r
+SCSI_Out_DBx__7__SLW EQU CYREG_PRT2_SLW\r
+SCSI_Out_DBx__DB0__AG EQU CYREG_PRT5_AG\r
+SCSI_Out_DBx__DB0__AMUX EQU CYREG_PRT5_AMUX\r
+SCSI_Out_DBx__DB0__BIE EQU CYREG_PRT5_BIE\r
+SCSI_Out_DBx__DB0__BIT_MASK EQU CYREG_PRT5_BIT_MASK\r
+SCSI_Out_DBx__DB0__BYP EQU CYREG_PRT5_BYP\r
+SCSI_Out_DBx__DB0__CTL EQU CYREG_PRT5_CTL\r
+SCSI_Out_DBx__DB0__DM0 EQU CYREG_PRT5_DM0\r
+SCSI_Out_DBx__DB0__DM1 EQU CYREG_PRT5_DM1\r
+SCSI_Out_DBx__DB0__DM2 EQU CYREG_PRT5_DM2\r
+SCSI_Out_DBx__DB0__DR EQU CYREG_PRT5_DR\r
+SCSI_Out_DBx__DB0__INP_DIS EQU CYREG_PRT5_INP_DIS\r
+SCSI_Out_DBx__DB0__INTTYPE EQU CYREG_PICU5_INTTYPE1\r
+SCSI_Out_DBx__DB0__LCD_COM_SEG EQU CYREG_PRT5_LCD_COM_SEG\r
+SCSI_Out_DBx__DB0__LCD_EN EQU CYREG_PRT5_LCD_EN\r
+SCSI_Out_DBx__DB0__MASK EQU 0x02\r
+SCSI_Out_DBx__DB0__PC EQU CYREG_PRT5_PC1\r
+SCSI_Out_DBx__DB0__PORT EQU 5\r
+SCSI_Out_DBx__DB0__PRT EQU CYREG_PRT5_PRT\r
+SCSI_Out_DBx__DB0__PRTDSI__CAPS_SEL EQU CYREG_PRT5_CAPS_SEL\r
+SCSI_Out_DBx__DB0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT5_DBL_SYNC_IN\r
+SCSI_Out_DBx__DB0__PRTDSI__OE_SEL0 EQU CYREG_PRT5_OE_SEL0\r
+SCSI_Out_DBx__DB0__PRTDSI__OE_SEL1 EQU CYREG_PRT5_OE_SEL1\r
+SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL0 EQU CYREG_PRT5_OUT_SEL0\r
+SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL1 EQU CYREG_PRT5_OUT_SEL1\r
+SCSI_Out_DBx__DB0__PRTDSI__SYNC_OUT EQU CYREG_PRT5_SYNC_OUT\r
+SCSI_Out_DBx__DB0__PS EQU CYREG_PRT5_PS\r
+SCSI_Out_DBx__DB0__SHIFT EQU 1\r
+SCSI_Out_DBx__DB0__SLW EQU CYREG_PRT5_SLW\r
+SCSI_Out_DBx__DB1__AG EQU CYREG_PRT5_AG\r
+SCSI_Out_DBx__DB1__AMUX EQU CYREG_PRT5_AMUX\r
+SCSI_Out_DBx__DB1__BIE EQU CYREG_PRT5_BIE\r
+SCSI_Out_DBx__DB1__BIT_MASK EQU CYREG_PRT5_BIT_MASK\r
+SCSI_Out_DBx__DB1__BYP EQU CYREG_PRT5_BYP\r
+SCSI_Out_DBx__DB1__CTL EQU CYREG_PRT5_CTL\r
+SCSI_Out_DBx__DB1__DM0 EQU CYREG_PRT5_DM0\r
+SCSI_Out_DBx__DB1__DM1 EQU CYREG_PRT5_DM1\r
+SCSI_Out_DBx__DB1__DM2 EQU CYREG_PRT5_DM2\r
+SCSI_Out_DBx__DB1__DR EQU CYREG_PRT5_DR\r
+SCSI_Out_DBx__DB1__INP_DIS EQU CYREG_PRT5_INP_DIS\r
+SCSI_Out_DBx__DB1__INTTYPE EQU CYREG_PICU5_INTTYPE0\r
+SCSI_Out_DBx__DB1__LCD_COM_SEG EQU CYREG_PRT5_LCD_COM_SEG\r
+SCSI_Out_DBx__DB1__LCD_EN EQU CYREG_PRT5_LCD_EN\r
+SCSI_Out_DBx__DB1__MASK EQU 0x01\r
+SCSI_Out_DBx__DB1__PC EQU CYREG_PRT5_PC0\r
+SCSI_Out_DBx__DB1__PORT EQU 5\r
+SCSI_Out_DBx__DB1__PRT EQU CYREG_PRT5_PRT\r
+SCSI_Out_DBx__DB1__PRTDSI__CAPS_SEL EQU CYREG_PRT5_CAPS_SEL\r
+SCSI_Out_DBx__DB1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT5_DBL_SYNC_IN\r
+SCSI_Out_DBx__DB1__PRTDSI__OE_SEL0 EQU CYREG_PRT5_OE_SEL0\r
+SCSI_Out_DBx__DB1__PRTDSI__OE_SEL1 EQU CYREG_PRT5_OE_SEL1\r
+SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL0 EQU CYREG_PRT5_OUT_SEL0\r
+SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL1 EQU CYREG_PRT5_OUT_SEL1\r
+SCSI_Out_DBx__DB1__PRTDSI__SYNC_OUT EQU CYREG_PRT5_SYNC_OUT\r
+SCSI_Out_DBx__DB1__PS EQU CYREG_PRT5_PS\r
+SCSI_Out_DBx__DB1__SHIFT EQU 0\r
+SCSI_Out_DBx__DB1__SLW EQU CYREG_PRT5_SLW\r
+SCSI_Out_DBx__DB2__AG EQU CYREG_PRT6_AG\r
+SCSI_Out_DBx__DB2__AMUX EQU CYREG_PRT6_AMUX\r
+SCSI_Out_DBx__DB2__BIE EQU CYREG_PRT6_BIE\r
+SCSI_Out_DBx__DB2__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
+SCSI_Out_DBx__DB2__BYP EQU CYREG_PRT6_BYP\r
+SCSI_Out_DBx__DB2__CTL EQU CYREG_PRT6_CTL\r
+SCSI_Out_DBx__DB2__DM0 EQU CYREG_PRT6_DM0\r
+SCSI_Out_DBx__DB2__DM1 EQU CYREG_PRT6_DM1\r
+SCSI_Out_DBx__DB2__DM2 EQU CYREG_PRT6_DM2\r
+SCSI_Out_DBx__DB2__DR EQU CYREG_PRT6_DR\r
+SCSI_Out_DBx__DB2__INP_DIS EQU CYREG_PRT6_INP_DIS\r
+SCSI_Out_DBx__DB2__INTTYPE EQU CYREG_PICU6_INTTYPE5\r
+SCSI_Out_DBx__DB2__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
+SCSI_Out_DBx__DB2__LCD_EN EQU CYREG_PRT6_LCD_EN\r
+SCSI_Out_DBx__DB2__MASK EQU 0x20\r
+SCSI_Out_DBx__DB2__PC EQU CYREG_PRT6_PC5\r
+SCSI_Out_DBx__DB2__PORT EQU 6\r
+SCSI_Out_DBx__DB2__PRT EQU CYREG_PRT6_PRT\r
+SCSI_Out_DBx__DB2__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
+SCSI_Out_DBx__DB2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
+SCSI_Out_DBx__DB2__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
+SCSI_Out_DBx__DB2__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
+SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
+SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
+SCSI_Out_DBx__DB2__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
+SCSI_Out_DBx__DB2__PS EQU CYREG_PRT6_PS\r
+SCSI_Out_DBx__DB2__SHIFT EQU 5\r
+SCSI_Out_DBx__DB2__SLW EQU CYREG_PRT6_SLW\r
+SCSI_Out_DBx__DB3__AG EQU CYREG_PRT6_AG\r
+SCSI_Out_DBx__DB3__AMUX EQU CYREG_PRT6_AMUX\r
+SCSI_Out_DBx__DB3__BIE EQU CYREG_PRT6_BIE\r
+SCSI_Out_DBx__DB3__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
+SCSI_Out_DBx__DB3__BYP EQU CYREG_PRT6_BYP\r
+SCSI_Out_DBx__DB3__CTL EQU CYREG_PRT6_CTL\r
+SCSI_Out_DBx__DB3__DM0 EQU CYREG_PRT6_DM0\r
+SCSI_Out_DBx__DB3__DM1 EQU CYREG_PRT6_DM1\r
+SCSI_Out_DBx__DB3__DM2 EQU CYREG_PRT6_DM2\r
+SCSI_Out_DBx__DB3__DR EQU CYREG_PRT6_DR\r
+SCSI_Out_DBx__DB3__INP_DIS EQU CYREG_PRT6_INP_DIS\r
+SCSI_Out_DBx__DB3__INTTYPE EQU CYREG_PICU6_INTTYPE4\r
+SCSI_Out_DBx__DB3__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
+SCSI_Out_DBx__DB3__LCD_EN EQU CYREG_PRT6_LCD_EN\r
+SCSI_Out_DBx__DB3__MASK EQU 0x10\r
+SCSI_Out_DBx__DB3__PC EQU CYREG_PRT6_PC4\r
+SCSI_Out_DBx__DB3__PORT EQU 6\r
+SCSI_Out_DBx__DB3__PRT EQU CYREG_PRT6_PRT\r
+SCSI_Out_DBx__DB3__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
+SCSI_Out_DBx__DB3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
+SCSI_Out_DBx__DB3__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
+SCSI_Out_DBx__DB3__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
+SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
+SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
+SCSI_Out_DBx__DB3__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
+SCSI_Out_DBx__DB3__PS EQU CYREG_PRT6_PS\r
+SCSI_Out_DBx__DB3__SHIFT EQU 4\r
+SCSI_Out_DBx__DB3__SLW EQU CYREG_PRT6_SLW\r
+SCSI_Out_DBx__DB4__AG EQU CYREG_PRT2_AG\r
+SCSI_Out_DBx__DB4__AMUX EQU CYREG_PRT2_AMUX\r
+SCSI_Out_DBx__DB4__BIE EQU CYREG_PRT2_BIE\r
+SCSI_Out_DBx__DB4__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
+SCSI_Out_DBx__DB4__BYP EQU CYREG_PRT2_BYP\r
+SCSI_Out_DBx__DB4__CTL EQU CYREG_PRT2_CTL\r
+SCSI_Out_DBx__DB4__DM0 EQU CYREG_PRT2_DM0\r
+SCSI_Out_DBx__DB4__DM1 EQU CYREG_PRT2_DM1\r
+SCSI_Out_DBx__DB4__DM2 EQU CYREG_PRT2_DM2\r
+SCSI_Out_DBx__DB4__DR EQU CYREG_PRT2_DR\r
+SCSI_Out_DBx__DB4__INP_DIS EQU CYREG_PRT2_INP_DIS\r
+SCSI_Out_DBx__DB4__INTTYPE EQU CYREG_PICU2_INTTYPE7\r
+SCSI_Out_DBx__DB4__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
+SCSI_Out_DBx__DB4__LCD_EN EQU CYREG_PRT2_LCD_EN\r
+SCSI_Out_DBx__DB4__MASK EQU 0x80\r
+SCSI_Out_DBx__DB4__PC EQU CYREG_PRT2_PC7\r
+SCSI_Out_DBx__DB4__PORT EQU 2\r
+SCSI_Out_DBx__DB4__PRT EQU CYREG_PRT2_PRT\r
+SCSI_Out_DBx__DB4__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
+SCSI_Out_DBx__DB4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
+SCSI_Out_DBx__DB4__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
+SCSI_Out_DBx__DB4__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
+SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
+SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
+SCSI_Out_DBx__DB4__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
+SCSI_Out_DBx__DB4__PS EQU CYREG_PRT2_PS\r
+SCSI_Out_DBx__DB4__SHIFT EQU 7\r
+SCSI_Out_DBx__DB4__SLW EQU CYREG_PRT2_SLW\r
+SCSI_Out_DBx__DB5__AG EQU CYREG_PRT2_AG\r
+SCSI_Out_DBx__DB5__AMUX EQU CYREG_PRT2_AMUX\r
+SCSI_Out_DBx__DB5__BIE EQU CYREG_PRT2_BIE\r
+SCSI_Out_DBx__DB5__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
+SCSI_Out_DBx__DB5__BYP EQU CYREG_PRT2_BYP\r
+SCSI_Out_DBx__DB5__CTL EQU CYREG_PRT2_CTL\r
+SCSI_Out_DBx__DB5__DM0 EQU CYREG_PRT2_DM0\r
+SCSI_Out_DBx__DB5__DM1 EQU CYREG_PRT2_DM1\r
+SCSI_Out_DBx__DB5__DM2 EQU CYREG_PRT2_DM2\r
+SCSI_Out_DBx__DB5__DR EQU CYREG_PRT2_DR\r
+SCSI_Out_DBx__DB5__INP_DIS EQU CYREG_PRT2_INP_DIS\r
+SCSI_Out_DBx__DB5__INTTYPE EQU CYREG_PICU2_INTTYPE6\r
+SCSI_Out_DBx__DB5__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
+SCSI_Out_DBx__DB5__LCD_EN EQU CYREG_PRT2_LCD_EN\r
+SCSI_Out_DBx__DB5__MASK EQU 0x40\r
+SCSI_Out_DBx__DB5__PC EQU CYREG_PRT2_PC6\r
+SCSI_Out_DBx__DB5__PORT EQU 2\r
+SCSI_Out_DBx__DB5__PRT EQU CYREG_PRT2_PRT\r
+SCSI_Out_DBx__DB5__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
+SCSI_Out_DBx__DB5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
+SCSI_Out_DBx__DB5__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
+SCSI_Out_DBx__DB5__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
+SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
+SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
+SCSI_Out_DBx__DB5__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
+SCSI_Out_DBx__DB5__PS EQU CYREG_PRT2_PS\r
+SCSI_Out_DBx__DB5__SHIFT EQU 6\r
+SCSI_Out_DBx__DB5__SLW EQU CYREG_PRT2_SLW\r
+SCSI_Out_DBx__DB6__AG EQU CYREG_PRT2_AG\r
+SCSI_Out_DBx__DB6__AMUX EQU CYREG_PRT2_AMUX\r
+SCSI_Out_DBx__DB6__BIE EQU CYREG_PRT2_BIE\r
+SCSI_Out_DBx__DB6__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
+SCSI_Out_DBx__DB6__BYP EQU CYREG_PRT2_BYP\r
+SCSI_Out_DBx__DB6__CTL EQU CYREG_PRT2_CTL\r
+SCSI_Out_DBx__DB6__DM0 EQU CYREG_PRT2_DM0\r
+SCSI_Out_DBx__DB6__DM1 EQU CYREG_PRT2_DM1\r
+SCSI_Out_DBx__DB6__DM2 EQU CYREG_PRT2_DM2\r
+SCSI_Out_DBx__DB6__DR EQU CYREG_PRT2_DR\r
+SCSI_Out_DBx__DB6__INP_DIS EQU CYREG_PRT2_INP_DIS\r
+SCSI_Out_DBx__DB6__INTTYPE EQU CYREG_PICU2_INTTYPE3\r
+SCSI_Out_DBx__DB6__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
+SCSI_Out_DBx__DB6__LCD_EN EQU CYREG_PRT2_LCD_EN\r
+SCSI_Out_DBx__DB6__MASK EQU 0x08\r
+SCSI_Out_DBx__DB6__PC EQU CYREG_PRT2_PC3\r
+SCSI_Out_DBx__DB6__PORT EQU 2\r
+SCSI_Out_DBx__DB6__PRT EQU CYREG_PRT2_PRT\r
+SCSI_Out_DBx__DB6__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
+SCSI_Out_DBx__DB6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
+SCSI_Out_DBx__DB6__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
+SCSI_Out_DBx__DB6__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
+SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
+SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
+SCSI_Out_DBx__DB6__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
+SCSI_Out_DBx__DB6__PS EQU CYREG_PRT2_PS\r
+SCSI_Out_DBx__DB6__SHIFT EQU 3\r
+SCSI_Out_DBx__DB6__SLW EQU CYREG_PRT2_SLW\r
+SCSI_Out_DBx__DB7__AG EQU CYREG_PRT2_AG\r
+SCSI_Out_DBx__DB7__AMUX EQU CYREG_PRT2_AMUX\r
+SCSI_Out_DBx__DB7__BIE EQU CYREG_PRT2_BIE\r
+SCSI_Out_DBx__DB7__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
+SCSI_Out_DBx__DB7__BYP EQU CYREG_PRT2_BYP\r
+SCSI_Out_DBx__DB7__CTL EQU CYREG_PRT2_CTL\r
+SCSI_Out_DBx__DB7__DM0 EQU CYREG_PRT2_DM0\r
+SCSI_Out_DBx__DB7__DM1 EQU CYREG_PRT2_DM1\r
+SCSI_Out_DBx__DB7__DM2 EQU CYREG_PRT2_DM2\r
+SCSI_Out_DBx__DB7__DR EQU CYREG_PRT2_DR\r
+SCSI_Out_DBx__DB7__INP_DIS EQU CYREG_PRT2_INP_DIS\r
+SCSI_Out_DBx__DB7__INTTYPE EQU CYREG_PICU2_INTTYPE2\r
+SCSI_Out_DBx__DB7__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
+SCSI_Out_DBx__DB7__LCD_EN EQU CYREG_PRT2_LCD_EN\r
+SCSI_Out_DBx__DB7__MASK EQU 0x04\r
+SCSI_Out_DBx__DB7__PC EQU CYREG_PRT2_PC2\r
+SCSI_Out_DBx__DB7__PORT EQU 2\r
+SCSI_Out_DBx__DB7__PRT EQU CYREG_PRT2_PRT\r
+SCSI_Out_DBx__DB7__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
+SCSI_Out_DBx__DB7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
+SCSI_Out_DBx__DB7__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
+SCSI_Out_DBx__DB7__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
+SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
+SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
+SCSI_Out_DBx__DB7__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
+SCSI_Out_DBx__DB7__PS EQU CYREG_PRT2_PS\r
+SCSI_Out_DBx__DB7__SHIFT EQU 2\r
+SCSI_Out_DBx__DB7__SLW EQU CYREG_PRT2_SLW\r
+\r
+; SD_RX_DMA\r
+SD_RX_DMA__DRQ_CTL EQU CYREG_IDMUX_DRQ_CTL0\r
+SD_RX_DMA__DRQ_NUMBER EQU 2\r
+SD_RX_DMA__NUMBEROF_TDS EQU 0\r
+SD_RX_DMA__PRIORITY EQU 0\r
+SD_RX_DMA__TERMIN_EN EQU 0\r
+SD_RX_DMA__TERMIN_SEL EQU 0\r
+SD_RX_DMA__TERMOUT0_EN EQU 1\r
+SD_RX_DMA__TERMOUT0_SEL EQU 2\r
+SD_RX_DMA__TERMOUT1_EN EQU 0\r
+SD_RX_DMA__TERMOUT1_SEL EQU 0\r
+SD_RX_DMA_COMPLETE__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
+SD_RX_DMA_COMPLETE__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
+SD_RX_DMA_COMPLETE__INTC_MASK EQU 0x20\r
+SD_RX_DMA_COMPLETE__INTC_NUMBER EQU 5\r
+SD_RX_DMA_COMPLETE__INTC_PRIOR_NUM EQU 7\r
+SD_RX_DMA_COMPLETE__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_5\r
+SD_RX_DMA_COMPLETE__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
+SD_RX_DMA_COMPLETE__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
+\r
+; SD_TX_DMA\r
+SD_TX_DMA__DRQ_CTL EQU CYREG_IDMUX_DRQ_CTL0\r
+SD_TX_DMA__DRQ_NUMBER EQU 3\r
+SD_TX_DMA__NUMBEROF_TDS EQU 0\r
+SD_TX_DMA__PRIORITY EQU 1\r
+SD_TX_DMA__TERMIN_EN EQU 0\r
+SD_TX_DMA__TERMIN_SEL EQU 0\r
+SD_TX_DMA__TERMOUT0_EN EQU 1\r
+SD_TX_DMA__TERMOUT0_SEL EQU 3\r
+SD_TX_DMA__TERMOUT1_EN EQU 0\r
+SD_TX_DMA__TERMOUT1_SEL EQU 0\r
+SD_TX_DMA_COMPLETE__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
+SD_TX_DMA_COMPLETE__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
+SD_TX_DMA_COMPLETE__INTC_MASK EQU 0x40\r
+SD_TX_DMA_COMPLETE__INTC_NUMBER EQU 6\r
+SD_TX_DMA_COMPLETE__INTC_PRIOR_NUM EQU 7\r
+SD_TX_DMA_COMPLETE__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_6\r
+SD_TX_DMA_COMPLETE__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
+SD_TX_DMA_COMPLETE__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
+\r
+; SCSI_Noise\r
+SCSI_Noise__0__AG EQU CYREG_PRT2_AG\r
+SCSI_Noise__0__AMUX EQU CYREG_PRT2_AMUX\r
+SCSI_Noise__0__BIE EQU CYREG_PRT2_BIE\r
+SCSI_Noise__0__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
+SCSI_Noise__0__BYP EQU CYREG_PRT2_BYP\r
+SCSI_Noise__0__CTL EQU CYREG_PRT2_CTL\r
+SCSI_Noise__0__DM0 EQU CYREG_PRT2_DM0\r
+SCSI_Noise__0__DM1 EQU CYREG_PRT2_DM1\r
+SCSI_Noise__0__DM2 EQU CYREG_PRT2_DM2\r
+SCSI_Noise__0__DR EQU CYREG_PRT2_DR\r
+SCSI_Noise__0__INP_DIS EQU CYREG_PRT2_INP_DIS\r
+SCSI_Noise__0__INTTYPE EQU CYREG_PICU2_INTTYPE0\r
+SCSI_Noise__0__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
+SCSI_Noise__0__LCD_EN EQU CYREG_PRT2_LCD_EN\r
+SCSI_Noise__0__MASK EQU 0x01\r
+SCSI_Noise__0__PC EQU CYREG_PRT2_PC0\r
+SCSI_Noise__0__PORT EQU 2\r
+SCSI_Noise__0__PRT EQU CYREG_PRT2_PRT\r
+SCSI_Noise__0__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
+SCSI_Noise__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
+SCSI_Noise__0__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
+SCSI_Noise__0__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
+SCSI_Noise__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
+SCSI_Noise__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
+SCSI_Noise__0__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
+SCSI_Noise__0__PS EQU CYREG_PRT2_PS\r
+SCSI_Noise__0__SHIFT EQU 0\r
+SCSI_Noise__0__SLW EQU CYREG_PRT2_SLW\r
+SCSI_Noise__1__AG EQU CYREG_PRT6_AG\r
+SCSI_Noise__1__AMUX EQU CYREG_PRT6_AMUX\r
+SCSI_Noise__1__BIE EQU CYREG_PRT6_BIE\r
+SCSI_Noise__1__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
+SCSI_Noise__1__BYP EQU CYREG_PRT6_BYP\r
+SCSI_Noise__1__CTL EQU CYREG_PRT6_CTL\r
+SCSI_Noise__1__DM0 EQU CYREG_PRT6_DM0\r
+SCSI_Noise__1__DM1 EQU CYREG_PRT6_DM1\r
+SCSI_Noise__1__DM2 EQU CYREG_PRT6_DM2\r
+SCSI_Noise__1__DR EQU CYREG_PRT6_DR\r
+SCSI_Noise__1__INP_DIS EQU CYREG_PRT6_INP_DIS\r
+SCSI_Noise__1__INTTYPE EQU CYREG_PICU6_INTTYPE3\r
+SCSI_Noise__1__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
+SCSI_Noise__1__LCD_EN EQU CYREG_PRT6_LCD_EN\r
+SCSI_Noise__1__MASK EQU 0x08\r
+SCSI_Noise__1__PC EQU CYREG_PRT6_PC3\r
+SCSI_Noise__1__PORT EQU 6\r
+SCSI_Noise__1__PRT EQU CYREG_PRT6_PRT\r
+SCSI_Noise__1__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
+SCSI_Noise__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
+SCSI_Noise__1__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
+SCSI_Noise__1__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
+SCSI_Noise__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
+SCSI_Noise__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
+SCSI_Noise__1__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
+SCSI_Noise__1__PS EQU CYREG_PRT6_PS\r
+SCSI_Noise__1__SHIFT EQU 3\r
+SCSI_Noise__1__SLW EQU CYREG_PRT6_SLW\r
+SCSI_Noise__2__AG EQU CYREG_PRT4_AG\r
+SCSI_Noise__2__AMUX EQU CYREG_PRT4_AMUX\r
+SCSI_Noise__2__BIE EQU CYREG_PRT4_BIE\r
+SCSI_Noise__2__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
+SCSI_Noise__2__BYP EQU CYREG_PRT4_BYP\r
+SCSI_Noise__2__CTL EQU CYREG_PRT4_CTL\r
+SCSI_Noise__2__DM0 EQU CYREG_PRT4_DM0\r
+SCSI_Noise__2__DM1 EQU CYREG_PRT4_DM1\r
+SCSI_Noise__2__DM2 EQU CYREG_PRT4_DM2\r
+SCSI_Noise__2__DR EQU CYREG_PRT4_DR\r
+SCSI_Noise__2__INP_DIS EQU CYREG_PRT4_INP_DIS\r
+SCSI_Noise__2__INTTYPE EQU CYREG_PICU4_INTTYPE3\r
+SCSI_Noise__2__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
+SCSI_Noise__2__LCD_EN EQU CYREG_PRT4_LCD_EN\r
+SCSI_Noise__2__MASK EQU 0x08\r
+SCSI_Noise__2__PC EQU CYREG_PRT4_PC3\r
+SCSI_Noise__2__PORT EQU 4\r
+SCSI_Noise__2__PRT EQU CYREG_PRT4_PRT\r
+SCSI_Noise__2__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
+SCSI_Noise__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
+SCSI_Noise__2__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
+SCSI_Noise__2__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
+SCSI_Noise__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
+SCSI_Noise__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
+SCSI_Noise__2__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
+SCSI_Noise__2__PS EQU CYREG_PRT4_PS\r
+SCSI_Noise__2__SHIFT EQU 3\r
+SCSI_Noise__2__SLW EQU CYREG_PRT4_SLW\r
+SCSI_Noise__3__AG EQU CYREG_PRT4_AG\r
+SCSI_Noise__3__AMUX EQU CYREG_PRT4_AMUX\r
+SCSI_Noise__3__BIE EQU CYREG_PRT4_BIE\r
+SCSI_Noise__3__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
+SCSI_Noise__3__BYP EQU CYREG_PRT4_BYP\r
+SCSI_Noise__3__CTL EQU CYREG_PRT4_CTL\r
+SCSI_Noise__3__DM0 EQU CYREG_PRT4_DM0\r
+SCSI_Noise__3__DM1 EQU CYREG_PRT4_DM1\r
+SCSI_Noise__3__DM2 EQU CYREG_PRT4_DM2\r
+SCSI_Noise__3__DR EQU CYREG_PRT4_DR\r
+SCSI_Noise__3__INP_DIS EQU CYREG_PRT4_INP_DIS\r
+SCSI_Noise__3__INTTYPE EQU CYREG_PICU4_INTTYPE7\r
+SCSI_Noise__3__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
+SCSI_Noise__3__LCD_EN EQU CYREG_PRT4_LCD_EN\r
+SCSI_Noise__3__MASK EQU 0x80\r
+SCSI_Noise__3__PC EQU CYREG_PRT4_PC7\r
+SCSI_Noise__3__PORT EQU 4\r
+SCSI_Noise__3__PRT EQU CYREG_PRT4_PRT\r
+SCSI_Noise__3__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
+SCSI_Noise__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
+SCSI_Noise__3__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
+SCSI_Noise__3__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
+SCSI_Noise__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
+SCSI_Noise__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
+SCSI_Noise__3__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
+SCSI_Noise__3__PS EQU CYREG_PRT4_PS\r
+SCSI_Noise__3__SHIFT EQU 7\r
+SCSI_Noise__3__SLW EQU CYREG_PRT4_SLW\r
+SCSI_Noise__4__AG EQU CYREG_PRT6_AG\r
+SCSI_Noise__4__AMUX EQU CYREG_PRT6_AMUX\r
+SCSI_Noise__4__BIE EQU CYREG_PRT6_BIE\r
+SCSI_Noise__4__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
+SCSI_Noise__4__BYP EQU CYREG_PRT6_BYP\r
+SCSI_Noise__4__CTL EQU CYREG_PRT6_CTL\r
+SCSI_Noise__4__DM0 EQU CYREG_PRT6_DM0\r
+SCSI_Noise__4__DM1 EQU CYREG_PRT6_DM1\r
+SCSI_Noise__4__DM2 EQU CYREG_PRT6_DM2\r
+SCSI_Noise__4__DR EQU CYREG_PRT6_DR\r
+SCSI_Noise__4__INP_DIS EQU CYREG_PRT6_INP_DIS\r
+SCSI_Noise__4__INTTYPE EQU CYREG_PICU6_INTTYPE2\r
+SCSI_Noise__4__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
+SCSI_Noise__4__LCD_EN EQU CYREG_PRT6_LCD_EN\r
+SCSI_Noise__4__MASK EQU 0x04\r
+SCSI_Noise__4__PC EQU CYREG_PRT6_PC2\r
+SCSI_Noise__4__PORT EQU 6\r
+SCSI_Noise__4__PRT EQU CYREG_PRT6_PRT\r
+SCSI_Noise__4__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
+SCSI_Noise__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
+SCSI_Noise__4__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
+SCSI_Noise__4__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
+SCSI_Noise__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
+SCSI_Noise__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
+SCSI_Noise__4__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
+SCSI_Noise__4__PS EQU CYREG_PRT6_PS\r
+SCSI_Noise__4__SHIFT EQU 2\r
+SCSI_Noise__4__SLW EQU CYREG_PRT6_SLW\r
+SCSI_Noise__ACK__AG EQU CYREG_PRT6_AG\r
+SCSI_Noise__ACK__AMUX EQU CYREG_PRT6_AMUX\r
+SCSI_Noise__ACK__BIE EQU CYREG_PRT6_BIE\r
+SCSI_Noise__ACK__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
+SCSI_Noise__ACK__BYP EQU CYREG_PRT6_BYP\r
+SCSI_Noise__ACK__CTL EQU CYREG_PRT6_CTL\r
+SCSI_Noise__ACK__DM0 EQU CYREG_PRT6_DM0\r
+SCSI_Noise__ACK__DM1 EQU CYREG_PRT6_DM1\r
+SCSI_Noise__ACK__DM2 EQU CYREG_PRT6_DM2\r
+SCSI_Noise__ACK__DR EQU CYREG_PRT6_DR\r
+SCSI_Noise__ACK__INP_DIS EQU CYREG_PRT6_INP_DIS\r
+SCSI_Noise__ACK__INTTYPE EQU CYREG_PICU6_INTTYPE2\r
+SCSI_Noise__ACK__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
+SCSI_Noise__ACK__LCD_EN EQU CYREG_PRT6_LCD_EN\r
+SCSI_Noise__ACK__MASK EQU 0x04\r
+SCSI_Noise__ACK__PC EQU CYREG_PRT6_PC2\r
+SCSI_Noise__ACK__PORT EQU 6\r
+SCSI_Noise__ACK__PRT EQU CYREG_PRT6_PRT\r
+SCSI_Noise__ACK__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
+SCSI_Noise__ACK__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
+SCSI_Noise__ACK__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
+SCSI_Noise__ACK__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
+SCSI_Noise__ACK__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
+SCSI_Noise__ACK__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
+SCSI_Noise__ACK__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
+SCSI_Noise__ACK__PS EQU CYREG_PRT6_PS\r
+SCSI_Noise__ACK__SHIFT EQU 2\r
+SCSI_Noise__ACK__SLW EQU CYREG_PRT6_SLW\r
+SCSI_Noise__ATN__AG EQU CYREG_PRT2_AG\r
+SCSI_Noise__ATN__AMUX EQU CYREG_PRT2_AMUX\r
+SCSI_Noise__ATN__BIE EQU CYREG_PRT2_BIE\r
+SCSI_Noise__ATN__BIT_MASK EQU CYREG_PRT2_BIT_MASK\r
+SCSI_Noise__ATN__BYP EQU CYREG_PRT2_BYP\r
+SCSI_Noise__ATN__CTL EQU CYREG_PRT2_CTL\r
+SCSI_Noise__ATN__DM0 EQU CYREG_PRT2_DM0\r
+SCSI_Noise__ATN__DM1 EQU CYREG_PRT2_DM1\r
+SCSI_Noise__ATN__DM2 EQU CYREG_PRT2_DM2\r
+SCSI_Noise__ATN__DR EQU CYREG_PRT2_DR\r
+SCSI_Noise__ATN__INP_DIS EQU CYREG_PRT2_INP_DIS\r
+SCSI_Noise__ATN__INTTYPE EQU CYREG_PICU2_INTTYPE0\r
+SCSI_Noise__ATN__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG\r
+SCSI_Noise__ATN__LCD_EN EQU CYREG_PRT2_LCD_EN\r
+SCSI_Noise__ATN__MASK EQU 0x01\r
+SCSI_Noise__ATN__PC EQU CYREG_PRT2_PC0\r
+SCSI_Noise__ATN__PORT EQU 2\r
+SCSI_Noise__ATN__PRT EQU CYREG_PRT2_PRT\r
+SCSI_Noise__ATN__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL\r
+SCSI_Noise__ATN__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN\r
+SCSI_Noise__ATN__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0\r
+SCSI_Noise__ATN__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1\r
+SCSI_Noise__ATN__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0\r
+SCSI_Noise__ATN__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1\r
+SCSI_Noise__ATN__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT\r
+SCSI_Noise__ATN__PS EQU CYREG_PRT2_PS\r
+SCSI_Noise__ATN__SHIFT EQU 0\r
+SCSI_Noise__ATN__SLW EQU CYREG_PRT2_SLW\r
+SCSI_Noise__BSY__AG EQU CYREG_PRT6_AG\r
+SCSI_Noise__BSY__AMUX EQU CYREG_PRT6_AMUX\r
+SCSI_Noise__BSY__BIE EQU CYREG_PRT6_BIE\r
+SCSI_Noise__BSY__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
+SCSI_Noise__BSY__BYP EQU CYREG_PRT6_BYP\r
+SCSI_Noise__BSY__CTL EQU CYREG_PRT6_CTL\r
+SCSI_Noise__BSY__DM0 EQU CYREG_PRT6_DM0\r
+SCSI_Noise__BSY__DM1 EQU CYREG_PRT6_DM1\r
+SCSI_Noise__BSY__DM2 EQU CYREG_PRT6_DM2\r
+SCSI_Noise__BSY__DR EQU CYREG_PRT6_DR\r
+SCSI_Noise__BSY__INP_DIS EQU CYREG_PRT6_INP_DIS\r
+SCSI_Noise__BSY__INTTYPE EQU CYREG_PICU6_INTTYPE3\r
+SCSI_Noise__BSY__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
+SCSI_Noise__BSY__LCD_EN EQU CYREG_PRT6_LCD_EN\r
+SCSI_Noise__BSY__MASK EQU 0x08\r
+SCSI_Noise__BSY__PC EQU CYREG_PRT6_PC3\r
+SCSI_Noise__BSY__PORT EQU 6\r
+SCSI_Noise__BSY__PRT EQU CYREG_PRT6_PRT\r
+SCSI_Noise__BSY__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
+SCSI_Noise__BSY__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
+SCSI_Noise__BSY__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
+SCSI_Noise__BSY__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
+SCSI_Noise__BSY__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
+SCSI_Noise__BSY__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
+SCSI_Noise__BSY__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
+SCSI_Noise__BSY__PS EQU CYREG_PRT6_PS\r
+SCSI_Noise__BSY__SHIFT EQU 3\r
+SCSI_Noise__BSY__SLW EQU CYREG_PRT6_SLW\r
+SCSI_Noise__RST__AG EQU CYREG_PRT4_AG\r
+SCSI_Noise__RST__AMUX EQU CYREG_PRT4_AMUX\r
+SCSI_Noise__RST__BIE EQU CYREG_PRT4_BIE\r
+SCSI_Noise__RST__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
+SCSI_Noise__RST__BYP EQU CYREG_PRT4_BYP\r
+SCSI_Noise__RST__CTL EQU CYREG_PRT4_CTL\r
+SCSI_Noise__RST__DM0 EQU CYREG_PRT4_DM0\r
+SCSI_Noise__RST__DM1 EQU CYREG_PRT4_DM1\r
+SCSI_Noise__RST__DM2 EQU CYREG_PRT4_DM2\r
+SCSI_Noise__RST__DR EQU CYREG_PRT4_DR\r
+SCSI_Noise__RST__INP_DIS EQU CYREG_PRT4_INP_DIS\r
+SCSI_Noise__RST__INTTYPE EQU CYREG_PICU4_INTTYPE7\r
+SCSI_Noise__RST__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
+SCSI_Noise__RST__LCD_EN EQU CYREG_PRT4_LCD_EN\r
+SCSI_Noise__RST__MASK EQU 0x80\r
+SCSI_Noise__RST__PC EQU CYREG_PRT4_PC7\r
+SCSI_Noise__RST__PORT EQU 4\r
+SCSI_Noise__RST__PRT EQU CYREG_PRT4_PRT\r
+SCSI_Noise__RST__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
+SCSI_Noise__RST__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
+SCSI_Noise__RST__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
+SCSI_Noise__RST__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
+SCSI_Noise__RST__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
+SCSI_Noise__RST__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
+SCSI_Noise__RST__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
+SCSI_Noise__RST__PS EQU CYREG_PRT4_PS\r
+SCSI_Noise__RST__SHIFT EQU 7\r
+SCSI_Noise__RST__SLW EQU CYREG_PRT4_SLW\r
+SCSI_Noise__SEL__AG EQU CYREG_PRT4_AG\r
+SCSI_Noise__SEL__AMUX EQU CYREG_PRT4_AMUX\r
+SCSI_Noise__SEL__BIE EQU CYREG_PRT4_BIE\r
+SCSI_Noise__SEL__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
+SCSI_Noise__SEL__BYP EQU CYREG_PRT4_BYP\r
+SCSI_Noise__SEL__CTL EQU CYREG_PRT4_CTL\r
+SCSI_Noise__SEL__DM0 EQU CYREG_PRT4_DM0\r
+SCSI_Noise__SEL__DM1 EQU CYREG_PRT4_DM1\r
+SCSI_Noise__SEL__DM2 EQU CYREG_PRT4_DM2\r
+SCSI_Noise__SEL__DR EQU CYREG_PRT4_DR\r
+SCSI_Noise__SEL__INP_DIS EQU CYREG_PRT4_INP_DIS\r
+SCSI_Noise__SEL__INTTYPE EQU CYREG_PICU4_INTTYPE3\r
+SCSI_Noise__SEL__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
+SCSI_Noise__SEL__LCD_EN EQU CYREG_PRT4_LCD_EN\r
+SCSI_Noise__SEL__MASK EQU 0x08\r
+SCSI_Noise__SEL__PC EQU CYREG_PRT4_PC3\r
+SCSI_Noise__SEL__PORT EQU 4\r
+SCSI_Noise__SEL__PRT EQU CYREG_PRT4_PRT\r
+SCSI_Noise__SEL__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
+SCSI_Noise__SEL__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
+SCSI_Noise__SEL__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
+SCSI_Noise__SEL__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
+SCSI_Noise__SEL__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
+SCSI_Noise__SEL__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
+SCSI_Noise__SEL__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
+SCSI_Noise__SEL__PS EQU CYREG_PRT4_PS\r
+SCSI_Noise__SEL__SHIFT EQU 3\r
+SCSI_Noise__SEL__SLW EQU CYREG_PRT4_SLW\r
+\r
; scsiTarget\r
scsiTarget_datapath__16BIT_A0_REG EQU CYREG_B0_UDB00_01_A0\r
scsiTarget_datapath__16BIT_A1_REG EQU CYREG_B0_UDB00_01_A1\r
scsiTarget_StatusReg__0__POS EQU 0\r
scsiTarget_StatusReg__1__MASK EQU 0x02\r
scsiTarget_StatusReg__1__POS EQU 1\r
-scsiTarget_StatusReg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB02_03_ACTL\r
-scsiTarget_StatusReg__16BIT_STATUS_REG EQU CYREG_B0_UDB02_03_ST\r
+scsiTarget_StatusReg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB07_08_ACTL\r
+scsiTarget_StatusReg__16BIT_STATUS_REG EQU CYREG_B0_UDB07_08_ST\r
scsiTarget_StatusReg__2__MASK EQU 0x04\r
scsiTarget_StatusReg__2__POS EQU 2\r
scsiTarget_StatusReg__3__MASK EQU 0x08\r
scsiTarget_StatusReg__4__MASK EQU 0x10\r
scsiTarget_StatusReg__4__POS EQU 4\r
scsiTarget_StatusReg__MASK EQU 0x1F\r
-scsiTarget_StatusReg__MASK_REG EQU CYREG_B0_UDB02_MSK\r
-scsiTarget_StatusReg__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB02_ACTL\r
-scsiTarget_StatusReg__STATUS_REG EQU CYREG_B0_UDB02_ST\r
+scsiTarget_StatusReg__MASK_REG EQU CYREG_B0_UDB07_MSK\r
+scsiTarget_StatusReg__MASK_ST_AUX_CTL_REG EQU CYREG_B0_UDB07_MSK_ACTL\r
+scsiTarget_StatusReg__PER_ST_AUX_CTL_REG EQU CYREG_B0_UDB07_MSK_ACTL\r
+scsiTarget_StatusReg__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB07_ACTL\r
+scsiTarget_StatusReg__STATUS_CNT_REG EQU CYREG_B0_UDB07_ST_CTL\r
+scsiTarget_StatusReg__STATUS_CONTROL_REG EQU CYREG_B0_UDB07_ST_CTL\r
+scsiTarget_StatusReg__STATUS_REG EQU CYREG_B0_UDB07_ST\r
+\r
+; Debug_Timer\r
+Debug_Timer_Interrupt__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
+Debug_Timer_Interrupt__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
+Debug_Timer_Interrupt__INTC_MASK EQU 0x01\r
+Debug_Timer_Interrupt__INTC_NUMBER EQU 0\r
+Debug_Timer_Interrupt__INTC_PRIOR_NUM EQU 7\r
+Debug_Timer_Interrupt__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_0\r
+Debug_Timer_Interrupt__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
+Debug_Timer_Interrupt__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
+Debug_Timer_TimerHW__CAP0 EQU CYREG_TMR0_CAP0\r
+Debug_Timer_TimerHW__CAP1 EQU CYREG_TMR0_CAP1\r
+Debug_Timer_TimerHW__CFG0 EQU CYREG_TMR0_CFG0\r
+Debug_Timer_TimerHW__CFG1 EQU CYREG_TMR0_CFG1\r
+Debug_Timer_TimerHW__CFG2 EQU CYREG_TMR0_CFG2\r
+Debug_Timer_TimerHW__CNT_CMP0 EQU CYREG_TMR0_CNT_CMP0\r
+Debug_Timer_TimerHW__CNT_CMP1 EQU CYREG_TMR0_CNT_CMP1\r
+Debug_Timer_TimerHW__PER0 EQU CYREG_TMR0_PER0\r
+Debug_Timer_TimerHW__PER1 EQU CYREG_TMR0_PER1\r
+Debug_Timer_TimerHW__PM_ACT_CFG EQU CYREG_PM_ACT_CFG3\r
+Debug_Timer_TimerHW__PM_ACT_MSK EQU 0x01\r
+Debug_Timer_TimerHW__PM_STBY_CFG EQU CYREG_PM_STBY_CFG3\r
+Debug_Timer_TimerHW__PM_STBY_MSK EQU 0x01\r
+Debug_Timer_TimerHW__RT0 EQU CYREG_TMR0_RT0\r
+Debug_Timer_TimerHW__RT1 EQU CYREG_TMR0_RT1\r
+Debug_Timer_TimerHW__SR0 EQU CYREG_TMR0_SR0\r
+\r
+; SCSI_RX_DMA\r
+SCSI_RX_DMA__DRQ_CTL EQU CYREG_IDMUX_DRQ_CTL0\r
+SCSI_RX_DMA__DRQ_NUMBER EQU 0\r
+SCSI_RX_DMA__NUMBEROF_TDS EQU 0\r
+SCSI_RX_DMA__PRIORITY EQU 2\r
+SCSI_RX_DMA__TERMIN_EN EQU 0\r
+SCSI_RX_DMA__TERMIN_SEL EQU 0\r
+SCSI_RX_DMA__TERMOUT0_EN EQU 1\r
+SCSI_RX_DMA__TERMOUT0_SEL EQU 0\r
+SCSI_RX_DMA__TERMOUT1_EN EQU 0\r
+SCSI_RX_DMA__TERMOUT1_SEL EQU 0\r
+SCSI_RX_DMA_COMPLETE__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
+SCSI_RX_DMA_COMPLETE__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
+SCSI_RX_DMA_COMPLETE__INTC_MASK EQU 0x04\r
+SCSI_RX_DMA_COMPLETE__INTC_NUMBER EQU 2\r
+SCSI_RX_DMA_COMPLETE__INTC_PRIOR_NUM EQU 7\r
+SCSI_RX_DMA_COMPLETE__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_2\r
+SCSI_RX_DMA_COMPLETE__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
+SCSI_RX_DMA_COMPLETE__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
+\r
+; SCSI_TX_DMA\r
+SCSI_TX_DMA__DRQ_CTL EQU CYREG_IDMUX_DRQ_CTL0\r
+SCSI_TX_DMA__DRQ_NUMBER EQU 1\r
+SCSI_TX_DMA__NUMBEROF_TDS EQU 0\r
+SCSI_TX_DMA__PRIORITY EQU 2\r
+SCSI_TX_DMA__TERMIN_EN EQU 0\r
+SCSI_TX_DMA__TERMIN_SEL EQU 0\r
+SCSI_TX_DMA__TERMOUT0_EN EQU 1\r
+SCSI_TX_DMA__TERMOUT0_SEL EQU 1\r
+SCSI_TX_DMA__TERMOUT1_EN EQU 0\r
+SCSI_TX_DMA__TERMOUT1_SEL EQU 0\r
+SCSI_TX_DMA_COMPLETE__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
+SCSI_TX_DMA_COMPLETE__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
+SCSI_TX_DMA_COMPLETE__INTC_MASK EQU 0x10\r
+SCSI_TX_DMA_COMPLETE__INTC_NUMBER EQU 4\r
+SCSI_TX_DMA_COMPLETE__INTC_PRIOR_NUM EQU 7\r
+SCSI_TX_DMA_COMPLETE__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_4\r
+SCSI_TX_DMA_COMPLETE__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
+SCSI_TX_DMA_COMPLETE__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
+\r
+; SD_Data_Clk\r
+SD_Data_Clk__CFG0 EQU CYREG_CLKDIST_DCFG0_CFG0\r
+SD_Data_Clk__CFG1 EQU CYREG_CLKDIST_DCFG0_CFG1\r
+SD_Data_Clk__CFG2 EQU CYREG_CLKDIST_DCFG0_CFG2\r
+SD_Data_Clk__CFG2_SRC_SEL_MASK EQU 0x07\r
+SD_Data_Clk__INDEX EQU 0x00\r
+SD_Data_Clk__PM_ACT_CFG EQU CYREG_PM_ACT_CFG2\r
+SD_Data_Clk__PM_ACT_MSK EQU 0x01\r
+SD_Data_Clk__PM_STBY_CFG EQU CYREG_PM_STBY_CFG2\r
+SD_Data_Clk__PM_STBY_MSK EQU 0x01\r
\r
; timer_clock\r
timer_clock__CFG0 EQU CYREG_CLKDIST_DCFG2_CFG0\r
timer_clock__PM_STBY_CFG EQU CYREG_PM_STBY_CFG2\r
timer_clock__PM_STBY_MSK EQU 0x04\r
\r
+; SCSI_RST_ISR\r
+SCSI_RST_ISR__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
+SCSI_RST_ISR__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
+SCSI_RST_ISR__INTC_MASK EQU 0x02\r
+SCSI_RST_ISR__INTC_NUMBER EQU 1\r
+SCSI_RST_ISR__INTC_PRIOR_NUM EQU 7\r
+SCSI_RST_ISR__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_1\r
+SCSI_RST_ISR__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
+SCSI_RST_ISR__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
+\r
+; SCSI_SEL_ISR\r
+SCSI_SEL_ISR__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
+SCSI_SEL_ISR__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
+SCSI_SEL_ISR__INTC_MASK EQU 0x08\r
+SCSI_SEL_ISR__INTC_NUMBER EQU 3\r
+SCSI_SEL_ISR__INTC_PRIOR_NUM EQU 7\r
+SCSI_SEL_ISR__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_3\r
+SCSI_SEL_ISR__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
+SCSI_SEL_ISR__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
+\r
+; SCSI_Filtered\r
+SCSI_Filtered_sts_sts_reg__0__MASK EQU 0x01\r
+SCSI_Filtered_sts_sts_reg__0__POS EQU 0\r
+SCSI_Filtered_sts_sts_reg__1__MASK EQU 0x02\r
+SCSI_Filtered_sts_sts_reg__1__POS EQU 1\r
+SCSI_Filtered_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB13_14_ACTL\r
+SCSI_Filtered_sts_sts_reg__16BIT_STATUS_REG EQU CYREG_B0_UDB13_14_ST\r
+SCSI_Filtered_sts_sts_reg__2__MASK EQU 0x04\r
+SCSI_Filtered_sts_sts_reg__2__POS EQU 2\r
+SCSI_Filtered_sts_sts_reg__3__MASK EQU 0x08\r
+SCSI_Filtered_sts_sts_reg__3__POS EQU 3\r
+SCSI_Filtered_sts_sts_reg__4__MASK EQU 0x10\r
+SCSI_Filtered_sts_sts_reg__4__POS EQU 4\r
+SCSI_Filtered_sts_sts_reg__MASK EQU 0x1F\r
+SCSI_Filtered_sts_sts_reg__MASK_REG EQU CYREG_B0_UDB13_MSK\r
+SCSI_Filtered_sts_sts_reg__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB13_ACTL\r
+SCSI_Filtered_sts_sts_reg__STATUS_REG EQU CYREG_B0_UDB13_ST\r
+\r
+; SCSI_CTL_PHASE\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__0__MASK EQU 0x01\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__0__POS EQU 0\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__1__MASK EQU 0x02\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__1__POS EQU 1\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB02_03_ACTL\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB02_03_CTL\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB02_03_CTL\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB02_03_CTL\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB02_03_CTL\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB02_03_MSK\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB02_03_MSK\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB02_03_MSK\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB02_03_MSK\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__2__MASK EQU 0x04\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__2__POS EQU 2\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB02_ACTL\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB02_CTL\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB02_ST_CTL\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB02_CTL\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB02_ST_CTL\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__MASK EQU 0x07\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB02_MSK_ACTL\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB02_MSK_ACTL\r
+SCSI_CTL_PHASE_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB02_MSK\r
+\r
+; SCSI_Glitch_Ctl\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__0__MASK EQU 0x01\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__0__POS EQU 0\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB03_04_ACTL\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB03_04_CTL\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB03_04_CTL\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB03_04_CTL\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB03_04_CTL\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB03_04_MSK\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB03_04_MSK\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB03_04_MSK\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB03_04_MSK\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB03_ACTL\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB03_CTL\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB03_ST_CTL\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB03_CTL\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB03_ST_CTL\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__MASK EQU 0x01\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB03_MSK_ACTL\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB03_MSK_ACTL\r
+SCSI_Glitch_Ctl_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB03_MSK\r
+\r
+; SCSI_Parity_Error\r
+SCSI_Parity_Error_sts_sts_reg__0__MASK EQU 0x01\r
+SCSI_Parity_Error_sts_sts_reg__0__POS EQU 0\r
+SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB11_12_ACTL\r
+SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_REG EQU CYREG_B0_UDB11_12_ST\r
+SCSI_Parity_Error_sts_sts_reg__MASK EQU 0x01\r
+SCSI_Parity_Error_sts_sts_reg__MASK_REG EQU CYREG_B0_UDB11_MSK\r
+SCSI_Parity_Error_sts_sts_reg__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB11_ACTL\r
+SCSI_Parity_Error_sts_sts_reg__STATUS_REG EQU CYREG_B0_UDB11_ST\r
+\r
; Miscellaneous\r
BCLK__BUS_CLK__HZ EQU 50000000\r
BCLK__BUS_CLK__KHZ EQU 50000\r
BCLK__BUS_CLK__MHZ EQU 50\r
CYDEV_CHIP_DIE_LEOPARD EQU 1\r
-CYDEV_CHIP_DIE_PSOC4A EQU 16\r
+CYDEV_CHIP_DIE_PSOC4A EQU 18\r
CYDEV_CHIP_DIE_PSOC5LP EQU 2\r
CYDEV_CHIP_DIE_PSOC5TM EQU 3\r
CYDEV_CHIP_DIE_TMA4 EQU 4\r
CYDEV_CHIP_FAMILY_USED EQU CYDEV_CHIP_FAMILY_PSOC5\r
CYDEV_CHIP_JTAG_ID EQU 0x2E133069\r
CYDEV_CHIP_MEMBER_3A EQU 1\r
-CYDEV_CHIP_MEMBER_4A EQU 16\r
-CYDEV_CHIP_MEMBER_4D EQU 12\r
+CYDEV_CHIP_MEMBER_4A EQU 18\r
+CYDEV_CHIP_MEMBER_4D EQU 13\r
CYDEV_CHIP_MEMBER_4E EQU 6\r
-CYDEV_CHIP_MEMBER_4F EQU 17\r
+CYDEV_CHIP_MEMBER_4F EQU 19\r
CYDEV_CHIP_MEMBER_4G EQU 4\r
-CYDEV_CHIP_MEMBER_4H EQU 15\r
-CYDEV_CHIP_MEMBER_4I EQU 21\r
-CYDEV_CHIP_MEMBER_4J EQU 13\r
-CYDEV_CHIP_MEMBER_4K EQU 14\r
-CYDEV_CHIP_MEMBER_4L EQU 20\r
-CYDEV_CHIP_MEMBER_4M EQU 19\r
-CYDEV_CHIP_MEMBER_4N EQU 9\r
+CYDEV_CHIP_MEMBER_4H EQU 17\r
+CYDEV_CHIP_MEMBER_4I EQU 23\r
+CYDEV_CHIP_MEMBER_4J EQU 14\r
+CYDEV_CHIP_MEMBER_4K EQU 15\r
+CYDEV_CHIP_MEMBER_4L EQU 22\r
+CYDEV_CHIP_MEMBER_4M EQU 21\r
+CYDEV_CHIP_MEMBER_4N EQU 10\r
CYDEV_CHIP_MEMBER_4O EQU 7\r
-CYDEV_CHIP_MEMBER_4P EQU 18\r
-CYDEV_CHIP_MEMBER_4Q EQU 11\r
+CYDEV_CHIP_MEMBER_4P EQU 20\r
+CYDEV_CHIP_MEMBER_4Q EQU 12\r
CYDEV_CHIP_MEMBER_4R EQU 8\r
-CYDEV_CHIP_MEMBER_4S EQU 10\r
+CYDEV_CHIP_MEMBER_4S EQU 11\r
+CYDEV_CHIP_MEMBER_4T EQU 9\r
CYDEV_CHIP_MEMBER_4U EQU 5\r
+CYDEV_CHIP_MEMBER_4V EQU 16\r
CYDEV_CHIP_MEMBER_5A EQU 3\r
CYDEV_CHIP_MEMBER_5B EQU 2\r
-CYDEV_CHIP_MEMBER_6A EQU 22\r
-CYDEV_CHIP_MEMBER_FM3 EQU 26\r
-CYDEV_CHIP_MEMBER_FM4 EQU 27\r
-CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE1 EQU 23\r
-CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE2 EQU 24\r
-CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE3 EQU 25\r
+CYDEV_CHIP_MEMBER_6A EQU 24\r
+CYDEV_CHIP_MEMBER_FM3 EQU 28\r
+CYDEV_CHIP_MEMBER_FM4 EQU 29\r
+CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE1 EQU 25\r
+CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE2 EQU 26\r
+CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE3 EQU 27\r
CYDEV_CHIP_MEMBER_UNKNOWN EQU 0\r
CYDEV_CHIP_MEMBER_USED EQU CYDEV_CHIP_MEMBER_5B\r
CYDEV_CHIP_DIE_EXPECT EQU CYDEV_CHIP_MEMBER_USED\r
CYDEV_CHIP_REVISION_4A_ES0 EQU 17\r
CYDEV_CHIP_REVISION_4A_PRODUCTION EQU 17\r
CYDEV_CHIP_REVISION_4D_PRODUCTION EQU 0\r
+CYDEV_CHIP_REVISION_4E_CCG2_NO_USBPD EQU 0\r
CYDEV_CHIP_REVISION_4E_PRODUCTION EQU 0\r
CYDEV_CHIP_REVISION_4F_PRODUCTION EQU 0\r
CYDEV_CHIP_REVISION_4F_PRODUCTION_256DMA EQU 0\r
CYDEV_CHIP_REVISION_4Q_PRODUCTION EQU 0\r
CYDEV_CHIP_REVISION_4R_PRODUCTION EQU 0\r
CYDEV_CHIP_REVISION_4S_PRODUCTION EQU 0\r
+CYDEV_CHIP_REVISION_4T_PRODUCTION EQU 0\r
CYDEV_CHIP_REVISION_4U_PRODUCTION EQU 0\r
+CYDEV_CHIP_REVISION_4V_PRODUCTION EQU 0\r
CYDEV_CHIP_REVISION_5A_ES0 EQU 0\r
CYDEV_CHIP_REVISION_5A_ES1 EQU 1\r
CYDEV_CHIP_REVISION_5A_PRODUCTION EQU 1\r
CYDEV_CHIP_REVISION_5B_ES0 EQU 0\r
CYDEV_CHIP_REVISION_5B_PRODUCTION EQU 0\r
-CYDEV_CHIP_REVISION_6A_NO_UDB EQU 0\r
-CYDEV_CHIP_REVISION_6A_PRODUCTION EQU 0\r
+CYDEV_CHIP_REVISION_6A_ES EQU 17\r
+CYDEV_CHIP_REVISION_6A_NO_UDB EQU 33\r
+CYDEV_CHIP_REVISION_6A_PRODUCTION EQU 33\r
CYDEV_CHIP_REVISION_FM3_PRODUCTION EQU 0\r
CYDEV_CHIP_REVISION_FM4_PRODUCTION EQU 0\r
CYDEV_CHIP_REVISION_PDL_FM0P_TYPE1_PRODUCTION EQU 0\r
/*******************************************************************************\r
* File Name: cymetadata.c\r
* \r
-* PSoC Creator 4.1\r
+* PSoC Creator 4.2\r
*\r
* Description:\r
* This file defines all extra memory spaces that need to be included.\r
* This file is automatically generated by PSoC Creator.\r
*\r
********************************************************************************\r
-* Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.\r
+* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.\r
* You may use this file only in accordance with the license, terms, conditions, \r
* disclaimers, and limitations in the end user license agreement accompanying \r
* the software package with which this file was provided.\r
/*******************************************************************************\r
* File Name: project.h\r
* \r
-* PSoC Creator 4.1\r
+* PSoC Creator 4.2\r
*\r
* Description:\r
* It contains references to all generated header files and should not be modified.\r
* This file is automatically generated by PSoC Creator.\r
*\r
********************************************************************************\r
-* Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.\r
+* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.\r
* You may use this file only in accordance with the license, terms, conditions, \r
* disclaimers, and limitations in the end user license agreement accompanying \r
* the software package with which this file was provided.\r
#include "cyPm.h"\r
#include "CySpc.h"\r
#include "cytypes.h"\r
+#include "cy_em_eeprom.h"\r
\r
/*[]*/\r
\r
<?xml version="1.0" encoding="utf-8"?>\r
<blockRegMap version="1" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://cypress.com/xsd/cyblockregmap cyblockregmap.xsd" xmlns="http://cypress.com/xsd/cyblockregmap">\r
+ <block name="SCSI_RX_DMA" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
<block name="SD_TX_DMA_COMPLETE" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
<block name="SD_RX_DMA_COMPLETE" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
- <block name="SD_TX_DMA" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
- <block name="SCSI_Parity_Error" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">\r
- <register name="SCSI_Parity_Error_STATUS_REG" address="0x40006465" bitWidth="8" desc="" hidden="false" />\r
- <register name="SCSI_Parity_Error_MASK_REG" address="0x40006485" bitWidth="8" desc="" hidden="false" />\r
- <register name="SCSI_Parity_Error_STATUS_AUX_CTL_REG" address="0x40006495" bitWidth="8" desc="" hidden="false">\r
+ <block name="SCSI_Filtered" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">\r
+ <register name="SCSI_Filtered_STATUS_REG" address="0x4000646D" bitWidth="8" desc="" hidden="false" />\r
+ <register name="SCSI_Filtered_MASK_REG" address="0x4000648D" bitWidth="8" desc="" hidden="false" />\r
+ <register name="SCSI_Filtered_STATUS_AUX_CTL_REG" address="0x4000649D" bitWidth="8" desc="" hidden="false">\r
<field name="FIFO0" from="5" to="5" access="RW" resetVal="" desc="FIFO0 clear" hidden="false">\r
<value name="ENABLED" value="1" desc="Enable counter" />\r
<value name="DISABLED" value="0" desc="Disable counter" />\r
</field>\r
</register>\r
</block>\r
- <block name="SCSI_RX_DMA_COMPLETE" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
- <block name="SCSI_RX_DMA" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
- <block name="Debug_Timer_Interrupt" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
- <block name="ZeroTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
- <block name="timer_clock" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
- <block name="SD_RX_DMA" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
- <block name="SCSI_TX_DMA_COMPLETE" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
- <block name="SCSI_TX_DMA" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
- <block name="SCSI_Filtered" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">\r
- <register name="SCSI_Filtered_STATUS_REG" address="0x4000646B" bitWidth="8" desc="" hidden="false" />\r
- <register name="SCSI_Filtered_MASK_REG" address="0x4000648B" bitWidth="8" desc="" hidden="false" />\r
- <register name="SCSI_Filtered_STATUS_AUX_CTL_REG" address="0x4000649B" bitWidth="8" desc="" hidden="false">\r
+ <block name="SCSI_Parity_Error" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">\r
+ <register name="SCSI_Parity_Error_STATUS_REG" address="0x4000646B" bitWidth="8" desc="" hidden="false" />\r
+ <register name="SCSI_Parity_Error_MASK_REG" address="0x4000648B" bitWidth="8" desc="" hidden="false" />\r
+ <register name="SCSI_Parity_Error_STATUS_AUX_CTL_REG" address="0x4000649B" bitWidth="8" desc="" hidden="false">\r
<field name="FIFO0" from="5" to="5" access="RW" resetVal="" desc="FIFO0 clear" hidden="false">\r
<value name="ENABLED" value="1" desc="Enable counter" />\r
<value name="DISABLED" value="0" desc="Disable counter" />\r
</field>\r
</register>\r
</block>\r
+ <block name="SCSI_RX_DMA_COMPLETE" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
+ <block name="SD_TX_DMA" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
+ <block name="Debug_Timer_Interrupt" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
+ <block name="ZeroTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
+ <block name="timer_clock" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
+ <block name="SD_RX_DMA" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
+ <block name="SCSI_TX_DMA_COMPLETE" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
+ <block name="SCSI_TX_DMA" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
+ <block name="mux_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
<block name="SCSI_SEL_ISR" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
<block name="cydff_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
- <block name="Clock_4" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
+ <block name="Em_EEPROM_Dynamic" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
<block name="cy_boot" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
<block name="SCSI_Glitch_Ctl" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">\r
- <register name="SCSI_Glitch_Ctl_CONTROL_REG" address="0x40006474" bitWidth="8" desc="" hidden="false" />\r
+ <register name="SCSI_Glitch_Ctl_CONTROL_REG" address="0x40006473" bitWidth="8" desc="" hidden="false" />\r
</block>\r
- <block name="mux_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
+ <block name="Clock_4" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
<block name="cydff_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
<block name="cy_constant_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
<block name="GlitchFilter_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
<block name="not_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
<block name="EXTLED" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
<block name="Clock_3" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
- <block name="Debug_Timer" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">\r
- <block name="VirtualMux_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
- <block name="ZeroTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
- <block name="TimerHW" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
- <block name="OneTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
- <block name="VirtualMux_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
- <block name="VirtualMux_3" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
- <register name="Debug_Timer_GLOBAL_ENABLE" address="0x400043A3" bitWidth="8" desc="PM.ACT.CFG" hidden="false">\r
- <field name="en_timer" from="3" to="0" access="RW" resetVal="" desc="Enable timer/counters." hidden="false" />\r
- </register>\r
- <register name="Debug_Timer_CONTROL" address="0x40004F00" bitWidth="8" desc="TMRx.CFG0" hidden="false">\r
- <field name="EN" from="0" to="0" access="RW" resetVal="" desc="Enables timer/comparator." hidden="false" />\r
- <field name="MODE" from="1" to="1" access="RW" resetVal="" desc="Mode. (0 = Timer; 1 = Comparator)" hidden="false">\r
- <value name="Timer" value="0" desc="Timer mode. CNT/CMP register holds timer count value." />\r
- <value name="Comparator" value="1" desc="Comparator mode. CNT/CMP register holds comparator threshold value." />\r
- </field>\r
- <field name="ONESHOT" from="2" to="2" access="RW" resetVal="" desc="Timer stops upon reaching stop condition defined by TMR_CFG bits. Can be restarted by asserting TIMER RESET or disabling and re-enabling block." hidden="false" />\r
- <field name="CMP_BUFF" from="3" to="3" access="RW" resetVal="" desc="Buffer compare register. Compare register updates only on timer terminal count." hidden="false" />\r
- <field name="INV" from="4" to="4" access="RW" resetVal="" desc="Invert sense of TIMEREN signal" hidden="false" />\r
- <field name="DB" from="5" to="5" access="RW" resetVal="" desc="Deadband mode--Deadband phases phi1 and phi2 are outputted on CMP and TC output pins respectively." hidden="false">\r
- <value name="Timer" value="0" desc="CMP and TC are output." />\r
- <value name="Deadband" value="1" desc="PHI1 (instead of CMP) and PHI2 (instead of TC) are output." />\r
- </field>\r
- <field name="DEADBAND_PERIOD" from="7" to="6" access="RW" resetVal="" desc="Deadband Period" hidden="false" />\r
- </register>\r
- <register name="Debug_Timer_CONTROL2" address="0x40004F01" bitWidth="8" desc="TMRx.CFG1" hidden="false">\r
- <field name="IRQ_SEL" from="0" to="0" access="RW" resetVal="" desc="Irq selection. (0 = raw interrupts; 1 = status register interrupts)" hidden="false" />\r
- <field name="FTC" from="1" to="1" access="RW" resetVal="" desc="First Terminal Count (FTC). Setting this bit forces a single pulse on the TC pin when first enabled." hidden="false">\r
- <value name="Disable FTC" value="0" desc="Disable the single cycle pulse, which signifies the timer is starting." />\r
- <value name="Enable FTC" value="1" desc="Enable the single cycle pulse, which signifies the timer is starting." />\r
- </field>\r
- <field name="DCOR" from="2" to="2" access="RW" resetVal="" desc="Disable Clear on Read (DCOR) of Status Register SR0." hidden="false" />\r
- <field name="DBMODE" from="3" to="3" access="RW" resetVal="" desc="Deadband mode (asynchronous/synchronous). CMP output pin is also affected when not in deadband mode (CFG0.DEADBAND)." hidden="false" />\r
- <field name="CLK_BUS_EN_SEL" from="6" to="4" access="RW" resetVal="" desc="Digital Global Clock selection." hidden="false" />\r
- <field name="BUS_CLK_SEL" from="7" to="7" access="RW" resetVal="" desc="Bus Clock selection." hidden="false" />\r
- </register>\r
- <register name="Debug_Timer_CONTROL3_" address="0x40004F02" bitWidth="8" desc="TMRx.CFG2" hidden="false">\r
- <field name="TMR_CFG" from="1" to="0" access="RW" resetVal="" desc="Timer configuration (MODE = 0): 000 = Continuous; 001 = Pulsewidth; 010 = Period; 011 = Stop on IRQ" hidden="false">\r
- <value name="Continuous" value="0" desc="Timer runs while EN bit of CFG0 register is set to '1'." />\r
- <value name="Pulsewidth" value="1" desc="Timer runs from positive to negative edge of TIMEREN." />\r
- <value name="Period" value="10" desc="Timer runs from positive to positive edge of TIMEREN." />\r
- <value name="Irq" value="11" desc="Timer runs until IRQ." />\r
- </field>\r
- <field name="COD" from="2" to="2" access="RW" resetVal="" desc="Clear On Disable (COD). Clears or gates outputs to zero." hidden="false" />\r
- <field name="ROD" from="3" to="3" access="RW" resetVal="" desc="Reset On Disable (ROD). Resets internal state of output logic" hidden="false" />\r
- <field name="CMP_CFG" from="6" to="4" access="RW" resetVal="" desc="Comparator configurations" hidden="false">\r
- <value name="Equal" value="0" desc="Compare Equal " />\r
- <value name="Less than" value="1" desc="Compare Less Than " />\r
- <value name="Less than or equal" value="10" desc="Compare Less Than or Equal ." />\r
- <value name="Greater" value="11" desc="Compare Greater Than ." />\r
- <value name="Greater than or equal" value="100" desc="Compare Greater Than or Equal " />\r
- </field>\r
- <field name="HW_EN" from="7" to="7" access="RW" resetVal="" desc="When set Timer Enable controls counting." hidden="false" />\r
- </register>\r
- <register name="Debug_Timer_PERIOD" address="0x40004F04" bitWidth="16" desc="TMRx.PER0 - Assigned Period" hidden="false" />\r
- <register name="Debug_Timer_COUNTER" address="0x40004F06" bitWidth="16" desc="TMRx.CNT_CMP0 - Current Down Counter Value" hidden="false" />\r
- </block>\r
+ <block name="SD_CS" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
<block name="CFG_EEPROM" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
<block name="SCSI_Out" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
- <block name="SCSI_In" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
+ <block name="SCSI_CLK" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
<block name="SD_MOSI" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
<block name="SD_SCK" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
- <block name="SD_CS" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
+ <block name="SCSI_In" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
<block name="SD_Data_Clk" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
<block name="SCSI_Out_DBx" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
<block name="SCSI_In_DBx" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
<block name="OddParityGen_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
<block name="SCSI_CTL_PHASE" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">\r
- <register name="SCSI_CTL_PHASE_CONTROL_REG" address="0x40006476" bitWidth="8" desc="" hidden="false" />\r
+ <register name="SCSI_CTL_PHASE_CONTROL_REG" address="0x40006472" bitWidth="8" desc="" hidden="false" />\r
</block>\r
<block name="SD_CD" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
- <block name="SCSI_CLK" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
+ <block name="SCSI_Out_Mux" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
<block name="Bootloadable_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
<block name="USBFS" BASE="0x0" SIZE="0x0" desc="USBFS" visible="true" hidden="false">\r
<block name="ep_3" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
<field name="RA9" from="0" to="0" access="RW" resetVal="" desc="Read Address for EP MSB." hidden="false" />\r
</register>\r
</block>\r
- <block name="SD_MISO" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
+ <block name="Debug_Timer" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">\r
+ <block name="VirtualMux_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
+ <block name="ZeroTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
+ <block name="TimerHW" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
+ <block name="OneTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
+ <block name="VirtualMux_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
+ <block name="VirtualMux_3" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
+ <register name="Debug_Timer_GLOBAL_ENABLE" address="0x400043A3" bitWidth="8" desc="PM.ACT.CFG" hidden="false">\r
+ <field name="en_timer" from="3" to="0" access="RW" resetVal="" desc="Enable timer/counters." hidden="false" />\r
+ </register>\r
+ <register name="Debug_Timer_CONTROL" address="0x40004F00" bitWidth="8" desc="TMRx.CFG0" hidden="false">\r
+ <field name="EN" from="0" to="0" access="RW" resetVal="" desc="Enables timer/comparator." hidden="false" />\r
+ <field name="MODE" from="1" to="1" access="RW" resetVal="" desc="Mode. (0 = Timer; 1 = Comparator)" hidden="false">\r
+ <value name="Timer" value="0" desc="Timer mode. CNT/CMP register holds timer count value." />\r
+ <value name="Comparator" value="1" desc="Comparator mode. CNT/CMP register holds comparator threshold value." />\r
+ </field>\r
+ <field name="ONESHOT" from="2" to="2" access="RW" resetVal="" desc="Timer stops upon reaching stop condition defined by TMR_CFG bits. Can be restarted by asserting TIMER RESET or disabling and re-enabling block." hidden="false" />\r
+ <field name="CMP_BUFF" from="3" to="3" access="RW" resetVal="" desc="Buffer compare register. Compare register updates only on timer terminal count." hidden="false" />\r
+ <field name="INV" from="4" to="4" access="RW" resetVal="" desc="Invert sense of TIMEREN signal" hidden="false" />\r
+ <field name="DB" from="5" to="5" access="RW" resetVal="" desc="Deadband mode--Deadband phases phi1 and phi2 are outputted on CMP and TC output pins respectively." hidden="false">\r
+ <value name="Timer" value="0" desc="CMP and TC are output." />\r
+ <value name="Deadband" value="1" desc="PHI1 (instead of CMP) and PHI2 (instead of TC) are output." />\r
+ </field>\r
+ <field name="DEADBAND_PERIOD" from="7" to="6" access="RW" resetVal="" desc="Deadband Period" hidden="false" />\r
+ </register>\r
+ <register name="Debug_Timer_CONTROL2" address="0x40004F01" bitWidth="8" desc="TMRx.CFG1" hidden="false">\r
+ <field name="IRQ_SEL" from="0" to="0" access="RW" resetVal="" desc="Irq selection. (0 = raw interrupts; 1 = status register interrupts)" hidden="false" />\r
+ <field name="FTC" from="1" to="1" access="RW" resetVal="" desc="First Terminal Count (FTC). Setting this bit forces a single pulse on the TC pin when first enabled." hidden="false">\r
+ <value name="Disable FTC" value="0" desc="Disable the single cycle pulse, which signifies the timer is starting." />\r
+ <value name="Enable FTC" value="1" desc="Enable the single cycle pulse, which signifies the timer is starting." />\r
+ </field>\r
+ <field name="DCOR" from="2" to="2" access="RW" resetVal="" desc="Disable Clear on Read (DCOR) of Status Register SR0." hidden="false" />\r
+ <field name="DBMODE" from="3" to="3" access="RW" resetVal="" desc="Deadband mode (asynchronous/synchronous). CMP output pin is also affected when not in deadband mode (CFG0.DEADBAND)." hidden="false" />\r
+ <field name="CLK_BUS_EN_SEL" from="6" to="4" access="RW" resetVal="" desc="Digital Global Clock selection." hidden="false" />\r
+ <field name="BUS_CLK_SEL" from="7" to="7" access="RW" resetVal="" desc="Bus Clock selection." hidden="false" />\r
+ </register>\r
+ <register name="Debug_Timer_CONTROL3_" address="0x40004F02" bitWidth="8" desc="TMRx.CFG2" hidden="false">\r
+ <field name="TMR_CFG" from="1" to="0" access="RW" resetVal="" desc="Timer configuration (MODE = 0): 000 = Continuous; 001 = Pulsewidth; 010 = Period; 011 = Stop on IRQ" hidden="false">\r
+ <value name="Continuous" value="0" desc="Timer runs while EN bit of CFG0 register is set to '1'." />\r
+ <value name="Pulsewidth" value="1" desc="Timer runs from positive to negative edge of TIMEREN." />\r
+ <value name="Period" value="10" desc="Timer runs from positive to positive edge of TIMEREN." />\r
+ <value name="Irq" value="11" desc="Timer runs until IRQ." />\r
+ </field>\r
+ <field name="COD" from="2" to="2" access="RW" resetVal="" desc="Clear On Disable (COD). Clears or gates outputs to zero." hidden="false" />\r
+ <field name="ROD" from="3" to="3" access="RW" resetVal="" desc="Reset On Disable (ROD). Resets internal state of output logic" hidden="false" />\r
+ <field name="CMP_CFG" from="6" to="4" access="RW" resetVal="" desc="Comparator configurations" hidden="false">\r
+ <value name="Equal" value="0" desc="Compare Equal " />\r
+ <value name="Less than" value="1" desc="Compare Less Than " />\r
+ <value name="Less than or equal" value="10" desc="Compare Less Than or Equal ." />\r
+ <value name="Greater" value="11" desc="Compare Greater Than ." />\r
+ <value name="Greater than or equal" value="100" desc="Compare Greater Than or Equal " />\r
+ </field>\r
+ <field name="HW_EN" from="7" to="7" access="RW" resetVal="" desc="When set Timer Enable controls counting." hidden="false" />\r
+ </register>\r
+ <register name="Debug_Timer_PERIOD" address="0x40004F04" bitWidth="16" desc="TMRx.PER0 - Assigned Period" hidden="false" />\r
+ <register name="Debug_Timer_COUNTER" address="0x40004F06" bitWidth="16" desc="TMRx.CNT_CMP0 - Current Down Counter Value" hidden="false" />\r
+ </block>\r
<block name="SCSI_Out_Ctl" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">\r
- <register name="SCSI_Out_Ctl_CONTROL_REG" address="0x4000647C" bitWidth="8" desc="" hidden="false" />\r
+ <register name="SCSI_Out_Ctl_CONTROL_REG" address="0x40006477" bitWidth="8" desc="" hidden="false" />\r
</block>\r
<block name="SCSI_Out_Bits" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">\r
- <register name="SCSI_Out_Bits_CONTROL_REG" address="0x4000647E" bitWidth="8" desc="" hidden="false" />\r
+ <register name="SCSI_Out_Bits_CONTROL_REG" address="0x4000647A" bitWidth="8" desc="" hidden="false" />\r
</block>\r
- <block name="SCSI_Out_Mux" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
+ <block name="SD_MISO" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
<block name="SCSI_RST_ISR" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
<block name="SCSI_Noise" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
<block name="not_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />\r
<Group key="Component">\r
<Group key="v1">\r
<Data key="cy_boot" value="cy_boot_v5_50" />\r
+ <Data key="Em_EEPROM_Dynamic" value="Em_EEPROM_Dynamic_v2_0" />\r
<Data key="LIN_Dynamic" value="LIN_Dynamic_v3_40" />\r
</Group>\r
</Group>\r
</Group>\r
</Group>\r
<Group key="Interrupt">\r
- <Data key="791071b3-a348-49c4-b578-64e66d701d0f/d91ea660-bc91-4817-b29b-2fe86c305500" value="6" />\r
+ <Group key="791071b3-a348-49c4-b578-64e66d701d0f/d91ea660-bc91-4817-b29b-2fe86c305500">\r
+ <Group key="CortexM3">\r
+ <Data key="Assigned" value="True" />\r
+ <Data key="Priority" value="6" />\r
+ <Data key="Vector" value="-1" />\r
+ </Group>\r
+ </Group>\r
</Group>\r
<Group key="Pin2">\r
<Group key="1bd12db2-da87-4f00-90d1-0a734e846c58">\r
<build_action v="OTHER;;;;" />\r
<PropertyDeltas />\r
</CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b>\r
+<CyGuid_ebc4f06d-207f-49c2-a540-72acf4adabc0 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtFolderSerialize" version="3">\r
+<CyGuid_2f73275c-45bf-46ba-b3b1-00a2fe0c8dd8 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtBaseContainerSerialize" version="1">\r
+<CyGuid_31768f72-0253-412b-af77-e7dba74d1330 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtItemSerialize" version="2" name="Em_EEPROM_Dynamic" persistent="">\r
+<Hidden v="False" />\r
+</CyGuid_31768f72-0253-412b-af77-e7dba74d1330>\r
+<CyGuid_0820c2e7-528d-4137-9a08-97257b946089 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtItemListSerialize" version="2">\r
+<dependencies>\r
+<CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtFileSerialize" version="3" xml_contents_version="1">\r
+<CyGuid_31768f72-0253-412b-af77-e7dba74d1330 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtItemSerialize" version="2" name="cy_em_eeprom.c" persistent="Generated_Source\PSoC5\cy_em_eeprom.c">\r
+<Hidden v="False" />\r
+</CyGuid_31768f72-0253-412b-af77-e7dba74d1330>\r
+<build_action v="SOURCE_C;CortexM3;;;" />\r
+<PropertyDeltas />\r
+</CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b>\r
+<CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtFileSerialize" version="3" xml_contents_version="1">\r
+<CyGuid_31768f72-0253-412b-af77-e7dba74d1330 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtItemSerialize" version="2" name="cy_em_eeprom.h" persistent="Generated_Source\PSoC5\cy_em_eeprom.h">\r
+<Hidden v="False" />\r
+</CyGuid_31768f72-0253-412b-af77-e7dba74d1330>\r
+<build_action v="HEADER;;;;" />\r
+<PropertyDeltas />\r
+</CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b>\r
+</dependencies>\r
+</CyGuid_0820c2e7-528d-4137-9a08-97257b946089>\r
+</CyGuid_2f73275c-45bf-46ba-b3b1-00a2fe0c8dd8>\r
+<filters />\r
+</CyGuid_ebc4f06d-207f-49c2-a540-72acf4adabc0>\r
</dependencies>\r
</CyGuid_0820c2e7-528d-4137-9a08-97257b946089>\r
</CyGuid_2f73275c-45bf-46ba-b3b1-00a2fe0c8dd8>\r
</platforms>\r
<project_current_platform v="c9323d49-d323-40b8-9b59-cc008d68a989" />\r
<last_selected_tab v="Cypress" />\r
-<WriteAppVersionLastSavedWith v="4.1.0.2686" />\r
-<WriteAppMarketingVersionLastSavedWith v=" 4.1" />\r
+<WriteAppVersionLastSavedWith v="4.2.0.641" />\r
+<WriteAppMarketingVersionLastSavedWith v=" 4.2" />\r
<project_id v="6e1f5cbb-a0ca-4f55-a1fa-7b20c5be3a3e" />\r
<GenerateDescriptionFiles v="False" />\r
</CyGuid_49cfd574-032a-4a64-b7be-d4eeeaf25e43>\r
<width>32</width>\r
<peripherals>\r
<peripheral>\r
- <name>SCSI_Parity_Error</name>\r
+ <name>SCSI_Filtered</name>\r
<description>No description available</description>\r
- <baseAddress>0x40006465</baseAddress>\r
+ <baseAddress>0x0</baseAddress>\r
<addressBlock>\r
<offset>0</offset>\r
<size>0x0</size>\r
</addressBlock>\r
<registers>\r
<register>\r
- <name>SCSI_Parity_Error_STATUS_REG</name>\r
+ <name>SCSI_Filtered_STATUS_REG</name>\r
<description>No description available</description>\r
- <addressOffset>0x0</addressOffset>\r
+ <addressOffset>0x4000646D</addressOffset>\r
<size>8</size>\r
<access>read-write</access>\r
<resetValue>0</resetValue>\r
<resetMask>0</resetMask>\r
</register>\r
<register>\r
- <name>SCSI_Parity_Error_MASK_REG</name>\r
+ <name>SCSI_Filtered_MASK_REG</name>\r
<description>No description available</description>\r
- <addressOffset>0x20</addressOffset>\r
+ <addressOffset>0x4000648D</addressOffset>\r
<size>8</size>\r
<access>read-write</access>\r
<resetValue>0</resetValue>\r
<resetMask>0</resetMask>\r
</register>\r
<register>\r
- <name>SCSI_Parity_Error_STATUS_AUX_CTL_REG</name>\r
+ <name>SCSI_Filtered_STATUS_AUX_CTL_REG</name>\r
<description>No description available</description>\r
- <addressOffset>0x30</addressOffset>\r
+ <addressOffset>0x4000649D</addressOffset>\r
<size>8</size>\r
<access>read-write</access>\r
<resetValue>0</resetValue>\r
</registers>\r
</peripheral>\r
<peripheral>\r
- <name>SCSI_Filtered</name>\r
+ <name>SCSI_Parity_Error</name>\r
<description>No description available</description>\r
- <baseAddress>0x4000646B</baseAddress>\r
+ <baseAddress>0x0</baseAddress>\r
<addressBlock>\r
<offset>0</offset>\r
<size>0x0</size>\r
</addressBlock>\r
<registers>\r
<register>\r
- <name>SCSI_Filtered_STATUS_REG</name>\r
+ <name>SCSI_Parity_Error_STATUS_REG</name>\r
<description>No description available</description>\r
- <addressOffset>0x0</addressOffset>\r
+ <addressOffset>0x4000646B</addressOffset>\r
<size>8</size>\r
<access>read-write</access>\r
<resetValue>0</resetValue>\r
<resetMask>0</resetMask>\r
</register>\r
<register>\r
- <name>SCSI_Filtered_MASK_REG</name>\r
+ <name>SCSI_Parity_Error_MASK_REG</name>\r
<description>No description available</description>\r
- <addressOffset>0x20</addressOffset>\r
+ <addressOffset>0x4000648B</addressOffset>\r
<size>8</size>\r
<access>read-write</access>\r
<resetValue>0</resetValue>\r
<resetMask>0</resetMask>\r
</register>\r
<register>\r
- <name>SCSI_Filtered_STATUS_AUX_CTL_REG</name>\r
+ <name>SCSI_Parity_Error_STATUS_AUX_CTL_REG</name>\r
<description>No description available</description>\r
- <addressOffset>0x30</addressOffset>\r
+ <addressOffset>0x4000649B</addressOffset>\r
<size>8</size>\r
<access>read-write</access>\r
<resetValue>0</resetValue>\r
<peripheral>\r
<name>SCSI_Glitch_Ctl</name>\r
<description>No description available</description>\r
- <baseAddress>0x40006474</baseAddress>\r
+ <baseAddress>0x0</baseAddress>\r
<addressBlock>\r
<offset>0</offset>\r
<size>0x0</size>\r
<register>\r
<name>SCSI_Glitch_Ctl_CONTROL_REG</name>\r
<description>No description available</description>\r
- <addressOffset>0x0</addressOffset>\r
+ <addressOffset>0x40006473</addressOffset>\r
<size>8</size>\r
<access>read-write</access>\r
<resetValue>0</resetValue>\r
</registers>\r
</peripheral>\r
<peripheral>\r
- <name>Debug_Timer</name>\r
+ <name>SCSI_CTL_PHASE</name>\r
<description>No description available</description>\r
<baseAddress>0x0</baseAddress>\r
<addressBlock>\r
</addressBlock>\r
<registers>\r
<register>\r
- <name>Debug_Timer_GLOBAL_ENABLE</name>\r
- <description>PM.ACT.CFG</description>\r
- <addressOffset>0x400043A3</addressOffset>\r
+ <name>SCSI_CTL_PHASE_CONTROL_REG</name>\r
+ <description>No description available</description>\r
+ <addressOffset>0x40006472</addressOffset>\r
+ <size>8</size>\r
+ <access>read-write</access>\r
+ <resetValue>0</resetValue>\r
+ <resetMask>0</resetMask>\r
+ </register>\r
+ </registers>\r
+ </peripheral>\r
+ <peripheral>\r
+ <name>USBFS</name>\r
+ <description>USBFS</description>\r
+ <baseAddress>0x0</baseAddress>\r
+ <addressBlock>\r
+ <offset>0</offset>\r
+ <size>0x0</size>\r
+ <usage>registers</usage>\r
+ </addressBlock>\r
+ <registers>\r
+ <register>\r
+ <name>CR0</name>\r
+ <description>USB Control 0 Register</description>\r
+ <addressOffset>0x40006008</addressOffset>\r
<size>8</size>\r
<access>read-write</access>\r
<resetValue>0</resetValue>\r
<resetMask>0</resetMask>\r
<fields>\r
<field>\r
- <name>en_timer</name>\r
- <description>Enable timer/counters.</description>\r
+ <name>DEVICE_ADDRESS</name>\r
+ <description>These bits specify the USB device address to which the SIE will respond. This address must be set by firmware and is specified by the USB Host with a SET ADDRESS command during USB enumeration. This value must be programmed by firmware when assigned during enumeration. It is not set automatically by the hardware.</description>\r
<lsb>0</lsb>\r
- <msb>3</msb>\r
+ <msb>6</msb>\r
+ <access>read-only</access>\r
+ </field>\r
+ <field>\r
+ <name>USB_ENABLE</name>\r
+ <description>This bit enables the device to respond to USB traffic.</description>\r
+ <lsb>7</lsb>\r
+ <msb>7</msb>\r
<access>read-write</access>\r
+ <enumeratedValues>\r
+ <enumeratedValue>\r
+ <name>Disabled</name>\r
+ <description>Block responds to USB traffic.</description>\r
+ <value>0</value>\r
+ </enumeratedValue>\r
+ <enumeratedValue>\r
+ <name>Enabled</name>\r
+ <description>Block does not respond to USB traffic.</description>\r
+ <value>1</value>\r
+ </enumeratedValue>\r
+ </enumeratedValues>\r
</field>\r
</fields>\r
</register>\r
<register>\r
- <name>Debug_Timer_CONTROL</name>\r
- <description>TMRx.CFG0</description>\r
- <addressOffset>0x40004F00</addressOffset>\r
+ <name>CR1</name>\r
+ <description>USB Control 1 Register</description>\r
+ <addressOffset>0x40006009</addressOffset>\r
<size>8</size>\r
<access>read-write</access>\r
<resetValue>0</resetValue>\r
<resetMask>0</resetMask>\r
<fields>\r
<field>\r
- <name>EN</name>\r
- <description>Enables timer/comparator.</description>\r
+ <name>REG_ENABLE</name>\r
+ <description>This bit controls the operation of the internal USB regulator. For applications with supply voltages in the 5V range this bit is set high to enable the internal regulator. For device supply voltage in the 3.3V range this bit is cleared to connect the transceiver directly to the supply.</description>\r
<lsb>0</lsb>\r
<msb>0</msb>\r
- <access>read-write</access>\r
- </field>\r
- <field>\r
- <name>MODE</name>\r
- <description>Mode. (0 = Timer; 1 = Comparator)</description>\r
- <lsb>1</lsb>\r
- <msb>1</msb>\r
- <access>read-write</access>\r
+ <access>read-only</access>\r
<enumeratedValues>\r
<enumeratedValue>\r
- <name>Timer</name>\r
- <description>Timer mode. CNT/CMP register holds timer count value.</description>\r
+ <name>Disabled</name>\r
+ <description>Regulator for 5V is disabled.</description>\r
<value>0</value>\r
</enumeratedValue>\r
<enumeratedValue>\r
- <name>Comparator</name>\r
- <description>Comparator mode. CNT/CMP register holds comparator threshold value.</description>\r
+ <name>Enabled</name>\r
+ <description>Regulator for 5V is enabled.</description>\r
<value>1</value>\r
</enumeratedValue>\r
</enumeratedValues>\r
</field>\r
<field>\r
- <name>ONESHOT</name>\r
- <description>Timer stops upon reaching stop condition defined by TMR_CFG bits. Can be restarted by asserting TIMER RESET or disabling and re-enabling block.</description>\r
+ <name>ENABLE_LOCK</name>\r
+ <description>This bit is set to turn on the automatic frequency locking of the internal oscillator to USB traffic. Unless an external clock is being provided this bit should remain set for proper USB operation.</description>\r
+ <lsb>1</lsb>\r
+ <msb>1</msb>\r
+ <access>read-write</access>\r
+ </field>\r
+ <field>\r
+ <name>BUS_ACTIVITY</name>\r
+ <description>The Bus Activity bit is a stickybit that detects any non-idle USB event that has occurred on the USB bus. Once set to High by the SIE to indicate the bus activity this bit retains its logical High value until firmware clears it.</description>\r
<lsb>2</lsb>\r
<msb>2</msb>\r
<access>read-write</access>\r
</field>\r
<field>\r
- <name>CMP_BUFF</name>\r
- <description>Buffer compare register. Compare register updates only on timer terminal count.</description>\r
+ <name>TRIM_OFFSET_MSB</name>\r
+ <description>This bit enables trim bit[7].</description>\r
<lsb>3</lsb>\r
<msb>3</msb>\r
<access>read-write</access>\r
</field>\r
- <field>\r
- <name>INV</name>\r
- <description>Invert sense of TIMEREN signal</description>\r
- <lsb>4</lsb>\r
- <msb>4</msb>\r
- <access>read-write</access>\r
- </field>\r
- <field>\r
- <name>DB</name>\r
- <description>Deadband mode--Deadband phases phi1 and phi2 are outputted on CMP and TC output pins respectively.</description>\r
- <lsb>5</lsb>\r
- <msb>5</msb>\r
- <access>read-write</access>\r
- <enumeratedValues>\r
- <enumeratedValue>\r
- <name>Timer</name>\r
- <description>CMP and TC are output.</description>\r
- <value>0</value>\r
- </enumeratedValue>\r
- <enumeratedValue>\r
- <name>Deadband</name>\r
- <description>PHI1 (instead of CMP) and PHI2 (instead of TC) are output.</description>\r
- <value>1</value>\r
- </enumeratedValue>\r
- </enumeratedValues>\r
- </field>\r
- <field>\r
- <name>DEADBAND_PERIOD</name>\r
- <description>Deadband Period</description>\r
- <lsb>6</lsb>\r
- <msb>7</msb>\r
- <access>read-write</access>\r
- </field>\r
</fields>\r
</register>\r
<register>\r
- <name>Debug_Timer_CONTROL2</name>\r
- <description>TMRx.CFG1</description>\r
- <addressOffset>0x40004F01</addressOffset>\r
+ <name>SIE_EP_INT_EN</name>\r
+ <description>USB SIE Data Endpoints Interrupt Enable Register</description>\r
+ <addressOffset>0x4000600A</addressOffset>\r
<size>8</size>\r
<access>read-write</access>\r
<resetValue>0</resetValue>\r
<resetMask>0</resetMask>\r
<fields>\r
<field>\r
- <name>IRQ_SEL</name>\r
- <description>Irq selection. (0 = raw interrupts; 1 = status register interrupts)</description>\r
+ <name>EP1_INTR_EN</name>\r
+ <description>Enables interrupt for EP1.</description>\r
<lsb>0</lsb>\r
<msb>0</msb>\r
<access>read-write</access>\r
</field>\r
<field>\r
- <name>FTC</name>\r
- <description>First Terminal Count (FTC). Setting this bit forces a single pulse on the TC pin when first enabled.</description>\r
+ <name>EP2_INTR_EN</name>\r
+ <description>Enables interrupt for EP2.</description>\r
<lsb>1</lsb>\r
<msb>1</msb>\r
<access>read-write</access>\r
- <enumeratedValues>\r
- <enumeratedValue>\r
- <name>Disable_FTC</name>\r
- <description>Disable the single cycle pulse, which signifies the timer is starting.</description>\r
- <value>0</value>\r
- </enumeratedValue>\r
- <enumeratedValue>\r
- <name>Enable_FTC</name>\r
- <description>Enable the single cycle pulse, which signifies the timer is starting.</description>\r
- <value>1</value>\r
- </enumeratedValue>\r
- </enumeratedValues>\r
</field>\r
<field>\r
- <name>DCOR</name>\r
- <description>Disable Clear on Read (DCOR) of Status Register SR0.</description>\r
+ <name>EP3_INTR_EN</name>\r
+ <description>Enables interrupt for EP3.</description>\r
<lsb>2</lsb>\r
<msb>2</msb>\r
<access>read-write</access>\r
</field>\r
<field>\r
- <name>DBMODE</name>\r
- <description>Deadband mode (asynchronous/synchronous). CMP output pin is also affected when not in deadband mode (CFG0.DEADBAND).</description>\r
+ <name>EP4_INTR_EN</name>\r
+ <description>Enables interrupt for EP4.</description>\r
<lsb>3</lsb>\r
<msb>3</msb>\r
<access>read-write</access>\r
</field>\r
<field>\r
- <name>CLK_BUS_EN_SEL</name>\r
- <description>Digital Global Clock selection.</description>\r
+ <name>EP5_INTR_EN</name>\r
+ <description>Enables interrupt for EP5.</description>\r
<lsb>4</lsb>\r
+ <msb>4</msb>\r
+ <access>read-write</access>\r
+ </field>\r
+ <field>\r
+ <name>EP6_INTR_EN</name>\r
+ <description>Enables interrupt for EP6.</description>\r
+ <lsb>5</lsb>\r
+ <msb>5</msb>\r
+ <access>read-write</access>\r
+ </field>\r
+ <field>\r
+ <name>EP7_INTR_EN</name>\r
+ <description>Enables interrupt for EP7.</description>\r
+ <lsb>6</lsb>\r
<msb>6</msb>\r
<access>read-write</access>\r
</field>\r
<field>\r
- <name>BUS_CLK_SEL</name>\r
- <description>Bus Clock selection.</description>\r
+ <name>EP8_INTR_EN</name>\r
+ <description>Enables interrupt for EP8.</description>\r
<lsb>7</lsb>\r
<msb>7</msb>\r
<access>read-write</access>\r
</fields>\r
</register>\r
<register>\r
- <name>Debug_Timer_CONTROL3_</name>\r
- <description>TMRx.CFG2</description>\r
- <addressOffset>0x40004F02</addressOffset>\r
+ <name>SIE_EP_INT_SR</name>\r
+ <description>SIE Data Endpoint Interrupt Status Register</description>\r
+ <addressOffset>0x4000600B</addressOffset>\r
<size>8</size>\r
<access>read-write</access>\r
<resetValue>0</resetValue>\r
<resetMask>0</resetMask>\r
<fields>\r
<field>\r
- <name>TMR_CFG</name>\r
- <description>Timer configuration (MODE = 0): 000 = Continuous; 001 = Pulsewidth; 010 = Period; 011 = Stop on IRQ</description>\r
+ <name>EP1_INTR</name>\r
+ <description>Interrupt status for EP1.</description>\r
<lsb>0</lsb>\r
+ <msb>0</msb>\r
+ <access>read-write</access>\r
+ </field>\r
+ <field>\r
+ <name>EP2_INTR</name>\r
+ <description>Interrupt status for EP2.</description>\r
+ <lsb>1</lsb>\r
<msb>1</msb>\r
<access>read-write</access>\r
- <enumeratedValues>\r
- <enumeratedValue>\r
- <name>Continuous</name>\r
- <description>Timer runs while EN bit of CFG0 register is set to '1'.</description>\r
- <value>0</value>\r
- </enumeratedValue>\r
- <enumeratedValue>\r
- <name>Pulsewidth</name>\r
- <description>Timer runs from positive to negative edge of TIMEREN.</description>\r
- <value>1</value>\r
- </enumeratedValue>\r
- <enumeratedValue>\r
- <name>Period</name>\r
- <description>Timer runs from positive to positive edge of TIMEREN.</description>\r
- <value>2</value>\r
- </enumeratedValue>\r
- <enumeratedValue>\r
- <name>Irq</name>\r
- <description>Timer runs until IRQ.</description>\r
- <value>3</value>\r
- </enumeratedValue>\r
- </enumeratedValues>\r
</field>\r
<field>\r
- <name>COD</name>\r
- <description>Clear On Disable (COD). Clears or gates outputs to zero.</description>\r
+ <name>EP3_INTR</name>\r
+ <description>Interrupt status for EP3.</description>\r
<lsb>2</lsb>\r
<msb>2</msb>\r
<access>read-write</access>\r
</field>\r
<field>\r
- <name>ROD</name>\r
- <description>Reset On Disable (ROD). Resets internal state of output logic</description>\r
+ <name>EP4_INTR</name>\r
+ <description>Interrupt status for EP4.</description>\r
<lsb>3</lsb>\r
<msb>3</msb>\r
<access>read-write</access>\r
</field>\r
<field>\r
- <name>CMP_CFG</name>\r
- <description>Comparator configurations</description>\r
+ <name>EP5_INTR</name>\r
+ <description>Interrupt status for EP5.</description>\r
<lsb>4</lsb>\r
- <msb>6</msb>\r
- <access>read-write</access>\r
- <enumeratedValues>\r
- <enumeratedValue>\r
- <name>Equal</name>\r
- <description>Compare Equal </description>\r
- <value>0</value>\r
- </enumeratedValue>\r
- <enumeratedValue>\r
- <name>Less_than</name>\r
- <description>Compare Less Than </description>\r
- <value>1</value>\r
- </enumeratedValue>\r
- <enumeratedValue>\r
- <name>Less_than_or_equal</name>\r
- <description>Compare Less Than or Equal .</description>\r
- <value>2</value>\r
- </enumeratedValue>\r
- <enumeratedValue>\r
- <name>Greater</name>\r
- <description>Compare Greater Than .</description>\r
- <value>3</value>\r
- </enumeratedValue>\r
- <enumeratedValue>\r
- <name>Greater_than_or_equal</name>\r
- <description>Compare Greater Than or Equal </description>\r
- <value>4</value>\r
- </enumeratedValue>\r
- </enumeratedValues>\r
- </field>\r
- <field>\r
- <name>HW_EN</name>\r
- <description>When set Timer Enable controls counting.</description>\r
- <lsb>7</lsb>\r
- <msb>7</msb>\r
- <access>read-write</access>\r
- </field>\r
- </fields>\r
- </register>\r
- <register>\r
- <name>Debug_Timer_PERIOD</name>\r
- <description>TMRx.PER0 - Assigned Period</description>\r
- <addressOffset>0x40004F04</addressOffset>\r
- <size>16</size>\r
- <access>read-write</access>\r
- <resetValue>0</resetValue>\r
- <resetMask>0</resetMask>\r
- </register>\r
- <register>\r
- <name>Debug_Timer_COUNTER</name>\r
- <description>TMRx.CNT_CMP0 - Current Down Counter Value</description>\r
- <addressOffset>0x40004F06</addressOffset>\r
- <size>16</size>\r
- <access>read-write</access>\r
- <resetValue>0</resetValue>\r
- <resetMask>0</resetMask>\r
- </register>\r
- </registers>\r
- </peripheral>\r
- <peripheral>\r
- <name>SCSI_CTL_PHASE</name>\r
- <description>No description available</description>\r
- <baseAddress>0x40006476</baseAddress>\r
- <addressBlock>\r
- <offset>0</offset>\r
- <size>0x0</size>\r
- <usage>registers</usage>\r
- </addressBlock>\r
- <registers>\r
- <register>\r
- <name>SCSI_CTL_PHASE_CONTROL_REG</name>\r
- <description>No description available</description>\r
- <addressOffset>0x0</addressOffset>\r
- <size>8</size>\r
- <access>read-write</access>\r
- <resetValue>0</resetValue>\r
- <resetMask>0</resetMask>\r
- </register>\r
- </registers>\r
- </peripheral>\r
- <peripheral>\r
- <name>USBFS</name>\r
- <description>USBFS</description>\r
- <baseAddress>0x0</baseAddress>\r
- <addressBlock>\r
- <offset>0</offset>\r
- <size>0x0</size>\r
- <usage>registers</usage>\r
- </addressBlock>\r
- <registers>\r
- <register>\r
- <name>CR0</name>\r
- <description>USB Control 0 Register</description>\r
- <addressOffset>0x40006008</addressOffset>\r
- <size>8</size>\r
- <access>read-write</access>\r
- <resetValue>0</resetValue>\r
- <resetMask>0</resetMask>\r
- <fields>\r
- <field>\r
- <name>DEVICE_ADDRESS</name>\r
- <description>These bits specify the USB device address to which the SIE will respond. This address must be set by firmware and is specified by the USB Host with a SET ADDRESS command during USB enumeration. This value must be programmed by firmware when assigned during enumeration. It is not set automatically by the hardware.</description>\r
- <lsb>0</lsb>\r
- <msb>6</msb>\r
- <access>read-only</access>\r
- </field>\r
- <field>\r
- <name>USB_ENABLE</name>\r
- <description>This bit enables the device to respond to USB traffic.</description>\r
- <lsb>7</lsb>\r
- <msb>7</msb>\r
- <access>read-write</access>\r
- <enumeratedValues>\r
- <enumeratedValue>\r
- <name>Disabled</name>\r
- <description>Block responds to USB traffic.</description>\r
- <value>0</value>\r
- </enumeratedValue>\r
- <enumeratedValue>\r
- <name>Enabled</name>\r
- <description>Block does not respond to USB traffic.</description>\r
- <value>1</value>\r
- </enumeratedValue>\r
- </enumeratedValues>\r
- </field>\r
- </fields>\r
- </register>\r
- <register>\r
- <name>CR1</name>\r
- <description>USB Control 1 Register</description>\r
- <addressOffset>0x40006009</addressOffset>\r
- <size>8</size>\r
- <access>read-write</access>\r
- <resetValue>0</resetValue>\r
- <resetMask>0</resetMask>\r
- <fields>\r
- <field>\r
- <name>REG_ENABLE</name>\r
- <description>This bit controls the operation of the internal USB regulator. For applications with supply voltages in the 5V range this bit is set high to enable the internal regulator. For device supply voltage in the 3.3V range this bit is cleared to connect the transceiver directly to the supply.</description>\r
- <lsb>0</lsb>\r
- <msb>0</msb>\r
- <access>read-only</access>\r
- <enumeratedValues>\r
- <enumeratedValue>\r
- <name>Disabled</name>\r
- <description>Regulator for 5V is disabled.</description>\r
- <value>0</value>\r
- </enumeratedValue>\r
- <enumeratedValue>\r
- <name>Enabled</name>\r
- <description>Regulator for 5V is enabled.</description>\r
- <value>1</value>\r
- </enumeratedValue>\r
- </enumeratedValues>\r
- </field>\r
- <field>\r
- <name>ENABLE_LOCK</name>\r
- <description>This bit is set to turn on the automatic frequency locking of the internal oscillator to USB traffic. Unless an external clock is being provided this bit should remain set for proper USB operation.</description>\r
- <lsb>1</lsb>\r
- <msb>1</msb>\r
- <access>read-write</access>\r
- </field>\r
- <field>\r
- <name>BUS_ACTIVITY</name>\r
- <description>The Bus Activity bit is a stickybit that detects any non-idle USB event that has occurred on the USB bus. Once set to High by the SIE to indicate the bus activity this bit retains its logical High value until firmware clears it.</description>\r
- <lsb>2</lsb>\r
- <msb>2</msb>\r
- <access>read-write</access>\r
- </field>\r
- <field>\r
- <name>TRIM_OFFSET_MSB</name>\r
- <description>This bit enables trim bit[7].</description>\r
- <lsb>3</lsb>\r
- <msb>3</msb>\r
- <access>read-write</access>\r
- </field>\r
- </fields>\r
- </register>\r
- <register>\r
- <name>SIE_EP_INT_EN</name>\r
- <description>USB SIE Data Endpoints Interrupt Enable Register</description>\r
- <addressOffset>0x4000600A</addressOffset>\r
- <size>8</size>\r
- <access>read-write</access>\r
- <resetValue>0</resetValue>\r
- <resetMask>0</resetMask>\r
- <fields>\r
- <field>\r
- <name>EP1_INTR_EN</name>\r
- <description>Enables interrupt for EP1.</description>\r
- <lsb>0</lsb>\r
- <msb>0</msb>\r
- <access>read-write</access>\r
- </field>\r
- <field>\r
- <name>EP2_INTR_EN</name>\r
- <description>Enables interrupt for EP2.</description>\r
- <lsb>1</lsb>\r
- <msb>1</msb>\r
- <access>read-write</access>\r
- </field>\r
- <field>\r
- <name>EP3_INTR_EN</name>\r
- <description>Enables interrupt for EP3.</description>\r
- <lsb>2</lsb>\r
- <msb>2</msb>\r
- <access>read-write</access>\r
- </field>\r
- <field>\r
- <name>EP4_INTR_EN</name>\r
- <description>Enables interrupt for EP4.</description>\r
- <lsb>3</lsb>\r
- <msb>3</msb>\r
- <access>read-write</access>\r
- </field>\r
- <field>\r
- <name>EP5_INTR_EN</name>\r
- <description>Enables interrupt for EP5.</description>\r
- <lsb>4</lsb>\r
- <msb>4</msb>\r
- <access>read-write</access>\r
- </field>\r
- <field>\r
- <name>EP6_INTR_EN</name>\r
- <description>Enables interrupt for EP6.</description>\r
- <lsb>5</lsb>\r
- <msb>5</msb>\r
- <access>read-write</access>\r
- </field>\r
- <field>\r
- <name>EP7_INTR_EN</name>\r
- <description>Enables interrupt for EP7.</description>\r
- <lsb>6</lsb>\r
- <msb>6</msb>\r
- <access>read-write</access>\r
- </field>\r
- <field>\r
- <name>EP8_INTR_EN</name>\r
- <description>Enables interrupt for EP8.</description>\r
- <lsb>7</lsb>\r
- <msb>7</msb>\r
- <access>read-write</access>\r
- </field>\r
- </fields>\r
- </register>\r
- <register>\r
- <name>SIE_EP_INT_SR</name>\r
- <description>SIE Data Endpoint Interrupt Status Register</description>\r
- <addressOffset>0x4000600B</addressOffset>\r
- <size>8</size>\r
- <access>read-write</access>\r
- <resetValue>0</resetValue>\r
- <resetMask>0</resetMask>\r
- <fields>\r
- <field>\r
- <name>EP1_INTR</name>\r
- <description>Interrupt status for EP1.</description>\r
- <lsb>0</lsb>\r
- <msb>0</msb>\r
- <access>read-write</access>\r
- </field>\r
- <field>\r
- <name>EP2_INTR</name>\r
- <description>Interrupt status for EP2.</description>\r
- <lsb>1</lsb>\r
- <msb>1</msb>\r
- <access>read-write</access>\r
- </field>\r
- <field>\r
- <name>EP3_INTR</name>\r
- <description>Interrupt status for EP3.</description>\r
- <lsb>2</lsb>\r
- <msb>2</msb>\r
- <access>read-write</access>\r
- </field>\r
- <field>\r
- <name>EP4_INTR</name>\r
- <description>Interrupt status for EP4.</description>\r
- <lsb>3</lsb>\r
- <msb>3</msb>\r
- <access>read-write</access>\r
- </field>\r
- <field>\r
- <name>EP5_INTR</name>\r
- <description>Interrupt status for EP5.</description>\r
- <lsb>4</lsb>\r
- <msb>4</msb>\r
+ <msb>4</msb>\r
<access>read-write</access>\r
</field>\r
<field>\r
<access>read-write</access>\r
</field>\r
<field>\r
- <name>RESET_PTR</name>\r
- <description>RESET_KRYPTON - 0, RESET_NORMAL - 1</description>\r
- <lsb>3</lsb>\r
+ <name>RESET_PTR</name>\r
+ <description>RESET_KRYPTON - 0, RESET_NORMAL - 1</description>\r
+ <lsb>3</lsb>\r
+ <msb>3</msb>\r
+ <access>read-write</access>\r
+ </field>\r
+ </fields>\r
+ </register>\r
+ <register>\r
+ <name>ARB_EP4_INT_EN</name>\r
+ <description>Arbiter Endpoint 1 Interrupt Enable Register</description>\r
+ <addressOffset>0x400060B1</addressOffset>\r
+ <size>8</size>\r
+ <access>read-write</access>\r
+ <resetValue>0</resetValue>\r
+ <resetMask>0</resetMask>\r
+ <fields>\r
+ <field>\r
+ <name>IN_BUF_FULL_EN</name>\r
+ <description>IN Endpoint Local Buffer Full</description>\r
+ <lsb>0</lsb>\r
+ <msb>0</msb>\r
+ <access>read-write</access>\r
+ </field>\r
+ <field>\r
+ <name>DMA_GNT_EN</name>\r
+ <description>Endpoint DMA Grant</description>\r
+ <lsb>1</lsb>\r
+ <msb>1</msb>\r
+ <access>read-write</access>\r
+ </field>\r
+ <field>\r
+ <name>BUF_OVER_EN</name>\r
+ <description>Endpoint Buffer Overflow</description>\r
+ <lsb>2</lsb>\r
+ <msb>2</msb>\r
+ <access>read-write</access>\r
+ </field>\r
+ <field>\r
+ <name>BUF_UNDER_EN</name>\r
+ <description>Endpoint Buffer Underflow</description>\r
+ <lsb>3</lsb>\r
+ <msb>3</msb>\r
+ <access>read-write</access>\r
+ </field>\r
+ <field>\r
+ <name>ERR_INT_EN</name>\r
+ <description>Endpoint Error in Transaction Interrupt</description>\r
+ <lsb>4</lsb>\r
+ <msb>4</msb>\r
+ <access>read-write</access>\r
+ </field>\r
+ <field>\r
+ <name>DMA_TERMIN_EN</name>\r
+ <description>Endpoint DMA Terminated Enable</description>\r
+ <lsb>5</lsb>\r
+ <msb>5</msb>\r
+ <access>read-write</access>\r
+ </field>\r
+ </fields>\r
+ </register>\r
+ <register>\r
+ <name>ARB_EP4_INT_SR</name>\r
+ <description>Arbiter Endpoint 1 Interrupt Status Register</description>\r
+ <addressOffset>0x400060B2</addressOffset>\r
+ <size>8</size>\r
+ <access>read-write</access>\r
+ <resetValue>0</resetValue>\r
+ <resetMask>0</resetMask>\r
+ <fields>\r
+ <field>\r
+ <name>IN_BUF_FULL_EN</name>\r
+ <description>IN Endpoint Local Buffer Full</description>\r
+ <lsb>0</lsb>\r
+ <msb>0</msb>\r
+ <access>read-write</access>\r
+ </field>\r
+ <field>\r
+ <name>DMA_GNT_EN</name>\r
+ <description>Endpoint DMA Grant</description>\r
+ <lsb>1</lsb>\r
+ <msb>1</msb>\r
+ <access>read-write</access>\r
+ </field>\r
+ <field>\r
+ <name>BUF_OVER_EN</name>\r
+ <description>Endpoint Buffer Overflow</description>\r
+ <lsb>2</lsb>\r
+ <msb>2</msb>\r
+ <access>read-write</access>\r
+ </field>\r
+ <field>\r
+ <name>BUF_UNDER_EN</name>\r
+ <description>Endpoint Buffer Underflow</description>\r
+ <lsb>3</lsb>\r
+ <msb>3</msb>\r
+ <access>read-write</access>\r
+ </field>\r
+ <field>\r
+ <name>ERR_INT_EN</name>\r
+ <description>Endpoint Error in Transaction Interrupt</description>\r
+ <lsb>4</lsb>\r
+ <msb>4</msb>\r
+ <access>read-write</access>\r
+ </field>\r
+ <field>\r
+ <name>DMA_TERMIN_EN</name>\r
+ <description>Endpoint DMA Terminated Enable</description>\r
+ <lsb>5</lsb>\r
+ <msb>5</msb>\r
+ <access>read-write</access>\r
+ </field>\r
+ </fields>\r
+ </register>\r
+ <register>\r
+ <name>ARB_RW4_WA</name>\r
+ <description>Arbiter Endpoint 1 Write Address LSB Register</description>\r
+ <addressOffset>0x400060B4</addressOffset>\r
+ <size>8</size>\r
+ <access>read-write</access>\r
+ <resetValue>0</resetValue>\r
+ <resetMask>0</resetMask>\r
+ <fields>\r
+ <field>\r
+ <name>WA8</name>\r
+ <description>Write Address for EP.</description>\r
+ <lsb>0</lsb>\r
+ <msb>7</msb>\r
+ <access>read-write</access>\r
+ </field>\r
+ </fields>\r
+ </register>\r
+ <register>\r
+ <name>ARB_RW4_WA_MSB</name>\r
+ <description>Arbiter Endpoint 1 Write Address MSB Register</description>\r
+ <addressOffset>0x400060B5</addressOffset>\r
+ <size>8</size>\r
+ <access>read-write</access>\r
+ <resetValue>0</resetValue>\r
+ <resetMask>0</resetMask>\r
+ <fields>\r
+ <field>\r
+ <name>WA9</name>\r
+ <description>Write Address for EP MSB.</description>\r
+ <lsb>0</lsb>\r
+ <msb>0</msb>\r
+ <access>read-write</access>\r
+ </field>\r
+ </fields>\r
+ </register>\r
+ <register>\r
+ <name>ARB_RW4_RA</name>\r
+ <description>Arbiter Endpoint 1 Read Address LSB Register</description>\r
+ <addressOffset>0x400060B6</addressOffset>\r
+ <size>8</size>\r
+ <access>read-write</access>\r
+ <resetValue>0</resetValue>\r
+ <resetMask>0</resetMask>\r
+ <fields>\r
+ <field>\r
+ <name>RA8</name>\r
+ <description>Read Address for EP MSB.</description>\r
+ <lsb>0</lsb>\r
+ <msb>7</msb>\r
+ <access>read-write</access>\r
+ </field>\r
+ </fields>\r
+ </register>\r
+ <register>\r
+ <name>ARB_RW4_RA_MSB</name>\r
+ <description>Arbiter Endpoint 1 Read Address MSB Register</description>\r
+ <addressOffset>0x400060B7</addressOffset>\r
+ <size>8</size>\r
+ <access>read-write</access>\r
+ <resetValue>0</resetValue>\r
+ <resetMask>0</resetMask>\r
+ <fields>\r
+ <field>\r
+ <name>RA9</name>\r
+ <description>Read Address for EP MSB.</description>\r
+ <lsb>0</lsb>\r
+ <msb>0</msb>\r
+ <access>read-write</access>\r
+ </field>\r
+ </fields>\r
+ </register>\r
+ </registers>\r
+ </peripheral>\r
+ <peripheral>\r
+ <name>Debug_Timer</name>\r
+ <description>No description available</description>\r
+ <baseAddress>0x0</baseAddress>\r
+ <addressBlock>\r
+ <offset>0</offset>\r
+ <size>0x0</size>\r
+ <usage>registers</usage>\r
+ </addressBlock>\r
+ <registers>\r
+ <register>\r
+ <name>Debug_Timer_GLOBAL_ENABLE</name>\r
+ <description>PM.ACT.CFG</description>\r
+ <addressOffset>0x400043A3</addressOffset>\r
+ <size>8</size>\r
+ <access>read-write</access>\r
+ <resetValue>0</resetValue>\r
+ <resetMask>0</resetMask>\r
+ <fields>\r
+ <field>\r
+ <name>en_timer</name>\r
+ <description>Enable timer/counters.</description>\r
+ <lsb>0</lsb>\r
<msb>3</msb>\r
<access>read-write</access>\r
</field>\r
</fields>\r
</register>\r
<register>\r
- <name>ARB_EP4_INT_EN</name>\r
- <description>Arbiter Endpoint 1 Interrupt Enable Register</description>\r
- <addressOffset>0x400060B1</addressOffset>\r
+ <name>Debug_Timer_CONTROL</name>\r
+ <description>TMRx.CFG0</description>\r
+ <addressOffset>0x40004F00</addressOffset>\r
<size>8</size>\r
<access>read-write</access>\r
<resetValue>0</resetValue>\r
<resetMask>0</resetMask>\r
<fields>\r
<field>\r
- <name>IN_BUF_FULL_EN</name>\r
- <description>IN Endpoint Local Buffer Full</description>\r
+ <name>EN</name>\r
+ <description>Enables timer/comparator.</description>\r
<lsb>0</lsb>\r
<msb>0</msb>\r
<access>read-write</access>\r
</field>\r
<field>\r
- <name>DMA_GNT_EN</name>\r
- <description>Endpoint DMA Grant</description>\r
+ <name>MODE</name>\r
+ <description>Mode. (0 = Timer; 1 = Comparator)</description>\r
<lsb>1</lsb>\r
<msb>1</msb>\r
<access>read-write</access>\r
+ <enumeratedValues>\r
+ <enumeratedValue>\r
+ <name>Timer</name>\r
+ <description>Timer mode. CNT/CMP register holds timer count value.</description>\r
+ <value>0</value>\r
+ </enumeratedValue>\r
+ <enumeratedValue>\r
+ <name>Comparator</name>\r
+ <description>Comparator mode. CNT/CMP register holds comparator threshold value.</description>\r
+ <value>1</value>\r
+ </enumeratedValue>\r
+ </enumeratedValues>\r
</field>\r
<field>\r
- <name>BUF_OVER_EN</name>\r
- <description>Endpoint Buffer Overflow</description>\r
+ <name>ONESHOT</name>\r
+ <description>Timer stops upon reaching stop condition defined by TMR_CFG bits. Can be restarted by asserting TIMER RESET or disabling and re-enabling block.</description>\r
<lsb>2</lsb>\r
<msb>2</msb>\r
<access>read-write</access>\r
</field>\r
<field>\r
- <name>BUF_UNDER_EN</name>\r
- <description>Endpoint Buffer Underflow</description>\r
+ <name>CMP_BUFF</name>\r
+ <description>Buffer compare register. Compare register updates only on timer terminal count.</description>\r
<lsb>3</lsb>\r
<msb>3</msb>\r
<access>read-write</access>\r
</field>\r
<field>\r
- <name>ERR_INT_EN</name>\r
- <description>Endpoint Error in Transaction Interrupt</description>\r
+ <name>INV</name>\r
+ <description>Invert sense of TIMEREN signal</description>\r
<lsb>4</lsb>\r
<msb>4</msb>\r
<access>read-write</access>\r
</field>\r
<field>\r
- <name>DMA_TERMIN_EN</name>\r
- <description>Endpoint DMA Terminated Enable</description>\r
+ <name>DB</name>\r
+ <description>Deadband mode--Deadband phases phi1 and phi2 are outputted on CMP and TC output pins respectively.</description>\r
<lsb>5</lsb>\r
<msb>5</msb>\r
<access>read-write</access>\r
+ <enumeratedValues>\r
+ <enumeratedValue>\r
+ <name>Timer</name>\r
+ <description>CMP and TC are output.</description>\r
+ <value>0</value>\r
+ </enumeratedValue>\r
+ <enumeratedValue>\r
+ <name>Deadband</name>\r
+ <description>PHI1 (instead of CMP) and PHI2 (instead of TC) are output.</description>\r
+ <value>1</value>\r
+ </enumeratedValue>\r
+ </enumeratedValues>\r
+ </field>\r
+ <field>\r
+ <name>DEADBAND_PERIOD</name>\r
+ <description>Deadband Period</description>\r
+ <lsb>6</lsb>\r
+ <msb>7</msb>\r
+ <access>read-write</access>\r
</field>\r
</fields>\r
</register>\r
<register>\r
- <name>ARB_EP4_INT_SR</name>\r
- <description>Arbiter Endpoint 1 Interrupt Status Register</description>\r
- <addressOffset>0x400060B2</addressOffset>\r
+ <name>Debug_Timer_CONTROL2</name>\r
+ <description>TMRx.CFG1</description>\r
+ <addressOffset>0x40004F01</addressOffset>\r
<size>8</size>\r
<access>read-write</access>\r
<resetValue>0</resetValue>\r
<resetMask>0</resetMask>\r
<fields>\r
<field>\r
- <name>IN_BUF_FULL_EN</name>\r
- <description>IN Endpoint Local Buffer Full</description>\r
+ <name>IRQ_SEL</name>\r
+ <description>Irq selection. (0 = raw interrupts; 1 = status register interrupts)</description>\r
<lsb>0</lsb>\r
<msb>0</msb>\r
<access>read-write</access>\r
</field>\r
<field>\r
- <name>DMA_GNT_EN</name>\r
- <description>Endpoint DMA Grant</description>\r
+ <name>FTC</name>\r
+ <description>First Terminal Count (FTC). Setting this bit forces a single pulse on the TC pin when first enabled.</description>\r
<lsb>1</lsb>\r
<msb>1</msb>\r
<access>read-write</access>\r
+ <enumeratedValues>\r
+ <enumeratedValue>\r
+ <name>Disable_FTC</name>\r
+ <description>Disable the single cycle pulse, which signifies the timer is starting.</description>\r
+ <value>0</value>\r
+ </enumeratedValue>\r
+ <enumeratedValue>\r
+ <name>Enable_FTC</name>\r
+ <description>Enable the single cycle pulse, which signifies the timer is starting.</description>\r
+ <value>1</value>\r
+ </enumeratedValue>\r
+ </enumeratedValues>\r
</field>\r
<field>\r
- <name>BUF_OVER_EN</name>\r
- <description>Endpoint Buffer Overflow</description>\r
+ <name>DCOR</name>\r
+ <description>Disable Clear on Read (DCOR) of Status Register SR0.</description>\r
<lsb>2</lsb>\r
<msb>2</msb>\r
<access>read-write</access>\r
</field>\r
<field>\r
- <name>BUF_UNDER_EN</name>\r
- <description>Endpoint Buffer Underflow</description>\r
+ <name>DBMODE</name>\r
+ <description>Deadband mode (asynchronous/synchronous). CMP output pin is also affected when not in deadband mode (CFG0.DEADBAND).</description>\r
<lsb>3</lsb>\r
<msb>3</msb>\r
<access>read-write</access>\r
</field>\r
<field>\r
- <name>ERR_INT_EN</name>\r
- <description>Endpoint Error in Transaction Interrupt</description>\r
+ <name>CLK_BUS_EN_SEL</name>\r
+ <description>Digital Global Clock selection.</description>\r
<lsb>4</lsb>\r
- <msb>4</msb>\r
+ <msb>6</msb>\r
<access>read-write</access>\r
</field>\r
<field>\r
- <name>DMA_TERMIN_EN</name>\r
- <description>Endpoint DMA Terminated Enable</description>\r
- <lsb>5</lsb>\r
- <msb>5</msb>\r
+ <name>BUS_CLK_SEL</name>\r
+ <description>Bus Clock selection.</description>\r
+ <lsb>7</lsb>\r
+ <msb>7</msb>\r
<access>read-write</access>\r
</field>\r
</fields>\r
</register>\r
<register>\r
- <name>ARB_RW4_WA</name>\r
- <description>Arbiter Endpoint 1 Write Address LSB Register</description>\r
- <addressOffset>0x400060B4</addressOffset>\r
+ <name>Debug_Timer_CONTROL3_</name>\r
+ <description>TMRx.CFG2</description>\r
+ <addressOffset>0x40004F02</addressOffset>\r
<size>8</size>\r
<access>read-write</access>\r
<resetValue>0</resetValue>\r
<resetMask>0</resetMask>\r
<fields>\r
<field>\r
- <name>WA8</name>\r
- <description>Write Address for EP.</description>\r
+ <name>TMR_CFG</name>\r
+ <description>Timer configuration (MODE = 0): 000 = Continuous; 001 = Pulsewidth; 010 = Period; 011 = Stop on IRQ</description>\r
<lsb>0</lsb>\r
- <msb>7</msb>\r
+ <msb>1</msb>\r
<access>read-write</access>\r
+ <enumeratedValues>\r
+ <enumeratedValue>\r
+ <name>Continuous</name>\r
+ <description>Timer runs while EN bit of CFG0 register is set to '1'.</description>\r
+ <value>0</value>\r
+ </enumeratedValue>\r
+ <enumeratedValue>\r
+ <name>Pulsewidth</name>\r
+ <description>Timer runs from positive to negative edge of TIMEREN.</description>\r
+ <value>1</value>\r
+ </enumeratedValue>\r
+ <enumeratedValue>\r
+ <name>Period</name>\r
+ <description>Timer runs from positive to positive edge of TIMEREN.</description>\r
+ <value>2</value>\r
+ </enumeratedValue>\r
+ <enumeratedValue>\r
+ <name>Irq</name>\r
+ <description>Timer runs until IRQ.</description>\r
+ <value>3</value>\r
+ </enumeratedValue>\r
+ </enumeratedValues>\r
</field>\r
- </fields>\r
- </register>\r
- <register>\r
- <name>ARB_RW4_WA_MSB</name>\r
- <description>Arbiter Endpoint 1 Write Address MSB Register</description>\r
- <addressOffset>0x400060B5</addressOffset>\r
- <size>8</size>\r
- <access>read-write</access>\r
- <resetValue>0</resetValue>\r
- <resetMask>0</resetMask>\r
- <fields>\r
<field>\r
- <name>WA9</name>\r
- <description>Write Address for EP MSB.</description>\r
- <lsb>0</lsb>\r
- <msb>0</msb>\r
+ <name>COD</name>\r
+ <description>Clear On Disable (COD). Clears or gates outputs to zero.</description>\r
+ <lsb>2</lsb>\r
+ <msb>2</msb>\r
+ <access>read-write</access>\r
+ </field>\r
+ <field>\r
+ <name>ROD</name>\r
+ <description>Reset On Disable (ROD). Resets internal state of output logic</description>\r
+ <lsb>3</lsb>\r
+ <msb>3</msb>\r
+ <access>read-write</access>\r
+ </field>\r
+ <field>\r
+ <name>CMP_CFG</name>\r
+ <description>Comparator configurations</description>\r
+ <lsb>4</lsb>\r
+ <msb>6</msb>\r
+ <access>read-write</access>\r
+ <enumeratedValues>\r
+ <enumeratedValue>\r
+ <name>Equal</name>\r
+ <description>Compare Equal </description>\r
+ <value>0</value>\r
+ </enumeratedValue>\r
+ <enumeratedValue>\r
+ <name>Less_than</name>\r
+ <description>Compare Less Than </description>\r
+ <value>1</value>\r
+ </enumeratedValue>\r
+ <enumeratedValue>\r
+ <name>Less_than_or_equal</name>\r
+ <description>Compare Less Than or Equal .</description>\r
+ <value>2</value>\r
+ </enumeratedValue>\r
+ <enumeratedValue>\r
+ <name>Greater</name>\r
+ <description>Compare Greater Than .</description>\r
+ <value>3</value>\r
+ </enumeratedValue>\r
+ <enumeratedValue>\r
+ <name>Greater_than_or_equal</name>\r
+ <description>Compare Greater Than or Equal </description>\r
+ <value>4</value>\r
+ </enumeratedValue>\r
+ </enumeratedValues>\r
+ </field>\r
+ <field>\r
+ <name>HW_EN</name>\r
+ <description>When set Timer Enable controls counting.</description>\r
+ <lsb>7</lsb>\r
+ <msb>7</msb>\r
<access>read-write</access>\r
</field>\r
</fields>\r
</register>\r
<register>\r
- <name>ARB_RW4_RA</name>\r
- <description>Arbiter Endpoint 1 Read Address LSB Register</description>\r
- <addressOffset>0x400060B6</addressOffset>\r
- <size>8</size>\r
+ <name>Debug_Timer_PERIOD</name>\r
+ <description>TMRx.PER0 - Assigned Period</description>\r
+ <addressOffset>0x40004F04</addressOffset>\r
+ <size>16</size>\r
<access>read-write</access>\r
<resetValue>0</resetValue>\r
<resetMask>0</resetMask>\r
- <fields>\r
- <field>\r
- <name>RA8</name>\r
- <description>Read Address for EP MSB.</description>\r
- <lsb>0</lsb>\r
- <msb>7</msb>\r
- <access>read-write</access>\r
- </field>\r
- </fields>\r
</register>\r
<register>\r
- <name>ARB_RW4_RA_MSB</name>\r
- <description>Arbiter Endpoint 1 Read Address MSB Register</description>\r
- <addressOffset>0x400060B7</addressOffset>\r
- <size>8</size>\r
+ <name>Debug_Timer_COUNTER</name>\r
+ <description>TMRx.CNT_CMP0 - Current Down Counter Value</description>\r
+ <addressOffset>0x40004F06</addressOffset>\r
+ <size>16</size>\r
<access>read-write</access>\r
<resetValue>0</resetValue>\r
<resetMask>0</resetMask>\r
- <fields>\r
- <field>\r
- <name>RA9</name>\r
- <description>Read Address for EP MSB.</description>\r
- <lsb>0</lsb>\r
- <msb>0</msb>\r
- <access>read-write</access>\r
- </field>\r
- </fields>\r
</register>\r
</registers>\r
</peripheral>\r
<peripheral>\r
<name>SCSI_Out_Ctl</name>\r
<description>No description available</description>\r
- <baseAddress>0x4000647C</baseAddress>\r
+ <baseAddress>0x0</baseAddress>\r
<addressBlock>\r
<offset>0</offset>\r
<size>0x0</size>\r
<register>\r
<name>SCSI_Out_Ctl_CONTROL_REG</name>\r
<description>No description available</description>\r
- <addressOffset>0x0</addressOffset>\r
+ <addressOffset>0x40006477</addressOffset>\r
<size>8</size>\r
<access>read-write</access>\r
<resetValue>0</resetValue>\r
<peripheral>\r
<name>SCSI_Out_Bits</name>\r
<description>No description available</description>\r
- <baseAddress>0x4000647E</baseAddress>\r
+ <baseAddress>0x0</baseAddress>\r
<addressBlock>\r
<offset>0</offset>\r
<size>0x0</size>\r
<register>\r
<name>SCSI_Out_Bits_CONTROL_REG</name>\r
<description>No description available</description>\r
- <addressOffset>0x0</addressOffset>\r
+ <addressOffset>0x4000647A</addressOffset>\r
<size>8</size>\r
<access>read-write</access>\r
<resetValue>0</resetValue>\r
/*******************************************************************************
* File Name: cydevice.h
* OBSOLETE: Do not use this file. Use the _trm version instead.
-* PSoC Creator 4.1
+* PSoC Creator 4.2
*
* Description:
* This file provides all of the address values for the entire PSoC device.
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
-* Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.
+* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
/*******************************************************************************
* File Name: cydevice_trm.h
*
-* PSoC Creator 4.1
+* PSoC Creator 4.2
*
* Description:
* This file provides all of the address values for the entire PSoC device.
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
-* Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.
+* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
/*******************************************************************************
* File Name: cydevicegnu.inc
* OBSOLETE: Do not use this file. Use the _trm version instead.
-* PSoC Creator 4.1
+* PSoC Creator 4.2
*
* Description:
* This file provides all of the address values for the entire PSoC device.
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
-* Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.
+* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
/*******************************************************************************
* File Name: cydevicegnu_trm.inc
*
-* PSoC Creator 4.1
+* PSoC Creator 4.2
*
* Description:
* This file provides all of the address values for the entire PSoC device.
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
-* Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.
+* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
;
; File Name: cydeviceiar.inc
; OBSOLETE: Do not use this file. Use the _trm version instead.
-; PSoC Creator 4.1
+; PSoC Creator 4.2
;
; Description:
; This file provides all of the address values for the entire PSoC device.
;
;-------------------------------------------------------------------------------
-; Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.
+; Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
; You may use this file only in accordance with the license, terms, conditions,
; disclaimers, and limitations in the end user license agreement accompanying
; the software package with which this file was provided.
;
; File Name: cydeviceiar_trm.inc
;
-; PSoC Creator 4.1
+; PSoC Creator 4.2
;
; Description:
; This file provides all of the address values for the entire PSoC device.
;
;-------------------------------------------------------------------------------
-; Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.
+; Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
; You may use this file only in accordance with the license, terms, conditions,
; disclaimers, and limitations in the end user license agreement accompanying
; the software package with which this file was provided.
;
; File Name: cydevicerv.inc
; OBSOLETE: Do not use this file. Use the _trm version instead.
-; PSoC Creator 4.1
+; PSoC Creator 4.2
;
; Description:
; This file provides all of the address values for the entire PSoC device.
;
;-------------------------------------------------------------------------------
-; Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.
+; Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
; You may use this file only in accordance with the license, terms, conditions,
; disclaimers, and limitations in the end user license agreement accompanying
; the software package with which this file was provided.
;
; File Name: cydevicerv_trm.inc
;
-; PSoC Creator 4.1
+; PSoC Creator 4.2
;
; Description:
; This file provides all of the address values for the entire PSoC device.
;
;-------------------------------------------------------------------------------
-; Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.
+; Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
; You may use this file only in accordance with the license, terms, conditions,
; disclaimers, and limitations in the end user license agreement accompanying
; the software package with which this file was provided.
/*******************************************************************************
* File Name: cyfitter.h
*
-* PSoC Creator 4.1
+* PSoC Creator 4.2
*
* Description:
*
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
-* Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.
+* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
#include "cydevice.h"
#include "cydevice_trm.h"
-/* Debug_Timer_Interrupt */
-#define Debug_Timer_Interrupt__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0
-#define Debug_Timer_Interrupt__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0
-#define Debug_Timer_Interrupt__INTC_MASK 0x01u
-#define Debug_Timer_Interrupt__INTC_NUMBER 0u
-#define Debug_Timer_Interrupt__INTC_PRIOR_NUM 7u
-#define Debug_Timer_Interrupt__INTC_PRIOR_REG CYREG_NVIC_PRI_0
-#define Debug_Timer_Interrupt__INTC_SET_EN_REG CYREG_NVIC_SETENA0
-#define Debug_Timer_Interrupt__INTC_SET_PD_REG CYREG_NVIC_SETPEND0
-
-/* Debug_Timer_TimerHW */
-#define Debug_Timer_TimerHW__CAP0 CYREG_TMR0_CAP0
-#define Debug_Timer_TimerHW__CAP1 CYREG_TMR0_CAP1
-#define Debug_Timer_TimerHW__CFG0 CYREG_TMR0_CFG0
-#define Debug_Timer_TimerHW__CFG1 CYREG_TMR0_CFG1
-#define Debug_Timer_TimerHW__CFG2 CYREG_TMR0_CFG2
-#define Debug_Timer_TimerHW__CNT_CMP0 CYREG_TMR0_CNT_CMP0
-#define Debug_Timer_TimerHW__CNT_CMP1 CYREG_TMR0_CNT_CMP1
-#define Debug_Timer_TimerHW__PER0 CYREG_TMR0_PER0
-#define Debug_Timer_TimerHW__PER1 CYREG_TMR0_PER1
-#define Debug_Timer_TimerHW__PM_ACT_CFG CYREG_PM_ACT_CFG3
-#define Debug_Timer_TimerHW__PM_ACT_MSK 0x01u
-#define Debug_Timer_TimerHW__PM_STBY_CFG CYREG_PM_STBY_CFG3
-#define Debug_Timer_TimerHW__PM_STBY_MSK 0x01u
-#define Debug_Timer_TimerHW__RT0 CYREG_TMR0_RT0
-#define Debug_Timer_TimerHW__RT1 CYREG_TMR0_RT1
-#define Debug_Timer_TimerHW__SR0 CYREG_TMR0_SR0
-
/* LED1 */
#define LED1__0__INTTYPE CYREG_PICU12_INTTYPE0
#define LED1__0__MASK 0x01u
#define LED1__SIO_REG_HIFREQ CYREG_PRT12_SIO_REG_HIFREQ
#define LED1__SLW CYREG_PRT12_SLW
-/* SCSI_CLK */
-#define SCSI_CLK__CFG0 CYREG_CLKDIST_DCFG1_CFG0
-#define SCSI_CLK__CFG1 CYREG_CLKDIST_DCFG1_CFG1
-#define SCSI_CLK__CFG2 CYREG_CLKDIST_DCFG1_CFG2
-#define SCSI_CLK__CFG2_SRC_SEL_MASK 0x07u
-#define SCSI_CLK__INDEX 0x01u
-#define SCSI_CLK__PM_ACT_CFG CYREG_PM_ACT_CFG2
-#define SCSI_CLK__PM_ACT_MSK 0x02u
-#define SCSI_CLK__PM_STBY_CFG CYREG_PM_STBY_CFG2
-#define SCSI_CLK__PM_STBY_MSK 0x02u
-
-/* SCSI_CTL_PHASE */
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__0__MASK 0x01u
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__0__POS 0
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__1__MASK 0x02u
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__1__POS 1
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG CYREG_B0_UDB02_03_ACTL
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG CYREG_B0_UDB02_03_CTL
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG CYREG_B0_UDB02_03_CTL
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG CYREG_B0_UDB02_03_CTL
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG CYREG_B0_UDB02_03_CTL
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_MASK_REG CYREG_B0_UDB02_03_MSK
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG CYREG_B0_UDB02_03_MSK
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG CYREG_B0_UDB02_03_MSK
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG CYREG_B0_UDB02_03_MSK
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__2__MASK 0x04u
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__2__POS 2
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_AUX_CTL_REG CYREG_B0_UDB02_ACTL
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_REG CYREG_B0_UDB02_CTL
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_ST_REG CYREG_B0_UDB02_ST_CTL
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_REG CYREG_B0_UDB02_CTL
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_ST_REG CYREG_B0_UDB02_ST_CTL
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__MASK 0x07u
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG CYREG_B0_UDB02_MSK_ACTL
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG CYREG_B0_UDB02_MSK_ACTL
-#define SCSI_CTL_PHASE_Sync_ctrl_reg__PERIOD_REG CYREG_B0_UDB02_MSK
-
-/* SCSI_Filtered */
-#define SCSI_Filtered_sts_sts_reg__0__MASK 0x01u
-#define SCSI_Filtered_sts_sts_reg__0__POS 0
-#define SCSI_Filtered_sts_sts_reg__1__MASK 0x02u
-#define SCSI_Filtered_sts_sts_reg__1__POS 1
-#define SCSI_Filtered_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG CYREG_B0_UDB11_12_ACTL
-#define SCSI_Filtered_sts_sts_reg__16BIT_STATUS_REG CYREG_B0_UDB11_12_ST
-#define SCSI_Filtered_sts_sts_reg__2__MASK 0x04u
-#define SCSI_Filtered_sts_sts_reg__2__POS 2
-#define SCSI_Filtered_sts_sts_reg__3__MASK 0x08u
-#define SCSI_Filtered_sts_sts_reg__3__POS 3
-#define SCSI_Filtered_sts_sts_reg__4__MASK 0x10u
-#define SCSI_Filtered_sts_sts_reg__4__POS 4
-#define SCSI_Filtered_sts_sts_reg__MASK 0x1Fu
-#define SCSI_Filtered_sts_sts_reg__MASK_REG CYREG_B0_UDB11_MSK
-#define SCSI_Filtered_sts_sts_reg__MASK_ST_AUX_CTL_REG CYREG_B0_UDB11_MSK_ACTL
-#define SCSI_Filtered_sts_sts_reg__PER_ST_AUX_CTL_REG CYREG_B0_UDB11_MSK_ACTL
-#define SCSI_Filtered_sts_sts_reg__STATUS_AUX_CTL_REG CYREG_B0_UDB11_ACTL
-#define SCSI_Filtered_sts_sts_reg__STATUS_CNT_REG CYREG_B0_UDB11_ST_CTL
-#define SCSI_Filtered_sts_sts_reg__STATUS_CONTROL_REG CYREG_B0_UDB11_ST_CTL
-#define SCSI_Filtered_sts_sts_reg__STATUS_REG CYREG_B0_UDB11_ST
-
-/* SCSI_Glitch_Ctl */
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__0__MASK 0x01u
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__0__POS 0
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG CYREG_B0_UDB05_06_ACTL
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG CYREG_B0_UDB05_06_CTL
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG CYREG_B0_UDB05_06_CTL
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG CYREG_B0_UDB05_06_CTL
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG CYREG_B0_UDB05_06_CTL
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG CYREG_B0_UDB05_06_MSK
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG CYREG_B0_UDB05_06_MSK
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG CYREG_B0_UDB05_06_MSK
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG CYREG_B0_UDB05_06_MSK
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG CYREG_B0_UDB05_ACTL
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_REG CYREG_B0_UDB05_CTL
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_ST_REG CYREG_B0_UDB05_ST_CTL
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__COUNT_REG CYREG_B0_UDB05_CTL
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__COUNT_ST_REG CYREG_B0_UDB05_ST_CTL
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__MASK 0x01u
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG CYREG_B0_UDB05_MSK_ACTL
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG CYREG_B0_UDB05_MSK_ACTL
-#define SCSI_Glitch_Ctl_Sync_ctrl_reg__PERIOD_REG CYREG_B0_UDB05_MSK
-
-/* SCSI_In */
-#define SCSI_In__0__INTTYPE CYREG_PICU6_INTTYPE1
-#define SCSI_In__0__MASK 0x02u
-#define SCSI_In__0__PC CYREG_PRT6_PC1
-#define SCSI_In__0__PORT 6u
-#define SCSI_In__0__SHIFT 1u
-#define SCSI_In__AG CYREG_PRT6_AG
-#define SCSI_In__AMUX CYREG_PRT6_AMUX
-#define SCSI_In__BIE CYREG_PRT6_BIE
-#define SCSI_In__BIT_MASK CYREG_PRT6_BIT_MASK
-#define SCSI_In__BYP CYREG_PRT6_BYP
-#define SCSI_In__CTL CYREG_PRT6_CTL
-#define SCSI_In__DBP__INTTYPE CYREG_PICU6_INTTYPE1
-#define SCSI_In__DBP__MASK 0x02u
-#define SCSI_In__DBP__PC CYREG_PRT6_PC1
-#define SCSI_In__DBP__PORT 6u
-#define SCSI_In__DBP__SHIFT 1u
-#define SCSI_In__DM0 CYREG_PRT6_DM0
-#define SCSI_In__DM1 CYREG_PRT6_DM1
-#define SCSI_In__DM2 CYREG_PRT6_DM2
-#define SCSI_In__DR CYREG_PRT6_DR
-#define SCSI_In__INP_DIS CYREG_PRT6_INP_DIS
-#define SCSI_In__INTTYPE_BASE CYDEV_PICU_INTTYPE_PICU6_BASE
-#define SCSI_In__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
-#define SCSI_In__LCD_EN CYREG_PRT6_LCD_EN
-#define SCSI_In__MASK 0x02u
-#define SCSI_In__PORT 6u
-#define SCSI_In__PRT CYREG_PRT6_PRT
-#define SCSI_In__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
-#define SCSI_In__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
-#define SCSI_In__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
-#define SCSI_In__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
-#define SCSI_In__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
-#define SCSI_In__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
-#define SCSI_In__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
-#define SCSI_In__PS CYREG_PRT6_PS
-#define SCSI_In__SHIFT 1u
-#define SCSI_In__SLW CYREG_PRT6_SLW
-#define SCSI_In_DBx__0__AG CYREG_PRT6_AG
-#define SCSI_In_DBx__0__AMUX CYREG_PRT6_AMUX
-#define SCSI_In_DBx__0__BIE CYREG_PRT6_BIE
-#define SCSI_In_DBx__0__BIT_MASK CYREG_PRT6_BIT_MASK
-#define SCSI_In_DBx__0__BYP CYREG_PRT6_BYP
-#define SCSI_In_DBx__0__CTL CYREG_PRT6_CTL
-#define SCSI_In_DBx__0__DM0 CYREG_PRT6_DM0
-#define SCSI_In_DBx__0__DM1 CYREG_PRT6_DM1
-#define SCSI_In_DBx__0__DM2 CYREG_PRT6_DM2
-#define SCSI_In_DBx__0__DR CYREG_PRT6_DR
-#define SCSI_In_DBx__0__INP_DIS CYREG_PRT6_INP_DIS
-#define SCSI_In_DBx__0__INTTYPE CYREG_PICU6_INTTYPE6
-#define SCSI_In_DBx__0__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
-#define SCSI_In_DBx__0__LCD_EN CYREG_PRT6_LCD_EN
-#define SCSI_In_DBx__0__MASK 0x40u
-#define SCSI_In_DBx__0__PC CYREG_PRT6_PC6
-#define SCSI_In_DBx__0__PORT 6u
-#define SCSI_In_DBx__0__PRT CYREG_PRT6_PRT
-#define SCSI_In_DBx__0__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
-#define SCSI_In_DBx__0__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
-#define SCSI_In_DBx__0__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
-#define SCSI_In_DBx__0__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
-#define SCSI_In_DBx__0__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
-#define SCSI_In_DBx__0__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
-#define SCSI_In_DBx__0__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
-#define SCSI_In_DBx__0__PS CYREG_PRT6_PS
-#define SCSI_In_DBx__0__SHIFT 6u
-#define SCSI_In_DBx__0__SLW CYREG_PRT6_SLW
-#define SCSI_In_DBx__1__AG CYREG_PRT6_AG
-#define SCSI_In_DBx__1__AMUX CYREG_PRT6_AMUX
-#define SCSI_In_DBx__1__BIE CYREG_PRT6_BIE
-#define SCSI_In_DBx__1__BIT_MASK CYREG_PRT6_BIT_MASK
-#define SCSI_In_DBx__1__BYP CYREG_PRT6_BYP
-#define SCSI_In_DBx__1__CTL CYREG_PRT6_CTL
-#define SCSI_In_DBx__1__DM0 CYREG_PRT6_DM0
-#define SCSI_In_DBx__1__DM1 CYREG_PRT6_DM1
-#define SCSI_In_DBx__1__DM2 CYREG_PRT6_DM2
-#define SCSI_In_DBx__1__DR CYREG_PRT6_DR
-#define SCSI_In_DBx__1__INP_DIS CYREG_PRT6_INP_DIS
-#define SCSI_In_DBx__1__INTTYPE CYREG_PICU6_INTTYPE4
-#define SCSI_In_DBx__1__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
-#define SCSI_In_DBx__1__LCD_EN CYREG_PRT6_LCD_EN
-#define SCSI_In_DBx__1__MASK 0x10u
-#define SCSI_In_DBx__1__PC CYREG_PRT6_PC4
-#define SCSI_In_DBx__1__PORT 6u
-#define SCSI_In_DBx__1__PRT CYREG_PRT6_PRT
-#define SCSI_In_DBx__1__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
-#define SCSI_In_DBx__1__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
-#define SCSI_In_DBx__1__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
-#define SCSI_In_DBx__1__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
-#define SCSI_In_DBx__1__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
-#define SCSI_In_DBx__1__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
-#define SCSI_In_DBx__1__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
-#define SCSI_In_DBx__1__PS CYREG_PRT6_PS
-#define SCSI_In_DBx__1__SHIFT 4u
-#define SCSI_In_DBx__1__SLW CYREG_PRT6_SLW
-#define SCSI_In_DBx__2__AG CYREG_PRT12_AG
-#define SCSI_In_DBx__2__BIE CYREG_PRT12_BIE
-#define SCSI_In_DBx__2__BIT_MASK CYREG_PRT12_BIT_MASK
-#define SCSI_In_DBx__2__BYP CYREG_PRT12_BYP
-#define SCSI_In_DBx__2__DM0 CYREG_PRT12_DM0
-#define SCSI_In_DBx__2__DM1 CYREG_PRT12_DM1
-#define SCSI_In_DBx__2__DM2 CYREG_PRT12_DM2
-#define SCSI_In_DBx__2__DR CYREG_PRT12_DR
-#define SCSI_In_DBx__2__INP_DIS CYREG_PRT12_INP_DIS
-#define SCSI_In_DBx__2__INTTYPE CYREG_PICU12_INTTYPE4
-#define SCSI_In_DBx__2__MASK 0x10u
-#define SCSI_In_DBx__2__PC CYREG_PRT12_PC4
-#define SCSI_In_DBx__2__PORT 12u
-#define SCSI_In_DBx__2__PRT CYREG_PRT12_PRT
-#define SCSI_In_DBx__2__PRTDSI__DBL_SYNC_IN CYREG_PRT12_DBL_SYNC_IN
-#define SCSI_In_DBx__2__PRTDSI__OE_SEL0 CYREG_PRT12_OE_SEL0
-#define SCSI_In_DBx__2__PRTDSI__OE_SEL1 CYREG_PRT12_OE_SEL1
-#define SCSI_In_DBx__2__PRTDSI__OUT_SEL0 CYREG_PRT12_OUT_SEL0
-#define SCSI_In_DBx__2__PRTDSI__OUT_SEL1 CYREG_PRT12_OUT_SEL1
-#define SCSI_In_DBx__2__PRTDSI__SYNC_OUT CYREG_PRT12_SYNC_OUT
-#define SCSI_In_DBx__2__PS CYREG_PRT12_PS
-#define SCSI_In_DBx__2__SHIFT 4u
-#define SCSI_In_DBx__2__SIO_CFG CYREG_PRT12_SIO_CFG
-#define SCSI_In_DBx__2__SIO_DIFF CYREG_PRT12_SIO_DIFF
-#define SCSI_In_DBx__2__SIO_HYST_EN CYREG_PRT12_SIO_HYST_EN
-#define SCSI_In_DBx__2__SIO_REG_HIFREQ CYREG_PRT12_SIO_REG_HIFREQ
-#define SCSI_In_DBx__2__SLW CYREG_PRT12_SLW
-#define SCSI_In_DBx__3__AG CYREG_PRT2_AG
-#define SCSI_In_DBx__3__AMUX CYREG_PRT2_AMUX
-#define SCSI_In_DBx__3__BIE CYREG_PRT2_BIE
-#define SCSI_In_DBx__3__BIT_MASK CYREG_PRT2_BIT_MASK
-#define SCSI_In_DBx__3__BYP CYREG_PRT2_BYP
-#define SCSI_In_DBx__3__CTL CYREG_PRT2_CTL
-#define SCSI_In_DBx__3__DM0 CYREG_PRT2_DM0
-#define SCSI_In_DBx__3__DM1 CYREG_PRT2_DM1
-#define SCSI_In_DBx__3__DM2 CYREG_PRT2_DM2
-#define SCSI_In_DBx__3__DR CYREG_PRT2_DR
-#define SCSI_In_DBx__3__INP_DIS CYREG_PRT2_INP_DIS
-#define SCSI_In_DBx__3__INTTYPE CYREG_PICU2_INTTYPE6
-#define SCSI_In_DBx__3__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
-#define SCSI_In_DBx__3__LCD_EN CYREG_PRT2_LCD_EN
-#define SCSI_In_DBx__3__MASK 0x40u
-#define SCSI_In_DBx__3__PC CYREG_PRT2_PC6
-#define SCSI_In_DBx__3__PORT 2u
-#define SCSI_In_DBx__3__PRT CYREG_PRT2_PRT
-#define SCSI_In_DBx__3__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
-#define SCSI_In_DBx__3__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
-#define SCSI_In_DBx__3__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
-#define SCSI_In_DBx__3__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
-#define SCSI_In_DBx__3__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
-#define SCSI_In_DBx__3__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
-#define SCSI_In_DBx__3__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
-#define SCSI_In_DBx__3__PS CYREG_PRT2_PS
-#define SCSI_In_DBx__3__SHIFT 6u
-#define SCSI_In_DBx__3__SLW CYREG_PRT2_SLW
-#define SCSI_In_DBx__4__AG CYREG_PRT2_AG
-#define SCSI_In_DBx__4__AMUX CYREG_PRT2_AMUX
-#define SCSI_In_DBx__4__BIE CYREG_PRT2_BIE
-#define SCSI_In_DBx__4__BIT_MASK CYREG_PRT2_BIT_MASK
-#define SCSI_In_DBx__4__BYP CYREG_PRT2_BYP
-#define SCSI_In_DBx__4__CTL CYREG_PRT2_CTL
-#define SCSI_In_DBx__4__DM0 CYREG_PRT2_DM0
-#define SCSI_In_DBx__4__DM1 CYREG_PRT2_DM1
-#define SCSI_In_DBx__4__DM2 CYREG_PRT2_DM2
-#define SCSI_In_DBx__4__DR CYREG_PRT2_DR
-#define SCSI_In_DBx__4__INP_DIS CYREG_PRT2_INP_DIS
-#define SCSI_In_DBx__4__INTTYPE CYREG_PICU2_INTTYPE4
-#define SCSI_In_DBx__4__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
-#define SCSI_In_DBx__4__LCD_EN CYREG_PRT2_LCD_EN
-#define SCSI_In_DBx__4__MASK 0x10u
-#define SCSI_In_DBx__4__PC CYREG_PRT2_PC4
-#define SCSI_In_DBx__4__PORT 2u
-#define SCSI_In_DBx__4__PRT CYREG_PRT2_PRT
-#define SCSI_In_DBx__4__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
-#define SCSI_In_DBx__4__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
-#define SCSI_In_DBx__4__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
-#define SCSI_In_DBx__4__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
-#define SCSI_In_DBx__4__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
-#define SCSI_In_DBx__4__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
-#define SCSI_In_DBx__4__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
-#define SCSI_In_DBx__4__PS CYREG_PRT2_PS
-#define SCSI_In_DBx__4__SHIFT 4u
-#define SCSI_In_DBx__4__SLW CYREG_PRT2_SLW
-#define SCSI_In_DBx__5__AG CYREG_PRT2_AG
-#define SCSI_In_DBx__5__AMUX CYREG_PRT2_AMUX
-#define SCSI_In_DBx__5__BIE CYREG_PRT2_BIE
-#define SCSI_In_DBx__5__BIT_MASK CYREG_PRT2_BIT_MASK
-#define SCSI_In_DBx__5__BYP CYREG_PRT2_BYP
-#define SCSI_In_DBx__5__CTL CYREG_PRT2_CTL
-#define SCSI_In_DBx__5__DM0 CYREG_PRT2_DM0
-#define SCSI_In_DBx__5__DM1 CYREG_PRT2_DM1
-#define SCSI_In_DBx__5__DM2 CYREG_PRT2_DM2
-#define SCSI_In_DBx__5__DR CYREG_PRT2_DR
-#define SCSI_In_DBx__5__INP_DIS CYREG_PRT2_INP_DIS
-#define SCSI_In_DBx__5__INTTYPE CYREG_PICU2_INTTYPE2
-#define SCSI_In_DBx__5__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
-#define SCSI_In_DBx__5__LCD_EN CYREG_PRT2_LCD_EN
-#define SCSI_In_DBx__5__MASK 0x04u
-#define SCSI_In_DBx__5__PC CYREG_PRT2_PC2
-#define SCSI_In_DBx__5__PORT 2u
-#define SCSI_In_DBx__5__PRT CYREG_PRT2_PRT
-#define SCSI_In_DBx__5__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
-#define SCSI_In_DBx__5__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
-#define SCSI_In_DBx__5__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
-#define SCSI_In_DBx__5__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
-#define SCSI_In_DBx__5__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
-#define SCSI_In_DBx__5__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
-#define SCSI_In_DBx__5__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
-#define SCSI_In_DBx__5__PS CYREG_PRT2_PS
-#define SCSI_In_DBx__5__SHIFT 2u
-#define SCSI_In_DBx__5__SLW CYREG_PRT2_SLW
-#define SCSI_In_DBx__6__AG CYREG_PRT2_AG
-#define SCSI_In_DBx__6__AMUX CYREG_PRT2_AMUX
-#define SCSI_In_DBx__6__BIE CYREG_PRT2_BIE
-#define SCSI_In_DBx__6__BIT_MASK CYREG_PRT2_BIT_MASK
-#define SCSI_In_DBx__6__BYP CYREG_PRT2_BYP
-#define SCSI_In_DBx__6__CTL CYREG_PRT2_CTL
-#define SCSI_In_DBx__6__DM0 CYREG_PRT2_DM0
-#define SCSI_In_DBx__6__DM1 CYREG_PRT2_DM1
-#define SCSI_In_DBx__6__DM2 CYREG_PRT2_DM2
-#define SCSI_In_DBx__6__DR CYREG_PRT2_DR
-#define SCSI_In_DBx__6__INP_DIS CYREG_PRT2_INP_DIS
-#define SCSI_In_DBx__6__INTTYPE CYREG_PICU2_INTTYPE0
-#define SCSI_In_DBx__6__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
-#define SCSI_In_DBx__6__LCD_EN CYREG_PRT2_LCD_EN
-#define SCSI_In_DBx__6__MASK 0x01u
-#define SCSI_In_DBx__6__PC CYREG_PRT2_PC0
-#define SCSI_In_DBx__6__PORT 2u
-#define SCSI_In_DBx__6__PRT CYREG_PRT2_PRT
-#define SCSI_In_DBx__6__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
-#define SCSI_In_DBx__6__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
-#define SCSI_In_DBx__6__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
-#define SCSI_In_DBx__6__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
-#define SCSI_In_DBx__6__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
-#define SCSI_In_DBx__6__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
-#define SCSI_In_DBx__6__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
-#define SCSI_In_DBx__6__PS CYREG_PRT2_PS
-#define SCSI_In_DBx__6__SHIFT 0u
-#define SCSI_In_DBx__6__SLW CYREG_PRT2_SLW
-#define SCSI_In_DBx__7__AG CYREG_PRT6_AG
-#define SCSI_In_DBx__7__AMUX CYREG_PRT6_AMUX
-#define SCSI_In_DBx__7__BIE CYREG_PRT6_BIE
-#define SCSI_In_DBx__7__BIT_MASK CYREG_PRT6_BIT_MASK
-#define SCSI_In_DBx__7__BYP CYREG_PRT6_BYP
-#define SCSI_In_DBx__7__CTL CYREG_PRT6_CTL
-#define SCSI_In_DBx__7__DM0 CYREG_PRT6_DM0
-#define SCSI_In_DBx__7__DM1 CYREG_PRT6_DM1
-#define SCSI_In_DBx__7__DM2 CYREG_PRT6_DM2
-#define SCSI_In_DBx__7__DR CYREG_PRT6_DR
-#define SCSI_In_DBx__7__INP_DIS CYREG_PRT6_INP_DIS
-#define SCSI_In_DBx__7__INTTYPE CYREG_PICU6_INTTYPE3
-#define SCSI_In_DBx__7__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
-#define SCSI_In_DBx__7__LCD_EN CYREG_PRT6_LCD_EN
-#define SCSI_In_DBx__7__MASK 0x08u
-#define SCSI_In_DBx__7__PC CYREG_PRT6_PC3
-#define SCSI_In_DBx__7__PORT 6u
-#define SCSI_In_DBx__7__PRT CYREG_PRT6_PRT
-#define SCSI_In_DBx__7__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
-#define SCSI_In_DBx__7__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
-#define SCSI_In_DBx__7__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
-#define SCSI_In_DBx__7__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
-#define SCSI_In_DBx__7__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
-#define SCSI_In_DBx__7__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
-#define SCSI_In_DBx__7__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
-#define SCSI_In_DBx__7__PS CYREG_PRT6_PS
-#define SCSI_In_DBx__7__SHIFT 3u
-#define SCSI_In_DBx__7__SLW CYREG_PRT6_SLW
-#define SCSI_In_DBx__DB0__AG CYREG_PRT6_AG
-#define SCSI_In_DBx__DB0__AMUX CYREG_PRT6_AMUX
-#define SCSI_In_DBx__DB0__BIE CYREG_PRT6_BIE
-#define SCSI_In_DBx__DB0__BIT_MASK CYREG_PRT6_BIT_MASK
-#define SCSI_In_DBx__DB0__BYP CYREG_PRT6_BYP
-#define SCSI_In_DBx__DB0__CTL CYREG_PRT6_CTL
-#define SCSI_In_DBx__DB0__DM0 CYREG_PRT6_DM0
-#define SCSI_In_DBx__DB0__DM1 CYREG_PRT6_DM1
-#define SCSI_In_DBx__DB0__DM2 CYREG_PRT6_DM2
-#define SCSI_In_DBx__DB0__DR CYREG_PRT6_DR
-#define SCSI_In_DBx__DB0__INP_DIS CYREG_PRT6_INP_DIS
-#define SCSI_In_DBx__DB0__INTTYPE CYREG_PICU6_INTTYPE6
-#define SCSI_In_DBx__DB0__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
-#define SCSI_In_DBx__DB0__LCD_EN CYREG_PRT6_LCD_EN
-#define SCSI_In_DBx__DB0__MASK 0x40u
-#define SCSI_In_DBx__DB0__PC CYREG_PRT6_PC6
-#define SCSI_In_DBx__DB0__PORT 6u
-#define SCSI_In_DBx__DB0__PRT CYREG_PRT6_PRT
-#define SCSI_In_DBx__DB0__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
-#define SCSI_In_DBx__DB0__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
-#define SCSI_In_DBx__DB0__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
-#define SCSI_In_DBx__DB0__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
-#define SCSI_In_DBx__DB0__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
-#define SCSI_In_DBx__DB0__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
-#define SCSI_In_DBx__DB0__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
-#define SCSI_In_DBx__DB0__PS CYREG_PRT6_PS
-#define SCSI_In_DBx__DB0__SHIFT 6u
-#define SCSI_In_DBx__DB0__SLW CYREG_PRT6_SLW
-#define SCSI_In_DBx__DB1__AG CYREG_PRT6_AG
-#define SCSI_In_DBx__DB1__AMUX CYREG_PRT6_AMUX
-#define SCSI_In_DBx__DB1__BIE CYREG_PRT6_BIE
-#define SCSI_In_DBx__DB1__BIT_MASK CYREG_PRT6_BIT_MASK
-#define SCSI_In_DBx__DB1__BYP CYREG_PRT6_BYP
-#define SCSI_In_DBx__DB1__CTL CYREG_PRT6_CTL
-#define SCSI_In_DBx__DB1__DM0 CYREG_PRT6_DM0
-#define SCSI_In_DBx__DB1__DM1 CYREG_PRT6_DM1
-#define SCSI_In_DBx__DB1__DM2 CYREG_PRT6_DM2
-#define SCSI_In_DBx__DB1__DR CYREG_PRT6_DR
-#define SCSI_In_DBx__DB1__INP_DIS CYREG_PRT6_INP_DIS
-#define SCSI_In_DBx__DB1__INTTYPE CYREG_PICU6_INTTYPE4
-#define SCSI_In_DBx__DB1__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
-#define SCSI_In_DBx__DB1__LCD_EN CYREG_PRT6_LCD_EN
-#define SCSI_In_DBx__DB1__MASK 0x10u
-#define SCSI_In_DBx__DB1__PC CYREG_PRT6_PC4
-#define SCSI_In_DBx__DB1__PORT 6u
-#define SCSI_In_DBx__DB1__PRT CYREG_PRT6_PRT
-#define SCSI_In_DBx__DB1__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
-#define SCSI_In_DBx__DB1__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
-#define SCSI_In_DBx__DB1__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
-#define SCSI_In_DBx__DB1__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
-#define SCSI_In_DBx__DB1__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
-#define SCSI_In_DBx__DB1__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
-#define SCSI_In_DBx__DB1__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
-#define SCSI_In_DBx__DB1__PS CYREG_PRT6_PS
-#define SCSI_In_DBx__DB1__SHIFT 4u
-#define SCSI_In_DBx__DB1__SLW CYREG_PRT6_SLW
-#define SCSI_In_DBx__DB2__AG CYREG_PRT12_AG
-#define SCSI_In_DBx__DB2__BIE CYREG_PRT12_BIE
-#define SCSI_In_DBx__DB2__BIT_MASK CYREG_PRT12_BIT_MASK
-#define SCSI_In_DBx__DB2__BYP CYREG_PRT12_BYP
-#define SCSI_In_DBx__DB2__DM0 CYREG_PRT12_DM0
-#define SCSI_In_DBx__DB2__DM1 CYREG_PRT12_DM1
-#define SCSI_In_DBx__DB2__DM2 CYREG_PRT12_DM2
-#define SCSI_In_DBx__DB2__DR CYREG_PRT12_DR
-#define SCSI_In_DBx__DB2__INP_DIS CYREG_PRT12_INP_DIS
-#define SCSI_In_DBx__DB2__INTTYPE CYREG_PICU12_INTTYPE4
-#define SCSI_In_DBx__DB2__MASK 0x10u
-#define SCSI_In_DBx__DB2__PC CYREG_PRT12_PC4
-#define SCSI_In_DBx__DB2__PORT 12u
-#define SCSI_In_DBx__DB2__PRT CYREG_PRT12_PRT
-#define SCSI_In_DBx__DB2__PRTDSI__DBL_SYNC_IN CYREG_PRT12_DBL_SYNC_IN
-#define SCSI_In_DBx__DB2__PRTDSI__OE_SEL0 CYREG_PRT12_OE_SEL0
-#define SCSI_In_DBx__DB2__PRTDSI__OE_SEL1 CYREG_PRT12_OE_SEL1
-#define SCSI_In_DBx__DB2__PRTDSI__OUT_SEL0 CYREG_PRT12_OUT_SEL0
-#define SCSI_In_DBx__DB2__PRTDSI__OUT_SEL1 CYREG_PRT12_OUT_SEL1
-#define SCSI_In_DBx__DB2__PRTDSI__SYNC_OUT CYREG_PRT12_SYNC_OUT
-#define SCSI_In_DBx__DB2__PS CYREG_PRT12_PS
-#define SCSI_In_DBx__DB2__SHIFT 4u
-#define SCSI_In_DBx__DB2__SIO_CFG CYREG_PRT12_SIO_CFG
-#define SCSI_In_DBx__DB2__SIO_DIFF CYREG_PRT12_SIO_DIFF
-#define SCSI_In_DBx__DB2__SIO_HYST_EN CYREG_PRT12_SIO_HYST_EN
-#define SCSI_In_DBx__DB2__SIO_REG_HIFREQ CYREG_PRT12_SIO_REG_HIFREQ
-#define SCSI_In_DBx__DB2__SLW CYREG_PRT12_SLW
-#define SCSI_In_DBx__DB3__AG CYREG_PRT2_AG
-#define SCSI_In_DBx__DB3__AMUX CYREG_PRT2_AMUX
-#define SCSI_In_DBx__DB3__BIE CYREG_PRT2_BIE
-#define SCSI_In_DBx__DB3__BIT_MASK CYREG_PRT2_BIT_MASK
-#define SCSI_In_DBx__DB3__BYP CYREG_PRT2_BYP
-#define SCSI_In_DBx__DB3__CTL CYREG_PRT2_CTL
-#define SCSI_In_DBx__DB3__DM0 CYREG_PRT2_DM0
-#define SCSI_In_DBx__DB3__DM1 CYREG_PRT2_DM1
-#define SCSI_In_DBx__DB3__DM2 CYREG_PRT2_DM2
-#define SCSI_In_DBx__DB3__DR CYREG_PRT2_DR
-#define SCSI_In_DBx__DB3__INP_DIS CYREG_PRT2_INP_DIS
-#define SCSI_In_DBx__DB3__INTTYPE CYREG_PICU2_INTTYPE6
-#define SCSI_In_DBx__DB3__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
-#define SCSI_In_DBx__DB3__LCD_EN CYREG_PRT2_LCD_EN
-#define SCSI_In_DBx__DB3__MASK 0x40u
-#define SCSI_In_DBx__DB3__PC CYREG_PRT2_PC6
-#define SCSI_In_DBx__DB3__PORT 2u
-#define SCSI_In_DBx__DB3__PRT CYREG_PRT2_PRT
-#define SCSI_In_DBx__DB3__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
-#define SCSI_In_DBx__DB3__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
-#define SCSI_In_DBx__DB3__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
-#define SCSI_In_DBx__DB3__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
-#define SCSI_In_DBx__DB3__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
-#define SCSI_In_DBx__DB3__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
-#define SCSI_In_DBx__DB3__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
-#define SCSI_In_DBx__DB3__PS CYREG_PRT2_PS
-#define SCSI_In_DBx__DB3__SHIFT 6u
-#define SCSI_In_DBx__DB3__SLW CYREG_PRT2_SLW
-#define SCSI_In_DBx__DB4__AG CYREG_PRT2_AG
-#define SCSI_In_DBx__DB4__AMUX CYREG_PRT2_AMUX
-#define SCSI_In_DBx__DB4__BIE CYREG_PRT2_BIE
-#define SCSI_In_DBx__DB4__BIT_MASK CYREG_PRT2_BIT_MASK
-#define SCSI_In_DBx__DB4__BYP CYREG_PRT2_BYP
-#define SCSI_In_DBx__DB4__CTL CYREG_PRT2_CTL
-#define SCSI_In_DBx__DB4__DM0 CYREG_PRT2_DM0
-#define SCSI_In_DBx__DB4__DM1 CYREG_PRT2_DM1
-#define SCSI_In_DBx__DB4__DM2 CYREG_PRT2_DM2
-#define SCSI_In_DBx__DB4__DR CYREG_PRT2_DR
-#define SCSI_In_DBx__DB4__INP_DIS CYREG_PRT2_INP_DIS
-#define SCSI_In_DBx__DB4__INTTYPE CYREG_PICU2_INTTYPE4
-#define SCSI_In_DBx__DB4__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
-#define SCSI_In_DBx__DB4__LCD_EN CYREG_PRT2_LCD_EN
-#define SCSI_In_DBx__DB4__MASK 0x10u
-#define SCSI_In_DBx__DB4__PC CYREG_PRT2_PC4
-#define SCSI_In_DBx__DB4__PORT 2u
-#define SCSI_In_DBx__DB4__PRT CYREG_PRT2_PRT
-#define SCSI_In_DBx__DB4__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
-#define SCSI_In_DBx__DB4__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
-#define SCSI_In_DBx__DB4__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
-#define SCSI_In_DBx__DB4__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
-#define SCSI_In_DBx__DB4__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
-#define SCSI_In_DBx__DB4__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
-#define SCSI_In_DBx__DB4__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
-#define SCSI_In_DBx__DB4__PS CYREG_PRT2_PS
-#define SCSI_In_DBx__DB4__SHIFT 4u
-#define SCSI_In_DBx__DB4__SLW CYREG_PRT2_SLW
-#define SCSI_In_DBx__DB5__AG CYREG_PRT2_AG
-#define SCSI_In_DBx__DB5__AMUX CYREG_PRT2_AMUX
-#define SCSI_In_DBx__DB5__BIE CYREG_PRT2_BIE
-#define SCSI_In_DBx__DB5__BIT_MASK CYREG_PRT2_BIT_MASK
-#define SCSI_In_DBx__DB5__BYP CYREG_PRT2_BYP
-#define SCSI_In_DBx__DB5__CTL CYREG_PRT2_CTL
-#define SCSI_In_DBx__DB5__DM0 CYREG_PRT2_DM0
-#define SCSI_In_DBx__DB5__DM1 CYREG_PRT2_DM1
-#define SCSI_In_DBx__DB5__DM2 CYREG_PRT2_DM2
-#define SCSI_In_DBx__DB5__DR CYREG_PRT2_DR
-#define SCSI_In_DBx__DB5__INP_DIS CYREG_PRT2_INP_DIS
-#define SCSI_In_DBx__DB5__INTTYPE CYREG_PICU2_INTTYPE2
-#define SCSI_In_DBx__DB5__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
-#define SCSI_In_DBx__DB5__LCD_EN CYREG_PRT2_LCD_EN
-#define SCSI_In_DBx__DB5__MASK 0x04u
-#define SCSI_In_DBx__DB5__PC CYREG_PRT2_PC2
-#define SCSI_In_DBx__DB5__PORT 2u
-#define SCSI_In_DBx__DB5__PRT CYREG_PRT2_PRT
-#define SCSI_In_DBx__DB5__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
-#define SCSI_In_DBx__DB5__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
-#define SCSI_In_DBx__DB5__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
-#define SCSI_In_DBx__DB5__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
-#define SCSI_In_DBx__DB5__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
-#define SCSI_In_DBx__DB5__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
-#define SCSI_In_DBx__DB5__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
-#define SCSI_In_DBx__DB5__PS CYREG_PRT2_PS
-#define SCSI_In_DBx__DB5__SHIFT 2u
-#define SCSI_In_DBx__DB5__SLW CYREG_PRT2_SLW
-#define SCSI_In_DBx__DB6__AG CYREG_PRT2_AG
-#define SCSI_In_DBx__DB6__AMUX CYREG_PRT2_AMUX
-#define SCSI_In_DBx__DB6__BIE CYREG_PRT2_BIE
-#define SCSI_In_DBx__DB6__BIT_MASK CYREG_PRT2_BIT_MASK
-#define SCSI_In_DBx__DB6__BYP CYREG_PRT2_BYP
-#define SCSI_In_DBx__DB6__CTL CYREG_PRT2_CTL
-#define SCSI_In_DBx__DB6__DM0 CYREG_PRT2_DM0
-#define SCSI_In_DBx__DB6__DM1 CYREG_PRT2_DM1
-#define SCSI_In_DBx__DB6__DM2 CYREG_PRT2_DM2
-#define SCSI_In_DBx__DB6__DR CYREG_PRT2_DR
-#define SCSI_In_DBx__DB6__INP_DIS CYREG_PRT2_INP_DIS
-#define SCSI_In_DBx__DB6__INTTYPE CYREG_PICU2_INTTYPE0
-#define SCSI_In_DBx__DB6__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
-#define SCSI_In_DBx__DB6__LCD_EN CYREG_PRT2_LCD_EN
-#define SCSI_In_DBx__DB6__MASK 0x01u
-#define SCSI_In_DBx__DB6__PC CYREG_PRT2_PC0
-#define SCSI_In_DBx__DB6__PORT 2u
-#define SCSI_In_DBx__DB6__PRT CYREG_PRT2_PRT
-#define SCSI_In_DBx__DB6__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
-#define SCSI_In_DBx__DB6__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
-#define SCSI_In_DBx__DB6__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
-#define SCSI_In_DBx__DB6__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
-#define SCSI_In_DBx__DB6__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
-#define SCSI_In_DBx__DB6__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
-#define SCSI_In_DBx__DB6__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
-#define SCSI_In_DBx__DB6__PS CYREG_PRT2_PS
-#define SCSI_In_DBx__DB6__SHIFT 0u
-#define SCSI_In_DBx__DB6__SLW CYREG_PRT2_SLW
-#define SCSI_In_DBx__DB7__AG CYREG_PRT6_AG
-#define SCSI_In_DBx__DB7__AMUX CYREG_PRT6_AMUX
-#define SCSI_In_DBx__DB7__BIE CYREG_PRT6_BIE
-#define SCSI_In_DBx__DB7__BIT_MASK CYREG_PRT6_BIT_MASK
-#define SCSI_In_DBx__DB7__BYP CYREG_PRT6_BYP
-#define SCSI_In_DBx__DB7__CTL CYREG_PRT6_CTL
-#define SCSI_In_DBx__DB7__DM0 CYREG_PRT6_DM0
-#define SCSI_In_DBx__DB7__DM1 CYREG_PRT6_DM1
-#define SCSI_In_DBx__DB7__DM2 CYREG_PRT6_DM2
-#define SCSI_In_DBx__DB7__DR CYREG_PRT6_DR
-#define SCSI_In_DBx__DB7__INP_DIS CYREG_PRT6_INP_DIS
-#define SCSI_In_DBx__DB7__INTTYPE CYREG_PICU6_INTTYPE3
-#define SCSI_In_DBx__DB7__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
-#define SCSI_In_DBx__DB7__LCD_EN CYREG_PRT6_LCD_EN
-#define SCSI_In_DBx__DB7__MASK 0x08u
-#define SCSI_In_DBx__DB7__PC CYREG_PRT6_PC3
-#define SCSI_In_DBx__DB7__PORT 6u
-#define SCSI_In_DBx__DB7__PRT CYREG_PRT6_PRT
-#define SCSI_In_DBx__DB7__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
-#define SCSI_In_DBx__DB7__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
-#define SCSI_In_DBx__DB7__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
-#define SCSI_In_DBx__DB7__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
-#define SCSI_In_DBx__DB7__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
-#define SCSI_In_DBx__DB7__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
-#define SCSI_In_DBx__DB7__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
-#define SCSI_In_DBx__DB7__PS CYREG_PRT6_PS
-#define SCSI_In_DBx__DB7__SHIFT 3u
-#define SCSI_In_DBx__DB7__SLW CYREG_PRT6_SLW
-
-/* SCSI_Noise */
-#define SCSI_Noise__0__AG CYREG_PRT4_AG
-#define SCSI_Noise__0__AMUX CYREG_PRT4_AMUX
-#define SCSI_Noise__0__BIE CYREG_PRT4_BIE
-#define SCSI_Noise__0__BIT_MASK CYREG_PRT4_BIT_MASK
-#define SCSI_Noise__0__BYP CYREG_PRT4_BYP
-#define SCSI_Noise__0__CTL CYREG_PRT4_CTL
-#define SCSI_Noise__0__DM0 CYREG_PRT4_DM0
-#define SCSI_Noise__0__DM1 CYREG_PRT4_DM1
-#define SCSI_Noise__0__DM2 CYREG_PRT4_DM2
-#define SCSI_Noise__0__DR CYREG_PRT4_DR
-#define SCSI_Noise__0__INP_DIS CYREG_PRT4_INP_DIS
-#define SCSI_Noise__0__INTTYPE CYREG_PICU4_INTTYPE7
-#define SCSI_Noise__0__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG
-#define SCSI_Noise__0__LCD_EN CYREG_PRT4_LCD_EN
-#define SCSI_Noise__0__MASK 0x80u
-#define SCSI_Noise__0__PC CYREG_PRT4_PC7
-#define SCSI_Noise__0__PORT 4u
-#define SCSI_Noise__0__PRT CYREG_PRT4_PRT
-#define SCSI_Noise__0__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL
-#define SCSI_Noise__0__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN
-#define SCSI_Noise__0__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0
-#define SCSI_Noise__0__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1
-#define SCSI_Noise__0__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0
-#define SCSI_Noise__0__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1
-#define SCSI_Noise__0__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT
-#define SCSI_Noise__0__PS CYREG_PRT4_PS
-#define SCSI_Noise__0__SHIFT 7u
-#define SCSI_Noise__0__SLW CYREG_PRT4_SLW
-#define SCSI_Noise__1__AG CYREG_PRT4_AG
-#define SCSI_Noise__1__AMUX CYREG_PRT4_AMUX
-#define SCSI_Noise__1__BIE CYREG_PRT4_BIE
-#define SCSI_Noise__1__BIT_MASK CYREG_PRT4_BIT_MASK
-#define SCSI_Noise__1__BYP CYREG_PRT4_BYP
-#define SCSI_Noise__1__CTL CYREG_PRT4_CTL
-#define SCSI_Noise__1__DM0 CYREG_PRT4_DM0
-#define SCSI_Noise__1__DM1 CYREG_PRT4_DM1
-#define SCSI_Noise__1__DM2 CYREG_PRT4_DM2
-#define SCSI_Noise__1__DR CYREG_PRT4_DR
-#define SCSI_Noise__1__INP_DIS CYREG_PRT4_INP_DIS
-#define SCSI_Noise__1__INTTYPE CYREG_PICU4_INTTYPE5
-#define SCSI_Noise__1__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG
-#define SCSI_Noise__1__LCD_EN CYREG_PRT4_LCD_EN
-#define SCSI_Noise__1__MASK 0x20u
-#define SCSI_Noise__1__PC CYREG_PRT4_PC5
-#define SCSI_Noise__1__PORT 4u
-#define SCSI_Noise__1__PRT CYREG_PRT4_PRT
-#define SCSI_Noise__1__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL
-#define SCSI_Noise__1__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN
-#define SCSI_Noise__1__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0
-#define SCSI_Noise__1__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1
-#define SCSI_Noise__1__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0
-#define SCSI_Noise__1__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1
-#define SCSI_Noise__1__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT
-#define SCSI_Noise__1__PS CYREG_PRT4_PS
-#define SCSI_Noise__1__SHIFT 5u
-#define SCSI_Noise__1__SLW CYREG_PRT4_SLW
-#define SCSI_Noise__2__AG CYREG_PRT0_AG
-#define SCSI_Noise__2__AMUX CYREG_PRT0_AMUX
-#define SCSI_Noise__2__BIE CYREG_PRT0_BIE
-#define SCSI_Noise__2__BIT_MASK CYREG_PRT0_BIT_MASK
-#define SCSI_Noise__2__BYP CYREG_PRT0_BYP
-#define SCSI_Noise__2__CTL CYREG_PRT0_CTL
-#define SCSI_Noise__2__DM0 CYREG_PRT0_DM0
-#define SCSI_Noise__2__DM1 CYREG_PRT0_DM1
-#define SCSI_Noise__2__DM2 CYREG_PRT0_DM2
-#define SCSI_Noise__2__DR CYREG_PRT0_DR
-#define SCSI_Noise__2__INP_DIS CYREG_PRT0_INP_DIS
-#define SCSI_Noise__2__INTTYPE CYREG_PICU0_INTTYPE2
-#define SCSI_Noise__2__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
-#define SCSI_Noise__2__LCD_EN CYREG_PRT0_LCD_EN
-#define SCSI_Noise__2__MASK 0x04u
-#define SCSI_Noise__2__PC CYREG_PRT0_PC2
-#define SCSI_Noise__2__PORT 0u
-#define SCSI_Noise__2__PRT CYREG_PRT0_PRT
-#define SCSI_Noise__2__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
-#define SCSI_Noise__2__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
-#define SCSI_Noise__2__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
-#define SCSI_Noise__2__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
-#define SCSI_Noise__2__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
-#define SCSI_Noise__2__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
-#define SCSI_Noise__2__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
-#define SCSI_Noise__2__PS CYREG_PRT0_PS
-#define SCSI_Noise__2__SHIFT 2u
-#define SCSI_Noise__2__SLW CYREG_PRT0_SLW
-#define SCSI_Noise__3__AG CYREG_PRT0_AG
-#define SCSI_Noise__3__AMUX CYREG_PRT0_AMUX
-#define SCSI_Noise__3__BIE CYREG_PRT0_BIE
-#define SCSI_Noise__3__BIT_MASK CYREG_PRT0_BIT_MASK
-#define SCSI_Noise__3__BYP CYREG_PRT0_BYP
-#define SCSI_Noise__3__CTL CYREG_PRT0_CTL
-#define SCSI_Noise__3__DM0 CYREG_PRT0_DM0
-#define SCSI_Noise__3__DM1 CYREG_PRT0_DM1
-#define SCSI_Noise__3__DM2 CYREG_PRT0_DM2
-#define SCSI_Noise__3__DR CYREG_PRT0_DR
-#define SCSI_Noise__3__INP_DIS CYREG_PRT0_INP_DIS
-#define SCSI_Noise__3__INTTYPE CYREG_PICU0_INTTYPE6
-#define SCSI_Noise__3__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
-#define SCSI_Noise__3__LCD_EN CYREG_PRT0_LCD_EN
-#define SCSI_Noise__3__MASK 0x40u
-#define SCSI_Noise__3__PC CYREG_PRT0_PC6
-#define SCSI_Noise__3__PORT 0u
-#define SCSI_Noise__3__PRT CYREG_PRT0_PRT
-#define SCSI_Noise__3__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
-#define SCSI_Noise__3__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
-#define SCSI_Noise__3__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
-#define SCSI_Noise__3__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
-#define SCSI_Noise__3__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
-#define SCSI_Noise__3__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
-#define SCSI_Noise__3__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
-#define SCSI_Noise__3__PS CYREG_PRT0_PS
-#define SCSI_Noise__3__SHIFT 6u
-#define SCSI_Noise__3__SLW CYREG_PRT0_SLW
-#define SCSI_Noise__4__AG CYREG_PRT4_AG
-#define SCSI_Noise__4__AMUX CYREG_PRT4_AMUX
-#define SCSI_Noise__4__BIE CYREG_PRT4_BIE
-#define SCSI_Noise__4__BIT_MASK CYREG_PRT4_BIT_MASK
-#define SCSI_Noise__4__BYP CYREG_PRT4_BYP
-#define SCSI_Noise__4__CTL CYREG_PRT4_CTL
-#define SCSI_Noise__4__DM0 CYREG_PRT4_DM0
-#define SCSI_Noise__4__DM1 CYREG_PRT4_DM1
-#define SCSI_Noise__4__DM2 CYREG_PRT4_DM2
-#define SCSI_Noise__4__DR CYREG_PRT4_DR
-#define SCSI_Noise__4__INP_DIS CYREG_PRT4_INP_DIS
-#define SCSI_Noise__4__INTTYPE CYREG_PICU4_INTTYPE3
-#define SCSI_Noise__4__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG
-#define SCSI_Noise__4__LCD_EN CYREG_PRT4_LCD_EN
-#define SCSI_Noise__4__MASK 0x08u
-#define SCSI_Noise__4__PC CYREG_PRT4_PC3
-#define SCSI_Noise__4__PORT 4u
-#define SCSI_Noise__4__PRT CYREG_PRT4_PRT
-#define SCSI_Noise__4__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL
-#define SCSI_Noise__4__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN
-#define SCSI_Noise__4__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0
-#define SCSI_Noise__4__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1
-#define SCSI_Noise__4__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0
-#define SCSI_Noise__4__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1
-#define SCSI_Noise__4__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT
-#define SCSI_Noise__4__PS CYREG_PRT4_PS
-#define SCSI_Noise__4__SHIFT 3u
-#define SCSI_Noise__4__SLW CYREG_PRT4_SLW
-#define SCSI_Noise__ACK__AG CYREG_PRT4_AG
-#define SCSI_Noise__ACK__AMUX CYREG_PRT4_AMUX
-#define SCSI_Noise__ACK__BIE CYREG_PRT4_BIE
-#define SCSI_Noise__ACK__BIT_MASK CYREG_PRT4_BIT_MASK
-#define SCSI_Noise__ACK__BYP CYREG_PRT4_BYP
-#define SCSI_Noise__ACK__CTL CYREG_PRT4_CTL
-#define SCSI_Noise__ACK__DM0 CYREG_PRT4_DM0
-#define SCSI_Noise__ACK__DM1 CYREG_PRT4_DM1
-#define SCSI_Noise__ACK__DM2 CYREG_PRT4_DM2
-#define SCSI_Noise__ACK__DR CYREG_PRT4_DR
-#define SCSI_Noise__ACK__INP_DIS CYREG_PRT4_INP_DIS
-#define SCSI_Noise__ACK__INTTYPE CYREG_PICU4_INTTYPE3
-#define SCSI_Noise__ACK__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG
-#define SCSI_Noise__ACK__LCD_EN CYREG_PRT4_LCD_EN
-#define SCSI_Noise__ACK__MASK 0x08u
-#define SCSI_Noise__ACK__PC CYREG_PRT4_PC3
-#define SCSI_Noise__ACK__PORT 4u
-#define SCSI_Noise__ACK__PRT CYREG_PRT4_PRT
-#define SCSI_Noise__ACK__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL
-#define SCSI_Noise__ACK__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN
-#define SCSI_Noise__ACK__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0
-#define SCSI_Noise__ACK__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1
-#define SCSI_Noise__ACK__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0
-#define SCSI_Noise__ACK__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1
-#define SCSI_Noise__ACK__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT
-#define SCSI_Noise__ACK__PS CYREG_PRT4_PS
-#define SCSI_Noise__ACK__SHIFT 3u
-#define SCSI_Noise__ACK__SLW CYREG_PRT4_SLW
-#define SCSI_Noise__ATN__AG CYREG_PRT4_AG
-#define SCSI_Noise__ATN__AMUX CYREG_PRT4_AMUX
-#define SCSI_Noise__ATN__BIE CYREG_PRT4_BIE
-#define SCSI_Noise__ATN__BIT_MASK CYREG_PRT4_BIT_MASK
-#define SCSI_Noise__ATN__BYP CYREG_PRT4_BYP
-#define SCSI_Noise__ATN__CTL CYREG_PRT4_CTL
-#define SCSI_Noise__ATN__DM0 CYREG_PRT4_DM0
-#define SCSI_Noise__ATN__DM1 CYREG_PRT4_DM1
-#define SCSI_Noise__ATN__DM2 CYREG_PRT4_DM2
-#define SCSI_Noise__ATN__DR CYREG_PRT4_DR
-#define SCSI_Noise__ATN__INP_DIS CYREG_PRT4_INP_DIS
-#define SCSI_Noise__ATN__INTTYPE CYREG_PICU4_INTTYPE7
-#define SCSI_Noise__ATN__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG
-#define SCSI_Noise__ATN__LCD_EN CYREG_PRT4_LCD_EN
-#define SCSI_Noise__ATN__MASK 0x80u
-#define SCSI_Noise__ATN__PC CYREG_PRT4_PC7
-#define SCSI_Noise__ATN__PORT 4u
-#define SCSI_Noise__ATN__PRT CYREG_PRT4_PRT
-#define SCSI_Noise__ATN__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL
-#define SCSI_Noise__ATN__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN
-#define SCSI_Noise__ATN__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0
-#define SCSI_Noise__ATN__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1
-#define SCSI_Noise__ATN__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0
-#define SCSI_Noise__ATN__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1
-#define SCSI_Noise__ATN__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT
-#define SCSI_Noise__ATN__PS CYREG_PRT4_PS
-#define SCSI_Noise__ATN__SHIFT 7u
-#define SCSI_Noise__ATN__SLW CYREG_PRT4_SLW
-#define SCSI_Noise__BSY__AG CYREG_PRT4_AG
-#define SCSI_Noise__BSY__AMUX CYREG_PRT4_AMUX
-#define SCSI_Noise__BSY__BIE CYREG_PRT4_BIE
-#define SCSI_Noise__BSY__BIT_MASK CYREG_PRT4_BIT_MASK
-#define SCSI_Noise__BSY__BYP CYREG_PRT4_BYP
-#define SCSI_Noise__BSY__CTL CYREG_PRT4_CTL
-#define SCSI_Noise__BSY__DM0 CYREG_PRT4_DM0
-#define SCSI_Noise__BSY__DM1 CYREG_PRT4_DM1
-#define SCSI_Noise__BSY__DM2 CYREG_PRT4_DM2
-#define SCSI_Noise__BSY__DR CYREG_PRT4_DR
-#define SCSI_Noise__BSY__INP_DIS CYREG_PRT4_INP_DIS
-#define SCSI_Noise__BSY__INTTYPE CYREG_PICU4_INTTYPE5
-#define SCSI_Noise__BSY__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG
-#define SCSI_Noise__BSY__LCD_EN CYREG_PRT4_LCD_EN
-#define SCSI_Noise__BSY__MASK 0x20u
-#define SCSI_Noise__BSY__PC CYREG_PRT4_PC5
-#define SCSI_Noise__BSY__PORT 4u
-#define SCSI_Noise__BSY__PRT CYREG_PRT4_PRT
-#define SCSI_Noise__BSY__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL
-#define SCSI_Noise__BSY__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN
-#define SCSI_Noise__BSY__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0
-#define SCSI_Noise__BSY__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1
-#define SCSI_Noise__BSY__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0
-#define SCSI_Noise__BSY__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1
-#define SCSI_Noise__BSY__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT
-#define SCSI_Noise__BSY__PS CYREG_PRT4_PS
-#define SCSI_Noise__BSY__SHIFT 5u
-#define SCSI_Noise__BSY__SLW CYREG_PRT4_SLW
-#define SCSI_Noise__RST__AG CYREG_PRT0_AG
-#define SCSI_Noise__RST__AMUX CYREG_PRT0_AMUX
-#define SCSI_Noise__RST__BIE CYREG_PRT0_BIE
-#define SCSI_Noise__RST__BIT_MASK CYREG_PRT0_BIT_MASK
-#define SCSI_Noise__RST__BYP CYREG_PRT0_BYP
-#define SCSI_Noise__RST__CTL CYREG_PRT0_CTL
-#define SCSI_Noise__RST__DM0 CYREG_PRT0_DM0
-#define SCSI_Noise__RST__DM1 CYREG_PRT0_DM1
-#define SCSI_Noise__RST__DM2 CYREG_PRT0_DM2
-#define SCSI_Noise__RST__DR CYREG_PRT0_DR
-#define SCSI_Noise__RST__INP_DIS CYREG_PRT0_INP_DIS
-#define SCSI_Noise__RST__INTTYPE CYREG_PICU0_INTTYPE6
-#define SCSI_Noise__RST__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
-#define SCSI_Noise__RST__LCD_EN CYREG_PRT0_LCD_EN
-#define SCSI_Noise__RST__MASK 0x40u
-#define SCSI_Noise__RST__PC CYREG_PRT0_PC6
-#define SCSI_Noise__RST__PORT 0u
-#define SCSI_Noise__RST__PRT CYREG_PRT0_PRT
-#define SCSI_Noise__RST__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
-#define SCSI_Noise__RST__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
-#define SCSI_Noise__RST__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
-#define SCSI_Noise__RST__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
-#define SCSI_Noise__RST__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
-#define SCSI_Noise__RST__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
-#define SCSI_Noise__RST__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
-#define SCSI_Noise__RST__PS CYREG_PRT0_PS
-#define SCSI_Noise__RST__SHIFT 6u
-#define SCSI_Noise__RST__SLW CYREG_PRT0_SLW
-#define SCSI_Noise__SEL__AG CYREG_PRT0_AG
-#define SCSI_Noise__SEL__AMUX CYREG_PRT0_AMUX
-#define SCSI_Noise__SEL__BIE CYREG_PRT0_BIE
-#define SCSI_Noise__SEL__BIT_MASK CYREG_PRT0_BIT_MASK
-#define SCSI_Noise__SEL__BYP CYREG_PRT0_BYP
-#define SCSI_Noise__SEL__CTL CYREG_PRT0_CTL
-#define SCSI_Noise__SEL__DM0 CYREG_PRT0_DM0
-#define SCSI_Noise__SEL__DM1 CYREG_PRT0_DM1
-#define SCSI_Noise__SEL__DM2 CYREG_PRT0_DM2
-#define SCSI_Noise__SEL__DR CYREG_PRT0_DR
-#define SCSI_Noise__SEL__INP_DIS CYREG_PRT0_INP_DIS
-#define SCSI_Noise__SEL__INTTYPE CYREG_PICU0_INTTYPE2
-#define SCSI_Noise__SEL__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
-#define SCSI_Noise__SEL__LCD_EN CYREG_PRT0_LCD_EN
-#define SCSI_Noise__SEL__MASK 0x04u
-#define SCSI_Noise__SEL__PC CYREG_PRT0_PC2
-#define SCSI_Noise__SEL__PORT 0u
-#define SCSI_Noise__SEL__PRT CYREG_PRT0_PRT
-#define SCSI_Noise__SEL__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
-#define SCSI_Noise__SEL__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
-#define SCSI_Noise__SEL__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
-#define SCSI_Noise__SEL__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
-#define SCSI_Noise__SEL__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
-#define SCSI_Noise__SEL__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
-#define SCSI_Noise__SEL__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
-#define SCSI_Noise__SEL__PS CYREG_PRT0_PS
-#define SCSI_Noise__SEL__SHIFT 2u
-#define SCSI_Noise__SEL__SLW CYREG_PRT0_SLW
-
-/* SCSI_Out */
-#define SCSI_Out__0__AG CYREG_PRT6_AG
-#define SCSI_Out__0__AMUX CYREG_PRT6_AMUX
-#define SCSI_Out__0__BIE CYREG_PRT6_BIE
-#define SCSI_Out__0__BIT_MASK CYREG_PRT6_BIT_MASK
-#define SCSI_Out__0__BYP CYREG_PRT6_BYP
-#define SCSI_Out__0__CTL CYREG_PRT6_CTL
-#define SCSI_Out__0__DM0 CYREG_PRT6_DM0
-#define SCSI_Out__0__DM1 CYREG_PRT6_DM1
-#define SCSI_Out__0__DM2 CYREG_PRT6_DM2
-#define SCSI_Out__0__DR CYREG_PRT6_DR
-#define SCSI_Out__0__INP_DIS CYREG_PRT6_INP_DIS
-#define SCSI_Out__0__INTTYPE CYREG_PICU6_INTTYPE2
-#define SCSI_Out__0__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
-#define SCSI_Out__0__LCD_EN CYREG_PRT6_LCD_EN
-#define SCSI_Out__0__MASK 0x04u
-#define SCSI_Out__0__PC CYREG_PRT6_PC2
-#define SCSI_Out__0__PORT 6u
-#define SCSI_Out__0__PRT CYREG_PRT6_PRT
-#define SCSI_Out__0__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
-#define SCSI_Out__0__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
-#define SCSI_Out__0__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
-#define SCSI_Out__0__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
-#define SCSI_Out__0__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
-#define SCSI_Out__0__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
-#define SCSI_Out__0__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
-#define SCSI_Out__0__PS CYREG_PRT6_PS
-#define SCSI_Out__0__SHIFT 2u
-#define SCSI_Out__0__SLW CYREG_PRT6_SLW
-#define SCSI_Out__1__AG CYREG_PRT4_AG
-#define SCSI_Out__1__AMUX CYREG_PRT4_AMUX
-#define SCSI_Out__1__BIE CYREG_PRT4_BIE
-#define SCSI_Out__1__BIT_MASK CYREG_PRT4_BIT_MASK
-#define SCSI_Out__1__BYP CYREG_PRT4_BYP
-#define SCSI_Out__1__CTL CYREG_PRT4_CTL
-#define SCSI_Out__1__DM0 CYREG_PRT4_DM0
-#define SCSI_Out__1__DM1 CYREG_PRT4_DM1
-#define SCSI_Out__1__DM2 CYREG_PRT4_DM2
-#define SCSI_Out__1__DR CYREG_PRT4_DR
-#define SCSI_Out__1__INP_DIS CYREG_PRT4_INP_DIS
-#define SCSI_Out__1__INTTYPE CYREG_PICU4_INTTYPE6
-#define SCSI_Out__1__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG
-#define SCSI_Out__1__LCD_EN CYREG_PRT4_LCD_EN
-#define SCSI_Out__1__MASK 0x40u
-#define SCSI_Out__1__PC CYREG_PRT4_PC6
-#define SCSI_Out__1__PORT 4u
-#define SCSI_Out__1__PRT CYREG_PRT4_PRT
-#define SCSI_Out__1__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL
-#define SCSI_Out__1__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN
-#define SCSI_Out__1__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0
-#define SCSI_Out__1__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1
-#define SCSI_Out__1__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0
-#define SCSI_Out__1__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1
-#define SCSI_Out__1__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT
-#define SCSI_Out__1__PS CYREG_PRT4_PS
-#define SCSI_Out__1__SHIFT 6u
-#define SCSI_Out__1__SLW CYREG_PRT4_SLW
-#define SCSI_Out__2__AG CYREG_PRT0_AG
-#define SCSI_Out__2__AMUX CYREG_PRT0_AMUX
-#define SCSI_Out__2__BIE CYREG_PRT0_BIE
-#define SCSI_Out__2__BIT_MASK CYREG_PRT0_BIT_MASK
-#define SCSI_Out__2__BYP CYREG_PRT0_BYP
-#define SCSI_Out__2__CTL CYREG_PRT0_CTL
-#define SCSI_Out__2__DM0 CYREG_PRT0_DM0
-#define SCSI_Out__2__DM1 CYREG_PRT0_DM1
-#define SCSI_Out__2__DM2 CYREG_PRT0_DM2
-#define SCSI_Out__2__DR CYREG_PRT0_DR
-#define SCSI_Out__2__INP_DIS CYREG_PRT0_INP_DIS
-#define SCSI_Out__2__INTTYPE CYREG_PICU0_INTTYPE7
-#define SCSI_Out__2__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
-#define SCSI_Out__2__LCD_EN CYREG_PRT0_LCD_EN
-#define SCSI_Out__2__MASK 0x80u
-#define SCSI_Out__2__PC CYREG_PRT0_PC7
-#define SCSI_Out__2__PORT 0u
-#define SCSI_Out__2__PRT CYREG_PRT0_PRT
-#define SCSI_Out__2__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
-#define SCSI_Out__2__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
-#define SCSI_Out__2__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
-#define SCSI_Out__2__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
-#define SCSI_Out__2__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
-#define SCSI_Out__2__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
-#define SCSI_Out__2__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
-#define SCSI_Out__2__PS CYREG_PRT0_PS
-#define SCSI_Out__2__SHIFT 7u
-#define SCSI_Out__2__SLW CYREG_PRT0_SLW
-#define SCSI_Out__3__AG CYREG_PRT0_AG
-#define SCSI_Out__3__AMUX CYREG_PRT0_AMUX
-#define SCSI_Out__3__BIE CYREG_PRT0_BIE
-#define SCSI_Out__3__BIT_MASK CYREG_PRT0_BIT_MASK
-#define SCSI_Out__3__BYP CYREG_PRT0_BYP
-#define SCSI_Out__3__CTL CYREG_PRT0_CTL
-#define SCSI_Out__3__DM0 CYREG_PRT0_DM0
-#define SCSI_Out__3__DM1 CYREG_PRT0_DM1
-#define SCSI_Out__3__DM2 CYREG_PRT0_DM2
-#define SCSI_Out__3__DR CYREG_PRT0_DR
-#define SCSI_Out__3__INP_DIS CYREG_PRT0_INP_DIS
-#define SCSI_Out__3__INTTYPE CYREG_PICU0_INTTYPE5
-#define SCSI_Out__3__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
-#define SCSI_Out__3__LCD_EN CYREG_PRT0_LCD_EN
-#define SCSI_Out__3__MASK 0x20u
-#define SCSI_Out__3__PC CYREG_PRT0_PC5
-#define SCSI_Out__3__PORT 0u
-#define SCSI_Out__3__PRT CYREG_PRT0_PRT
-#define SCSI_Out__3__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
-#define SCSI_Out__3__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
-#define SCSI_Out__3__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
-#define SCSI_Out__3__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
-#define SCSI_Out__3__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
-#define SCSI_Out__3__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
-#define SCSI_Out__3__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
-#define SCSI_Out__3__PS CYREG_PRT0_PS
-#define SCSI_Out__3__SHIFT 5u
-#define SCSI_Out__3__SLW CYREG_PRT0_SLW
-#define SCSI_Out__4__AG CYREG_PRT0_AG
-#define SCSI_Out__4__AMUX CYREG_PRT0_AMUX
-#define SCSI_Out__4__BIE CYREG_PRT0_BIE
-#define SCSI_Out__4__BIT_MASK CYREG_PRT0_BIT_MASK
-#define SCSI_Out__4__BYP CYREG_PRT0_BYP
-#define SCSI_Out__4__CTL CYREG_PRT0_CTL
-#define SCSI_Out__4__DM0 CYREG_PRT0_DM0
-#define SCSI_Out__4__DM1 CYREG_PRT0_DM1
-#define SCSI_Out__4__DM2 CYREG_PRT0_DM2
-#define SCSI_Out__4__DR CYREG_PRT0_DR
-#define SCSI_Out__4__INP_DIS CYREG_PRT0_INP_DIS
-#define SCSI_Out__4__INTTYPE CYREG_PICU0_INTTYPE3
-#define SCSI_Out__4__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
-#define SCSI_Out__4__LCD_EN CYREG_PRT0_LCD_EN
-#define SCSI_Out__4__MASK 0x08u
-#define SCSI_Out__4__PC CYREG_PRT0_PC3
-#define SCSI_Out__4__PORT 0u
-#define SCSI_Out__4__PRT CYREG_PRT0_PRT
-#define SCSI_Out__4__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
-#define SCSI_Out__4__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
-#define SCSI_Out__4__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
-#define SCSI_Out__4__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
-#define SCSI_Out__4__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
-#define SCSI_Out__4__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
-#define SCSI_Out__4__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
-#define SCSI_Out__4__PS CYREG_PRT0_PS
-#define SCSI_Out__4__SHIFT 3u
-#define SCSI_Out__4__SLW CYREG_PRT0_SLW
-#define SCSI_Out__5__AG CYREG_PRT0_AG
-#define SCSI_Out__5__AMUX CYREG_PRT0_AMUX
-#define SCSI_Out__5__BIE CYREG_PRT0_BIE
-#define SCSI_Out__5__BIT_MASK CYREG_PRT0_BIT_MASK
-#define SCSI_Out__5__BYP CYREG_PRT0_BYP
-#define SCSI_Out__5__CTL CYREG_PRT0_CTL
-#define SCSI_Out__5__DM0 CYREG_PRT0_DM0
-#define SCSI_Out__5__DM1 CYREG_PRT0_DM1
-#define SCSI_Out__5__DM2 CYREG_PRT0_DM2
-#define SCSI_Out__5__DR CYREG_PRT0_DR
-#define SCSI_Out__5__INP_DIS CYREG_PRT0_INP_DIS
-#define SCSI_Out__5__INTTYPE CYREG_PICU0_INTTYPE1
-#define SCSI_Out__5__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
-#define SCSI_Out__5__LCD_EN CYREG_PRT0_LCD_EN
-#define SCSI_Out__5__MASK 0x02u
-#define SCSI_Out__5__PC CYREG_PRT0_PC1
-#define SCSI_Out__5__PORT 0u
-#define SCSI_Out__5__PRT CYREG_PRT0_PRT
-#define SCSI_Out__5__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
-#define SCSI_Out__5__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
-#define SCSI_Out__5__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
-#define SCSI_Out__5__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
-#define SCSI_Out__5__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
-#define SCSI_Out__5__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
-#define SCSI_Out__5__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
-#define SCSI_Out__5__PS CYREG_PRT0_PS
-#define SCSI_Out__5__SHIFT 1u
-#define SCSI_Out__5__SLW CYREG_PRT0_SLW
-#define SCSI_Out__6__AG CYREG_PRT4_AG
-#define SCSI_Out__6__AMUX CYREG_PRT4_AMUX
-#define SCSI_Out__6__BIE CYREG_PRT4_BIE
-#define SCSI_Out__6__BIT_MASK CYREG_PRT4_BIT_MASK
-#define SCSI_Out__6__BYP CYREG_PRT4_BYP
-#define SCSI_Out__6__CTL CYREG_PRT4_CTL
-#define SCSI_Out__6__DM0 CYREG_PRT4_DM0
-#define SCSI_Out__6__DM1 CYREG_PRT4_DM1
-#define SCSI_Out__6__DM2 CYREG_PRT4_DM2
-#define SCSI_Out__6__DR CYREG_PRT4_DR
-#define SCSI_Out__6__INP_DIS CYREG_PRT4_INP_DIS
-#define SCSI_Out__6__INTTYPE CYREG_PICU4_INTTYPE1
-#define SCSI_Out__6__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG
-#define SCSI_Out__6__LCD_EN CYREG_PRT4_LCD_EN
-#define SCSI_Out__6__MASK 0x02u
-#define SCSI_Out__6__PC CYREG_PRT4_PC1
-#define SCSI_Out__6__PORT 4u
-#define SCSI_Out__6__PRT CYREG_PRT4_PRT
-#define SCSI_Out__6__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL
-#define SCSI_Out__6__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN
-#define SCSI_Out__6__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0
-#define SCSI_Out__6__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1
-#define SCSI_Out__6__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0
-#define SCSI_Out__6__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1
-#define SCSI_Out__6__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT
-#define SCSI_Out__6__PS CYREG_PRT4_PS
-#define SCSI_Out__6__SHIFT 1u
-#define SCSI_Out__6__SLW CYREG_PRT4_SLW
-#define SCSI_Out__7__AG CYREG_PRT12_AG
-#define SCSI_Out__7__BIE CYREG_PRT12_BIE
-#define SCSI_Out__7__BIT_MASK CYREG_PRT12_BIT_MASK
-#define SCSI_Out__7__BYP CYREG_PRT12_BYP
-#define SCSI_Out__7__DM0 CYREG_PRT12_DM0
-#define SCSI_Out__7__DM1 CYREG_PRT12_DM1
-#define SCSI_Out__7__DM2 CYREG_PRT12_DM2
-#define SCSI_Out__7__DR CYREG_PRT12_DR
-#define SCSI_Out__7__INP_DIS CYREG_PRT12_INP_DIS
-#define SCSI_Out__7__INTTYPE CYREG_PICU12_INTTYPE3
-#define SCSI_Out__7__MASK 0x08u
-#define SCSI_Out__7__PC CYREG_PRT12_PC3
-#define SCSI_Out__7__PORT 12u
-#define SCSI_Out__7__PRT CYREG_PRT12_PRT
-#define SCSI_Out__7__PRTDSI__DBL_SYNC_IN CYREG_PRT12_DBL_SYNC_IN
-#define SCSI_Out__7__PRTDSI__OE_SEL0 CYREG_PRT12_OE_SEL0
-#define SCSI_Out__7__PRTDSI__OE_SEL1 CYREG_PRT12_OE_SEL1
-#define SCSI_Out__7__PRTDSI__OUT_SEL0 CYREG_PRT12_OUT_SEL0
-#define SCSI_Out__7__PRTDSI__OUT_SEL1 CYREG_PRT12_OUT_SEL1
-#define SCSI_Out__7__PRTDSI__SYNC_OUT CYREG_PRT12_SYNC_OUT
-#define SCSI_Out__7__PS CYREG_PRT12_PS
-#define SCSI_Out__7__SHIFT 3u
-#define SCSI_Out__7__SIO_CFG CYREG_PRT12_SIO_CFG
-#define SCSI_Out__7__SIO_DIFF CYREG_PRT12_SIO_DIFF
-#define SCSI_Out__7__SIO_HYST_EN CYREG_PRT12_SIO_HYST_EN
-#define SCSI_Out__7__SIO_REG_HIFREQ CYREG_PRT12_SIO_REG_HIFREQ
-#define SCSI_Out__7__SLW CYREG_PRT12_SLW
-#define SCSI_Out__BSY__AG CYREG_PRT4_AG
-#define SCSI_Out__BSY__AMUX CYREG_PRT4_AMUX
-#define SCSI_Out__BSY__BIE CYREG_PRT4_BIE
-#define SCSI_Out__BSY__BIT_MASK CYREG_PRT4_BIT_MASK
-#define SCSI_Out__BSY__BYP CYREG_PRT4_BYP
-#define SCSI_Out__BSY__CTL CYREG_PRT4_CTL
-#define SCSI_Out__BSY__DM0 CYREG_PRT4_DM0
-#define SCSI_Out__BSY__DM1 CYREG_PRT4_DM1
-#define SCSI_Out__BSY__DM2 CYREG_PRT4_DM2
-#define SCSI_Out__BSY__DR CYREG_PRT4_DR
-#define SCSI_Out__BSY__INP_DIS CYREG_PRT4_INP_DIS
-#define SCSI_Out__BSY__INTTYPE CYREG_PICU4_INTTYPE6
-#define SCSI_Out__BSY__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG
-#define SCSI_Out__BSY__LCD_EN CYREG_PRT4_LCD_EN
-#define SCSI_Out__BSY__MASK 0x40u
-#define SCSI_Out__BSY__PC CYREG_PRT4_PC6
-#define SCSI_Out__BSY__PORT 4u
-#define SCSI_Out__BSY__PRT CYREG_PRT4_PRT
-#define SCSI_Out__BSY__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL
-#define SCSI_Out__BSY__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN
-#define SCSI_Out__BSY__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0
-#define SCSI_Out__BSY__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1
-#define SCSI_Out__BSY__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0
-#define SCSI_Out__BSY__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1
-#define SCSI_Out__BSY__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT
-#define SCSI_Out__BSY__PS CYREG_PRT4_PS
-#define SCSI_Out__BSY__SHIFT 6u
-#define SCSI_Out__BSY__SLW CYREG_PRT4_SLW
-#define SCSI_Out__CD_raw__AG CYREG_PRT0_AG
-#define SCSI_Out__CD_raw__AMUX CYREG_PRT0_AMUX
-#define SCSI_Out__CD_raw__BIE CYREG_PRT0_BIE
-#define SCSI_Out__CD_raw__BIT_MASK CYREG_PRT0_BIT_MASK
-#define SCSI_Out__CD_raw__BYP CYREG_PRT0_BYP
-#define SCSI_Out__CD_raw__CTL CYREG_PRT0_CTL
-#define SCSI_Out__CD_raw__DM0 CYREG_PRT0_DM0
-#define SCSI_Out__CD_raw__DM1 CYREG_PRT0_DM1
-#define SCSI_Out__CD_raw__DM2 CYREG_PRT0_DM2
-#define SCSI_Out__CD_raw__DR CYREG_PRT0_DR
-#define SCSI_Out__CD_raw__INP_DIS CYREG_PRT0_INP_DIS
-#define SCSI_Out__CD_raw__INTTYPE CYREG_PICU0_INTTYPE1
-#define SCSI_Out__CD_raw__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
-#define SCSI_Out__CD_raw__LCD_EN CYREG_PRT0_LCD_EN
-#define SCSI_Out__CD_raw__MASK 0x02u
-#define SCSI_Out__CD_raw__PC CYREG_PRT0_PC1
-#define SCSI_Out__CD_raw__PORT 0u
-#define SCSI_Out__CD_raw__PRT CYREG_PRT0_PRT
-#define SCSI_Out__CD_raw__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
-#define SCSI_Out__CD_raw__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
-#define SCSI_Out__CD_raw__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
-#define SCSI_Out__CD_raw__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
-#define SCSI_Out__CD_raw__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
-#define SCSI_Out__CD_raw__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
-#define SCSI_Out__CD_raw__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
-#define SCSI_Out__CD_raw__PS CYREG_PRT0_PS
-#define SCSI_Out__CD_raw__SHIFT 1u
-#define SCSI_Out__CD_raw__SLW CYREG_PRT0_SLW
-#define SCSI_Out__DBP_raw__AG CYREG_PRT6_AG
-#define SCSI_Out__DBP_raw__AMUX CYREG_PRT6_AMUX
-#define SCSI_Out__DBP_raw__BIE CYREG_PRT6_BIE
-#define SCSI_Out__DBP_raw__BIT_MASK CYREG_PRT6_BIT_MASK
-#define SCSI_Out__DBP_raw__BYP CYREG_PRT6_BYP
-#define SCSI_Out__DBP_raw__CTL CYREG_PRT6_CTL
-#define SCSI_Out__DBP_raw__DM0 CYREG_PRT6_DM0
-#define SCSI_Out__DBP_raw__DM1 CYREG_PRT6_DM1
-#define SCSI_Out__DBP_raw__DM2 CYREG_PRT6_DM2
-#define SCSI_Out__DBP_raw__DR CYREG_PRT6_DR
-#define SCSI_Out__DBP_raw__INP_DIS CYREG_PRT6_INP_DIS
-#define SCSI_Out__DBP_raw__INTTYPE CYREG_PICU6_INTTYPE2
-#define SCSI_Out__DBP_raw__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
-#define SCSI_Out__DBP_raw__LCD_EN CYREG_PRT6_LCD_EN
-#define SCSI_Out__DBP_raw__MASK 0x04u
-#define SCSI_Out__DBP_raw__PC CYREG_PRT6_PC2
-#define SCSI_Out__DBP_raw__PORT 6u
-#define SCSI_Out__DBP_raw__PRT CYREG_PRT6_PRT
-#define SCSI_Out__DBP_raw__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
-#define SCSI_Out__DBP_raw__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
-#define SCSI_Out__DBP_raw__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
-#define SCSI_Out__DBP_raw__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
-#define SCSI_Out__DBP_raw__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
-#define SCSI_Out__DBP_raw__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
-#define SCSI_Out__DBP_raw__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
-#define SCSI_Out__DBP_raw__PS CYREG_PRT6_PS
-#define SCSI_Out__DBP_raw__SHIFT 2u
-#define SCSI_Out__DBP_raw__SLW CYREG_PRT6_SLW
-#define SCSI_Out__IO_raw__AG CYREG_PRT12_AG
-#define SCSI_Out__IO_raw__BIE CYREG_PRT12_BIE
-#define SCSI_Out__IO_raw__BIT_MASK CYREG_PRT12_BIT_MASK
-#define SCSI_Out__IO_raw__BYP CYREG_PRT12_BYP
-#define SCSI_Out__IO_raw__DM0 CYREG_PRT12_DM0
-#define SCSI_Out__IO_raw__DM1 CYREG_PRT12_DM1
-#define SCSI_Out__IO_raw__DM2 CYREG_PRT12_DM2
-#define SCSI_Out__IO_raw__DR CYREG_PRT12_DR
-#define SCSI_Out__IO_raw__INP_DIS CYREG_PRT12_INP_DIS
-#define SCSI_Out__IO_raw__INTTYPE CYREG_PICU12_INTTYPE3
-#define SCSI_Out__IO_raw__MASK 0x08u
-#define SCSI_Out__IO_raw__PC CYREG_PRT12_PC3
-#define SCSI_Out__IO_raw__PORT 12u
-#define SCSI_Out__IO_raw__PRT CYREG_PRT12_PRT
-#define SCSI_Out__IO_raw__PRTDSI__DBL_SYNC_IN CYREG_PRT12_DBL_SYNC_IN
-#define SCSI_Out__IO_raw__PRTDSI__OE_SEL0 CYREG_PRT12_OE_SEL0
-#define SCSI_Out__IO_raw__PRTDSI__OE_SEL1 CYREG_PRT12_OE_SEL1
-#define SCSI_Out__IO_raw__PRTDSI__OUT_SEL0 CYREG_PRT12_OUT_SEL0
-#define SCSI_Out__IO_raw__PRTDSI__OUT_SEL1 CYREG_PRT12_OUT_SEL1
-#define SCSI_Out__IO_raw__PRTDSI__SYNC_OUT CYREG_PRT12_SYNC_OUT
-#define SCSI_Out__IO_raw__PS CYREG_PRT12_PS
-#define SCSI_Out__IO_raw__SHIFT 3u
-#define SCSI_Out__IO_raw__SIO_CFG CYREG_PRT12_SIO_CFG
-#define SCSI_Out__IO_raw__SIO_DIFF CYREG_PRT12_SIO_DIFF
-#define SCSI_Out__IO_raw__SIO_HYST_EN CYREG_PRT12_SIO_HYST_EN
-#define SCSI_Out__IO_raw__SIO_REG_HIFREQ CYREG_PRT12_SIO_REG_HIFREQ
-#define SCSI_Out__IO_raw__SLW CYREG_PRT12_SLW
-#define SCSI_Out__MSG_raw__AG CYREG_PRT0_AG
-#define SCSI_Out__MSG_raw__AMUX CYREG_PRT0_AMUX
-#define SCSI_Out__MSG_raw__BIE CYREG_PRT0_BIE
-#define SCSI_Out__MSG_raw__BIT_MASK CYREG_PRT0_BIT_MASK
-#define SCSI_Out__MSG_raw__BYP CYREG_PRT0_BYP
-#define SCSI_Out__MSG_raw__CTL CYREG_PRT0_CTL
-#define SCSI_Out__MSG_raw__DM0 CYREG_PRT0_DM0
-#define SCSI_Out__MSG_raw__DM1 CYREG_PRT0_DM1
-#define SCSI_Out__MSG_raw__DM2 CYREG_PRT0_DM2
-#define SCSI_Out__MSG_raw__DR CYREG_PRT0_DR
-#define SCSI_Out__MSG_raw__INP_DIS CYREG_PRT0_INP_DIS
-#define SCSI_Out__MSG_raw__INTTYPE CYREG_PICU0_INTTYPE5
-#define SCSI_Out__MSG_raw__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
-#define SCSI_Out__MSG_raw__LCD_EN CYREG_PRT0_LCD_EN
-#define SCSI_Out__MSG_raw__MASK 0x20u
-#define SCSI_Out__MSG_raw__PC CYREG_PRT0_PC5
-#define SCSI_Out__MSG_raw__PORT 0u
-#define SCSI_Out__MSG_raw__PRT CYREG_PRT0_PRT
-#define SCSI_Out__MSG_raw__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
-#define SCSI_Out__MSG_raw__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
-#define SCSI_Out__MSG_raw__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
-#define SCSI_Out__MSG_raw__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
-#define SCSI_Out__MSG_raw__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
-#define SCSI_Out__MSG_raw__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
-#define SCSI_Out__MSG_raw__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
-#define SCSI_Out__MSG_raw__PS CYREG_PRT0_PS
-#define SCSI_Out__MSG_raw__SHIFT 5u
-#define SCSI_Out__MSG_raw__SLW CYREG_PRT0_SLW
-#define SCSI_Out__REQ__AG CYREG_PRT4_AG
-#define SCSI_Out__REQ__AMUX CYREG_PRT4_AMUX
-#define SCSI_Out__REQ__BIE CYREG_PRT4_BIE
-#define SCSI_Out__REQ__BIT_MASK CYREG_PRT4_BIT_MASK
-#define SCSI_Out__REQ__BYP CYREG_PRT4_BYP
-#define SCSI_Out__REQ__CTL CYREG_PRT4_CTL
-#define SCSI_Out__REQ__DM0 CYREG_PRT4_DM0
-#define SCSI_Out__REQ__DM1 CYREG_PRT4_DM1
-#define SCSI_Out__REQ__DM2 CYREG_PRT4_DM2
-#define SCSI_Out__REQ__DR CYREG_PRT4_DR
-#define SCSI_Out__REQ__INP_DIS CYREG_PRT4_INP_DIS
-#define SCSI_Out__REQ__INTTYPE CYREG_PICU4_INTTYPE1
-#define SCSI_Out__REQ__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG
-#define SCSI_Out__REQ__LCD_EN CYREG_PRT4_LCD_EN
-#define SCSI_Out__REQ__MASK 0x02u
-#define SCSI_Out__REQ__PC CYREG_PRT4_PC1
-#define SCSI_Out__REQ__PORT 4u
-#define SCSI_Out__REQ__PRT CYREG_PRT4_PRT
-#define SCSI_Out__REQ__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL
-#define SCSI_Out__REQ__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN
-#define SCSI_Out__REQ__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0
-#define SCSI_Out__REQ__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1
-#define SCSI_Out__REQ__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0
-#define SCSI_Out__REQ__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1
-#define SCSI_Out__REQ__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT
-#define SCSI_Out__REQ__PS CYREG_PRT4_PS
-#define SCSI_Out__REQ__SHIFT 1u
-#define SCSI_Out__REQ__SLW CYREG_PRT4_SLW
-#define SCSI_Out__RST__AG CYREG_PRT0_AG
-#define SCSI_Out__RST__AMUX CYREG_PRT0_AMUX
-#define SCSI_Out__RST__BIE CYREG_PRT0_BIE
-#define SCSI_Out__RST__BIT_MASK CYREG_PRT0_BIT_MASK
-#define SCSI_Out__RST__BYP CYREG_PRT0_BYP
-#define SCSI_Out__RST__CTL CYREG_PRT0_CTL
-#define SCSI_Out__RST__DM0 CYREG_PRT0_DM0
-#define SCSI_Out__RST__DM1 CYREG_PRT0_DM1
-#define SCSI_Out__RST__DM2 CYREG_PRT0_DM2
-#define SCSI_Out__RST__DR CYREG_PRT0_DR
-#define SCSI_Out__RST__INP_DIS CYREG_PRT0_INP_DIS
-#define SCSI_Out__RST__INTTYPE CYREG_PICU0_INTTYPE7
-#define SCSI_Out__RST__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
-#define SCSI_Out__RST__LCD_EN CYREG_PRT0_LCD_EN
-#define SCSI_Out__RST__MASK 0x80u
-#define SCSI_Out__RST__PC CYREG_PRT0_PC7
-#define SCSI_Out__RST__PORT 0u
-#define SCSI_Out__RST__PRT CYREG_PRT0_PRT
-#define SCSI_Out__RST__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
-#define SCSI_Out__RST__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
-#define SCSI_Out__RST__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
-#define SCSI_Out__RST__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
-#define SCSI_Out__RST__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
-#define SCSI_Out__RST__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
-#define SCSI_Out__RST__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
-#define SCSI_Out__RST__PS CYREG_PRT0_PS
-#define SCSI_Out__RST__SHIFT 7u
-#define SCSI_Out__RST__SLW CYREG_PRT0_SLW
-#define SCSI_Out__SEL__AG CYREG_PRT0_AG
-#define SCSI_Out__SEL__AMUX CYREG_PRT0_AMUX
-#define SCSI_Out__SEL__BIE CYREG_PRT0_BIE
-#define SCSI_Out__SEL__BIT_MASK CYREG_PRT0_BIT_MASK
-#define SCSI_Out__SEL__BYP CYREG_PRT0_BYP
-#define SCSI_Out__SEL__CTL CYREG_PRT0_CTL
-#define SCSI_Out__SEL__DM0 CYREG_PRT0_DM0
-#define SCSI_Out__SEL__DM1 CYREG_PRT0_DM1
-#define SCSI_Out__SEL__DM2 CYREG_PRT0_DM2
-#define SCSI_Out__SEL__DR CYREG_PRT0_DR
-#define SCSI_Out__SEL__INP_DIS CYREG_PRT0_INP_DIS
-#define SCSI_Out__SEL__INTTYPE CYREG_PICU0_INTTYPE3
-#define SCSI_Out__SEL__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
-#define SCSI_Out__SEL__LCD_EN CYREG_PRT0_LCD_EN
-#define SCSI_Out__SEL__MASK 0x08u
-#define SCSI_Out__SEL__PC CYREG_PRT0_PC3
-#define SCSI_Out__SEL__PORT 0u
-#define SCSI_Out__SEL__PRT CYREG_PRT0_PRT
-#define SCSI_Out__SEL__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
-#define SCSI_Out__SEL__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
-#define SCSI_Out__SEL__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
-#define SCSI_Out__SEL__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
-#define SCSI_Out__SEL__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
-#define SCSI_Out__SEL__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
-#define SCSI_Out__SEL__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
-#define SCSI_Out__SEL__PS CYREG_PRT0_PS
-#define SCSI_Out__SEL__SHIFT 3u
-#define SCSI_Out__SEL__SLW CYREG_PRT0_SLW
-#define SCSI_Out_Bits_Sync_ctrl_reg__0__MASK 0x01u
-#define SCSI_Out_Bits_Sync_ctrl_reg__0__POS 0
-#define SCSI_Out_Bits_Sync_ctrl_reg__1__MASK 0x02u
-#define SCSI_Out_Bits_Sync_ctrl_reg__1__POS 1
-#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG CYREG_B0_UDB07_08_ACTL
-#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG CYREG_B0_UDB07_08_CTL
-#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG CYREG_B0_UDB07_08_CTL
-#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG CYREG_B0_UDB07_08_CTL
-#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG CYREG_B0_UDB07_08_CTL
-#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_MASK_REG CYREG_B0_UDB07_08_MSK
-#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG CYREG_B0_UDB07_08_MSK
-#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG CYREG_B0_UDB07_08_MSK
-#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG CYREG_B0_UDB07_08_MSK
-#define SCSI_Out_Bits_Sync_ctrl_reg__2__MASK 0x04u
-#define SCSI_Out_Bits_Sync_ctrl_reg__2__POS 2
-#define SCSI_Out_Bits_Sync_ctrl_reg__3__MASK 0x08u
-#define SCSI_Out_Bits_Sync_ctrl_reg__3__POS 3
-#define SCSI_Out_Bits_Sync_ctrl_reg__4__MASK 0x10u
-#define SCSI_Out_Bits_Sync_ctrl_reg__4__POS 4
-#define SCSI_Out_Bits_Sync_ctrl_reg__5__MASK 0x20u
-#define SCSI_Out_Bits_Sync_ctrl_reg__5__POS 5
-#define SCSI_Out_Bits_Sync_ctrl_reg__6__MASK 0x40u
-#define SCSI_Out_Bits_Sync_ctrl_reg__6__POS 6
-#define SCSI_Out_Bits_Sync_ctrl_reg__7__MASK 0x80u
-#define SCSI_Out_Bits_Sync_ctrl_reg__7__POS 7
-#define SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_AUX_CTL_REG CYREG_B0_UDB07_ACTL
-#define SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_REG CYREG_B0_UDB07_CTL
-#define SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_ST_REG CYREG_B0_UDB07_ST_CTL
-#define SCSI_Out_Bits_Sync_ctrl_reg__COUNT_REG CYREG_B0_UDB07_CTL
-#define SCSI_Out_Bits_Sync_ctrl_reg__COUNT_ST_REG CYREG_B0_UDB07_ST_CTL
-#define SCSI_Out_Bits_Sync_ctrl_reg__MASK 0xFFu
-#define SCSI_Out_Bits_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG CYREG_B0_UDB07_MSK_ACTL
-#define SCSI_Out_Bits_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG CYREG_B0_UDB07_MSK_ACTL
-#define SCSI_Out_Bits_Sync_ctrl_reg__PERIOD_REG CYREG_B0_UDB07_MSK
-#define SCSI_Out_Ctl_Sync_ctrl_reg__0__MASK 0x01u
-#define SCSI_Out_Ctl_Sync_ctrl_reg__0__POS 0
-#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG CYREG_B0_UDB11_12_ACTL
-#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG CYREG_B0_UDB11_12_CTL
-#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG CYREG_B0_UDB11_12_CTL
-#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG CYREG_B0_UDB11_12_CTL
-#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG CYREG_B0_UDB11_12_CTL
-#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG CYREG_B0_UDB11_12_MSK
-#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG CYREG_B0_UDB11_12_MSK
-#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG CYREG_B0_UDB11_12_MSK
-#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG CYREG_B0_UDB11_12_MSK
-#define SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG CYREG_B0_UDB11_ACTL
-#define SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_REG CYREG_B0_UDB11_CTL
-#define SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_ST_REG CYREG_B0_UDB11_ST_CTL
-#define SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_REG CYREG_B0_UDB11_CTL
-#define SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_ST_REG CYREG_B0_UDB11_ST_CTL
-#define SCSI_Out_Ctl_Sync_ctrl_reg__MASK 0x01u
-#define SCSI_Out_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG CYREG_B0_UDB11_MSK_ACTL
-#define SCSI_Out_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG CYREG_B0_UDB11_MSK_ACTL
-#define SCSI_Out_Ctl_Sync_ctrl_reg__PERIOD_REG CYREG_B0_UDB11_MSK
-#define SCSI_Out_DBx__0__AG CYREG_PRT6_AG
-#define SCSI_Out_DBx__0__AMUX CYREG_PRT6_AMUX
-#define SCSI_Out_DBx__0__BIE CYREG_PRT6_BIE
-#define SCSI_Out_DBx__0__BIT_MASK CYREG_PRT6_BIT_MASK
-#define SCSI_Out_DBx__0__BYP CYREG_PRT6_BYP
-#define SCSI_Out_DBx__0__CTL CYREG_PRT6_CTL
-#define SCSI_Out_DBx__0__DM0 CYREG_PRT6_DM0
-#define SCSI_Out_DBx__0__DM1 CYREG_PRT6_DM1
-#define SCSI_Out_DBx__0__DM2 CYREG_PRT6_DM2
-#define SCSI_Out_DBx__0__DR CYREG_PRT6_DR
-#define SCSI_Out_DBx__0__INP_DIS CYREG_PRT6_INP_DIS
-#define SCSI_Out_DBx__0__INTTYPE CYREG_PICU6_INTTYPE7
-#define SCSI_Out_DBx__0__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
-#define SCSI_Out_DBx__0__LCD_EN CYREG_PRT6_LCD_EN
-#define SCSI_Out_DBx__0__MASK 0x80u
-#define SCSI_Out_DBx__0__PC CYREG_PRT6_PC7
-#define SCSI_Out_DBx__0__PORT 6u
-#define SCSI_Out_DBx__0__PRT CYREG_PRT6_PRT
-#define SCSI_Out_DBx__0__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
-#define SCSI_Out_DBx__0__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
-#define SCSI_Out_DBx__0__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
-#define SCSI_Out_DBx__0__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
-#define SCSI_Out_DBx__0__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
-#define SCSI_Out_DBx__0__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
-#define SCSI_Out_DBx__0__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
-#define SCSI_Out_DBx__0__PS CYREG_PRT6_PS
-#define SCSI_Out_DBx__0__SHIFT 7u
-#define SCSI_Out_DBx__0__SLW CYREG_PRT6_SLW
-#define SCSI_Out_DBx__1__AG CYREG_PRT6_AG
-#define SCSI_Out_DBx__1__AMUX CYREG_PRT6_AMUX
-#define SCSI_Out_DBx__1__BIE CYREG_PRT6_BIE
-#define SCSI_Out_DBx__1__BIT_MASK CYREG_PRT6_BIT_MASK
-#define SCSI_Out_DBx__1__BYP CYREG_PRT6_BYP
-#define SCSI_Out_DBx__1__CTL CYREG_PRT6_CTL
-#define SCSI_Out_DBx__1__DM0 CYREG_PRT6_DM0
-#define SCSI_Out_DBx__1__DM1 CYREG_PRT6_DM1
-#define SCSI_Out_DBx__1__DM2 CYREG_PRT6_DM2
-#define SCSI_Out_DBx__1__DR CYREG_PRT6_DR
-#define SCSI_Out_DBx__1__INP_DIS CYREG_PRT6_INP_DIS
-#define SCSI_Out_DBx__1__INTTYPE CYREG_PICU6_INTTYPE5
-#define SCSI_Out_DBx__1__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
-#define SCSI_Out_DBx__1__LCD_EN CYREG_PRT6_LCD_EN
-#define SCSI_Out_DBx__1__MASK 0x20u
-#define SCSI_Out_DBx__1__PC CYREG_PRT6_PC5
-#define SCSI_Out_DBx__1__PORT 6u
-#define SCSI_Out_DBx__1__PRT CYREG_PRT6_PRT
-#define SCSI_Out_DBx__1__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
-#define SCSI_Out_DBx__1__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
-#define SCSI_Out_DBx__1__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
-#define SCSI_Out_DBx__1__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
-#define SCSI_Out_DBx__1__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
-#define SCSI_Out_DBx__1__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
-#define SCSI_Out_DBx__1__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
-#define SCSI_Out_DBx__1__PS CYREG_PRT6_PS
-#define SCSI_Out_DBx__1__SHIFT 5u
-#define SCSI_Out_DBx__1__SLW CYREG_PRT6_SLW
-#define SCSI_Out_DBx__2__AG CYREG_PRT12_AG
-#define SCSI_Out_DBx__2__BIE CYREG_PRT12_BIE
-#define SCSI_Out_DBx__2__BIT_MASK CYREG_PRT12_BIT_MASK
-#define SCSI_Out_DBx__2__BYP CYREG_PRT12_BYP
-#define SCSI_Out_DBx__2__DM0 CYREG_PRT12_DM0
-#define SCSI_Out_DBx__2__DM1 CYREG_PRT12_DM1
-#define SCSI_Out_DBx__2__DM2 CYREG_PRT12_DM2
-#define SCSI_Out_DBx__2__DR CYREG_PRT12_DR
-#define SCSI_Out_DBx__2__INP_DIS CYREG_PRT12_INP_DIS
-#define SCSI_Out_DBx__2__INTTYPE CYREG_PICU12_INTTYPE5
-#define SCSI_Out_DBx__2__MASK 0x20u
-#define SCSI_Out_DBx__2__PC CYREG_PRT12_PC5
-#define SCSI_Out_DBx__2__PORT 12u
-#define SCSI_Out_DBx__2__PRT CYREG_PRT12_PRT
-#define SCSI_Out_DBx__2__PRTDSI__DBL_SYNC_IN CYREG_PRT12_DBL_SYNC_IN
-#define SCSI_Out_DBx__2__PRTDSI__OE_SEL0 CYREG_PRT12_OE_SEL0
-#define SCSI_Out_DBx__2__PRTDSI__OE_SEL1 CYREG_PRT12_OE_SEL1
-#define SCSI_Out_DBx__2__PRTDSI__OUT_SEL0 CYREG_PRT12_OUT_SEL0
-#define SCSI_Out_DBx__2__PRTDSI__OUT_SEL1 CYREG_PRT12_OUT_SEL1
-#define SCSI_Out_DBx__2__PRTDSI__SYNC_OUT CYREG_PRT12_SYNC_OUT
-#define SCSI_Out_DBx__2__PS CYREG_PRT12_PS
-#define SCSI_Out_DBx__2__SHIFT 5u
-#define SCSI_Out_DBx__2__SIO_CFG CYREG_PRT12_SIO_CFG
-#define SCSI_Out_DBx__2__SIO_DIFF CYREG_PRT12_SIO_DIFF
-#define SCSI_Out_DBx__2__SIO_HYST_EN CYREG_PRT12_SIO_HYST_EN
-#define SCSI_Out_DBx__2__SIO_REG_HIFREQ CYREG_PRT12_SIO_REG_HIFREQ
-#define SCSI_Out_DBx__2__SLW CYREG_PRT12_SLW
-#define SCSI_Out_DBx__3__AG CYREG_PRT2_AG
-#define SCSI_Out_DBx__3__AMUX CYREG_PRT2_AMUX
-#define SCSI_Out_DBx__3__BIE CYREG_PRT2_BIE
-#define SCSI_Out_DBx__3__BIT_MASK CYREG_PRT2_BIT_MASK
-#define SCSI_Out_DBx__3__BYP CYREG_PRT2_BYP
-#define SCSI_Out_DBx__3__CTL CYREG_PRT2_CTL
-#define SCSI_Out_DBx__3__DM0 CYREG_PRT2_DM0
-#define SCSI_Out_DBx__3__DM1 CYREG_PRT2_DM1
-#define SCSI_Out_DBx__3__DM2 CYREG_PRT2_DM2
-#define SCSI_Out_DBx__3__DR CYREG_PRT2_DR
-#define SCSI_Out_DBx__3__INP_DIS CYREG_PRT2_INP_DIS
-#define SCSI_Out_DBx__3__INTTYPE CYREG_PICU2_INTTYPE7
-#define SCSI_Out_DBx__3__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
-#define SCSI_Out_DBx__3__LCD_EN CYREG_PRT2_LCD_EN
-#define SCSI_Out_DBx__3__MASK 0x80u
-#define SCSI_Out_DBx__3__PC CYREG_PRT2_PC7
-#define SCSI_Out_DBx__3__PORT 2u
-#define SCSI_Out_DBx__3__PRT CYREG_PRT2_PRT
-#define SCSI_Out_DBx__3__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
-#define SCSI_Out_DBx__3__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
-#define SCSI_Out_DBx__3__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
-#define SCSI_Out_DBx__3__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
-#define SCSI_Out_DBx__3__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
-#define SCSI_Out_DBx__3__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
-#define SCSI_Out_DBx__3__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
-#define SCSI_Out_DBx__3__PS CYREG_PRT2_PS
-#define SCSI_Out_DBx__3__SHIFT 7u
-#define SCSI_Out_DBx__3__SLW CYREG_PRT2_SLW
-#define SCSI_Out_DBx__4__AG CYREG_PRT2_AG
-#define SCSI_Out_DBx__4__AMUX CYREG_PRT2_AMUX
-#define SCSI_Out_DBx__4__BIE CYREG_PRT2_BIE
-#define SCSI_Out_DBx__4__BIT_MASK CYREG_PRT2_BIT_MASK
-#define SCSI_Out_DBx__4__BYP CYREG_PRT2_BYP
-#define SCSI_Out_DBx__4__CTL CYREG_PRT2_CTL
-#define SCSI_Out_DBx__4__DM0 CYREG_PRT2_DM0
-#define SCSI_Out_DBx__4__DM1 CYREG_PRT2_DM1
-#define SCSI_Out_DBx__4__DM2 CYREG_PRT2_DM2
-#define SCSI_Out_DBx__4__DR CYREG_PRT2_DR
-#define SCSI_Out_DBx__4__INP_DIS CYREG_PRT2_INP_DIS
-#define SCSI_Out_DBx__4__INTTYPE CYREG_PICU2_INTTYPE5
-#define SCSI_Out_DBx__4__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
-#define SCSI_Out_DBx__4__LCD_EN CYREG_PRT2_LCD_EN
-#define SCSI_Out_DBx__4__MASK 0x20u
-#define SCSI_Out_DBx__4__PC CYREG_PRT2_PC5
-#define SCSI_Out_DBx__4__PORT 2u
-#define SCSI_Out_DBx__4__PRT CYREG_PRT2_PRT
-#define SCSI_Out_DBx__4__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
-#define SCSI_Out_DBx__4__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
-#define SCSI_Out_DBx__4__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
-#define SCSI_Out_DBx__4__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
-#define SCSI_Out_DBx__4__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
-#define SCSI_Out_DBx__4__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
-#define SCSI_Out_DBx__4__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
-#define SCSI_Out_DBx__4__PS CYREG_PRT2_PS
-#define SCSI_Out_DBx__4__SHIFT 5u
-#define SCSI_Out_DBx__4__SLW CYREG_PRT2_SLW
-#define SCSI_Out_DBx__5__AG CYREG_PRT2_AG
-#define SCSI_Out_DBx__5__AMUX CYREG_PRT2_AMUX
-#define SCSI_Out_DBx__5__BIE CYREG_PRT2_BIE
-#define SCSI_Out_DBx__5__BIT_MASK CYREG_PRT2_BIT_MASK
-#define SCSI_Out_DBx__5__BYP CYREG_PRT2_BYP
-#define SCSI_Out_DBx__5__CTL CYREG_PRT2_CTL
-#define SCSI_Out_DBx__5__DM0 CYREG_PRT2_DM0
-#define SCSI_Out_DBx__5__DM1 CYREG_PRT2_DM1
-#define SCSI_Out_DBx__5__DM2 CYREG_PRT2_DM2
-#define SCSI_Out_DBx__5__DR CYREG_PRT2_DR
-#define SCSI_Out_DBx__5__INP_DIS CYREG_PRT2_INP_DIS
-#define SCSI_Out_DBx__5__INTTYPE CYREG_PICU2_INTTYPE3
-#define SCSI_Out_DBx__5__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
-#define SCSI_Out_DBx__5__LCD_EN CYREG_PRT2_LCD_EN
-#define SCSI_Out_DBx__5__MASK 0x08u
-#define SCSI_Out_DBx__5__PC CYREG_PRT2_PC3
-#define SCSI_Out_DBx__5__PORT 2u
-#define SCSI_Out_DBx__5__PRT CYREG_PRT2_PRT
-#define SCSI_Out_DBx__5__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
-#define SCSI_Out_DBx__5__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
-#define SCSI_Out_DBx__5__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
-#define SCSI_Out_DBx__5__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
-#define SCSI_Out_DBx__5__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
-#define SCSI_Out_DBx__5__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
-#define SCSI_Out_DBx__5__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
-#define SCSI_Out_DBx__5__PS CYREG_PRT2_PS
-#define SCSI_Out_DBx__5__SHIFT 3u
-#define SCSI_Out_DBx__5__SLW CYREG_PRT2_SLW
-#define SCSI_Out_DBx__6__AG CYREG_PRT2_AG
-#define SCSI_Out_DBx__6__AMUX CYREG_PRT2_AMUX
-#define SCSI_Out_DBx__6__BIE CYREG_PRT2_BIE
-#define SCSI_Out_DBx__6__BIT_MASK CYREG_PRT2_BIT_MASK
-#define SCSI_Out_DBx__6__BYP CYREG_PRT2_BYP
-#define SCSI_Out_DBx__6__CTL CYREG_PRT2_CTL
-#define SCSI_Out_DBx__6__DM0 CYREG_PRT2_DM0
-#define SCSI_Out_DBx__6__DM1 CYREG_PRT2_DM1
-#define SCSI_Out_DBx__6__DM2 CYREG_PRT2_DM2
-#define SCSI_Out_DBx__6__DR CYREG_PRT2_DR
-#define SCSI_Out_DBx__6__INP_DIS CYREG_PRT2_INP_DIS
-#define SCSI_Out_DBx__6__INTTYPE CYREG_PICU2_INTTYPE1
-#define SCSI_Out_DBx__6__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
-#define SCSI_Out_DBx__6__LCD_EN CYREG_PRT2_LCD_EN
-#define SCSI_Out_DBx__6__MASK 0x02u
-#define SCSI_Out_DBx__6__PC CYREG_PRT2_PC1
-#define SCSI_Out_DBx__6__PORT 2u
-#define SCSI_Out_DBx__6__PRT CYREG_PRT2_PRT
-#define SCSI_Out_DBx__6__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
-#define SCSI_Out_DBx__6__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
-#define SCSI_Out_DBx__6__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
-#define SCSI_Out_DBx__6__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
-#define SCSI_Out_DBx__6__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
-#define SCSI_Out_DBx__6__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
-#define SCSI_Out_DBx__6__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
-#define SCSI_Out_DBx__6__PS CYREG_PRT2_PS
-#define SCSI_Out_DBx__6__SHIFT 1u
-#define SCSI_Out_DBx__6__SLW CYREG_PRT2_SLW
-#define SCSI_Out_DBx__7__AG CYREG_PRT15_AG
-#define SCSI_Out_DBx__7__AMUX CYREG_PRT15_AMUX
-#define SCSI_Out_DBx__7__BIE CYREG_PRT15_BIE
-#define SCSI_Out_DBx__7__BIT_MASK CYREG_PRT15_BIT_MASK
-#define SCSI_Out_DBx__7__BYP CYREG_PRT15_BYP
-#define SCSI_Out_DBx__7__CTL CYREG_PRT15_CTL
-#define SCSI_Out_DBx__7__DM0 CYREG_PRT15_DM0
-#define SCSI_Out_DBx__7__DM1 CYREG_PRT15_DM1
-#define SCSI_Out_DBx__7__DM2 CYREG_PRT15_DM2
-#define SCSI_Out_DBx__7__DR CYREG_PRT15_DR
-#define SCSI_Out_DBx__7__INP_DIS CYREG_PRT15_INP_DIS
-#define SCSI_Out_DBx__7__INTTYPE CYREG_PICU15_INTTYPE5
-#define SCSI_Out_DBx__7__LCD_COM_SEG CYREG_PRT15_LCD_COM_SEG
-#define SCSI_Out_DBx__7__LCD_EN CYREG_PRT15_LCD_EN
-#define SCSI_Out_DBx__7__MASK 0x20u
-#define SCSI_Out_DBx__7__PC CYREG_IO_PC_PRT15_PC5
-#define SCSI_Out_DBx__7__PORT 15u
-#define SCSI_Out_DBx__7__PRT CYREG_PRT15_PRT
-#define SCSI_Out_DBx__7__PRTDSI__CAPS_SEL CYREG_PRT15_CAPS_SEL
-#define SCSI_Out_DBx__7__PRTDSI__DBL_SYNC_IN CYREG_PRT15_DBL_SYNC_IN
-#define SCSI_Out_DBx__7__PRTDSI__OE_SEL0 CYREG_PRT15_OE_SEL0
-#define SCSI_Out_DBx__7__PRTDSI__OE_SEL1 CYREG_PRT15_OE_SEL1
-#define SCSI_Out_DBx__7__PRTDSI__OUT_SEL0 CYREG_PRT15_OUT_SEL0
-#define SCSI_Out_DBx__7__PRTDSI__OUT_SEL1 CYREG_PRT15_OUT_SEL1
-#define SCSI_Out_DBx__7__PRTDSI__SYNC_OUT CYREG_PRT15_SYNC_OUT
-#define SCSI_Out_DBx__7__PS CYREG_PRT15_PS
-#define SCSI_Out_DBx__7__SHIFT 5u
-#define SCSI_Out_DBx__7__SLW CYREG_PRT15_SLW
-#define SCSI_Out_DBx__DB0__AG CYREG_PRT6_AG
-#define SCSI_Out_DBx__DB0__AMUX CYREG_PRT6_AMUX
-#define SCSI_Out_DBx__DB0__BIE CYREG_PRT6_BIE
-#define SCSI_Out_DBx__DB0__BIT_MASK CYREG_PRT6_BIT_MASK
-#define SCSI_Out_DBx__DB0__BYP CYREG_PRT6_BYP
-#define SCSI_Out_DBx__DB0__CTL CYREG_PRT6_CTL
-#define SCSI_Out_DBx__DB0__DM0 CYREG_PRT6_DM0
-#define SCSI_Out_DBx__DB0__DM1 CYREG_PRT6_DM1
-#define SCSI_Out_DBx__DB0__DM2 CYREG_PRT6_DM2
-#define SCSI_Out_DBx__DB0__DR CYREG_PRT6_DR
-#define SCSI_Out_DBx__DB0__INP_DIS CYREG_PRT6_INP_DIS
-#define SCSI_Out_DBx__DB0__INTTYPE CYREG_PICU6_INTTYPE7
-#define SCSI_Out_DBx__DB0__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
-#define SCSI_Out_DBx__DB0__LCD_EN CYREG_PRT6_LCD_EN
-#define SCSI_Out_DBx__DB0__MASK 0x80u
-#define SCSI_Out_DBx__DB0__PC CYREG_PRT6_PC7
-#define SCSI_Out_DBx__DB0__PORT 6u
-#define SCSI_Out_DBx__DB0__PRT CYREG_PRT6_PRT
-#define SCSI_Out_DBx__DB0__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
-#define SCSI_Out_DBx__DB0__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
-#define SCSI_Out_DBx__DB0__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
-#define SCSI_Out_DBx__DB0__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
-#define SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
-#define SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
-#define SCSI_Out_DBx__DB0__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
-#define SCSI_Out_DBx__DB0__PS CYREG_PRT6_PS
-#define SCSI_Out_DBx__DB0__SHIFT 7u
-#define SCSI_Out_DBx__DB0__SLW CYREG_PRT6_SLW
-#define SCSI_Out_DBx__DB1__AG CYREG_PRT6_AG
-#define SCSI_Out_DBx__DB1__AMUX CYREG_PRT6_AMUX
-#define SCSI_Out_DBx__DB1__BIE CYREG_PRT6_BIE
-#define SCSI_Out_DBx__DB1__BIT_MASK CYREG_PRT6_BIT_MASK
-#define SCSI_Out_DBx__DB1__BYP CYREG_PRT6_BYP
-#define SCSI_Out_DBx__DB1__CTL CYREG_PRT6_CTL
-#define SCSI_Out_DBx__DB1__DM0 CYREG_PRT6_DM0
-#define SCSI_Out_DBx__DB1__DM1 CYREG_PRT6_DM1
-#define SCSI_Out_DBx__DB1__DM2 CYREG_PRT6_DM2
-#define SCSI_Out_DBx__DB1__DR CYREG_PRT6_DR
-#define SCSI_Out_DBx__DB1__INP_DIS CYREG_PRT6_INP_DIS
-#define SCSI_Out_DBx__DB1__INTTYPE CYREG_PICU6_INTTYPE5
-#define SCSI_Out_DBx__DB1__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
-#define SCSI_Out_DBx__DB1__LCD_EN CYREG_PRT6_LCD_EN
-#define SCSI_Out_DBx__DB1__MASK 0x20u
-#define SCSI_Out_DBx__DB1__PC CYREG_PRT6_PC5
-#define SCSI_Out_DBx__DB1__PORT 6u
-#define SCSI_Out_DBx__DB1__PRT CYREG_PRT6_PRT
-#define SCSI_Out_DBx__DB1__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
-#define SCSI_Out_DBx__DB1__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
-#define SCSI_Out_DBx__DB1__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
-#define SCSI_Out_DBx__DB1__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
-#define SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
-#define SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
-#define SCSI_Out_DBx__DB1__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
-#define SCSI_Out_DBx__DB1__PS CYREG_PRT6_PS
-#define SCSI_Out_DBx__DB1__SHIFT 5u
-#define SCSI_Out_DBx__DB1__SLW CYREG_PRT6_SLW
-#define SCSI_Out_DBx__DB2__AG CYREG_PRT12_AG
-#define SCSI_Out_DBx__DB2__BIE CYREG_PRT12_BIE
-#define SCSI_Out_DBx__DB2__BIT_MASK CYREG_PRT12_BIT_MASK
-#define SCSI_Out_DBx__DB2__BYP CYREG_PRT12_BYP
-#define SCSI_Out_DBx__DB2__DM0 CYREG_PRT12_DM0
-#define SCSI_Out_DBx__DB2__DM1 CYREG_PRT12_DM1
-#define SCSI_Out_DBx__DB2__DM2 CYREG_PRT12_DM2
-#define SCSI_Out_DBx__DB2__DR CYREG_PRT12_DR
-#define SCSI_Out_DBx__DB2__INP_DIS CYREG_PRT12_INP_DIS
-#define SCSI_Out_DBx__DB2__INTTYPE CYREG_PICU12_INTTYPE5
-#define SCSI_Out_DBx__DB2__MASK 0x20u
-#define SCSI_Out_DBx__DB2__PC CYREG_PRT12_PC5
-#define SCSI_Out_DBx__DB2__PORT 12u
-#define SCSI_Out_DBx__DB2__PRT CYREG_PRT12_PRT
-#define SCSI_Out_DBx__DB2__PRTDSI__DBL_SYNC_IN CYREG_PRT12_DBL_SYNC_IN
-#define SCSI_Out_DBx__DB2__PRTDSI__OE_SEL0 CYREG_PRT12_OE_SEL0
-#define SCSI_Out_DBx__DB2__PRTDSI__OE_SEL1 CYREG_PRT12_OE_SEL1
-#define SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL0 CYREG_PRT12_OUT_SEL0
-#define SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL1 CYREG_PRT12_OUT_SEL1
-#define SCSI_Out_DBx__DB2__PRTDSI__SYNC_OUT CYREG_PRT12_SYNC_OUT
-#define SCSI_Out_DBx__DB2__PS CYREG_PRT12_PS
-#define SCSI_Out_DBx__DB2__SHIFT 5u
-#define SCSI_Out_DBx__DB2__SIO_CFG CYREG_PRT12_SIO_CFG
-#define SCSI_Out_DBx__DB2__SIO_DIFF CYREG_PRT12_SIO_DIFF
-#define SCSI_Out_DBx__DB2__SIO_HYST_EN CYREG_PRT12_SIO_HYST_EN
-#define SCSI_Out_DBx__DB2__SIO_REG_HIFREQ CYREG_PRT12_SIO_REG_HIFREQ
-#define SCSI_Out_DBx__DB2__SLW CYREG_PRT12_SLW
-#define SCSI_Out_DBx__DB3__AG CYREG_PRT2_AG
-#define SCSI_Out_DBx__DB3__AMUX CYREG_PRT2_AMUX
-#define SCSI_Out_DBx__DB3__BIE CYREG_PRT2_BIE
-#define SCSI_Out_DBx__DB3__BIT_MASK CYREG_PRT2_BIT_MASK
-#define SCSI_Out_DBx__DB3__BYP CYREG_PRT2_BYP
-#define SCSI_Out_DBx__DB3__CTL CYREG_PRT2_CTL
-#define SCSI_Out_DBx__DB3__DM0 CYREG_PRT2_DM0
-#define SCSI_Out_DBx__DB3__DM1 CYREG_PRT2_DM1
-#define SCSI_Out_DBx__DB3__DM2 CYREG_PRT2_DM2
-#define SCSI_Out_DBx__DB3__DR CYREG_PRT2_DR
-#define SCSI_Out_DBx__DB3__INP_DIS CYREG_PRT2_INP_DIS
-#define SCSI_Out_DBx__DB3__INTTYPE CYREG_PICU2_INTTYPE7
-#define SCSI_Out_DBx__DB3__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
-#define SCSI_Out_DBx__DB3__LCD_EN CYREG_PRT2_LCD_EN
-#define SCSI_Out_DBx__DB3__MASK 0x80u
-#define SCSI_Out_DBx__DB3__PC CYREG_PRT2_PC7
-#define SCSI_Out_DBx__DB3__PORT 2u
-#define SCSI_Out_DBx__DB3__PRT CYREG_PRT2_PRT
-#define SCSI_Out_DBx__DB3__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
-#define SCSI_Out_DBx__DB3__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
-#define SCSI_Out_DBx__DB3__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
-#define SCSI_Out_DBx__DB3__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
-#define SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
-#define SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
-#define SCSI_Out_DBx__DB3__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
-#define SCSI_Out_DBx__DB3__PS CYREG_PRT2_PS
-#define SCSI_Out_DBx__DB3__SHIFT 7u
-#define SCSI_Out_DBx__DB3__SLW CYREG_PRT2_SLW
-#define SCSI_Out_DBx__DB4__AG CYREG_PRT2_AG
-#define SCSI_Out_DBx__DB4__AMUX CYREG_PRT2_AMUX
-#define SCSI_Out_DBx__DB4__BIE CYREG_PRT2_BIE
-#define SCSI_Out_DBx__DB4__BIT_MASK CYREG_PRT2_BIT_MASK
-#define SCSI_Out_DBx__DB4__BYP CYREG_PRT2_BYP
-#define SCSI_Out_DBx__DB4__CTL CYREG_PRT2_CTL
-#define SCSI_Out_DBx__DB4__DM0 CYREG_PRT2_DM0
-#define SCSI_Out_DBx__DB4__DM1 CYREG_PRT2_DM1
-#define SCSI_Out_DBx__DB4__DM2 CYREG_PRT2_DM2
-#define SCSI_Out_DBx__DB4__DR CYREG_PRT2_DR
-#define SCSI_Out_DBx__DB4__INP_DIS CYREG_PRT2_INP_DIS
-#define SCSI_Out_DBx__DB4__INTTYPE CYREG_PICU2_INTTYPE5
-#define SCSI_Out_DBx__DB4__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
-#define SCSI_Out_DBx__DB4__LCD_EN CYREG_PRT2_LCD_EN
-#define SCSI_Out_DBx__DB4__MASK 0x20u
-#define SCSI_Out_DBx__DB4__PC CYREG_PRT2_PC5
-#define SCSI_Out_DBx__DB4__PORT 2u
-#define SCSI_Out_DBx__DB4__PRT CYREG_PRT2_PRT
-#define SCSI_Out_DBx__DB4__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
-#define SCSI_Out_DBx__DB4__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
-#define SCSI_Out_DBx__DB4__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
-#define SCSI_Out_DBx__DB4__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
-#define SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
-#define SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
-#define SCSI_Out_DBx__DB4__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
-#define SCSI_Out_DBx__DB4__PS CYREG_PRT2_PS
-#define SCSI_Out_DBx__DB4__SHIFT 5u
-#define SCSI_Out_DBx__DB4__SLW CYREG_PRT2_SLW
-#define SCSI_Out_DBx__DB5__AG CYREG_PRT2_AG
-#define SCSI_Out_DBx__DB5__AMUX CYREG_PRT2_AMUX
-#define SCSI_Out_DBx__DB5__BIE CYREG_PRT2_BIE
-#define SCSI_Out_DBx__DB5__BIT_MASK CYREG_PRT2_BIT_MASK
-#define SCSI_Out_DBx__DB5__BYP CYREG_PRT2_BYP
-#define SCSI_Out_DBx__DB5__CTL CYREG_PRT2_CTL
-#define SCSI_Out_DBx__DB5__DM0 CYREG_PRT2_DM0
-#define SCSI_Out_DBx__DB5__DM1 CYREG_PRT2_DM1
-#define SCSI_Out_DBx__DB5__DM2 CYREG_PRT2_DM2
-#define SCSI_Out_DBx__DB5__DR CYREG_PRT2_DR
-#define SCSI_Out_DBx__DB5__INP_DIS CYREG_PRT2_INP_DIS
-#define SCSI_Out_DBx__DB5__INTTYPE CYREG_PICU2_INTTYPE3
-#define SCSI_Out_DBx__DB5__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
-#define SCSI_Out_DBx__DB5__LCD_EN CYREG_PRT2_LCD_EN
-#define SCSI_Out_DBx__DB5__MASK 0x08u
-#define SCSI_Out_DBx__DB5__PC CYREG_PRT2_PC3
-#define SCSI_Out_DBx__DB5__PORT 2u
-#define SCSI_Out_DBx__DB5__PRT CYREG_PRT2_PRT
-#define SCSI_Out_DBx__DB5__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
-#define SCSI_Out_DBx__DB5__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
-#define SCSI_Out_DBx__DB5__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
-#define SCSI_Out_DBx__DB5__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
-#define SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
-#define SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
-#define SCSI_Out_DBx__DB5__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
-#define SCSI_Out_DBx__DB5__PS CYREG_PRT2_PS
-#define SCSI_Out_DBx__DB5__SHIFT 3u
-#define SCSI_Out_DBx__DB5__SLW CYREG_PRT2_SLW
-#define SCSI_Out_DBx__DB6__AG CYREG_PRT2_AG
-#define SCSI_Out_DBx__DB6__AMUX CYREG_PRT2_AMUX
-#define SCSI_Out_DBx__DB6__BIE CYREG_PRT2_BIE
-#define SCSI_Out_DBx__DB6__BIT_MASK CYREG_PRT2_BIT_MASK
-#define SCSI_Out_DBx__DB6__BYP CYREG_PRT2_BYP
-#define SCSI_Out_DBx__DB6__CTL CYREG_PRT2_CTL
-#define SCSI_Out_DBx__DB6__DM0 CYREG_PRT2_DM0
-#define SCSI_Out_DBx__DB6__DM1 CYREG_PRT2_DM1
-#define SCSI_Out_DBx__DB6__DM2 CYREG_PRT2_DM2
-#define SCSI_Out_DBx__DB6__DR CYREG_PRT2_DR
-#define SCSI_Out_DBx__DB6__INP_DIS CYREG_PRT2_INP_DIS
-#define SCSI_Out_DBx__DB6__INTTYPE CYREG_PICU2_INTTYPE1
-#define SCSI_Out_DBx__DB6__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
-#define SCSI_Out_DBx__DB6__LCD_EN CYREG_PRT2_LCD_EN
-#define SCSI_Out_DBx__DB6__MASK 0x02u
-#define SCSI_Out_DBx__DB6__PC CYREG_PRT2_PC1
-#define SCSI_Out_DBx__DB6__PORT 2u
-#define SCSI_Out_DBx__DB6__PRT CYREG_PRT2_PRT
-#define SCSI_Out_DBx__DB6__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
-#define SCSI_Out_DBx__DB6__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
-#define SCSI_Out_DBx__DB6__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
-#define SCSI_Out_DBx__DB6__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
-#define SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
-#define SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
-#define SCSI_Out_DBx__DB6__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
-#define SCSI_Out_DBx__DB6__PS CYREG_PRT2_PS
-#define SCSI_Out_DBx__DB6__SHIFT 1u
-#define SCSI_Out_DBx__DB6__SLW CYREG_PRT2_SLW
-#define SCSI_Out_DBx__DB7__AG CYREG_PRT15_AG
-#define SCSI_Out_DBx__DB7__AMUX CYREG_PRT15_AMUX
-#define SCSI_Out_DBx__DB7__BIE CYREG_PRT15_BIE
-#define SCSI_Out_DBx__DB7__BIT_MASK CYREG_PRT15_BIT_MASK
-#define SCSI_Out_DBx__DB7__BYP CYREG_PRT15_BYP
-#define SCSI_Out_DBx__DB7__CTL CYREG_PRT15_CTL
-#define SCSI_Out_DBx__DB7__DM0 CYREG_PRT15_DM0
-#define SCSI_Out_DBx__DB7__DM1 CYREG_PRT15_DM1
-#define SCSI_Out_DBx__DB7__DM2 CYREG_PRT15_DM2
-#define SCSI_Out_DBx__DB7__DR CYREG_PRT15_DR
-#define SCSI_Out_DBx__DB7__INP_DIS CYREG_PRT15_INP_DIS
-#define SCSI_Out_DBx__DB7__INTTYPE CYREG_PICU15_INTTYPE5
-#define SCSI_Out_DBx__DB7__LCD_COM_SEG CYREG_PRT15_LCD_COM_SEG
-#define SCSI_Out_DBx__DB7__LCD_EN CYREG_PRT15_LCD_EN
-#define SCSI_Out_DBx__DB7__MASK 0x20u
-#define SCSI_Out_DBx__DB7__PC CYREG_IO_PC_PRT15_PC5
-#define SCSI_Out_DBx__DB7__PORT 15u
-#define SCSI_Out_DBx__DB7__PRT CYREG_PRT15_PRT
-#define SCSI_Out_DBx__DB7__PRTDSI__CAPS_SEL CYREG_PRT15_CAPS_SEL
-#define SCSI_Out_DBx__DB7__PRTDSI__DBL_SYNC_IN CYREG_PRT15_DBL_SYNC_IN
-#define SCSI_Out_DBx__DB7__PRTDSI__OE_SEL0 CYREG_PRT15_OE_SEL0
-#define SCSI_Out_DBx__DB7__PRTDSI__OE_SEL1 CYREG_PRT15_OE_SEL1
-#define SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL0 CYREG_PRT15_OUT_SEL0
-#define SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL1 CYREG_PRT15_OUT_SEL1
-#define SCSI_Out_DBx__DB7__PRTDSI__SYNC_OUT CYREG_PRT15_SYNC_OUT
-#define SCSI_Out_DBx__DB7__PS CYREG_PRT15_PS
-#define SCSI_Out_DBx__DB7__SHIFT 5u
-#define SCSI_Out_DBx__DB7__SLW CYREG_PRT15_SLW
-
-/* SCSI_Parity_Error */
-#define SCSI_Parity_Error_sts_sts_reg__0__MASK 0x01u
-#define SCSI_Parity_Error_sts_sts_reg__0__POS 0
-#define SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG CYREG_B0_UDB02_03_ACTL
-#define SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_REG CYREG_B0_UDB02_03_ST
-#define SCSI_Parity_Error_sts_sts_reg__MASK 0x01u
-#define SCSI_Parity_Error_sts_sts_reg__MASK_REG CYREG_B0_UDB02_MSK
-#define SCSI_Parity_Error_sts_sts_reg__MASK_ST_AUX_CTL_REG CYREG_B0_UDB02_MSK_ACTL
-#define SCSI_Parity_Error_sts_sts_reg__PER_ST_AUX_CTL_REG CYREG_B0_UDB02_MSK_ACTL
-#define SCSI_Parity_Error_sts_sts_reg__STATUS_AUX_CTL_REG CYREG_B0_UDB02_ACTL
-#define SCSI_Parity_Error_sts_sts_reg__STATUS_CNT_REG CYREG_B0_UDB02_ST_CTL
-#define SCSI_Parity_Error_sts_sts_reg__STATUS_CONTROL_REG CYREG_B0_UDB02_ST_CTL
-#define SCSI_Parity_Error_sts_sts_reg__STATUS_REG CYREG_B0_UDB02_ST
-
-/* SCSI_RST_ISR */
-#define SCSI_RST_ISR__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0
-#define SCSI_RST_ISR__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0
-#define SCSI_RST_ISR__INTC_MASK 0x02u
-#define SCSI_RST_ISR__INTC_NUMBER 1u
-#define SCSI_RST_ISR__INTC_PRIOR_NUM 7u
-#define SCSI_RST_ISR__INTC_PRIOR_REG CYREG_NVIC_PRI_1
-#define SCSI_RST_ISR__INTC_SET_EN_REG CYREG_NVIC_SETENA0
-#define SCSI_RST_ISR__INTC_SET_PD_REG CYREG_NVIC_SETPEND0
-
-/* SCSI_RX_DMA */
-#define SCSI_RX_DMA__DRQ_CTL CYREG_IDMUX_DRQ_CTL0
-#define SCSI_RX_DMA__DRQ_NUMBER 0u
-#define SCSI_RX_DMA__NUMBEROF_TDS 0u
-#define SCSI_RX_DMA__PRIORITY 2u
-#define SCSI_RX_DMA__TERMIN_EN 0u
-#define SCSI_RX_DMA__TERMIN_SEL 0u
-#define SCSI_RX_DMA__TERMOUT0_EN 1u
-#define SCSI_RX_DMA__TERMOUT0_SEL 0u
-#define SCSI_RX_DMA__TERMOUT1_EN 0u
-#define SCSI_RX_DMA__TERMOUT1_SEL 0u
-#define SCSI_RX_DMA_COMPLETE__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0
-#define SCSI_RX_DMA_COMPLETE__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0
-#define SCSI_RX_DMA_COMPLETE__INTC_MASK 0x04u
-#define SCSI_RX_DMA_COMPLETE__INTC_NUMBER 2u
-#define SCSI_RX_DMA_COMPLETE__INTC_PRIOR_NUM 7u
-#define SCSI_RX_DMA_COMPLETE__INTC_PRIOR_REG CYREG_NVIC_PRI_2
-#define SCSI_RX_DMA_COMPLETE__INTC_SET_EN_REG CYREG_NVIC_SETENA0
-#define SCSI_RX_DMA_COMPLETE__INTC_SET_PD_REG CYREG_NVIC_SETPEND0
-
-/* SCSI_SEL_ISR */
-#define SCSI_SEL_ISR__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0
-#define SCSI_SEL_ISR__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0
-#define SCSI_SEL_ISR__INTC_MASK 0x08u
-#define SCSI_SEL_ISR__INTC_NUMBER 3u
-#define SCSI_SEL_ISR__INTC_PRIOR_NUM 7u
-#define SCSI_SEL_ISR__INTC_PRIOR_REG CYREG_NVIC_PRI_3
-#define SCSI_SEL_ISR__INTC_SET_EN_REG CYREG_NVIC_SETENA0
-#define SCSI_SEL_ISR__INTC_SET_PD_REG CYREG_NVIC_SETPEND0
-
-/* SCSI_TX_DMA */
-#define SCSI_TX_DMA__DRQ_CTL CYREG_IDMUX_DRQ_CTL0
-#define SCSI_TX_DMA__DRQ_NUMBER 1u
-#define SCSI_TX_DMA__NUMBEROF_TDS 0u
-#define SCSI_TX_DMA__PRIORITY 2u
-#define SCSI_TX_DMA__TERMIN_EN 0u
-#define SCSI_TX_DMA__TERMIN_SEL 0u
-#define SCSI_TX_DMA__TERMOUT0_EN 1u
-#define SCSI_TX_DMA__TERMOUT0_SEL 1u
-#define SCSI_TX_DMA__TERMOUT1_EN 0u
-#define SCSI_TX_DMA__TERMOUT1_SEL 0u
-#define SCSI_TX_DMA_COMPLETE__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0
-#define SCSI_TX_DMA_COMPLETE__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0
-#define SCSI_TX_DMA_COMPLETE__INTC_MASK 0x10u
-#define SCSI_TX_DMA_COMPLETE__INTC_NUMBER 4u
-#define SCSI_TX_DMA_COMPLETE__INTC_PRIOR_NUM 7u
-#define SCSI_TX_DMA_COMPLETE__INTC_PRIOR_REG CYREG_NVIC_PRI_4
-#define SCSI_TX_DMA_COMPLETE__INTC_SET_EN_REG CYREG_NVIC_SETENA0
-#define SCSI_TX_DMA_COMPLETE__INTC_SET_PD_REG CYREG_NVIC_SETPEND0
-
-/* SDCard_BSPIM */
-#define SDCard_BSPIM_BitCounter__16BIT_CONTROL_AUX_CTL_REG CYREG_B1_UDB04_05_ACTL
-#define SDCard_BSPIM_BitCounter__16BIT_CONTROL_CONTROL_REG CYREG_B1_UDB04_05_CTL
-#define SDCard_BSPIM_BitCounter__16BIT_CONTROL_COUNT_REG CYREG_B1_UDB04_05_CTL
-#define SDCard_BSPIM_BitCounter__16BIT_COUNT_CONTROL_REG CYREG_B1_UDB04_05_CTL
-#define SDCard_BSPIM_BitCounter__16BIT_COUNT_COUNT_REG CYREG_B1_UDB04_05_CTL
-#define SDCard_BSPIM_BitCounter__16BIT_MASK_MASK_REG CYREG_B1_UDB04_05_MSK
-#define SDCard_BSPIM_BitCounter__16BIT_MASK_PERIOD_REG CYREG_B1_UDB04_05_MSK
-#define SDCard_BSPIM_BitCounter__16BIT_PERIOD_MASK_REG CYREG_B1_UDB04_05_MSK
-#define SDCard_BSPIM_BitCounter__16BIT_PERIOD_PERIOD_REG CYREG_B1_UDB04_05_MSK
-#define SDCard_BSPIM_BitCounter__CONTROL_AUX_CTL_REG CYREG_B1_UDB04_ACTL
-#define SDCard_BSPIM_BitCounter__CONTROL_REG CYREG_B1_UDB04_CTL
-#define SDCard_BSPIM_BitCounter__CONTROL_ST_REG CYREG_B1_UDB04_ST_CTL
-#define SDCard_BSPIM_BitCounter__COUNT_REG CYREG_B1_UDB04_CTL
-#define SDCard_BSPIM_BitCounter__COUNT_ST_REG CYREG_B1_UDB04_ST_CTL
-#define SDCard_BSPIM_BitCounter__MASK_CTL_AUX_CTL_REG CYREG_B1_UDB04_MSK_ACTL
-#define SDCard_BSPIM_BitCounter__PER_CTL_AUX_CTL_REG CYREG_B1_UDB04_MSK_ACTL
-#define SDCard_BSPIM_BitCounter__PERIOD_REG CYREG_B1_UDB04_MSK
-#define SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_AUX_CTL_REG CYREG_B1_UDB04_05_ACTL
-#define SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_REG CYREG_B1_UDB04_05_ST
-#define SDCard_BSPIM_BitCounter_ST__MASK_REG CYREG_B1_UDB04_MSK
-#define SDCard_BSPIM_BitCounter_ST__MASK_ST_AUX_CTL_REG CYREG_B1_UDB04_MSK_ACTL
-#define SDCard_BSPIM_BitCounter_ST__PER_ST_AUX_CTL_REG CYREG_B1_UDB04_MSK_ACTL
-#define SDCard_BSPIM_BitCounter_ST__STATUS_AUX_CTL_REG CYREG_B1_UDB04_ACTL
-#define SDCard_BSPIM_BitCounter_ST__STATUS_CNT_REG CYREG_B1_UDB04_ST_CTL
-#define SDCard_BSPIM_BitCounter_ST__STATUS_CONTROL_REG CYREG_B1_UDB04_ST_CTL
-#define SDCard_BSPIM_BitCounter_ST__STATUS_REG CYREG_B1_UDB04_ST
-#define SDCard_BSPIM_RxStsReg__16BIT_STATUS_AUX_CTL_REG CYREG_B0_UDB07_08_ACTL
-#define SDCard_BSPIM_RxStsReg__16BIT_STATUS_REG CYREG_B0_UDB07_08_ST
-#define SDCard_BSPIM_RxStsReg__4__MASK 0x10u
-#define SDCard_BSPIM_RxStsReg__4__POS 4
-#define SDCard_BSPIM_RxStsReg__5__MASK 0x20u
-#define SDCard_BSPIM_RxStsReg__5__POS 5
-#define SDCard_BSPIM_RxStsReg__6__MASK 0x40u
-#define SDCard_BSPIM_RxStsReg__6__POS 6
-#define SDCard_BSPIM_RxStsReg__MASK 0x70u
-#define SDCard_BSPIM_RxStsReg__MASK_REG CYREG_B0_UDB07_MSK
-#define SDCard_BSPIM_RxStsReg__MASK_ST_AUX_CTL_REG CYREG_B0_UDB07_MSK_ACTL
-#define SDCard_BSPIM_RxStsReg__PER_ST_AUX_CTL_REG CYREG_B0_UDB07_MSK_ACTL
-#define SDCard_BSPIM_RxStsReg__STATUS_AUX_CTL_REG CYREG_B0_UDB07_ACTL
-#define SDCard_BSPIM_RxStsReg__STATUS_CNT_REG CYREG_B0_UDB07_ST_CTL
-#define SDCard_BSPIM_RxStsReg__STATUS_CONTROL_REG CYREG_B0_UDB07_ST_CTL
-#define SDCard_BSPIM_RxStsReg__STATUS_REG CYREG_B0_UDB07_ST
-#define SDCard_BSPIM_sR8_Dp_u0__16BIT_A0_REG CYREG_B1_UDB04_05_A0
-#define SDCard_BSPIM_sR8_Dp_u0__16BIT_A1_REG CYREG_B1_UDB04_05_A1
-#define SDCard_BSPIM_sR8_Dp_u0__16BIT_D0_REG CYREG_B1_UDB04_05_D0
-#define SDCard_BSPIM_sR8_Dp_u0__16BIT_D1_REG CYREG_B1_UDB04_05_D1
-#define SDCard_BSPIM_sR8_Dp_u0__16BIT_DP_AUX_CTL_REG CYREG_B1_UDB04_05_ACTL
-#define SDCard_BSPIM_sR8_Dp_u0__16BIT_F0_REG CYREG_B1_UDB04_05_F0
-#define SDCard_BSPIM_sR8_Dp_u0__16BIT_F1_REG CYREG_B1_UDB04_05_F1
-#define SDCard_BSPIM_sR8_Dp_u0__A0_A1_REG CYREG_B1_UDB04_A0_A1
-#define SDCard_BSPIM_sR8_Dp_u0__A0_REG CYREG_B1_UDB04_A0
-#define SDCard_BSPIM_sR8_Dp_u0__A1_REG CYREG_B1_UDB04_A1
-#define SDCard_BSPIM_sR8_Dp_u0__D0_D1_REG CYREG_B1_UDB04_D0_D1
-#define SDCard_BSPIM_sR8_Dp_u0__D0_REG CYREG_B1_UDB04_D0
-#define SDCard_BSPIM_sR8_Dp_u0__D1_REG CYREG_B1_UDB04_D1
-#define SDCard_BSPIM_sR8_Dp_u0__DP_AUX_CTL_REG CYREG_B1_UDB04_ACTL
-#define SDCard_BSPIM_sR8_Dp_u0__F0_F1_REG CYREG_B1_UDB04_F0_F1
-#define SDCard_BSPIM_sR8_Dp_u0__F0_REG CYREG_B1_UDB04_F0
-#define SDCard_BSPIM_sR8_Dp_u0__F1_REG CYREG_B1_UDB04_F1
-#define SDCard_BSPIM_sR8_Dp_u0__MSK_DP_AUX_CTL_REG CYREG_B1_UDB04_MSK_ACTL
-#define SDCard_BSPIM_sR8_Dp_u0__PER_DP_AUX_CTL_REG CYREG_B1_UDB04_MSK_ACTL
-#define SDCard_BSPIM_TxStsReg__0__MASK 0x01u
-#define SDCard_BSPIM_TxStsReg__0__POS 0
-#define SDCard_BSPIM_TxStsReg__1__MASK 0x02u
-#define SDCard_BSPIM_TxStsReg__1__POS 1
-#define SDCard_BSPIM_TxStsReg__16BIT_STATUS_AUX_CTL_REG CYREG_B1_UDB07_08_ACTL
-#define SDCard_BSPIM_TxStsReg__16BIT_STATUS_REG CYREG_B1_UDB07_08_ST
-#define SDCard_BSPIM_TxStsReg__2__MASK 0x04u
-#define SDCard_BSPIM_TxStsReg__2__POS 2
-#define SDCard_BSPIM_TxStsReg__3__MASK 0x08u
-#define SDCard_BSPIM_TxStsReg__3__POS 3
-#define SDCard_BSPIM_TxStsReg__4__MASK 0x10u
-#define SDCard_BSPIM_TxStsReg__4__POS 4
-#define SDCard_BSPIM_TxStsReg__MASK 0x1Fu
-#define SDCard_BSPIM_TxStsReg__MASK_REG CYREG_B1_UDB07_MSK
-#define SDCard_BSPIM_TxStsReg__STATUS_AUX_CTL_REG CYREG_B1_UDB07_ACTL
-#define SDCard_BSPIM_TxStsReg__STATUS_REG CYREG_B1_UDB07_ST
-
-/* SD_CS */
-#define SD_CS__0__INTTYPE CYREG_PICU3_INTTYPE5
-#define SD_CS__0__MASK 0x20u
-#define SD_CS__0__PC CYREG_PRT3_PC5
-#define SD_CS__0__PORT 3u
-#define SD_CS__0__SHIFT 5u
-#define SD_CS__AG CYREG_PRT3_AG
-#define SD_CS__AMUX CYREG_PRT3_AMUX
-#define SD_CS__BIE CYREG_PRT3_BIE
-#define SD_CS__BIT_MASK CYREG_PRT3_BIT_MASK
-#define SD_CS__BYP CYREG_PRT3_BYP
-#define SD_CS__CTL CYREG_PRT3_CTL
-#define SD_CS__DM0 CYREG_PRT3_DM0
-#define SD_CS__DM1 CYREG_PRT3_DM1
-#define SD_CS__DM2 CYREG_PRT3_DM2
-#define SD_CS__DR CYREG_PRT3_DR
-#define SD_CS__INP_DIS CYREG_PRT3_INP_DIS
-#define SD_CS__INTTYPE_BASE CYDEV_PICU_INTTYPE_PICU3_BASE
-#define SD_CS__LCD_COM_SEG CYREG_PRT3_LCD_COM_SEG
-#define SD_CS__LCD_EN CYREG_PRT3_LCD_EN
-#define SD_CS__MASK 0x20u
-#define SD_CS__PORT 3u
-#define SD_CS__PRT CYREG_PRT3_PRT
-#define SD_CS__PRTDSI__CAPS_SEL CYREG_PRT3_CAPS_SEL
-#define SD_CS__PRTDSI__DBL_SYNC_IN CYREG_PRT3_DBL_SYNC_IN
-#define SD_CS__PRTDSI__OE_SEL0 CYREG_PRT3_OE_SEL0
-#define SD_CS__PRTDSI__OE_SEL1 CYREG_PRT3_OE_SEL1
-#define SD_CS__PRTDSI__OUT_SEL0 CYREG_PRT3_OUT_SEL0
-#define SD_CS__PRTDSI__OUT_SEL1 CYREG_PRT3_OUT_SEL1
-#define SD_CS__PRTDSI__SYNC_OUT CYREG_PRT3_SYNC_OUT
-#define SD_CS__PS CYREG_PRT3_PS
-#define SD_CS__SHIFT 5u
-#define SD_CS__SLW CYREG_PRT3_SLW
-
-/* SD_Data_Clk */
-#define SD_Data_Clk__CFG0 CYREG_CLKDIST_DCFG0_CFG0
-#define SD_Data_Clk__CFG1 CYREG_CLKDIST_DCFG0_CFG1
-#define SD_Data_Clk__CFG2 CYREG_CLKDIST_DCFG0_CFG2
-#define SD_Data_Clk__CFG2_SRC_SEL_MASK 0x07u
-#define SD_Data_Clk__INDEX 0x00u
-#define SD_Data_Clk__PM_ACT_CFG CYREG_PM_ACT_CFG2
-#define SD_Data_Clk__PM_ACT_MSK 0x01u
-#define SD_Data_Clk__PM_STBY_CFG CYREG_PM_STBY_CFG2
-#define SD_Data_Clk__PM_STBY_MSK 0x01u
-
-/* SD_MISO */
-#define SD_MISO__0__INTTYPE CYREG_PICU3_INTTYPE2
-#define SD_MISO__0__MASK 0x04u
-#define SD_MISO__0__PC CYREG_PRT3_PC2
-#define SD_MISO__0__PORT 3u
-#define SD_MISO__0__SHIFT 2u
-#define SD_MISO__AG CYREG_PRT3_AG
-#define SD_MISO__AMUX CYREG_PRT3_AMUX
-#define SD_MISO__BIE CYREG_PRT3_BIE
-#define SD_MISO__BIT_MASK CYREG_PRT3_BIT_MASK
-#define SD_MISO__BYP CYREG_PRT3_BYP
-#define SD_MISO__CTL CYREG_PRT3_CTL
-#define SD_MISO__DM0 CYREG_PRT3_DM0
-#define SD_MISO__DM1 CYREG_PRT3_DM1
-#define SD_MISO__DM2 CYREG_PRT3_DM2
-#define SD_MISO__DR CYREG_PRT3_DR
-#define SD_MISO__INP_DIS CYREG_PRT3_INP_DIS
-#define SD_MISO__INTTYPE_BASE CYDEV_PICU_INTTYPE_PICU3_BASE
-#define SD_MISO__LCD_COM_SEG CYREG_PRT3_LCD_COM_SEG
-#define SD_MISO__LCD_EN CYREG_PRT3_LCD_EN
-#define SD_MISO__MASK 0x04u
-#define SD_MISO__PORT 3u
-#define SD_MISO__PRT CYREG_PRT3_PRT
-#define SD_MISO__PRTDSI__CAPS_SEL CYREG_PRT3_CAPS_SEL
-#define SD_MISO__PRTDSI__DBL_SYNC_IN CYREG_PRT3_DBL_SYNC_IN
-#define SD_MISO__PRTDSI__OE_SEL0 CYREG_PRT3_OE_SEL0
-#define SD_MISO__PRTDSI__OE_SEL1 CYREG_PRT3_OE_SEL1
-#define SD_MISO__PRTDSI__OUT_SEL0 CYREG_PRT3_OUT_SEL0
-#define SD_MISO__PRTDSI__OUT_SEL1 CYREG_PRT3_OUT_SEL1
-#define SD_MISO__PRTDSI__SYNC_OUT CYREG_PRT3_SYNC_OUT
-#define SD_MISO__PS CYREG_PRT3_PS
-#define SD_MISO__SHIFT 2u
-#define SD_MISO__SLW CYREG_PRT3_SLW
-
-/* SD_MOSI */
-#define SD_MOSI__0__INTTYPE CYREG_PICU3_INTTYPE4
-#define SD_MOSI__0__MASK 0x10u
-#define SD_MOSI__0__PC CYREG_PRT3_PC4
-#define SD_MOSI__0__PORT 3u
-#define SD_MOSI__0__SHIFT 4u
-#define SD_MOSI__AG CYREG_PRT3_AG
-#define SD_MOSI__AMUX CYREG_PRT3_AMUX
-#define SD_MOSI__BIE CYREG_PRT3_BIE
-#define SD_MOSI__BIT_MASK CYREG_PRT3_BIT_MASK
-#define SD_MOSI__BYP CYREG_PRT3_BYP
-#define SD_MOSI__CTL CYREG_PRT3_CTL
-#define SD_MOSI__DM0 CYREG_PRT3_DM0
-#define SD_MOSI__DM1 CYREG_PRT3_DM1
-#define SD_MOSI__DM2 CYREG_PRT3_DM2
-#define SD_MOSI__DR CYREG_PRT3_DR
-#define SD_MOSI__INP_DIS CYREG_PRT3_INP_DIS
-#define SD_MOSI__INTTYPE_BASE CYDEV_PICU_INTTYPE_PICU3_BASE
-#define SD_MOSI__LCD_COM_SEG CYREG_PRT3_LCD_COM_SEG
-#define SD_MOSI__LCD_EN CYREG_PRT3_LCD_EN
-#define SD_MOSI__MASK 0x10u
-#define SD_MOSI__PORT 3u
-#define SD_MOSI__PRT CYREG_PRT3_PRT
-#define SD_MOSI__PRTDSI__CAPS_SEL CYREG_PRT3_CAPS_SEL
-#define SD_MOSI__PRTDSI__DBL_SYNC_IN CYREG_PRT3_DBL_SYNC_IN
-#define SD_MOSI__PRTDSI__OE_SEL0 CYREG_PRT3_OE_SEL0
-#define SD_MOSI__PRTDSI__OE_SEL1 CYREG_PRT3_OE_SEL1
-#define SD_MOSI__PRTDSI__OUT_SEL0 CYREG_PRT3_OUT_SEL0
-#define SD_MOSI__PRTDSI__OUT_SEL1 CYREG_PRT3_OUT_SEL1
-#define SD_MOSI__PRTDSI__SYNC_OUT CYREG_PRT3_SYNC_OUT
-#define SD_MOSI__PS CYREG_PRT3_PS
-#define SD_MOSI__SHIFT 4u
-#define SD_MOSI__SLW CYREG_PRT3_SLW
-
-/* SD_RX_DMA */
-#define SD_RX_DMA__DRQ_CTL CYREG_IDMUX_DRQ_CTL0
-#define SD_RX_DMA__DRQ_NUMBER 2u
-#define SD_RX_DMA__NUMBEROF_TDS 0u
-#define SD_RX_DMA__PRIORITY 0u
-#define SD_RX_DMA__TERMIN_EN 0u
-#define SD_RX_DMA__TERMIN_SEL 0u
-#define SD_RX_DMA__TERMOUT0_EN 1u
-#define SD_RX_DMA__TERMOUT0_SEL 2u
-#define SD_RX_DMA__TERMOUT1_EN 0u
-#define SD_RX_DMA__TERMOUT1_SEL 0u
-#define SD_RX_DMA_COMPLETE__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0
-#define SD_RX_DMA_COMPLETE__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0
-#define SD_RX_DMA_COMPLETE__INTC_MASK 0x20u
-#define SD_RX_DMA_COMPLETE__INTC_NUMBER 5u
-#define SD_RX_DMA_COMPLETE__INTC_PRIOR_NUM 7u
-#define SD_RX_DMA_COMPLETE__INTC_PRIOR_REG CYREG_NVIC_PRI_5
-#define SD_RX_DMA_COMPLETE__INTC_SET_EN_REG CYREG_NVIC_SETENA0
-#define SD_RX_DMA_COMPLETE__INTC_SET_PD_REG CYREG_NVIC_SETPEND0
-
-/* SD_SCK */
-#define SD_SCK__0__INTTYPE CYREG_PICU3_INTTYPE3
-#define SD_SCK__0__MASK 0x08u
-#define SD_SCK__0__PC CYREG_PRT3_PC3
-#define SD_SCK__0__PORT 3u
-#define SD_SCK__0__SHIFT 3u
-#define SD_SCK__AG CYREG_PRT3_AG
-#define SD_SCK__AMUX CYREG_PRT3_AMUX
-#define SD_SCK__BIE CYREG_PRT3_BIE
-#define SD_SCK__BIT_MASK CYREG_PRT3_BIT_MASK
-#define SD_SCK__BYP CYREG_PRT3_BYP
-#define SD_SCK__CTL CYREG_PRT3_CTL
-#define SD_SCK__DM0 CYREG_PRT3_DM0
-#define SD_SCK__DM1 CYREG_PRT3_DM1
-#define SD_SCK__DM2 CYREG_PRT3_DM2
-#define SD_SCK__DR CYREG_PRT3_DR
-#define SD_SCK__INP_DIS CYREG_PRT3_INP_DIS
-#define SD_SCK__INTTYPE_BASE CYDEV_PICU_INTTYPE_PICU3_BASE
-#define SD_SCK__LCD_COM_SEG CYREG_PRT3_LCD_COM_SEG
-#define SD_SCK__LCD_EN CYREG_PRT3_LCD_EN
-#define SD_SCK__MASK 0x08u
-#define SD_SCK__PORT 3u
-#define SD_SCK__PRT CYREG_PRT3_PRT
-#define SD_SCK__PRTDSI__CAPS_SEL CYREG_PRT3_CAPS_SEL
-#define SD_SCK__PRTDSI__DBL_SYNC_IN CYREG_PRT3_DBL_SYNC_IN
-#define SD_SCK__PRTDSI__OE_SEL0 CYREG_PRT3_OE_SEL0
-#define SD_SCK__PRTDSI__OE_SEL1 CYREG_PRT3_OE_SEL1
-#define SD_SCK__PRTDSI__OUT_SEL0 CYREG_PRT3_OUT_SEL0
-#define SD_SCK__PRTDSI__OUT_SEL1 CYREG_PRT3_OUT_SEL1
-#define SD_SCK__PRTDSI__SYNC_OUT CYREG_PRT3_SYNC_OUT
-#define SD_SCK__PS CYREG_PRT3_PS
-#define SD_SCK__SHIFT 3u
-#define SD_SCK__SLW CYREG_PRT3_SLW
-
-/* SD_TX_DMA */
-#define SD_TX_DMA__DRQ_CTL CYREG_IDMUX_DRQ_CTL0
-#define SD_TX_DMA__DRQ_NUMBER 3u
-#define SD_TX_DMA__NUMBEROF_TDS 0u
-#define SD_TX_DMA__PRIORITY 1u
-#define SD_TX_DMA__TERMIN_EN 0u
-#define SD_TX_DMA__TERMIN_SEL 0u
-#define SD_TX_DMA__TERMOUT0_EN 1u
-#define SD_TX_DMA__TERMOUT0_SEL 3u
-#define SD_TX_DMA__TERMOUT1_EN 0u
-#define SD_TX_DMA__TERMOUT1_SEL 0u
-#define SD_TX_DMA_COMPLETE__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0
-#define SD_TX_DMA_COMPLETE__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0
-#define SD_TX_DMA_COMPLETE__INTC_MASK 0x40u
-#define SD_TX_DMA_COMPLETE__INTC_NUMBER 6u
-#define SD_TX_DMA_COMPLETE__INTC_PRIOR_NUM 7u
-#define SD_TX_DMA_COMPLETE__INTC_PRIOR_REG CYREG_NVIC_PRI_6
-#define SD_TX_DMA_COMPLETE__INTC_SET_EN_REG CYREG_NVIC_SETENA0
-#define SD_TX_DMA_COMPLETE__INTC_SET_PD_REG CYREG_NVIC_SETPEND0
-
-/* TERM_EN */
-#define TERM_EN__0__INTTYPE CYREG_PICU15_INTTYPE3
-#define TERM_EN__0__MASK 0x08u
-#define TERM_EN__0__PC CYREG_IO_PC_PRT15_PC3
-#define TERM_EN__0__PORT 15u
-#define TERM_EN__0__SHIFT 3u
-#define TERM_EN__AG CYREG_PRT15_AG
-#define TERM_EN__AMUX CYREG_PRT15_AMUX
-#define TERM_EN__BIE CYREG_PRT15_BIE
-#define TERM_EN__BIT_MASK CYREG_PRT15_BIT_MASK
-#define TERM_EN__BYP CYREG_PRT15_BYP
-#define TERM_EN__CTL CYREG_PRT15_CTL
-#define TERM_EN__DM0 CYREG_PRT15_DM0
-#define TERM_EN__DM1 CYREG_PRT15_DM1
-#define TERM_EN__DM2 CYREG_PRT15_DM2
-#define TERM_EN__DR CYREG_PRT15_DR
-#define TERM_EN__INP_DIS CYREG_PRT15_INP_DIS
-#define TERM_EN__INTTYPE_BASE CYDEV_PICU_INTTYPE_PICU15_BASE
-#define TERM_EN__LCD_COM_SEG CYREG_PRT15_LCD_COM_SEG
-#define TERM_EN__LCD_EN CYREG_PRT15_LCD_EN
-#define TERM_EN__MASK 0x08u
-#define TERM_EN__PORT 15u
-#define TERM_EN__PRT CYREG_PRT15_PRT
-#define TERM_EN__PRTDSI__CAPS_SEL CYREG_PRT15_CAPS_SEL
-#define TERM_EN__PRTDSI__DBL_SYNC_IN CYREG_PRT15_DBL_SYNC_IN
-#define TERM_EN__PRTDSI__OE_SEL0 CYREG_PRT15_OE_SEL0
-#define TERM_EN__PRTDSI__OE_SEL1 CYREG_PRT15_OE_SEL1
-#define TERM_EN__PRTDSI__OUT_SEL0 CYREG_PRT15_OUT_SEL0
-#define TERM_EN__PRTDSI__OUT_SEL1 CYREG_PRT15_OUT_SEL1
-#define TERM_EN__PRTDSI__SYNC_OUT CYREG_PRT15_SYNC_OUT
-#define TERM_EN__PS CYREG_PRT15_PS
-#define TERM_EN__SHIFT 3u
-#define TERM_EN__SLW CYREG_PRT15_SLW
+/* SD_CS */
+#define SD_CS__0__INTTYPE CYREG_PICU3_INTTYPE5
+#define SD_CS__0__MASK 0x20u
+#define SD_CS__0__PC CYREG_PRT3_PC5
+#define SD_CS__0__PORT 3u
+#define SD_CS__0__SHIFT 5u
+#define SD_CS__AG CYREG_PRT3_AG
+#define SD_CS__AMUX CYREG_PRT3_AMUX
+#define SD_CS__BIE CYREG_PRT3_BIE
+#define SD_CS__BIT_MASK CYREG_PRT3_BIT_MASK
+#define SD_CS__BYP CYREG_PRT3_BYP
+#define SD_CS__CTL CYREG_PRT3_CTL
+#define SD_CS__DM0 CYREG_PRT3_DM0
+#define SD_CS__DM1 CYREG_PRT3_DM1
+#define SD_CS__DM2 CYREG_PRT3_DM2
+#define SD_CS__DR CYREG_PRT3_DR
+#define SD_CS__INP_DIS CYREG_PRT3_INP_DIS
+#define SD_CS__INTTYPE_BASE CYDEV_PICU_INTTYPE_PICU3_BASE
+#define SD_CS__LCD_COM_SEG CYREG_PRT3_LCD_COM_SEG
+#define SD_CS__LCD_EN CYREG_PRT3_LCD_EN
+#define SD_CS__MASK 0x20u
+#define SD_CS__PORT 3u
+#define SD_CS__PRT CYREG_PRT3_PRT
+#define SD_CS__PRTDSI__CAPS_SEL CYREG_PRT3_CAPS_SEL
+#define SD_CS__PRTDSI__DBL_SYNC_IN CYREG_PRT3_DBL_SYNC_IN
+#define SD_CS__PRTDSI__OE_SEL0 CYREG_PRT3_OE_SEL0
+#define SD_CS__PRTDSI__OE_SEL1 CYREG_PRT3_OE_SEL1
+#define SD_CS__PRTDSI__OUT_SEL0 CYREG_PRT3_OUT_SEL0
+#define SD_CS__PRTDSI__OUT_SEL1 CYREG_PRT3_OUT_SEL1
+#define SD_CS__PRTDSI__SYNC_OUT CYREG_PRT3_SYNC_OUT
+#define SD_CS__PS CYREG_PRT3_PS
+#define SD_CS__SHIFT 5u
+#define SD_CS__SLW CYREG_PRT3_SLW
/* USBFS */
#define USBFS_arb_int__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0
#define USBFS_USB__USBIO_CR0 CYREG_USB_USBIO_CR0
#define USBFS_USB__USBIO_CR1 CYREG_USB_USBIO_CR1
+/* SDCard */
+#define SDCard_BSPIM_BitCounter__16BIT_CONTROL_AUX_CTL_REG CYREG_B1_UDB04_05_ACTL
+#define SDCard_BSPIM_BitCounter__16BIT_CONTROL_CONTROL_REG CYREG_B1_UDB04_05_CTL
+#define SDCard_BSPIM_BitCounter__16BIT_CONTROL_COUNT_REG CYREG_B1_UDB04_05_CTL
+#define SDCard_BSPIM_BitCounter__16BIT_COUNT_CONTROL_REG CYREG_B1_UDB04_05_CTL
+#define SDCard_BSPIM_BitCounter__16BIT_COUNT_COUNT_REG CYREG_B1_UDB04_05_CTL
+#define SDCard_BSPIM_BitCounter__16BIT_MASK_MASK_REG CYREG_B1_UDB04_05_MSK
+#define SDCard_BSPIM_BitCounter__16BIT_MASK_PERIOD_REG CYREG_B1_UDB04_05_MSK
+#define SDCard_BSPIM_BitCounter__16BIT_PERIOD_MASK_REG CYREG_B1_UDB04_05_MSK
+#define SDCard_BSPIM_BitCounter__16BIT_PERIOD_PERIOD_REG CYREG_B1_UDB04_05_MSK
+#define SDCard_BSPIM_BitCounter__CONTROL_AUX_CTL_REG CYREG_B1_UDB04_ACTL
+#define SDCard_BSPIM_BitCounter__CONTROL_REG CYREG_B1_UDB04_CTL
+#define SDCard_BSPIM_BitCounter__CONTROL_ST_REG CYREG_B1_UDB04_ST_CTL
+#define SDCard_BSPIM_BitCounter__COUNT_REG CYREG_B1_UDB04_CTL
+#define SDCard_BSPIM_BitCounter__COUNT_ST_REG CYREG_B1_UDB04_ST_CTL
+#define SDCard_BSPIM_BitCounter__MASK_CTL_AUX_CTL_REG CYREG_B1_UDB04_MSK_ACTL
+#define SDCard_BSPIM_BitCounter__PER_CTL_AUX_CTL_REG CYREG_B1_UDB04_MSK_ACTL
+#define SDCard_BSPIM_BitCounter__PERIOD_REG CYREG_B1_UDB04_MSK
+#define SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_AUX_CTL_REG CYREG_B1_UDB04_05_ACTL
+#define SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_REG CYREG_B1_UDB04_05_ST
+#define SDCard_BSPIM_BitCounter_ST__MASK_REG CYREG_B1_UDB04_MSK
+#define SDCard_BSPIM_BitCounter_ST__MASK_ST_AUX_CTL_REG CYREG_B1_UDB04_MSK_ACTL
+#define SDCard_BSPIM_BitCounter_ST__PER_ST_AUX_CTL_REG CYREG_B1_UDB04_MSK_ACTL
+#define SDCard_BSPIM_BitCounter_ST__STATUS_AUX_CTL_REG CYREG_B1_UDB04_ACTL
+#define SDCard_BSPIM_BitCounter_ST__STATUS_CNT_REG CYREG_B1_UDB04_ST_CTL
+#define SDCard_BSPIM_BitCounter_ST__STATUS_CONTROL_REG CYREG_B1_UDB04_ST_CTL
+#define SDCard_BSPIM_BitCounter_ST__STATUS_REG CYREG_B1_UDB04_ST
+#define SDCard_BSPIM_RxStsReg__16BIT_STATUS_AUX_CTL_REG CYREG_B0_UDB07_08_ACTL
+#define SDCard_BSPIM_RxStsReg__16BIT_STATUS_REG CYREG_B0_UDB07_08_ST
+#define SDCard_BSPIM_RxStsReg__4__MASK 0x10u
+#define SDCard_BSPIM_RxStsReg__4__POS 4
+#define SDCard_BSPIM_RxStsReg__5__MASK 0x20u
+#define SDCard_BSPIM_RxStsReg__5__POS 5
+#define SDCard_BSPIM_RxStsReg__6__MASK 0x40u
+#define SDCard_BSPIM_RxStsReg__6__POS 6
+#define SDCard_BSPIM_RxStsReg__MASK 0x70u
+#define SDCard_BSPIM_RxStsReg__MASK_REG CYREG_B0_UDB07_MSK
+#define SDCard_BSPIM_RxStsReg__MASK_ST_AUX_CTL_REG CYREG_B0_UDB07_MSK_ACTL
+#define SDCard_BSPIM_RxStsReg__PER_ST_AUX_CTL_REG CYREG_B0_UDB07_MSK_ACTL
+#define SDCard_BSPIM_RxStsReg__STATUS_AUX_CTL_REG CYREG_B0_UDB07_ACTL
+#define SDCard_BSPIM_RxStsReg__STATUS_CNT_REG CYREG_B0_UDB07_ST_CTL
+#define SDCard_BSPIM_RxStsReg__STATUS_CONTROL_REG CYREG_B0_UDB07_ST_CTL
+#define SDCard_BSPIM_RxStsReg__STATUS_REG CYREG_B0_UDB07_ST
+#define SDCard_BSPIM_sR8_Dp_u0__16BIT_A0_REG CYREG_B1_UDB04_05_A0
+#define SDCard_BSPIM_sR8_Dp_u0__16BIT_A1_REG CYREG_B1_UDB04_05_A1
+#define SDCard_BSPIM_sR8_Dp_u0__16BIT_D0_REG CYREG_B1_UDB04_05_D0
+#define SDCard_BSPIM_sR8_Dp_u0__16BIT_D1_REG CYREG_B1_UDB04_05_D1
+#define SDCard_BSPIM_sR8_Dp_u0__16BIT_DP_AUX_CTL_REG CYREG_B1_UDB04_05_ACTL
+#define SDCard_BSPIM_sR8_Dp_u0__16BIT_F0_REG CYREG_B1_UDB04_05_F0
+#define SDCard_BSPIM_sR8_Dp_u0__16BIT_F1_REG CYREG_B1_UDB04_05_F1
+#define SDCard_BSPIM_sR8_Dp_u0__A0_A1_REG CYREG_B1_UDB04_A0_A1
+#define SDCard_BSPIM_sR8_Dp_u0__A0_REG CYREG_B1_UDB04_A0
+#define SDCard_BSPIM_sR8_Dp_u0__A1_REG CYREG_B1_UDB04_A1
+#define SDCard_BSPIM_sR8_Dp_u0__D0_D1_REG CYREG_B1_UDB04_D0_D1
+#define SDCard_BSPIM_sR8_Dp_u0__D0_REG CYREG_B1_UDB04_D0
+#define SDCard_BSPIM_sR8_Dp_u0__D1_REG CYREG_B1_UDB04_D1
+#define SDCard_BSPIM_sR8_Dp_u0__DP_AUX_CTL_REG CYREG_B1_UDB04_ACTL
+#define SDCard_BSPIM_sR8_Dp_u0__F0_F1_REG CYREG_B1_UDB04_F0_F1
+#define SDCard_BSPIM_sR8_Dp_u0__F0_REG CYREG_B1_UDB04_F0
+#define SDCard_BSPIM_sR8_Dp_u0__F1_REG CYREG_B1_UDB04_F1
+#define SDCard_BSPIM_sR8_Dp_u0__MSK_DP_AUX_CTL_REG CYREG_B1_UDB04_MSK_ACTL
+#define SDCard_BSPIM_sR8_Dp_u0__PER_DP_AUX_CTL_REG CYREG_B1_UDB04_MSK_ACTL
+#define SDCard_BSPIM_TxStsReg__0__MASK 0x01u
+#define SDCard_BSPIM_TxStsReg__0__POS 0
+#define SDCard_BSPIM_TxStsReg__1__MASK 0x02u
+#define SDCard_BSPIM_TxStsReg__1__POS 1
+#define SDCard_BSPIM_TxStsReg__16BIT_STATUS_AUX_CTL_REG CYREG_B1_UDB07_08_ACTL
+#define SDCard_BSPIM_TxStsReg__16BIT_STATUS_REG CYREG_B1_UDB07_08_ST
+#define SDCard_BSPIM_TxStsReg__2__MASK 0x04u
+#define SDCard_BSPIM_TxStsReg__2__POS 2
+#define SDCard_BSPIM_TxStsReg__3__MASK 0x08u
+#define SDCard_BSPIM_TxStsReg__3__POS 3
+#define SDCard_BSPIM_TxStsReg__4__MASK 0x10u
+#define SDCard_BSPIM_TxStsReg__4__POS 4
+#define SDCard_BSPIM_TxStsReg__MASK 0x1Fu
+#define SDCard_BSPIM_TxStsReg__MASK_REG CYREG_B1_UDB07_MSK
+#define SDCard_BSPIM_TxStsReg__STATUS_AUX_CTL_REG CYREG_B1_UDB07_ACTL
+#define SDCard_BSPIM_TxStsReg__STATUS_REG CYREG_B1_UDB07_ST
+
+/* SD_SCK */
+#define SD_SCK__0__INTTYPE CYREG_PICU3_INTTYPE3
+#define SD_SCK__0__MASK 0x08u
+#define SD_SCK__0__PC CYREG_PRT3_PC3
+#define SD_SCK__0__PORT 3u
+#define SD_SCK__0__SHIFT 3u
+#define SD_SCK__AG CYREG_PRT3_AG
+#define SD_SCK__AMUX CYREG_PRT3_AMUX
+#define SD_SCK__BIE CYREG_PRT3_BIE
+#define SD_SCK__BIT_MASK CYREG_PRT3_BIT_MASK
+#define SD_SCK__BYP CYREG_PRT3_BYP
+#define SD_SCK__CTL CYREG_PRT3_CTL
+#define SD_SCK__DM0 CYREG_PRT3_DM0
+#define SD_SCK__DM1 CYREG_PRT3_DM1
+#define SD_SCK__DM2 CYREG_PRT3_DM2
+#define SD_SCK__DR CYREG_PRT3_DR
+#define SD_SCK__INP_DIS CYREG_PRT3_INP_DIS
+#define SD_SCK__INTTYPE_BASE CYDEV_PICU_INTTYPE_PICU3_BASE
+#define SD_SCK__LCD_COM_SEG CYREG_PRT3_LCD_COM_SEG
+#define SD_SCK__LCD_EN CYREG_PRT3_LCD_EN
+#define SD_SCK__MASK 0x08u
+#define SD_SCK__PORT 3u
+#define SD_SCK__PRT CYREG_PRT3_PRT
+#define SD_SCK__PRTDSI__CAPS_SEL CYREG_PRT3_CAPS_SEL
+#define SD_SCK__PRTDSI__DBL_SYNC_IN CYREG_PRT3_DBL_SYNC_IN
+#define SD_SCK__PRTDSI__OE_SEL0 CYREG_PRT3_OE_SEL0
+#define SD_SCK__PRTDSI__OE_SEL1 CYREG_PRT3_OE_SEL1
+#define SD_SCK__PRTDSI__OUT_SEL0 CYREG_PRT3_OUT_SEL0
+#define SD_SCK__PRTDSI__OUT_SEL1 CYREG_PRT3_OUT_SEL1
+#define SD_SCK__PRTDSI__SYNC_OUT CYREG_PRT3_SYNC_OUT
+#define SD_SCK__PS CYREG_PRT3_PS
+#define SD_SCK__SHIFT 3u
+#define SD_SCK__SLW CYREG_PRT3_SLW
+
+/* SCSI_In */
+#define SCSI_In__0__INTTYPE CYREG_PICU6_INTTYPE1
+#define SCSI_In__0__MASK 0x02u
+#define SCSI_In__0__PC CYREG_PRT6_PC1
+#define SCSI_In__0__PORT 6u
+#define SCSI_In__0__SHIFT 1u
+#define SCSI_In__AG CYREG_PRT6_AG
+#define SCSI_In__AMUX CYREG_PRT6_AMUX
+#define SCSI_In__BIE CYREG_PRT6_BIE
+#define SCSI_In__BIT_MASK CYREG_PRT6_BIT_MASK
+#define SCSI_In__BYP CYREG_PRT6_BYP
+#define SCSI_In__CTL CYREG_PRT6_CTL
+#define SCSI_In__DBP__INTTYPE CYREG_PICU6_INTTYPE1
+#define SCSI_In__DBP__MASK 0x02u
+#define SCSI_In__DBP__PC CYREG_PRT6_PC1
+#define SCSI_In__DBP__PORT 6u
+#define SCSI_In__DBP__SHIFT 1u
+#define SCSI_In__DM0 CYREG_PRT6_DM0
+#define SCSI_In__DM1 CYREG_PRT6_DM1
+#define SCSI_In__DM2 CYREG_PRT6_DM2
+#define SCSI_In__DR CYREG_PRT6_DR
+#define SCSI_In__INP_DIS CYREG_PRT6_INP_DIS
+#define SCSI_In__INTTYPE_BASE CYDEV_PICU_INTTYPE_PICU6_BASE
+#define SCSI_In__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
+#define SCSI_In__LCD_EN CYREG_PRT6_LCD_EN
+#define SCSI_In__MASK 0x02u
+#define SCSI_In__PORT 6u
+#define SCSI_In__PRT CYREG_PRT6_PRT
+#define SCSI_In__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
+#define SCSI_In__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
+#define SCSI_In__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
+#define SCSI_In__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
+#define SCSI_In__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
+#define SCSI_In__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
+#define SCSI_In__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
+#define SCSI_In__PS CYREG_PRT6_PS
+#define SCSI_In__SHIFT 1u
+#define SCSI_In__SLW CYREG_PRT6_SLW
+#define SCSI_In_DBx__0__AG CYREG_PRT6_AG
+#define SCSI_In_DBx__0__AMUX CYREG_PRT6_AMUX
+#define SCSI_In_DBx__0__BIE CYREG_PRT6_BIE
+#define SCSI_In_DBx__0__BIT_MASK CYREG_PRT6_BIT_MASK
+#define SCSI_In_DBx__0__BYP CYREG_PRT6_BYP
+#define SCSI_In_DBx__0__CTL CYREG_PRT6_CTL
+#define SCSI_In_DBx__0__DM0 CYREG_PRT6_DM0
+#define SCSI_In_DBx__0__DM1 CYREG_PRT6_DM1
+#define SCSI_In_DBx__0__DM2 CYREG_PRT6_DM2
+#define SCSI_In_DBx__0__DR CYREG_PRT6_DR
+#define SCSI_In_DBx__0__INP_DIS CYREG_PRT6_INP_DIS
+#define SCSI_In_DBx__0__INTTYPE CYREG_PICU6_INTTYPE6
+#define SCSI_In_DBx__0__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
+#define SCSI_In_DBx__0__LCD_EN CYREG_PRT6_LCD_EN
+#define SCSI_In_DBx__0__MASK 0x40u
+#define SCSI_In_DBx__0__PC CYREG_PRT6_PC6
+#define SCSI_In_DBx__0__PORT 6u
+#define SCSI_In_DBx__0__PRT CYREG_PRT6_PRT
+#define SCSI_In_DBx__0__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
+#define SCSI_In_DBx__0__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
+#define SCSI_In_DBx__0__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
+#define SCSI_In_DBx__0__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
+#define SCSI_In_DBx__0__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
+#define SCSI_In_DBx__0__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
+#define SCSI_In_DBx__0__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
+#define SCSI_In_DBx__0__PS CYREG_PRT6_PS
+#define SCSI_In_DBx__0__SHIFT 6u
+#define SCSI_In_DBx__0__SLW CYREG_PRT6_SLW
+#define SCSI_In_DBx__1__AG CYREG_PRT6_AG
+#define SCSI_In_DBx__1__AMUX CYREG_PRT6_AMUX
+#define SCSI_In_DBx__1__BIE CYREG_PRT6_BIE
+#define SCSI_In_DBx__1__BIT_MASK CYREG_PRT6_BIT_MASK
+#define SCSI_In_DBx__1__BYP CYREG_PRT6_BYP
+#define SCSI_In_DBx__1__CTL CYREG_PRT6_CTL
+#define SCSI_In_DBx__1__DM0 CYREG_PRT6_DM0
+#define SCSI_In_DBx__1__DM1 CYREG_PRT6_DM1
+#define SCSI_In_DBx__1__DM2 CYREG_PRT6_DM2
+#define SCSI_In_DBx__1__DR CYREG_PRT6_DR
+#define SCSI_In_DBx__1__INP_DIS CYREG_PRT6_INP_DIS
+#define SCSI_In_DBx__1__INTTYPE CYREG_PICU6_INTTYPE4
+#define SCSI_In_DBx__1__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
+#define SCSI_In_DBx__1__LCD_EN CYREG_PRT6_LCD_EN
+#define SCSI_In_DBx__1__MASK 0x10u
+#define SCSI_In_DBx__1__PC CYREG_PRT6_PC4
+#define SCSI_In_DBx__1__PORT 6u
+#define SCSI_In_DBx__1__PRT CYREG_PRT6_PRT
+#define SCSI_In_DBx__1__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
+#define SCSI_In_DBx__1__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
+#define SCSI_In_DBx__1__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
+#define SCSI_In_DBx__1__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
+#define SCSI_In_DBx__1__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
+#define SCSI_In_DBx__1__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
+#define SCSI_In_DBx__1__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
+#define SCSI_In_DBx__1__PS CYREG_PRT6_PS
+#define SCSI_In_DBx__1__SHIFT 4u
+#define SCSI_In_DBx__1__SLW CYREG_PRT6_SLW
+#define SCSI_In_DBx__2__AG CYREG_PRT12_AG
+#define SCSI_In_DBx__2__BIE CYREG_PRT12_BIE
+#define SCSI_In_DBx__2__BIT_MASK CYREG_PRT12_BIT_MASK
+#define SCSI_In_DBx__2__BYP CYREG_PRT12_BYP
+#define SCSI_In_DBx__2__DM0 CYREG_PRT12_DM0
+#define SCSI_In_DBx__2__DM1 CYREG_PRT12_DM1
+#define SCSI_In_DBx__2__DM2 CYREG_PRT12_DM2
+#define SCSI_In_DBx__2__DR CYREG_PRT12_DR
+#define SCSI_In_DBx__2__INP_DIS CYREG_PRT12_INP_DIS
+#define SCSI_In_DBx__2__INTTYPE CYREG_PICU12_INTTYPE4
+#define SCSI_In_DBx__2__MASK 0x10u
+#define SCSI_In_DBx__2__PC CYREG_PRT12_PC4
+#define SCSI_In_DBx__2__PORT 12u
+#define SCSI_In_DBx__2__PRT CYREG_PRT12_PRT
+#define SCSI_In_DBx__2__PRTDSI__DBL_SYNC_IN CYREG_PRT12_DBL_SYNC_IN
+#define SCSI_In_DBx__2__PRTDSI__OE_SEL0 CYREG_PRT12_OE_SEL0
+#define SCSI_In_DBx__2__PRTDSI__OE_SEL1 CYREG_PRT12_OE_SEL1
+#define SCSI_In_DBx__2__PRTDSI__OUT_SEL0 CYREG_PRT12_OUT_SEL0
+#define SCSI_In_DBx__2__PRTDSI__OUT_SEL1 CYREG_PRT12_OUT_SEL1
+#define SCSI_In_DBx__2__PRTDSI__SYNC_OUT CYREG_PRT12_SYNC_OUT
+#define SCSI_In_DBx__2__PS CYREG_PRT12_PS
+#define SCSI_In_DBx__2__SHIFT 4u
+#define SCSI_In_DBx__2__SIO_CFG CYREG_PRT12_SIO_CFG
+#define SCSI_In_DBx__2__SIO_DIFF CYREG_PRT12_SIO_DIFF
+#define SCSI_In_DBx__2__SIO_HYST_EN CYREG_PRT12_SIO_HYST_EN
+#define SCSI_In_DBx__2__SIO_REG_HIFREQ CYREG_PRT12_SIO_REG_HIFREQ
+#define SCSI_In_DBx__2__SLW CYREG_PRT12_SLW
+#define SCSI_In_DBx__3__AG CYREG_PRT2_AG
+#define SCSI_In_DBx__3__AMUX CYREG_PRT2_AMUX
+#define SCSI_In_DBx__3__BIE CYREG_PRT2_BIE
+#define SCSI_In_DBx__3__BIT_MASK CYREG_PRT2_BIT_MASK
+#define SCSI_In_DBx__3__BYP CYREG_PRT2_BYP
+#define SCSI_In_DBx__3__CTL CYREG_PRT2_CTL
+#define SCSI_In_DBx__3__DM0 CYREG_PRT2_DM0
+#define SCSI_In_DBx__3__DM1 CYREG_PRT2_DM1
+#define SCSI_In_DBx__3__DM2 CYREG_PRT2_DM2
+#define SCSI_In_DBx__3__DR CYREG_PRT2_DR
+#define SCSI_In_DBx__3__INP_DIS CYREG_PRT2_INP_DIS
+#define SCSI_In_DBx__3__INTTYPE CYREG_PICU2_INTTYPE6
+#define SCSI_In_DBx__3__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
+#define SCSI_In_DBx__3__LCD_EN CYREG_PRT2_LCD_EN
+#define SCSI_In_DBx__3__MASK 0x40u
+#define SCSI_In_DBx__3__PC CYREG_PRT2_PC6
+#define SCSI_In_DBx__3__PORT 2u
+#define SCSI_In_DBx__3__PRT CYREG_PRT2_PRT
+#define SCSI_In_DBx__3__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
+#define SCSI_In_DBx__3__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
+#define SCSI_In_DBx__3__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
+#define SCSI_In_DBx__3__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
+#define SCSI_In_DBx__3__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
+#define SCSI_In_DBx__3__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
+#define SCSI_In_DBx__3__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
+#define SCSI_In_DBx__3__PS CYREG_PRT2_PS
+#define SCSI_In_DBx__3__SHIFT 6u
+#define SCSI_In_DBx__3__SLW CYREG_PRT2_SLW
+#define SCSI_In_DBx__4__AG CYREG_PRT2_AG
+#define SCSI_In_DBx__4__AMUX CYREG_PRT2_AMUX
+#define SCSI_In_DBx__4__BIE CYREG_PRT2_BIE
+#define SCSI_In_DBx__4__BIT_MASK CYREG_PRT2_BIT_MASK
+#define SCSI_In_DBx__4__BYP CYREG_PRT2_BYP
+#define SCSI_In_DBx__4__CTL CYREG_PRT2_CTL
+#define SCSI_In_DBx__4__DM0 CYREG_PRT2_DM0
+#define SCSI_In_DBx__4__DM1 CYREG_PRT2_DM1
+#define SCSI_In_DBx__4__DM2 CYREG_PRT2_DM2
+#define SCSI_In_DBx__4__DR CYREG_PRT2_DR
+#define SCSI_In_DBx__4__INP_DIS CYREG_PRT2_INP_DIS
+#define SCSI_In_DBx__4__INTTYPE CYREG_PICU2_INTTYPE4
+#define SCSI_In_DBx__4__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
+#define SCSI_In_DBx__4__LCD_EN CYREG_PRT2_LCD_EN
+#define SCSI_In_DBx__4__MASK 0x10u
+#define SCSI_In_DBx__4__PC CYREG_PRT2_PC4
+#define SCSI_In_DBx__4__PORT 2u
+#define SCSI_In_DBx__4__PRT CYREG_PRT2_PRT
+#define SCSI_In_DBx__4__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
+#define SCSI_In_DBx__4__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
+#define SCSI_In_DBx__4__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
+#define SCSI_In_DBx__4__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
+#define SCSI_In_DBx__4__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
+#define SCSI_In_DBx__4__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
+#define SCSI_In_DBx__4__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
+#define SCSI_In_DBx__4__PS CYREG_PRT2_PS
+#define SCSI_In_DBx__4__SHIFT 4u
+#define SCSI_In_DBx__4__SLW CYREG_PRT2_SLW
+#define SCSI_In_DBx__5__AG CYREG_PRT2_AG
+#define SCSI_In_DBx__5__AMUX CYREG_PRT2_AMUX
+#define SCSI_In_DBx__5__BIE CYREG_PRT2_BIE
+#define SCSI_In_DBx__5__BIT_MASK CYREG_PRT2_BIT_MASK
+#define SCSI_In_DBx__5__BYP CYREG_PRT2_BYP
+#define SCSI_In_DBx__5__CTL CYREG_PRT2_CTL
+#define SCSI_In_DBx__5__DM0 CYREG_PRT2_DM0
+#define SCSI_In_DBx__5__DM1 CYREG_PRT2_DM1
+#define SCSI_In_DBx__5__DM2 CYREG_PRT2_DM2
+#define SCSI_In_DBx__5__DR CYREG_PRT2_DR
+#define SCSI_In_DBx__5__INP_DIS CYREG_PRT2_INP_DIS
+#define SCSI_In_DBx__5__INTTYPE CYREG_PICU2_INTTYPE2
+#define SCSI_In_DBx__5__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
+#define SCSI_In_DBx__5__LCD_EN CYREG_PRT2_LCD_EN
+#define SCSI_In_DBx__5__MASK 0x04u
+#define SCSI_In_DBx__5__PC CYREG_PRT2_PC2
+#define SCSI_In_DBx__5__PORT 2u
+#define SCSI_In_DBx__5__PRT CYREG_PRT2_PRT
+#define SCSI_In_DBx__5__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
+#define SCSI_In_DBx__5__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
+#define SCSI_In_DBx__5__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
+#define SCSI_In_DBx__5__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
+#define SCSI_In_DBx__5__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
+#define SCSI_In_DBx__5__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
+#define SCSI_In_DBx__5__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
+#define SCSI_In_DBx__5__PS CYREG_PRT2_PS
+#define SCSI_In_DBx__5__SHIFT 2u
+#define SCSI_In_DBx__5__SLW CYREG_PRT2_SLW
+#define SCSI_In_DBx__6__AG CYREG_PRT2_AG
+#define SCSI_In_DBx__6__AMUX CYREG_PRT2_AMUX
+#define SCSI_In_DBx__6__BIE CYREG_PRT2_BIE
+#define SCSI_In_DBx__6__BIT_MASK CYREG_PRT2_BIT_MASK
+#define SCSI_In_DBx__6__BYP CYREG_PRT2_BYP
+#define SCSI_In_DBx__6__CTL CYREG_PRT2_CTL
+#define SCSI_In_DBx__6__DM0 CYREG_PRT2_DM0
+#define SCSI_In_DBx__6__DM1 CYREG_PRT2_DM1
+#define SCSI_In_DBx__6__DM2 CYREG_PRT2_DM2
+#define SCSI_In_DBx__6__DR CYREG_PRT2_DR
+#define SCSI_In_DBx__6__INP_DIS CYREG_PRT2_INP_DIS
+#define SCSI_In_DBx__6__INTTYPE CYREG_PICU2_INTTYPE0
+#define SCSI_In_DBx__6__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
+#define SCSI_In_DBx__6__LCD_EN CYREG_PRT2_LCD_EN
+#define SCSI_In_DBx__6__MASK 0x01u
+#define SCSI_In_DBx__6__PC CYREG_PRT2_PC0
+#define SCSI_In_DBx__6__PORT 2u
+#define SCSI_In_DBx__6__PRT CYREG_PRT2_PRT
+#define SCSI_In_DBx__6__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
+#define SCSI_In_DBx__6__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
+#define SCSI_In_DBx__6__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
+#define SCSI_In_DBx__6__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
+#define SCSI_In_DBx__6__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
+#define SCSI_In_DBx__6__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
+#define SCSI_In_DBx__6__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
+#define SCSI_In_DBx__6__PS CYREG_PRT2_PS
+#define SCSI_In_DBx__6__SHIFT 0u
+#define SCSI_In_DBx__6__SLW CYREG_PRT2_SLW
+#define SCSI_In_DBx__7__AG CYREG_PRT6_AG
+#define SCSI_In_DBx__7__AMUX CYREG_PRT6_AMUX
+#define SCSI_In_DBx__7__BIE CYREG_PRT6_BIE
+#define SCSI_In_DBx__7__BIT_MASK CYREG_PRT6_BIT_MASK
+#define SCSI_In_DBx__7__BYP CYREG_PRT6_BYP
+#define SCSI_In_DBx__7__CTL CYREG_PRT6_CTL
+#define SCSI_In_DBx__7__DM0 CYREG_PRT6_DM0
+#define SCSI_In_DBx__7__DM1 CYREG_PRT6_DM1
+#define SCSI_In_DBx__7__DM2 CYREG_PRT6_DM2
+#define SCSI_In_DBx__7__DR CYREG_PRT6_DR
+#define SCSI_In_DBx__7__INP_DIS CYREG_PRT6_INP_DIS
+#define SCSI_In_DBx__7__INTTYPE CYREG_PICU6_INTTYPE3
+#define SCSI_In_DBx__7__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
+#define SCSI_In_DBx__7__LCD_EN CYREG_PRT6_LCD_EN
+#define SCSI_In_DBx__7__MASK 0x08u
+#define SCSI_In_DBx__7__PC CYREG_PRT6_PC3
+#define SCSI_In_DBx__7__PORT 6u
+#define SCSI_In_DBx__7__PRT CYREG_PRT6_PRT
+#define SCSI_In_DBx__7__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
+#define SCSI_In_DBx__7__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
+#define SCSI_In_DBx__7__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
+#define SCSI_In_DBx__7__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
+#define SCSI_In_DBx__7__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
+#define SCSI_In_DBx__7__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
+#define SCSI_In_DBx__7__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
+#define SCSI_In_DBx__7__PS CYREG_PRT6_PS
+#define SCSI_In_DBx__7__SHIFT 3u
+#define SCSI_In_DBx__7__SLW CYREG_PRT6_SLW
+#define SCSI_In_DBx__DB0__AG CYREG_PRT6_AG
+#define SCSI_In_DBx__DB0__AMUX CYREG_PRT6_AMUX
+#define SCSI_In_DBx__DB0__BIE CYREG_PRT6_BIE
+#define SCSI_In_DBx__DB0__BIT_MASK CYREG_PRT6_BIT_MASK
+#define SCSI_In_DBx__DB0__BYP CYREG_PRT6_BYP
+#define SCSI_In_DBx__DB0__CTL CYREG_PRT6_CTL
+#define SCSI_In_DBx__DB0__DM0 CYREG_PRT6_DM0
+#define SCSI_In_DBx__DB0__DM1 CYREG_PRT6_DM1
+#define SCSI_In_DBx__DB0__DM2 CYREG_PRT6_DM2
+#define SCSI_In_DBx__DB0__DR CYREG_PRT6_DR
+#define SCSI_In_DBx__DB0__INP_DIS CYREG_PRT6_INP_DIS
+#define SCSI_In_DBx__DB0__INTTYPE CYREG_PICU6_INTTYPE6
+#define SCSI_In_DBx__DB0__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
+#define SCSI_In_DBx__DB0__LCD_EN CYREG_PRT6_LCD_EN
+#define SCSI_In_DBx__DB0__MASK 0x40u
+#define SCSI_In_DBx__DB0__PC CYREG_PRT6_PC6
+#define SCSI_In_DBx__DB0__PORT 6u
+#define SCSI_In_DBx__DB0__PRT CYREG_PRT6_PRT
+#define SCSI_In_DBx__DB0__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
+#define SCSI_In_DBx__DB0__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
+#define SCSI_In_DBx__DB0__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
+#define SCSI_In_DBx__DB0__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
+#define SCSI_In_DBx__DB0__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
+#define SCSI_In_DBx__DB0__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
+#define SCSI_In_DBx__DB0__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
+#define SCSI_In_DBx__DB0__PS CYREG_PRT6_PS
+#define SCSI_In_DBx__DB0__SHIFT 6u
+#define SCSI_In_DBx__DB0__SLW CYREG_PRT6_SLW
+#define SCSI_In_DBx__DB1__AG CYREG_PRT6_AG
+#define SCSI_In_DBx__DB1__AMUX CYREG_PRT6_AMUX
+#define SCSI_In_DBx__DB1__BIE CYREG_PRT6_BIE
+#define SCSI_In_DBx__DB1__BIT_MASK CYREG_PRT6_BIT_MASK
+#define SCSI_In_DBx__DB1__BYP CYREG_PRT6_BYP
+#define SCSI_In_DBx__DB1__CTL CYREG_PRT6_CTL
+#define SCSI_In_DBx__DB1__DM0 CYREG_PRT6_DM0
+#define SCSI_In_DBx__DB1__DM1 CYREG_PRT6_DM1
+#define SCSI_In_DBx__DB1__DM2 CYREG_PRT6_DM2
+#define SCSI_In_DBx__DB1__DR CYREG_PRT6_DR
+#define SCSI_In_DBx__DB1__INP_DIS CYREG_PRT6_INP_DIS
+#define SCSI_In_DBx__DB1__INTTYPE CYREG_PICU6_INTTYPE4
+#define SCSI_In_DBx__DB1__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
+#define SCSI_In_DBx__DB1__LCD_EN CYREG_PRT6_LCD_EN
+#define SCSI_In_DBx__DB1__MASK 0x10u
+#define SCSI_In_DBx__DB1__PC CYREG_PRT6_PC4
+#define SCSI_In_DBx__DB1__PORT 6u
+#define SCSI_In_DBx__DB1__PRT CYREG_PRT6_PRT
+#define SCSI_In_DBx__DB1__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
+#define SCSI_In_DBx__DB1__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
+#define SCSI_In_DBx__DB1__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
+#define SCSI_In_DBx__DB1__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
+#define SCSI_In_DBx__DB1__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
+#define SCSI_In_DBx__DB1__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
+#define SCSI_In_DBx__DB1__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
+#define SCSI_In_DBx__DB1__PS CYREG_PRT6_PS
+#define SCSI_In_DBx__DB1__SHIFT 4u
+#define SCSI_In_DBx__DB1__SLW CYREG_PRT6_SLW
+#define SCSI_In_DBx__DB2__AG CYREG_PRT12_AG
+#define SCSI_In_DBx__DB2__BIE CYREG_PRT12_BIE
+#define SCSI_In_DBx__DB2__BIT_MASK CYREG_PRT12_BIT_MASK
+#define SCSI_In_DBx__DB2__BYP CYREG_PRT12_BYP
+#define SCSI_In_DBx__DB2__DM0 CYREG_PRT12_DM0
+#define SCSI_In_DBx__DB2__DM1 CYREG_PRT12_DM1
+#define SCSI_In_DBx__DB2__DM2 CYREG_PRT12_DM2
+#define SCSI_In_DBx__DB2__DR CYREG_PRT12_DR
+#define SCSI_In_DBx__DB2__INP_DIS CYREG_PRT12_INP_DIS
+#define SCSI_In_DBx__DB2__INTTYPE CYREG_PICU12_INTTYPE4
+#define SCSI_In_DBx__DB2__MASK 0x10u
+#define SCSI_In_DBx__DB2__PC CYREG_PRT12_PC4
+#define SCSI_In_DBx__DB2__PORT 12u
+#define SCSI_In_DBx__DB2__PRT CYREG_PRT12_PRT
+#define SCSI_In_DBx__DB2__PRTDSI__DBL_SYNC_IN CYREG_PRT12_DBL_SYNC_IN
+#define SCSI_In_DBx__DB2__PRTDSI__OE_SEL0 CYREG_PRT12_OE_SEL0
+#define SCSI_In_DBx__DB2__PRTDSI__OE_SEL1 CYREG_PRT12_OE_SEL1
+#define SCSI_In_DBx__DB2__PRTDSI__OUT_SEL0 CYREG_PRT12_OUT_SEL0
+#define SCSI_In_DBx__DB2__PRTDSI__OUT_SEL1 CYREG_PRT12_OUT_SEL1
+#define SCSI_In_DBx__DB2__PRTDSI__SYNC_OUT CYREG_PRT12_SYNC_OUT
+#define SCSI_In_DBx__DB2__PS CYREG_PRT12_PS
+#define SCSI_In_DBx__DB2__SHIFT 4u
+#define SCSI_In_DBx__DB2__SIO_CFG CYREG_PRT12_SIO_CFG
+#define SCSI_In_DBx__DB2__SIO_DIFF CYREG_PRT12_SIO_DIFF
+#define SCSI_In_DBx__DB2__SIO_HYST_EN CYREG_PRT12_SIO_HYST_EN
+#define SCSI_In_DBx__DB2__SIO_REG_HIFREQ CYREG_PRT12_SIO_REG_HIFREQ
+#define SCSI_In_DBx__DB2__SLW CYREG_PRT12_SLW
+#define SCSI_In_DBx__DB3__AG CYREG_PRT2_AG
+#define SCSI_In_DBx__DB3__AMUX CYREG_PRT2_AMUX
+#define SCSI_In_DBx__DB3__BIE CYREG_PRT2_BIE
+#define SCSI_In_DBx__DB3__BIT_MASK CYREG_PRT2_BIT_MASK
+#define SCSI_In_DBx__DB3__BYP CYREG_PRT2_BYP
+#define SCSI_In_DBx__DB3__CTL CYREG_PRT2_CTL
+#define SCSI_In_DBx__DB3__DM0 CYREG_PRT2_DM0
+#define SCSI_In_DBx__DB3__DM1 CYREG_PRT2_DM1
+#define SCSI_In_DBx__DB3__DM2 CYREG_PRT2_DM2
+#define SCSI_In_DBx__DB3__DR CYREG_PRT2_DR
+#define SCSI_In_DBx__DB3__INP_DIS CYREG_PRT2_INP_DIS
+#define SCSI_In_DBx__DB3__INTTYPE CYREG_PICU2_INTTYPE6
+#define SCSI_In_DBx__DB3__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
+#define SCSI_In_DBx__DB3__LCD_EN CYREG_PRT2_LCD_EN
+#define SCSI_In_DBx__DB3__MASK 0x40u
+#define SCSI_In_DBx__DB3__PC CYREG_PRT2_PC6
+#define SCSI_In_DBx__DB3__PORT 2u
+#define SCSI_In_DBx__DB3__PRT CYREG_PRT2_PRT
+#define SCSI_In_DBx__DB3__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
+#define SCSI_In_DBx__DB3__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
+#define SCSI_In_DBx__DB3__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
+#define SCSI_In_DBx__DB3__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
+#define SCSI_In_DBx__DB3__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
+#define SCSI_In_DBx__DB3__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
+#define SCSI_In_DBx__DB3__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
+#define SCSI_In_DBx__DB3__PS CYREG_PRT2_PS
+#define SCSI_In_DBx__DB3__SHIFT 6u
+#define SCSI_In_DBx__DB3__SLW CYREG_PRT2_SLW
+#define SCSI_In_DBx__DB4__AG CYREG_PRT2_AG
+#define SCSI_In_DBx__DB4__AMUX CYREG_PRT2_AMUX
+#define SCSI_In_DBx__DB4__BIE CYREG_PRT2_BIE
+#define SCSI_In_DBx__DB4__BIT_MASK CYREG_PRT2_BIT_MASK
+#define SCSI_In_DBx__DB4__BYP CYREG_PRT2_BYP
+#define SCSI_In_DBx__DB4__CTL CYREG_PRT2_CTL
+#define SCSI_In_DBx__DB4__DM0 CYREG_PRT2_DM0
+#define SCSI_In_DBx__DB4__DM1 CYREG_PRT2_DM1
+#define SCSI_In_DBx__DB4__DM2 CYREG_PRT2_DM2
+#define SCSI_In_DBx__DB4__DR CYREG_PRT2_DR
+#define SCSI_In_DBx__DB4__INP_DIS CYREG_PRT2_INP_DIS
+#define SCSI_In_DBx__DB4__INTTYPE CYREG_PICU2_INTTYPE4
+#define SCSI_In_DBx__DB4__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
+#define SCSI_In_DBx__DB4__LCD_EN CYREG_PRT2_LCD_EN
+#define SCSI_In_DBx__DB4__MASK 0x10u
+#define SCSI_In_DBx__DB4__PC CYREG_PRT2_PC4
+#define SCSI_In_DBx__DB4__PORT 2u
+#define SCSI_In_DBx__DB4__PRT CYREG_PRT2_PRT
+#define SCSI_In_DBx__DB4__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
+#define SCSI_In_DBx__DB4__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
+#define SCSI_In_DBx__DB4__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
+#define SCSI_In_DBx__DB4__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
+#define SCSI_In_DBx__DB4__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
+#define SCSI_In_DBx__DB4__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
+#define SCSI_In_DBx__DB4__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
+#define SCSI_In_DBx__DB4__PS CYREG_PRT2_PS
+#define SCSI_In_DBx__DB4__SHIFT 4u
+#define SCSI_In_DBx__DB4__SLW CYREG_PRT2_SLW
+#define SCSI_In_DBx__DB5__AG CYREG_PRT2_AG
+#define SCSI_In_DBx__DB5__AMUX CYREG_PRT2_AMUX
+#define SCSI_In_DBx__DB5__BIE CYREG_PRT2_BIE
+#define SCSI_In_DBx__DB5__BIT_MASK CYREG_PRT2_BIT_MASK
+#define SCSI_In_DBx__DB5__BYP CYREG_PRT2_BYP
+#define SCSI_In_DBx__DB5__CTL CYREG_PRT2_CTL
+#define SCSI_In_DBx__DB5__DM0 CYREG_PRT2_DM0
+#define SCSI_In_DBx__DB5__DM1 CYREG_PRT2_DM1
+#define SCSI_In_DBx__DB5__DM2 CYREG_PRT2_DM2
+#define SCSI_In_DBx__DB5__DR CYREG_PRT2_DR
+#define SCSI_In_DBx__DB5__INP_DIS CYREG_PRT2_INP_DIS
+#define SCSI_In_DBx__DB5__INTTYPE CYREG_PICU2_INTTYPE2
+#define SCSI_In_DBx__DB5__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
+#define SCSI_In_DBx__DB5__LCD_EN CYREG_PRT2_LCD_EN
+#define SCSI_In_DBx__DB5__MASK 0x04u
+#define SCSI_In_DBx__DB5__PC CYREG_PRT2_PC2
+#define SCSI_In_DBx__DB5__PORT 2u
+#define SCSI_In_DBx__DB5__PRT CYREG_PRT2_PRT
+#define SCSI_In_DBx__DB5__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
+#define SCSI_In_DBx__DB5__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
+#define SCSI_In_DBx__DB5__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
+#define SCSI_In_DBx__DB5__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
+#define SCSI_In_DBx__DB5__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
+#define SCSI_In_DBx__DB5__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
+#define SCSI_In_DBx__DB5__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
+#define SCSI_In_DBx__DB5__PS CYREG_PRT2_PS
+#define SCSI_In_DBx__DB5__SHIFT 2u
+#define SCSI_In_DBx__DB5__SLW CYREG_PRT2_SLW
+#define SCSI_In_DBx__DB6__AG CYREG_PRT2_AG
+#define SCSI_In_DBx__DB6__AMUX CYREG_PRT2_AMUX
+#define SCSI_In_DBx__DB6__BIE CYREG_PRT2_BIE
+#define SCSI_In_DBx__DB6__BIT_MASK CYREG_PRT2_BIT_MASK
+#define SCSI_In_DBx__DB6__BYP CYREG_PRT2_BYP
+#define SCSI_In_DBx__DB6__CTL CYREG_PRT2_CTL
+#define SCSI_In_DBx__DB6__DM0 CYREG_PRT2_DM0
+#define SCSI_In_DBx__DB6__DM1 CYREG_PRT2_DM1
+#define SCSI_In_DBx__DB6__DM2 CYREG_PRT2_DM2
+#define SCSI_In_DBx__DB6__DR CYREG_PRT2_DR
+#define SCSI_In_DBx__DB6__INP_DIS CYREG_PRT2_INP_DIS
+#define SCSI_In_DBx__DB6__INTTYPE CYREG_PICU2_INTTYPE0
+#define SCSI_In_DBx__DB6__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
+#define SCSI_In_DBx__DB6__LCD_EN CYREG_PRT2_LCD_EN
+#define SCSI_In_DBx__DB6__MASK 0x01u
+#define SCSI_In_DBx__DB6__PC CYREG_PRT2_PC0
+#define SCSI_In_DBx__DB6__PORT 2u
+#define SCSI_In_DBx__DB6__PRT CYREG_PRT2_PRT
+#define SCSI_In_DBx__DB6__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
+#define SCSI_In_DBx__DB6__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
+#define SCSI_In_DBx__DB6__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
+#define SCSI_In_DBx__DB6__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
+#define SCSI_In_DBx__DB6__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
+#define SCSI_In_DBx__DB6__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
+#define SCSI_In_DBx__DB6__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
+#define SCSI_In_DBx__DB6__PS CYREG_PRT2_PS
+#define SCSI_In_DBx__DB6__SHIFT 0u
+#define SCSI_In_DBx__DB6__SLW CYREG_PRT2_SLW
+#define SCSI_In_DBx__DB7__AG CYREG_PRT6_AG
+#define SCSI_In_DBx__DB7__AMUX CYREG_PRT6_AMUX
+#define SCSI_In_DBx__DB7__BIE CYREG_PRT6_BIE
+#define SCSI_In_DBx__DB7__BIT_MASK CYREG_PRT6_BIT_MASK
+#define SCSI_In_DBx__DB7__BYP CYREG_PRT6_BYP
+#define SCSI_In_DBx__DB7__CTL CYREG_PRT6_CTL
+#define SCSI_In_DBx__DB7__DM0 CYREG_PRT6_DM0
+#define SCSI_In_DBx__DB7__DM1 CYREG_PRT6_DM1
+#define SCSI_In_DBx__DB7__DM2 CYREG_PRT6_DM2
+#define SCSI_In_DBx__DB7__DR CYREG_PRT6_DR
+#define SCSI_In_DBx__DB7__INP_DIS CYREG_PRT6_INP_DIS
+#define SCSI_In_DBx__DB7__INTTYPE CYREG_PICU6_INTTYPE3
+#define SCSI_In_DBx__DB7__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
+#define SCSI_In_DBx__DB7__LCD_EN CYREG_PRT6_LCD_EN
+#define SCSI_In_DBx__DB7__MASK 0x08u
+#define SCSI_In_DBx__DB7__PC CYREG_PRT6_PC3
+#define SCSI_In_DBx__DB7__PORT 6u
+#define SCSI_In_DBx__DB7__PRT CYREG_PRT6_PRT
+#define SCSI_In_DBx__DB7__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
+#define SCSI_In_DBx__DB7__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
+#define SCSI_In_DBx__DB7__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
+#define SCSI_In_DBx__DB7__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
+#define SCSI_In_DBx__DB7__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
+#define SCSI_In_DBx__DB7__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
+#define SCSI_In_DBx__DB7__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
+#define SCSI_In_DBx__DB7__PS CYREG_PRT6_PS
+#define SCSI_In_DBx__DB7__SHIFT 3u
+#define SCSI_In_DBx__DB7__SLW CYREG_PRT6_SLW
+
+/* SD_MISO */
+#define SD_MISO__0__INTTYPE CYREG_PICU3_INTTYPE2
+#define SD_MISO__0__MASK 0x04u
+#define SD_MISO__0__PC CYREG_PRT3_PC2
+#define SD_MISO__0__PORT 3u
+#define SD_MISO__0__SHIFT 2u
+#define SD_MISO__AG CYREG_PRT3_AG
+#define SD_MISO__AMUX CYREG_PRT3_AMUX
+#define SD_MISO__BIE CYREG_PRT3_BIE
+#define SD_MISO__BIT_MASK CYREG_PRT3_BIT_MASK
+#define SD_MISO__BYP CYREG_PRT3_BYP
+#define SD_MISO__CTL CYREG_PRT3_CTL
+#define SD_MISO__DM0 CYREG_PRT3_DM0
+#define SD_MISO__DM1 CYREG_PRT3_DM1
+#define SD_MISO__DM2 CYREG_PRT3_DM2
+#define SD_MISO__DR CYREG_PRT3_DR
+#define SD_MISO__INP_DIS CYREG_PRT3_INP_DIS
+#define SD_MISO__INTTYPE_BASE CYDEV_PICU_INTTYPE_PICU3_BASE
+#define SD_MISO__LCD_COM_SEG CYREG_PRT3_LCD_COM_SEG
+#define SD_MISO__LCD_EN CYREG_PRT3_LCD_EN
+#define SD_MISO__MASK 0x04u
+#define SD_MISO__PORT 3u
+#define SD_MISO__PRT CYREG_PRT3_PRT
+#define SD_MISO__PRTDSI__CAPS_SEL CYREG_PRT3_CAPS_SEL
+#define SD_MISO__PRTDSI__DBL_SYNC_IN CYREG_PRT3_DBL_SYNC_IN
+#define SD_MISO__PRTDSI__OE_SEL0 CYREG_PRT3_OE_SEL0
+#define SD_MISO__PRTDSI__OE_SEL1 CYREG_PRT3_OE_SEL1
+#define SD_MISO__PRTDSI__OUT_SEL0 CYREG_PRT3_OUT_SEL0
+#define SD_MISO__PRTDSI__OUT_SEL1 CYREG_PRT3_OUT_SEL1
+#define SD_MISO__PRTDSI__SYNC_OUT CYREG_PRT3_SYNC_OUT
+#define SD_MISO__PS CYREG_PRT3_PS
+#define SD_MISO__SHIFT 2u
+#define SD_MISO__SLW CYREG_PRT3_SLW
+
+/* SD_MOSI */
+#define SD_MOSI__0__INTTYPE CYREG_PICU3_INTTYPE4
+#define SD_MOSI__0__MASK 0x10u
+#define SD_MOSI__0__PC CYREG_PRT3_PC4
+#define SD_MOSI__0__PORT 3u
+#define SD_MOSI__0__SHIFT 4u
+#define SD_MOSI__AG CYREG_PRT3_AG
+#define SD_MOSI__AMUX CYREG_PRT3_AMUX
+#define SD_MOSI__BIE CYREG_PRT3_BIE
+#define SD_MOSI__BIT_MASK CYREG_PRT3_BIT_MASK
+#define SD_MOSI__BYP CYREG_PRT3_BYP
+#define SD_MOSI__CTL CYREG_PRT3_CTL
+#define SD_MOSI__DM0 CYREG_PRT3_DM0
+#define SD_MOSI__DM1 CYREG_PRT3_DM1
+#define SD_MOSI__DM2 CYREG_PRT3_DM2
+#define SD_MOSI__DR CYREG_PRT3_DR
+#define SD_MOSI__INP_DIS CYREG_PRT3_INP_DIS
+#define SD_MOSI__INTTYPE_BASE CYDEV_PICU_INTTYPE_PICU3_BASE
+#define SD_MOSI__LCD_COM_SEG CYREG_PRT3_LCD_COM_SEG
+#define SD_MOSI__LCD_EN CYREG_PRT3_LCD_EN
+#define SD_MOSI__MASK 0x10u
+#define SD_MOSI__PORT 3u
+#define SD_MOSI__PRT CYREG_PRT3_PRT
+#define SD_MOSI__PRTDSI__CAPS_SEL CYREG_PRT3_CAPS_SEL
+#define SD_MOSI__PRTDSI__DBL_SYNC_IN CYREG_PRT3_DBL_SYNC_IN
+#define SD_MOSI__PRTDSI__OE_SEL0 CYREG_PRT3_OE_SEL0
+#define SD_MOSI__PRTDSI__OE_SEL1 CYREG_PRT3_OE_SEL1
+#define SD_MOSI__PRTDSI__OUT_SEL0 CYREG_PRT3_OUT_SEL0
+#define SD_MOSI__PRTDSI__OUT_SEL1 CYREG_PRT3_OUT_SEL1
+#define SD_MOSI__PRTDSI__SYNC_OUT CYREG_PRT3_SYNC_OUT
+#define SD_MOSI__PS CYREG_PRT3_PS
+#define SD_MOSI__SHIFT 4u
+#define SD_MOSI__SLW CYREG_PRT3_SLW
+
+/* TERM_EN */
+#define TERM_EN__0__INTTYPE CYREG_PICU15_INTTYPE3
+#define TERM_EN__0__MASK 0x08u
+#define TERM_EN__0__PC CYREG_IO_PC_PRT15_PC3
+#define TERM_EN__0__PORT 15u
+#define TERM_EN__0__SHIFT 3u
+#define TERM_EN__AG CYREG_PRT15_AG
+#define TERM_EN__AMUX CYREG_PRT15_AMUX
+#define TERM_EN__BIE CYREG_PRT15_BIE
+#define TERM_EN__BIT_MASK CYREG_PRT15_BIT_MASK
+#define TERM_EN__BYP CYREG_PRT15_BYP
+#define TERM_EN__CTL CYREG_PRT15_CTL
+#define TERM_EN__DM0 CYREG_PRT15_DM0
+#define TERM_EN__DM1 CYREG_PRT15_DM1
+#define TERM_EN__DM2 CYREG_PRT15_DM2
+#define TERM_EN__DR CYREG_PRT15_DR
+#define TERM_EN__INP_DIS CYREG_PRT15_INP_DIS
+#define TERM_EN__INTTYPE_BASE CYDEV_PICU_INTTYPE_PICU15_BASE
+#define TERM_EN__LCD_COM_SEG CYREG_PRT15_LCD_COM_SEG
+#define TERM_EN__LCD_EN CYREG_PRT15_LCD_EN
+#define TERM_EN__MASK 0x08u
+#define TERM_EN__PORT 15u
+#define TERM_EN__PRT CYREG_PRT15_PRT
+#define TERM_EN__PRTDSI__CAPS_SEL CYREG_PRT15_CAPS_SEL
+#define TERM_EN__PRTDSI__DBL_SYNC_IN CYREG_PRT15_DBL_SYNC_IN
+#define TERM_EN__PRTDSI__OE_SEL0 CYREG_PRT15_OE_SEL0
+#define TERM_EN__PRTDSI__OE_SEL1 CYREG_PRT15_OE_SEL1
+#define TERM_EN__PRTDSI__OUT_SEL0 CYREG_PRT15_OUT_SEL0
+#define TERM_EN__PRTDSI__OUT_SEL1 CYREG_PRT15_OUT_SEL1
+#define TERM_EN__PRTDSI__SYNC_OUT CYREG_PRT15_SYNC_OUT
+#define TERM_EN__PS CYREG_PRT15_PS
+#define TERM_EN__SHIFT 3u
+#define TERM_EN__SLW CYREG_PRT15_SLW
+
+/* SCSI_CLK */
+#define SCSI_CLK__CFG0 CYREG_CLKDIST_DCFG1_CFG0
+#define SCSI_CLK__CFG1 CYREG_CLKDIST_DCFG1_CFG1
+#define SCSI_CLK__CFG2 CYREG_CLKDIST_DCFG1_CFG2
+#define SCSI_CLK__CFG2_SRC_SEL_MASK 0x07u
+#define SCSI_CLK__INDEX 0x01u
+#define SCSI_CLK__PM_ACT_CFG CYREG_PM_ACT_CFG2
+#define SCSI_CLK__PM_ACT_MSK 0x02u
+#define SCSI_CLK__PM_STBY_CFG CYREG_PM_STBY_CFG2
+#define SCSI_CLK__PM_STBY_MSK 0x02u
+
+/* SCSI_Out */
+#define SCSI_Out__0__AG CYREG_PRT6_AG
+#define SCSI_Out__0__AMUX CYREG_PRT6_AMUX
+#define SCSI_Out__0__BIE CYREG_PRT6_BIE
+#define SCSI_Out__0__BIT_MASK CYREG_PRT6_BIT_MASK
+#define SCSI_Out__0__BYP CYREG_PRT6_BYP
+#define SCSI_Out__0__CTL CYREG_PRT6_CTL
+#define SCSI_Out__0__DM0 CYREG_PRT6_DM0
+#define SCSI_Out__0__DM1 CYREG_PRT6_DM1
+#define SCSI_Out__0__DM2 CYREG_PRT6_DM2
+#define SCSI_Out__0__DR CYREG_PRT6_DR
+#define SCSI_Out__0__INP_DIS CYREG_PRT6_INP_DIS
+#define SCSI_Out__0__INTTYPE CYREG_PICU6_INTTYPE2
+#define SCSI_Out__0__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
+#define SCSI_Out__0__LCD_EN CYREG_PRT6_LCD_EN
+#define SCSI_Out__0__MASK 0x04u
+#define SCSI_Out__0__PC CYREG_PRT6_PC2
+#define SCSI_Out__0__PORT 6u
+#define SCSI_Out__0__PRT CYREG_PRT6_PRT
+#define SCSI_Out__0__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
+#define SCSI_Out__0__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
+#define SCSI_Out__0__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
+#define SCSI_Out__0__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
+#define SCSI_Out__0__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
+#define SCSI_Out__0__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
+#define SCSI_Out__0__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
+#define SCSI_Out__0__PS CYREG_PRT6_PS
+#define SCSI_Out__0__SHIFT 2u
+#define SCSI_Out__0__SLW CYREG_PRT6_SLW
+#define SCSI_Out__1__AG CYREG_PRT4_AG
+#define SCSI_Out__1__AMUX CYREG_PRT4_AMUX
+#define SCSI_Out__1__BIE CYREG_PRT4_BIE
+#define SCSI_Out__1__BIT_MASK CYREG_PRT4_BIT_MASK
+#define SCSI_Out__1__BYP CYREG_PRT4_BYP
+#define SCSI_Out__1__CTL CYREG_PRT4_CTL
+#define SCSI_Out__1__DM0 CYREG_PRT4_DM0
+#define SCSI_Out__1__DM1 CYREG_PRT4_DM1
+#define SCSI_Out__1__DM2 CYREG_PRT4_DM2
+#define SCSI_Out__1__DR CYREG_PRT4_DR
+#define SCSI_Out__1__INP_DIS CYREG_PRT4_INP_DIS
+#define SCSI_Out__1__INTTYPE CYREG_PICU4_INTTYPE6
+#define SCSI_Out__1__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG
+#define SCSI_Out__1__LCD_EN CYREG_PRT4_LCD_EN
+#define SCSI_Out__1__MASK 0x40u
+#define SCSI_Out__1__PC CYREG_PRT4_PC6
+#define SCSI_Out__1__PORT 4u
+#define SCSI_Out__1__PRT CYREG_PRT4_PRT
+#define SCSI_Out__1__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL
+#define SCSI_Out__1__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN
+#define SCSI_Out__1__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0
+#define SCSI_Out__1__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1
+#define SCSI_Out__1__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0
+#define SCSI_Out__1__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1
+#define SCSI_Out__1__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT
+#define SCSI_Out__1__PS CYREG_PRT4_PS
+#define SCSI_Out__1__SHIFT 6u
+#define SCSI_Out__1__SLW CYREG_PRT4_SLW
+#define SCSI_Out__2__AG CYREG_PRT0_AG
+#define SCSI_Out__2__AMUX CYREG_PRT0_AMUX
+#define SCSI_Out__2__BIE CYREG_PRT0_BIE
+#define SCSI_Out__2__BIT_MASK CYREG_PRT0_BIT_MASK
+#define SCSI_Out__2__BYP CYREG_PRT0_BYP
+#define SCSI_Out__2__CTL CYREG_PRT0_CTL
+#define SCSI_Out__2__DM0 CYREG_PRT0_DM0
+#define SCSI_Out__2__DM1 CYREG_PRT0_DM1
+#define SCSI_Out__2__DM2 CYREG_PRT0_DM2
+#define SCSI_Out__2__DR CYREG_PRT0_DR
+#define SCSI_Out__2__INP_DIS CYREG_PRT0_INP_DIS
+#define SCSI_Out__2__INTTYPE CYREG_PICU0_INTTYPE7
+#define SCSI_Out__2__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
+#define SCSI_Out__2__LCD_EN CYREG_PRT0_LCD_EN
+#define SCSI_Out__2__MASK 0x80u
+#define SCSI_Out__2__PC CYREG_PRT0_PC7
+#define SCSI_Out__2__PORT 0u
+#define SCSI_Out__2__PRT CYREG_PRT0_PRT
+#define SCSI_Out__2__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
+#define SCSI_Out__2__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
+#define SCSI_Out__2__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
+#define SCSI_Out__2__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
+#define SCSI_Out__2__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
+#define SCSI_Out__2__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
+#define SCSI_Out__2__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
+#define SCSI_Out__2__PS CYREG_PRT0_PS
+#define SCSI_Out__2__SHIFT 7u
+#define SCSI_Out__2__SLW CYREG_PRT0_SLW
+#define SCSI_Out__3__AG CYREG_PRT0_AG
+#define SCSI_Out__3__AMUX CYREG_PRT0_AMUX
+#define SCSI_Out__3__BIE CYREG_PRT0_BIE
+#define SCSI_Out__3__BIT_MASK CYREG_PRT0_BIT_MASK
+#define SCSI_Out__3__BYP CYREG_PRT0_BYP
+#define SCSI_Out__3__CTL CYREG_PRT0_CTL
+#define SCSI_Out__3__DM0 CYREG_PRT0_DM0
+#define SCSI_Out__3__DM1 CYREG_PRT0_DM1
+#define SCSI_Out__3__DM2 CYREG_PRT0_DM2
+#define SCSI_Out__3__DR CYREG_PRT0_DR
+#define SCSI_Out__3__INP_DIS CYREG_PRT0_INP_DIS
+#define SCSI_Out__3__INTTYPE CYREG_PICU0_INTTYPE5
+#define SCSI_Out__3__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
+#define SCSI_Out__3__LCD_EN CYREG_PRT0_LCD_EN
+#define SCSI_Out__3__MASK 0x20u
+#define SCSI_Out__3__PC CYREG_PRT0_PC5
+#define SCSI_Out__3__PORT 0u
+#define SCSI_Out__3__PRT CYREG_PRT0_PRT
+#define SCSI_Out__3__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
+#define SCSI_Out__3__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
+#define SCSI_Out__3__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
+#define SCSI_Out__3__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
+#define SCSI_Out__3__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
+#define SCSI_Out__3__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
+#define SCSI_Out__3__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
+#define SCSI_Out__3__PS CYREG_PRT0_PS
+#define SCSI_Out__3__SHIFT 5u
+#define SCSI_Out__3__SLW CYREG_PRT0_SLW
+#define SCSI_Out__4__AG CYREG_PRT0_AG
+#define SCSI_Out__4__AMUX CYREG_PRT0_AMUX
+#define SCSI_Out__4__BIE CYREG_PRT0_BIE
+#define SCSI_Out__4__BIT_MASK CYREG_PRT0_BIT_MASK
+#define SCSI_Out__4__BYP CYREG_PRT0_BYP
+#define SCSI_Out__4__CTL CYREG_PRT0_CTL
+#define SCSI_Out__4__DM0 CYREG_PRT0_DM0
+#define SCSI_Out__4__DM1 CYREG_PRT0_DM1
+#define SCSI_Out__4__DM2 CYREG_PRT0_DM2
+#define SCSI_Out__4__DR CYREG_PRT0_DR
+#define SCSI_Out__4__INP_DIS CYREG_PRT0_INP_DIS
+#define SCSI_Out__4__INTTYPE CYREG_PICU0_INTTYPE3
+#define SCSI_Out__4__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
+#define SCSI_Out__4__LCD_EN CYREG_PRT0_LCD_EN
+#define SCSI_Out__4__MASK 0x08u
+#define SCSI_Out__4__PC CYREG_PRT0_PC3
+#define SCSI_Out__4__PORT 0u
+#define SCSI_Out__4__PRT CYREG_PRT0_PRT
+#define SCSI_Out__4__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
+#define SCSI_Out__4__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
+#define SCSI_Out__4__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
+#define SCSI_Out__4__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
+#define SCSI_Out__4__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
+#define SCSI_Out__4__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
+#define SCSI_Out__4__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
+#define SCSI_Out__4__PS CYREG_PRT0_PS
+#define SCSI_Out__4__SHIFT 3u
+#define SCSI_Out__4__SLW CYREG_PRT0_SLW
+#define SCSI_Out__5__AG CYREG_PRT0_AG
+#define SCSI_Out__5__AMUX CYREG_PRT0_AMUX
+#define SCSI_Out__5__BIE CYREG_PRT0_BIE
+#define SCSI_Out__5__BIT_MASK CYREG_PRT0_BIT_MASK
+#define SCSI_Out__5__BYP CYREG_PRT0_BYP
+#define SCSI_Out__5__CTL CYREG_PRT0_CTL
+#define SCSI_Out__5__DM0 CYREG_PRT0_DM0
+#define SCSI_Out__5__DM1 CYREG_PRT0_DM1
+#define SCSI_Out__5__DM2 CYREG_PRT0_DM2
+#define SCSI_Out__5__DR CYREG_PRT0_DR
+#define SCSI_Out__5__INP_DIS CYREG_PRT0_INP_DIS
+#define SCSI_Out__5__INTTYPE CYREG_PICU0_INTTYPE1
+#define SCSI_Out__5__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
+#define SCSI_Out__5__LCD_EN CYREG_PRT0_LCD_EN
+#define SCSI_Out__5__MASK 0x02u
+#define SCSI_Out__5__PC CYREG_PRT0_PC1
+#define SCSI_Out__5__PORT 0u
+#define SCSI_Out__5__PRT CYREG_PRT0_PRT
+#define SCSI_Out__5__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
+#define SCSI_Out__5__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
+#define SCSI_Out__5__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
+#define SCSI_Out__5__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
+#define SCSI_Out__5__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
+#define SCSI_Out__5__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
+#define SCSI_Out__5__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
+#define SCSI_Out__5__PS CYREG_PRT0_PS
+#define SCSI_Out__5__SHIFT 1u
+#define SCSI_Out__5__SLW CYREG_PRT0_SLW
+#define SCSI_Out__6__AG CYREG_PRT4_AG
+#define SCSI_Out__6__AMUX CYREG_PRT4_AMUX
+#define SCSI_Out__6__BIE CYREG_PRT4_BIE
+#define SCSI_Out__6__BIT_MASK CYREG_PRT4_BIT_MASK
+#define SCSI_Out__6__BYP CYREG_PRT4_BYP
+#define SCSI_Out__6__CTL CYREG_PRT4_CTL
+#define SCSI_Out__6__DM0 CYREG_PRT4_DM0
+#define SCSI_Out__6__DM1 CYREG_PRT4_DM1
+#define SCSI_Out__6__DM2 CYREG_PRT4_DM2
+#define SCSI_Out__6__DR CYREG_PRT4_DR
+#define SCSI_Out__6__INP_DIS CYREG_PRT4_INP_DIS
+#define SCSI_Out__6__INTTYPE CYREG_PICU4_INTTYPE1
+#define SCSI_Out__6__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG
+#define SCSI_Out__6__LCD_EN CYREG_PRT4_LCD_EN
+#define SCSI_Out__6__MASK 0x02u
+#define SCSI_Out__6__PC CYREG_PRT4_PC1
+#define SCSI_Out__6__PORT 4u
+#define SCSI_Out__6__PRT CYREG_PRT4_PRT
+#define SCSI_Out__6__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL
+#define SCSI_Out__6__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN
+#define SCSI_Out__6__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0
+#define SCSI_Out__6__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1
+#define SCSI_Out__6__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0
+#define SCSI_Out__6__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1
+#define SCSI_Out__6__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT
+#define SCSI_Out__6__PS CYREG_PRT4_PS
+#define SCSI_Out__6__SHIFT 1u
+#define SCSI_Out__6__SLW CYREG_PRT4_SLW
+#define SCSI_Out__7__AG CYREG_PRT12_AG
+#define SCSI_Out__7__BIE CYREG_PRT12_BIE
+#define SCSI_Out__7__BIT_MASK CYREG_PRT12_BIT_MASK
+#define SCSI_Out__7__BYP CYREG_PRT12_BYP
+#define SCSI_Out__7__DM0 CYREG_PRT12_DM0
+#define SCSI_Out__7__DM1 CYREG_PRT12_DM1
+#define SCSI_Out__7__DM2 CYREG_PRT12_DM2
+#define SCSI_Out__7__DR CYREG_PRT12_DR
+#define SCSI_Out__7__INP_DIS CYREG_PRT12_INP_DIS
+#define SCSI_Out__7__INTTYPE CYREG_PICU12_INTTYPE3
+#define SCSI_Out__7__MASK 0x08u
+#define SCSI_Out__7__PC CYREG_PRT12_PC3
+#define SCSI_Out__7__PORT 12u
+#define SCSI_Out__7__PRT CYREG_PRT12_PRT
+#define SCSI_Out__7__PRTDSI__DBL_SYNC_IN CYREG_PRT12_DBL_SYNC_IN
+#define SCSI_Out__7__PRTDSI__OE_SEL0 CYREG_PRT12_OE_SEL0
+#define SCSI_Out__7__PRTDSI__OE_SEL1 CYREG_PRT12_OE_SEL1
+#define SCSI_Out__7__PRTDSI__OUT_SEL0 CYREG_PRT12_OUT_SEL0
+#define SCSI_Out__7__PRTDSI__OUT_SEL1 CYREG_PRT12_OUT_SEL1
+#define SCSI_Out__7__PRTDSI__SYNC_OUT CYREG_PRT12_SYNC_OUT
+#define SCSI_Out__7__PS CYREG_PRT12_PS
+#define SCSI_Out__7__SHIFT 3u
+#define SCSI_Out__7__SIO_CFG CYREG_PRT12_SIO_CFG
+#define SCSI_Out__7__SIO_DIFF CYREG_PRT12_SIO_DIFF
+#define SCSI_Out__7__SIO_HYST_EN CYREG_PRT12_SIO_HYST_EN
+#define SCSI_Out__7__SIO_REG_HIFREQ CYREG_PRT12_SIO_REG_HIFREQ
+#define SCSI_Out__7__SLW CYREG_PRT12_SLW
+#define SCSI_Out__BSY__AG CYREG_PRT4_AG
+#define SCSI_Out__BSY__AMUX CYREG_PRT4_AMUX
+#define SCSI_Out__BSY__BIE CYREG_PRT4_BIE
+#define SCSI_Out__BSY__BIT_MASK CYREG_PRT4_BIT_MASK
+#define SCSI_Out__BSY__BYP CYREG_PRT4_BYP
+#define SCSI_Out__BSY__CTL CYREG_PRT4_CTL
+#define SCSI_Out__BSY__DM0 CYREG_PRT4_DM0
+#define SCSI_Out__BSY__DM1 CYREG_PRT4_DM1
+#define SCSI_Out__BSY__DM2 CYREG_PRT4_DM2
+#define SCSI_Out__BSY__DR CYREG_PRT4_DR
+#define SCSI_Out__BSY__INP_DIS CYREG_PRT4_INP_DIS
+#define SCSI_Out__BSY__INTTYPE CYREG_PICU4_INTTYPE6
+#define SCSI_Out__BSY__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG
+#define SCSI_Out__BSY__LCD_EN CYREG_PRT4_LCD_EN
+#define SCSI_Out__BSY__MASK 0x40u
+#define SCSI_Out__BSY__PC CYREG_PRT4_PC6
+#define SCSI_Out__BSY__PORT 4u
+#define SCSI_Out__BSY__PRT CYREG_PRT4_PRT
+#define SCSI_Out__BSY__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL
+#define SCSI_Out__BSY__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN
+#define SCSI_Out__BSY__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0
+#define SCSI_Out__BSY__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1
+#define SCSI_Out__BSY__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0
+#define SCSI_Out__BSY__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1
+#define SCSI_Out__BSY__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT
+#define SCSI_Out__BSY__PS CYREG_PRT4_PS
+#define SCSI_Out__BSY__SHIFT 6u
+#define SCSI_Out__BSY__SLW CYREG_PRT4_SLW
+#define SCSI_Out__CD_raw__AG CYREG_PRT0_AG
+#define SCSI_Out__CD_raw__AMUX CYREG_PRT0_AMUX
+#define SCSI_Out__CD_raw__BIE CYREG_PRT0_BIE
+#define SCSI_Out__CD_raw__BIT_MASK CYREG_PRT0_BIT_MASK
+#define SCSI_Out__CD_raw__BYP CYREG_PRT0_BYP
+#define SCSI_Out__CD_raw__CTL CYREG_PRT0_CTL
+#define SCSI_Out__CD_raw__DM0 CYREG_PRT0_DM0
+#define SCSI_Out__CD_raw__DM1 CYREG_PRT0_DM1
+#define SCSI_Out__CD_raw__DM2 CYREG_PRT0_DM2
+#define SCSI_Out__CD_raw__DR CYREG_PRT0_DR
+#define SCSI_Out__CD_raw__INP_DIS CYREG_PRT0_INP_DIS
+#define SCSI_Out__CD_raw__INTTYPE CYREG_PICU0_INTTYPE1
+#define SCSI_Out__CD_raw__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
+#define SCSI_Out__CD_raw__LCD_EN CYREG_PRT0_LCD_EN
+#define SCSI_Out__CD_raw__MASK 0x02u
+#define SCSI_Out__CD_raw__PC CYREG_PRT0_PC1
+#define SCSI_Out__CD_raw__PORT 0u
+#define SCSI_Out__CD_raw__PRT CYREG_PRT0_PRT
+#define SCSI_Out__CD_raw__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
+#define SCSI_Out__CD_raw__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
+#define SCSI_Out__CD_raw__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
+#define SCSI_Out__CD_raw__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
+#define SCSI_Out__CD_raw__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
+#define SCSI_Out__CD_raw__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
+#define SCSI_Out__CD_raw__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
+#define SCSI_Out__CD_raw__PS CYREG_PRT0_PS
+#define SCSI_Out__CD_raw__SHIFT 1u
+#define SCSI_Out__CD_raw__SLW CYREG_PRT0_SLW
+#define SCSI_Out__DBP_raw__AG CYREG_PRT6_AG
+#define SCSI_Out__DBP_raw__AMUX CYREG_PRT6_AMUX
+#define SCSI_Out__DBP_raw__BIE CYREG_PRT6_BIE
+#define SCSI_Out__DBP_raw__BIT_MASK CYREG_PRT6_BIT_MASK
+#define SCSI_Out__DBP_raw__BYP CYREG_PRT6_BYP
+#define SCSI_Out__DBP_raw__CTL CYREG_PRT6_CTL
+#define SCSI_Out__DBP_raw__DM0 CYREG_PRT6_DM0
+#define SCSI_Out__DBP_raw__DM1 CYREG_PRT6_DM1
+#define SCSI_Out__DBP_raw__DM2 CYREG_PRT6_DM2
+#define SCSI_Out__DBP_raw__DR CYREG_PRT6_DR
+#define SCSI_Out__DBP_raw__INP_DIS CYREG_PRT6_INP_DIS
+#define SCSI_Out__DBP_raw__INTTYPE CYREG_PICU6_INTTYPE2
+#define SCSI_Out__DBP_raw__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
+#define SCSI_Out__DBP_raw__LCD_EN CYREG_PRT6_LCD_EN
+#define SCSI_Out__DBP_raw__MASK 0x04u
+#define SCSI_Out__DBP_raw__PC CYREG_PRT6_PC2
+#define SCSI_Out__DBP_raw__PORT 6u
+#define SCSI_Out__DBP_raw__PRT CYREG_PRT6_PRT
+#define SCSI_Out__DBP_raw__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
+#define SCSI_Out__DBP_raw__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
+#define SCSI_Out__DBP_raw__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
+#define SCSI_Out__DBP_raw__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
+#define SCSI_Out__DBP_raw__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
+#define SCSI_Out__DBP_raw__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
+#define SCSI_Out__DBP_raw__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
+#define SCSI_Out__DBP_raw__PS CYREG_PRT6_PS
+#define SCSI_Out__DBP_raw__SHIFT 2u
+#define SCSI_Out__DBP_raw__SLW CYREG_PRT6_SLW
+#define SCSI_Out__IO_raw__AG CYREG_PRT12_AG
+#define SCSI_Out__IO_raw__BIE CYREG_PRT12_BIE
+#define SCSI_Out__IO_raw__BIT_MASK CYREG_PRT12_BIT_MASK
+#define SCSI_Out__IO_raw__BYP CYREG_PRT12_BYP
+#define SCSI_Out__IO_raw__DM0 CYREG_PRT12_DM0
+#define SCSI_Out__IO_raw__DM1 CYREG_PRT12_DM1
+#define SCSI_Out__IO_raw__DM2 CYREG_PRT12_DM2
+#define SCSI_Out__IO_raw__DR CYREG_PRT12_DR
+#define SCSI_Out__IO_raw__INP_DIS CYREG_PRT12_INP_DIS
+#define SCSI_Out__IO_raw__INTTYPE CYREG_PICU12_INTTYPE3
+#define SCSI_Out__IO_raw__MASK 0x08u
+#define SCSI_Out__IO_raw__PC CYREG_PRT12_PC3
+#define SCSI_Out__IO_raw__PORT 12u
+#define SCSI_Out__IO_raw__PRT CYREG_PRT12_PRT
+#define SCSI_Out__IO_raw__PRTDSI__DBL_SYNC_IN CYREG_PRT12_DBL_SYNC_IN
+#define SCSI_Out__IO_raw__PRTDSI__OE_SEL0 CYREG_PRT12_OE_SEL0
+#define SCSI_Out__IO_raw__PRTDSI__OE_SEL1 CYREG_PRT12_OE_SEL1
+#define SCSI_Out__IO_raw__PRTDSI__OUT_SEL0 CYREG_PRT12_OUT_SEL0
+#define SCSI_Out__IO_raw__PRTDSI__OUT_SEL1 CYREG_PRT12_OUT_SEL1
+#define SCSI_Out__IO_raw__PRTDSI__SYNC_OUT CYREG_PRT12_SYNC_OUT
+#define SCSI_Out__IO_raw__PS CYREG_PRT12_PS
+#define SCSI_Out__IO_raw__SHIFT 3u
+#define SCSI_Out__IO_raw__SIO_CFG CYREG_PRT12_SIO_CFG
+#define SCSI_Out__IO_raw__SIO_DIFF CYREG_PRT12_SIO_DIFF
+#define SCSI_Out__IO_raw__SIO_HYST_EN CYREG_PRT12_SIO_HYST_EN
+#define SCSI_Out__IO_raw__SIO_REG_HIFREQ CYREG_PRT12_SIO_REG_HIFREQ
+#define SCSI_Out__IO_raw__SLW CYREG_PRT12_SLW
+#define SCSI_Out__MSG_raw__AG CYREG_PRT0_AG
+#define SCSI_Out__MSG_raw__AMUX CYREG_PRT0_AMUX
+#define SCSI_Out__MSG_raw__BIE CYREG_PRT0_BIE
+#define SCSI_Out__MSG_raw__BIT_MASK CYREG_PRT0_BIT_MASK
+#define SCSI_Out__MSG_raw__BYP CYREG_PRT0_BYP
+#define SCSI_Out__MSG_raw__CTL CYREG_PRT0_CTL
+#define SCSI_Out__MSG_raw__DM0 CYREG_PRT0_DM0
+#define SCSI_Out__MSG_raw__DM1 CYREG_PRT0_DM1
+#define SCSI_Out__MSG_raw__DM2 CYREG_PRT0_DM2
+#define SCSI_Out__MSG_raw__DR CYREG_PRT0_DR
+#define SCSI_Out__MSG_raw__INP_DIS CYREG_PRT0_INP_DIS
+#define SCSI_Out__MSG_raw__INTTYPE CYREG_PICU0_INTTYPE5
+#define SCSI_Out__MSG_raw__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
+#define SCSI_Out__MSG_raw__LCD_EN CYREG_PRT0_LCD_EN
+#define SCSI_Out__MSG_raw__MASK 0x20u
+#define SCSI_Out__MSG_raw__PC CYREG_PRT0_PC5
+#define SCSI_Out__MSG_raw__PORT 0u
+#define SCSI_Out__MSG_raw__PRT CYREG_PRT0_PRT
+#define SCSI_Out__MSG_raw__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
+#define SCSI_Out__MSG_raw__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
+#define SCSI_Out__MSG_raw__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
+#define SCSI_Out__MSG_raw__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
+#define SCSI_Out__MSG_raw__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
+#define SCSI_Out__MSG_raw__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
+#define SCSI_Out__MSG_raw__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
+#define SCSI_Out__MSG_raw__PS CYREG_PRT0_PS
+#define SCSI_Out__MSG_raw__SHIFT 5u
+#define SCSI_Out__MSG_raw__SLW CYREG_PRT0_SLW
+#define SCSI_Out__REQ__AG CYREG_PRT4_AG
+#define SCSI_Out__REQ__AMUX CYREG_PRT4_AMUX
+#define SCSI_Out__REQ__BIE CYREG_PRT4_BIE
+#define SCSI_Out__REQ__BIT_MASK CYREG_PRT4_BIT_MASK
+#define SCSI_Out__REQ__BYP CYREG_PRT4_BYP
+#define SCSI_Out__REQ__CTL CYREG_PRT4_CTL
+#define SCSI_Out__REQ__DM0 CYREG_PRT4_DM0
+#define SCSI_Out__REQ__DM1 CYREG_PRT4_DM1
+#define SCSI_Out__REQ__DM2 CYREG_PRT4_DM2
+#define SCSI_Out__REQ__DR CYREG_PRT4_DR
+#define SCSI_Out__REQ__INP_DIS CYREG_PRT4_INP_DIS
+#define SCSI_Out__REQ__INTTYPE CYREG_PICU4_INTTYPE1
+#define SCSI_Out__REQ__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG
+#define SCSI_Out__REQ__LCD_EN CYREG_PRT4_LCD_EN
+#define SCSI_Out__REQ__MASK 0x02u
+#define SCSI_Out__REQ__PC CYREG_PRT4_PC1
+#define SCSI_Out__REQ__PORT 4u
+#define SCSI_Out__REQ__PRT CYREG_PRT4_PRT
+#define SCSI_Out__REQ__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL
+#define SCSI_Out__REQ__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN
+#define SCSI_Out__REQ__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0
+#define SCSI_Out__REQ__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1
+#define SCSI_Out__REQ__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0
+#define SCSI_Out__REQ__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1
+#define SCSI_Out__REQ__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT
+#define SCSI_Out__REQ__PS CYREG_PRT4_PS
+#define SCSI_Out__REQ__SHIFT 1u
+#define SCSI_Out__REQ__SLW CYREG_PRT4_SLW
+#define SCSI_Out__RST__AG CYREG_PRT0_AG
+#define SCSI_Out__RST__AMUX CYREG_PRT0_AMUX
+#define SCSI_Out__RST__BIE CYREG_PRT0_BIE
+#define SCSI_Out__RST__BIT_MASK CYREG_PRT0_BIT_MASK
+#define SCSI_Out__RST__BYP CYREG_PRT0_BYP
+#define SCSI_Out__RST__CTL CYREG_PRT0_CTL
+#define SCSI_Out__RST__DM0 CYREG_PRT0_DM0
+#define SCSI_Out__RST__DM1 CYREG_PRT0_DM1
+#define SCSI_Out__RST__DM2 CYREG_PRT0_DM2
+#define SCSI_Out__RST__DR CYREG_PRT0_DR
+#define SCSI_Out__RST__INP_DIS CYREG_PRT0_INP_DIS
+#define SCSI_Out__RST__INTTYPE CYREG_PICU0_INTTYPE7
+#define SCSI_Out__RST__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
+#define SCSI_Out__RST__LCD_EN CYREG_PRT0_LCD_EN
+#define SCSI_Out__RST__MASK 0x80u
+#define SCSI_Out__RST__PC CYREG_PRT0_PC7
+#define SCSI_Out__RST__PORT 0u
+#define SCSI_Out__RST__PRT CYREG_PRT0_PRT
+#define SCSI_Out__RST__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
+#define SCSI_Out__RST__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
+#define SCSI_Out__RST__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
+#define SCSI_Out__RST__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
+#define SCSI_Out__RST__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
+#define SCSI_Out__RST__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
+#define SCSI_Out__RST__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
+#define SCSI_Out__RST__PS CYREG_PRT0_PS
+#define SCSI_Out__RST__SHIFT 7u
+#define SCSI_Out__RST__SLW CYREG_PRT0_SLW
+#define SCSI_Out__SEL__AG CYREG_PRT0_AG
+#define SCSI_Out__SEL__AMUX CYREG_PRT0_AMUX
+#define SCSI_Out__SEL__BIE CYREG_PRT0_BIE
+#define SCSI_Out__SEL__BIT_MASK CYREG_PRT0_BIT_MASK
+#define SCSI_Out__SEL__BYP CYREG_PRT0_BYP
+#define SCSI_Out__SEL__CTL CYREG_PRT0_CTL
+#define SCSI_Out__SEL__DM0 CYREG_PRT0_DM0
+#define SCSI_Out__SEL__DM1 CYREG_PRT0_DM1
+#define SCSI_Out__SEL__DM2 CYREG_PRT0_DM2
+#define SCSI_Out__SEL__DR CYREG_PRT0_DR
+#define SCSI_Out__SEL__INP_DIS CYREG_PRT0_INP_DIS
+#define SCSI_Out__SEL__INTTYPE CYREG_PICU0_INTTYPE3
+#define SCSI_Out__SEL__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
+#define SCSI_Out__SEL__LCD_EN CYREG_PRT0_LCD_EN
+#define SCSI_Out__SEL__MASK 0x08u
+#define SCSI_Out__SEL__PC CYREG_PRT0_PC3
+#define SCSI_Out__SEL__PORT 0u
+#define SCSI_Out__SEL__PRT CYREG_PRT0_PRT
+#define SCSI_Out__SEL__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
+#define SCSI_Out__SEL__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
+#define SCSI_Out__SEL__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
+#define SCSI_Out__SEL__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
+#define SCSI_Out__SEL__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
+#define SCSI_Out__SEL__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
+#define SCSI_Out__SEL__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
+#define SCSI_Out__SEL__PS CYREG_PRT0_PS
+#define SCSI_Out__SEL__SHIFT 3u
+#define SCSI_Out__SEL__SLW CYREG_PRT0_SLW
+#define SCSI_Out_Bits_Sync_ctrl_reg__0__MASK 0x01u
+#define SCSI_Out_Bits_Sync_ctrl_reg__0__POS 0
+#define SCSI_Out_Bits_Sync_ctrl_reg__1__MASK 0x02u
+#define SCSI_Out_Bits_Sync_ctrl_reg__1__POS 1
+#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG CYREG_B0_UDB07_08_ACTL
+#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG CYREG_B0_UDB07_08_CTL
+#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG CYREG_B0_UDB07_08_CTL
+#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG CYREG_B0_UDB07_08_CTL
+#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG CYREG_B0_UDB07_08_CTL
+#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_MASK_REG CYREG_B0_UDB07_08_MSK
+#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG CYREG_B0_UDB07_08_MSK
+#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG CYREG_B0_UDB07_08_MSK
+#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG CYREG_B0_UDB07_08_MSK
+#define SCSI_Out_Bits_Sync_ctrl_reg__2__MASK 0x04u
+#define SCSI_Out_Bits_Sync_ctrl_reg__2__POS 2
+#define SCSI_Out_Bits_Sync_ctrl_reg__3__MASK 0x08u
+#define SCSI_Out_Bits_Sync_ctrl_reg__3__POS 3
+#define SCSI_Out_Bits_Sync_ctrl_reg__4__MASK 0x10u
+#define SCSI_Out_Bits_Sync_ctrl_reg__4__POS 4
+#define SCSI_Out_Bits_Sync_ctrl_reg__5__MASK 0x20u
+#define SCSI_Out_Bits_Sync_ctrl_reg__5__POS 5
+#define SCSI_Out_Bits_Sync_ctrl_reg__6__MASK 0x40u
+#define SCSI_Out_Bits_Sync_ctrl_reg__6__POS 6
+#define SCSI_Out_Bits_Sync_ctrl_reg__7__MASK 0x80u
+#define SCSI_Out_Bits_Sync_ctrl_reg__7__POS 7
+#define SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_AUX_CTL_REG CYREG_B0_UDB07_ACTL
+#define SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_REG CYREG_B0_UDB07_CTL
+#define SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_ST_REG CYREG_B0_UDB07_ST_CTL
+#define SCSI_Out_Bits_Sync_ctrl_reg__COUNT_REG CYREG_B0_UDB07_CTL
+#define SCSI_Out_Bits_Sync_ctrl_reg__COUNT_ST_REG CYREG_B0_UDB07_ST_CTL
+#define SCSI_Out_Bits_Sync_ctrl_reg__MASK 0xFFu
+#define SCSI_Out_Bits_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG CYREG_B0_UDB07_MSK_ACTL
+#define SCSI_Out_Bits_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG CYREG_B0_UDB07_MSK_ACTL
+#define SCSI_Out_Bits_Sync_ctrl_reg__PERIOD_REG CYREG_B0_UDB07_MSK
+#define SCSI_Out_Ctl_Sync_ctrl_reg__0__MASK 0x01u
+#define SCSI_Out_Ctl_Sync_ctrl_reg__0__POS 0
+#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG CYREG_B0_UDB11_12_ACTL
+#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG CYREG_B0_UDB11_12_CTL
+#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG CYREG_B0_UDB11_12_CTL
+#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG CYREG_B0_UDB11_12_CTL
+#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG CYREG_B0_UDB11_12_CTL
+#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG CYREG_B0_UDB11_12_MSK
+#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG CYREG_B0_UDB11_12_MSK
+#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG CYREG_B0_UDB11_12_MSK
+#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG CYREG_B0_UDB11_12_MSK
+#define SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG CYREG_B0_UDB11_ACTL
+#define SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_REG CYREG_B0_UDB11_CTL
+#define SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_ST_REG CYREG_B0_UDB11_ST_CTL
+#define SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_REG CYREG_B0_UDB11_CTL
+#define SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_ST_REG CYREG_B0_UDB11_ST_CTL
+#define SCSI_Out_Ctl_Sync_ctrl_reg__MASK 0x01u
+#define SCSI_Out_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG CYREG_B0_UDB11_MSK_ACTL
+#define SCSI_Out_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG CYREG_B0_UDB11_MSK_ACTL
+#define SCSI_Out_Ctl_Sync_ctrl_reg__PERIOD_REG CYREG_B0_UDB11_MSK
+#define SCSI_Out_DBx__0__AG CYREG_PRT6_AG
+#define SCSI_Out_DBx__0__AMUX CYREG_PRT6_AMUX
+#define SCSI_Out_DBx__0__BIE CYREG_PRT6_BIE
+#define SCSI_Out_DBx__0__BIT_MASK CYREG_PRT6_BIT_MASK
+#define SCSI_Out_DBx__0__BYP CYREG_PRT6_BYP
+#define SCSI_Out_DBx__0__CTL CYREG_PRT6_CTL
+#define SCSI_Out_DBx__0__DM0 CYREG_PRT6_DM0
+#define SCSI_Out_DBx__0__DM1 CYREG_PRT6_DM1
+#define SCSI_Out_DBx__0__DM2 CYREG_PRT6_DM2
+#define SCSI_Out_DBx__0__DR CYREG_PRT6_DR
+#define SCSI_Out_DBx__0__INP_DIS CYREG_PRT6_INP_DIS
+#define SCSI_Out_DBx__0__INTTYPE CYREG_PICU6_INTTYPE7
+#define SCSI_Out_DBx__0__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
+#define SCSI_Out_DBx__0__LCD_EN CYREG_PRT6_LCD_EN
+#define SCSI_Out_DBx__0__MASK 0x80u
+#define SCSI_Out_DBx__0__PC CYREG_PRT6_PC7
+#define SCSI_Out_DBx__0__PORT 6u
+#define SCSI_Out_DBx__0__PRT CYREG_PRT6_PRT
+#define SCSI_Out_DBx__0__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
+#define SCSI_Out_DBx__0__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
+#define SCSI_Out_DBx__0__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
+#define SCSI_Out_DBx__0__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
+#define SCSI_Out_DBx__0__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
+#define SCSI_Out_DBx__0__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
+#define SCSI_Out_DBx__0__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
+#define SCSI_Out_DBx__0__PS CYREG_PRT6_PS
+#define SCSI_Out_DBx__0__SHIFT 7u
+#define SCSI_Out_DBx__0__SLW CYREG_PRT6_SLW
+#define SCSI_Out_DBx__1__AG CYREG_PRT6_AG
+#define SCSI_Out_DBx__1__AMUX CYREG_PRT6_AMUX
+#define SCSI_Out_DBx__1__BIE CYREG_PRT6_BIE
+#define SCSI_Out_DBx__1__BIT_MASK CYREG_PRT6_BIT_MASK
+#define SCSI_Out_DBx__1__BYP CYREG_PRT6_BYP
+#define SCSI_Out_DBx__1__CTL CYREG_PRT6_CTL
+#define SCSI_Out_DBx__1__DM0 CYREG_PRT6_DM0
+#define SCSI_Out_DBx__1__DM1 CYREG_PRT6_DM1
+#define SCSI_Out_DBx__1__DM2 CYREG_PRT6_DM2
+#define SCSI_Out_DBx__1__DR CYREG_PRT6_DR
+#define SCSI_Out_DBx__1__INP_DIS CYREG_PRT6_INP_DIS
+#define SCSI_Out_DBx__1__INTTYPE CYREG_PICU6_INTTYPE5
+#define SCSI_Out_DBx__1__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
+#define SCSI_Out_DBx__1__LCD_EN CYREG_PRT6_LCD_EN
+#define SCSI_Out_DBx__1__MASK 0x20u
+#define SCSI_Out_DBx__1__PC CYREG_PRT6_PC5
+#define SCSI_Out_DBx__1__PORT 6u
+#define SCSI_Out_DBx__1__PRT CYREG_PRT6_PRT
+#define SCSI_Out_DBx__1__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
+#define SCSI_Out_DBx__1__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
+#define SCSI_Out_DBx__1__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
+#define SCSI_Out_DBx__1__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
+#define SCSI_Out_DBx__1__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
+#define SCSI_Out_DBx__1__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
+#define SCSI_Out_DBx__1__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
+#define SCSI_Out_DBx__1__PS CYREG_PRT6_PS
+#define SCSI_Out_DBx__1__SHIFT 5u
+#define SCSI_Out_DBx__1__SLW CYREG_PRT6_SLW
+#define SCSI_Out_DBx__2__AG CYREG_PRT12_AG
+#define SCSI_Out_DBx__2__BIE CYREG_PRT12_BIE
+#define SCSI_Out_DBx__2__BIT_MASK CYREG_PRT12_BIT_MASK
+#define SCSI_Out_DBx__2__BYP CYREG_PRT12_BYP
+#define SCSI_Out_DBx__2__DM0 CYREG_PRT12_DM0
+#define SCSI_Out_DBx__2__DM1 CYREG_PRT12_DM1
+#define SCSI_Out_DBx__2__DM2 CYREG_PRT12_DM2
+#define SCSI_Out_DBx__2__DR CYREG_PRT12_DR
+#define SCSI_Out_DBx__2__INP_DIS CYREG_PRT12_INP_DIS
+#define SCSI_Out_DBx__2__INTTYPE CYREG_PICU12_INTTYPE5
+#define SCSI_Out_DBx__2__MASK 0x20u
+#define SCSI_Out_DBx__2__PC CYREG_PRT12_PC5
+#define SCSI_Out_DBx__2__PORT 12u
+#define SCSI_Out_DBx__2__PRT CYREG_PRT12_PRT
+#define SCSI_Out_DBx__2__PRTDSI__DBL_SYNC_IN CYREG_PRT12_DBL_SYNC_IN
+#define SCSI_Out_DBx__2__PRTDSI__OE_SEL0 CYREG_PRT12_OE_SEL0
+#define SCSI_Out_DBx__2__PRTDSI__OE_SEL1 CYREG_PRT12_OE_SEL1
+#define SCSI_Out_DBx__2__PRTDSI__OUT_SEL0 CYREG_PRT12_OUT_SEL0
+#define SCSI_Out_DBx__2__PRTDSI__OUT_SEL1 CYREG_PRT12_OUT_SEL1
+#define SCSI_Out_DBx__2__PRTDSI__SYNC_OUT CYREG_PRT12_SYNC_OUT
+#define SCSI_Out_DBx__2__PS CYREG_PRT12_PS
+#define SCSI_Out_DBx__2__SHIFT 5u
+#define SCSI_Out_DBx__2__SIO_CFG CYREG_PRT12_SIO_CFG
+#define SCSI_Out_DBx__2__SIO_DIFF CYREG_PRT12_SIO_DIFF
+#define SCSI_Out_DBx__2__SIO_HYST_EN CYREG_PRT12_SIO_HYST_EN
+#define SCSI_Out_DBx__2__SIO_REG_HIFREQ CYREG_PRT12_SIO_REG_HIFREQ
+#define SCSI_Out_DBx__2__SLW CYREG_PRT12_SLW
+#define SCSI_Out_DBx__3__AG CYREG_PRT2_AG
+#define SCSI_Out_DBx__3__AMUX CYREG_PRT2_AMUX
+#define SCSI_Out_DBx__3__BIE CYREG_PRT2_BIE
+#define SCSI_Out_DBx__3__BIT_MASK CYREG_PRT2_BIT_MASK
+#define SCSI_Out_DBx__3__BYP CYREG_PRT2_BYP
+#define SCSI_Out_DBx__3__CTL CYREG_PRT2_CTL
+#define SCSI_Out_DBx__3__DM0 CYREG_PRT2_DM0
+#define SCSI_Out_DBx__3__DM1 CYREG_PRT2_DM1
+#define SCSI_Out_DBx__3__DM2 CYREG_PRT2_DM2
+#define SCSI_Out_DBx__3__DR CYREG_PRT2_DR
+#define SCSI_Out_DBx__3__INP_DIS CYREG_PRT2_INP_DIS
+#define SCSI_Out_DBx__3__INTTYPE CYREG_PICU2_INTTYPE7
+#define SCSI_Out_DBx__3__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
+#define SCSI_Out_DBx__3__LCD_EN CYREG_PRT2_LCD_EN
+#define SCSI_Out_DBx__3__MASK 0x80u
+#define SCSI_Out_DBx__3__PC CYREG_PRT2_PC7
+#define SCSI_Out_DBx__3__PORT 2u
+#define SCSI_Out_DBx__3__PRT CYREG_PRT2_PRT
+#define SCSI_Out_DBx__3__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
+#define SCSI_Out_DBx__3__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
+#define SCSI_Out_DBx__3__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
+#define SCSI_Out_DBx__3__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
+#define SCSI_Out_DBx__3__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
+#define SCSI_Out_DBx__3__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
+#define SCSI_Out_DBx__3__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
+#define SCSI_Out_DBx__3__PS CYREG_PRT2_PS
+#define SCSI_Out_DBx__3__SHIFT 7u
+#define SCSI_Out_DBx__3__SLW CYREG_PRT2_SLW
+#define SCSI_Out_DBx__4__AG CYREG_PRT2_AG
+#define SCSI_Out_DBx__4__AMUX CYREG_PRT2_AMUX
+#define SCSI_Out_DBx__4__BIE CYREG_PRT2_BIE
+#define SCSI_Out_DBx__4__BIT_MASK CYREG_PRT2_BIT_MASK
+#define SCSI_Out_DBx__4__BYP CYREG_PRT2_BYP
+#define SCSI_Out_DBx__4__CTL CYREG_PRT2_CTL
+#define SCSI_Out_DBx__4__DM0 CYREG_PRT2_DM0
+#define SCSI_Out_DBx__4__DM1 CYREG_PRT2_DM1
+#define SCSI_Out_DBx__4__DM2 CYREG_PRT2_DM2
+#define SCSI_Out_DBx__4__DR CYREG_PRT2_DR
+#define SCSI_Out_DBx__4__INP_DIS CYREG_PRT2_INP_DIS
+#define SCSI_Out_DBx__4__INTTYPE CYREG_PICU2_INTTYPE5
+#define SCSI_Out_DBx__4__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
+#define SCSI_Out_DBx__4__LCD_EN CYREG_PRT2_LCD_EN
+#define SCSI_Out_DBx__4__MASK 0x20u
+#define SCSI_Out_DBx__4__PC CYREG_PRT2_PC5
+#define SCSI_Out_DBx__4__PORT 2u
+#define SCSI_Out_DBx__4__PRT CYREG_PRT2_PRT
+#define SCSI_Out_DBx__4__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
+#define SCSI_Out_DBx__4__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
+#define SCSI_Out_DBx__4__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
+#define SCSI_Out_DBx__4__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
+#define SCSI_Out_DBx__4__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
+#define SCSI_Out_DBx__4__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
+#define SCSI_Out_DBx__4__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
+#define SCSI_Out_DBx__4__PS CYREG_PRT2_PS
+#define SCSI_Out_DBx__4__SHIFT 5u
+#define SCSI_Out_DBx__4__SLW CYREG_PRT2_SLW
+#define SCSI_Out_DBx__5__AG CYREG_PRT2_AG
+#define SCSI_Out_DBx__5__AMUX CYREG_PRT2_AMUX
+#define SCSI_Out_DBx__5__BIE CYREG_PRT2_BIE
+#define SCSI_Out_DBx__5__BIT_MASK CYREG_PRT2_BIT_MASK
+#define SCSI_Out_DBx__5__BYP CYREG_PRT2_BYP
+#define SCSI_Out_DBx__5__CTL CYREG_PRT2_CTL
+#define SCSI_Out_DBx__5__DM0 CYREG_PRT2_DM0
+#define SCSI_Out_DBx__5__DM1 CYREG_PRT2_DM1
+#define SCSI_Out_DBx__5__DM2 CYREG_PRT2_DM2
+#define SCSI_Out_DBx__5__DR CYREG_PRT2_DR
+#define SCSI_Out_DBx__5__INP_DIS CYREG_PRT2_INP_DIS
+#define SCSI_Out_DBx__5__INTTYPE CYREG_PICU2_INTTYPE3
+#define SCSI_Out_DBx__5__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
+#define SCSI_Out_DBx__5__LCD_EN CYREG_PRT2_LCD_EN
+#define SCSI_Out_DBx__5__MASK 0x08u
+#define SCSI_Out_DBx__5__PC CYREG_PRT2_PC3
+#define SCSI_Out_DBx__5__PORT 2u
+#define SCSI_Out_DBx__5__PRT CYREG_PRT2_PRT
+#define SCSI_Out_DBx__5__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
+#define SCSI_Out_DBx__5__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
+#define SCSI_Out_DBx__5__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
+#define SCSI_Out_DBx__5__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
+#define SCSI_Out_DBx__5__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
+#define SCSI_Out_DBx__5__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
+#define SCSI_Out_DBx__5__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
+#define SCSI_Out_DBx__5__PS CYREG_PRT2_PS
+#define SCSI_Out_DBx__5__SHIFT 3u
+#define SCSI_Out_DBx__5__SLW CYREG_PRT2_SLW
+#define SCSI_Out_DBx__6__AG CYREG_PRT2_AG
+#define SCSI_Out_DBx__6__AMUX CYREG_PRT2_AMUX
+#define SCSI_Out_DBx__6__BIE CYREG_PRT2_BIE
+#define SCSI_Out_DBx__6__BIT_MASK CYREG_PRT2_BIT_MASK
+#define SCSI_Out_DBx__6__BYP CYREG_PRT2_BYP
+#define SCSI_Out_DBx__6__CTL CYREG_PRT2_CTL
+#define SCSI_Out_DBx__6__DM0 CYREG_PRT2_DM0
+#define SCSI_Out_DBx__6__DM1 CYREG_PRT2_DM1
+#define SCSI_Out_DBx__6__DM2 CYREG_PRT2_DM2
+#define SCSI_Out_DBx__6__DR CYREG_PRT2_DR
+#define SCSI_Out_DBx__6__INP_DIS CYREG_PRT2_INP_DIS
+#define SCSI_Out_DBx__6__INTTYPE CYREG_PICU2_INTTYPE1
+#define SCSI_Out_DBx__6__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
+#define SCSI_Out_DBx__6__LCD_EN CYREG_PRT2_LCD_EN
+#define SCSI_Out_DBx__6__MASK 0x02u
+#define SCSI_Out_DBx__6__PC CYREG_PRT2_PC1
+#define SCSI_Out_DBx__6__PORT 2u
+#define SCSI_Out_DBx__6__PRT CYREG_PRT2_PRT
+#define SCSI_Out_DBx__6__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
+#define SCSI_Out_DBx__6__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
+#define SCSI_Out_DBx__6__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
+#define SCSI_Out_DBx__6__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
+#define SCSI_Out_DBx__6__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
+#define SCSI_Out_DBx__6__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
+#define SCSI_Out_DBx__6__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
+#define SCSI_Out_DBx__6__PS CYREG_PRT2_PS
+#define SCSI_Out_DBx__6__SHIFT 1u
+#define SCSI_Out_DBx__6__SLW CYREG_PRT2_SLW
+#define SCSI_Out_DBx__7__AG CYREG_PRT15_AG
+#define SCSI_Out_DBx__7__AMUX CYREG_PRT15_AMUX
+#define SCSI_Out_DBx__7__BIE CYREG_PRT15_BIE
+#define SCSI_Out_DBx__7__BIT_MASK CYREG_PRT15_BIT_MASK
+#define SCSI_Out_DBx__7__BYP CYREG_PRT15_BYP
+#define SCSI_Out_DBx__7__CTL CYREG_PRT15_CTL
+#define SCSI_Out_DBx__7__DM0 CYREG_PRT15_DM0
+#define SCSI_Out_DBx__7__DM1 CYREG_PRT15_DM1
+#define SCSI_Out_DBx__7__DM2 CYREG_PRT15_DM2
+#define SCSI_Out_DBx__7__DR CYREG_PRT15_DR
+#define SCSI_Out_DBx__7__INP_DIS CYREG_PRT15_INP_DIS
+#define SCSI_Out_DBx__7__INTTYPE CYREG_PICU15_INTTYPE5
+#define SCSI_Out_DBx__7__LCD_COM_SEG CYREG_PRT15_LCD_COM_SEG
+#define SCSI_Out_DBx__7__LCD_EN CYREG_PRT15_LCD_EN
+#define SCSI_Out_DBx__7__MASK 0x20u
+#define SCSI_Out_DBx__7__PC CYREG_IO_PC_PRT15_PC5
+#define SCSI_Out_DBx__7__PORT 15u
+#define SCSI_Out_DBx__7__PRT CYREG_PRT15_PRT
+#define SCSI_Out_DBx__7__PRTDSI__CAPS_SEL CYREG_PRT15_CAPS_SEL
+#define SCSI_Out_DBx__7__PRTDSI__DBL_SYNC_IN CYREG_PRT15_DBL_SYNC_IN
+#define SCSI_Out_DBx__7__PRTDSI__OE_SEL0 CYREG_PRT15_OE_SEL0
+#define SCSI_Out_DBx__7__PRTDSI__OE_SEL1 CYREG_PRT15_OE_SEL1
+#define SCSI_Out_DBx__7__PRTDSI__OUT_SEL0 CYREG_PRT15_OUT_SEL0
+#define SCSI_Out_DBx__7__PRTDSI__OUT_SEL1 CYREG_PRT15_OUT_SEL1
+#define SCSI_Out_DBx__7__PRTDSI__SYNC_OUT CYREG_PRT15_SYNC_OUT
+#define SCSI_Out_DBx__7__PS CYREG_PRT15_PS
+#define SCSI_Out_DBx__7__SHIFT 5u
+#define SCSI_Out_DBx__7__SLW CYREG_PRT15_SLW
+#define SCSI_Out_DBx__DB0__AG CYREG_PRT6_AG
+#define SCSI_Out_DBx__DB0__AMUX CYREG_PRT6_AMUX
+#define SCSI_Out_DBx__DB0__BIE CYREG_PRT6_BIE
+#define SCSI_Out_DBx__DB0__BIT_MASK CYREG_PRT6_BIT_MASK
+#define SCSI_Out_DBx__DB0__BYP CYREG_PRT6_BYP
+#define SCSI_Out_DBx__DB0__CTL CYREG_PRT6_CTL
+#define SCSI_Out_DBx__DB0__DM0 CYREG_PRT6_DM0
+#define SCSI_Out_DBx__DB0__DM1 CYREG_PRT6_DM1
+#define SCSI_Out_DBx__DB0__DM2 CYREG_PRT6_DM2
+#define SCSI_Out_DBx__DB0__DR CYREG_PRT6_DR
+#define SCSI_Out_DBx__DB0__INP_DIS CYREG_PRT6_INP_DIS
+#define SCSI_Out_DBx__DB0__INTTYPE CYREG_PICU6_INTTYPE7
+#define SCSI_Out_DBx__DB0__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
+#define SCSI_Out_DBx__DB0__LCD_EN CYREG_PRT6_LCD_EN
+#define SCSI_Out_DBx__DB0__MASK 0x80u
+#define SCSI_Out_DBx__DB0__PC CYREG_PRT6_PC7
+#define SCSI_Out_DBx__DB0__PORT 6u
+#define SCSI_Out_DBx__DB0__PRT CYREG_PRT6_PRT
+#define SCSI_Out_DBx__DB0__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
+#define SCSI_Out_DBx__DB0__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
+#define SCSI_Out_DBx__DB0__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
+#define SCSI_Out_DBx__DB0__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
+#define SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
+#define SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
+#define SCSI_Out_DBx__DB0__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
+#define SCSI_Out_DBx__DB0__PS CYREG_PRT6_PS
+#define SCSI_Out_DBx__DB0__SHIFT 7u
+#define SCSI_Out_DBx__DB0__SLW CYREG_PRT6_SLW
+#define SCSI_Out_DBx__DB1__AG CYREG_PRT6_AG
+#define SCSI_Out_DBx__DB1__AMUX CYREG_PRT6_AMUX
+#define SCSI_Out_DBx__DB1__BIE CYREG_PRT6_BIE
+#define SCSI_Out_DBx__DB1__BIT_MASK CYREG_PRT6_BIT_MASK
+#define SCSI_Out_DBx__DB1__BYP CYREG_PRT6_BYP
+#define SCSI_Out_DBx__DB1__CTL CYREG_PRT6_CTL
+#define SCSI_Out_DBx__DB1__DM0 CYREG_PRT6_DM0
+#define SCSI_Out_DBx__DB1__DM1 CYREG_PRT6_DM1
+#define SCSI_Out_DBx__DB1__DM2 CYREG_PRT6_DM2
+#define SCSI_Out_DBx__DB1__DR CYREG_PRT6_DR
+#define SCSI_Out_DBx__DB1__INP_DIS CYREG_PRT6_INP_DIS
+#define SCSI_Out_DBx__DB1__INTTYPE CYREG_PICU6_INTTYPE5
+#define SCSI_Out_DBx__DB1__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
+#define SCSI_Out_DBx__DB1__LCD_EN CYREG_PRT6_LCD_EN
+#define SCSI_Out_DBx__DB1__MASK 0x20u
+#define SCSI_Out_DBx__DB1__PC CYREG_PRT6_PC5
+#define SCSI_Out_DBx__DB1__PORT 6u
+#define SCSI_Out_DBx__DB1__PRT CYREG_PRT6_PRT
+#define SCSI_Out_DBx__DB1__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
+#define SCSI_Out_DBx__DB1__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
+#define SCSI_Out_DBx__DB1__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
+#define SCSI_Out_DBx__DB1__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
+#define SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
+#define SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
+#define SCSI_Out_DBx__DB1__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
+#define SCSI_Out_DBx__DB1__PS CYREG_PRT6_PS
+#define SCSI_Out_DBx__DB1__SHIFT 5u
+#define SCSI_Out_DBx__DB1__SLW CYREG_PRT6_SLW
+#define SCSI_Out_DBx__DB2__AG CYREG_PRT12_AG
+#define SCSI_Out_DBx__DB2__BIE CYREG_PRT12_BIE
+#define SCSI_Out_DBx__DB2__BIT_MASK CYREG_PRT12_BIT_MASK
+#define SCSI_Out_DBx__DB2__BYP CYREG_PRT12_BYP
+#define SCSI_Out_DBx__DB2__DM0 CYREG_PRT12_DM0
+#define SCSI_Out_DBx__DB2__DM1 CYREG_PRT12_DM1
+#define SCSI_Out_DBx__DB2__DM2 CYREG_PRT12_DM2
+#define SCSI_Out_DBx__DB2__DR CYREG_PRT12_DR
+#define SCSI_Out_DBx__DB2__INP_DIS CYREG_PRT12_INP_DIS
+#define SCSI_Out_DBx__DB2__INTTYPE CYREG_PICU12_INTTYPE5
+#define SCSI_Out_DBx__DB2__MASK 0x20u
+#define SCSI_Out_DBx__DB2__PC CYREG_PRT12_PC5
+#define SCSI_Out_DBx__DB2__PORT 12u
+#define SCSI_Out_DBx__DB2__PRT CYREG_PRT12_PRT
+#define SCSI_Out_DBx__DB2__PRTDSI__DBL_SYNC_IN CYREG_PRT12_DBL_SYNC_IN
+#define SCSI_Out_DBx__DB2__PRTDSI__OE_SEL0 CYREG_PRT12_OE_SEL0
+#define SCSI_Out_DBx__DB2__PRTDSI__OE_SEL1 CYREG_PRT12_OE_SEL1
+#define SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL0 CYREG_PRT12_OUT_SEL0
+#define SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL1 CYREG_PRT12_OUT_SEL1
+#define SCSI_Out_DBx__DB2__PRTDSI__SYNC_OUT CYREG_PRT12_SYNC_OUT
+#define SCSI_Out_DBx__DB2__PS CYREG_PRT12_PS
+#define SCSI_Out_DBx__DB2__SHIFT 5u
+#define SCSI_Out_DBx__DB2__SIO_CFG CYREG_PRT12_SIO_CFG
+#define SCSI_Out_DBx__DB2__SIO_DIFF CYREG_PRT12_SIO_DIFF
+#define SCSI_Out_DBx__DB2__SIO_HYST_EN CYREG_PRT12_SIO_HYST_EN
+#define SCSI_Out_DBx__DB2__SIO_REG_HIFREQ CYREG_PRT12_SIO_REG_HIFREQ
+#define SCSI_Out_DBx__DB2__SLW CYREG_PRT12_SLW
+#define SCSI_Out_DBx__DB3__AG CYREG_PRT2_AG
+#define SCSI_Out_DBx__DB3__AMUX CYREG_PRT2_AMUX
+#define SCSI_Out_DBx__DB3__BIE CYREG_PRT2_BIE
+#define SCSI_Out_DBx__DB3__BIT_MASK CYREG_PRT2_BIT_MASK
+#define SCSI_Out_DBx__DB3__BYP CYREG_PRT2_BYP
+#define SCSI_Out_DBx__DB3__CTL CYREG_PRT2_CTL
+#define SCSI_Out_DBx__DB3__DM0 CYREG_PRT2_DM0
+#define SCSI_Out_DBx__DB3__DM1 CYREG_PRT2_DM1
+#define SCSI_Out_DBx__DB3__DM2 CYREG_PRT2_DM2
+#define SCSI_Out_DBx__DB3__DR CYREG_PRT2_DR
+#define SCSI_Out_DBx__DB3__INP_DIS CYREG_PRT2_INP_DIS
+#define SCSI_Out_DBx__DB3__INTTYPE CYREG_PICU2_INTTYPE7
+#define SCSI_Out_DBx__DB3__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
+#define SCSI_Out_DBx__DB3__LCD_EN CYREG_PRT2_LCD_EN
+#define SCSI_Out_DBx__DB3__MASK 0x80u
+#define SCSI_Out_DBx__DB3__PC CYREG_PRT2_PC7
+#define SCSI_Out_DBx__DB3__PORT 2u
+#define SCSI_Out_DBx__DB3__PRT CYREG_PRT2_PRT
+#define SCSI_Out_DBx__DB3__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
+#define SCSI_Out_DBx__DB3__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
+#define SCSI_Out_DBx__DB3__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
+#define SCSI_Out_DBx__DB3__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
+#define SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
+#define SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
+#define SCSI_Out_DBx__DB3__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
+#define SCSI_Out_DBx__DB3__PS CYREG_PRT2_PS
+#define SCSI_Out_DBx__DB3__SHIFT 7u
+#define SCSI_Out_DBx__DB3__SLW CYREG_PRT2_SLW
+#define SCSI_Out_DBx__DB4__AG CYREG_PRT2_AG
+#define SCSI_Out_DBx__DB4__AMUX CYREG_PRT2_AMUX
+#define SCSI_Out_DBx__DB4__BIE CYREG_PRT2_BIE
+#define SCSI_Out_DBx__DB4__BIT_MASK CYREG_PRT2_BIT_MASK
+#define SCSI_Out_DBx__DB4__BYP CYREG_PRT2_BYP
+#define SCSI_Out_DBx__DB4__CTL CYREG_PRT2_CTL
+#define SCSI_Out_DBx__DB4__DM0 CYREG_PRT2_DM0
+#define SCSI_Out_DBx__DB4__DM1 CYREG_PRT2_DM1
+#define SCSI_Out_DBx__DB4__DM2 CYREG_PRT2_DM2
+#define SCSI_Out_DBx__DB4__DR CYREG_PRT2_DR
+#define SCSI_Out_DBx__DB4__INP_DIS CYREG_PRT2_INP_DIS
+#define SCSI_Out_DBx__DB4__INTTYPE CYREG_PICU2_INTTYPE5
+#define SCSI_Out_DBx__DB4__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
+#define SCSI_Out_DBx__DB4__LCD_EN CYREG_PRT2_LCD_EN
+#define SCSI_Out_DBx__DB4__MASK 0x20u
+#define SCSI_Out_DBx__DB4__PC CYREG_PRT2_PC5
+#define SCSI_Out_DBx__DB4__PORT 2u
+#define SCSI_Out_DBx__DB4__PRT CYREG_PRT2_PRT
+#define SCSI_Out_DBx__DB4__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
+#define SCSI_Out_DBx__DB4__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
+#define SCSI_Out_DBx__DB4__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
+#define SCSI_Out_DBx__DB4__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
+#define SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
+#define SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
+#define SCSI_Out_DBx__DB4__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
+#define SCSI_Out_DBx__DB4__PS CYREG_PRT2_PS
+#define SCSI_Out_DBx__DB4__SHIFT 5u
+#define SCSI_Out_DBx__DB4__SLW CYREG_PRT2_SLW
+#define SCSI_Out_DBx__DB5__AG CYREG_PRT2_AG
+#define SCSI_Out_DBx__DB5__AMUX CYREG_PRT2_AMUX
+#define SCSI_Out_DBx__DB5__BIE CYREG_PRT2_BIE
+#define SCSI_Out_DBx__DB5__BIT_MASK CYREG_PRT2_BIT_MASK
+#define SCSI_Out_DBx__DB5__BYP CYREG_PRT2_BYP
+#define SCSI_Out_DBx__DB5__CTL CYREG_PRT2_CTL
+#define SCSI_Out_DBx__DB5__DM0 CYREG_PRT2_DM0
+#define SCSI_Out_DBx__DB5__DM1 CYREG_PRT2_DM1
+#define SCSI_Out_DBx__DB5__DM2 CYREG_PRT2_DM2
+#define SCSI_Out_DBx__DB5__DR CYREG_PRT2_DR
+#define SCSI_Out_DBx__DB5__INP_DIS CYREG_PRT2_INP_DIS
+#define SCSI_Out_DBx__DB5__INTTYPE CYREG_PICU2_INTTYPE3
+#define SCSI_Out_DBx__DB5__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
+#define SCSI_Out_DBx__DB5__LCD_EN CYREG_PRT2_LCD_EN
+#define SCSI_Out_DBx__DB5__MASK 0x08u
+#define SCSI_Out_DBx__DB5__PC CYREG_PRT2_PC3
+#define SCSI_Out_DBx__DB5__PORT 2u
+#define SCSI_Out_DBx__DB5__PRT CYREG_PRT2_PRT
+#define SCSI_Out_DBx__DB5__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
+#define SCSI_Out_DBx__DB5__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
+#define SCSI_Out_DBx__DB5__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
+#define SCSI_Out_DBx__DB5__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
+#define SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
+#define SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
+#define SCSI_Out_DBx__DB5__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
+#define SCSI_Out_DBx__DB5__PS CYREG_PRT2_PS
+#define SCSI_Out_DBx__DB5__SHIFT 3u
+#define SCSI_Out_DBx__DB5__SLW CYREG_PRT2_SLW
+#define SCSI_Out_DBx__DB6__AG CYREG_PRT2_AG
+#define SCSI_Out_DBx__DB6__AMUX CYREG_PRT2_AMUX
+#define SCSI_Out_DBx__DB6__BIE CYREG_PRT2_BIE
+#define SCSI_Out_DBx__DB6__BIT_MASK CYREG_PRT2_BIT_MASK
+#define SCSI_Out_DBx__DB6__BYP CYREG_PRT2_BYP
+#define SCSI_Out_DBx__DB6__CTL CYREG_PRT2_CTL
+#define SCSI_Out_DBx__DB6__DM0 CYREG_PRT2_DM0
+#define SCSI_Out_DBx__DB6__DM1 CYREG_PRT2_DM1
+#define SCSI_Out_DBx__DB6__DM2 CYREG_PRT2_DM2
+#define SCSI_Out_DBx__DB6__DR CYREG_PRT2_DR
+#define SCSI_Out_DBx__DB6__INP_DIS CYREG_PRT2_INP_DIS
+#define SCSI_Out_DBx__DB6__INTTYPE CYREG_PICU2_INTTYPE1
+#define SCSI_Out_DBx__DB6__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
+#define SCSI_Out_DBx__DB6__LCD_EN CYREG_PRT2_LCD_EN
+#define SCSI_Out_DBx__DB6__MASK 0x02u
+#define SCSI_Out_DBx__DB6__PC CYREG_PRT2_PC1
+#define SCSI_Out_DBx__DB6__PORT 2u
+#define SCSI_Out_DBx__DB6__PRT CYREG_PRT2_PRT
+#define SCSI_Out_DBx__DB6__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
+#define SCSI_Out_DBx__DB6__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
+#define SCSI_Out_DBx__DB6__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
+#define SCSI_Out_DBx__DB6__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
+#define SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
+#define SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
+#define SCSI_Out_DBx__DB6__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
+#define SCSI_Out_DBx__DB6__PS CYREG_PRT2_PS
+#define SCSI_Out_DBx__DB6__SHIFT 1u
+#define SCSI_Out_DBx__DB6__SLW CYREG_PRT2_SLW
+#define SCSI_Out_DBx__DB7__AG CYREG_PRT15_AG
+#define SCSI_Out_DBx__DB7__AMUX CYREG_PRT15_AMUX
+#define SCSI_Out_DBx__DB7__BIE CYREG_PRT15_BIE
+#define SCSI_Out_DBx__DB7__BIT_MASK CYREG_PRT15_BIT_MASK
+#define SCSI_Out_DBx__DB7__BYP CYREG_PRT15_BYP
+#define SCSI_Out_DBx__DB7__CTL CYREG_PRT15_CTL
+#define SCSI_Out_DBx__DB7__DM0 CYREG_PRT15_DM0
+#define SCSI_Out_DBx__DB7__DM1 CYREG_PRT15_DM1
+#define SCSI_Out_DBx__DB7__DM2 CYREG_PRT15_DM2
+#define SCSI_Out_DBx__DB7__DR CYREG_PRT15_DR
+#define SCSI_Out_DBx__DB7__INP_DIS CYREG_PRT15_INP_DIS
+#define SCSI_Out_DBx__DB7__INTTYPE CYREG_PICU15_INTTYPE5
+#define SCSI_Out_DBx__DB7__LCD_COM_SEG CYREG_PRT15_LCD_COM_SEG
+#define SCSI_Out_DBx__DB7__LCD_EN CYREG_PRT15_LCD_EN
+#define SCSI_Out_DBx__DB7__MASK 0x20u
+#define SCSI_Out_DBx__DB7__PC CYREG_IO_PC_PRT15_PC5
+#define SCSI_Out_DBx__DB7__PORT 15u
+#define SCSI_Out_DBx__DB7__PRT CYREG_PRT15_PRT
+#define SCSI_Out_DBx__DB7__PRTDSI__CAPS_SEL CYREG_PRT15_CAPS_SEL
+#define SCSI_Out_DBx__DB7__PRTDSI__DBL_SYNC_IN CYREG_PRT15_DBL_SYNC_IN
+#define SCSI_Out_DBx__DB7__PRTDSI__OE_SEL0 CYREG_PRT15_OE_SEL0
+#define SCSI_Out_DBx__DB7__PRTDSI__OE_SEL1 CYREG_PRT15_OE_SEL1
+#define SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL0 CYREG_PRT15_OUT_SEL0
+#define SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL1 CYREG_PRT15_OUT_SEL1
+#define SCSI_Out_DBx__DB7__PRTDSI__SYNC_OUT CYREG_PRT15_SYNC_OUT
+#define SCSI_Out_DBx__DB7__PS CYREG_PRT15_PS
+#define SCSI_Out_DBx__DB7__SHIFT 5u
+#define SCSI_Out_DBx__DB7__SLW CYREG_PRT15_SLW
+
+/* SD_RX_DMA */
+#define SD_RX_DMA__DRQ_CTL CYREG_IDMUX_DRQ_CTL0
+#define SD_RX_DMA__DRQ_NUMBER 2u
+#define SD_RX_DMA__NUMBEROF_TDS 0u
+#define SD_RX_DMA__PRIORITY 0u
+#define SD_RX_DMA__TERMIN_EN 0u
+#define SD_RX_DMA__TERMIN_SEL 0u
+#define SD_RX_DMA__TERMOUT0_EN 1u
+#define SD_RX_DMA__TERMOUT0_SEL 2u
+#define SD_RX_DMA__TERMOUT1_EN 0u
+#define SD_RX_DMA__TERMOUT1_SEL 0u
+#define SD_RX_DMA_COMPLETE__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0
+#define SD_RX_DMA_COMPLETE__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0
+#define SD_RX_DMA_COMPLETE__INTC_MASK 0x20u
+#define SD_RX_DMA_COMPLETE__INTC_NUMBER 5u
+#define SD_RX_DMA_COMPLETE__INTC_PRIOR_NUM 7u
+#define SD_RX_DMA_COMPLETE__INTC_PRIOR_REG CYREG_NVIC_PRI_5
+#define SD_RX_DMA_COMPLETE__INTC_SET_EN_REG CYREG_NVIC_SETENA0
+#define SD_RX_DMA_COMPLETE__INTC_SET_PD_REG CYREG_NVIC_SETPEND0
+
+/* SD_TX_DMA */
+#define SD_TX_DMA__DRQ_CTL CYREG_IDMUX_DRQ_CTL0
+#define SD_TX_DMA__DRQ_NUMBER 3u
+#define SD_TX_DMA__NUMBEROF_TDS 0u
+#define SD_TX_DMA__PRIORITY 1u
+#define SD_TX_DMA__TERMIN_EN 0u
+#define SD_TX_DMA__TERMIN_SEL 0u
+#define SD_TX_DMA__TERMOUT0_EN 1u
+#define SD_TX_DMA__TERMOUT0_SEL 3u
+#define SD_TX_DMA__TERMOUT1_EN 0u
+#define SD_TX_DMA__TERMOUT1_SEL 0u
+#define SD_TX_DMA_COMPLETE__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0
+#define SD_TX_DMA_COMPLETE__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0
+#define SD_TX_DMA_COMPLETE__INTC_MASK 0x40u
+#define SD_TX_DMA_COMPLETE__INTC_NUMBER 6u
+#define SD_TX_DMA_COMPLETE__INTC_PRIOR_NUM 7u
+#define SD_TX_DMA_COMPLETE__INTC_PRIOR_REG CYREG_NVIC_PRI_6
+#define SD_TX_DMA_COMPLETE__INTC_SET_EN_REG CYREG_NVIC_SETENA0
+#define SD_TX_DMA_COMPLETE__INTC_SET_PD_REG CYREG_NVIC_SETPEND0
+
+/* SCSI_Noise */
+#define SCSI_Noise__0__AG CYREG_PRT4_AG
+#define SCSI_Noise__0__AMUX CYREG_PRT4_AMUX
+#define SCSI_Noise__0__BIE CYREG_PRT4_BIE
+#define SCSI_Noise__0__BIT_MASK CYREG_PRT4_BIT_MASK
+#define SCSI_Noise__0__BYP CYREG_PRT4_BYP
+#define SCSI_Noise__0__CTL CYREG_PRT4_CTL
+#define SCSI_Noise__0__DM0 CYREG_PRT4_DM0
+#define SCSI_Noise__0__DM1 CYREG_PRT4_DM1
+#define SCSI_Noise__0__DM2 CYREG_PRT4_DM2
+#define SCSI_Noise__0__DR CYREG_PRT4_DR
+#define SCSI_Noise__0__INP_DIS CYREG_PRT4_INP_DIS
+#define SCSI_Noise__0__INTTYPE CYREG_PICU4_INTTYPE7
+#define SCSI_Noise__0__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG
+#define SCSI_Noise__0__LCD_EN CYREG_PRT4_LCD_EN
+#define SCSI_Noise__0__MASK 0x80u
+#define SCSI_Noise__0__PC CYREG_PRT4_PC7
+#define SCSI_Noise__0__PORT 4u
+#define SCSI_Noise__0__PRT CYREG_PRT4_PRT
+#define SCSI_Noise__0__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL
+#define SCSI_Noise__0__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN
+#define SCSI_Noise__0__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0
+#define SCSI_Noise__0__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1
+#define SCSI_Noise__0__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0
+#define SCSI_Noise__0__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1
+#define SCSI_Noise__0__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT
+#define SCSI_Noise__0__PS CYREG_PRT4_PS
+#define SCSI_Noise__0__SHIFT 7u
+#define SCSI_Noise__0__SLW CYREG_PRT4_SLW
+#define SCSI_Noise__1__AG CYREG_PRT4_AG
+#define SCSI_Noise__1__AMUX CYREG_PRT4_AMUX
+#define SCSI_Noise__1__BIE CYREG_PRT4_BIE
+#define SCSI_Noise__1__BIT_MASK CYREG_PRT4_BIT_MASK
+#define SCSI_Noise__1__BYP CYREG_PRT4_BYP
+#define SCSI_Noise__1__CTL CYREG_PRT4_CTL
+#define SCSI_Noise__1__DM0 CYREG_PRT4_DM0
+#define SCSI_Noise__1__DM1 CYREG_PRT4_DM1
+#define SCSI_Noise__1__DM2 CYREG_PRT4_DM2
+#define SCSI_Noise__1__DR CYREG_PRT4_DR
+#define SCSI_Noise__1__INP_DIS CYREG_PRT4_INP_DIS
+#define SCSI_Noise__1__INTTYPE CYREG_PICU4_INTTYPE5
+#define SCSI_Noise__1__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG
+#define SCSI_Noise__1__LCD_EN CYREG_PRT4_LCD_EN
+#define SCSI_Noise__1__MASK 0x20u
+#define SCSI_Noise__1__PC CYREG_PRT4_PC5
+#define SCSI_Noise__1__PORT 4u
+#define SCSI_Noise__1__PRT CYREG_PRT4_PRT
+#define SCSI_Noise__1__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL
+#define SCSI_Noise__1__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN
+#define SCSI_Noise__1__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0
+#define SCSI_Noise__1__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1
+#define SCSI_Noise__1__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0
+#define SCSI_Noise__1__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1
+#define SCSI_Noise__1__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT
+#define SCSI_Noise__1__PS CYREG_PRT4_PS
+#define SCSI_Noise__1__SHIFT 5u
+#define SCSI_Noise__1__SLW CYREG_PRT4_SLW
+#define SCSI_Noise__2__AG CYREG_PRT0_AG
+#define SCSI_Noise__2__AMUX CYREG_PRT0_AMUX
+#define SCSI_Noise__2__BIE CYREG_PRT0_BIE
+#define SCSI_Noise__2__BIT_MASK CYREG_PRT0_BIT_MASK
+#define SCSI_Noise__2__BYP CYREG_PRT0_BYP
+#define SCSI_Noise__2__CTL CYREG_PRT0_CTL
+#define SCSI_Noise__2__DM0 CYREG_PRT0_DM0
+#define SCSI_Noise__2__DM1 CYREG_PRT0_DM1
+#define SCSI_Noise__2__DM2 CYREG_PRT0_DM2
+#define SCSI_Noise__2__DR CYREG_PRT0_DR
+#define SCSI_Noise__2__INP_DIS CYREG_PRT0_INP_DIS
+#define SCSI_Noise__2__INTTYPE CYREG_PICU0_INTTYPE2
+#define SCSI_Noise__2__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
+#define SCSI_Noise__2__LCD_EN CYREG_PRT0_LCD_EN
+#define SCSI_Noise__2__MASK 0x04u
+#define SCSI_Noise__2__PC CYREG_PRT0_PC2
+#define SCSI_Noise__2__PORT 0u
+#define SCSI_Noise__2__PRT CYREG_PRT0_PRT
+#define SCSI_Noise__2__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
+#define SCSI_Noise__2__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
+#define SCSI_Noise__2__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
+#define SCSI_Noise__2__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
+#define SCSI_Noise__2__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
+#define SCSI_Noise__2__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
+#define SCSI_Noise__2__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
+#define SCSI_Noise__2__PS CYREG_PRT0_PS
+#define SCSI_Noise__2__SHIFT 2u
+#define SCSI_Noise__2__SLW CYREG_PRT0_SLW
+#define SCSI_Noise__3__AG CYREG_PRT0_AG
+#define SCSI_Noise__3__AMUX CYREG_PRT0_AMUX
+#define SCSI_Noise__3__BIE CYREG_PRT0_BIE
+#define SCSI_Noise__3__BIT_MASK CYREG_PRT0_BIT_MASK
+#define SCSI_Noise__3__BYP CYREG_PRT0_BYP
+#define SCSI_Noise__3__CTL CYREG_PRT0_CTL
+#define SCSI_Noise__3__DM0 CYREG_PRT0_DM0
+#define SCSI_Noise__3__DM1 CYREG_PRT0_DM1
+#define SCSI_Noise__3__DM2 CYREG_PRT0_DM2
+#define SCSI_Noise__3__DR CYREG_PRT0_DR
+#define SCSI_Noise__3__INP_DIS CYREG_PRT0_INP_DIS
+#define SCSI_Noise__3__INTTYPE CYREG_PICU0_INTTYPE6
+#define SCSI_Noise__3__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
+#define SCSI_Noise__3__LCD_EN CYREG_PRT0_LCD_EN
+#define SCSI_Noise__3__MASK 0x40u
+#define SCSI_Noise__3__PC CYREG_PRT0_PC6
+#define SCSI_Noise__3__PORT 0u
+#define SCSI_Noise__3__PRT CYREG_PRT0_PRT
+#define SCSI_Noise__3__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
+#define SCSI_Noise__3__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
+#define SCSI_Noise__3__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
+#define SCSI_Noise__3__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
+#define SCSI_Noise__3__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
+#define SCSI_Noise__3__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
+#define SCSI_Noise__3__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
+#define SCSI_Noise__3__PS CYREG_PRT0_PS
+#define SCSI_Noise__3__SHIFT 6u
+#define SCSI_Noise__3__SLW CYREG_PRT0_SLW
+#define SCSI_Noise__4__AG CYREG_PRT4_AG
+#define SCSI_Noise__4__AMUX CYREG_PRT4_AMUX
+#define SCSI_Noise__4__BIE CYREG_PRT4_BIE
+#define SCSI_Noise__4__BIT_MASK CYREG_PRT4_BIT_MASK
+#define SCSI_Noise__4__BYP CYREG_PRT4_BYP
+#define SCSI_Noise__4__CTL CYREG_PRT4_CTL
+#define SCSI_Noise__4__DM0 CYREG_PRT4_DM0
+#define SCSI_Noise__4__DM1 CYREG_PRT4_DM1
+#define SCSI_Noise__4__DM2 CYREG_PRT4_DM2
+#define SCSI_Noise__4__DR CYREG_PRT4_DR
+#define SCSI_Noise__4__INP_DIS CYREG_PRT4_INP_DIS
+#define SCSI_Noise__4__INTTYPE CYREG_PICU4_INTTYPE3
+#define SCSI_Noise__4__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG
+#define SCSI_Noise__4__LCD_EN CYREG_PRT4_LCD_EN
+#define SCSI_Noise__4__MASK 0x08u
+#define SCSI_Noise__4__PC CYREG_PRT4_PC3
+#define SCSI_Noise__4__PORT 4u
+#define SCSI_Noise__4__PRT CYREG_PRT4_PRT
+#define SCSI_Noise__4__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL
+#define SCSI_Noise__4__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN
+#define SCSI_Noise__4__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0
+#define SCSI_Noise__4__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1
+#define SCSI_Noise__4__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0
+#define SCSI_Noise__4__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1
+#define SCSI_Noise__4__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT
+#define SCSI_Noise__4__PS CYREG_PRT4_PS
+#define SCSI_Noise__4__SHIFT 3u
+#define SCSI_Noise__4__SLW CYREG_PRT4_SLW
+#define SCSI_Noise__ACK__AG CYREG_PRT4_AG
+#define SCSI_Noise__ACK__AMUX CYREG_PRT4_AMUX
+#define SCSI_Noise__ACK__BIE CYREG_PRT4_BIE
+#define SCSI_Noise__ACK__BIT_MASK CYREG_PRT4_BIT_MASK
+#define SCSI_Noise__ACK__BYP CYREG_PRT4_BYP
+#define SCSI_Noise__ACK__CTL CYREG_PRT4_CTL
+#define SCSI_Noise__ACK__DM0 CYREG_PRT4_DM0
+#define SCSI_Noise__ACK__DM1 CYREG_PRT4_DM1
+#define SCSI_Noise__ACK__DM2 CYREG_PRT4_DM2
+#define SCSI_Noise__ACK__DR CYREG_PRT4_DR
+#define SCSI_Noise__ACK__INP_DIS CYREG_PRT4_INP_DIS
+#define SCSI_Noise__ACK__INTTYPE CYREG_PICU4_INTTYPE3
+#define SCSI_Noise__ACK__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG
+#define SCSI_Noise__ACK__LCD_EN CYREG_PRT4_LCD_EN
+#define SCSI_Noise__ACK__MASK 0x08u
+#define SCSI_Noise__ACK__PC CYREG_PRT4_PC3
+#define SCSI_Noise__ACK__PORT 4u
+#define SCSI_Noise__ACK__PRT CYREG_PRT4_PRT
+#define SCSI_Noise__ACK__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL
+#define SCSI_Noise__ACK__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN
+#define SCSI_Noise__ACK__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0
+#define SCSI_Noise__ACK__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1
+#define SCSI_Noise__ACK__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0
+#define SCSI_Noise__ACK__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1
+#define SCSI_Noise__ACK__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT
+#define SCSI_Noise__ACK__PS CYREG_PRT4_PS
+#define SCSI_Noise__ACK__SHIFT 3u
+#define SCSI_Noise__ACK__SLW CYREG_PRT4_SLW
+#define SCSI_Noise__ATN__AG CYREG_PRT4_AG
+#define SCSI_Noise__ATN__AMUX CYREG_PRT4_AMUX
+#define SCSI_Noise__ATN__BIE CYREG_PRT4_BIE
+#define SCSI_Noise__ATN__BIT_MASK CYREG_PRT4_BIT_MASK
+#define SCSI_Noise__ATN__BYP CYREG_PRT4_BYP
+#define SCSI_Noise__ATN__CTL CYREG_PRT4_CTL
+#define SCSI_Noise__ATN__DM0 CYREG_PRT4_DM0
+#define SCSI_Noise__ATN__DM1 CYREG_PRT4_DM1
+#define SCSI_Noise__ATN__DM2 CYREG_PRT4_DM2
+#define SCSI_Noise__ATN__DR CYREG_PRT4_DR
+#define SCSI_Noise__ATN__INP_DIS CYREG_PRT4_INP_DIS
+#define SCSI_Noise__ATN__INTTYPE CYREG_PICU4_INTTYPE7
+#define SCSI_Noise__ATN__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG
+#define SCSI_Noise__ATN__LCD_EN CYREG_PRT4_LCD_EN
+#define SCSI_Noise__ATN__MASK 0x80u
+#define SCSI_Noise__ATN__PC CYREG_PRT4_PC7
+#define SCSI_Noise__ATN__PORT 4u
+#define SCSI_Noise__ATN__PRT CYREG_PRT4_PRT
+#define SCSI_Noise__ATN__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL
+#define SCSI_Noise__ATN__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN
+#define SCSI_Noise__ATN__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0
+#define SCSI_Noise__ATN__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1
+#define SCSI_Noise__ATN__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0
+#define SCSI_Noise__ATN__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1
+#define SCSI_Noise__ATN__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT
+#define SCSI_Noise__ATN__PS CYREG_PRT4_PS
+#define SCSI_Noise__ATN__SHIFT 7u
+#define SCSI_Noise__ATN__SLW CYREG_PRT4_SLW
+#define SCSI_Noise__BSY__AG CYREG_PRT4_AG
+#define SCSI_Noise__BSY__AMUX CYREG_PRT4_AMUX
+#define SCSI_Noise__BSY__BIE CYREG_PRT4_BIE
+#define SCSI_Noise__BSY__BIT_MASK CYREG_PRT4_BIT_MASK
+#define SCSI_Noise__BSY__BYP CYREG_PRT4_BYP
+#define SCSI_Noise__BSY__CTL CYREG_PRT4_CTL
+#define SCSI_Noise__BSY__DM0 CYREG_PRT4_DM0
+#define SCSI_Noise__BSY__DM1 CYREG_PRT4_DM1
+#define SCSI_Noise__BSY__DM2 CYREG_PRT4_DM2
+#define SCSI_Noise__BSY__DR CYREG_PRT4_DR
+#define SCSI_Noise__BSY__INP_DIS CYREG_PRT4_INP_DIS
+#define SCSI_Noise__BSY__INTTYPE CYREG_PICU4_INTTYPE5
+#define SCSI_Noise__BSY__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG
+#define SCSI_Noise__BSY__LCD_EN CYREG_PRT4_LCD_EN
+#define SCSI_Noise__BSY__MASK 0x20u
+#define SCSI_Noise__BSY__PC CYREG_PRT4_PC5
+#define SCSI_Noise__BSY__PORT 4u
+#define SCSI_Noise__BSY__PRT CYREG_PRT4_PRT
+#define SCSI_Noise__BSY__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL
+#define SCSI_Noise__BSY__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN
+#define SCSI_Noise__BSY__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0
+#define SCSI_Noise__BSY__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1
+#define SCSI_Noise__BSY__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0
+#define SCSI_Noise__BSY__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1
+#define SCSI_Noise__BSY__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT
+#define SCSI_Noise__BSY__PS CYREG_PRT4_PS
+#define SCSI_Noise__BSY__SHIFT 5u
+#define SCSI_Noise__BSY__SLW CYREG_PRT4_SLW
+#define SCSI_Noise__RST__AG CYREG_PRT0_AG
+#define SCSI_Noise__RST__AMUX CYREG_PRT0_AMUX
+#define SCSI_Noise__RST__BIE CYREG_PRT0_BIE
+#define SCSI_Noise__RST__BIT_MASK CYREG_PRT0_BIT_MASK
+#define SCSI_Noise__RST__BYP CYREG_PRT0_BYP
+#define SCSI_Noise__RST__CTL CYREG_PRT0_CTL
+#define SCSI_Noise__RST__DM0 CYREG_PRT0_DM0
+#define SCSI_Noise__RST__DM1 CYREG_PRT0_DM1
+#define SCSI_Noise__RST__DM2 CYREG_PRT0_DM2
+#define SCSI_Noise__RST__DR CYREG_PRT0_DR
+#define SCSI_Noise__RST__INP_DIS CYREG_PRT0_INP_DIS
+#define SCSI_Noise__RST__INTTYPE CYREG_PICU0_INTTYPE6
+#define SCSI_Noise__RST__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
+#define SCSI_Noise__RST__LCD_EN CYREG_PRT0_LCD_EN
+#define SCSI_Noise__RST__MASK 0x40u
+#define SCSI_Noise__RST__PC CYREG_PRT0_PC6
+#define SCSI_Noise__RST__PORT 0u
+#define SCSI_Noise__RST__PRT CYREG_PRT0_PRT
+#define SCSI_Noise__RST__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
+#define SCSI_Noise__RST__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
+#define SCSI_Noise__RST__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
+#define SCSI_Noise__RST__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
+#define SCSI_Noise__RST__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
+#define SCSI_Noise__RST__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
+#define SCSI_Noise__RST__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
+#define SCSI_Noise__RST__PS CYREG_PRT0_PS
+#define SCSI_Noise__RST__SHIFT 6u
+#define SCSI_Noise__RST__SLW CYREG_PRT0_SLW
+#define SCSI_Noise__SEL__AG CYREG_PRT0_AG
+#define SCSI_Noise__SEL__AMUX CYREG_PRT0_AMUX
+#define SCSI_Noise__SEL__BIE CYREG_PRT0_BIE
+#define SCSI_Noise__SEL__BIT_MASK CYREG_PRT0_BIT_MASK
+#define SCSI_Noise__SEL__BYP CYREG_PRT0_BYP
+#define SCSI_Noise__SEL__CTL CYREG_PRT0_CTL
+#define SCSI_Noise__SEL__DM0 CYREG_PRT0_DM0
+#define SCSI_Noise__SEL__DM1 CYREG_PRT0_DM1
+#define SCSI_Noise__SEL__DM2 CYREG_PRT0_DM2
+#define SCSI_Noise__SEL__DR CYREG_PRT0_DR
+#define SCSI_Noise__SEL__INP_DIS CYREG_PRT0_INP_DIS
+#define SCSI_Noise__SEL__INTTYPE CYREG_PICU0_INTTYPE2
+#define SCSI_Noise__SEL__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
+#define SCSI_Noise__SEL__LCD_EN CYREG_PRT0_LCD_EN
+#define SCSI_Noise__SEL__MASK 0x04u
+#define SCSI_Noise__SEL__PC CYREG_PRT0_PC2
+#define SCSI_Noise__SEL__PORT 0u
+#define SCSI_Noise__SEL__PRT CYREG_PRT0_PRT
+#define SCSI_Noise__SEL__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
+#define SCSI_Noise__SEL__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
+#define SCSI_Noise__SEL__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
+#define SCSI_Noise__SEL__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
+#define SCSI_Noise__SEL__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
+#define SCSI_Noise__SEL__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
+#define SCSI_Noise__SEL__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
+#define SCSI_Noise__SEL__PS CYREG_PRT0_PS
+#define SCSI_Noise__SEL__SHIFT 2u
+#define SCSI_Noise__SEL__SLW CYREG_PRT0_SLW
+
/* scsiTarget */
#define scsiTarget_datapath__16BIT_A0_REG CYREG_B0_UDB00_01_A0
#define scsiTarget_datapath__16BIT_A1_REG CYREG_B0_UDB00_01_A1
#define scsiTarget_StatusReg__STATUS_AUX_CTL_REG CYREG_B0_UDB15_ACTL
#define scsiTarget_StatusReg__STATUS_REG CYREG_B0_UDB15_ST
+/* Debug_Timer */
+#define Debug_Timer_Interrupt__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0
+#define Debug_Timer_Interrupt__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0
+#define Debug_Timer_Interrupt__INTC_MASK 0x01u
+#define Debug_Timer_Interrupt__INTC_NUMBER 0u
+#define Debug_Timer_Interrupt__INTC_PRIOR_NUM 7u
+#define Debug_Timer_Interrupt__INTC_PRIOR_REG CYREG_NVIC_PRI_0
+#define Debug_Timer_Interrupt__INTC_SET_EN_REG CYREG_NVIC_SETENA0
+#define Debug_Timer_Interrupt__INTC_SET_PD_REG CYREG_NVIC_SETPEND0
+#define Debug_Timer_TimerHW__CAP0 CYREG_TMR0_CAP0
+#define Debug_Timer_TimerHW__CAP1 CYREG_TMR0_CAP1
+#define Debug_Timer_TimerHW__CFG0 CYREG_TMR0_CFG0
+#define Debug_Timer_TimerHW__CFG1 CYREG_TMR0_CFG1
+#define Debug_Timer_TimerHW__CFG2 CYREG_TMR0_CFG2
+#define Debug_Timer_TimerHW__CNT_CMP0 CYREG_TMR0_CNT_CMP0
+#define Debug_Timer_TimerHW__CNT_CMP1 CYREG_TMR0_CNT_CMP1
+#define Debug_Timer_TimerHW__PER0 CYREG_TMR0_PER0
+#define Debug_Timer_TimerHW__PER1 CYREG_TMR0_PER1
+#define Debug_Timer_TimerHW__PM_ACT_CFG CYREG_PM_ACT_CFG3
+#define Debug_Timer_TimerHW__PM_ACT_MSK 0x01u
+#define Debug_Timer_TimerHW__PM_STBY_CFG CYREG_PM_STBY_CFG3
+#define Debug_Timer_TimerHW__PM_STBY_MSK 0x01u
+#define Debug_Timer_TimerHW__RT0 CYREG_TMR0_RT0
+#define Debug_Timer_TimerHW__RT1 CYREG_TMR0_RT1
+#define Debug_Timer_TimerHW__SR0 CYREG_TMR0_SR0
+
+/* SCSI_RX_DMA */
+#define SCSI_RX_DMA__DRQ_CTL CYREG_IDMUX_DRQ_CTL0
+#define SCSI_RX_DMA__DRQ_NUMBER 0u
+#define SCSI_RX_DMA__NUMBEROF_TDS 0u
+#define SCSI_RX_DMA__PRIORITY 2u
+#define SCSI_RX_DMA__TERMIN_EN 0u
+#define SCSI_RX_DMA__TERMIN_SEL 0u
+#define SCSI_RX_DMA__TERMOUT0_EN 1u
+#define SCSI_RX_DMA__TERMOUT0_SEL 0u
+#define SCSI_RX_DMA__TERMOUT1_EN 0u
+#define SCSI_RX_DMA__TERMOUT1_SEL 0u
+#define SCSI_RX_DMA_COMPLETE__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0
+#define SCSI_RX_DMA_COMPLETE__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0
+#define SCSI_RX_DMA_COMPLETE__INTC_MASK 0x04u
+#define SCSI_RX_DMA_COMPLETE__INTC_NUMBER 2u
+#define SCSI_RX_DMA_COMPLETE__INTC_PRIOR_NUM 7u
+#define SCSI_RX_DMA_COMPLETE__INTC_PRIOR_REG CYREG_NVIC_PRI_2
+#define SCSI_RX_DMA_COMPLETE__INTC_SET_EN_REG CYREG_NVIC_SETENA0
+#define SCSI_RX_DMA_COMPLETE__INTC_SET_PD_REG CYREG_NVIC_SETPEND0
+
+/* SCSI_TX_DMA */
+#define SCSI_TX_DMA__DRQ_CTL CYREG_IDMUX_DRQ_CTL0
+#define SCSI_TX_DMA__DRQ_NUMBER 1u
+#define SCSI_TX_DMA__NUMBEROF_TDS 0u
+#define SCSI_TX_DMA__PRIORITY 2u
+#define SCSI_TX_DMA__TERMIN_EN 0u
+#define SCSI_TX_DMA__TERMIN_SEL 0u
+#define SCSI_TX_DMA__TERMOUT0_EN 1u
+#define SCSI_TX_DMA__TERMOUT0_SEL 1u
+#define SCSI_TX_DMA__TERMOUT1_EN 0u
+#define SCSI_TX_DMA__TERMOUT1_SEL 0u
+#define SCSI_TX_DMA_COMPLETE__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0
+#define SCSI_TX_DMA_COMPLETE__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0
+#define SCSI_TX_DMA_COMPLETE__INTC_MASK 0x10u
+#define SCSI_TX_DMA_COMPLETE__INTC_NUMBER 4u
+#define SCSI_TX_DMA_COMPLETE__INTC_PRIOR_NUM 7u
+#define SCSI_TX_DMA_COMPLETE__INTC_PRIOR_REG CYREG_NVIC_PRI_4
+#define SCSI_TX_DMA_COMPLETE__INTC_SET_EN_REG CYREG_NVIC_SETENA0
+#define SCSI_TX_DMA_COMPLETE__INTC_SET_PD_REG CYREG_NVIC_SETPEND0
+
+/* SD_Data_Clk */
+#define SD_Data_Clk__CFG0 CYREG_CLKDIST_DCFG0_CFG0
+#define SD_Data_Clk__CFG1 CYREG_CLKDIST_DCFG0_CFG1
+#define SD_Data_Clk__CFG2 CYREG_CLKDIST_DCFG0_CFG2
+#define SD_Data_Clk__CFG2_SRC_SEL_MASK 0x07u
+#define SD_Data_Clk__INDEX 0x00u
+#define SD_Data_Clk__PM_ACT_CFG CYREG_PM_ACT_CFG2
+#define SD_Data_Clk__PM_ACT_MSK 0x01u
+#define SD_Data_Clk__PM_STBY_CFG CYREG_PM_STBY_CFG2
+#define SD_Data_Clk__PM_STBY_MSK 0x01u
+
/* timer_clock */
#define timer_clock__CFG0 CYREG_CLKDIST_DCFG2_CFG0
#define timer_clock__CFG1 CYREG_CLKDIST_DCFG2_CFG1
#define timer_clock__PM_STBY_CFG CYREG_PM_STBY_CFG2
#define timer_clock__PM_STBY_MSK 0x04u
+/* SCSI_RST_ISR */
+#define SCSI_RST_ISR__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0
+#define SCSI_RST_ISR__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0
+#define SCSI_RST_ISR__INTC_MASK 0x02u
+#define SCSI_RST_ISR__INTC_NUMBER 1u
+#define SCSI_RST_ISR__INTC_PRIOR_NUM 7u
+#define SCSI_RST_ISR__INTC_PRIOR_REG CYREG_NVIC_PRI_1
+#define SCSI_RST_ISR__INTC_SET_EN_REG CYREG_NVIC_SETENA0
+#define SCSI_RST_ISR__INTC_SET_PD_REG CYREG_NVIC_SETPEND0
+
+/* SCSI_SEL_ISR */
+#define SCSI_SEL_ISR__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0
+#define SCSI_SEL_ISR__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0
+#define SCSI_SEL_ISR__INTC_MASK 0x08u
+#define SCSI_SEL_ISR__INTC_NUMBER 3u
+#define SCSI_SEL_ISR__INTC_PRIOR_NUM 7u
+#define SCSI_SEL_ISR__INTC_PRIOR_REG CYREG_NVIC_PRI_3
+#define SCSI_SEL_ISR__INTC_SET_EN_REG CYREG_NVIC_SETENA0
+#define SCSI_SEL_ISR__INTC_SET_PD_REG CYREG_NVIC_SETPEND0
+
+/* SCSI_Filtered */
+#define SCSI_Filtered_sts_sts_reg__0__MASK 0x01u
+#define SCSI_Filtered_sts_sts_reg__0__POS 0
+#define SCSI_Filtered_sts_sts_reg__1__MASK 0x02u
+#define SCSI_Filtered_sts_sts_reg__1__POS 1
+#define SCSI_Filtered_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG CYREG_B0_UDB11_12_ACTL
+#define SCSI_Filtered_sts_sts_reg__16BIT_STATUS_REG CYREG_B0_UDB11_12_ST
+#define SCSI_Filtered_sts_sts_reg__2__MASK 0x04u
+#define SCSI_Filtered_sts_sts_reg__2__POS 2
+#define SCSI_Filtered_sts_sts_reg__3__MASK 0x08u
+#define SCSI_Filtered_sts_sts_reg__3__POS 3
+#define SCSI_Filtered_sts_sts_reg__4__MASK 0x10u
+#define SCSI_Filtered_sts_sts_reg__4__POS 4
+#define SCSI_Filtered_sts_sts_reg__MASK 0x1Fu
+#define SCSI_Filtered_sts_sts_reg__MASK_REG CYREG_B0_UDB11_MSK
+#define SCSI_Filtered_sts_sts_reg__MASK_ST_AUX_CTL_REG CYREG_B0_UDB11_MSK_ACTL
+#define SCSI_Filtered_sts_sts_reg__PER_ST_AUX_CTL_REG CYREG_B0_UDB11_MSK_ACTL
+#define SCSI_Filtered_sts_sts_reg__STATUS_AUX_CTL_REG CYREG_B0_UDB11_ACTL
+#define SCSI_Filtered_sts_sts_reg__STATUS_CNT_REG CYREG_B0_UDB11_ST_CTL
+#define SCSI_Filtered_sts_sts_reg__STATUS_CONTROL_REG CYREG_B0_UDB11_ST_CTL
+#define SCSI_Filtered_sts_sts_reg__STATUS_REG CYREG_B0_UDB11_ST
+
+/* SCSI_CTL_PHASE */
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__0__MASK 0x01u
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__0__POS 0
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__1__MASK 0x02u
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__1__POS 1
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG CYREG_B0_UDB02_03_ACTL
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG CYREG_B0_UDB02_03_CTL
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG CYREG_B0_UDB02_03_CTL
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG CYREG_B0_UDB02_03_CTL
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG CYREG_B0_UDB02_03_CTL
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_MASK_REG CYREG_B0_UDB02_03_MSK
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG CYREG_B0_UDB02_03_MSK
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG CYREG_B0_UDB02_03_MSK
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG CYREG_B0_UDB02_03_MSK
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__2__MASK 0x04u
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__2__POS 2
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_AUX_CTL_REG CYREG_B0_UDB02_ACTL
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_REG CYREG_B0_UDB02_CTL
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_ST_REG CYREG_B0_UDB02_ST_CTL
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_REG CYREG_B0_UDB02_CTL
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_ST_REG CYREG_B0_UDB02_ST_CTL
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__MASK 0x07u
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG CYREG_B0_UDB02_MSK_ACTL
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG CYREG_B0_UDB02_MSK_ACTL
+#define SCSI_CTL_PHASE_Sync_ctrl_reg__PERIOD_REG CYREG_B0_UDB02_MSK
+
+/* SCSI_Glitch_Ctl */
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__0__MASK 0x01u
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__0__POS 0
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG CYREG_B0_UDB05_06_ACTL
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG CYREG_B0_UDB05_06_CTL
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG CYREG_B0_UDB05_06_CTL
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG CYREG_B0_UDB05_06_CTL
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG CYREG_B0_UDB05_06_CTL
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG CYREG_B0_UDB05_06_MSK
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG CYREG_B0_UDB05_06_MSK
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG CYREG_B0_UDB05_06_MSK
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG CYREG_B0_UDB05_06_MSK
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG CYREG_B0_UDB05_ACTL
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_REG CYREG_B0_UDB05_CTL
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_ST_REG CYREG_B0_UDB05_ST_CTL
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__COUNT_REG CYREG_B0_UDB05_CTL
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__COUNT_ST_REG CYREG_B0_UDB05_ST_CTL
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__MASK 0x01u
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG CYREG_B0_UDB05_MSK_ACTL
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG CYREG_B0_UDB05_MSK_ACTL
+#define SCSI_Glitch_Ctl_Sync_ctrl_reg__PERIOD_REG CYREG_B0_UDB05_MSK
+
+/* SCSI_Parity_Error */
+#define SCSI_Parity_Error_sts_sts_reg__0__MASK 0x01u
+#define SCSI_Parity_Error_sts_sts_reg__0__POS 0
+#define SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG CYREG_B0_UDB02_03_ACTL
+#define SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_REG CYREG_B0_UDB02_03_ST
+#define SCSI_Parity_Error_sts_sts_reg__MASK 0x01u
+#define SCSI_Parity_Error_sts_sts_reg__MASK_REG CYREG_B0_UDB02_MSK
+#define SCSI_Parity_Error_sts_sts_reg__MASK_ST_AUX_CTL_REG CYREG_B0_UDB02_MSK_ACTL
+#define SCSI_Parity_Error_sts_sts_reg__PER_ST_AUX_CTL_REG CYREG_B0_UDB02_MSK_ACTL
+#define SCSI_Parity_Error_sts_sts_reg__STATUS_AUX_CTL_REG CYREG_B0_UDB02_ACTL
+#define SCSI_Parity_Error_sts_sts_reg__STATUS_CNT_REG CYREG_B0_UDB02_ST_CTL
+#define SCSI_Parity_Error_sts_sts_reg__STATUS_CONTROL_REG CYREG_B0_UDB02_ST_CTL
+#define SCSI_Parity_Error_sts_sts_reg__STATUS_REG CYREG_B0_UDB02_ST
+
/* Miscellaneous */
#define BCLK__BUS_CLK__HZ 50000000U
#define BCLK__BUS_CLK__KHZ 50000U
#define BCLK__BUS_CLK__MHZ 50U
#define CY_PROJECT_NAME "SCSI2SD"
-#define CY_VERSION "PSoC Creator 4.1"
+#define CY_VERSION "PSoC Creator 4.2"
#define CYDEV_CHIP_DIE_LEOPARD 1u
-#define CYDEV_CHIP_DIE_PSOC4A 16u
+#define CYDEV_CHIP_DIE_PSOC4A 18u
#define CYDEV_CHIP_DIE_PSOC5LP 2u
#define CYDEV_CHIP_DIE_PSOC5TM 3u
#define CYDEV_CHIP_DIE_TMA4 4u
#define CYDEV_CHIP_FAMILY_USED CYDEV_CHIP_FAMILY_PSOC5
#define CYDEV_CHIP_JTAG_ID 0x2E133069u
#define CYDEV_CHIP_MEMBER_3A 1u
-#define CYDEV_CHIP_MEMBER_4A 16u
-#define CYDEV_CHIP_MEMBER_4D 12u
+#define CYDEV_CHIP_MEMBER_4A 18u
+#define CYDEV_CHIP_MEMBER_4D 13u
#define CYDEV_CHIP_MEMBER_4E 6u
-#define CYDEV_CHIP_MEMBER_4F 17u
+#define CYDEV_CHIP_MEMBER_4F 19u
#define CYDEV_CHIP_MEMBER_4G 4u
-#define CYDEV_CHIP_MEMBER_4H 15u
-#define CYDEV_CHIP_MEMBER_4I 21u
-#define CYDEV_CHIP_MEMBER_4J 13u
-#define CYDEV_CHIP_MEMBER_4K 14u
-#define CYDEV_CHIP_MEMBER_4L 20u
-#define CYDEV_CHIP_MEMBER_4M 19u
-#define CYDEV_CHIP_MEMBER_4N 9u
+#define CYDEV_CHIP_MEMBER_4H 17u
+#define CYDEV_CHIP_MEMBER_4I 23u
+#define CYDEV_CHIP_MEMBER_4J 14u
+#define CYDEV_CHIP_MEMBER_4K 15u
+#define CYDEV_CHIP_MEMBER_4L 22u
+#define CYDEV_CHIP_MEMBER_4M 21u
+#define CYDEV_CHIP_MEMBER_4N 10u
#define CYDEV_CHIP_MEMBER_4O 7u
-#define CYDEV_CHIP_MEMBER_4P 18u
-#define CYDEV_CHIP_MEMBER_4Q 11u
+#define CYDEV_CHIP_MEMBER_4P 20u
+#define CYDEV_CHIP_MEMBER_4Q 12u
#define CYDEV_CHIP_MEMBER_4R 8u
-#define CYDEV_CHIP_MEMBER_4S 10u
+#define CYDEV_CHIP_MEMBER_4S 11u
+#define CYDEV_CHIP_MEMBER_4T 9u
#define CYDEV_CHIP_MEMBER_4U 5u
+#define CYDEV_CHIP_MEMBER_4V 16u
#define CYDEV_CHIP_MEMBER_5A 3u
#define CYDEV_CHIP_MEMBER_5B 2u
-#define CYDEV_CHIP_MEMBER_6A 22u
-#define CYDEV_CHIP_MEMBER_FM3 26u
-#define CYDEV_CHIP_MEMBER_FM4 27u
-#define CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE1 23u
-#define CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE2 24u
-#define CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE3 25u
+#define CYDEV_CHIP_MEMBER_6A 24u
+#define CYDEV_CHIP_MEMBER_FM3 28u
+#define CYDEV_CHIP_MEMBER_FM4 29u
+#define CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE1 25u
+#define CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE2 26u
+#define CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE3 27u
#define CYDEV_CHIP_MEMBER_UNKNOWN 0u
#define CYDEV_CHIP_MEMBER_USED CYDEV_CHIP_MEMBER_5B
#define CYDEV_CHIP_DIE_EXPECT CYDEV_CHIP_MEMBER_USED
#define CYDEV_CHIP_REVISION_4A_ES0 17u
#define CYDEV_CHIP_REVISION_4A_PRODUCTION 17u
#define CYDEV_CHIP_REVISION_4D_PRODUCTION 0u
+#define CYDEV_CHIP_REVISION_4E_CCG2_NO_USBPD 0u
#define CYDEV_CHIP_REVISION_4E_PRODUCTION 0u
#define CYDEV_CHIP_REVISION_4F_PRODUCTION 0u
#define CYDEV_CHIP_REVISION_4F_PRODUCTION_256DMA 0u
#define CYDEV_CHIP_REVISION_4Q_PRODUCTION 0u
#define CYDEV_CHIP_REVISION_4R_PRODUCTION 0u
#define CYDEV_CHIP_REVISION_4S_PRODUCTION 0u
+#define CYDEV_CHIP_REVISION_4T_PRODUCTION 0u
#define CYDEV_CHIP_REVISION_4U_PRODUCTION 0u
+#define CYDEV_CHIP_REVISION_4V_PRODUCTION 0u
#define CYDEV_CHIP_REVISION_5A_ES0 0u
#define CYDEV_CHIP_REVISION_5A_ES1 1u
#define CYDEV_CHIP_REVISION_5A_PRODUCTION 1u
#define CYDEV_CHIP_REVISION_5B_ES0 0u
#define CYDEV_CHIP_REVISION_5B_PRODUCTION 0u
-#define CYDEV_CHIP_REVISION_6A_NO_UDB 0u
-#define CYDEV_CHIP_REVISION_6A_PRODUCTION 0u
+#define CYDEV_CHIP_REVISION_6A_ES 17u
+#define CYDEV_CHIP_REVISION_6A_NO_UDB 33u
+#define CYDEV_CHIP_REVISION_6A_PRODUCTION 33u
#define CYDEV_CHIP_REVISION_FM3_PRODUCTION 0u
#define CYDEV_CHIP_REVISION_FM4_PRODUCTION 0u
#define CYDEV_CHIP_REVISION_PDL_FM0P_TYPE1_PRODUCTION 0u
/*******************************************************************************
* File Name: cyfitter_cfg.c
*
-* PSoC Creator 4.1
+* PSoC Creator 4.2
*
* Description:
* This file contains device initialization code.
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
-* Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.
+* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
#define CYCLOCKSTART_32KHZ_ERROR 2u
#define CYCLOCKSTART_PLL_ERROR 3u
#define CYCLOCKSTART_FLL_ERROR 4u
+#define CYCLOCKSTART_WCO_ERROR 5u
#ifdef CY_NEED_CYCLOCKSTARTUPERROR
CY_CFG_UNUSED
static void CyClockStartupError(uint8 errorCode)
{
- /* To remove the compiler warning if errorCode not used. */
-#if defined(CY_PSOC3) && (CY_PSOC3)
+ /* To remove the compiler warning if errorCode not used. */
errorCode = errorCode;
-#else
- (void)errorCode;
-#endif /* CY_PSOC3 */
/* If we have a clock startup error (bad MHz crystal, PLL lock, etc.), */
/* we will end up here to allow the customer to implement something to */
/* Set Flash Cycles based on max possible frequency in case a glitch occurs during ClockSetup(). */
- CY_SET_XTND_REG8((void CYFAR *)(CYREG_CACHE_CC_CTL), (((CYDEV_INSTRUCT_CACHE_ENABLED) != 0) ? 0x01u : 0x00u));
+ CY_SET_XTND_REG8((void CYFAR *)(CYREG_CACHE_CC_CTL), (((CYDEV_INSTRUCT_CACHE_ENABLED) != 0) ? 0x61u : 0x60u));
/* Setup clocks based on selections from Clock DWR */
ClockSetup();
/* Set Flash Cycles based on newly configured 50.00MHz Bus Clock. */
/*******************************************************************************
* File Name: cyfitter_cfg.h
*
-* PSoC Creator 4.1
+* PSoC Creator 4.2
*
* Description:
* This file provides basic startup and mux configuration settings
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
-* Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.
+* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
/*******************************************************************************
* File Name: cyfittergnu.inc
*
-* PSoC Creator 4.1
+* PSoC Creator 4.2
*
* Description:
*
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
-* Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.
+* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
.include "cydevicegnu.inc"
.include "cydevicegnu_trm.inc"
-/* Debug_Timer_Interrupt */
-.set Debug_Timer_Interrupt__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0
-.set Debug_Timer_Interrupt__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0
-.set Debug_Timer_Interrupt__INTC_MASK, 0x01
-.set Debug_Timer_Interrupt__INTC_NUMBER, 0
-.set Debug_Timer_Interrupt__INTC_PRIOR_NUM, 7
-.set Debug_Timer_Interrupt__INTC_PRIOR_REG, CYREG_NVIC_PRI_0
-.set Debug_Timer_Interrupt__INTC_SET_EN_REG, CYREG_NVIC_SETENA0
-.set Debug_Timer_Interrupt__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0
-
-/* Debug_Timer_TimerHW */
-.set Debug_Timer_TimerHW__CAP0, CYREG_TMR0_CAP0
-.set Debug_Timer_TimerHW__CAP1, CYREG_TMR0_CAP1
-.set Debug_Timer_TimerHW__CFG0, CYREG_TMR0_CFG0
-.set Debug_Timer_TimerHW__CFG1, CYREG_TMR0_CFG1
-.set Debug_Timer_TimerHW__CFG2, CYREG_TMR0_CFG2
-.set Debug_Timer_TimerHW__CNT_CMP0, CYREG_TMR0_CNT_CMP0
-.set Debug_Timer_TimerHW__CNT_CMP1, CYREG_TMR0_CNT_CMP1
-.set Debug_Timer_TimerHW__PER0, CYREG_TMR0_PER0
-.set Debug_Timer_TimerHW__PER1, CYREG_TMR0_PER1
-.set Debug_Timer_TimerHW__PM_ACT_CFG, CYREG_PM_ACT_CFG3
-.set Debug_Timer_TimerHW__PM_ACT_MSK, 0x01
-.set Debug_Timer_TimerHW__PM_STBY_CFG, CYREG_PM_STBY_CFG3
-.set Debug_Timer_TimerHW__PM_STBY_MSK, 0x01
-.set Debug_Timer_TimerHW__RT0, CYREG_TMR0_RT0
-.set Debug_Timer_TimerHW__RT1, CYREG_TMR0_RT1
-.set Debug_Timer_TimerHW__SR0, CYREG_TMR0_SR0
-
/* LED1 */
.set LED1__0__INTTYPE, CYREG_PICU12_INTTYPE0
.set LED1__0__MASK, 0x01
.set LED1__SIO_REG_HIFREQ, CYREG_PRT12_SIO_REG_HIFREQ
.set LED1__SLW, CYREG_PRT12_SLW
-/* SCSI_CLK */
-.set SCSI_CLK__CFG0, CYREG_CLKDIST_DCFG1_CFG0
-.set SCSI_CLK__CFG1, CYREG_CLKDIST_DCFG1_CFG1
-.set SCSI_CLK__CFG2, CYREG_CLKDIST_DCFG1_CFG2
-.set SCSI_CLK__CFG2_SRC_SEL_MASK, 0x07
-.set SCSI_CLK__INDEX, 0x01
-.set SCSI_CLK__PM_ACT_CFG, CYREG_PM_ACT_CFG2
-.set SCSI_CLK__PM_ACT_MSK, 0x02
-.set SCSI_CLK__PM_STBY_CFG, CYREG_PM_STBY_CFG2
-.set SCSI_CLK__PM_STBY_MSK, 0x02
-
-/* SCSI_CTL_PHASE */
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__0__MASK, 0x01
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__0__POS, 0
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__1__MASK, 0x02
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__1__POS, 1
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG, CYREG_B0_UDB02_03_ACTL
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG, CYREG_B0_UDB02_03_CTL
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG, CYREG_B0_UDB02_03_CTL
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG, CYREG_B0_UDB02_03_CTL
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG, CYREG_B0_UDB02_03_CTL
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_MASK_REG, CYREG_B0_UDB02_03_MSK
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG, CYREG_B0_UDB02_03_MSK
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG, CYREG_B0_UDB02_03_MSK
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG, CYREG_B0_UDB02_03_MSK
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__2__MASK, 0x04
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__2__POS, 2
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_AUX_CTL_REG, CYREG_B0_UDB02_ACTL
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_REG, CYREG_B0_UDB02_CTL
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_ST_REG, CYREG_B0_UDB02_ST_CTL
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_REG, CYREG_B0_UDB02_CTL
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_ST_REG, CYREG_B0_UDB02_ST_CTL
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__MASK, 0x07
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG, CYREG_B0_UDB02_MSK_ACTL
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG, CYREG_B0_UDB02_MSK_ACTL
-.set SCSI_CTL_PHASE_Sync_ctrl_reg__PERIOD_REG, CYREG_B0_UDB02_MSK
-
-/* SCSI_Filtered */
-.set SCSI_Filtered_sts_sts_reg__0__MASK, 0x01
-.set SCSI_Filtered_sts_sts_reg__0__POS, 0
-.set SCSI_Filtered_sts_sts_reg__1__MASK, 0x02
-.set SCSI_Filtered_sts_sts_reg__1__POS, 1
-.set SCSI_Filtered_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG, CYREG_B0_UDB11_12_ACTL
-.set SCSI_Filtered_sts_sts_reg__16BIT_STATUS_REG, CYREG_B0_UDB11_12_ST
-.set SCSI_Filtered_sts_sts_reg__2__MASK, 0x04
-.set SCSI_Filtered_sts_sts_reg__2__POS, 2
-.set SCSI_Filtered_sts_sts_reg__3__MASK, 0x08
-.set SCSI_Filtered_sts_sts_reg__3__POS, 3
-.set SCSI_Filtered_sts_sts_reg__4__MASK, 0x10
-.set SCSI_Filtered_sts_sts_reg__4__POS, 4
-.set SCSI_Filtered_sts_sts_reg__MASK, 0x1F
-.set SCSI_Filtered_sts_sts_reg__MASK_REG, CYREG_B0_UDB11_MSK
-.set SCSI_Filtered_sts_sts_reg__MASK_ST_AUX_CTL_REG, CYREG_B0_UDB11_MSK_ACTL
-.set SCSI_Filtered_sts_sts_reg__PER_ST_AUX_CTL_REG, CYREG_B0_UDB11_MSK_ACTL
-.set SCSI_Filtered_sts_sts_reg__STATUS_AUX_CTL_REG, CYREG_B0_UDB11_ACTL
-.set SCSI_Filtered_sts_sts_reg__STATUS_CNT_REG, CYREG_B0_UDB11_ST_CTL
-.set SCSI_Filtered_sts_sts_reg__STATUS_CONTROL_REG, CYREG_B0_UDB11_ST_CTL
-.set SCSI_Filtered_sts_sts_reg__STATUS_REG, CYREG_B0_UDB11_ST
-
-/* SCSI_Glitch_Ctl */
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__0__MASK, 0x01
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__0__POS, 0
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG, CYREG_B0_UDB05_06_ACTL
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG, CYREG_B0_UDB05_06_CTL
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG, CYREG_B0_UDB05_06_CTL
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG, CYREG_B0_UDB05_06_CTL
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG, CYREG_B0_UDB05_06_CTL
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG, CYREG_B0_UDB05_06_MSK
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG, CYREG_B0_UDB05_06_MSK
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG, CYREG_B0_UDB05_06_MSK
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG, CYREG_B0_UDB05_06_MSK
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG, CYREG_B0_UDB05_ACTL
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_REG, CYREG_B0_UDB05_CTL
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_ST_REG, CYREG_B0_UDB05_ST_CTL
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__COUNT_REG, CYREG_B0_UDB05_CTL
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__COUNT_ST_REG, CYREG_B0_UDB05_ST_CTL
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__MASK, 0x01
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG, CYREG_B0_UDB05_MSK_ACTL
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG, CYREG_B0_UDB05_MSK_ACTL
-.set SCSI_Glitch_Ctl_Sync_ctrl_reg__PERIOD_REG, CYREG_B0_UDB05_MSK
-
-/* SCSI_In */
-.set SCSI_In__0__INTTYPE, CYREG_PICU6_INTTYPE1
-.set SCSI_In__0__MASK, 0x02
-.set SCSI_In__0__PC, CYREG_PRT6_PC1
-.set SCSI_In__0__PORT, 6
-.set SCSI_In__0__SHIFT, 1
-.set SCSI_In__AG, CYREG_PRT6_AG
-.set SCSI_In__AMUX, CYREG_PRT6_AMUX
-.set SCSI_In__BIE, CYREG_PRT6_BIE
-.set SCSI_In__BIT_MASK, CYREG_PRT6_BIT_MASK
-.set SCSI_In__BYP, CYREG_PRT6_BYP
-.set SCSI_In__CTL, CYREG_PRT6_CTL
-.set SCSI_In__DBP__INTTYPE, CYREG_PICU6_INTTYPE1
-.set SCSI_In__DBP__MASK, 0x02
-.set SCSI_In__DBP__PC, CYREG_PRT6_PC1
-.set SCSI_In__DBP__PORT, 6
-.set SCSI_In__DBP__SHIFT, 1
-.set SCSI_In__DM0, CYREG_PRT6_DM0
-.set SCSI_In__DM1, CYREG_PRT6_DM1
-.set SCSI_In__DM2, CYREG_PRT6_DM2
-.set SCSI_In__DR, CYREG_PRT6_DR
-.set SCSI_In__INP_DIS, CYREG_PRT6_INP_DIS
-.set SCSI_In__INTTYPE_BASE, CYDEV_PICU_INTTYPE_PICU6_BASE
-.set SCSI_In__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG
-.set SCSI_In__LCD_EN, CYREG_PRT6_LCD_EN
-.set SCSI_In__MASK, 0x02
-.set SCSI_In__PORT, 6
-.set SCSI_In__PRT, CYREG_PRT6_PRT
-.set SCSI_In__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL
-.set SCSI_In__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN
-.set SCSI_In__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0
-.set SCSI_In__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1
-.set SCSI_In__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0
-.set SCSI_In__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1
-.set SCSI_In__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT
-.set SCSI_In__PS, CYREG_PRT6_PS
-.set SCSI_In__SHIFT, 1
-.set SCSI_In__SLW, CYREG_PRT6_SLW
-.set SCSI_In_DBx__0__AG, CYREG_PRT6_AG
-.set SCSI_In_DBx__0__AMUX, CYREG_PRT6_AMUX
-.set SCSI_In_DBx__0__BIE, CYREG_PRT6_BIE
-.set SCSI_In_DBx__0__BIT_MASK, CYREG_PRT6_BIT_MASK
-.set SCSI_In_DBx__0__BYP, CYREG_PRT6_BYP
-.set SCSI_In_DBx__0__CTL, CYREG_PRT6_CTL
-.set SCSI_In_DBx__0__DM0, CYREG_PRT6_DM0
-.set SCSI_In_DBx__0__DM1, CYREG_PRT6_DM1
-.set SCSI_In_DBx__0__DM2, CYREG_PRT6_DM2
-.set SCSI_In_DBx__0__DR, CYREG_PRT6_DR
-.set SCSI_In_DBx__0__INP_DIS, CYREG_PRT6_INP_DIS
-.set SCSI_In_DBx__0__INTTYPE, CYREG_PICU6_INTTYPE6
-.set SCSI_In_DBx__0__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG
-.set SCSI_In_DBx__0__LCD_EN, CYREG_PRT6_LCD_EN
-.set SCSI_In_DBx__0__MASK, 0x40
-.set SCSI_In_DBx__0__PC, CYREG_PRT6_PC6
-.set SCSI_In_DBx__0__PORT, 6
-.set SCSI_In_DBx__0__PRT, CYREG_PRT6_PRT
-.set SCSI_In_DBx__0__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL
-.set SCSI_In_DBx__0__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN
-.set SCSI_In_DBx__0__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0
-.set SCSI_In_DBx__0__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1
-.set SCSI_In_DBx__0__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0
-.set SCSI_In_DBx__0__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1
-.set SCSI_In_DBx__0__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT
-.set SCSI_In_DBx__0__PS, CYREG_PRT6_PS
-.set SCSI_In_DBx__0__SHIFT, 6
-.set SCSI_In_DBx__0__SLW, CYREG_PRT6_SLW
-.set SCSI_In_DBx__1__AG, CYREG_PRT6_AG
-.set SCSI_In_DBx__1__AMUX, CYREG_PRT6_AMUX
-.set SCSI_In_DBx__1__BIE, CYREG_PRT6_BIE
-.set SCSI_In_DBx__1__BIT_MASK, CYREG_PRT6_BIT_MASK
-.set SCSI_In_DBx__1__BYP, CYREG_PRT6_BYP
-.set SCSI_In_DBx__1__CTL, CYREG_PRT6_CTL
-.set SCSI_In_DBx__1__DM0, CYREG_PRT6_DM0
-.set SCSI_In_DBx__1__DM1, CYREG_PRT6_DM1
-.set SCSI_In_DBx__1__DM2, CYREG_PRT6_DM2
-.set SCSI_In_DBx__1__DR, CYREG_PRT6_DR
-.set SCSI_In_DBx__1__INP_DIS, CYREG_PRT6_INP_DIS
-.set SCSI_In_DBx__1__INTTYPE, CYREG_PICU6_INTTYPE4
-.set SCSI_In_DBx__1__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG
-.set SCSI_In_DBx__1__LCD_EN, CYREG_PRT6_LCD_EN
-.set SCSI_In_DBx__1__MASK, 0x10
-.set SCSI_In_DBx__1__PC, CYREG_PRT6_PC4
-.set SCSI_In_DBx__1__PORT, 6
-.set SCSI_In_DBx__1__PRT, CYREG_PRT6_PRT
-.set SCSI_In_DBx__1__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL
-.set SCSI_In_DBx__1__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN
-.set SCSI_In_DBx__1__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0
-.set SCSI_In_DBx__1__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1
-.set SCSI_In_DBx__1__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0
-.set SCSI_In_DBx__1__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1
-.set SCSI_In_DBx__1__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT
-.set SCSI_In_DBx__1__PS, CYREG_PRT6_PS
-.set SCSI_In_DBx__1__SHIFT, 4
-.set SCSI_In_DBx__1__SLW, CYREG_PRT6_SLW
-.set SCSI_In_DBx__2__AG, CYREG_PRT12_AG
-.set SCSI_In_DBx__2__BIE, CYREG_PRT12_BIE
-.set SCSI_In_DBx__2__BIT_MASK, CYREG_PRT12_BIT_MASK
-.set SCSI_In_DBx__2__BYP, CYREG_PRT12_BYP
-.set SCSI_In_DBx__2__DM0, CYREG_PRT12_DM0
-.set SCSI_In_DBx__2__DM1, CYREG_PRT12_DM1
-.set SCSI_In_DBx__2__DM2, CYREG_PRT12_DM2
-.set SCSI_In_DBx__2__DR, CYREG_PRT12_DR
-.set SCSI_In_DBx__2__INP_DIS, CYREG_PRT12_INP_DIS
-.set SCSI_In_DBx__2__INTTYPE, CYREG_PICU12_INTTYPE4
-.set SCSI_In_DBx__2__MASK, 0x10
-.set SCSI_In_DBx__2__PC, CYREG_PRT12_PC4
-.set SCSI_In_DBx__2__PORT, 12
-.set SCSI_In_DBx__2__PRT, CYREG_PRT12_PRT
-.set SCSI_In_DBx__2__PRTDSI__DBL_SYNC_IN, CYREG_PRT12_DBL_SYNC_IN
-.set SCSI_In_DBx__2__PRTDSI__OE_SEL0, CYREG_PRT12_OE_SEL0
-.set SCSI_In_DBx__2__PRTDSI__OE_SEL1, CYREG_PRT12_OE_SEL1
-.set SCSI_In_DBx__2__PRTDSI__OUT_SEL0, CYREG_PRT12_OUT_SEL0
-.set SCSI_In_DBx__2__PRTDSI__OUT_SEL1, CYREG_PRT12_OUT_SEL1
-.set SCSI_In_DBx__2__PRTDSI__SYNC_OUT, CYREG_PRT12_SYNC_OUT
-.set SCSI_In_DBx__2__PS, CYREG_PRT12_PS
-.set SCSI_In_DBx__2__SHIFT, 4
-.set SCSI_In_DBx__2__SIO_CFG, CYREG_PRT12_SIO_CFG
-.set SCSI_In_DBx__2__SIO_DIFF, CYREG_PRT12_SIO_DIFF
-.set SCSI_In_DBx__2__SIO_HYST_EN, CYREG_PRT12_SIO_HYST_EN
-.set SCSI_In_DBx__2__SIO_REG_HIFREQ, CYREG_PRT12_SIO_REG_HIFREQ
-.set SCSI_In_DBx__2__SLW, CYREG_PRT12_SLW
-.set SCSI_In_DBx__3__AG, CYREG_PRT2_AG
-.set SCSI_In_DBx__3__AMUX, CYREG_PRT2_AMUX
-.set SCSI_In_DBx__3__BIE, CYREG_PRT2_BIE
-.set SCSI_In_DBx__3__BIT_MASK, CYREG_PRT2_BIT_MASK
-.set SCSI_In_DBx__3__BYP, CYREG_PRT2_BYP
-.set SCSI_In_DBx__3__CTL, CYREG_PRT2_CTL
-.set SCSI_In_DBx__3__DM0, CYREG_PRT2_DM0
-.set SCSI_In_DBx__3__DM1, CYREG_PRT2_DM1
-.set SCSI_In_DBx__3__DM2, CYREG_PRT2_DM2
-.set SCSI_In_DBx__3__DR, CYREG_PRT2_DR
-.set SCSI_In_DBx__3__INP_DIS, CYREG_PRT2_INP_DIS
-.set SCSI_In_DBx__3__INTTYPE, CYREG_PICU2_INTTYPE6
-.set SCSI_In_DBx__3__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG
-.set SCSI_In_DBx__3__LCD_EN, CYREG_PRT2_LCD_EN
-.set SCSI_In_DBx__3__MASK, 0x40
-.set SCSI_In_DBx__3__PC, CYREG_PRT2_PC6
-.set SCSI_In_DBx__3__PORT, 2
-.set SCSI_In_DBx__3__PRT, CYREG_PRT2_PRT
-.set SCSI_In_DBx__3__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL
-.set SCSI_In_DBx__3__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN
-.set SCSI_In_DBx__3__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0
-.set SCSI_In_DBx__3__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1
-.set SCSI_In_DBx__3__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0
-.set SCSI_In_DBx__3__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1
-.set SCSI_In_DBx__3__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT
-.set SCSI_In_DBx__3__PS, CYREG_PRT2_PS
-.set SCSI_In_DBx__3__SHIFT, 6
-.set SCSI_In_DBx__3__SLW, CYREG_PRT2_SLW
-.set SCSI_In_DBx__4__AG, CYREG_PRT2_AG
-.set SCSI_In_DBx__4__AMUX, CYREG_PRT2_AMUX
-.set SCSI_In_DBx__4__BIE, CYREG_PRT2_BIE
-.set SCSI_In_DBx__4__BIT_MASK, CYREG_PRT2_BIT_MASK
-.set SCSI_In_DBx__4__BYP, CYREG_PRT2_BYP
-.set SCSI_In_DBx__4__CTL, CYREG_PRT2_CTL
-.set SCSI_In_DBx__4__DM0, CYREG_PRT2_DM0
-.set SCSI_In_DBx__4__DM1, CYREG_PRT2_DM1
-.set SCSI_In_DBx__4__DM2, CYREG_PRT2_DM2
-.set SCSI_In_DBx__4__DR, CYREG_PRT2_DR
-.set SCSI_In_DBx__4__INP_DIS, CYREG_PRT2_INP_DIS
-.set SCSI_In_DBx__4__INTTYPE, CYREG_PICU2_INTTYPE4
-.set SCSI_In_DBx__4__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG
-.set SCSI_In_DBx__4__LCD_EN, CYREG_PRT2_LCD_EN
-.set SCSI_In_DBx__4__MASK, 0x10
-.set SCSI_In_DBx__4__PC, CYREG_PRT2_PC4
-.set SCSI_In_DBx__4__PORT, 2
-.set SCSI_In_DBx__4__PRT, CYREG_PRT2_PRT
-.set SCSI_In_DBx__4__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL
-.set SCSI_In_DBx__4__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN
-.set SCSI_In_DBx__4__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0
-.set SCSI_In_DBx__4__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1
-.set SCSI_In_DBx__4__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0
-.set SCSI_In_DBx__4__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1
-.set SCSI_In_DBx__4__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT
-.set SCSI_In_DBx__4__PS, CYREG_PRT2_PS
-.set SCSI_In_DBx__4__SHIFT, 4
-.set SCSI_In_DBx__4__SLW, CYREG_PRT2_SLW
-.set SCSI_In_DBx__5__AG, CYREG_PRT2_AG
-.set SCSI_In_DBx__5__AMUX, CYREG_PRT2_AMUX
-.set SCSI_In_DBx__5__BIE, CYREG_PRT2_BIE
-.set SCSI_In_DBx__5__BIT_MASK, CYREG_PRT2_BIT_MASK
-.set SCSI_In_DBx__5__BYP, CYREG_PRT2_BYP
-.set SCSI_In_DBx__5__CTL, CYREG_PRT2_CTL
-.set SCSI_In_DBx__5__DM0, CYREG_PRT2_DM0
-.set SCSI_In_DBx__5__DM1, CYREG_PRT2_DM1
-.set SCSI_In_DBx__5__DM2, CYREG_PRT2_DM2
-.set SCSI_In_DBx__5__DR, CYREG_PRT2_DR
-.set SCSI_In_DBx__5__INP_DIS, CYREG_PRT2_INP_DIS
-.set SCSI_In_DBx__5__INTTYPE, CYREG_PICU2_INTTYPE2
-.set SCSI_In_DBx__5__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG
-.set SCSI_In_DBx__5__LCD_EN, CYREG_PRT2_LCD_EN
-.set SCSI_In_DBx__5__MASK, 0x04
-.set SCSI_In_DBx__5__PC, CYREG_PRT2_PC2
-.set SCSI_In_DBx__5__PORT, 2
-.set SCSI_In_DBx__5__PRT, CYREG_PRT2_PRT
-.set SCSI_In_DBx__5__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL
-.set SCSI_In_DBx__5__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN
-.set SCSI_In_DBx__5__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0
-.set SCSI_In_DBx__5__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1
-.set SCSI_In_DBx__5__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0
-.set SCSI_In_DBx__5__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1
-.set SCSI_In_DBx__5__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT
-.set SCSI_In_DBx__5__PS, CYREG_PRT2_PS
-.set SCSI_In_DBx__5__SHIFT, 2
-.set SCSI_In_DBx__5__SLW, CYREG_PRT2_SLW
-.set SCSI_In_DBx__6__AG, CYREG_PRT2_AG
-.set SCSI_In_DBx__6__AMUX, CYREG_PRT2_AMUX
-.set SCSI_In_DBx__6__BIE, CYREG_PRT2_BIE
-.set SCSI_In_DBx__6__BIT_MASK, CYREG_PRT2_BIT_MASK
-.set SCSI_In_DBx__6__BYP, CYREG_PRT2_BYP
-.set SCSI_In_DBx__6__CTL, CYREG_PRT2_CTL
-.set SCSI_In_DBx__6__DM0, CYREG_PRT2_DM0
-.set SCSI_In_DBx__6__DM1, CYREG_PRT2_DM1
-.set SCSI_In_DBx__6__DM2, CYREG_PRT2_DM2
-.set SCSI_In_DBx__6__DR, CYREG_PRT2_DR
-.set SCSI_In_DBx__6__INP_DIS, CYREG_PRT2_INP_DIS
-.set SCSI_In_DBx__6__INTTYPE, CYREG_PICU2_INTTYPE0
-.set SCSI_In_DBx__6__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG
-.set SCSI_In_DBx__6__LCD_EN, CYREG_PRT2_LCD_EN
-.set SCSI_In_DBx__6__MASK, 0x01
-.set SCSI_In_DBx__6__PC, CYREG_PRT2_PC0
-.set SCSI_In_DBx__6__PORT, 2
-.set SCSI_In_DBx__6__PRT, CYREG_PRT2_PRT
-.set SCSI_In_DBx__6__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL
-.set SCSI_In_DBx__6__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN
-.set SCSI_In_DBx__6__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0
-.set SCSI_In_DBx__6__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1
-.set SCSI_In_DBx__6__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0
-.set SCSI_In_DBx__6__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1
-.set SCSI_In_DBx__6__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT
-.set SCSI_In_DBx__6__PS, CYREG_PRT2_PS
-.set SCSI_In_DBx__6__SHIFT, 0
-.set SCSI_In_DBx__6__SLW, CYREG_PRT2_SLW
-.set SCSI_In_DBx__7__AG, CYREG_PRT6_AG
-.set SCSI_In_DBx__7__AMUX, CYREG_PRT6_AMUX
-.set SCSI_In_DBx__7__BIE, CYREG_PRT6_BIE
-.set SCSI_In_DBx__7__BIT_MASK, CYREG_PRT6_BIT_MASK
-.set SCSI_In_DBx__7__BYP, CYREG_PRT6_BYP
-.set SCSI_In_DBx__7__CTL, CYREG_PRT6_CTL
-.set SCSI_In_DBx__7__DM0, CYREG_PRT6_DM0
-.set SCSI_In_DBx__7__DM1, CYREG_PRT6_DM1
-.set SCSI_In_DBx__7__DM2, CYREG_PRT6_DM2
-.set SCSI_In_DBx__7__DR, CYREG_PRT6_DR
-.set SCSI_In_DBx__7__INP_DIS, CYREG_PRT6_INP_DIS
-.set SCSI_In_DBx__7__INTTYPE, CYREG_PICU6_INTTYPE3
-.set SCSI_In_DBx__7__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG
-.set SCSI_In_DBx__7__LCD_EN, CYREG_PRT6_LCD_EN
-.set SCSI_In_DBx__7__MASK, 0x08
-.set SCSI_In_DBx__7__PC, CYREG_PRT6_PC3
-.set SCSI_In_DBx__7__PORT, 6
-.set SCSI_In_DBx__7__PRT, CYREG_PRT6_PRT
-.set SCSI_In_DBx__7__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL
-.set SCSI_In_DBx__7__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN
-.set SCSI_In_DBx__7__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0
-.set SCSI_In_DBx__7__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1
-.set SCSI_In_DBx__7__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0
-.set SCSI_In_DBx__7__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1
-.set SCSI_In_DBx__7__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT
-.set SCSI_In_DBx__7__PS, CYREG_PRT6_PS
-.set SCSI_In_DBx__7__SHIFT, 3
-.set SCSI_In_DBx__7__SLW, CYREG_PRT6_SLW
-.set SCSI_In_DBx__DB0__AG, CYREG_PRT6_AG
-.set SCSI_In_DBx__DB0__AMUX, CYREG_PRT6_AMUX
-.set SCSI_In_DBx__DB0__BIE, CYREG_PRT6_BIE
-.set SCSI_In_DBx__DB0__BIT_MASK, CYREG_PRT6_BIT_MASK
-.set SCSI_In_DBx__DB0__BYP, CYREG_PRT6_BYP
-.set SCSI_In_DBx__DB0__CTL, CYREG_PRT6_CTL
-.set SCSI_In_DBx__DB0__DM0, CYREG_PRT6_DM0
-.set SCSI_In_DBx__DB0__DM1, CYREG_PRT6_DM1
-.set SCSI_In_DBx__DB0__DM2, CYREG_PRT6_DM2
-.set SCSI_In_DBx__DB0__DR, CYREG_PRT6_DR
-.set SCSI_In_DBx__DB0__INP_DIS, CYREG_PRT6_INP_DIS
-.set SCSI_In_DBx__DB0__INTTYPE, CYREG_PICU6_INTTYPE6
-.set SCSI_In_DBx__DB0__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG
-.set SCSI_In_DBx__DB0__LCD_EN, CYREG_PRT6_LCD_EN
-.set SCSI_In_DBx__DB0__MASK, 0x40
-.set SCSI_In_DBx__DB0__PC, CYREG_PRT6_PC6
-.set SCSI_In_DBx__DB0__PORT, 6
-.set SCSI_In_DBx__DB0__PRT, CYREG_PRT6_PRT
-.set SCSI_In_DBx__DB0__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL
-.set SCSI_In_DBx__DB0__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN
-.set SCSI_In_DBx__DB0__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0
-.set SCSI_In_DBx__DB0__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1
-.set SCSI_In_DBx__DB0__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0
-.set SCSI_In_DBx__DB0__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1
-.set SCSI_In_DBx__DB0__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT
-.set SCSI_In_DBx__DB0__PS, CYREG_PRT6_PS
-.set SCSI_In_DBx__DB0__SHIFT, 6
-.set SCSI_In_DBx__DB0__SLW, CYREG_PRT6_SLW
-.set SCSI_In_DBx__DB1__AG, CYREG_PRT6_AG
-.set SCSI_In_DBx__DB1__AMUX, CYREG_PRT6_AMUX
-.set SCSI_In_DBx__DB1__BIE, CYREG_PRT6_BIE
-.set SCSI_In_DBx__DB1__BIT_MASK, CYREG_PRT6_BIT_MASK
-.set SCSI_In_DBx__DB1__BYP, CYREG_PRT6_BYP
-.set SCSI_In_DBx__DB1__CTL, CYREG_PRT6_CTL
-.set SCSI_In_DBx__DB1__DM0, CYREG_PRT6_DM0
-.set SCSI_In_DBx__DB1__DM1, CYREG_PRT6_DM1
-.set SCSI_In_DBx__DB1__DM2, CYREG_PRT6_DM2
-.set SCSI_In_DBx__DB1__DR, CYREG_PRT6_DR
-.set SCSI_In_DBx__DB1__INP_DIS, CYREG_PRT6_INP_DIS
-.set SCSI_In_DBx__DB1__INTTYPE, CYREG_PICU6_INTTYPE4
-.set SCSI_In_DBx__DB1__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG
-.set SCSI_In_DBx__DB1__LCD_EN, CYREG_PRT6_LCD_EN
-.set SCSI_In_DBx__DB1__MASK, 0x10
-.set SCSI_In_DBx__DB1__PC, CYREG_PRT6_PC4
-.set SCSI_In_DBx__DB1__PORT, 6
-.set SCSI_In_DBx__DB1__PRT, CYREG_PRT6_PRT
-.set SCSI_In_DBx__DB1__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL
-.set SCSI_In_DBx__DB1__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN
-.set SCSI_In_DBx__DB1__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0
-.set SCSI_In_DBx__DB1__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1
-.set SCSI_In_DBx__DB1__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0
-.set SCSI_In_DBx__DB1__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1
-.set SCSI_In_DBx__DB1__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT
-.set SCSI_In_DBx__DB1__PS, CYREG_PRT6_PS
-.set SCSI_In_DBx__DB1__SHIFT, 4
-.set SCSI_In_DBx__DB1__SLW, CYREG_PRT6_SLW
-.set SCSI_In_DBx__DB2__AG, CYREG_PRT12_AG
-.set SCSI_In_DBx__DB2__BIE, CYREG_PRT12_BIE
-.set SCSI_In_DBx__DB2__BIT_MASK, CYREG_PRT12_BIT_MASK
-.set SCSI_In_DBx__DB2__BYP, CYREG_PRT12_BYP
-.set SCSI_In_DBx__DB2__DM0, CYREG_PRT12_DM0
-.set SCSI_In_DBx__DB2__DM1, CYREG_PRT12_DM1
-.set SCSI_In_DBx__DB2__DM2, CYREG_PRT12_DM2
-.set SCSI_In_DBx__DB2__DR, CYREG_PRT12_DR
-.set SCSI_In_DBx__DB2__INP_DIS, CYREG_PRT12_INP_DIS
-.set SCSI_In_DBx__DB2__INTTYPE, CYREG_PICU12_INTTYPE4
-.set SCSI_In_DBx__DB2__MASK, 0x10
-.set SCSI_In_DBx__DB2__PC, CYREG_PRT12_PC4
-.set SCSI_In_DBx__DB2__PORT, 12
-.set SCSI_In_DBx__DB2__PRT, CYREG_PRT12_PRT
-.set SCSI_In_DBx__DB2__PRTDSI__DBL_SYNC_IN, CYREG_PRT12_DBL_SYNC_IN
-.set SCSI_In_DBx__DB2__PRTDSI__OE_SEL0, CYREG_PRT12_OE_SEL0
-.set SCSI_In_DBx__DB2__PRTDSI__OE_SEL1, CYREG_PRT12_OE_SEL1
-.set SCSI_In_DBx__DB2__PRTDSI__OUT_SEL0, CYREG_PRT12_OUT_SEL0
-.set SCSI_In_DBx__DB2__PRTDSI__OUT_SEL1, CYREG_PRT12_OUT_SEL1
-.set SCSI_In_DBx__DB2__PRTDSI__SYNC_OUT, CYREG_PRT12_SYNC_OUT
-.set SCSI_In_DBx__DB2__PS, CYREG_PRT12_PS
-.set SCSI_In_DBx__DB2__SHIFT, 4
-.set SCSI_In_DBx__DB2__SIO_CFG, CYREG_PRT12_SIO_CFG
-.set SCSI_In_DBx__DB2__SIO_DIFF, CYREG_PRT12_SIO_DIFF
-.set SCSI_In_DBx__DB2__SIO_HYST_EN, CYREG_PRT12_SIO_HYST_EN
-.set SCSI_In_DBx__DB2__SIO_REG_HIFREQ, CYREG_PRT12_SIO_REG_HIFREQ
-.set SCSI_In_DBx__DB2__SLW, CYREG_PRT12_SLW
-.set SCSI_In_DBx__DB3__AG, CYREG_PRT2_AG
-.set SCSI_In_DBx__DB3__AMUX, CYREG_PRT2_AMUX
-.set SCSI_In_DBx__DB3__BIE, CYREG_PRT2_BIE
-.set SCSI_In_DBx__DB3__BIT_MASK, CYREG_PRT2_BIT_MASK
-.set SCSI_In_DBx__DB3__BYP, CYREG_PRT2_BYP
-.set SCSI_In_DBx__DB3__CTL, CYREG_PRT2_CTL
-.set SCSI_In_DBx__DB3__DM0, CYREG_PRT2_DM0
-.set SCSI_In_DBx__DB3__DM1, CYREG_PRT2_DM1
-.set SCSI_In_DBx__DB3__DM2, CYREG_PRT2_DM2
-.set SCSI_In_DBx__DB3__DR, CYREG_PRT2_DR
-.set SCSI_In_DBx__DB3__INP_DIS, CYREG_PRT2_INP_DIS
-.set SCSI_In_DBx__DB3__INTTYPE, CYREG_PICU2_INTTYPE6
-.set SCSI_In_DBx__DB3__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG
-.set SCSI_In_DBx__DB3__LCD_EN, CYREG_PRT2_LCD_EN
-.set SCSI_In_DBx__DB3__MASK, 0x40
-.set SCSI_In_DBx__DB3__PC, CYREG_PRT2_PC6
-.set SCSI_In_DBx__DB3__PORT, 2
-.set SCSI_In_DBx__DB3__PRT, CYREG_PRT2_PRT
-.set SCSI_In_DBx__DB3__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL
-.set SCSI_In_DBx__DB3__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN
-.set SCSI_In_DBx__DB3__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0
-.set SCSI_In_DBx__DB3__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1
-.set SCSI_In_DBx__DB3__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0
-.set SCSI_In_DBx__DB3__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1
-.set SCSI_In_DBx__DB3__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT
-.set SCSI_In_DBx__DB3__PS, CYREG_PRT2_PS
-.set SCSI_In_DBx__DB3__SHIFT, 6
-.set SCSI_In_DBx__DB3__SLW, CYREG_PRT2_SLW
-.set SCSI_In_DBx__DB4__AG, CYREG_PRT2_AG
-.set SCSI_In_DBx__DB4__AMUX, CYREG_PRT2_AMUX
-.set SCSI_In_DBx__DB4__BIE, CYREG_PRT2_BIE
-.set SCSI_In_DBx__DB4__BIT_MASK, CYREG_PRT2_BIT_MASK
-.set SCSI_In_DBx__DB4__BYP, CYREG_PRT2_BYP
-.set SCSI_In_DBx__DB4__CTL, CYREG_PRT2_CTL
-.set SCSI_In_DBx__DB4__DM0, CYREG_PRT2_DM0
-.set SCSI_In_DBx__DB4__DM1, CYREG_PRT2_DM1
-.set SCSI_In_DBx__DB4__DM2, CYREG_PRT2_DM2
-.set SCSI_In_DBx__DB4__DR, CYREG_PRT2_DR
-.set SCSI_In_DBx__DB4__INP_DIS, CYREG_PRT2_INP_DIS
-.set SCSI_In_DBx__DB4__INTTYPE, CYREG_PICU2_INTTYPE4
-.set SCSI_In_DBx__DB4__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG
-.set SCSI_In_DBx__DB4__LCD_EN, CYREG_PRT2_LCD_EN
-.set SCSI_In_DBx__DB4__MASK, 0x10
-.set SCSI_In_DBx__DB4__PC, CYREG_PRT2_PC4
-.set SCSI_In_DBx__DB4__PORT, 2
-.set SCSI_In_DBx__DB4__PRT, CYREG_PRT2_PRT
-.set SCSI_In_DBx__DB4__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL
-.set SCSI_In_DBx__DB4__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN
-.set SCSI_In_DBx__DB4__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0
-.set SCSI_In_DBx__DB4__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1
-.set SCSI_In_DBx__DB4__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0
-.set SCSI_In_DBx__DB4__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1
-.set SCSI_In_DBx__DB4__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT
-.set SCSI_In_DBx__DB4__PS, CYREG_PRT2_PS
-.set SCSI_In_DBx__DB4__SHIFT, 4
-.set SCSI_In_DBx__DB4__SLW, CYREG_PRT2_SLW
-.set SCSI_In_DBx__DB5__AG, CYREG_PRT2_AG
-.set SCSI_In_DBx__DB5__AMUX, CYREG_PRT2_AMUX
-.set SCSI_In_DBx__DB5__BIE, CYREG_PRT2_BIE
-.set SCSI_In_DBx__DB5__BIT_MASK, CYREG_PRT2_BIT_MASK
-.set SCSI_In_DBx__DB5__BYP, CYREG_PRT2_BYP
-.set SCSI_In_DBx__DB5__CTL, CYREG_PRT2_CTL
-.set SCSI_In_DBx__DB5__DM0, CYREG_PRT2_DM0
-.set SCSI_In_DBx__DB5__DM1, CYREG_PRT2_DM1
-.set SCSI_In_DBx__DB5__DM2, CYREG_PRT2_DM2
-.set SCSI_In_DBx__DB5__DR, CYREG_PRT2_DR
-.set SCSI_In_DBx__DB5__INP_DIS, CYREG_PRT2_INP_DIS
-.set SCSI_In_DBx__DB5__INTTYPE, CYREG_PICU2_INTTYPE2
-.set SCSI_In_DBx__DB5__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG
-.set SCSI_In_DBx__DB5__LCD_EN, CYREG_PRT2_LCD_EN
-.set SCSI_In_DBx__DB5__MASK, 0x04
-.set SCSI_In_DBx__DB5__PC, CYREG_PRT2_PC2
-.set SCSI_In_DBx__DB5__PORT, 2
-.set SCSI_In_DBx__DB5__PRT, CYREG_PRT2_PRT
-.set SCSI_In_DBx__DB5__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL
-.set SCSI_In_DBx__DB5__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN
-.set SCSI_In_DBx__DB5__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0
-.set SCSI_In_DBx__DB5__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1
-.set SCSI_In_DBx__DB5__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0
-.set SCSI_In_DBx__DB5__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1
-.set SCSI_In_DBx__DB5__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT
-.set SCSI_In_DBx__DB5__PS, CYREG_PRT2_PS
-.set SCSI_In_DBx__DB5__SHIFT, 2
-.set SCSI_In_DBx__DB5__SLW, CYREG_PRT2_SLW
-.set SCSI_In_DBx__DB6__AG, CYREG_PRT2_AG
-.set SCSI_In_DBx__DB6__AMUX, CYREG_PRT2_AMUX
-.set SCSI_In_DBx__DB6__BIE, CYREG_PRT2_BIE
-.set SCSI_In_DBx__DB6__BIT_MASK, CYREG_PRT2_BIT_MASK
-.set SCSI_In_DBx__DB6__BYP, CYREG_PRT2_BYP
-.set SCSI_In_DBx__DB6__CTL, CYREG_PRT2_CTL
-.set SCSI_In_DBx__DB6__DM0, CYREG_PRT2_DM0
-.set SCSI_In_DBx__DB6__DM1, CYREG_PRT2_DM1
-.set SCSI_In_DBx__DB6__DM2, CYREG_PRT2_DM2
-.set SCSI_In_DBx__DB6__DR, CYREG_PRT2_DR
-.set SCSI_In_DBx__DB6__INP_DIS, CYREG_PRT2_INP_DIS
-.set SCSI_In_DBx__DB6__INTTYPE, CYREG_PICU2_INTTYPE0
-.set SCSI_In_DBx__DB6__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG
-.set SCSI_In_DBx__DB6__LCD_EN, CYREG_PRT2_LCD_EN
-.set SCSI_In_DBx__DB6__MASK, 0x01
-.set SCSI_In_DBx__DB6__PC, CYREG_PRT2_PC0
-.set SCSI_In_DBx__DB6__PORT, 2
-.set SCSI_In_DBx__DB6__PRT, CYREG_PRT2_PRT
-.set SCSI_In_DBx__DB6__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL
-.set SCSI_In_DBx__DB6__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN
-.set SCSI_In_DBx__DB6__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0
-.set SCSI_In_DBx__DB6__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1
-.set SCSI_In_DBx__DB6__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0
-.set SCSI_In_DBx__DB6__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1
-.set SCSI_In_DBx__DB6__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT
-.set SCSI_In_DBx__DB6__PS, CYREG_PRT2_PS
-.set SCSI_In_DBx__DB6__SHIFT, 0
-.set SCSI_In_DBx__DB6__SLW, CYREG_PRT2_SLW
-.set SCSI_In_DBx__DB7__AG, CYREG_PRT6_AG
-.set SCSI_In_DBx__DB7__AMUX, CYREG_PRT6_AMUX
-.set SCSI_In_DBx__DB7__BIE, CYREG_PRT6_BIE
-.set SCSI_In_DBx__DB7__BIT_MASK, CYREG_PRT6_BIT_MASK
-.set SCSI_In_DBx__DB7__BYP, CYREG_PRT6_BYP
-.set SCSI_In_DBx__DB7__CTL, CYREG_PRT6_CTL
-.set SCSI_In_DBx__DB7__DM0, CYREG_PRT6_DM0
-.set SCSI_In_DBx__DB7__DM1, CYREG_PRT6_DM1
-.set SCSI_In_DBx__DB7__DM2, CYREG_PRT6_DM2
-.set SCSI_In_DBx__DB7__DR, CYREG_PRT6_DR
-.set SCSI_In_DBx__DB7__INP_DIS, CYREG_PRT6_INP_DIS
-.set SCSI_In_DBx__DB7__INTTYPE, CYREG_PICU6_INTTYPE3
-.set SCSI_In_DBx__DB7__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG
-.set SCSI_In_DBx__DB7__LCD_EN, CYREG_PRT6_LCD_EN
-.set SCSI_In_DBx__DB7__MASK, 0x08
-.set SCSI_In_DBx__DB7__PC, CYREG_PRT6_PC3
-.set SCSI_In_DBx__DB7__PORT, 6
-.set SCSI_In_DBx__DB7__PRT, CYREG_PRT6_PRT
-.set SCSI_In_DBx__DB7__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL
-.set SCSI_In_DBx__DB7__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN
-.set SCSI_In_DBx__DB7__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0
-.set SCSI_In_DBx__DB7__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1
-.set SCSI_In_DBx__DB7__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0
-.set SCSI_In_DBx__DB7__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1
-.set SCSI_In_DBx__DB7__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT
-.set SCSI_In_DBx__DB7__PS, CYREG_PRT6_PS
-.set SCSI_In_DBx__DB7__SHIFT, 3
-.set SCSI_In_DBx__DB7__SLW, CYREG_PRT6_SLW
-
-/* SCSI_Noise */
-.set SCSI_Noise__0__AG, CYREG_PRT4_AG
-.set SCSI_Noise__0__AMUX, CYREG_PRT4_AMUX
-.set SCSI_Noise__0__BIE, CYREG_PRT4_BIE
-.set SCSI_Noise__0__BIT_MASK, CYREG_PRT4_BIT_MASK
-.set SCSI_Noise__0__BYP, CYREG_PRT4_BYP
-.set SCSI_Noise__0__CTL, CYREG_PRT4_CTL
-.set SCSI_Noise__0__DM0, CYREG_PRT4_DM0
-.set SCSI_Noise__0__DM1, CYREG_PRT4_DM1
-.set SCSI_Noise__0__DM2, CYREG_PRT4_DM2
-.set SCSI_Noise__0__DR, CYREG_PRT4_DR
-.set SCSI_Noise__0__INP_DIS, CYREG_PRT4_INP_DIS
-.set SCSI_Noise__0__INTTYPE, CYREG_PICU4_INTTYPE7
-.set SCSI_Noise__0__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG
-.set SCSI_Noise__0__LCD_EN, CYREG_PRT4_LCD_EN
-.set SCSI_Noise__0__MASK, 0x80
-.set SCSI_Noise__0__PC, CYREG_PRT4_PC7
-.set SCSI_Noise__0__PORT, 4
-.set SCSI_Noise__0__PRT, CYREG_PRT4_PRT
-.set SCSI_Noise__0__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL
-.set SCSI_Noise__0__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN
-.set SCSI_Noise__0__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0
-.set SCSI_Noise__0__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1
-.set SCSI_Noise__0__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0
-.set SCSI_Noise__0__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1
-.set SCSI_Noise__0__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT
-.set SCSI_Noise__0__PS, CYREG_PRT4_PS
-.set SCSI_Noise__0__SHIFT, 7
-.set SCSI_Noise__0__SLW, CYREG_PRT4_SLW
-.set SCSI_Noise__1__AG, CYREG_PRT4_AG
-.set SCSI_Noise__1__AMUX, CYREG_PRT4_AMUX
-.set SCSI_Noise__1__BIE, CYREG_PRT4_BIE
-.set SCSI_Noise__1__BIT_MASK, CYREG_PRT4_BIT_MASK
-.set SCSI_Noise__1__BYP, CYREG_PRT4_BYP
-.set SCSI_Noise__1__CTL, CYREG_PRT4_CTL
-.set SCSI_Noise__1__DM0, CYREG_PRT4_DM0
-.set SCSI_Noise__1__DM1, CYREG_PRT4_DM1
-.set SCSI_Noise__1__DM2, CYREG_PRT4_DM2
-.set SCSI_Noise__1__DR, CYREG_PRT4_DR
-.set SCSI_Noise__1__INP_DIS, CYREG_PRT4_INP_DIS
-.set SCSI_Noise__1__INTTYPE, CYREG_PICU4_INTTYPE5
-.set SCSI_Noise__1__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG
-.set SCSI_Noise__1__LCD_EN, CYREG_PRT4_LCD_EN
-.set SCSI_Noise__1__MASK, 0x20
-.set SCSI_Noise__1__PC, CYREG_PRT4_PC5
-.set SCSI_Noise__1__PORT, 4
-.set SCSI_Noise__1__PRT, CYREG_PRT4_PRT
-.set SCSI_Noise__1__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL
-.set SCSI_Noise__1__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN
-.set SCSI_Noise__1__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0
-.set SCSI_Noise__1__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1
-.set SCSI_Noise__1__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0
-.set SCSI_Noise__1__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1
-.set SCSI_Noise__1__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT
-.set SCSI_Noise__1__PS, CYREG_PRT4_PS
-.set SCSI_Noise__1__SHIFT, 5
-.set SCSI_Noise__1__SLW, CYREG_PRT4_SLW
-.set SCSI_Noise__2__AG, CYREG_PRT0_AG
-.set SCSI_Noise__2__AMUX, CYREG_PRT0_AMUX
-.set SCSI_Noise__2__BIE, CYREG_PRT0_BIE
-.set SCSI_Noise__2__BIT_MASK, CYREG_PRT0_BIT_MASK
-.set SCSI_Noise__2__BYP, CYREG_PRT0_BYP
-.set SCSI_Noise__2__CTL, CYREG_PRT0_CTL
-.set SCSI_Noise__2__DM0, CYREG_PRT0_DM0
-.set SCSI_Noise__2__DM1, CYREG_PRT0_DM1
-.set SCSI_Noise__2__DM2, CYREG_PRT0_DM2
-.set SCSI_Noise__2__DR, CYREG_PRT0_DR
-.set SCSI_Noise__2__INP_DIS, CYREG_PRT0_INP_DIS
-.set SCSI_Noise__2__INTTYPE, CYREG_PICU0_INTTYPE2
-.set SCSI_Noise__2__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG
-.set SCSI_Noise__2__LCD_EN, CYREG_PRT0_LCD_EN
-.set SCSI_Noise__2__MASK, 0x04
-.set SCSI_Noise__2__PC, CYREG_PRT0_PC2
-.set SCSI_Noise__2__PORT, 0
-.set SCSI_Noise__2__PRT, CYREG_PRT0_PRT
-.set SCSI_Noise__2__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL
-.set SCSI_Noise__2__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN
-.set SCSI_Noise__2__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0
-.set SCSI_Noise__2__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1
-.set SCSI_Noise__2__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0
-.set SCSI_Noise__2__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1
-.set SCSI_Noise__2__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT
-.set SCSI_Noise__2__PS, CYREG_PRT0_PS
-.set SCSI_Noise__2__SHIFT, 2
-.set SCSI_Noise__2__SLW, CYREG_PRT0_SLW
-.set SCSI_Noise__3__AG, CYREG_PRT0_AG
-.set SCSI_Noise__3__AMUX, CYREG_PRT0_AMUX
-.set SCSI_Noise__3__BIE, CYREG_PRT0_BIE
-.set SCSI_Noise__3__BIT_MASK, CYREG_PRT0_BIT_MASK
-.set SCSI_Noise__3__BYP, CYREG_PRT0_BYP
-.set SCSI_Noise__3__CTL, CYREG_PRT0_CTL
-.set SCSI_Noise__3__DM0, CYREG_PRT0_DM0
-.set SCSI_Noise__3__DM1, CYREG_PRT0_DM1
-.set SCSI_Noise__3__DM2, CYREG_PRT0_DM2
-.set SCSI_Noise__3__DR, CYREG_PRT0_DR
-.set SCSI_Noise__3__INP_DIS, CYREG_PRT0_INP_DIS
-.set SCSI_Noise__3__INTTYPE, CYREG_PICU0_INTTYPE6
-.set SCSI_Noise__3__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG
-.set SCSI_Noise__3__LCD_EN, CYREG_PRT0_LCD_EN
-.set SCSI_Noise__3__MASK, 0x40
-.set SCSI_Noise__3__PC, CYREG_PRT0_PC6
-.set SCSI_Noise__3__PORT, 0
-.set SCSI_Noise__3__PRT, CYREG_PRT0_PRT
-.set SCSI_Noise__3__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL
-.set SCSI_Noise__3__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN
-.set SCSI_Noise__3__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0
-.set SCSI_Noise__3__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1
-.set SCSI_Noise__3__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0
-.set SCSI_Noise__3__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1
-.set SCSI_Noise__3__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT
-.set SCSI_Noise__3__PS, CYREG_PRT0_PS
-.set SCSI_Noise__3__SHIFT, 6
-.set SCSI_Noise__3__SLW, CYREG_PRT0_SLW
-.set SCSI_Noise__4__AG, CYREG_PRT4_AG
-.set SCSI_Noise__4__AMUX, CYREG_PRT4_AMUX
-.set SCSI_Noise__4__BIE, CYREG_PRT4_BIE
-.set SCSI_Noise__4__BIT_MASK, CYREG_PRT4_BIT_MASK
-.set SCSI_Noise__4__BYP, CYREG_PRT4_BYP
-.set SCSI_Noise__4__CTL, CYREG_PRT4_CTL
-.set SCSI_Noise__4__DM0, CYREG_PRT4_DM0
-.set SCSI_Noise__4__DM1, CYREG_PRT4_DM1
-.set SCSI_Noise__4__DM2, CYREG_PRT4_DM2
-.set SCSI_Noise__4__DR, CYREG_PRT4_DR
-.set SCSI_Noise__4__INP_DIS, CYREG_PRT4_INP_DIS
-.set SCSI_Noise__4__INTTYPE, CYREG_PICU4_INTTYPE3
-.set SCSI_Noise__4__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG
-.set SCSI_Noise__4__LCD_EN, CYREG_PRT4_LCD_EN
-.set SCSI_Noise__4__MASK, 0x08
-.set SCSI_Noise__4__PC, CYREG_PRT4_PC3
-.set SCSI_Noise__4__PORT, 4
-.set SCSI_Noise__4__PRT, CYREG_PRT4_PRT
-.set SCSI_Noise__4__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL
-.set SCSI_Noise__4__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN
-.set SCSI_Noise__4__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0
-.set SCSI_Noise__4__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1
-.set SCSI_Noise__4__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0
-.set SCSI_Noise__4__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1
-.set SCSI_Noise__4__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT
-.set SCSI_Noise__4__PS, CYREG_PRT4_PS
-.set SCSI_Noise__4__SHIFT, 3
-.set SCSI_Noise__4__SLW, CYREG_PRT4_SLW
-.set SCSI_Noise__ACK__AG, CYREG_PRT4_AG
-.set SCSI_Noise__ACK__AMUX, CYREG_PRT4_AMUX
-.set SCSI_Noise__ACK__BIE, CYREG_PRT4_BIE
-.set SCSI_Noise__ACK__BIT_MASK, CYREG_PRT4_BIT_MASK
-.set SCSI_Noise__ACK__BYP, CYREG_PRT4_BYP
-.set SCSI_Noise__ACK__CTL, CYREG_PRT4_CTL
-.set SCSI_Noise__ACK__DM0, CYREG_PRT4_DM0
-.set SCSI_Noise__ACK__DM1, CYREG_PRT4_DM1
-.set SCSI_Noise__ACK__DM2, CYREG_PRT4_DM2
-.set SCSI_Noise__ACK__DR, CYREG_PRT4_DR
-.set SCSI_Noise__ACK__INP_DIS, CYREG_PRT4_INP_DIS
-.set SCSI_Noise__ACK__INTTYPE, CYREG_PICU4_INTTYPE3
-.set SCSI_Noise__ACK__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG
-.set SCSI_Noise__ACK__LCD_EN, CYREG_PRT4_LCD_EN
-.set SCSI_Noise__ACK__MASK, 0x08
-.set SCSI_Noise__ACK__PC, CYREG_PRT4_PC3
-.set SCSI_Noise__ACK__PORT, 4
-.set SCSI_Noise__ACK__PRT, CYREG_PRT4_PRT
-.set SCSI_Noise__ACK__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL
-.set SCSI_Noise__ACK__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN
-.set SCSI_Noise__ACK__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0
-.set SCSI_Noise__ACK__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1
-.set SCSI_Noise__ACK__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0
-.set SCSI_Noise__ACK__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1
-.set SCSI_Noise__ACK__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT
-.set SCSI_Noise__ACK__PS, CYREG_PRT4_PS
-.set SCSI_Noise__ACK__SHIFT, 3
-.set SCSI_Noise__ACK__SLW, CYREG_PRT4_SLW
-.set SCSI_Noise__ATN__AG, CYREG_PRT4_AG
-.set SCSI_Noise__ATN__AMUX, CYREG_PRT4_AMUX
-.set SCSI_Noise__ATN__BIE, CYREG_PRT4_BIE
-.set SCSI_Noise__ATN__BIT_MASK, CYREG_PRT4_BIT_MASK
-.set SCSI_Noise__ATN__BYP, CYREG_PRT4_BYP
-.set SCSI_Noise__ATN__CTL, CYREG_PRT4_CTL
-.set SCSI_Noise__ATN__DM0, CYREG_PRT4_DM0
-.set SCSI_Noise__ATN__DM1, CYREG_PRT4_DM1
-.set SCSI_Noise__ATN__DM2, CYREG_PRT4_DM2
-.set SCSI_Noise__ATN__DR, CYREG_PRT4_DR
-.set SCSI_Noise__ATN__INP_DIS, CYREG_PRT4_INP_DIS
-.set SCSI_Noise__ATN__INTTYPE, CYREG_PICU4_INTTYPE7
-.set SCSI_Noise__ATN__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG
-.set SCSI_Noise__ATN__LCD_EN, CYREG_PRT4_LCD_EN
-.set SCSI_Noise__ATN__MASK, 0x80
-.set SCSI_Noise__ATN__PC, CYREG_PRT4_PC7
-.set SCSI_Noise__ATN__PORT, 4
-.set SCSI_Noise__ATN__PRT, CYREG_PRT4_PRT
-.set SCSI_Noise__ATN__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL
-.set SCSI_Noise__ATN__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN
-.set SCSI_Noise__ATN__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0
-.set SCSI_Noise__ATN__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1
-.set SCSI_Noise__ATN__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0
-.set SCSI_Noise__ATN__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1
-.set SCSI_Noise__ATN__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT
-.set SCSI_Noise__ATN__PS, CYREG_PRT4_PS
-.set SCSI_Noise__ATN__SHIFT, 7
-.set SCSI_Noise__ATN__SLW, CYREG_PRT4_SLW
-.set SCSI_Noise__BSY__AG, CYREG_PRT4_AG
-.set SCSI_Noise__BSY__AMUX, CYREG_PRT4_AMUX
-.set SCSI_Noise__BSY__BIE, CYREG_PRT4_BIE
-.set SCSI_Noise__BSY__BIT_MASK, CYREG_PRT4_BIT_MASK
-.set SCSI_Noise__BSY__BYP, CYREG_PRT4_BYP
-.set SCSI_Noise__BSY__CTL, CYREG_PRT4_CTL
-.set SCSI_Noise__BSY__DM0, CYREG_PRT4_DM0
-.set SCSI_Noise__BSY__DM1, CYREG_PRT4_DM1
-.set SCSI_Noise__BSY__DM2, CYREG_PRT4_DM2
-.set SCSI_Noise__BSY__DR, CYREG_PRT4_DR
-.set SCSI_Noise__BSY__INP_DIS, CYREG_PRT4_INP_DIS
-.set SCSI_Noise__BSY__INTTYPE, CYREG_PICU4_INTTYPE5
-.set SCSI_Noise__BSY__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG
-.set SCSI_Noise__BSY__LCD_EN, CYREG_PRT4_LCD_EN
-.set SCSI_Noise__BSY__MASK, 0x20
-.set SCSI_Noise__BSY__PC, CYREG_PRT4_PC5
-.set SCSI_Noise__BSY__PORT, 4
-.set SCSI_Noise__BSY__PRT, CYREG_PRT4_PRT
-.set SCSI_Noise__BSY__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL
-.set SCSI_Noise__BSY__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN
-.set SCSI_Noise__BSY__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0
-.set SCSI_Noise__BSY__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1
-.set SCSI_Noise__BSY__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0
-.set SCSI_Noise__BSY__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1
-.set SCSI_Noise__BSY__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT
-.set SCSI_Noise__BSY__PS, CYREG_PRT4_PS
-.set SCSI_Noise__BSY__SHIFT, 5
-.set SCSI_Noise__BSY__SLW, CYREG_PRT4_SLW
-.set SCSI_Noise__RST__AG, CYREG_PRT0_AG
-.set SCSI_Noise__RST__AMUX, CYREG_PRT0_AMUX
-.set SCSI_Noise__RST__BIE, CYREG_PRT0_BIE
-.set SCSI_Noise__RST__BIT_MASK, CYREG_PRT0_BIT_MASK
-.set SCSI_Noise__RST__BYP, CYREG_PRT0_BYP
-.set SCSI_Noise__RST__CTL, CYREG_PRT0_CTL
-.set SCSI_Noise__RST__DM0, CYREG_PRT0_DM0
-.set SCSI_Noise__RST__DM1, CYREG_PRT0_DM1
-.set SCSI_Noise__RST__DM2, CYREG_PRT0_DM2
-.set SCSI_Noise__RST__DR, CYREG_PRT0_DR
-.set SCSI_Noise__RST__INP_DIS, CYREG_PRT0_INP_DIS
-.set SCSI_Noise__RST__INTTYPE, CYREG_PICU0_INTTYPE6
-.set SCSI_Noise__RST__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG
-.set SCSI_Noise__RST__LCD_EN, CYREG_PRT0_LCD_EN
-.set SCSI_Noise__RST__MASK, 0x40
-.set SCSI_Noise__RST__PC, CYREG_PRT0_PC6
-.set SCSI_Noise__RST__PORT, 0
-.set SCSI_Noise__RST__PRT, CYREG_PRT0_PRT
-.set SCSI_Noise__RST__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL
-.set SCSI_Noise__RST__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN
-.set SCSI_Noise__RST__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0
-.set SCSI_Noise__RST__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1
-.set SCSI_Noise__RST__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0
-.set SCSI_Noise__RST__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1
-.set SCSI_Noise__RST__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT
-.set SCSI_Noise__RST__PS, CYREG_PRT0_PS
-.set SCSI_Noise__RST__SHIFT, 6
-.set SCSI_Noise__RST__SLW, CYREG_PRT0_SLW
-.set SCSI_Noise__SEL__AG, CYREG_PRT0_AG
-.set SCSI_Noise__SEL__AMUX, CYREG_PRT0_AMUX
-.set SCSI_Noise__SEL__BIE, CYREG_PRT0_BIE
-.set SCSI_Noise__SEL__BIT_MASK, CYREG_PRT0_BIT_MASK
-.set SCSI_Noise__SEL__BYP, CYREG_PRT0_BYP
-.set SCSI_Noise__SEL__CTL, CYREG_PRT0_CTL
-.set SCSI_Noise__SEL__DM0, CYREG_PRT0_DM0
-.set SCSI_Noise__SEL__DM1, CYREG_PRT0_DM1
-.set SCSI_Noise__SEL__DM2, CYREG_PRT0_DM2
-.set SCSI_Noise__SEL__DR, CYREG_PRT0_DR
-.set SCSI_Noise__SEL__INP_DIS, CYREG_PRT0_INP_DIS
-.set SCSI_Noise__SEL__INTTYPE, CYREG_PICU0_INTTYPE2
-.set SCSI_Noise__SEL__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG
-.set SCSI_Noise__SEL__LCD_EN, CYREG_PRT0_LCD_EN
-.set SCSI_Noise__SEL__MASK, 0x04
-.set SCSI_Noise__SEL__PC, CYREG_PRT0_PC2
-.set SCSI_Noise__SEL__PORT, 0
-.set SCSI_Noise__SEL__PRT, CYREG_PRT0_PRT
-.set SCSI_Noise__SEL__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL
-.set SCSI_Noise__SEL__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN
-.set SCSI_Noise__SEL__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0
-.set SCSI_Noise__SEL__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1
-.set SCSI_Noise__SEL__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0
-.set SCSI_Noise__SEL__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1
-.set SCSI_Noise__SEL__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT
-.set SCSI_Noise__SEL__PS, CYREG_PRT0_PS
-.set SCSI_Noise__SEL__SHIFT, 2
-.set SCSI_Noise__SEL__SLW, CYREG_PRT0_SLW
-
-/* SCSI_Out */
-.set SCSI_Out__0__AG, CYREG_PRT6_AG
-.set SCSI_Out__0__AMUX, CYREG_PRT6_AMUX
-.set SCSI_Out__0__BIE, CYREG_PRT6_BIE
-.set SCSI_Out__0__BIT_MASK, CYREG_PRT6_BIT_MASK
-.set SCSI_Out__0__BYP, CYREG_PRT6_BYP
-.set SCSI_Out__0__CTL, CYREG_PRT6_CTL
-.set SCSI_Out__0__DM0, CYREG_PRT6_DM0
-.set SCSI_Out__0__DM1, CYREG_PRT6_DM1
-.set SCSI_Out__0__DM2, CYREG_PRT6_DM2
-.set SCSI_Out__0__DR, CYREG_PRT6_DR
-.set SCSI_Out__0__INP_DIS, CYREG_PRT6_INP_DIS
-.set SCSI_Out__0__INTTYPE, CYREG_PICU6_INTTYPE2
-.set SCSI_Out__0__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG
-.set SCSI_Out__0__LCD_EN, CYREG_PRT6_LCD_EN
-.set SCSI_Out__0__MASK, 0x04
-.set SCSI_Out__0__PC, CYREG_PRT6_PC2
-.set SCSI_Out__0__PORT, 6
-.set SCSI_Out__0__PRT, CYREG_PRT6_PRT
-.set SCSI_Out__0__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL
-.set SCSI_Out__0__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN
-.set SCSI_Out__0__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0
-.set SCSI_Out__0__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1
-.set SCSI_Out__0__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0
-.set SCSI_Out__0__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1
-.set SCSI_Out__0__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT
-.set SCSI_Out__0__PS, CYREG_PRT6_PS
-.set SCSI_Out__0__SHIFT, 2
-.set SCSI_Out__0__SLW, CYREG_PRT6_SLW
-.set SCSI_Out__1__AG, CYREG_PRT4_AG
-.set SCSI_Out__1__AMUX, CYREG_PRT4_AMUX
-.set SCSI_Out__1__BIE, CYREG_PRT4_BIE
-.set SCSI_Out__1__BIT_MASK, CYREG_PRT4_BIT_MASK
-.set SCSI_Out__1__BYP, CYREG_PRT4_BYP
-.set SCSI_Out__1__CTL, CYREG_PRT4_CTL
-.set SCSI_Out__1__DM0, CYREG_PRT4_DM0
-.set SCSI_Out__1__DM1, CYREG_PRT4_DM1
-.set SCSI_Out__1__DM2, CYREG_PRT4_DM2
-.set SCSI_Out__1__DR, CYREG_PRT4_DR
-.set SCSI_Out__1__INP_DIS, CYREG_PRT4_INP_DIS
-.set SCSI_Out__1__INTTYPE, CYREG_PICU4_INTTYPE6
-.set SCSI_Out__1__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG
-.set SCSI_Out__1__LCD_EN, CYREG_PRT4_LCD_EN
-.set SCSI_Out__1__MASK, 0x40
-.set SCSI_Out__1__PC, CYREG_PRT4_PC6
-.set SCSI_Out__1__PORT, 4
-.set SCSI_Out__1__PRT, CYREG_PRT4_PRT
-.set SCSI_Out__1__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL
-.set SCSI_Out__1__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN
-.set SCSI_Out__1__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0
-.set SCSI_Out__1__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1
-.set SCSI_Out__1__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0
-.set SCSI_Out__1__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1
-.set SCSI_Out__1__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT
-.set SCSI_Out__1__PS, CYREG_PRT4_PS
-.set SCSI_Out__1__SHIFT, 6
-.set SCSI_Out__1__SLW, CYREG_PRT4_SLW
-.set SCSI_Out__2__AG, CYREG_PRT0_AG
-.set SCSI_Out__2__AMUX, CYREG_PRT0_AMUX
-.set SCSI_Out__2__BIE, CYREG_PRT0_BIE
-.set SCSI_Out__2__BIT_MASK, CYREG_PRT0_BIT_MASK
-.set SCSI_Out__2__BYP, CYREG_PRT0_BYP
-.set SCSI_Out__2__CTL, CYREG_PRT0_CTL
-.set SCSI_Out__2__DM0, CYREG_PRT0_DM0
-.set SCSI_Out__2__DM1, CYREG_PRT0_DM1
-.set SCSI_Out__2__DM2, CYREG_PRT0_DM2
-.set SCSI_Out__2__DR, CYREG_PRT0_DR
-.set SCSI_Out__2__INP_DIS, CYREG_PRT0_INP_DIS
-.set SCSI_Out__2__INTTYPE, CYREG_PICU0_INTTYPE7
-.set SCSI_Out__2__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG
-.set SCSI_Out__2__LCD_EN, CYREG_PRT0_LCD_EN
-.set SCSI_Out__2__MASK, 0x80
-.set SCSI_Out__2__PC, CYREG_PRT0_PC7
-.set SCSI_Out__2__PORT, 0
-.set SCSI_Out__2__PRT, CYREG_PRT0_PRT
-.set SCSI_Out__2__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL
-.set SCSI_Out__2__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN
-.set SCSI_Out__2__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0
-.set SCSI_Out__2__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1
-.set SCSI_Out__2__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0
-.set SCSI_Out__2__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1
-.set SCSI_Out__2__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT
-.set SCSI_Out__2__PS, CYREG_PRT0_PS
-.set SCSI_Out__2__SHIFT, 7
-.set SCSI_Out__2__SLW, CYREG_PRT0_SLW
-.set SCSI_Out__3__AG, CYREG_PRT0_AG
-.set SCSI_Out__3__AMUX, CYREG_PRT0_AMUX
-.set SCSI_Out__3__BIE, CYREG_PRT0_BIE
-.set SCSI_Out__3__BIT_MASK, CYREG_PRT0_BIT_MASK
-.set SCSI_Out__3__BYP, CYREG_PRT0_BYP
-.set SCSI_Out__3__CTL, CYREG_PRT0_CTL
-.set SCSI_Out__3__DM0, CYREG_PRT0_DM0
-.set SCSI_Out__3__DM1, CYREG_PRT0_DM1
-.set SCSI_Out__3__DM2, CYREG_PRT0_DM2
-.set SCSI_Out__3__DR, CYREG_PRT0_DR
-.set SCSI_Out__3__INP_DIS, CYREG_PRT0_INP_DIS
-.set SCSI_Out__3__INTTYPE, CYREG_PICU0_INTTYPE5
-.set SCSI_Out__3__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG
-.set SCSI_Out__3__LCD_EN, CYREG_PRT0_LCD_EN
-.set SCSI_Out__3__MASK, 0x20
-.set SCSI_Out__3__PC, CYREG_PRT0_PC5
-.set SCSI_Out__3__PORT, 0
-.set SCSI_Out__3__PRT, CYREG_PRT0_PRT
-.set SCSI_Out__3__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL
-.set SCSI_Out__3__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN
-.set SCSI_Out__3__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0
-.set SCSI_Out__3__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1
-.set SCSI_Out__3__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0
-.set SCSI_Out__3__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1
-.set SCSI_Out__3__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT
-.set SCSI_Out__3__PS, CYREG_PRT0_PS
-.set SCSI_Out__3__SHIFT, 5
-.set SCSI_Out__3__SLW, CYREG_PRT0_SLW
-.set SCSI_Out__4__AG, CYREG_PRT0_AG
-.set SCSI_Out__4__AMUX, CYREG_PRT0_AMUX
-.set SCSI_Out__4__BIE, CYREG_PRT0_BIE
-.set SCSI_Out__4__BIT_MASK, CYREG_PRT0_BIT_MASK
-.set SCSI_Out__4__BYP, CYREG_PRT0_BYP
-.set SCSI_Out__4__CTL, CYREG_PRT0_CTL
-.set SCSI_Out__4__DM0, CYREG_PRT0_DM0
-.set SCSI_Out__4__DM1, CYREG_PRT0_DM1
-.set SCSI_Out__4__DM2, CYREG_PRT0_DM2
-.set SCSI_Out__4__DR, CYREG_PRT0_DR
-.set SCSI_Out__4__INP_DIS, CYREG_PRT0_INP_DIS
-.set SCSI_Out__4__INTTYPE, CYREG_PICU0_INTTYPE3
-.set SCSI_Out__4__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG
-.set SCSI_Out__4__LCD_EN, CYREG_PRT0_LCD_EN
-.set SCSI_Out__4__MASK, 0x08
-.set SCSI_Out__4__PC, CYREG_PRT0_PC3
-.set SCSI_Out__4__PORT, 0
-.set SCSI_Out__4__PRT, CYREG_PRT0_PRT
-.set SCSI_Out__4__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL
-.set SCSI_Out__4__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN
-.set SCSI_Out__4__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0
-.set SCSI_Out__4__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1
-.set SCSI_Out__4__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0
-.set SCSI_Out__4__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1
-.set SCSI_Out__4__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT
-.set SCSI_Out__4__PS, CYREG_PRT0_PS
-.set SCSI_Out__4__SHIFT, 3
-.set SCSI_Out__4__SLW, CYREG_PRT0_SLW
-.set SCSI_Out__5__AG, CYREG_PRT0_AG
-.set SCSI_Out__5__AMUX, CYREG_PRT0_AMUX
-.set SCSI_Out__5__BIE, CYREG_PRT0_BIE
-.set SCSI_Out__5__BIT_MASK, CYREG_PRT0_BIT_MASK
-.set SCSI_Out__5__BYP, CYREG_PRT0_BYP
-.set SCSI_Out__5__CTL, CYREG_PRT0_CTL
-.set SCSI_Out__5__DM0, CYREG_PRT0_DM0
-.set SCSI_Out__5__DM1, CYREG_PRT0_DM1
-.set SCSI_Out__5__DM2, CYREG_PRT0_DM2
-.set SCSI_Out__5__DR, CYREG_PRT0_DR
-.set SCSI_Out__5__INP_DIS, CYREG_PRT0_INP_DIS
-.set SCSI_Out__5__INTTYPE, CYREG_PICU0_INTTYPE1
-.set SCSI_Out__5__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG
-.set SCSI_Out__5__LCD_EN, CYREG_PRT0_LCD_EN
-.set SCSI_Out__5__MASK, 0x02
-.set SCSI_Out__5__PC, CYREG_PRT0_PC1
-.set SCSI_Out__5__PORT, 0
-.set SCSI_Out__5__PRT, CYREG_PRT0_PRT
-.set SCSI_Out__5__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL
-.set SCSI_Out__5__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN
-.set SCSI_Out__5__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0
-.set SCSI_Out__5__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1
-.set SCSI_Out__5__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0
-.set SCSI_Out__5__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1
-.set SCSI_Out__5__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT
-.set SCSI_Out__5__PS, CYREG_PRT0_PS
-.set SCSI_Out__5__SHIFT, 1
-.set SCSI_Out__5__SLW, CYREG_PRT0_SLW
-.set SCSI_Out__6__AG, CYREG_PRT4_AG
-.set SCSI_Out__6__AMUX, CYREG_PRT4_AMUX
-.set SCSI_Out__6__BIE, CYREG_PRT4_BIE
-.set SCSI_Out__6__BIT_MASK, CYREG_PRT4_BIT_MASK
-.set SCSI_Out__6__BYP, CYREG_PRT4_BYP
-.set SCSI_Out__6__CTL, CYREG_PRT4_CTL
-.set SCSI_Out__6__DM0, CYREG_PRT4_DM0
-.set SCSI_Out__6__DM1, CYREG_PRT4_DM1
-.set SCSI_Out__6__DM2, CYREG_PRT4_DM2
-.set SCSI_Out__6__DR, CYREG_PRT4_DR
-.set SCSI_Out__6__INP_DIS, CYREG_PRT4_INP_DIS
-.set SCSI_Out__6__INTTYPE, CYREG_PICU4_INTTYPE1
-.set SCSI_Out__6__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG
-.set SCSI_Out__6__LCD_EN, CYREG_PRT4_LCD_EN
-.set SCSI_Out__6__MASK, 0x02
-.set SCSI_Out__6__PC, CYREG_PRT4_PC1
-.set SCSI_Out__6__PORT, 4
-.set SCSI_Out__6__PRT, CYREG_PRT4_PRT
-.set SCSI_Out__6__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL
-.set SCSI_Out__6__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN
-.set SCSI_Out__6__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0
-.set SCSI_Out__6__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1
-.set SCSI_Out__6__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0
-.set SCSI_Out__6__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1
-.set SCSI_Out__6__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT
-.set SCSI_Out__6__PS, CYREG_PRT4_PS
-.set SCSI_Out__6__SHIFT, 1
-.set SCSI_Out__6__SLW, CYREG_PRT4_SLW
-.set SCSI_Out__7__AG, CYREG_PRT12_AG
-.set SCSI_Out__7__BIE, CYREG_PRT12_BIE
-.set SCSI_Out__7__BIT_MASK, CYREG_PRT12_BIT_MASK
-.set SCSI_Out__7__BYP, CYREG_PRT12_BYP
-.set SCSI_Out__7__DM0, CYREG_PRT12_DM0
-.set SCSI_Out__7__DM1, CYREG_PRT12_DM1
-.set SCSI_Out__7__DM2, CYREG_PRT12_DM2
-.set SCSI_Out__7__DR, CYREG_PRT12_DR
-.set SCSI_Out__7__INP_DIS, CYREG_PRT12_INP_DIS
-.set SCSI_Out__7__INTTYPE, CYREG_PICU12_INTTYPE3
-.set SCSI_Out__7__MASK, 0x08
-.set SCSI_Out__7__PC, CYREG_PRT12_PC3
-.set SCSI_Out__7__PORT, 12
-.set SCSI_Out__7__PRT, CYREG_PRT12_PRT
-.set SCSI_Out__7__PRTDSI__DBL_SYNC_IN, CYREG_PRT12_DBL_SYNC_IN
-.set SCSI_Out__7__PRTDSI__OE_SEL0, CYREG_PRT12_OE_SEL0
-.set SCSI_Out__7__PRTDSI__OE_SEL1, CYREG_PRT12_OE_SEL1
-.set SCSI_Out__7__PRTDSI__OUT_SEL0, CYREG_PRT12_OUT_SEL0
-.set SCSI_Out__7__PRTDSI__OUT_SEL1, CYREG_PRT12_OUT_SEL1
-.set SCSI_Out__7__PRTDSI__SYNC_OUT, CYREG_PRT12_SYNC_OUT
-.set SCSI_Out__7__PS, CYREG_PRT12_PS
-.set SCSI_Out__7__SHIFT, 3
-.set SCSI_Out__7__SIO_CFG, CYREG_PRT12_SIO_CFG
-.set SCSI_Out__7__SIO_DIFF, CYREG_PRT12_SIO_DIFF
-.set SCSI_Out__7__SIO_HYST_EN, CYREG_PRT12_SIO_HYST_EN
-.set SCSI_Out__7__SIO_REG_HIFREQ, CYREG_PRT12_SIO_REG_HIFREQ
-.set SCSI_Out__7__SLW, CYREG_PRT12_SLW
-.set SCSI_Out__BSY__AG, CYREG_PRT4_AG
-.set SCSI_Out__BSY__AMUX, CYREG_PRT4_AMUX
-.set SCSI_Out__BSY__BIE, CYREG_PRT4_BIE
-.set SCSI_Out__BSY__BIT_MASK, CYREG_PRT4_BIT_MASK
-.set SCSI_Out__BSY__BYP, CYREG_PRT4_BYP
-.set SCSI_Out__BSY__CTL, CYREG_PRT4_CTL
-.set SCSI_Out__BSY__DM0, CYREG_PRT4_DM0
-.set SCSI_Out__BSY__DM1, CYREG_PRT4_DM1
-.set SCSI_Out__BSY__DM2, CYREG_PRT4_DM2
-.set SCSI_Out__BSY__DR, CYREG_PRT4_DR
-.set SCSI_Out__BSY__INP_DIS, CYREG_PRT4_INP_DIS
-.set SCSI_Out__BSY__INTTYPE, CYREG_PICU4_INTTYPE6
-.set SCSI_Out__BSY__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG
-.set SCSI_Out__BSY__LCD_EN, CYREG_PRT4_LCD_EN
-.set SCSI_Out__BSY__MASK, 0x40
-.set SCSI_Out__BSY__PC, CYREG_PRT4_PC6
-.set SCSI_Out__BSY__PORT, 4
-.set SCSI_Out__BSY__PRT, CYREG_PRT4_PRT
-.set SCSI_Out__BSY__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL
-.set SCSI_Out__BSY__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN
-.set SCSI_Out__BSY__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0
-.set SCSI_Out__BSY__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1
-.set SCSI_Out__BSY__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0
-.set SCSI_Out__BSY__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1
-.set SCSI_Out__BSY__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT
-.set SCSI_Out__BSY__PS, CYREG_PRT4_PS
-.set SCSI_Out__BSY__SHIFT, 6
-.set SCSI_Out__BSY__SLW, CYREG_PRT4_SLW
-.set SCSI_Out__CD_raw__AG, CYREG_PRT0_AG
-.set SCSI_Out__CD_raw__AMUX, CYREG_PRT0_AMUX
-.set SCSI_Out__CD_raw__BIE, CYREG_PRT0_BIE
-.set SCSI_Out__CD_raw__BIT_MASK, CYREG_PRT0_BIT_MASK
-.set SCSI_Out__CD_raw__BYP, CYREG_PRT0_BYP
-.set SCSI_Out__CD_raw__CTL, CYREG_PRT0_CTL
-.set SCSI_Out__CD_raw__DM0, CYREG_PRT0_DM0
-.set SCSI_Out__CD_raw__DM1, CYREG_PRT0_DM1
-.set SCSI_Out__CD_raw__DM2, CYREG_PRT0_DM2
-.set SCSI_Out__CD_raw__DR, CYREG_PRT0_DR
-.set SCSI_Out__CD_raw__INP_DIS, CYREG_PRT0_INP_DIS
-.set SCSI_Out__CD_raw__INTTYPE, CYREG_PICU0_INTTYPE1
-.set SCSI_Out__CD_raw__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG
-.set SCSI_Out__CD_raw__LCD_EN, CYREG_PRT0_LCD_EN
-.set SCSI_Out__CD_raw__MASK, 0x02
-.set SCSI_Out__CD_raw__PC, CYREG_PRT0_PC1
-.set SCSI_Out__CD_raw__PORT, 0
-.set SCSI_Out__CD_raw__PRT, CYREG_PRT0_PRT
-.set SCSI_Out__CD_raw__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL
-.set SCSI_Out__CD_raw__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN
-.set SCSI_Out__CD_raw__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0
-.set SCSI_Out__CD_raw__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1
-.set SCSI_Out__CD_raw__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0
-.set SCSI_Out__CD_raw__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1
-.set SCSI_Out__CD_raw__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT
-.set SCSI_Out__CD_raw__PS, CYREG_PRT0_PS
-.set SCSI_Out__CD_raw__SHIFT, 1
-.set SCSI_Out__CD_raw__SLW, CYREG_PRT0_SLW
-.set SCSI_Out__DBP_raw__AG, CYREG_PRT6_AG
-.set SCSI_Out__DBP_raw__AMUX, CYREG_PRT6_AMUX
-.set SCSI_Out__DBP_raw__BIE, CYREG_PRT6_BIE
-.set SCSI_Out__DBP_raw__BIT_MASK, CYREG_PRT6_BIT_MASK
-.set SCSI_Out__DBP_raw__BYP, CYREG_PRT6_BYP
-.set SCSI_Out__DBP_raw__CTL, CYREG_PRT6_CTL
-.set SCSI_Out__DBP_raw__DM0, CYREG_PRT6_DM0
-.set SCSI_Out__DBP_raw__DM1, CYREG_PRT6_DM1
-.set SCSI_Out__DBP_raw__DM2, CYREG_PRT6_DM2
-.set SCSI_Out__DBP_raw__DR, CYREG_PRT6_DR
-.set SCSI_Out__DBP_raw__INP_DIS, CYREG_PRT6_INP_DIS
-.set SCSI_Out__DBP_raw__INTTYPE, CYREG_PICU6_INTTYPE2
-.set SCSI_Out__DBP_raw__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG
-.set SCSI_Out__DBP_raw__LCD_EN, CYREG_PRT6_LCD_EN
-.set SCSI_Out__DBP_raw__MASK, 0x04
-.set SCSI_Out__DBP_raw__PC, CYREG_PRT6_PC2
-.set SCSI_Out__DBP_raw__PORT, 6
-.set SCSI_Out__DBP_raw__PRT, CYREG_PRT6_PRT
-.set SCSI_Out__DBP_raw__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL
-.set SCSI_Out__DBP_raw__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN
-.set SCSI_Out__DBP_raw__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0
-.set SCSI_Out__DBP_raw__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1
-.set SCSI_Out__DBP_raw__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0
-.set SCSI_Out__DBP_raw__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1
-.set SCSI_Out__DBP_raw__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT
-.set SCSI_Out__DBP_raw__PS, CYREG_PRT6_PS
-.set SCSI_Out__DBP_raw__SHIFT, 2
-.set SCSI_Out__DBP_raw__SLW, CYREG_PRT6_SLW
-.set SCSI_Out__IO_raw__AG, CYREG_PRT12_AG
-.set SCSI_Out__IO_raw__BIE, CYREG_PRT12_BIE
-.set SCSI_Out__IO_raw__BIT_MASK, CYREG_PRT12_BIT_MASK
-.set SCSI_Out__IO_raw__BYP, CYREG_PRT12_BYP
-.set SCSI_Out__IO_raw__DM0, CYREG_PRT12_DM0
-.set SCSI_Out__IO_raw__DM1, CYREG_PRT12_DM1
-.set SCSI_Out__IO_raw__DM2, CYREG_PRT12_DM2
-.set SCSI_Out__IO_raw__DR, CYREG_PRT12_DR
-.set SCSI_Out__IO_raw__INP_DIS, CYREG_PRT12_INP_DIS
-.set SCSI_Out__IO_raw__INTTYPE, CYREG_PICU12_INTTYPE3
-.set SCSI_Out__IO_raw__MASK, 0x08
-.set SCSI_Out__IO_raw__PC, CYREG_PRT12_PC3
-.set SCSI_Out__IO_raw__PORT, 12
-.set SCSI_Out__IO_raw__PRT, CYREG_PRT12_PRT
-.set SCSI_Out__IO_raw__PRTDSI__DBL_SYNC_IN, CYREG_PRT12_DBL_SYNC_IN
-.set SCSI_Out__IO_raw__PRTDSI__OE_SEL0, CYREG_PRT12_OE_SEL0
-.set SCSI_Out__IO_raw__PRTDSI__OE_SEL1, CYREG_PRT12_OE_SEL1
-.set SCSI_Out__IO_raw__PRTDSI__OUT_SEL0, CYREG_PRT12_OUT_SEL0
-.set SCSI_Out__IO_raw__PRTDSI__OUT_SEL1, CYREG_PRT12_OUT_SEL1
-.set SCSI_Out__IO_raw__PRTDSI__SYNC_OUT, CYREG_PRT12_SYNC_OUT
-.set SCSI_Out__IO_raw__PS, CYREG_PRT12_PS
-.set SCSI_Out__IO_raw__SHIFT, 3
-.set SCSI_Out__IO_raw__SIO_CFG, CYREG_PRT12_SIO_CFG
-.set SCSI_Out__IO_raw__SIO_DIFF, CYREG_PRT12_SIO_DIFF
-.set SCSI_Out__IO_raw__SIO_HYST_EN, CYREG_PRT12_SIO_HYST_EN
-.set SCSI_Out__IO_raw__SIO_REG_HIFREQ, CYREG_PRT12_SIO_REG_HIFREQ
-.set SCSI_Out__IO_raw__SLW, CYREG_PRT12_SLW
-.set SCSI_Out__MSG_raw__AG, CYREG_PRT0_AG
-.set SCSI_Out__MSG_raw__AMUX, CYREG_PRT0_AMUX
-.set SCSI_Out__MSG_raw__BIE, CYREG_PRT0_BIE
-.set SCSI_Out__MSG_raw__BIT_MASK, CYREG_PRT0_BIT_MASK
-.set SCSI_Out__MSG_raw__BYP, CYREG_PRT0_BYP
-.set SCSI_Out__MSG_raw__CTL, CYREG_PRT0_CTL
-.set SCSI_Out__MSG_raw__DM0, CYREG_PRT0_DM0
-.set SCSI_Out__MSG_raw__DM1, CYREG_PRT0_DM1
-.set SCSI_Out__MSG_raw__DM2, CYREG_PRT0_DM2
-.set SCSI_Out__MSG_raw__DR, CYREG_PRT0_DR
-.set SCSI_Out__MSG_raw__INP_DIS, CYREG_PRT0_INP_DIS
-.set SCSI_Out__MSG_raw__INTTYPE, CYREG_PICU0_INTTYPE5
-.set SCSI_Out__MSG_raw__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG
-.set SCSI_Out__MSG_raw__LCD_EN, CYREG_PRT0_LCD_EN
-.set SCSI_Out__MSG_raw__MASK, 0x20
-.set SCSI_Out__MSG_raw__PC, CYREG_PRT0_PC5
-.set SCSI_Out__MSG_raw__PORT, 0
-.set SCSI_Out__MSG_raw__PRT, CYREG_PRT0_PRT
-.set SCSI_Out__MSG_raw__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL
-.set SCSI_Out__MSG_raw__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN
-.set SCSI_Out__MSG_raw__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0
-.set SCSI_Out__MSG_raw__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1
-.set SCSI_Out__MSG_raw__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0
-.set SCSI_Out__MSG_raw__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1
-.set SCSI_Out__MSG_raw__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT
-.set SCSI_Out__MSG_raw__PS, CYREG_PRT0_PS
-.set SCSI_Out__MSG_raw__SHIFT, 5
-.set SCSI_Out__MSG_raw__SLW, CYREG_PRT0_SLW
-.set SCSI_Out__REQ__AG, CYREG_PRT4_AG
-.set SCSI_Out__REQ__AMUX, CYREG_PRT4_AMUX
-.set SCSI_Out__REQ__BIE, CYREG_PRT4_BIE
-.set SCSI_Out__REQ__BIT_MASK, CYREG_PRT4_BIT_MASK
-.set SCSI_Out__REQ__BYP, CYREG_PRT4_BYP
-.set SCSI_Out__REQ__CTL, CYREG_PRT4_CTL
-.set SCSI_Out__REQ__DM0, CYREG_PRT4_DM0
-.set SCSI_Out__REQ__DM1, CYREG_PRT4_DM1
-.set SCSI_Out__REQ__DM2, CYREG_PRT4_DM2
-.set SCSI_Out__REQ__DR, CYREG_PRT4_DR
-.set SCSI_Out__REQ__INP_DIS, CYREG_PRT4_INP_DIS
-.set SCSI_Out__REQ__INTTYPE, CYREG_PICU4_INTTYPE1
-.set SCSI_Out__REQ__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG
-.set SCSI_Out__REQ__LCD_EN, CYREG_PRT4_LCD_EN
-.set SCSI_Out__REQ__MASK, 0x02
-.set SCSI_Out__REQ__PC, CYREG_PRT4_PC1
-.set SCSI_Out__REQ__PORT, 4
-.set SCSI_Out__REQ__PRT, CYREG_PRT4_PRT
-.set SCSI_Out__REQ__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL
-.set SCSI_Out__REQ__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN
-.set SCSI_Out__REQ__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0
-.set SCSI_Out__REQ__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1
-.set SCSI_Out__REQ__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0
-.set SCSI_Out__REQ__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1
-.set SCSI_Out__REQ__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT
-.set SCSI_Out__REQ__PS, CYREG_PRT4_PS
-.set SCSI_Out__REQ__SHIFT, 1
-.set SCSI_Out__REQ__SLW, CYREG_PRT4_SLW
-.set SCSI_Out__RST__AG, CYREG_PRT0_AG
-.set SCSI_Out__RST__AMUX, CYREG_PRT0_AMUX
-.set SCSI_Out__RST__BIE, CYREG_PRT0_BIE
-.set SCSI_Out__RST__BIT_MASK, CYREG_PRT0_BIT_MASK
-.set SCSI_Out__RST__BYP, CYREG_PRT0_BYP
-.set SCSI_Out__RST__CTL, CYREG_PRT0_CTL
-.set SCSI_Out__RST__DM0, CYREG_PRT0_DM0
-.set SCSI_Out__RST__DM1, CYREG_PRT0_DM1
-.set SCSI_Out__RST__DM2, CYREG_PRT0_DM2
-.set SCSI_Out__RST__DR, CYREG_PRT0_DR
-.set SCSI_Out__RST__INP_DIS, CYREG_PRT0_INP_DIS
-.set SCSI_Out__RST__INTTYPE, CYREG_PICU0_INTTYPE7
-.set SCSI_Out__RST__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG
-.set SCSI_Out__RST__LCD_EN, CYREG_PRT0_LCD_EN
-.set SCSI_Out__RST__MASK, 0x80
-.set SCSI_Out__RST__PC, CYREG_PRT0_PC7
-.set SCSI_Out__RST__PORT, 0
-.set SCSI_Out__RST__PRT, CYREG_PRT0_PRT
-.set SCSI_Out__RST__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL
-.set SCSI_Out__RST__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN
-.set SCSI_Out__RST__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0
-.set SCSI_Out__RST__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1
-.set SCSI_Out__RST__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0
-.set SCSI_Out__RST__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1
-.set SCSI_Out__RST__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT
-.set SCSI_Out__RST__PS, CYREG_PRT0_PS
-.set SCSI_Out__RST__SHIFT, 7
-.set SCSI_Out__RST__SLW, CYREG_PRT0_SLW
-.set SCSI_Out__SEL__AG, CYREG_PRT0_AG
-.set SCSI_Out__SEL__AMUX, CYREG_PRT0_AMUX
-.set SCSI_Out__SEL__BIE, CYREG_PRT0_BIE
-.set SCSI_Out__SEL__BIT_MASK, CYREG_PRT0_BIT_MASK
-.set SCSI_Out__SEL__BYP, CYREG_PRT0_BYP
-.set SCSI_Out__SEL__CTL, CYREG_PRT0_CTL
-.set SCSI_Out__SEL__DM0, CYREG_PRT0_DM0
-.set SCSI_Out__SEL__DM1, CYREG_PRT0_DM1
-.set SCSI_Out__SEL__DM2, CYREG_PRT0_DM2
-.set SCSI_Out__SEL__DR, CYREG_PRT0_DR
-.set SCSI_Out__SEL__INP_DIS, CYREG_PRT0_INP_DIS
-.set SCSI_Out__SEL__INTTYPE, CYREG_PICU0_INTTYPE3
-.set SCSI_Out__SEL__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG
-.set SCSI_Out__SEL__LCD_EN, CYREG_PRT0_LCD_EN
-.set SCSI_Out__SEL__MASK, 0x08
-.set SCSI_Out__SEL__PC, CYREG_PRT0_PC3
-.set SCSI_Out__SEL__PORT, 0
-.set SCSI_Out__SEL__PRT, CYREG_PRT0_PRT
-.set SCSI_Out__SEL__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL
-.set SCSI_Out__SEL__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN
-.set SCSI_Out__SEL__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0
-.set SCSI_Out__SEL__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1
-.set SCSI_Out__SEL__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0
-.set SCSI_Out__SEL__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1
-.set SCSI_Out__SEL__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT
-.set SCSI_Out__SEL__PS, CYREG_PRT0_PS
-.set SCSI_Out__SEL__SHIFT, 3
-.set SCSI_Out__SEL__SLW, CYREG_PRT0_SLW
-.set SCSI_Out_Bits_Sync_ctrl_reg__0__MASK, 0x01
-.set SCSI_Out_Bits_Sync_ctrl_reg__0__POS, 0
-.set SCSI_Out_Bits_Sync_ctrl_reg__1__MASK, 0x02
-.set SCSI_Out_Bits_Sync_ctrl_reg__1__POS, 1
-.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG, CYREG_B0_UDB07_08_ACTL
-.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG, CYREG_B0_UDB07_08_CTL
-.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG, CYREG_B0_UDB07_08_CTL
-.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG, CYREG_B0_UDB07_08_CTL
-.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG, CYREG_B0_UDB07_08_CTL
-.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_MASK_REG, CYREG_B0_UDB07_08_MSK
-.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG, CYREG_B0_UDB07_08_MSK
-.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG, CYREG_B0_UDB07_08_MSK
-.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG, CYREG_B0_UDB07_08_MSK
-.set SCSI_Out_Bits_Sync_ctrl_reg__2__MASK, 0x04
-.set SCSI_Out_Bits_Sync_ctrl_reg__2__POS, 2
-.set SCSI_Out_Bits_Sync_ctrl_reg__3__MASK, 0x08
-.set SCSI_Out_Bits_Sync_ctrl_reg__3__POS, 3
-.set SCSI_Out_Bits_Sync_ctrl_reg__4__MASK, 0x10
-.set SCSI_Out_Bits_Sync_ctrl_reg__4__POS, 4
-.set SCSI_Out_Bits_Sync_ctrl_reg__5__MASK, 0x20
-.set SCSI_Out_Bits_Sync_ctrl_reg__5__POS, 5
-.set SCSI_Out_Bits_Sync_ctrl_reg__6__MASK, 0x40
-.set SCSI_Out_Bits_Sync_ctrl_reg__6__POS, 6
-.set SCSI_Out_Bits_Sync_ctrl_reg__7__MASK, 0x80
-.set SCSI_Out_Bits_Sync_ctrl_reg__7__POS, 7
-.set SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_AUX_CTL_REG, CYREG_B0_UDB07_ACTL
-.set SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_REG, CYREG_B0_UDB07_CTL
-.set SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_ST_REG, CYREG_B0_UDB07_ST_CTL
-.set SCSI_Out_Bits_Sync_ctrl_reg__COUNT_REG, CYREG_B0_UDB07_CTL
-.set SCSI_Out_Bits_Sync_ctrl_reg__COUNT_ST_REG, CYREG_B0_UDB07_ST_CTL
-.set SCSI_Out_Bits_Sync_ctrl_reg__MASK, 0xFF
-.set SCSI_Out_Bits_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG, CYREG_B0_UDB07_MSK_ACTL
-.set SCSI_Out_Bits_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG, CYREG_B0_UDB07_MSK_ACTL
-.set SCSI_Out_Bits_Sync_ctrl_reg__PERIOD_REG, CYREG_B0_UDB07_MSK
-.set SCSI_Out_Ctl_Sync_ctrl_reg__0__MASK, 0x01
-.set SCSI_Out_Ctl_Sync_ctrl_reg__0__POS, 0
-.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG, CYREG_B0_UDB11_12_ACTL
-.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG, CYREG_B0_UDB11_12_CTL
-.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG, CYREG_B0_UDB11_12_CTL
-.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG, CYREG_B0_UDB11_12_CTL
-.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG, CYREG_B0_UDB11_12_CTL
-.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG, CYREG_B0_UDB11_12_MSK
-.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG, CYREG_B0_UDB11_12_MSK
-.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG, CYREG_B0_UDB11_12_MSK
-.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG, CYREG_B0_UDB11_12_MSK
-.set SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG, CYREG_B0_UDB11_ACTL
-.set SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_REG, CYREG_B0_UDB11_CTL
-.set SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_ST_REG, CYREG_B0_UDB11_ST_CTL
-.set SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_REG, CYREG_B0_UDB11_CTL
-.set SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_ST_REG, CYREG_B0_UDB11_ST_CTL
-.set SCSI_Out_Ctl_Sync_ctrl_reg__MASK, 0x01
-.set SCSI_Out_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG, CYREG_B0_UDB11_MSK_ACTL
-.set SCSI_Out_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG, CYREG_B0_UDB11_MSK_ACTL
-.set SCSI_Out_Ctl_Sync_ctrl_reg__PERIOD_REG, CYREG_B0_UDB11_MSK
-.set SCSI_Out_DBx__0__AG, CYREG_PRT6_AG
-.set SCSI_Out_DBx__0__AMUX, CYREG_PRT6_AMUX
-.set SCSI_Out_DBx__0__BIE, CYREG_PRT6_BIE
-.set SCSI_Out_DBx__0__BIT_MASK, CYREG_PRT6_BIT_MASK
-.set SCSI_Out_DBx__0__BYP, CYREG_PRT6_BYP
-.set SCSI_Out_DBx__0__CTL, CYREG_PRT6_CTL
-.set SCSI_Out_DBx__0__DM0, CYREG_PRT6_DM0
-.set SCSI_Out_DBx__0__DM1, CYREG_PRT6_DM1
-.set SCSI_Out_DBx__0__DM2, CYREG_PRT6_DM2
-.set SCSI_Out_DBx__0__DR, CYREG_PRT6_DR
-.set SCSI_Out_DBx__0__INP_DIS, CYREG_PRT6_INP_DIS
-.set SCSI_Out_DBx__0__INTTYPE, CYREG_PICU6_INTTYPE7
-.set SCSI_Out_DBx__0__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG
-.set SCSI_Out_DBx__0__LCD_EN, CYREG_PRT6_LCD_EN
-.set SCSI_Out_DBx__0__MASK, 0x80
-.set SCSI_Out_DBx__0__PC, CYREG_PRT6_PC7
-.set SCSI_Out_DBx__0__PORT, 6
-.set SCSI_Out_DBx__0__PRT, CYREG_PRT6_PRT
-.set SCSI_Out_DBx__0__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL
-.set SCSI_Out_DBx__0__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN
-.set SCSI_Out_DBx__0__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0
-.set SCSI_Out_DBx__0__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1
-.set SCSI_Out_DBx__0__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0
-.set SCSI_Out_DBx__0__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1
-.set SCSI_Out_DBx__0__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT
-.set SCSI_Out_DBx__0__PS, CYREG_PRT6_PS
-.set SCSI_Out_DBx__0__SHIFT, 7
-.set SCSI_Out_DBx__0__SLW, CYREG_PRT6_SLW
-.set SCSI_Out_DBx__1__AG, CYREG_PRT6_AG
-.set SCSI_Out_DBx__1__AMUX, CYREG_PRT6_AMUX
-.set SCSI_Out_DBx__1__BIE, CYREG_PRT6_BIE
-.set SCSI_Out_DBx__1__BIT_MASK, CYREG_PRT6_BIT_MASK
-.set SCSI_Out_DBx__1__BYP, CYREG_PRT6_BYP
-.set SCSI_Out_DBx__1__CTL, CYREG_PRT6_CTL
-.set SCSI_Out_DBx__1__DM0, CYREG_PRT6_DM0
-.set SCSI_Out_DBx__1__DM1, CYREG_PRT6_DM1
-.set SCSI_Out_DBx__1__DM2, CYREG_PRT6_DM2
-.set SCSI_Out_DBx__1__DR, CYREG_PRT6_DR
-.set SCSI_Out_DBx__1__INP_DIS, CYREG_PRT6_INP_DIS
-.set SCSI_Out_DBx__1__INTTYPE, CYREG_PICU6_INTTYPE5
-.set SCSI_Out_DBx__1__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG
-.set SCSI_Out_DBx__1__LCD_EN, CYREG_PRT6_LCD_EN
-.set SCSI_Out_DBx__1__MASK, 0x20
-.set SCSI_Out_DBx__1__PC, CYREG_PRT6_PC5
-.set SCSI_Out_DBx__1__PORT, 6
-.set SCSI_Out_DBx__1__PRT, CYREG_PRT6_PRT
-.set SCSI_Out_DBx__1__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL
-.set SCSI_Out_DBx__1__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN
-.set SCSI_Out_DBx__1__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0
-.set SCSI_Out_DBx__1__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1
-.set SCSI_Out_DBx__1__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0
-.set SCSI_Out_DBx__1__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1
-.set SCSI_Out_DBx__1__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT
-.set SCSI_Out_DBx__1__PS, CYREG_PRT6_PS
-.set SCSI_Out_DBx__1__SHIFT, 5
-.set SCSI_Out_DBx__1__SLW, CYREG_PRT6_SLW
-.set SCSI_Out_DBx__2__AG, CYREG_PRT12_AG
-.set SCSI_Out_DBx__2__BIE, CYREG_PRT12_BIE
-.set SCSI_Out_DBx__2__BIT_MASK, CYREG_PRT12_BIT_MASK
-.set SCSI_Out_DBx__2__BYP, CYREG_PRT12_BYP
-.set SCSI_Out_DBx__2__DM0, CYREG_PRT12_DM0
-.set SCSI_Out_DBx__2__DM1, CYREG_PRT12_DM1
-.set SCSI_Out_DBx__2__DM2, CYREG_PRT12_DM2
-.set SCSI_Out_DBx__2__DR, CYREG_PRT12_DR
-.set SCSI_Out_DBx__2__INP_DIS, CYREG_PRT12_INP_DIS
-.set SCSI_Out_DBx__2__INTTYPE, CYREG_PICU12_INTTYPE5
-.set SCSI_Out_DBx__2__MASK, 0x20
-.set SCSI_Out_DBx__2__PC, CYREG_PRT12_PC5
-.set SCSI_Out_DBx__2__PORT, 12
-.set SCSI_Out_DBx__2__PRT, CYREG_PRT12_PRT
-.set SCSI_Out_DBx__2__PRTDSI__DBL_SYNC_IN, CYREG_PRT12_DBL_SYNC_IN
-.set SCSI_Out_DBx__2__PRTDSI__OE_SEL0, CYREG_PRT12_OE_SEL0
-.set SCSI_Out_DBx__2__PRTDSI__OE_SEL1, CYREG_PRT12_OE_SEL1
-.set SCSI_Out_DBx__2__PRTDSI__OUT_SEL0, CYREG_PRT12_OUT_SEL0
-.set SCSI_Out_DBx__2__PRTDSI__OUT_SEL1, CYREG_PRT12_OUT_SEL1
-.set SCSI_Out_DBx__2__PRTDSI__SYNC_OUT, CYREG_PRT12_SYNC_OUT
-.set SCSI_Out_DBx__2__PS, CYREG_PRT12_PS
-.set SCSI_Out_DBx__2__SHIFT, 5
-.set SCSI_Out_DBx__2__SIO_CFG, CYREG_PRT12_SIO_CFG
-.set SCSI_Out_DBx__2__SIO_DIFF, CYREG_PRT12_SIO_DIFF
-.set SCSI_Out_DBx__2__SIO_HYST_EN, CYREG_PRT12_SIO_HYST_EN
-.set SCSI_Out_DBx__2__SIO_REG_HIFREQ, CYREG_PRT12_SIO_REG_HIFREQ
-.set SCSI_Out_DBx__2__SLW, CYREG_PRT12_SLW
-.set SCSI_Out_DBx__3__AG, CYREG_PRT2_AG
-.set SCSI_Out_DBx__3__AMUX, CYREG_PRT2_AMUX
-.set SCSI_Out_DBx__3__BIE, CYREG_PRT2_BIE
-.set SCSI_Out_DBx__3__BIT_MASK, CYREG_PRT2_BIT_MASK
-.set SCSI_Out_DBx__3__BYP, CYREG_PRT2_BYP
-.set SCSI_Out_DBx__3__CTL, CYREG_PRT2_CTL
-.set SCSI_Out_DBx__3__DM0, CYREG_PRT2_DM0
-.set SCSI_Out_DBx__3__DM1, CYREG_PRT2_DM1
-.set SCSI_Out_DBx__3__DM2, CYREG_PRT2_DM2
-.set SCSI_Out_DBx__3__DR, CYREG_PRT2_DR
-.set SCSI_Out_DBx__3__INP_DIS, CYREG_PRT2_INP_DIS
-.set SCSI_Out_DBx__3__INTTYPE, CYREG_PICU2_INTTYPE7
-.set SCSI_Out_DBx__3__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG
-.set SCSI_Out_DBx__3__LCD_EN, CYREG_PRT2_LCD_EN
-.set SCSI_Out_DBx__3__MASK, 0x80
-.set SCSI_Out_DBx__3__PC, CYREG_PRT2_PC7
-.set SCSI_Out_DBx__3__PORT, 2
-.set SCSI_Out_DBx__3__PRT, CYREG_PRT2_PRT
-.set SCSI_Out_DBx__3__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL
-.set SCSI_Out_DBx__3__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN
-.set SCSI_Out_DBx__3__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0
-.set SCSI_Out_DBx__3__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1
-.set SCSI_Out_DBx__3__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0
-.set SCSI_Out_DBx__3__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1
-.set SCSI_Out_DBx__3__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT
-.set SCSI_Out_DBx__3__PS, CYREG_PRT2_PS
-.set SCSI_Out_DBx__3__SHIFT, 7
-.set SCSI_Out_DBx__3__SLW, CYREG_PRT2_SLW
-.set SCSI_Out_DBx__4__AG, CYREG_PRT2_AG
-.set SCSI_Out_DBx__4__AMUX, CYREG_PRT2_AMUX
-.set SCSI_Out_DBx__4__BIE, CYREG_PRT2_BIE
-.set SCSI_Out_DBx__4__BIT_MASK, CYREG_PRT2_BIT_MASK
-.set SCSI_Out_DBx__4__BYP, CYREG_PRT2_BYP
-.set SCSI_Out_DBx__4__CTL, CYREG_PRT2_CTL
-.set SCSI_Out_DBx__4__DM0, CYREG_PRT2_DM0
-.set SCSI_Out_DBx__4__DM1, CYREG_PRT2_DM1
-.set SCSI_Out_DBx__4__DM2, CYREG_PRT2_DM2
-.set SCSI_Out_DBx__4__DR, CYREG_PRT2_DR
-.set SCSI_Out_DBx__4__INP_DIS, CYREG_PRT2_INP_DIS
-.set SCSI_Out_DBx__4__INTTYPE, CYREG_PICU2_INTTYPE5
-.set SCSI_Out_DBx__4__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG
-.set SCSI_Out_DBx__4__LCD_EN, CYREG_PRT2_LCD_EN
-.set SCSI_Out_DBx__4__MASK, 0x20
-.set SCSI_Out_DBx__4__PC, CYREG_PRT2_PC5
-.set SCSI_Out_DBx__4__PORT, 2
-.set SCSI_Out_DBx__4__PRT, CYREG_PRT2_PRT
-.set SCSI_Out_DBx__4__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL
-.set SCSI_Out_DBx__4__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN
-.set SCSI_Out_DBx__4__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0
-.set SCSI_Out_DBx__4__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1
-.set SCSI_Out_DBx__4__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0
-.set SCSI_Out_DBx__4__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1
-.set SCSI_Out_DBx__4__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT
-.set SCSI_Out_DBx__4__PS, CYREG_PRT2_PS
-.set SCSI_Out_DBx__4__SHIFT, 5
-.set SCSI_Out_DBx__4__SLW, CYREG_PRT2_SLW
-.set SCSI_Out_DBx__5__AG, CYREG_PRT2_AG
-.set SCSI_Out_DBx__5__AMUX, CYREG_PRT2_AMUX
-.set SCSI_Out_DBx__5__BIE, CYREG_PRT2_BIE
-.set SCSI_Out_DBx__5__BIT_MASK, CYREG_PRT2_BIT_MASK
-.set SCSI_Out_DBx__5__BYP, CYREG_PRT2_BYP
-.set SCSI_Out_DBx__5__CTL, CYREG_PRT2_CTL
-.set SCSI_Out_DBx__5__DM0, CYREG_PRT2_DM0
-.set SCSI_Out_DBx__5__DM1, CYREG_PRT2_DM1
-.set SCSI_Out_DBx__5__DM2, CYREG_PRT2_DM2
-.set SCSI_Out_DBx__5__DR, CYREG_PRT2_DR
-.set SCSI_Out_DBx__5__INP_DIS, CYREG_PRT2_INP_DIS
-.set SCSI_Out_DBx__5__INTTYPE, CYREG_PICU2_INTTYPE3
-.set SCSI_Out_DBx__5__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG
-.set SCSI_Out_DBx__5__LCD_EN, CYREG_PRT2_LCD_EN
-.set SCSI_Out_DBx__5__MASK, 0x08
-.set SCSI_Out_DBx__5__PC, CYREG_PRT2_PC3
-.set SCSI_Out_DBx__5__PORT, 2
-.set SCSI_Out_DBx__5__PRT, CYREG_PRT2_PRT
-.set SCSI_Out_DBx__5__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL
-.set SCSI_Out_DBx__5__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN
-.set SCSI_Out_DBx__5__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0
-.set SCSI_Out_DBx__5__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1
-.set SCSI_Out_DBx__5__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0
-.set SCSI_Out_DBx__5__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1
-.set SCSI_Out_DBx__5__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT
-.set SCSI_Out_DBx__5__PS, CYREG_PRT2_PS
-.set SCSI_Out_DBx__5__SHIFT, 3
-.set SCSI_Out_DBx__5__SLW, CYREG_PRT2_SLW
-.set SCSI_Out_DBx__6__AG, CYREG_PRT2_AG
-.set SCSI_Out_DBx__6__AMUX, CYREG_PRT2_AMUX
-.set SCSI_Out_DBx__6__BIE, CYREG_PRT2_BIE
-.set SCSI_Out_DBx__6__BIT_MASK, CYREG_PRT2_BIT_MASK
-.set SCSI_Out_DBx__6__BYP, CYREG_PRT2_BYP
-.set SCSI_Out_DBx__6__CTL, CYREG_PRT2_CTL
-.set SCSI_Out_DBx__6__DM0, CYREG_PRT2_DM0
-.set SCSI_Out_DBx__6__DM1, CYREG_PRT2_DM1
-.set SCSI_Out_DBx__6__DM2, CYREG_PRT2_DM2
-.set SCSI_Out_DBx__6__DR, CYREG_PRT2_DR
-.set SCSI_Out_DBx__6__INP_DIS, CYREG_PRT2_INP_DIS
-.set SCSI_Out_DBx__6__INTTYPE, CYREG_PICU2_INTTYPE1
-.set SCSI_Out_DBx__6__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG
-.set SCSI_Out_DBx__6__LCD_EN, CYREG_PRT2_LCD_EN
-.set SCSI_Out_DBx__6__MASK, 0x02
-.set SCSI_Out_DBx__6__PC, CYREG_PRT2_PC1
-.set SCSI_Out_DBx__6__PORT, 2
-.set SCSI_Out_DBx__6__PRT, CYREG_PRT2_PRT
-.set SCSI_Out_DBx__6__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL
-.set SCSI_Out_DBx__6__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN
-.set SCSI_Out_DBx__6__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0
-.set SCSI_Out_DBx__6__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1
-.set SCSI_Out_DBx__6__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0
-.set SCSI_Out_DBx__6__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1
-.set SCSI_Out_DBx__6__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT
-.set SCSI_Out_DBx__6__PS, CYREG_PRT2_PS
-.set SCSI_Out_DBx__6__SHIFT, 1
-.set SCSI_Out_DBx__6__SLW, CYREG_PRT2_SLW
-.set SCSI_Out_DBx__7__AG, CYREG_PRT15_AG
-.set SCSI_Out_DBx__7__AMUX, CYREG_PRT15_AMUX
-.set SCSI_Out_DBx__7__BIE, CYREG_PRT15_BIE
-.set SCSI_Out_DBx__7__BIT_MASK, CYREG_PRT15_BIT_MASK
-.set SCSI_Out_DBx__7__BYP, CYREG_PRT15_BYP
-.set SCSI_Out_DBx__7__CTL, CYREG_PRT15_CTL
-.set SCSI_Out_DBx__7__DM0, CYREG_PRT15_DM0
-.set SCSI_Out_DBx__7__DM1, CYREG_PRT15_DM1
-.set SCSI_Out_DBx__7__DM2, CYREG_PRT15_DM2
-.set SCSI_Out_DBx__7__DR, CYREG_PRT15_DR
-.set SCSI_Out_DBx__7__INP_DIS, CYREG_PRT15_INP_DIS
-.set SCSI_Out_DBx__7__INTTYPE, CYREG_PICU15_INTTYPE5
-.set SCSI_Out_DBx__7__LCD_COM_SEG, CYREG_PRT15_LCD_COM_SEG
-.set SCSI_Out_DBx__7__LCD_EN, CYREG_PRT15_LCD_EN
-.set SCSI_Out_DBx__7__MASK, 0x20
-.set SCSI_Out_DBx__7__PC, CYREG_IO_PC_PRT15_PC5
-.set SCSI_Out_DBx__7__PORT, 15
-.set SCSI_Out_DBx__7__PRT, CYREG_PRT15_PRT
-.set SCSI_Out_DBx__7__PRTDSI__CAPS_SEL, CYREG_PRT15_CAPS_SEL
-.set SCSI_Out_DBx__7__PRTDSI__DBL_SYNC_IN, CYREG_PRT15_DBL_SYNC_IN
-.set SCSI_Out_DBx__7__PRTDSI__OE_SEL0, CYREG_PRT15_OE_SEL0
-.set SCSI_Out_DBx__7__PRTDSI__OE_SEL1, CYREG_PRT15_OE_SEL1
-.set SCSI_Out_DBx__7__PRTDSI__OUT_SEL0, CYREG_PRT15_OUT_SEL0
-.set SCSI_Out_DBx__7__PRTDSI__OUT_SEL1, CYREG_PRT15_OUT_SEL1
-.set SCSI_Out_DBx__7__PRTDSI__SYNC_OUT, CYREG_PRT15_SYNC_OUT
-.set SCSI_Out_DBx__7__PS, CYREG_PRT15_PS
-.set SCSI_Out_DBx__7__SHIFT, 5
-.set SCSI_Out_DBx__7__SLW, CYREG_PRT15_SLW
-.set SCSI_Out_DBx__DB0__AG, CYREG_PRT6_AG
-.set SCSI_Out_DBx__DB0__AMUX, CYREG_PRT6_AMUX
-.set SCSI_Out_DBx__DB0__BIE, CYREG_PRT6_BIE
-.set SCSI_Out_DBx__DB0__BIT_MASK, CYREG_PRT6_BIT_MASK
-.set SCSI_Out_DBx__DB0__BYP, CYREG_PRT6_BYP
-.set SCSI_Out_DBx__DB0__CTL, CYREG_PRT6_CTL
-.set SCSI_Out_DBx__DB0__DM0, CYREG_PRT6_DM0
-.set SCSI_Out_DBx__DB0__DM1, CYREG_PRT6_DM1
-.set SCSI_Out_DBx__DB0__DM2, CYREG_PRT6_DM2
-.set SCSI_Out_DBx__DB0__DR, CYREG_PRT6_DR
-.set SCSI_Out_DBx__DB0__INP_DIS, CYREG_PRT6_INP_DIS
-.set SCSI_Out_DBx__DB0__INTTYPE, CYREG_PICU6_INTTYPE7
-.set SCSI_Out_DBx__DB0__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG
-.set SCSI_Out_DBx__DB0__LCD_EN, CYREG_PRT6_LCD_EN
-.set SCSI_Out_DBx__DB0__MASK, 0x80
-.set SCSI_Out_DBx__DB0__PC, CYREG_PRT6_PC7
-.set SCSI_Out_DBx__DB0__PORT, 6
-.set SCSI_Out_DBx__DB0__PRT, CYREG_PRT6_PRT
-.set SCSI_Out_DBx__DB0__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL
-.set SCSI_Out_DBx__DB0__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN
-.set SCSI_Out_DBx__DB0__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0
-.set SCSI_Out_DBx__DB0__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1
-.set SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0
-.set SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1
-.set SCSI_Out_DBx__DB0__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT
-.set SCSI_Out_DBx__DB0__PS, CYREG_PRT6_PS
-.set SCSI_Out_DBx__DB0__SHIFT, 7
-.set SCSI_Out_DBx__DB0__SLW, CYREG_PRT6_SLW
-.set SCSI_Out_DBx__DB1__AG, CYREG_PRT6_AG
-.set SCSI_Out_DBx__DB1__AMUX, CYREG_PRT6_AMUX
-.set SCSI_Out_DBx__DB1__BIE, CYREG_PRT6_BIE
-.set SCSI_Out_DBx__DB1__BIT_MASK, CYREG_PRT6_BIT_MASK
-.set SCSI_Out_DBx__DB1__BYP, CYREG_PRT6_BYP
-.set SCSI_Out_DBx__DB1__CTL, CYREG_PRT6_CTL
-.set SCSI_Out_DBx__DB1__DM0, CYREG_PRT6_DM0
-.set SCSI_Out_DBx__DB1__DM1, CYREG_PRT6_DM1
-.set SCSI_Out_DBx__DB1__DM2, CYREG_PRT6_DM2
-.set SCSI_Out_DBx__DB1__DR, CYREG_PRT6_DR
-.set SCSI_Out_DBx__DB1__INP_DIS, CYREG_PRT6_INP_DIS
-.set SCSI_Out_DBx__DB1__INTTYPE, CYREG_PICU6_INTTYPE5
-.set SCSI_Out_DBx__DB1__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG
-.set SCSI_Out_DBx__DB1__LCD_EN, CYREG_PRT6_LCD_EN
-.set SCSI_Out_DBx__DB1__MASK, 0x20
-.set SCSI_Out_DBx__DB1__PC, CYREG_PRT6_PC5
-.set SCSI_Out_DBx__DB1__PORT, 6
-.set SCSI_Out_DBx__DB1__PRT, CYREG_PRT6_PRT
-.set SCSI_Out_DBx__DB1__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL
-.set SCSI_Out_DBx__DB1__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN
-.set SCSI_Out_DBx__DB1__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0
-.set SCSI_Out_DBx__DB1__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1
-.set SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0
-.set SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1
-.set SCSI_Out_DBx__DB1__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT
-.set SCSI_Out_DBx__DB1__PS, CYREG_PRT6_PS
-.set SCSI_Out_DBx__DB1__SHIFT, 5
-.set SCSI_Out_DBx__DB1__SLW, CYREG_PRT6_SLW
-.set SCSI_Out_DBx__DB2__AG, CYREG_PRT12_AG
-.set SCSI_Out_DBx__DB2__BIE, CYREG_PRT12_BIE
-.set SCSI_Out_DBx__DB2__BIT_MASK, CYREG_PRT12_BIT_MASK
-.set SCSI_Out_DBx__DB2__BYP, CYREG_PRT12_BYP
-.set SCSI_Out_DBx__DB2__DM0, CYREG_PRT12_DM0
-.set SCSI_Out_DBx__DB2__DM1, CYREG_PRT12_DM1
-.set SCSI_Out_DBx__DB2__DM2, CYREG_PRT12_DM2
-.set SCSI_Out_DBx__DB2__DR, CYREG_PRT12_DR
-.set SCSI_Out_DBx__DB2__INP_DIS, CYREG_PRT12_INP_DIS
-.set SCSI_Out_DBx__DB2__INTTYPE, CYREG_PICU12_INTTYPE5
-.set SCSI_Out_DBx__DB2__MASK, 0x20
-.set SCSI_Out_DBx__DB2__PC, CYREG_PRT12_PC5
-.set SCSI_Out_DBx__DB2__PORT, 12
-.set SCSI_Out_DBx__DB2__PRT, CYREG_PRT12_PRT
-.set SCSI_Out_DBx__DB2__PRTDSI__DBL_SYNC_IN, CYREG_PRT12_DBL_SYNC_IN
-.set SCSI_Out_DBx__DB2__PRTDSI__OE_SEL0, CYREG_PRT12_OE_SEL0
-.set SCSI_Out_DBx__DB2__PRTDSI__OE_SEL1, CYREG_PRT12_OE_SEL1
-.set SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL0, CYREG_PRT12_OUT_SEL0
-.set SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL1, CYREG_PRT12_OUT_SEL1
-.set SCSI_Out_DBx__DB2__PRTDSI__SYNC_OUT, CYREG_PRT12_SYNC_OUT
-.set SCSI_Out_DBx__DB2__PS, CYREG_PRT12_PS
-.set SCSI_Out_DBx__DB2__SHIFT, 5
-.set SCSI_Out_DBx__DB2__SIO_CFG, CYREG_PRT12_SIO_CFG
-.set SCSI_Out_DBx__DB2__SIO_DIFF, CYREG_PRT12_SIO_DIFF
-.set SCSI_Out_DBx__DB2__SIO_HYST_EN, CYREG_PRT12_SIO_HYST_EN
-.set SCSI_Out_DBx__DB2__SIO_REG_HIFREQ, CYREG_PRT12_SIO_REG_HIFREQ
-.set SCSI_Out_DBx__DB2__SLW, CYREG_PRT12_SLW
-.set SCSI_Out_DBx__DB3__AG, CYREG_PRT2_AG
-.set SCSI_Out_DBx__DB3__AMUX, CYREG_PRT2_AMUX
-.set SCSI_Out_DBx__DB3__BIE, CYREG_PRT2_BIE
-.set SCSI_Out_DBx__DB3__BIT_MASK, CYREG_PRT2_BIT_MASK
-.set SCSI_Out_DBx__DB3__BYP, CYREG_PRT2_BYP
-.set SCSI_Out_DBx__DB3__CTL, CYREG_PRT2_CTL
-.set SCSI_Out_DBx__DB3__DM0, CYREG_PRT2_DM0
-.set SCSI_Out_DBx__DB3__DM1, CYREG_PRT2_DM1
-.set SCSI_Out_DBx__DB3__DM2, CYREG_PRT2_DM2
-.set SCSI_Out_DBx__DB3__DR, CYREG_PRT2_DR
-.set SCSI_Out_DBx__DB3__INP_DIS, CYREG_PRT2_INP_DIS
-.set SCSI_Out_DBx__DB3__INTTYPE, CYREG_PICU2_INTTYPE7
-.set SCSI_Out_DBx__DB3__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG
-.set SCSI_Out_DBx__DB3__LCD_EN, CYREG_PRT2_LCD_EN
-.set SCSI_Out_DBx__DB3__MASK, 0x80
-.set SCSI_Out_DBx__DB3__PC, CYREG_PRT2_PC7
-.set SCSI_Out_DBx__DB3__PORT, 2
-.set SCSI_Out_DBx__DB3__PRT, CYREG_PRT2_PRT
-.set SCSI_Out_DBx__DB3__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL
-.set SCSI_Out_DBx__DB3__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN
-.set SCSI_Out_DBx__DB3__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0
-.set SCSI_Out_DBx__DB3__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1
-.set SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0
-.set SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1
-.set SCSI_Out_DBx__DB3__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT
-.set SCSI_Out_DBx__DB3__PS, CYREG_PRT2_PS
-.set SCSI_Out_DBx__DB3__SHIFT, 7
-.set SCSI_Out_DBx__DB3__SLW, CYREG_PRT2_SLW
-.set SCSI_Out_DBx__DB4__AG, CYREG_PRT2_AG
-.set SCSI_Out_DBx__DB4__AMUX, CYREG_PRT2_AMUX
-.set SCSI_Out_DBx__DB4__BIE, CYREG_PRT2_BIE
-.set SCSI_Out_DBx__DB4__BIT_MASK, CYREG_PRT2_BIT_MASK
-.set SCSI_Out_DBx__DB4__BYP, CYREG_PRT2_BYP
-.set SCSI_Out_DBx__DB4__CTL, CYREG_PRT2_CTL
-.set SCSI_Out_DBx__DB4__DM0, CYREG_PRT2_DM0
-.set SCSI_Out_DBx__DB4__DM1, CYREG_PRT2_DM1
-.set SCSI_Out_DBx__DB4__DM2, CYREG_PRT2_DM2
-.set SCSI_Out_DBx__DB4__DR, CYREG_PRT2_DR
-.set SCSI_Out_DBx__DB4__INP_DIS, CYREG_PRT2_INP_DIS
-.set SCSI_Out_DBx__DB4__INTTYPE, CYREG_PICU2_INTTYPE5
-.set SCSI_Out_DBx__DB4__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG
-.set SCSI_Out_DBx__DB4__LCD_EN, CYREG_PRT2_LCD_EN
-.set SCSI_Out_DBx__DB4__MASK, 0x20
-.set SCSI_Out_DBx__DB4__PC, CYREG_PRT2_PC5
-.set SCSI_Out_DBx__DB4__PORT, 2
-.set SCSI_Out_DBx__DB4__PRT, CYREG_PRT2_PRT
-.set SCSI_Out_DBx__DB4__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL
-.set SCSI_Out_DBx__DB4__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN
-.set SCSI_Out_DBx__DB4__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0
-.set SCSI_Out_DBx__DB4__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1
-.set SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0
-.set SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1
-.set SCSI_Out_DBx__DB4__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT
-.set SCSI_Out_DBx__DB4__PS, CYREG_PRT2_PS
-.set SCSI_Out_DBx__DB4__SHIFT, 5
-.set SCSI_Out_DBx__DB4__SLW, CYREG_PRT2_SLW
-.set SCSI_Out_DBx__DB5__AG, CYREG_PRT2_AG
-.set SCSI_Out_DBx__DB5__AMUX, CYREG_PRT2_AMUX
-.set SCSI_Out_DBx__DB5__BIE, CYREG_PRT2_BIE
-.set SCSI_Out_DBx__DB5__BIT_MASK, CYREG_PRT2_BIT_MASK
-.set SCSI_Out_DBx__DB5__BYP, CYREG_PRT2_BYP
-.set SCSI_Out_DBx__DB5__CTL, CYREG_PRT2_CTL
-.set SCSI_Out_DBx__DB5__DM0, CYREG_PRT2_DM0
-.set SCSI_Out_DBx__DB5__DM1, CYREG_PRT2_DM1
-.set SCSI_Out_DBx__DB5__DM2, CYREG_PRT2_DM2
-.set SCSI_Out_DBx__DB5__DR, CYREG_PRT2_DR
-.set SCSI_Out_DBx__DB5__INP_DIS, CYREG_PRT2_INP_DIS
-.set SCSI_Out_DBx__DB5__INTTYPE, CYREG_PICU2_INTTYPE3
-.set SCSI_Out_DBx__DB5__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG
-.set SCSI_Out_DBx__DB5__LCD_EN, CYREG_PRT2_LCD_EN
-.set SCSI_Out_DBx__DB5__MASK, 0x08
-.set SCSI_Out_DBx__DB5__PC, CYREG_PRT2_PC3
-.set SCSI_Out_DBx__DB5__PORT, 2
-.set SCSI_Out_DBx__DB5__PRT, CYREG_PRT2_PRT
-.set SCSI_Out_DBx__DB5__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL
-.set SCSI_Out_DBx__DB5__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN
-.set SCSI_Out_DBx__DB5__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0
-.set SCSI_Out_DBx__DB5__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1
-.set SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0
-.set SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1
-.set SCSI_Out_DBx__DB5__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT
-.set SCSI_Out_DBx__DB5__PS, CYREG_PRT2_PS
-.set SCSI_Out_DBx__DB5__SHIFT, 3
-.set SCSI_Out_DBx__DB5__SLW, CYREG_PRT2_SLW
-.set SCSI_Out_DBx__DB6__AG, CYREG_PRT2_AG
-.set SCSI_Out_DBx__DB6__AMUX, CYREG_PRT2_AMUX
-.set SCSI_Out_DBx__DB6__BIE, CYREG_PRT2_BIE
-.set SCSI_Out_DBx__DB6__BIT_MASK, CYREG_PRT2_BIT_MASK
-.set SCSI_Out_DBx__DB6__BYP, CYREG_PRT2_BYP
-.set SCSI_Out_DBx__DB6__CTL, CYREG_PRT2_CTL
-.set SCSI_Out_DBx__DB6__DM0, CYREG_PRT2_DM0
-.set SCSI_Out_DBx__DB6__DM1, CYREG_PRT2_DM1
-.set SCSI_Out_DBx__DB6__DM2, CYREG_PRT2_DM2
-.set SCSI_Out_DBx__DB6__DR, CYREG_PRT2_DR
-.set SCSI_Out_DBx__DB6__INP_DIS, CYREG_PRT2_INP_DIS
-.set SCSI_Out_DBx__DB6__INTTYPE, CYREG_PICU2_INTTYPE1
-.set SCSI_Out_DBx__DB6__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG
-.set SCSI_Out_DBx__DB6__LCD_EN, CYREG_PRT2_LCD_EN
-.set SCSI_Out_DBx__DB6__MASK, 0x02
-.set SCSI_Out_DBx__DB6__PC, CYREG_PRT2_PC1
-.set SCSI_Out_DBx__DB6__PORT, 2
-.set SCSI_Out_DBx__DB6__PRT, CYREG_PRT2_PRT
-.set SCSI_Out_DBx__DB6__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL
-.set SCSI_Out_DBx__DB6__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN
-.set SCSI_Out_DBx__DB6__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0
-.set SCSI_Out_DBx__DB6__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1
-.set SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0
-.set SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1
-.set SCSI_Out_DBx__DB6__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT
-.set SCSI_Out_DBx__DB6__PS, CYREG_PRT2_PS
-.set SCSI_Out_DBx__DB6__SHIFT, 1
-.set SCSI_Out_DBx__DB6__SLW, CYREG_PRT2_SLW
-.set SCSI_Out_DBx__DB7__AG, CYREG_PRT15_AG
-.set SCSI_Out_DBx__DB7__AMUX, CYREG_PRT15_AMUX
-.set SCSI_Out_DBx__DB7__BIE, CYREG_PRT15_BIE
-.set SCSI_Out_DBx__DB7__BIT_MASK, CYREG_PRT15_BIT_MASK
-.set SCSI_Out_DBx__DB7__BYP, CYREG_PRT15_BYP
-.set SCSI_Out_DBx__DB7__CTL, CYREG_PRT15_CTL
-.set SCSI_Out_DBx__DB7__DM0, CYREG_PRT15_DM0
-.set SCSI_Out_DBx__DB7__DM1, CYREG_PRT15_DM1
-.set SCSI_Out_DBx__DB7__DM2, CYREG_PRT15_DM2
-.set SCSI_Out_DBx__DB7__DR, CYREG_PRT15_DR
-.set SCSI_Out_DBx__DB7__INP_DIS, CYREG_PRT15_INP_DIS
-.set SCSI_Out_DBx__DB7__INTTYPE, CYREG_PICU15_INTTYPE5
-.set SCSI_Out_DBx__DB7__LCD_COM_SEG, CYREG_PRT15_LCD_COM_SEG
-.set SCSI_Out_DBx__DB7__LCD_EN, CYREG_PRT15_LCD_EN
-.set SCSI_Out_DBx__DB7__MASK, 0x20
-.set SCSI_Out_DBx__DB7__PC, CYREG_IO_PC_PRT15_PC5
-.set SCSI_Out_DBx__DB7__PORT, 15
-.set SCSI_Out_DBx__DB7__PRT, CYREG_PRT15_PRT
-.set SCSI_Out_DBx__DB7__PRTDSI__CAPS_SEL, CYREG_PRT15_CAPS_SEL
-.set SCSI_Out_DBx__DB7__PRTDSI__DBL_SYNC_IN, CYREG_PRT15_DBL_SYNC_IN
-.set SCSI_Out_DBx__DB7__PRTDSI__OE_SEL0, CYREG_PRT15_OE_SEL0
-.set SCSI_Out_DBx__DB7__PRTDSI__OE_SEL1, CYREG_PRT15_OE_SEL1
-.set SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL0, CYREG_PRT15_OUT_SEL0
-.set SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL1, CYREG_PRT15_OUT_SEL1
-.set SCSI_Out_DBx__DB7__PRTDSI__SYNC_OUT, CYREG_PRT15_SYNC_OUT
-.set SCSI_Out_DBx__DB7__PS, CYREG_PRT15_PS
-.set SCSI_Out_DBx__DB7__SHIFT, 5
-.set SCSI_Out_DBx__DB7__SLW, CYREG_PRT15_SLW
-
-/* SCSI_Parity_Error */
-.set SCSI_Parity_Error_sts_sts_reg__0__MASK, 0x01
-.set SCSI_Parity_Error_sts_sts_reg__0__POS, 0
-.set SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG, CYREG_B0_UDB02_03_ACTL
-.set SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_REG, CYREG_B0_UDB02_03_ST
-.set SCSI_Parity_Error_sts_sts_reg__MASK, 0x01
-.set SCSI_Parity_Error_sts_sts_reg__MASK_REG, CYREG_B0_UDB02_MSK
-.set SCSI_Parity_Error_sts_sts_reg__MASK_ST_AUX_CTL_REG, CYREG_B0_UDB02_MSK_ACTL
-.set SCSI_Parity_Error_sts_sts_reg__PER_ST_AUX_CTL_REG, CYREG_B0_UDB02_MSK_ACTL
-.set SCSI_Parity_Error_sts_sts_reg__STATUS_AUX_CTL_REG, CYREG_B0_UDB02_ACTL
-.set SCSI_Parity_Error_sts_sts_reg__STATUS_CNT_REG, CYREG_B0_UDB02_ST_CTL
-.set SCSI_Parity_Error_sts_sts_reg__STATUS_CONTROL_REG, CYREG_B0_UDB02_ST_CTL
-.set SCSI_Parity_Error_sts_sts_reg__STATUS_REG, CYREG_B0_UDB02_ST
-
-/* SCSI_RST_ISR */
-.set SCSI_RST_ISR__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0
-.set SCSI_RST_ISR__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0
-.set SCSI_RST_ISR__INTC_MASK, 0x02
-.set SCSI_RST_ISR__INTC_NUMBER, 1
-.set SCSI_RST_ISR__INTC_PRIOR_NUM, 7
-.set SCSI_RST_ISR__INTC_PRIOR_REG, CYREG_NVIC_PRI_1
-.set SCSI_RST_ISR__INTC_SET_EN_REG, CYREG_NVIC_SETENA0
-.set SCSI_RST_ISR__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0
-
-/* SCSI_RX_DMA */
-.set SCSI_RX_DMA__DRQ_CTL, CYREG_IDMUX_DRQ_CTL0
-.set SCSI_RX_DMA__DRQ_NUMBER, 0
-.set SCSI_RX_DMA__NUMBEROF_TDS, 0
-.set SCSI_RX_DMA__PRIORITY, 2
-.set SCSI_RX_DMA__TERMIN_EN, 0
-.set SCSI_RX_DMA__TERMIN_SEL, 0
-.set SCSI_RX_DMA__TERMOUT0_EN, 1
-.set SCSI_RX_DMA__TERMOUT0_SEL, 0
-.set SCSI_RX_DMA__TERMOUT1_EN, 0
-.set SCSI_RX_DMA__TERMOUT1_SEL, 0
-.set SCSI_RX_DMA_COMPLETE__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0
-.set SCSI_RX_DMA_COMPLETE__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0
-.set SCSI_RX_DMA_COMPLETE__INTC_MASK, 0x04
-.set SCSI_RX_DMA_COMPLETE__INTC_NUMBER, 2
-.set SCSI_RX_DMA_COMPLETE__INTC_PRIOR_NUM, 7
-.set SCSI_RX_DMA_COMPLETE__INTC_PRIOR_REG, CYREG_NVIC_PRI_2
-.set SCSI_RX_DMA_COMPLETE__INTC_SET_EN_REG, CYREG_NVIC_SETENA0
-.set SCSI_RX_DMA_COMPLETE__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0
-
-/* SCSI_SEL_ISR */
-.set SCSI_SEL_ISR__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0
-.set SCSI_SEL_ISR__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0
-.set SCSI_SEL_ISR__INTC_MASK, 0x08
-.set SCSI_SEL_ISR__INTC_NUMBER, 3
-.set SCSI_SEL_ISR__INTC_PRIOR_NUM, 7
-.set SCSI_SEL_ISR__INTC_PRIOR_REG, CYREG_NVIC_PRI_3
-.set SCSI_SEL_ISR__INTC_SET_EN_REG, CYREG_NVIC_SETENA0
-.set SCSI_SEL_ISR__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0
-
-/* SCSI_TX_DMA */
-.set SCSI_TX_DMA__DRQ_CTL, CYREG_IDMUX_DRQ_CTL0
-.set SCSI_TX_DMA__DRQ_NUMBER, 1
-.set SCSI_TX_DMA__NUMBEROF_TDS, 0
-.set SCSI_TX_DMA__PRIORITY, 2
-.set SCSI_TX_DMA__TERMIN_EN, 0
-.set SCSI_TX_DMA__TERMIN_SEL, 0
-.set SCSI_TX_DMA__TERMOUT0_EN, 1
-.set SCSI_TX_DMA__TERMOUT0_SEL, 1
-.set SCSI_TX_DMA__TERMOUT1_EN, 0
-.set SCSI_TX_DMA__TERMOUT1_SEL, 0
-.set SCSI_TX_DMA_COMPLETE__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0
-.set SCSI_TX_DMA_COMPLETE__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0
-.set SCSI_TX_DMA_COMPLETE__INTC_MASK, 0x10
-.set SCSI_TX_DMA_COMPLETE__INTC_NUMBER, 4
-.set SCSI_TX_DMA_COMPLETE__INTC_PRIOR_NUM, 7
-.set SCSI_TX_DMA_COMPLETE__INTC_PRIOR_REG, CYREG_NVIC_PRI_4
-.set SCSI_TX_DMA_COMPLETE__INTC_SET_EN_REG, CYREG_NVIC_SETENA0
-.set SCSI_TX_DMA_COMPLETE__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0
-
-/* SDCard_BSPIM */
-.set SDCard_BSPIM_BitCounter__16BIT_CONTROL_AUX_CTL_REG, CYREG_B1_UDB04_05_ACTL
-.set SDCard_BSPIM_BitCounter__16BIT_CONTROL_CONTROL_REG, CYREG_B1_UDB04_05_CTL
-.set SDCard_BSPIM_BitCounter__16BIT_CONTROL_COUNT_REG, CYREG_B1_UDB04_05_CTL
-.set SDCard_BSPIM_BitCounter__16BIT_COUNT_CONTROL_REG, CYREG_B1_UDB04_05_CTL
-.set SDCard_BSPIM_BitCounter__16BIT_COUNT_COUNT_REG, CYREG_B1_UDB04_05_CTL
-.set SDCard_BSPIM_BitCounter__16BIT_MASK_MASK_REG, CYREG_B1_UDB04_05_MSK
-.set SDCard_BSPIM_BitCounter__16BIT_MASK_PERIOD_REG, CYREG_B1_UDB04_05_MSK
-.set SDCard_BSPIM_BitCounter__16BIT_PERIOD_MASK_REG, CYREG_B1_UDB04_05_MSK
-.set SDCard_BSPIM_BitCounter__16BIT_PERIOD_PERIOD_REG, CYREG_B1_UDB04_05_MSK
-.set SDCard_BSPIM_BitCounter__CONTROL_AUX_CTL_REG, CYREG_B1_UDB04_ACTL
-.set SDCard_BSPIM_BitCounter__CONTROL_REG, CYREG_B1_UDB04_CTL
-.set SDCard_BSPIM_BitCounter__CONTROL_ST_REG, CYREG_B1_UDB04_ST_CTL
-.set SDCard_BSPIM_BitCounter__COUNT_REG, CYREG_B1_UDB04_CTL
-.set SDCard_BSPIM_BitCounter__COUNT_ST_REG, CYREG_B1_UDB04_ST_CTL
-.set SDCard_BSPIM_BitCounter__MASK_CTL_AUX_CTL_REG, CYREG_B1_UDB04_MSK_ACTL
-.set SDCard_BSPIM_BitCounter__PER_CTL_AUX_CTL_REG, CYREG_B1_UDB04_MSK_ACTL
-.set SDCard_BSPIM_BitCounter__PERIOD_REG, CYREG_B1_UDB04_MSK
-.set SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_AUX_CTL_REG, CYREG_B1_UDB04_05_ACTL
-.set SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_REG, CYREG_B1_UDB04_05_ST
-.set SDCard_BSPIM_BitCounter_ST__MASK_REG, CYREG_B1_UDB04_MSK
-.set SDCard_BSPIM_BitCounter_ST__MASK_ST_AUX_CTL_REG, CYREG_B1_UDB04_MSK_ACTL
-.set SDCard_BSPIM_BitCounter_ST__PER_ST_AUX_CTL_REG, CYREG_B1_UDB04_MSK_ACTL
-.set SDCard_BSPIM_BitCounter_ST__STATUS_AUX_CTL_REG, CYREG_B1_UDB04_ACTL
-.set SDCard_BSPIM_BitCounter_ST__STATUS_CNT_REG, CYREG_B1_UDB04_ST_CTL
-.set SDCard_BSPIM_BitCounter_ST__STATUS_CONTROL_REG, CYREG_B1_UDB04_ST_CTL
-.set SDCard_BSPIM_BitCounter_ST__STATUS_REG, CYREG_B1_UDB04_ST
-.set SDCard_BSPIM_RxStsReg__16BIT_STATUS_AUX_CTL_REG, CYREG_B0_UDB07_08_ACTL
-.set SDCard_BSPIM_RxStsReg__16BIT_STATUS_REG, CYREG_B0_UDB07_08_ST
-.set SDCard_BSPIM_RxStsReg__4__MASK, 0x10
-.set SDCard_BSPIM_RxStsReg__4__POS, 4
-.set SDCard_BSPIM_RxStsReg__5__MASK, 0x20
-.set SDCard_BSPIM_RxStsReg__5__POS, 5
-.set SDCard_BSPIM_RxStsReg__6__MASK, 0x40
-.set SDCard_BSPIM_RxStsReg__6__POS, 6
-.set SDCard_BSPIM_RxStsReg__MASK, 0x70
-.set SDCard_BSPIM_RxStsReg__MASK_REG, CYREG_B0_UDB07_MSK
-.set SDCard_BSPIM_RxStsReg__MASK_ST_AUX_CTL_REG, CYREG_B0_UDB07_MSK_ACTL
-.set SDCard_BSPIM_RxStsReg__PER_ST_AUX_CTL_REG, CYREG_B0_UDB07_MSK_ACTL
-.set SDCard_BSPIM_RxStsReg__STATUS_AUX_CTL_REG, CYREG_B0_UDB07_ACTL
-.set SDCard_BSPIM_RxStsReg__STATUS_CNT_REG, CYREG_B0_UDB07_ST_CTL
-.set SDCard_BSPIM_RxStsReg__STATUS_CONTROL_REG, CYREG_B0_UDB07_ST_CTL
-.set SDCard_BSPIM_RxStsReg__STATUS_REG, CYREG_B0_UDB07_ST
-.set SDCard_BSPIM_sR8_Dp_u0__16BIT_A0_REG, CYREG_B1_UDB04_05_A0
-.set SDCard_BSPIM_sR8_Dp_u0__16BIT_A1_REG, CYREG_B1_UDB04_05_A1
-.set SDCard_BSPIM_sR8_Dp_u0__16BIT_D0_REG, CYREG_B1_UDB04_05_D0
-.set SDCard_BSPIM_sR8_Dp_u0__16BIT_D1_REG, CYREG_B1_UDB04_05_D1
-.set SDCard_BSPIM_sR8_Dp_u0__16BIT_DP_AUX_CTL_REG, CYREG_B1_UDB04_05_ACTL
-.set SDCard_BSPIM_sR8_Dp_u0__16BIT_F0_REG, CYREG_B1_UDB04_05_F0
-.set SDCard_BSPIM_sR8_Dp_u0__16BIT_F1_REG, CYREG_B1_UDB04_05_F1
-.set SDCard_BSPIM_sR8_Dp_u0__A0_A1_REG, CYREG_B1_UDB04_A0_A1
-.set SDCard_BSPIM_sR8_Dp_u0__A0_REG, CYREG_B1_UDB04_A0
-.set SDCard_BSPIM_sR8_Dp_u0__A1_REG, CYREG_B1_UDB04_A1
-.set SDCard_BSPIM_sR8_Dp_u0__D0_D1_REG, CYREG_B1_UDB04_D0_D1
-.set SDCard_BSPIM_sR8_Dp_u0__D0_REG, CYREG_B1_UDB04_D0
-.set SDCard_BSPIM_sR8_Dp_u0__D1_REG, CYREG_B1_UDB04_D1
-.set SDCard_BSPIM_sR8_Dp_u0__DP_AUX_CTL_REG, CYREG_B1_UDB04_ACTL
-.set SDCard_BSPIM_sR8_Dp_u0__F0_F1_REG, CYREG_B1_UDB04_F0_F1
-.set SDCard_BSPIM_sR8_Dp_u0__F0_REG, CYREG_B1_UDB04_F0
-.set SDCard_BSPIM_sR8_Dp_u0__F1_REG, CYREG_B1_UDB04_F1
-.set SDCard_BSPIM_sR8_Dp_u0__MSK_DP_AUX_CTL_REG, CYREG_B1_UDB04_MSK_ACTL
-.set SDCard_BSPIM_sR8_Dp_u0__PER_DP_AUX_CTL_REG, CYREG_B1_UDB04_MSK_ACTL
-.set SDCard_BSPIM_TxStsReg__0__MASK, 0x01
-.set SDCard_BSPIM_TxStsReg__0__POS, 0
-.set SDCard_BSPIM_TxStsReg__1__MASK, 0x02
-.set SDCard_BSPIM_TxStsReg__1__POS, 1
-.set SDCard_BSPIM_TxStsReg__16BIT_STATUS_AUX_CTL_REG, CYREG_B1_UDB07_08_ACTL
-.set SDCard_BSPIM_TxStsReg__16BIT_STATUS_REG, CYREG_B1_UDB07_08_ST
-.set SDCard_BSPIM_TxStsReg__2__MASK, 0x04
-.set SDCard_BSPIM_TxStsReg__2__POS, 2
-.set SDCard_BSPIM_TxStsReg__3__MASK, 0x08
-.set SDCard_BSPIM_TxStsReg__3__POS, 3
-.set SDCard_BSPIM_TxStsReg__4__MASK, 0x10
-.set SDCard_BSPIM_TxStsReg__4__POS, 4
-.set SDCard_BSPIM_TxStsReg__MASK, 0x1F
-.set SDCard_BSPIM_TxStsReg__MASK_REG, CYREG_B1_UDB07_MSK
-.set SDCard_BSPIM_TxStsReg__STATUS_AUX_CTL_REG, CYREG_B1_UDB07_ACTL
-.set SDCard_BSPIM_TxStsReg__STATUS_REG, CYREG_B1_UDB07_ST
-
-/* SD_CS */
-.set SD_CS__0__INTTYPE, CYREG_PICU3_INTTYPE5
-.set SD_CS__0__MASK, 0x20
-.set SD_CS__0__PC, CYREG_PRT3_PC5
-.set SD_CS__0__PORT, 3
-.set SD_CS__0__SHIFT, 5
-.set SD_CS__AG, CYREG_PRT3_AG
-.set SD_CS__AMUX, CYREG_PRT3_AMUX
-.set SD_CS__BIE, CYREG_PRT3_BIE
-.set SD_CS__BIT_MASK, CYREG_PRT3_BIT_MASK
-.set SD_CS__BYP, CYREG_PRT3_BYP
-.set SD_CS__CTL, CYREG_PRT3_CTL
-.set SD_CS__DM0, CYREG_PRT3_DM0
-.set SD_CS__DM1, CYREG_PRT3_DM1
-.set SD_CS__DM2, CYREG_PRT3_DM2
-.set SD_CS__DR, CYREG_PRT3_DR
-.set SD_CS__INP_DIS, CYREG_PRT3_INP_DIS
-.set SD_CS__INTTYPE_BASE, CYDEV_PICU_INTTYPE_PICU3_BASE
-.set SD_CS__LCD_COM_SEG, CYREG_PRT3_LCD_COM_SEG
-.set SD_CS__LCD_EN, CYREG_PRT3_LCD_EN
-.set SD_CS__MASK, 0x20
-.set SD_CS__PORT, 3
-.set SD_CS__PRT, CYREG_PRT3_PRT
-.set SD_CS__PRTDSI__CAPS_SEL, CYREG_PRT3_CAPS_SEL
-.set SD_CS__PRTDSI__DBL_SYNC_IN, CYREG_PRT3_DBL_SYNC_IN
-.set SD_CS__PRTDSI__OE_SEL0, CYREG_PRT3_OE_SEL0
-.set SD_CS__PRTDSI__OE_SEL1, CYREG_PRT3_OE_SEL1
-.set SD_CS__PRTDSI__OUT_SEL0, CYREG_PRT3_OUT_SEL0
-.set SD_CS__PRTDSI__OUT_SEL1, CYREG_PRT3_OUT_SEL1
-.set SD_CS__PRTDSI__SYNC_OUT, CYREG_PRT3_SYNC_OUT
-.set SD_CS__PS, CYREG_PRT3_PS
-.set SD_CS__SHIFT, 5
-.set SD_CS__SLW, CYREG_PRT3_SLW
-
-/* SD_Data_Clk */
-.set SD_Data_Clk__CFG0, CYREG_CLKDIST_DCFG0_CFG0
-.set SD_Data_Clk__CFG1, CYREG_CLKDIST_DCFG0_CFG1
-.set SD_Data_Clk__CFG2, CYREG_CLKDIST_DCFG0_CFG2
-.set SD_Data_Clk__CFG2_SRC_SEL_MASK, 0x07
-.set SD_Data_Clk__INDEX, 0x00
-.set SD_Data_Clk__PM_ACT_CFG, CYREG_PM_ACT_CFG2
-.set SD_Data_Clk__PM_ACT_MSK, 0x01
-.set SD_Data_Clk__PM_STBY_CFG, CYREG_PM_STBY_CFG2
-.set SD_Data_Clk__PM_STBY_MSK, 0x01
-
-/* SD_MISO */
-.set SD_MISO__0__INTTYPE, CYREG_PICU3_INTTYPE2
-.set SD_MISO__0__MASK, 0x04
-.set SD_MISO__0__PC, CYREG_PRT3_PC2
-.set SD_MISO__0__PORT, 3
-.set SD_MISO__0__SHIFT, 2
-.set SD_MISO__AG, CYREG_PRT3_AG
-.set SD_MISO__AMUX, CYREG_PRT3_AMUX
-.set SD_MISO__BIE, CYREG_PRT3_BIE
-.set SD_MISO__BIT_MASK, CYREG_PRT3_BIT_MASK
-.set SD_MISO__BYP, CYREG_PRT3_BYP
-.set SD_MISO__CTL, CYREG_PRT3_CTL
-.set SD_MISO__DM0, CYREG_PRT3_DM0
-.set SD_MISO__DM1, CYREG_PRT3_DM1
-.set SD_MISO__DM2, CYREG_PRT3_DM2
-.set SD_MISO__DR, CYREG_PRT3_DR
-.set SD_MISO__INP_DIS, CYREG_PRT3_INP_DIS
-.set SD_MISO__INTTYPE_BASE, CYDEV_PICU_INTTYPE_PICU3_BASE
-.set SD_MISO__LCD_COM_SEG, CYREG_PRT3_LCD_COM_SEG
-.set SD_MISO__LCD_EN, CYREG_PRT3_LCD_EN
-.set SD_MISO__MASK, 0x04
-.set SD_MISO__PORT, 3
-.set SD_MISO__PRT, CYREG_PRT3_PRT
-.set SD_MISO__PRTDSI__CAPS_SEL, CYREG_PRT3_CAPS_SEL
-.set SD_MISO__PRTDSI__DBL_SYNC_IN, CYREG_PRT3_DBL_SYNC_IN
-.set SD_MISO__PRTDSI__OE_SEL0, CYREG_PRT3_OE_SEL0
-.set SD_MISO__PRTDSI__OE_SEL1, CYREG_PRT3_OE_SEL1
-.set SD_MISO__PRTDSI__OUT_SEL0, CYREG_PRT3_OUT_SEL0
-.set SD_MISO__PRTDSI__OUT_SEL1, CYREG_PRT3_OUT_SEL1
-.set SD_MISO__PRTDSI__SYNC_OUT, CYREG_PRT3_SYNC_OUT
-.set SD_MISO__PS, CYREG_PRT3_PS
-.set SD_MISO__SHIFT, 2
-.set SD_MISO__SLW, CYREG_PRT3_SLW
-
-/* SD_MOSI */
-.set SD_MOSI__0__INTTYPE, CYREG_PICU3_INTTYPE4
-.set SD_MOSI__0__MASK, 0x10
-.set SD_MOSI__0__PC, CYREG_PRT3_PC4
-.set SD_MOSI__0__PORT, 3
-.set SD_MOSI__0__SHIFT, 4
-.set SD_MOSI__AG, CYREG_PRT3_AG
-.set SD_MOSI__AMUX, CYREG_PRT3_AMUX
-.set SD_MOSI__BIE, CYREG_PRT3_BIE
-.set SD_MOSI__BIT_MASK, CYREG_PRT3_BIT_MASK
-.set SD_MOSI__BYP, CYREG_PRT3_BYP
-.set SD_MOSI__CTL, CYREG_PRT3_CTL
-.set SD_MOSI__DM0, CYREG_PRT3_DM0
-.set SD_MOSI__DM1, CYREG_PRT3_DM1
-.set SD_MOSI__DM2, CYREG_PRT3_DM2
-.set SD_MOSI__DR, CYREG_PRT3_DR
-.set SD_MOSI__INP_DIS, CYREG_PRT3_INP_DIS
-.set SD_MOSI__INTTYPE_BASE, CYDEV_PICU_INTTYPE_PICU3_BASE
-.set SD_MOSI__LCD_COM_SEG, CYREG_PRT3_LCD_COM_SEG
-.set SD_MOSI__LCD_EN, CYREG_PRT3_LCD_EN
-.set SD_MOSI__MASK, 0x10
-.set SD_MOSI__PORT, 3
-.set SD_MOSI__PRT, CYREG_PRT3_PRT
-.set SD_MOSI__PRTDSI__CAPS_SEL, CYREG_PRT3_CAPS_SEL
-.set SD_MOSI__PRTDSI__DBL_SYNC_IN, CYREG_PRT3_DBL_SYNC_IN
-.set SD_MOSI__PRTDSI__OE_SEL0, CYREG_PRT3_OE_SEL0
-.set SD_MOSI__PRTDSI__OE_SEL1, CYREG_PRT3_OE_SEL1
-.set SD_MOSI__PRTDSI__OUT_SEL0, CYREG_PRT3_OUT_SEL0
-.set SD_MOSI__PRTDSI__OUT_SEL1, CYREG_PRT3_OUT_SEL1
-.set SD_MOSI__PRTDSI__SYNC_OUT, CYREG_PRT3_SYNC_OUT
-.set SD_MOSI__PS, CYREG_PRT3_PS
-.set SD_MOSI__SHIFT, 4
-.set SD_MOSI__SLW, CYREG_PRT3_SLW
-
-/* SD_RX_DMA */
-.set SD_RX_DMA__DRQ_CTL, CYREG_IDMUX_DRQ_CTL0
-.set SD_RX_DMA__DRQ_NUMBER, 2
-.set SD_RX_DMA__NUMBEROF_TDS, 0
-.set SD_RX_DMA__PRIORITY, 0
-.set SD_RX_DMA__TERMIN_EN, 0
-.set SD_RX_DMA__TERMIN_SEL, 0
-.set SD_RX_DMA__TERMOUT0_EN, 1
-.set SD_RX_DMA__TERMOUT0_SEL, 2
-.set SD_RX_DMA__TERMOUT1_EN, 0
-.set SD_RX_DMA__TERMOUT1_SEL, 0
-.set SD_RX_DMA_COMPLETE__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0
-.set SD_RX_DMA_COMPLETE__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0
-.set SD_RX_DMA_COMPLETE__INTC_MASK, 0x20
-.set SD_RX_DMA_COMPLETE__INTC_NUMBER, 5
-.set SD_RX_DMA_COMPLETE__INTC_PRIOR_NUM, 7
-.set SD_RX_DMA_COMPLETE__INTC_PRIOR_REG, CYREG_NVIC_PRI_5
-.set SD_RX_DMA_COMPLETE__INTC_SET_EN_REG, CYREG_NVIC_SETENA0
-.set SD_RX_DMA_COMPLETE__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0
-
-/* SD_SCK */
-.set SD_SCK__0__INTTYPE, CYREG_PICU3_INTTYPE3
-.set SD_SCK__0__MASK, 0x08
-.set SD_SCK__0__PC, CYREG_PRT3_PC3
-.set SD_SCK__0__PORT, 3
-.set SD_SCK__0__SHIFT, 3
-.set SD_SCK__AG, CYREG_PRT3_AG
-.set SD_SCK__AMUX, CYREG_PRT3_AMUX
-.set SD_SCK__BIE, CYREG_PRT3_BIE
-.set SD_SCK__BIT_MASK, CYREG_PRT3_BIT_MASK
-.set SD_SCK__BYP, CYREG_PRT3_BYP
-.set SD_SCK__CTL, CYREG_PRT3_CTL
-.set SD_SCK__DM0, CYREG_PRT3_DM0
-.set SD_SCK__DM1, CYREG_PRT3_DM1
-.set SD_SCK__DM2, CYREG_PRT3_DM2
-.set SD_SCK__DR, CYREG_PRT3_DR
-.set SD_SCK__INP_DIS, CYREG_PRT3_INP_DIS
-.set SD_SCK__INTTYPE_BASE, CYDEV_PICU_INTTYPE_PICU3_BASE
-.set SD_SCK__LCD_COM_SEG, CYREG_PRT3_LCD_COM_SEG
-.set SD_SCK__LCD_EN, CYREG_PRT3_LCD_EN
-.set SD_SCK__MASK, 0x08
-.set SD_SCK__PORT, 3
-.set SD_SCK__PRT, CYREG_PRT3_PRT
-.set SD_SCK__PRTDSI__CAPS_SEL, CYREG_PRT3_CAPS_SEL
-.set SD_SCK__PRTDSI__DBL_SYNC_IN, CYREG_PRT3_DBL_SYNC_IN
-.set SD_SCK__PRTDSI__OE_SEL0, CYREG_PRT3_OE_SEL0
-.set SD_SCK__PRTDSI__OE_SEL1, CYREG_PRT3_OE_SEL1
-.set SD_SCK__PRTDSI__OUT_SEL0, CYREG_PRT3_OUT_SEL0
-.set SD_SCK__PRTDSI__OUT_SEL1, CYREG_PRT3_OUT_SEL1
-.set SD_SCK__PRTDSI__SYNC_OUT, CYREG_PRT3_SYNC_OUT
-.set SD_SCK__PS, CYREG_PRT3_PS
-.set SD_SCK__SHIFT, 3
-.set SD_SCK__SLW, CYREG_PRT3_SLW
-
-/* SD_TX_DMA */
-.set SD_TX_DMA__DRQ_CTL, CYREG_IDMUX_DRQ_CTL0
-.set SD_TX_DMA__DRQ_NUMBER, 3
-.set SD_TX_DMA__NUMBEROF_TDS, 0
-.set SD_TX_DMA__PRIORITY, 1
-.set SD_TX_DMA__TERMIN_EN, 0
-.set SD_TX_DMA__TERMIN_SEL, 0
-.set SD_TX_DMA__TERMOUT0_EN, 1
-.set SD_TX_DMA__TERMOUT0_SEL, 3
-.set SD_TX_DMA__TERMOUT1_EN, 0
-.set SD_TX_DMA__TERMOUT1_SEL, 0
-.set SD_TX_DMA_COMPLETE__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0
-.set SD_TX_DMA_COMPLETE__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0
-.set SD_TX_DMA_COMPLETE__INTC_MASK, 0x40
-.set SD_TX_DMA_COMPLETE__INTC_NUMBER, 6
-.set SD_TX_DMA_COMPLETE__INTC_PRIOR_NUM, 7
-.set SD_TX_DMA_COMPLETE__INTC_PRIOR_REG, CYREG_NVIC_PRI_6
-.set SD_TX_DMA_COMPLETE__INTC_SET_EN_REG, CYREG_NVIC_SETENA0
-.set SD_TX_DMA_COMPLETE__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0
-
-/* TERM_EN */
-.set TERM_EN__0__INTTYPE, CYREG_PICU15_INTTYPE3
-.set TERM_EN__0__MASK, 0x08
-.set TERM_EN__0__PC, CYREG_IO_PC_PRT15_PC3
-.set TERM_EN__0__PORT, 15
-.set TERM_EN__0__SHIFT, 3
-.set TERM_EN__AG, CYREG_PRT15_AG
-.set TERM_EN__AMUX, CYREG_PRT15_AMUX
-.set TERM_EN__BIE, CYREG_PRT15_BIE
-.set TERM_EN__BIT_MASK, CYREG_PRT15_BIT_MASK
-.set TERM_EN__BYP, CYREG_PRT15_BYP
-.set TERM_EN__CTL, CYREG_PRT15_CTL
-.set TERM_EN__DM0, CYREG_PRT15_DM0
-.set TERM_EN__DM1, CYREG_PRT15_DM1
-.set TERM_EN__DM2, CYREG_PRT15_DM2
-.set TERM_EN__DR, CYREG_PRT15_DR
-.set TERM_EN__INP_DIS, CYREG_PRT15_INP_DIS
-.set TERM_EN__INTTYPE_BASE, CYDEV_PICU_INTTYPE_PICU15_BASE
-.set TERM_EN__LCD_COM_SEG, CYREG_PRT15_LCD_COM_SEG
-.set TERM_EN__LCD_EN, CYREG_PRT15_LCD_EN
-.set TERM_EN__MASK, 0x08
-.set TERM_EN__PORT, 15
-.set TERM_EN__PRT, CYREG_PRT15_PRT
-.set TERM_EN__PRTDSI__CAPS_SEL, CYREG_PRT15_CAPS_SEL
-.set TERM_EN__PRTDSI__DBL_SYNC_IN, CYREG_PRT15_DBL_SYNC_IN
-.set TERM_EN__PRTDSI__OE_SEL0, CYREG_PRT15_OE_SEL0
-.set TERM_EN__PRTDSI__OE_SEL1, CYREG_PRT15_OE_SEL1
-.set TERM_EN__PRTDSI__OUT_SEL0, CYREG_PRT15_OUT_SEL0
-.set TERM_EN__PRTDSI__OUT_SEL1, CYREG_PRT15_OUT_SEL1
-.set TERM_EN__PRTDSI__SYNC_OUT, CYREG_PRT15_SYNC_OUT
-.set TERM_EN__PS, CYREG_PRT15_PS
-.set TERM_EN__SHIFT, 3
-.set TERM_EN__SLW, CYREG_PRT15_SLW
+/* SD_CS */
+.set SD_CS__0__INTTYPE, CYREG_PICU3_INTTYPE5
+.set SD_CS__0__MASK, 0x20
+.set SD_CS__0__PC, CYREG_PRT3_PC5
+.set SD_CS__0__PORT, 3
+.set SD_CS__0__SHIFT, 5
+.set SD_CS__AG, CYREG_PRT3_AG
+.set SD_CS__AMUX, CYREG_PRT3_AMUX
+.set SD_CS__BIE, CYREG_PRT3_BIE
+.set SD_CS__BIT_MASK, CYREG_PRT3_BIT_MASK
+.set SD_CS__BYP, CYREG_PRT3_BYP
+.set SD_CS__CTL, CYREG_PRT3_CTL
+.set SD_CS__DM0, CYREG_PRT3_DM0
+.set SD_CS__DM1, CYREG_PRT3_DM1
+.set SD_CS__DM2, CYREG_PRT3_DM2
+.set SD_CS__DR, CYREG_PRT3_DR
+.set SD_CS__INP_DIS, CYREG_PRT3_INP_DIS
+.set SD_CS__INTTYPE_BASE, CYDEV_PICU_INTTYPE_PICU3_BASE
+.set SD_CS__LCD_COM_SEG, CYREG_PRT3_LCD_COM_SEG
+.set SD_CS__LCD_EN, CYREG_PRT3_LCD_EN
+.set SD_CS__MASK, 0x20
+.set SD_CS__PORT, 3
+.set SD_CS__PRT, CYREG_PRT3_PRT
+.set SD_CS__PRTDSI__CAPS_SEL, CYREG_PRT3_CAPS_SEL
+.set SD_CS__PRTDSI__DBL_SYNC_IN, CYREG_PRT3_DBL_SYNC_IN
+.set SD_CS__PRTDSI__OE_SEL0, CYREG_PRT3_OE_SEL0
+.set SD_CS__PRTDSI__OE_SEL1, CYREG_PRT3_OE_SEL1
+.set SD_CS__PRTDSI__OUT_SEL0, CYREG_PRT3_OUT_SEL0
+.set SD_CS__PRTDSI__OUT_SEL1, CYREG_PRT3_OUT_SEL1
+.set SD_CS__PRTDSI__SYNC_OUT, CYREG_PRT3_SYNC_OUT
+.set SD_CS__PS, CYREG_PRT3_PS
+.set SD_CS__SHIFT, 5
+.set SD_CS__SLW, CYREG_PRT3_SLW
/* USBFS */
.set USBFS_arb_int__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0
.set USBFS_USB__USBIO_CR0, CYREG_USB_USBIO_CR0
.set USBFS_USB__USBIO_CR1, CYREG_USB_USBIO_CR1
+/* SDCard */
+.set SDCard_BSPIM_BitCounter__16BIT_CONTROL_AUX_CTL_REG, CYREG_B1_UDB04_05_ACTL
+.set SDCard_BSPIM_BitCounter__16BIT_CONTROL_CONTROL_REG, CYREG_B1_UDB04_05_CTL
+.set SDCard_BSPIM_BitCounter__16BIT_CONTROL_COUNT_REG, CYREG_B1_UDB04_05_CTL
+.set SDCard_BSPIM_BitCounter__16BIT_COUNT_CONTROL_REG, CYREG_B1_UDB04_05_CTL
+.set SDCard_BSPIM_BitCounter__16BIT_COUNT_COUNT_REG, CYREG_B1_UDB04_05_CTL
+.set SDCard_BSPIM_BitCounter__16BIT_MASK_MASK_REG, CYREG_B1_UDB04_05_MSK
+.set SDCard_BSPIM_BitCounter__16BIT_MASK_PERIOD_REG, CYREG_B1_UDB04_05_MSK
+.set SDCard_BSPIM_BitCounter__16BIT_PERIOD_MASK_REG, CYREG_B1_UDB04_05_MSK
+.set SDCard_BSPIM_BitCounter__16BIT_PERIOD_PERIOD_REG, CYREG_B1_UDB04_05_MSK
+.set SDCard_BSPIM_BitCounter__CONTROL_AUX_CTL_REG, CYREG_B1_UDB04_ACTL
+.set SDCard_BSPIM_BitCounter__CONTROL_REG, CYREG_B1_UDB04_CTL
+.set SDCard_BSPIM_BitCounter__CONTROL_ST_REG, CYREG_B1_UDB04_ST_CTL
+.set SDCard_BSPIM_BitCounter__COUNT_REG, CYREG_B1_UDB04_CTL
+.set SDCard_BSPIM_BitCounter__COUNT_ST_REG, CYREG_B1_UDB04_ST_CTL
+.set SDCard_BSPIM_BitCounter__MASK_CTL_AUX_CTL_REG, CYREG_B1_UDB04_MSK_ACTL
+.set SDCard_BSPIM_BitCounter__PER_CTL_AUX_CTL_REG, CYREG_B1_UDB04_MSK_ACTL
+.set SDCard_BSPIM_BitCounter__PERIOD_REG, CYREG_B1_UDB04_MSK
+.set SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_AUX_CTL_REG, CYREG_B1_UDB04_05_ACTL
+.set SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_REG, CYREG_B1_UDB04_05_ST
+.set SDCard_BSPIM_BitCounter_ST__MASK_REG, CYREG_B1_UDB04_MSK
+.set SDCard_BSPIM_BitCounter_ST__MASK_ST_AUX_CTL_REG, CYREG_B1_UDB04_MSK_ACTL
+.set SDCard_BSPIM_BitCounter_ST__PER_ST_AUX_CTL_REG, CYREG_B1_UDB04_MSK_ACTL
+.set SDCard_BSPIM_BitCounter_ST__STATUS_AUX_CTL_REG, CYREG_B1_UDB04_ACTL
+.set SDCard_BSPIM_BitCounter_ST__STATUS_CNT_REG, CYREG_B1_UDB04_ST_CTL
+.set SDCard_BSPIM_BitCounter_ST__STATUS_CONTROL_REG, CYREG_B1_UDB04_ST_CTL
+.set SDCard_BSPIM_BitCounter_ST__STATUS_REG, CYREG_B1_UDB04_ST
+.set SDCard_BSPIM_RxStsReg__16BIT_STATUS_AUX_CTL_REG, CYREG_B0_UDB07_08_ACTL
+.set SDCard_BSPIM_RxStsReg__16BIT_STATUS_REG, CYREG_B0_UDB07_08_ST
+.set SDCard_BSPIM_RxStsReg__4__MASK, 0x10
+.set SDCard_BSPIM_RxStsReg__4__POS, 4
+.set SDCard_BSPIM_RxStsReg__5__MASK, 0x20
+.set SDCard_BSPIM_RxStsReg__5__POS, 5
+.set SDCard_BSPIM_RxStsReg__6__MASK, 0x40
+.set SDCard_BSPIM_RxStsReg__6__POS, 6
+.set SDCard_BSPIM_RxStsReg__MASK, 0x70
+.set SDCard_BSPIM_RxStsReg__MASK_REG, CYREG_B0_UDB07_MSK
+.set SDCard_BSPIM_RxStsReg__MASK_ST_AUX_CTL_REG, CYREG_B0_UDB07_MSK_ACTL
+.set SDCard_BSPIM_RxStsReg__PER_ST_AUX_CTL_REG, CYREG_B0_UDB07_MSK_ACTL
+.set SDCard_BSPIM_RxStsReg__STATUS_AUX_CTL_REG, CYREG_B0_UDB07_ACTL
+.set SDCard_BSPIM_RxStsReg__STATUS_CNT_REG, CYREG_B0_UDB07_ST_CTL
+.set SDCard_BSPIM_RxStsReg__STATUS_CONTROL_REG, CYREG_B0_UDB07_ST_CTL
+.set SDCard_BSPIM_RxStsReg__STATUS_REG, CYREG_B0_UDB07_ST
+.set SDCard_BSPIM_sR8_Dp_u0__16BIT_A0_REG, CYREG_B1_UDB04_05_A0
+.set SDCard_BSPIM_sR8_Dp_u0__16BIT_A1_REG, CYREG_B1_UDB04_05_A1
+.set SDCard_BSPIM_sR8_Dp_u0__16BIT_D0_REG, CYREG_B1_UDB04_05_D0
+.set SDCard_BSPIM_sR8_Dp_u0__16BIT_D1_REG, CYREG_B1_UDB04_05_D1
+.set SDCard_BSPIM_sR8_Dp_u0__16BIT_DP_AUX_CTL_REG, CYREG_B1_UDB04_05_ACTL
+.set SDCard_BSPIM_sR8_Dp_u0__16BIT_F0_REG, CYREG_B1_UDB04_05_F0
+.set SDCard_BSPIM_sR8_Dp_u0__16BIT_F1_REG, CYREG_B1_UDB04_05_F1
+.set SDCard_BSPIM_sR8_Dp_u0__A0_A1_REG, CYREG_B1_UDB04_A0_A1
+.set SDCard_BSPIM_sR8_Dp_u0__A0_REG, CYREG_B1_UDB04_A0
+.set SDCard_BSPIM_sR8_Dp_u0__A1_REG, CYREG_B1_UDB04_A1
+.set SDCard_BSPIM_sR8_Dp_u0__D0_D1_REG, CYREG_B1_UDB04_D0_D1
+.set SDCard_BSPIM_sR8_Dp_u0__D0_REG, CYREG_B1_UDB04_D0
+.set SDCard_BSPIM_sR8_Dp_u0__D1_REG, CYREG_B1_UDB04_D1
+.set SDCard_BSPIM_sR8_Dp_u0__DP_AUX_CTL_REG, CYREG_B1_UDB04_ACTL
+.set SDCard_BSPIM_sR8_Dp_u0__F0_F1_REG, CYREG_B1_UDB04_F0_F1
+.set SDCard_BSPIM_sR8_Dp_u0__F0_REG, CYREG_B1_UDB04_F0
+.set SDCard_BSPIM_sR8_Dp_u0__F1_REG, CYREG_B1_UDB04_F1
+.set SDCard_BSPIM_sR8_Dp_u0__MSK_DP_AUX_CTL_REG, CYREG_B1_UDB04_MSK_ACTL
+.set SDCard_BSPIM_sR8_Dp_u0__PER_DP_AUX_CTL_REG, CYREG_B1_UDB04_MSK_ACTL
+.set SDCard_BSPIM_TxStsReg__0__MASK, 0x01
+.set SDCard_BSPIM_TxStsReg__0__POS, 0
+.set SDCard_BSPIM_TxStsReg__1__MASK, 0x02
+.set SDCard_BSPIM_TxStsReg__1__POS, 1
+.set SDCard_BSPIM_TxStsReg__16BIT_STATUS_AUX_CTL_REG, CYREG_B1_UDB07_08_ACTL
+.set SDCard_BSPIM_TxStsReg__16BIT_STATUS_REG, CYREG_B1_UDB07_08_ST
+.set SDCard_BSPIM_TxStsReg__2__MASK, 0x04
+.set SDCard_BSPIM_TxStsReg__2__POS, 2
+.set SDCard_BSPIM_TxStsReg__3__MASK, 0x08
+.set SDCard_BSPIM_TxStsReg__3__POS, 3
+.set SDCard_BSPIM_TxStsReg__4__MASK, 0x10
+.set SDCard_BSPIM_TxStsReg__4__POS, 4
+.set SDCard_BSPIM_TxStsReg__MASK, 0x1F
+.set SDCard_BSPIM_TxStsReg__MASK_REG, CYREG_B1_UDB07_MSK
+.set SDCard_BSPIM_TxStsReg__STATUS_AUX_CTL_REG, CYREG_B1_UDB07_ACTL
+.set SDCard_BSPIM_TxStsReg__STATUS_REG, CYREG_B1_UDB07_ST
+
+/* SD_SCK */
+.set SD_SCK__0__INTTYPE, CYREG_PICU3_INTTYPE3
+.set SD_SCK__0__MASK, 0x08
+.set SD_SCK__0__PC, CYREG_PRT3_PC3
+.set SD_SCK__0__PORT, 3
+.set SD_SCK__0__SHIFT, 3
+.set SD_SCK__AG, CYREG_PRT3_AG
+.set SD_SCK__AMUX, CYREG_PRT3_AMUX
+.set SD_SCK__BIE, CYREG_PRT3_BIE
+.set SD_SCK__BIT_MASK, CYREG_PRT3_BIT_MASK
+.set SD_SCK__BYP, CYREG_PRT3_BYP
+.set SD_SCK__CTL, CYREG_PRT3_CTL
+.set SD_SCK__DM0, CYREG_PRT3_DM0
+.set SD_SCK__DM1, CYREG_PRT3_DM1
+.set SD_SCK__DM2, CYREG_PRT3_DM2
+.set SD_SCK__DR, CYREG_PRT3_DR
+.set SD_SCK__INP_DIS, CYREG_PRT3_INP_DIS
+.set SD_SCK__INTTYPE_BASE, CYDEV_PICU_INTTYPE_PICU3_BASE
+.set SD_SCK__LCD_COM_SEG, CYREG_PRT3_LCD_COM_SEG
+.set SD_SCK__LCD_EN, CYREG_PRT3_LCD_EN
+.set SD_SCK__MASK, 0x08
+.set SD_SCK__PORT, 3
+.set SD_SCK__PRT, CYREG_PRT3_PRT
+.set SD_SCK__PRTDSI__CAPS_SEL, CYREG_PRT3_CAPS_SEL
+.set SD_SCK__PRTDSI__DBL_SYNC_IN, CYREG_PRT3_DBL_SYNC_IN
+.set SD_SCK__PRTDSI__OE_SEL0, CYREG_PRT3_OE_SEL0
+.set SD_SCK__PRTDSI__OE_SEL1, CYREG_PRT3_OE_SEL1
+.set SD_SCK__PRTDSI__OUT_SEL0, CYREG_PRT3_OUT_SEL0
+.set SD_SCK__PRTDSI__OUT_SEL1, CYREG_PRT3_OUT_SEL1
+.set SD_SCK__PRTDSI__SYNC_OUT, CYREG_PRT3_SYNC_OUT
+.set SD_SCK__PS, CYREG_PRT3_PS
+.set SD_SCK__SHIFT, 3
+.set SD_SCK__SLW, CYREG_PRT3_SLW
+
+/* SCSI_In */
+.set SCSI_In__0__INTTYPE, CYREG_PICU6_INTTYPE1
+.set SCSI_In__0__MASK, 0x02
+.set SCSI_In__0__PC, CYREG_PRT6_PC1
+.set SCSI_In__0__PORT, 6
+.set SCSI_In__0__SHIFT, 1
+.set SCSI_In__AG, CYREG_PRT6_AG
+.set SCSI_In__AMUX, CYREG_PRT6_AMUX
+.set SCSI_In__BIE, CYREG_PRT6_BIE
+.set SCSI_In__BIT_MASK, CYREG_PRT6_BIT_MASK
+.set SCSI_In__BYP, CYREG_PRT6_BYP
+.set SCSI_In__CTL, CYREG_PRT6_CTL
+.set SCSI_In__DBP__INTTYPE, CYREG_PICU6_INTTYPE1
+.set SCSI_In__DBP__MASK, 0x02
+.set SCSI_In__DBP__PC, CYREG_PRT6_PC1
+.set SCSI_In__DBP__PORT, 6
+.set SCSI_In__DBP__SHIFT, 1
+.set SCSI_In__DM0, CYREG_PRT6_DM0
+.set SCSI_In__DM1, CYREG_PRT6_DM1
+.set SCSI_In__DM2, CYREG_PRT6_DM2
+.set SCSI_In__DR, CYREG_PRT6_DR
+.set SCSI_In__INP_DIS, CYREG_PRT6_INP_DIS
+.set SCSI_In__INTTYPE_BASE, CYDEV_PICU_INTTYPE_PICU6_BASE
+.set SCSI_In__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG
+.set SCSI_In__LCD_EN, CYREG_PRT6_LCD_EN
+.set SCSI_In__MASK, 0x02
+.set SCSI_In__PORT, 6
+.set SCSI_In__PRT, CYREG_PRT6_PRT
+.set SCSI_In__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL
+.set SCSI_In__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN
+.set SCSI_In__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0
+.set SCSI_In__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1
+.set SCSI_In__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0
+.set SCSI_In__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1
+.set SCSI_In__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT
+.set SCSI_In__PS, CYREG_PRT6_PS
+.set SCSI_In__SHIFT, 1
+.set SCSI_In__SLW, CYREG_PRT6_SLW
+.set SCSI_In_DBx__0__AG, CYREG_PRT6_AG
+.set SCSI_In_DBx__0__AMUX, CYREG_PRT6_AMUX
+.set SCSI_In_DBx__0__BIE, CYREG_PRT6_BIE
+.set SCSI_In_DBx__0__BIT_MASK, CYREG_PRT6_BIT_MASK
+.set SCSI_In_DBx__0__BYP, CYREG_PRT6_BYP
+.set SCSI_In_DBx__0__CTL, CYREG_PRT6_CTL
+.set SCSI_In_DBx__0__DM0, CYREG_PRT6_DM0
+.set SCSI_In_DBx__0__DM1, CYREG_PRT6_DM1
+.set SCSI_In_DBx__0__DM2, CYREG_PRT6_DM2
+.set SCSI_In_DBx__0__DR, CYREG_PRT6_DR
+.set SCSI_In_DBx__0__INP_DIS, CYREG_PRT6_INP_DIS
+.set SCSI_In_DBx__0__INTTYPE, CYREG_PICU6_INTTYPE6
+.set SCSI_In_DBx__0__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG
+.set SCSI_In_DBx__0__LCD_EN, CYREG_PRT6_LCD_EN
+.set SCSI_In_DBx__0__MASK, 0x40
+.set SCSI_In_DBx__0__PC, CYREG_PRT6_PC6
+.set SCSI_In_DBx__0__PORT, 6
+.set SCSI_In_DBx__0__PRT, CYREG_PRT6_PRT
+.set SCSI_In_DBx__0__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL
+.set SCSI_In_DBx__0__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN
+.set SCSI_In_DBx__0__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0
+.set SCSI_In_DBx__0__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1
+.set SCSI_In_DBx__0__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0
+.set SCSI_In_DBx__0__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1
+.set SCSI_In_DBx__0__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT
+.set SCSI_In_DBx__0__PS, CYREG_PRT6_PS
+.set SCSI_In_DBx__0__SHIFT, 6
+.set SCSI_In_DBx__0__SLW, CYREG_PRT6_SLW
+.set SCSI_In_DBx__1__AG, CYREG_PRT6_AG
+.set SCSI_In_DBx__1__AMUX, CYREG_PRT6_AMUX
+.set SCSI_In_DBx__1__BIE, CYREG_PRT6_BIE
+.set SCSI_In_DBx__1__BIT_MASK, CYREG_PRT6_BIT_MASK
+.set SCSI_In_DBx__1__BYP, CYREG_PRT6_BYP
+.set SCSI_In_DBx__1__CTL, CYREG_PRT6_CTL
+.set SCSI_In_DBx__1__DM0, CYREG_PRT6_DM0
+.set SCSI_In_DBx__1__DM1, CYREG_PRT6_DM1
+.set SCSI_In_DBx__1__DM2, CYREG_PRT6_DM2
+.set SCSI_In_DBx__1__DR, CYREG_PRT6_DR
+.set SCSI_In_DBx__1__INP_DIS, CYREG_PRT6_INP_DIS
+.set SCSI_In_DBx__1__INTTYPE, CYREG_PICU6_INTTYPE4
+.set SCSI_In_DBx__1__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG
+.set SCSI_In_DBx__1__LCD_EN, CYREG_PRT6_LCD_EN
+.set SCSI_In_DBx__1__MASK, 0x10
+.set SCSI_In_DBx__1__PC, CYREG_PRT6_PC4
+.set SCSI_In_DBx__1__PORT, 6
+.set SCSI_In_DBx__1__PRT, CYREG_PRT6_PRT
+.set SCSI_In_DBx__1__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL
+.set SCSI_In_DBx__1__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN
+.set SCSI_In_DBx__1__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0
+.set SCSI_In_DBx__1__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1
+.set SCSI_In_DBx__1__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0
+.set SCSI_In_DBx__1__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1
+.set SCSI_In_DBx__1__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT
+.set SCSI_In_DBx__1__PS, CYREG_PRT6_PS
+.set SCSI_In_DBx__1__SHIFT, 4
+.set SCSI_In_DBx__1__SLW, CYREG_PRT6_SLW
+.set SCSI_In_DBx__2__AG, CYREG_PRT12_AG
+.set SCSI_In_DBx__2__BIE, CYREG_PRT12_BIE
+.set SCSI_In_DBx__2__BIT_MASK, CYREG_PRT12_BIT_MASK
+.set SCSI_In_DBx__2__BYP, CYREG_PRT12_BYP
+.set SCSI_In_DBx__2__DM0, CYREG_PRT12_DM0
+.set SCSI_In_DBx__2__DM1, CYREG_PRT12_DM1
+.set SCSI_In_DBx__2__DM2, CYREG_PRT12_DM2
+.set SCSI_In_DBx__2__DR, CYREG_PRT12_DR
+.set SCSI_In_DBx__2__INP_DIS, CYREG_PRT12_INP_DIS
+.set SCSI_In_DBx__2__INTTYPE, CYREG_PICU12_INTTYPE4
+.set SCSI_In_DBx__2__MASK, 0x10
+.set SCSI_In_DBx__2__PC, CYREG_PRT12_PC4
+.set SCSI_In_DBx__2__PORT, 12
+.set SCSI_In_DBx__2__PRT, CYREG_PRT12_PRT
+.set SCSI_In_DBx__2__PRTDSI__DBL_SYNC_IN, CYREG_PRT12_DBL_SYNC_IN
+.set SCSI_In_DBx__2__PRTDSI__OE_SEL0, CYREG_PRT12_OE_SEL0
+.set SCSI_In_DBx__2__PRTDSI__OE_SEL1, CYREG_PRT12_OE_SEL1
+.set SCSI_In_DBx__2__PRTDSI__OUT_SEL0, CYREG_PRT12_OUT_SEL0
+.set SCSI_In_DBx__2__PRTDSI__OUT_SEL1, CYREG_PRT12_OUT_SEL1
+.set SCSI_In_DBx__2__PRTDSI__SYNC_OUT, CYREG_PRT12_SYNC_OUT
+.set SCSI_In_DBx__2__PS, CYREG_PRT12_PS
+.set SCSI_In_DBx__2__SHIFT, 4
+.set SCSI_In_DBx__2__SIO_CFG, CYREG_PRT12_SIO_CFG
+.set SCSI_In_DBx__2__SIO_DIFF, CYREG_PRT12_SIO_DIFF
+.set SCSI_In_DBx__2__SIO_HYST_EN, CYREG_PRT12_SIO_HYST_EN
+.set SCSI_In_DBx__2__SIO_REG_HIFREQ, CYREG_PRT12_SIO_REG_HIFREQ
+.set SCSI_In_DBx__2__SLW, CYREG_PRT12_SLW
+.set SCSI_In_DBx__3__AG, CYREG_PRT2_AG
+.set SCSI_In_DBx__3__AMUX, CYREG_PRT2_AMUX
+.set SCSI_In_DBx__3__BIE, CYREG_PRT2_BIE
+.set SCSI_In_DBx__3__BIT_MASK, CYREG_PRT2_BIT_MASK
+.set SCSI_In_DBx__3__BYP, CYREG_PRT2_BYP
+.set SCSI_In_DBx__3__CTL, CYREG_PRT2_CTL
+.set SCSI_In_DBx__3__DM0, CYREG_PRT2_DM0
+.set SCSI_In_DBx__3__DM1, CYREG_PRT2_DM1
+.set SCSI_In_DBx__3__DM2, CYREG_PRT2_DM2
+.set SCSI_In_DBx__3__DR, CYREG_PRT2_DR
+.set SCSI_In_DBx__3__INP_DIS, CYREG_PRT2_INP_DIS
+.set SCSI_In_DBx__3__INTTYPE, CYREG_PICU2_INTTYPE6
+.set SCSI_In_DBx__3__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG
+.set SCSI_In_DBx__3__LCD_EN, CYREG_PRT2_LCD_EN
+.set SCSI_In_DBx__3__MASK, 0x40
+.set SCSI_In_DBx__3__PC, CYREG_PRT2_PC6
+.set SCSI_In_DBx__3__PORT, 2
+.set SCSI_In_DBx__3__PRT, CYREG_PRT2_PRT
+.set SCSI_In_DBx__3__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL
+.set SCSI_In_DBx__3__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN
+.set SCSI_In_DBx__3__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0
+.set SCSI_In_DBx__3__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1
+.set SCSI_In_DBx__3__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0
+.set SCSI_In_DBx__3__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1
+.set SCSI_In_DBx__3__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT
+.set SCSI_In_DBx__3__PS, CYREG_PRT2_PS
+.set SCSI_In_DBx__3__SHIFT, 6
+.set SCSI_In_DBx__3__SLW, CYREG_PRT2_SLW
+.set SCSI_In_DBx__4__AG, CYREG_PRT2_AG
+.set SCSI_In_DBx__4__AMUX, CYREG_PRT2_AMUX
+.set SCSI_In_DBx__4__BIE, CYREG_PRT2_BIE
+.set SCSI_In_DBx__4__BIT_MASK, CYREG_PRT2_BIT_MASK
+.set SCSI_In_DBx__4__BYP, CYREG_PRT2_BYP
+.set SCSI_In_DBx__4__CTL, CYREG_PRT2_CTL
+.set SCSI_In_DBx__4__DM0, CYREG_PRT2_DM0
+.set SCSI_In_DBx__4__DM1, CYREG_PRT2_DM1
+.set SCSI_In_DBx__4__DM2, CYREG_PRT2_DM2
+.set SCSI_In_DBx__4__DR, CYREG_PRT2_DR
+.set SCSI_In_DBx__4__INP_DIS, CYREG_PRT2_INP_DIS
+.set SCSI_In_DBx__4__INTTYPE, CYREG_PICU2_INTTYPE4
+.set SCSI_In_DBx__4__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG
+.set SCSI_In_DBx__4__LCD_EN, CYREG_PRT2_LCD_EN
+.set SCSI_In_DBx__4__MASK, 0x10
+.set SCSI_In_DBx__4__PC, CYREG_PRT2_PC4
+.set SCSI_In_DBx__4__PORT, 2
+.set SCSI_In_DBx__4__PRT, CYREG_PRT2_PRT
+.set SCSI_In_DBx__4__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL
+.set SCSI_In_DBx__4__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN
+.set SCSI_In_DBx__4__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0
+.set SCSI_In_DBx__4__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1
+.set SCSI_In_DBx__4__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0
+.set SCSI_In_DBx__4__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1
+.set SCSI_In_DBx__4__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT
+.set SCSI_In_DBx__4__PS, CYREG_PRT2_PS
+.set SCSI_In_DBx__4__SHIFT, 4
+.set SCSI_In_DBx__4__SLW, CYREG_PRT2_SLW
+.set SCSI_In_DBx__5__AG, CYREG_PRT2_AG
+.set SCSI_In_DBx__5__AMUX, CYREG_PRT2_AMUX
+.set SCSI_In_DBx__5__BIE, CYREG_PRT2_BIE
+.set SCSI_In_DBx__5__BIT_MASK, CYREG_PRT2_BIT_MASK
+.set SCSI_In_DBx__5__BYP, CYREG_PRT2_BYP
+.set SCSI_In_DBx__5__CTL, CYREG_PRT2_CTL
+.set SCSI_In_DBx__5__DM0, CYREG_PRT2_DM0
+.set SCSI_In_DBx__5__DM1, CYREG_PRT2_DM1
+.set SCSI_In_DBx__5__DM2, CYREG_PRT2_DM2
+.set SCSI_In_DBx__5__DR, CYREG_PRT2_DR
+.set SCSI_In_DBx__5__INP_DIS, CYREG_PRT2_INP_DIS
+.set SCSI_In_DBx__5__INTTYPE, CYREG_PICU2_INTTYPE2
+.set SCSI_In_DBx__5__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG
+.set SCSI_In_DBx__5__LCD_EN, CYREG_PRT2_LCD_EN
+.set SCSI_In_DBx__5__MASK, 0x04
+.set SCSI_In_DBx__5__PC, CYREG_PRT2_PC2
+.set SCSI_In_DBx__5__PORT, 2
+.set SCSI_In_DBx__5__PRT, CYREG_PRT2_PRT
+.set SCSI_In_DBx__5__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL
+.set SCSI_In_DBx__5__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN
+.set SCSI_In_DBx__5__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0
+.set SCSI_In_DBx__5__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1
+.set SCSI_In_DBx__5__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0
+.set SCSI_In_DBx__5__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1
+.set SCSI_In_DBx__5__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT
+.set SCSI_In_DBx__5__PS, CYREG_PRT2_PS
+.set SCSI_In_DBx__5__SHIFT, 2
+.set SCSI_In_DBx__5__SLW, CYREG_PRT2_SLW
+.set SCSI_In_DBx__6__AG, CYREG_PRT2_AG
+.set SCSI_In_DBx__6__AMUX, CYREG_PRT2_AMUX
+.set SCSI_In_DBx__6__BIE, CYREG_PRT2_BIE
+.set SCSI_In_DBx__6__BIT_MASK, CYREG_PRT2_BIT_MASK
+.set SCSI_In_DBx__6__BYP, CYREG_PRT2_BYP
+.set SCSI_In_DBx__6__CTL, CYREG_PRT2_CTL
+.set SCSI_In_DBx__6__DM0, CYREG_PRT2_DM0
+.set SCSI_In_DBx__6__DM1, CYREG_PRT2_DM1
+.set SCSI_In_DBx__6__DM2, CYREG_PRT2_DM2
+.set SCSI_In_DBx__6__DR, CYREG_PRT2_DR
+.set SCSI_In_DBx__6__INP_DIS, CYREG_PRT2_INP_DIS
+.set SCSI_In_DBx__6__INTTYPE, CYREG_PICU2_INTTYPE0
+.set SCSI_In_DBx__6__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG
+.set SCSI_In_DBx__6__LCD_EN, CYREG_PRT2_LCD_EN
+.set SCSI_In_DBx__6__MASK, 0x01
+.set SCSI_In_DBx__6__PC, CYREG_PRT2_PC0
+.set SCSI_In_DBx__6__PORT, 2
+.set SCSI_In_DBx__6__PRT, CYREG_PRT2_PRT
+.set SCSI_In_DBx__6__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL
+.set SCSI_In_DBx__6__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN
+.set SCSI_In_DBx__6__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0
+.set SCSI_In_DBx__6__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1
+.set SCSI_In_DBx__6__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0
+.set SCSI_In_DBx__6__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1
+.set SCSI_In_DBx__6__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT
+.set SCSI_In_DBx__6__PS, CYREG_PRT2_PS
+.set SCSI_In_DBx__6__SHIFT, 0
+.set SCSI_In_DBx__6__SLW, CYREG_PRT2_SLW
+.set SCSI_In_DBx__7__AG, CYREG_PRT6_AG
+.set SCSI_In_DBx__7__AMUX, CYREG_PRT6_AMUX
+.set SCSI_In_DBx__7__BIE, CYREG_PRT6_BIE
+.set SCSI_In_DBx__7__BIT_MASK, CYREG_PRT6_BIT_MASK
+.set SCSI_In_DBx__7__BYP, CYREG_PRT6_BYP
+.set SCSI_In_DBx__7__CTL, CYREG_PRT6_CTL
+.set SCSI_In_DBx__7__DM0, CYREG_PRT6_DM0
+.set SCSI_In_DBx__7__DM1, CYREG_PRT6_DM1
+.set SCSI_In_DBx__7__DM2, CYREG_PRT6_DM2
+.set SCSI_In_DBx__7__DR, CYREG_PRT6_DR
+.set SCSI_In_DBx__7__INP_DIS, CYREG_PRT6_INP_DIS
+.set SCSI_In_DBx__7__INTTYPE, CYREG_PICU6_INTTYPE3
+.set SCSI_In_DBx__7__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG
+.set SCSI_In_DBx__7__LCD_EN, CYREG_PRT6_LCD_EN
+.set SCSI_In_DBx__7__MASK, 0x08
+.set SCSI_In_DBx__7__PC, CYREG_PRT6_PC3
+.set SCSI_In_DBx__7__PORT, 6
+.set SCSI_In_DBx__7__PRT, CYREG_PRT6_PRT
+.set SCSI_In_DBx__7__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL
+.set SCSI_In_DBx__7__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN
+.set SCSI_In_DBx__7__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0
+.set SCSI_In_DBx__7__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1
+.set SCSI_In_DBx__7__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0
+.set SCSI_In_DBx__7__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1
+.set SCSI_In_DBx__7__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT
+.set SCSI_In_DBx__7__PS, CYREG_PRT6_PS
+.set SCSI_In_DBx__7__SHIFT, 3
+.set SCSI_In_DBx__7__SLW, CYREG_PRT6_SLW
+.set SCSI_In_DBx__DB0__AG, CYREG_PRT6_AG
+.set SCSI_In_DBx__DB0__AMUX, CYREG_PRT6_AMUX
+.set SCSI_In_DBx__DB0__BIE, CYREG_PRT6_BIE
+.set SCSI_In_DBx__DB0__BIT_MASK, CYREG_PRT6_BIT_MASK
+.set SCSI_In_DBx__DB0__BYP, CYREG_PRT6_BYP
+.set SCSI_In_DBx__DB0__CTL, CYREG_PRT6_CTL
+.set SCSI_In_DBx__DB0__DM0, CYREG_PRT6_DM0
+.set SCSI_In_DBx__DB0__DM1, CYREG_PRT6_DM1
+.set SCSI_In_DBx__DB0__DM2, CYREG_PRT6_DM2
+.set SCSI_In_DBx__DB0__DR, CYREG_PRT6_DR
+.set SCSI_In_DBx__DB0__INP_DIS, CYREG_PRT6_INP_DIS
+.set SCSI_In_DBx__DB0__INTTYPE, CYREG_PICU6_INTTYPE6
+.set SCSI_In_DBx__DB0__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG
+.set SCSI_In_DBx__DB0__LCD_EN, CYREG_PRT6_LCD_EN
+.set SCSI_In_DBx__DB0__MASK, 0x40
+.set SCSI_In_DBx__DB0__PC, CYREG_PRT6_PC6
+.set SCSI_In_DBx__DB0__PORT, 6
+.set SCSI_In_DBx__DB0__PRT, CYREG_PRT6_PRT
+.set SCSI_In_DBx__DB0__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL
+.set SCSI_In_DBx__DB0__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN
+.set SCSI_In_DBx__DB0__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0
+.set SCSI_In_DBx__DB0__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1
+.set SCSI_In_DBx__DB0__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0
+.set SCSI_In_DBx__DB0__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1
+.set SCSI_In_DBx__DB0__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT
+.set SCSI_In_DBx__DB0__PS, CYREG_PRT6_PS
+.set SCSI_In_DBx__DB0__SHIFT, 6
+.set SCSI_In_DBx__DB0__SLW, CYREG_PRT6_SLW
+.set SCSI_In_DBx__DB1__AG, CYREG_PRT6_AG
+.set SCSI_In_DBx__DB1__AMUX, CYREG_PRT6_AMUX
+.set SCSI_In_DBx__DB1__BIE, CYREG_PRT6_BIE
+.set SCSI_In_DBx__DB1__BIT_MASK, CYREG_PRT6_BIT_MASK
+.set SCSI_In_DBx__DB1__BYP, CYREG_PRT6_BYP
+.set SCSI_In_DBx__DB1__CTL, CYREG_PRT6_CTL
+.set SCSI_In_DBx__DB1__DM0, CYREG_PRT6_DM0
+.set SCSI_In_DBx__DB1__DM1, CYREG_PRT6_DM1
+.set SCSI_In_DBx__DB1__DM2, CYREG_PRT6_DM2
+.set SCSI_In_DBx__DB1__DR, CYREG_PRT6_DR
+.set SCSI_In_DBx__DB1__INP_DIS, CYREG_PRT6_INP_DIS
+.set SCSI_In_DBx__DB1__INTTYPE, CYREG_PICU6_INTTYPE4
+.set SCSI_In_DBx__DB1__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG
+.set SCSI_In_DBx__DB1__LCD_EN, CYREG_PRT6_LCD_EN
+.set SCSI_In_DBx__DB1__MASK, 0x10
+.set SCSI_In_DBx__DB1__PC, CYREG_PRT6_PC4
+.set SCSI_In_DBx__DB1__PORT, 6
+.set SCSI_In_DBx__DB1__PRT, CYREG_PRT6_PRT
+.set SCSI_In_DBx__DB1__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL
+.set SCSI_In_DBx__DB1__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN
+.set SCSI_In_DBx__DB1__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0
+.set SCSI_In_DBx__DB1__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1
+.set SCSI_In_DBx__DB1__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0
+.set SCSI_In_DBx__DB1__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1
+.set SCSI_In_DBx__DB1__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT
+.set SCSI_In_DBx__DB1__PS, CYREG_PRT6_PS
+.set SCSI_In_DBx__DB1__SHIFT, 4
+.set SCSI_In_DBx__DB1__SLW, CYREG_PRT6_SLW
+.set SCSI_In_DBx__DB2__AG, CYREG_PRT12_AG
+.set SCSI_In_DBx__DB2__BIE, CYREG_PRT12_BIE
+.set SCSI_In_DBx__DB2__BIT_MASK, CYREG_PRT12_BIT_MASK
+.set SCSI_In_DBx__DB2__BYP, CYREG_PRT12_BYP
+.set SCSI_In_DBx__DB2__DM0, CYREG_PRT12_DM0
+.set SCSI_In_DBx__DB2__DM1, CYREG_PRT12_DM1
+.set SCSI_In_DBx__DB2__DM2, CYREG_PRT12_DM2
+.set SCSI_In_DBx__DB2__DR, CYREG_PRT12_DR
+.set SCSI_In_DBx__DB2__INP_DIS, CYREG_PRT12_INP_DIS
+.set SCSI_In_DBx__DB2__INTTYPE, CYREG_PICU12_INTTYPE4
+.set SCSI_In_DBx__DB2__MASK, 0x10
+.set SCSI_In_DBx__DB2__PC, CYREG_PRT12_PC4
+.set SCSI_In_DBx__DB2__PORT, 12
+.set SCSI_In_DBx__DB2__PRT, CYREG_PRT12_PRT
+.set SCSI_In_DBx__DB2__PRTDSI__DBL_SYNC_IN, CYREG_PRT12_DBL_SYNC_IN
+.set SCSI_In_DBx__DB2__PRTDSI__OE_SEL0, CYREG_PRT12_OE_SEL0
+.set SCSI_In_DBx__DB2__PRTDSI__OE_SEL1, CYREG_PRT12_OE_SEL1
+.set SCSI_In_DBx__DB2__PRTDSI__OUT_SEL0, CYREG_PRT12_OUT_SEL0
+.set SCSI_In_DBx__DB2__PRTDSI__OUT_SEL1, CYREG_PRT12_OUT_SEL1
+.set SCSI_In_DBx__DB2__PRTDSI__SYNC_OUT, CYREG_PRT12_SYNC_OUT
+.set SCSI_In_DBx__DB2__PS, CYREG_PRT12_PS
+.set SCSI_In_DBx__DB2__SHIFT, 4
+.set SCSI_In_DBx__DB2__SIO_CFG, CYREG_PRT12_SIO_CFG
+.set SCSI_In_DBx__DB2__SIO_DIFF, CYREG_PRT12_SIO_DIFF
+.set SCSI_In_DBx__DB2__SIO_HYST_EN, CYREG_PRT12_SIO_HYST_EN
+.set SCSI_In_DBx__DB2__SIO_REG_HIFREQ, CYREG_PRT12_SIO_REG_HIFREQ
+.set SCSI_In_DBx__DB2__SLW, CYREG_PRT12_SLW
+.set SCSI_In_DBx__DB3__AG, CYREG_PRT2_AG
+.set SCSI_In_DBx__DB3__AMUX, CYREG_PRT2_AMUX
+.set SCSI_In_DBx__DB3__BIE, CYREG_PRT2_BIE
+.set SCSI_In_DBx__DB3__BIT_MASK, CYREG_PRT2_BIT_MASK
+.set SCSI_In_DBx__DB3__BYP, CYREG_PRT2_BYP
+.set SCSI_In_DBx__DB3__CTL, CYREG_PRT2_CTL
+.set SCSI_In_DBx__DB3__DM0, CYREG_PRT2_DM0
+.set SCSI_In_DBx__DB3__DM1, CYREG_PRT2_DM1
+.set SCSI_In_DBx__DB3__DM2, CYREG_PRT2_DM2
+.set SCSI_In_DBx__DB3__DR, CYREG_PRT2_DR
+.set SCSI_In_DBx__DB3__INP_DIS, CYREG_PRT2_INP_DIS
+.set SCSI_In_DBx__DB3__INTTYPE, CYREG_PICU2_INTTYPE6
+.set SCSI_In_DBx__DB3__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG
+.set SCSI_In_DBx__DB3__LCD_EN, CYREG_PRT2_LCD_EN
+.set SCSI_In_DBx__DB3__MASK, 0x40
+.set SCSI_In_DBx__DB3__PC, CYREG_PRT2_PC6
+.set SCSI_In_DBx__DB3__PORT, 2
+.set SCSI_In_DBx__DB3__PRT, CYREG_PRT2_PRT
+.set SCSI_In_DBx__DB3__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL
+.set SCSI_In_DBx__DB3__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN
+.set SCSI_In_DBx__DB3__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0
+.set SCSI_In_DBx__DB3__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1
+.set SCSI_In_DBx__DB3__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0
+.set SCSI_In_DBx__DB3__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1
+.set SCSI_In_DBx__DB3__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT
+.set SCSI_In_DBx__DB3__PS, CYREG_PRT2_PS
+.set SCSI_In_DBx__DB3__SHIFT, 6
+.set SCSI_In_DBx__DB3__SLW, CYREG_PRT2_SLW
+.set SCSI_In_DBx__DB4__AG, CYREG_PRT2_AG
+.set SCSI_In_DBx__DB4__AMUX, CYREG_PRT2_AMUX
+.set SCSI_In_DBx__DB4__BIE, CYREG_PRT2_BIE
+.set SCSI_In_DBx__DB4__BIT_MASK, CYREG_PRT2_BIT_MASK
+.set SCSI_In_DBx__DB4__BYP, CYREG_PRT2_BYP
+.set SCSI_In_DBx__DB4__CTL, CYREG_PRT2_CTL
+.set SCSI_In_DBx__DB4__DM0, CYREG_PRT2_DM0
+.set SCSI_In_DBx__DB4__DM1, CYREG_PRT2_DM1
+.set SCSI_In_DBx__DB4__DM2, CYREG_PRT2_DM2
+.set SCSI_In_DBx__DB4__DR, CYREG_PRT2_DR
+.set SCSI_In_DBx__DB4__INP_DIS, CYREG_PRT2_INP_DIS
+.set SCSI_In_DBx__DB4__INTTYPE, CYREG_PICU2_INTTYPE4
+.set SCSI_In_DBx__DB4__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG
+.set SCSI_In_DBx__DB4__LCD_EN, CYREG_PRT2_LCD_EN
+.set SCSI_In_DBx__DB4__MASK, 0x10
+.set SCSI_In_DBx__DB4__PC, CYREG_PRT2_PC4
+.set SCSI_In_DBx__DB4__PORT, 2
+.set SCSI_In_DBx__DB4__PRT, CYREG_PRT2_PRT
+.set SCSI_In_DBx__DB4__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL
+.set SCSI_In_DBx__DB4__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN
+.set SCSI_In_DBx__DB4__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0
+.set SCSI_In_DBx__DB4__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1
+.set SCSI_In_DBx__DB4__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0
+.set SCSI_In_DBx__DB4__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1
+.set SCSI_In_DBx__DB4__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT
+.set SCSI_In_DBx__DB4__PS, CYREG_PRT2_PS
+.set SCSI_In_DBx__DB4__SHIFT, 4
+.set SCSI_In_DBx__DB4__SLW, CYREG_PRT2_SLW
+.set SCSI_In_DBx__DB5__AG, CYREG_PRT2_AG
+.set SCSI_In_DBx__DB5__AMUX, CYREG_PRT2_AMUX
+.set SCSI_In_DBx__DB5__BIE, CYREG_PRT2_BIE
+.set SCSI_In_DBx__DB5__BIT_MASK, CYREG_PRT2_BIT_MASK
+.set SCSI_In_DBx__DB5__BYP, CYREG_PRT2_BYP
+.set SCSI_In_DBx__DB5__CTL, CYREG_PRT2_CTL
+.set SCSI_In_DBx__DB5__DM0, CYREG_PRT2_DM0
+.set SCSI_In_DBx__DB5__DM1, CYREG_PRT2_DM1
+.set SCSI_In_DBx__DB5__DM2, CYREG_PRT2_DM2
+.set SCSI_In_DBx__DB5__DR, CYREG_PRT2_DR
+.set SCSI_In_DBx__DB5__INP_DIS, CYREG_PRT2_INP_DIS
+.set SCSI_In_DBx__DB5__INTTYPE, CYREG_PICU2_INTTYPE2
+.set SCSI_In_DBx__DB5__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG
+.set SCSI_In_DBx__DB5__LCD_EN, CYREG_PRT2_LCD_EN
+.set SCSI_In_DBx__DB5__MASK, 0x04
+.set SCSI_In_DBx__DB5__PC, CYREG_PRT2_PC2
+.set SCSI_In_DBx__DB5__PORT, 2
+.set SCSI_In_DBx__DB5__PRT, CYREG_PRT2_PRT
+.set SCSI_In_DBx__DB5__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL
+.set SCSI_In_DBx__DB5__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN
+.set SCSI_In_DBx__DB5__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0
+.set SCSI_In_DBx__DB5__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1
+.set SCSI_In_DBx__DB5__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0
+.set SCSI_In_DBx__DB5__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1
+.set SCSI_In_DBx__DB5__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT
+.set SCSI_In_DBx__DB5__PS, CYREG_PRT2_PS
+.set SCSI_In_DBx__DB5__SHIFT, 2
+.set SCSI_In_DBx__DB5__SLW, CYREG_PRT2_SLW
+.set SCSI_In_DBx__DB6__AG, CYREG_PRT2_AG
+.set SCSI_In_DBx__DB6__AMUX, CYREG_PRT2_AMUX
+.set SCSI_In_DBx__DB6__BIE, CYREG_PRT2_BIE
+.set SCSI_In_DBx__DB6__BIT_MASK, CYREG_PRT2_BIT_MASK
+.set SCSI_In_DBx__DB6__BYP, CYREG_PRT2_BYP
+.set SCSI_In_DBx__DB6__CTL, CYREG_PRT2_CTL
+.set SCSI_In_DBx__DB6__DM0, CYREG_PRT2_DM0
+.set SCSI_In_DBx__DB6__DM1, CYREG_PRT2_DM1
+.set SCSI_In_DBx__DB6__DM2, CYREG_PRT2_DM2
+.set SCSI_In_DBx__DB6__DR, CYREG_PRT2_DR
+.set SCSI_In_DBx__DB6__INP_DIS, CYREG_PRT2_INP_DIS
+.set SCSI_In_DBx__DB6__INTTYPE, CYREG_PICU2_INTTYPE0
+.set SCSI_In_DBx__DB6__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG
+.set SCSI_In_DBx__DB6__LCD_EN, CYREG_PRT2_LCD_EN
+.set SCSI_In_DBx__DB6__MASK, 0x01
+.set SCSI_In_DBx__DB6__PC, CYREG_PRT2_PC0
+.set SCSI_In_DBx__DB6__PORT, 2
+.set SCSI_In_DBx__DB6__PRT, CYREG_PRT2_PRT
+.set SCSI_In_DBx__DB6__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL
+.set SCSI_In_DBx__DB6__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN
+.set SCSI_In_DBx__DB6__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0
+.set SCSI_In_DBx__DB6__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1
+.set SCSI_In_DBx__DB6__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0
+.set SCSI_In_DBx__DB6__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1
+.set SCSI_In_DBx__DB6__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT
+.set SCSI_In_DBx__DB6__PS, CYREG_PRT2_PS
+.set SCSI_In_DBx__DB6__SHIFT, 0
+.set SCSI_In_DBx__DB6__SLW, CYREG_PRT2_SLW
+.set SCSI_In_DBx__DB7__AG, CYREG_PRT6_AG
+.set SCSI_In_DBx__DB7__AMUX, CYREG_PRT6_AMUX
+.set SCSI_In_DBx__DB7__BIE, CYREG_PRT6_BIE
+.set SCSI_In_DBx__DB7__BIT_MASK, CYREG_PRT6_BIT_MASK
+.set SCSI_In_DBx__DB7__BYP, CYREG_PRT6_BYP
+.set SCSI_In_DBx__DB7__CTL, CYREG_PRT6_CTL
+.set SCSI_In_DBx__DB7__DM0, CYREG_PRT6_DM0
+.set SCSI_In_DBx__DB7__DM1, CYREG_PRT6_DM1
+.set SCSI_In_DBx__DB7__DM2, CYREG_PRT6_DM2
+.set SCSI_In_DBx__DB7__DR, CYREG_PRT6_DR
+.set SCSI_In_DBx__DB7__INP_DIS, CYREG_PRT6_INP_DIS
+.set SCSI_In_DBx__DB7__INTTYPE, CYREG_PICU6_INTTYPE3
+.set SCSI_In_DBx__DB7__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG
+.set SCSI_In_DBx__DB7__LCD_EN, CYREG_PRT6_LCD_EN
+.set SCSI_In_DBx__DB7__MASK, 0x08
+.set SCSI_In_DBx__DB7__PC, CYREG_PRT6_PC3
+.set SCSI_In_DBx__DB7__PORT, 6
+.set SCSI_In_DBx__DB7__PRT, CYREG_PRT6_PRT
+.set SCSI_In_DBx__DB7__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL
+.set SCSI_In_DBx__DB7__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN
+.set SCSI_In_DBx__DB7__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0
+.set SCSI_In_DBx__DB7__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1
+.set SCSI_In_DBx__DB7__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0
+.set SCSI_In_DBx__DB7__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1
+.set SCSI_In_DBx__DB7__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT
+.set SCSI_In_DBx__DB7__PS, CYREG_PRT6_PS
+.set SCSI_In_DBx__DB7__SHIFT, 3
+.set SCSI_In_DBx__DB7__SLW, CYREG_PRT6_SLW
+
+/* SD_MISO */
+.set SD_MISO__0__INTTYPE, CYREG_PICU3_INTTYPE2
+.set SD_MISO__0__MASK, 0x04
+.set SD_MISO__0__PC, CYREG_PRT3_PC2
+.set SD_MISO__0__PORT, 3
+.set SD_MISO__0__SHIFT, 2
+.set SD_MISO__AG, CYREG_PRT3_AG
+.set SD_MISO__AMUX, CYREG_PRT3_AMUX
+.set SD_MISO__BIE, CYREG_PRT3_BIE
+.set SD_MISO__BIT_MASK, CYREG_PRT3_BIT_MASK
+.set SD_MISO__BYP, CYREG_PRT3_BYP
+.set SD_MISO__CTL, CYREG_PRT3_CTL
+.set SD_MISO__DM0, CYREG_PRT3_DM0
+.set SD_MISO__DM1, CYREG_PRT3_DM1
+.set SD_MISO__DM2, CYREG_PRT3_DM2
+.set SD_MISO__DR, CYREG_PRT3_DR
+.set SD_MISO__INP_DIS, CYREG_PRT3_INP_DIS
+.set SD_MISO__INTTYPE_BASE, CYDEV_PICU_INTTYPE_PICU3_BASE
+.set SD_MISO__LCD_COM_SEG, CYREG_PRT3_LCD_COM_SEG
+.set SD_MISO__LCD_EN, CYREG_PRT3_LCD_EN
+.set SD_MISO__MASK, 0x04
+.set SD_MISO__PORT, 3
+.set SD_MISO__PRT, CYREG_PRT3_PRT
+.set SD_MISO__PRTDSI__CAPS_SEL, CYREG_PRT3_CAPS_SEL
+.set SD_MISO__PRTDSI__DBL_SYNC_IN, CYREG_PRT3_DBL_SYNC_IN
+.set SD_MISO__PRTDSI__OE_SEL0, CYREG_PRT3_OE_SEL0
+.set SD_MISO__PRTDSI__OE_SEL1, CYREG_PRT3_OE_SEL1
+.set SD_MISO__PRTDSI__OUT_SEL0, CYREG_PRT3_OUT_SEL0
+.set SD_MISO__PRTDSI__OUT_SEL1, CYREG_PRT3_OUT_SEL1
+.set SD_MISO__PRTDSI__SYNC_OUT, CYREG_PRT3_SYNC_OUT
+.set SD_MISO__PS, CYREG_PRT3_PS
+.set SD_MISO__SHIFT, 2
+.set SD_MISO__SLW, CYREG_PRT3_SLW
+
+/* SD_MOSI */
+.set SD_MOSI__0__INTTYPE, CYREG_PICU3_INTTYPE4
+.set SD_MOSI__0__MASK, 0x10
+.set SD_MOSI__0__PC, CYREG_PRT3_PC4
+.set SD_MOSI__0__PORT, 3
+.set SD_MOSI__0__SHIFT, 4
+.set SD_MOSI__AG, CYREG_PRT3_AG
+.set SD_MOSI__AMUX, CYREG_PRT3_AMUX
+.set SD_MOSI__BIE, CYREG_PRT3_BIE
+.set SD_MOSI__BIT_MASK, CYREG_PRT3_BIT_MASK
+.set SD_MOSI__BYP, CYREG_PRT3_BYP
+.set SD_MOSI__CTL, CYREG_PRT3_CTL
+.set SD_MOSI__DM0, CYREG_PRT3_DM0
+.set SD_MOSI__DM1, CYREG_PRT3_DM1
+.set SD_MOSI__DM2, CYREG_PRT3_DM2
+.set SD_MOSI__DR, CYREG_PRT3_DR
+.set SD_MOSI__INP_DIS, CYREG_PRT3_INP_DIS
+.set SD_MOSI__INTTYPE_BASE, CYDEV_PICU_INTTYPE_PICU3_BASE
+.set SD_MOSI__LCD_COM_SEG, CYREG_PRT3_LCD_COM_SEG
+.set SD_MOSI__LCD_EN, CYREG_PRT3_LCD_EN
+.set SD_MOSI__MASK, 0x10
+.set SD_MOSI__PORT, 3
+.set SD_MOSI__PRT, CYREG_PRT3_PRT
+.set SD_MOSI__PRTDSI__CAPS_SEL, CYREG_PRT3_CAPS_SEL
+.set SD_MOSI__PRTDSI__DBL_SYNC_IN, CYREG_PRT3_DBL_SYNC_IN
+.set SD_MOSI__PRTDSI__OE_SEL0, CYREG_PRT3_OE_SEL0
+.set SD_MOSI__PRTDSI__OE_SEL1, CYREG_PRT3_OE_SEL1
+.set SD_MOSI__PRTDSI__OUT_SEL0, CYREG_PRT3_OUT_SEL0
+.set SD_MOSI__PRTDSI__OUT_SEL1, CYREG_PRT3_OUT_SEL1
+.set SD_MOSI__PRTDSI__SYNC_OUT, CYREG_PRT3_SYNC_OUT
+.set SD_MOSI__PS, CYREG_PRT3_PS
+.set SD_MOSI__SHIFT, 4
+.set SD_MOSI__SLW, CYREG_PRT3_SLW
+
+/* TERM_EN */
+.set TERM_EN__0__INTTYPE, CYREG_PICU15_INTTYPE3
+.set TERM_EN__0__MASK, 0x08
+.set TERM_EN__0__PC, CYREG_IO_PC_PRT15_PC3
+.set TERM_EN__0__PORT, 15
+.set TERM_EN__0__SHIFT, 3
+.set TERM_EN__AG, CYREG_PRT15_AG
+.set TERM_EN__AMUX, CYREG_PRT15_AMUX
+.set TERM_EN__BIE, CYREG_PRT15_BIE
+.set TERM_EN__BIT_MASK, CYREG_PRT15_BIT_MASK
+.set TERM_EN__BYP, CYREG_PRT15_BYP
+.set TERM_EN__CTL, CYREG_PRT15_CTL
+.set TERM_EN__DM0, CYREG_PRT15_DM0
+.set TERM_EN__DM1, CYREG_PRT15_DM1
+.set TERM_EN__DM2, CYREG_PRT15_DM2
+.set TERM_EN__DR, CYREG_PRT15_DR
+.set TERM_EN__INP_DIS, CYREG_PRT15_INP_DIS
+.set TERM_EN__INTTYPE_BASE, CYDEV_PICU_INTTYPE_PICU15_BASE
+.set TERM_EN__LCD_COM_SEG, CYREG_PRT15_LCD_COM_SEG
+.set TERM_EN__LCD_EN, CYREG_PRT15_LCD_EN
+.set TERM_EN__MASK, 0x08
+.set TERM_EN__PORT, 15
+.set TERM_EN__PRT, CYREG_PRT15_PRT
+.set TERM_EN__PRTDSI__CAPS_SEL, CYREG_PRT15_CAPS_SEL
+.set TERM_EN__PRTDSI__DBL_SYNC_IN, CYREG_PRT15_DBL_SYNC_IN
+.set TERM_EN__PRTDSI__OE_SEL0, CYREG_PRT15_OE_SEL0
+.set TERM_EN__PRTDSI__OE_SEL1, CYREG_PRT15_OE_SEL1
+.set TERM_EN__PRTDSI__OUT_SEL0, CYREG_PRT15_OUT_SEL0
+.set TERM_EN__PRTDSI__OUT_SEL1, CYREG_PRT15_OUT_SEL1
+.set TERM_EN__PRTDSI__SYNC_OUT, CYREG_PRT15_SYNC_OUT
+.set TERM_EN__PS, CYREG_PRT15_PS
+.set TERM_EN__SHIFT, 3
+.set TERM_EN__SLW, CYREG_PRT15_SLW
+
+/* SCSI_CLK */
+.set SCSI_CLK__CFG0, CYREG_CLKDIST_DCFG1_CFG0
+.set SCSI_CLK__CFG1, CYREG_CLKDIST_DCFG1_CFG1
+.set SCSI_CLK__CFG2, CYREG_CLKDIST_DCFG1_CFG2
+.set SCSI_CLK__CFG2_SRC_SEL_MASK, 0x07
+.set SCSI_CLK__INDEX, 0x01
+.set SCSI_CLK__PM_ACT_CFG, CYREG_PM_ACT_CFG2
+.set SCSI_CLK__PM_ACT_MSK, 0x02
+.set SCSI_CLK__PM_STBY_CFG, CYREG_PM_STBY_CFG2
+.set SCSI_CLK__PM_STBY_MSK, 0x02
+
+/* SCSI_Out */
+.set SCSI_Out__0__AG, CYREG_PRT6_AG
+.set SCSI_Out__0__AMUX, CYREG_PRT6_AMUX
+.set SCSI_Out__0__BIE, CYREG_PRT6_BIE
+.set SCSI_Out__0__BIT_MASK, CYREG_PRT6_BIT_MASK
+.set SCSI_Out__0__BYP, CYREG_PRT6_BYP
+.set SCSI_Out__0__CTL, CYREG_PRT6_CTL
+.set SCSI_Out__0__DM0, CYREG_PRT6_DM0
+.set SCSI_Out__0__DM1, CYREG_PRT6_DM1
+.set SCSI_Out__0__DM2, CYREG_PRT6_DM2
+.set SCSI_Out__0__DR, CYREG_PRT6_DR
+.set SCSI_Out__0__INP_DIS, CYREG_PRT6_INP_DIS
+.set SCSI_Out__0__INTTYPE, CYREG_PICU6_INTTYPE2
+.set SCSI_Out__0__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG
+.set SCSI_Out__0__LCD_EN, CYREG_PRT6_LCD_EN
+.set SCSI_Out__0__MASK, 0x04
+.set SCSI_Out__0__PC, CYREG_PRT6_PC2
+.set SCSI_Out__0__PORT, 6
+.set SCSI_Out__0__PRT, CYREG_PRT6_PRT
+.set SCSI_Out__0__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL
+.set SCSI_Out__0__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN
+.set SCSI_Out__0__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0
+.set SCSI_Out__0__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1
+.set SCSI_Out__0__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0
+.set SCSI_Out__0__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1
+.set SCSI_Out__0__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT
+.set SCSI_Out__0__PS, CYREG_PRT6_PS
+.set SCSI_Out__0__SHIFT, 2
+.set SCSI_Out__0__SLW, CYREG_PRT6_SLW
+.set SCSI_Out__1__AG, CYREG_PRT4_AG
+.set SCSI_Out__1__AMUX, CYREG_PRT4_AMUX
+.set SCSI_Out__1__BIE, CYREG_PRT4_BIE
+.set SCSI_Out__1__BIT_MASK, CYREG_PRT4_BIT_MASK
+.set SCSI_Out__1__BYP, CYREG_PRT4_BYP
+.set SCSI_Out__1__CTL, CYREG_PRT4_CTL
+.set SCSI_Out__1__DM0, CYREG_PRT4_DM0
+.set SCSI_Out__1__DM1, CYREG_PRT4_DM1
+.set SCSI_Out__1__DM2, CYREG_PRT4_DM2
+.set SCSI_Out__1__DR, CYREG_PRT4_DR
+.set SCSI_Out__1__INP_DIS, CYREG_PRT4_INP_DIS
+.set SCSI_Out__1__INTTYPE, CYREG_PICU4_INTTYPE6
+.set SCSI_Out__1__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG
+.set SCSI_Out__1__LCD_EN, CYREG_PRT4_LCD_EN
+.set SCSI_Out__1__MASK, 0x40
+.set SCSI_Out__1__PC, CYREG_PRT4_PC6
+.set SCSI_Out__1__PORT, 4
+.set SCSI_Out__1__PRT, CYREG_PRT4_PRT
+.set SCSI_Out__1__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL
+.set SCSI_Out__1__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN
+.set SCSI_Out__1__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0
+.set SCSI_Out__1__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1
+.set SCSI_Out__1__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0
+.set SCSI_Out__1__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1
+.set SCSI_Out__1__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT
+.set SCSI_Out__1__PS, CYREG_PRT4_PS
+.set SCSI_Out__1__SHIFT, 6
+.set SCSI_Out__1__SLW, CYREG_PRT4_SLW
+.set SCSI_Out__2__AG, CYREG_PRT0_AG
+.set SCSI_Out__2__AMUX, CYREG_PRT0_AMUX
+.set SCSI_Out__2__BIE, CYREG_PRT0_BIE
+.set SCSI_Out__2__BIT_MASK, CYREG_PRT0_BIT_MASK
+.set SCSI_Out__2__BYP, CYREG_PRT0_BYP
+.set SCSI_Out__2__CTL, CYREG_PRT0_CTL
+.set SCSI_Out__2__DM0, CYREG_PRT0_DM0
+.set SCSI_Out__2__DM1, CYREG_PRT0_DM1
+.set SCSI_Out__2__DM2, CYREG_PRT0_DM2
+.set SCSI_Out__2__DR, CYREG_PRT0_DR
+.set SCSI_Out__2__INP_DIS, CYREG_PRT0_INP_DIS
+.set SCSI_Out__2__INTTYPE, CYREG_PICU0_INTTYPE7
+.set SCSI_Out__2__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG
+.set SCSI_Out__2__LCD_EN, CYREG_PRT0_LCD_EN
+.set SCSI_Out__2__MASK, 0x80
+.set SCSI_Out__2__PC, CYREG_PRT0_PC7
+.set SCSI_Out__2__PORT, 0
+.set SCSI_Out__2__PRT, CYREG_PRT0_PRT
+.set SCSI_Out__2__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL
+.set SCSI_Out__2__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN
+.set SCSI_Out__2__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0
+.set SCSI_Out__2__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1
+.set SCSI_Out__2__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0
+.set SCSI_Out__2__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1
+.set SCSI_Out__2__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT
+.set SCSI_Out__2__PS, CYREG_PRT0_PS
+.set SCSI_Out__2__SHIFT, 7
+.set SCSI_Out__2__SLW, CYREG_PRT0_SLW
+.set SCSI_Out__3__AG, CYREG_PRT0_AG
+.set SCSI_Out__3__AMUX, CYREG_PRT0_AMUX
+.set SCSI_Out__3__BIE, CYREG_PRT0_BIE
+.set SCSI_Out__3__BIT_MASK, CYREG_PRT0_BIT_MASK
+.set SCSI_Out__3__BYP, CYREG_PRT0_BYP
+.set SCSI_Out__3__CTL, CYREG_PRT0_CTL
+.set SCSI_Out__3__DM0, CYREG_PRT0_DM0
+.set SCSI_Out__3__DM1, CYREG_PRT0_DM1
+.set SCSI_Out__3__DM2, CYREG_PRT0_DM2
+.set SCSI_Out__3__DR, CYREG_PRT0_DR
+.set SCSI_Out__3__INP_DIS, CYREG_PRT0_INP_DIS
+.set SCSI_Out__3__INTTYPE, CYREG_PICU0_INTTYPE5
+.set SCSI_Out__3__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG
+.set SCSI_Out__3__LCD_EN, CYREG_PRT0_LCD_EN
+.set SCSI_Out__3__MASK, 0x20
+.set SCSI_Out__3__PC, CYREG_PRT0_PC5
+.set SCSI_Out__3__PORT, 0
+.set SCSI_Out__3__PRT, CYREG_PRT0_PRT
+.set SCSI_Out__3__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL
+.set SCSI_Out__3__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN
+.set SCSI_Out__3__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0
+.set SCSI_Out__3__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1
+.set SCSI_Out__3__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0
+.set SCSI_Out__3__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1
+.set SCSI_Out__3__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT
+.set SCSI_Out__3__PS, CYREG_PRT0_PS
+.set SCSI_Out__3__SHIFT, 5
+.set SCSI_Out__3__SLW, CYREG_PRT0_SLW
+.set SCSI_Out__4__AG, CYREG_PRT0_AG
+.set SCSI_Out__4__AMUX, CYREG_PRT0_AMUX
+.set SCSI_Out__4__BIE, CYREG_PRT0_BIE
+.set SCSI_Out__4__BIT_MASK, CYREG_PRT0_BIT_MASK
+.set SCSI_Out__4__BYP, CYREG_PRT0_BYP
+.set SCSI_Out__4__CTL, CYREG_PRT0_CTL
+.set SCSI_Out__4__DM0, CYREG_PRT0_DM0
+.set SCSI_Out__4__DM1, CYREG_PRT0_DM1
+.set SCSI_Out__4__DM2, CYREG_PRT0_DM2
+.set SCSI_Out__4__DR, CYREG_PRT0_DR
+.set SCSI_Out__4__INP_DIS, CYREG_PRT0_INP_DIS
+.set SCSI_Out__4__INTTYPE, CYREG_PICU0_INTTYPE3
+.set SCSI_Out__4__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG
+.set SCSI_Out__4__LCD_EN, CYREG_PRT0_LCD_EN
+.set SCSI_Out__4__MASK, 0x08
+.set SCSI_Out__4__PC, CYREG_PRT0_PC3
+.set SCSI_Out__4__PORT, 0
+.set SCSI_Out__4__PRT, CYREG_PRT0_PRT
+.set SCSI_Out__4__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL
+.set SCSI_Out__4__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN
+.set SCSI_Out__4__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0
+.set SCSI_Out__4__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1
+.set SCSI_Out__4__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0
+.set SCSI_Out__4__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1
+.set SCSI_Out__4__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT
+.set SCSI_Out__4__PS, CYREG_PRT0_PS
+.set SCSI_Out__4__SHIFT, 3
+.set SCSI_Out__4__SLW, CYREG_PRT0_SLW
+.set SCSI_Out__5__AG, CYREG_PRT0_AG
+.set SCSI_Out__5__AMUX, CYREG_PRT0_AMUX
+.set SCSI_Out__5__BIE, CYREG_PRT0_BIE
+.set SCSI_Out__5__BIT_MASK, CYREG_PRT0_BIT_MASK
+.set SCSI_Out__5__BYP, CYREG_PRT0_BYP
+.set SCSI_Out__5__CTL, CYREG_PRT0_CTL
+.set SCSI_Out__5__DM0, CYREG_PRT0_DM0
+.set SCSI_Out__5__DM1, CYREG_PRT0_DM1
+.set SCSI_Out__5__DM2, CYREG_PRT0_DM2
+.set SCSI_Out__5__DR, CYREG_PRT0_DR
+.set SCSI_Out__5__INP_DIS, CYREG_PRT0_INP_DIS
+.set SCSI_Out__5__INTTYPE, CYREG_PICU0_INTTYPE1
+.set SCSI_Out__5__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG
+.set SCSI_Out__5__LCD_EN, CYREG_PRT0_LCD_EN
+.set SCSI_Out__5__MASK, 0x02
+.set SCSI_Out__5__PC, CYREG_PRT0_PC1
+.set SCSI_Out__5__PORT, 0
+.set SCSI_Out__5__PRT, CYREG_PRT0_PRT
+.set SCSI_Out__5__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL
+.set SCSI_Out__5__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN
+.set SCSI_Out__5__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0
+.set SCSI_Out__5__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1
+.set SCSI_Out__5__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0
+.set SCSI_Out__5__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1
+.set SCSI_Out__5__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT
+.set SCSI_Out__5__PS, CYREG_PRT0_PS
+.set SCSI_Out__5__SHIFT, 1
+.set SCSI_Out__5__SLW, CYREG_PRT0_SLW
+.set SCSI_Out__6__AG, CYREG_PRT4_AG
+.set SCSI_Out__6__AMUX, CYREG_PRT4_AMUX
+.set SCSI_Out__6__BIE, CYREG_PRT4_BIE
+.set SCSI_Out__6__BIT_MASK, CYREG_PRT4_BIT_MASK
+.set SCSI_Out__6__BYP, CYREG_PRT4_BYP
+.set SCSI_Out__6__CTL, CYREG_PRT4_CTL
+.set SCSI_Out__6__DM0, CYREG_PRT4_DM0
+.set SCSI_Out__6__DM1, CYREG_PRT4_DM1
+.set SCSI_Out__6__DM2, CYREG_PRT4_DM2
+.set SCSI_Out__6__DR, CYREG_PRT4_DR
+.set SCSI_Out__6__INP_DIS, CYREG_PRT4_INP_DIS
+.set SCSI_Out__6__INTTYPE, CYREG_PICU4_INTTYPE1
+.set SCSI_Out__6__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG
+.set SCSI_Out__6__LCD_EN, CYREG_PRT4_LCD_EN
+.set SCSI_Out__6__MASK, 0x02
+.set SCSI_Out__6__PC, CYREG_PRT4_PC1
+.set SCSI_Out__6__PORT, 4
+.set SCSI_Out__6__PRT, CYREG_PRT4_PRT
+.set SCSI_Out__6__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL
+.set SCSI_Out__6__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN
+.set SCSI_Out__6__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0
+.set SCSI_Out__6__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1
+.set SCSI_Out__6__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0
+.set SCSI_Out__6__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1
+.set SCSI_Out__6__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT
+.set SCSI_Out__6__PS, CYREG_PRT4_PS
+.set SCSI_Out__6__SHIFT, 1
+.set SCSI_Out__6__SLW, CYREG_PRT4_SLW
+.set SCSI_Out__7__AG, CYREG_PRT12_AG
+.set SCSI_Out__7__BIE, CYREG_PRT12_BIE
+.set SCSI_Out__7__BIT_MASK, CYREG_PRT12_BIT_MASK
+.set SCSI_Out__7__BYP, CYREG_PRT12_BYP
+.set SCSI_Out__7__DM0, CYREG_PRT12_DM0
+.set SCSI_Out__7__DM1, CYREG_PRT12_DM1
+.set SCSI_Out__7__DM2, CYREG_PRT12_DM2
+.set SCSI_Out__7__DR, CYREG_PRT12_DR
+.set SCSI_Out__7__INP_DIS, CYREG_PRT12_INP_DIS
+.set SCSI_Out__7__INTTYPE, CYREG_PICU12_INTTYPE3
+.set SCSI_Out__7__MASK, 0x08
+.set SCSI_Out__7__PC, CYREG_PRT12_PC3
+.set SCSI_Out__7__PORT, 12
+.set SCSI_Out__7__PRT, CYREG_PRT12_PRT
+.set SCSI_Out__7__PRTDSI__DBL_SYNC_IN, CYREG_PRT12_DBL_SYNC_IN
+.set SCSI_Out__7__PRTDSI__OE_SEL0, CYREG_PRT12_OE_SEL0
+.set SCSI_Out__7__PRTDSI__OE_SEL1, CYREG_PRT12_OE_SEL1
+.set SCSI_Out__7__PRTDSI__OUT_SEL0, CYREG_PRT12_OUT_SEL0
+.set SCSI_Out__7__PRTDSI__OUT_SEL1, CYREG_PRT12_OUT_SEL1
+.set SCSI_Out__7__PRTDSI__SYNC_OUT, CYREG_PRT12_SYNC_OUT
+.set SCSI_Out__7__PS, CYREG_PRT12_PS
+.set SCSI_Out__7__SHIFT, 3
+.set SCSI_Out__7__SIO_CFG, CYREG_PRT12_SIO_CFG
+.set SCSI_Out__7__SIO_DIFF, CYREG_PRT12_SIO_DIFF
+.set SCSI_Out__7__SIO_HYST_EN, CYREG_PRT12_SIO_HYST_EN
+.set SCSI_Out__7__SIO_REG_HIFREQ, CYREG_PRT12_SIO_REG_HIFREQ
+.set SCSI_Out__7__SLW, CYREG_PRT12_SLW
+.set SCSI_Out__BSY__AG, CYREG_PRT4_AG
+.set SCSI_Out__BSY__AMUX, CYREG_PRT4_AMUX
+.set SCSI_Out__BSY__BIE, CYREG_PRT4_BIE
+.set SCSI_Out__BSY__BIT_MASK, CYREG_PRT4_BIT_MASK
+.set SCSI_Out__BSY__BYP, CYREG_PRT4_BYP
+.set SCSI_Out__BSY__CTL, CYREG_PRT4_CTL
+.set SCSI_Out__BSY__DM0, CYREG_PRT4_DM0
+.set SCSI_Out__BSY__DM1, CYREG_PRT4_DM1
+.set SCSI_Out__BSY__DM2, CYREG_PRT4_DM2
+.set SCSI_Out__BSY__DR, CYREG_PRT4_DR
+.set SCSI_Out__BSY__INP_DIS, CYREG_PRT4_INP_DIS
+.set SCSI_Out__BSY__INTTYPE, CYREG_PICU4_INTTYPE6
+.set SCSI_Out__BSY__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG
+.set SCSI_Out__BSY__LCD_EN, CYREG_PRT4_LCD_EN
+.set SCSI_Out__BSY__MASK, 0x40
+.set SCSI_Out__BSY__PC, CYREG_PRT4_PC6
+.set SCSI_Out__BSY__PORT, 4
+.set SCSI_Out__BSY__PRT, CYREG_PRT4_PRT
+.set SCSI_Out__BSY__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL
+.set SCSI_Out__BSY__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN
+.set SCSI_Out__BSY__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0
+.set SCSI_Out__BSY__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1
+.set SCSI_Out__BSY__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0
+.set SCSI_Out__BSY__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1
+.set SCSI_Out__BSY__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT
+.set SCSI_Out__BSY__PS, CYREG_PRT4_PS
+.set SCSI_Out__BSY__SHIFT, 6
+.set SCSI_Out__BSY__SLW, CYREG_PRT4_SLW
+.set SCSI_Out__CD_raw__AG, CYREG_PRT0_AG
+.set SCSI_Out__CD_raw__AMUX, CYREG_PRT0_AMUX
+.set SCSI_Out__CD_raw__BIE, CYREG_PRT0_BIE
+.set SCSI_Out__CD_raw__BIT_MASK, CYREG_PRT0_BIT_MASK
+.set SCSI_Out__CD_raw__BYP, CYREG_PRT0_BYP
+.set SCSI_Out__CD_raw__CTL, CYREG_PRT0_CTL
+.set SCSI_Out__CD_raw__DM0, CYREG_PRT0_DM0
+.set SCSI_Out__CD_raw__DM1, CYREG_PRT0_DM1
+.set SCSI_Out__CD_raw__DM2, CYREG_PRT0_DM2
+.set SCSI_Out__CD_raw__DR, CYREG_PRT0_DR
+.set SCSI_Out__CD_raw__INP_DIS, CYREG_PRT0_INP_DIS
+.set SCSI_Out__CD_raw__INTTYPE, CYREG_PICU0_INTTYPE1
+.set SCSI_Out__CD_raw__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG
+.set SCSI_Out__CD_raw__LCD_EN, CYREG_PRT0_LCD_EN
+.set SCSI_Out__CD_raw__MASK, 0x02
+.set SCSI_Out__CD_raw__PC, CYREG_PRT0_PC1
+.set SCSI_Out__CD_raw__PORT, 0
+.set SCSI_Out__CD_raw__PRT, CYREG_PRT0_PRT
+.set SCSI_Out__CD_raw__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL
+.set SCSI_Out__CD_raw__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN
+.set SCSI_Out__CD_raw__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0
+.set SCSI_Out__CD_raw__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1
+.set SCSI_Out__CD_raw__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0
+.set SCSI_Out__CD_raw__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1
+.set SCSI_Out__CD_raw__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT
+.set SCSI_Out__CD_raw__PS, CYREG_PRT0_PS
+.set SCSI_Out__CD_raw__SHIFT, 1
+.set SCSI_Out__CD_raw__SLW, CYREG_PRT0_SLW
+.set SCSI_Out__DBP_raw__AG, CYREG_PRT6_AG
+.set SCSI_Out__DBP_raw__AMUX, CYREG_PRT6_AMUX
+.set SCSI_Out__DBP_raw__BIE, CYREG_PRT6_BIE
+.set SCSI_Out__DBP_raw__BIT_MASK, CYREG_PRT6_BIT_MASK
+.set SCSI_Out__DBP_raw__BYP, CYREG_PRT6_BYP
+.set SCSI_Out__DBP_raw__CTL, CYREG_PRT6_CTL
+.set SCSI_Out__DBP_raw__DM0, CYREG_PRT6_DM0
+.set SCSI_Out__DBP_raw__DM1, CYREG_PRT6_DM1
+.set SCSI_Out__DBP_raw__DM2, CYREG_PRT6_DM2
+.set SCSI_Out__DBP_raw__DR, CYREG_PRT6_DR
+.set SCSI_Out__DBP_raw__INP_DIS, CYREG_PRT6_INP_DIS
+.set SCSI_Out__DBP_raw__INTTYPE, CYREG_PICU6_INTTYPE2
+.set SCSI_Out__DBP_raw__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG
+.set SCSI_Out__DBP_raw__LCD_EN, CYREG_PRT6_LCD_EN
+.set SCSI_Out__DBP_raw__MASK, 0x04
+.set SCSI_Out__DBP_raw__PC, CYREG_PRT6_PC2
+.set SCSI_Out__DBP_raw__PORT, 6
+.set SCSI_Out__DBP_raw__PRT, CYREG_PRT6_PRT
+.set SCSI_Out__DBP_raw__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL
+.set SCSI_Out__DBP_raw__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN
+.set SCSI_Out__DBP_raw__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0
+.set SCSI_Out__DBP_raw__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1
+.set SCSI_Out__DBP_raw__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0
+.set SCSI_Out__DBP_raw__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1
+.set SCSI_Out__DBP_raw__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT
+.set SCSI_Out__DBP_raw__PS, CYREG_PRT6_PS
+.set SCSI_Out__DBP_raw__SHIFT, 2
+.set SCSI_Out__DBP_raw__SLW, CYREG_PRT6_SLW
+.set SCSI_Out__IO_raw__AG, CYREG_PRT12_AG
+.set SCSI_Out__IO_raw__BIE, CYREG_PRT12_BIE
+.set SCSI_Out__IO_raw__BIT_MASK, CYREG_PRT12_BIT_MASK
+.set SCSI_Out__IO_raw__BYP, CYREG_PRT12_BYP
+.set SCSI_Out__IO_raw__DM0, CYREG_PRT12_DM0
+.set SCSI_Out__IO_raw__DM1, CYREG_PRT12_DM1
+.set SCSI_Out__IO_raw__DM2, CYREG_PRT12_DM2
+.set SCSI_Out__IO_raw__DR, CYREG_PRT12_DR
+.set SCSI_Out__IO_raw__INP_DIS, CYREG_PRT12_INP_DIS
+.set SCSI_Out__IO_raw__INTTYPE, CYREG_PICU12_INTTYPE3
+.set SCSI_Out__IO_raw__MASK, 0x08
+.set SCSI_Out__IO_raw__PC, CYREG_PRT12_PC3
+.set SCSI_Out__IO_raw__PORT, 12
+.set SCSI_Out__IO_raw__PRT, CYREG_PRT12_PRT
+.set SCSI_Out__IO_raw__PRTDSI__DBL_SYNC_IN, CYREG_PRT12_DBL_SYNC_IN
+.set SCSI_Out__IO_raw__PRTDSI__OE_SEL0, CYREG_PRT12_OE_SEL0
+.set SCSI_Out__IO_raw__PRTDSI__OE_SEL1, CYREG_PRT12_OE_SEL1
+.set SCSI_Out__IO_raw__PRTDSI__OUT_SEL0, CYREG_PRT12_OUT_SEL0
+.set SCSI_Out__IO_raw__PRTDSI__OUT_SEL1, CYREG_PRT12_OUT_SEL1
+.set SCSI_Out__IO_raw__PRTDSI__SYNC_OUT, CYREG_PRT12_SYNC_OUT
+.set SCSI_Out__IO_raw__PS, CYREG_PRT12_PS
+.set SCSI_Out__IO_raw__SHIFT, 3
+.set SCSI_Out__IO_raw__SIO_CFG, CYREG_PRT12_SIO_CFG
+.set SCSI_Out__IO_raw__SIO_DIFF, CYREG_PRT12_SIO_DIFF
+.set SCSI_Out__IO_raw__SIO_HYST_EN, CYREG_PRT12_SIO_HYST_EN
+.set SCSI_Out__IO_raw__SIO_REG_HIFREQ, CYREG_PRT12_SIO_REG_HIFREQ
+.set SCSI_Out__IO_raw__SLW, CYREG_PRT12_SLW
+.set SCSI_Out__MSG_raw__AG, CYREG_PRT0_AG
+.set SCSI_Out__MSG_raw__AMUX, CYREG_PRT0_AMUX
+.set SCSI_Out__MSG_raw__BIE, CYREG_PRT0_BIE
+.set SCSI_Out__MSG_raw__BIT_MASK, CYREG_PRT0_BIT_MASK
+.set SCSI_Out__MSG_raw__BYP, CYREG_PRT0_BYP
+.set SCSI_Out__MSG_raw__CTL, CYREG_PRT0_CTL
+.set SCSI_Out__MSG_raw__DM0, CYREG_PRT0_DM0
+.set SCSI_Out__MSG_raw__DM1, CYREG_PRT0_DM1
+.set SCSI_Out__MSG_raw__DM2, CYREG_PRT0_DM2
+.set SCSI_Out__MSG_raw__DR, CYREG_PRT0_DR
+.set SCSI_Out__MSG_raw__INP_DIS, CYREG_PRT0_INP_DIS
+.set SCSI_Out__MSG_raw__INTTYPE, CYREG_PICU0_INTTYPE5
+.set SCSI_Out__MSG_raw__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG
+.set SCSI_Out__MSG_raw__LCD_EN, CYREG_PRT0_LCD_EN
+.set SCSI_Out__MSG_raw__MASK, 0x20
+.set SCSI_Out__MSG_raw__PC, CYREG_PRT0_PC5
+.set SCSI_Out__MSG_raw__PORT, 0
+.set SCSI_Out__MSG_raw__PRT, CYREG_PRT0_PRT
+.set SCSI_Out__MSG_raw__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL
+.set SCSI_Out__MSG_raw__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN
+.set SCSI_Out__MSG_raw__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0
+.set SCSI_Out__MSG_raw__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1
+.set SCSI_Out__MSG_raw__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0
+.set SCSI_Out__MSG_raw__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1
+.set SCSI_Out__MSG_raw__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT
+.set SCSI_Out__MSG_raw__PS, CYREG_PRT0_PS
+.set SCSI_Out__MSG_raw__SHIFT, 5
+.set SCSI_Out__MSG_raw__SLW, CYREG_PRT0_SLW
+.set SCSI_Out__REQ__AG, CYREG_PRT4_AG
+.set SCSI_Out__REQ__AMUX, CYREG_PRT4_AMUX
+.set SCSI_Out__REQ__BIE, CYREG_PRT4_BIE
+.set SCSI_Out__REQ__BIT_MASK, CYREG_PRT4_BIT_MASK
+.set SCSI_Out__REQ__BYP, CYREG_PRT4_BYP
+.set SCSI_Out__REQ__CTL, CYREG_PRT4_CTL
+.set SCSI_Out__REQ__DM0, CYREG_PRT4_DM0
+.set SCSI_Out__REQ__DM1, CYREG_PRT4_DM1
+.set SCSI_Out__REQ__DM2, CYREG_PRT4_DM2
+.set SCSI_Out__REQ__DR, CYREG_PRT4_DR
+.set SCSI_Out__REQ__INP_DIS, CYREG_PRT4_INP_DIS
+.set SCSI_Out__REQ__INTTYPE, CYREG_PICU4_INTTYPE1
+.set SCSI_Out__REQ__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG
+.set SCSI_Out__REQ__LCD_EN, CYREG_PRT4_LCD_EN
+.set SCSI_Out__REQ__MASK, 0x02
+.set SCSI_Out__REQ__PC, CYREG_PRT4_PC1
+.set SCSI_Out__REQ__PORT, 4
+.set SCSI_Out__REQ__PRT, CYREG_PRT4_PRT
+.set SCSI_Out__REQ__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL
+.set SCSI_Out__REQ__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN
+.set SCSI_Out__REQ__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0
+.set SCSI_Out__REQ__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1
+.set SCSI_Out__REQ__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0
+.set SCSI_Out__REQ__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1
+.set SCSI_Out__REQ__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT
+.set SCSI_Out__REQ__PS, CYREG_PRT4_PS
+.set SCSI_Out__REQ__SHIFT, 1
+.set SCSI_Out__REQ__SLW, CYREG_PRT4_SLW
+.set SCSI_Out__RST__AG, CYREG_PRT0_AG
+.set SCSI_Out__RST__AMUX, CYREG_PRT0_AMUX
+.set SCSI_Out__RST__BIE, CYREG_PRT0_BIE
+.set SCSI_Out__RST__BIT_MASK, CYREG_PRT0_BIT_MASK
+.set SCSI_Out__RST__BYP, CYREG_PRT0_BYP
+.set SCSI_Out__RST__CTL, CYREG_PRT0_CTL
+.set SCSI_Out__RST__DM0, CYREG_PRT0_DM0
+.set SCSI_Out__RST__DM1, CYREG_PRT0_DM1
+.set SCSI_Out__RST__DM2, CYREG_PRT0_DM2
+.set SCSI_Out__RST__DR, CYREG_PRT0_DR
+.set SCSI_Out__RST__INP_DIS, CYREG_PRT0_INP_DIS
+.set SCSI_Out__RST__INTTYPE, CYREG_PICU0_INTTYPE7
+.set SCSI_Out__RST__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG
+.set SCSI_Out__RST__LCD_EN, CYREG_PRT0_LCD_EN
+.set SCSI_Out__RST__MASK, 0x80
+.set SCSI_Out__RST__PC, CYREG_PRT0_PC7
+.set SCSI_Out__RST__PORT, 0
+.set SCSI_Out__RST__PRT, CYREG_PRT0_PRT
+.set SCSI_Out__RST__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL
+.set SCSI_Out__RST__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN
+.set SCSI_Out__RST__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0
+.set SCSI_Out__RST__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1
+.set SCSI_Out__RST__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0
+.set SCSI_Out__RST__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1
+.set SCSI_Out__RST__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT
+.set SCSI_Out__RST__PS, CYREG_PRT0_PS
+.set SCSI_Out__RST__SHIFT, 7
+.set SCSI_Out__RST__SLW, CYREG_PRT0_SLW
+.set SCSI_Out__SEL__AG, CYREG_PRT0_AG
+.set SCSI_Out__SEL__AMUX, CYREG_PRT0_AMUX
+.set SCSI_Out__SEL__BIE, CYREG_PRT0_BIE
+.set SCSI_Out__SEL__BIT_MASK, CYREG_PRT0_BIT_MASK
+.set SCSI_Out__SEL__BYP, CYREG_PRT0_BYP
+.set SCSI_Out__SEL__CTL, CYREG_PRT0_CTL
+.set SCSI_Out__SEL__DM0, CYREG_PRT0_DM0
+.set SCSI_Out__SEL__DM1, CYREG_PRT0_DM1
+.set SCSI_Out__SEL__DM2, CYREG_PRT0_DM2
+.set SCSI_Out__SEL__DR, CYREG_PRT0_DR
+.set SCSI_Out__SEL__INP_DIS, CYREG_PRT0_INP_DIS
+.set SCSI_Out__SEL__INTTYPE, CYREG_PICU0_INTTYPE3
+.set SCSI_Out__SEL__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG
+.set SCSI_Out__SEL__LCD_EN, CYREG_PRT0_LCD_EN
+.set SCSI_Out__SEL__MASK, 0x08
+.set SCSI_Out__SEL__PC, CYREG_PRT0_PC3
+.set SCSI_Out__SEL__PORT, 0
+.set SCSI_Out__SEL__PRT, CYREG_PRT0_PRT
+.set SCSI_Out__SEL__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL
+.set SCSI_Out__SEL__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN
+.set SCSI_Out__SEL__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0
+.set SCSI_Out__SEL__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1
+.set SCSI_Out__SEL__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0
+.set SCSI_Out__SEL__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1
+.set SCSI_Out__SEL__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT
+.set SCSI_Out__SEL__PS, CYREG_PRT0_PS
+.set SCSI_Out__SEL__SHIFT, 3
+.set SCSI_Out__SEL__SLW, CYREG_PRT0_SLW
+.set SCSI_Out_Bits_Sync_ctrl_reg__0__MASK, 0x01
+.set SCSI_Out_Bits_Sync_ctrl_reg__0__POS, 0
+.set SCSI_Out_Bits_Sync_ctrl_reg__1__MASK, 0x02
+.set SCSI_Out_Bits_Sync_ctrl_reg__1__POS, 1
+.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG, CYREG_B0_UDB07_08_ACTL
+.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG, CYREG_B0_UDB07_08_CTL
+.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG, CYREG_B0_UDB07_08_CTL
+.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG, CYREG_B0_UDB07_08_CTL
+.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG, CYREG_B0_UDB07_08_CTL
+.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_MASK_REG, CYREG_B0_UDB07_08_MSK
+.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG, CYREG_B0_UDB07_08_MSK
+.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG, CYREG_B0_UDB07_08_MSK
+.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG, CYREG_B0_UDB07_08_MSK
+.set SCSI_Out_Bits_Sync_ctrl_reg__2__MASK, 0x04
+.set SCSI_Out_Bits_Sync_ctrl_reg__2__POS, 2
+.set SCSI_Out_Bits_Sync_ctrl_reg__3__MASK, 0x08
+.set SCSI_Out_Bits_Sync_ctrl_reg__3__POS, 3
+.set SCSI_Out_Bits_Sync_ctrl_reg__4__MASK, 0x10
+.set SCSI_Out_Bits_Sync_ctrl_reg__4__POS, 4
+.set SCSI_Out_Bits_Sync_ctrl_reg__5__MASK, 0x20
+.set SCSI_Out_Bits_Sync_ctrl_reg__5__POS, 5
+.set SCSI_Out_Bits_Sync_ctrl_reg__6__MASK, 0x40
+.set SCSI_Out_Bits_Sync_ctrl_reg__6__POS, 6
+.set SCSI_Out_Bits_Sync_ctrl_reg__7__MASK, 0x80
+.set SCSI_Out_Bits_Sync_ctrl_reg__7__POS, 7
+.set SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_AUX_CTL_REG, CYREG_B0_UDB07_ACTL
+.set SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_REG, CYREG_B0_UDB07_CTL
+.set SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_ST_REG, CYREG_B0_UDB07_ST_CTL
+.set SCSI_Out_Bits_Sync_ctrl_reg__COUNT_REG, CYREG_B0_UDB07_CTL
+.set SCSI_Out_Bits_Sync_ctrl_reg__COUNT_ST_REG, CYREG_B0_UDB07_ST_CTL
+.set SCSI_Out_Bits_Sync_ctrl_reg__MASK, 0xFF
+.set SCSI_Out_Bits_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG, CYREG_B0_UDB07_MSK_ACTL
+.set SCSI_Out_Bits_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG, CYREG_B0_UDB07_MSK_ACTL
+.set SCSI_Out_Bits_Sync_ctrl_reg__PERIOD_REG, CYREG_B0_UDB07_MSK
+.set SCSI_Out_Ctl_Sync_ctrl_reg__0__MASK, 0x01
+.set SCSI_Out_Ctl_Sync_ctrl_reg__0__POS, 0
+.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG, CYREG_B0_UDB11_12_ACTL
+.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG, CYREG_B0_UDB11_12_CTL
+.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG, CYREG_B0_UDB11_12_CTL
+.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG, CYREG_B0_UDB11_12_CTL
+.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG, CYREG_B0_UDB11_12_CTL
+.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG, CYREG_B0_UDB11_12_MSK
+.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG, CYREG_B0_UDB11_12_MSK
+.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG, CYREG_B0_UDB11_12_MSK
+.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG, CYREG_B0_UDB11_12_MSK
+.set SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG, CYREG_B0_UDB11_ACTL
+.set SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_REG, CYREG_B0_UDB11_CTL
+.set SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_ST_REG, CYREG_B0_UDB11_ST_CTL
+.set SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_REG, CYREG_B0_UDB11_CTL
+.set SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_ST_REG, CYREG_B0_UDB11_ST_CTL
+.set SCSI_Out_Ctl_Sync_ctrl_reg__MASK, 0x01
+.set SCSI_Out_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG, CYREG_B0_UDB11_MSK_ACTL
+.set SCSI_Out_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG, CYREG_B0_UDB11_MSK_ACTL
+.set SCSI_Out_Ctl_Sync_ctrl_reg__PERIOD_REG, CYREG_B0_UDB11_MSK
+.set SCSI_Out_DBx__0__AG, CYREG_PRT6_AG
+.set SCSI_Out_DBx__0__AMUX, CYREG_PRT6_AMUX
+.set SCSI_Out_DBx__0__BIE, CYREG_PRT6_BIE
+.set SCSI_Out_DBx__0__BIT_MASK, CYREG_PRT6_BIT_MASK
+.set SCSI_Out_DBx__0__BYP, CYREG_PRT6_BYP
+.set SCSI_Out_DBx__0__CTL, CYREG_PRT6_CTL
+.set SCSI_Out_DBx__0__DM0, CYREG_PRT6_DM0
+.set SCSI_Out_DBx__0__DM1, CYREG_PRT6_DM1
+.set SCSI_Out_DBx__0__DM2, CYREG_PRT6_DM2
+.set SCSI_Out_DBx__0__DR, CYREG_PRT6_DR
+.set SCSI_Out_DBx__0__INP_DIS, CYREG_PRT6_INP_DIS
+.set SCSI_Out_DBx__0__INTTYPE, CYREG_PICU6_INTTYPE7
+.set SCSI_Out_DBx__0__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG
+.set SCSI_Out_DBx__0__LCD_EN, CYREG_PRT6_LCD_EN
+.set SCSI_Out_DBx__0__MASK, 0x80
+.set SCSI_Out_DBx__0__PC, CYREG_PRT6_PC7
+.set SCSI_Out_DBx__0__PORT, 6
+.set SCSI_Out_DBx__0__PRT, CYREG_PRT6_PRT
+.set SCSI_Out_DBx__0__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL
+.set SCSI_Out_DBx__0__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN
+.set SCSI_Out_DBx__0__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0
+.set SCSI_Out_DBx__0__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1
+.set SCSI_Out_DBx__0__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0
+.set SCSI_Out_DBx__0__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1
+.set SCSI_Out_DBx__0__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT
+.set SCSI_Out_DBx__0__PS, CYREG_PRT6_PS
+.set SCSI_Out_DBx__0__SHIFT, 7
+.set SCSI_Out_DBx__0__SLW, CYREG_PRT6_SLW
+.set SCSI_Out_DBx__1__AG, CYREG_PRT6_AG
+.set SCSI_Out_DBx__1__AMUX, CYREG_PRT6_AMUX
+.set SCSI_Out_DBx__1__BIE, CYREG_PRT6_BIE
+.set SCSI_Out_DBx__1__BIT_MASK, CYREG_PRT6_BIT_MASK
+.set SCSI_Out_DBx__1__BYP, CYREG_PRT6_BYP
+.set SCSI_Out_DBx__1__CTL, CYREG_PRT6_CTL
+.set SCSI_Out_DBx__1__DM0, CYREG_PRT6_DM0
+.set SCSI_Out_DBx__1__DM1, CYREG_PRT6_DM1
+.set SCSI_Out_DBx__1__DM2, CYREG_PRT6_DM2
+.set SCSI_Out_DBx__1__DR, CYREG_PRT6_DR
+.set SCSI_Out_DBx__1__INP_DIS, CYREG_PRT6_INP_DIS
+.set SCSI_Out_DBx__1__INTTYPE, CYREG_PICU6_INTTYPE5
+.set SCSI_Out_DBx__1__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG
+.set SCSI_Out_DBx__1__LCD_EN, CYREG_PRT6_LCD_EN
+.set SCSI_Out_DBx__1__MASK, 0x20
+.set SCSI_Out_DBx__1__PC, CYREG_PRT6_PC5
+.set SCSI_Out_DBx__1__PORT, 6
+.set SCSI_Out_DBx__1__PRT, CYREG_PRT6_PRT
+.set SCSI_Out_DBx__1__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL
+.set SCSI_Out_DBx__1__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN
+.set SCSI_Out_DBx__1__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0
+.set SCSI_Out_DBx__1__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1
+.set SCSI_Out_DBx__1__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0
+.set SCSI_Out_DBx__1__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1
+.set SCSI_Out_DBx__1__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT
+.set SCSI_Out_DBx__1__PS, CYREG_PRT6_PS
+.set SCSI_Out_DBx__1__SHIFT, 5
+.set SCSI_Out_DBx__1__SLW, CYREG_PRT6_SLW
+.set SCSI_Out_DBx__2__AG, CYREG_PRT12_AG
+.set SCSI_Out_DBx__2__BIE, CYREG_PRT12_BIE
+.set SCSI_Out_DBx__2__BIT_MASK, CYREG_PRT12_BIT_MASK
+.set SCSI_Out_DBx__2__BYP, CYREG_PRT12_BYP
+.set SCSI_Out_DBx__2__DM0, CYREG_PRT12_DM0
+.set SCSI_Out_DBx__2__DM1, CYREG_PRT12_DM1
+.set SCSI_Out_DBx__2__DM2, CYREG_PRT12_DM2
+.set SCSI_Out_DBx__2__DR, CYREG_PRT12_DR
+.set SCSI_Out_DBx__2__INP_DIS, CYREG_PRT12_INP_DIS
+.set SCSI_Out_DBx__2__INTTYPE, CYREG_PICU12_INTTYPE5
+.set SCSI_Out_DBx__2__MASK, 0x20
+.set SCSI_Out_DBx__2__PC, CYREG_PRT12_PC5
+.set SCSI_Out_DBx__2__PORT, 12
+.set SCSI_Out_DBx__2__PRT, CYREG_PRT12_PRT
+.set SCSI_Out_DBx__2__PRTDSI__DBL_SYNC_IN, CYREG_PRT12_DBL_SYNC_IN
+.set SCSI_Out_DBx__2__PRTDSI__OE_SEL0, CYREG_PRT12_OE_SEL0
+.set SCSI_Out_DBx__2__PRTDSI__OE_SEL1, CYREG_PRT12_OE_SEL1
+.set SCSI_Out_DBx__2__PRTDSI__OUT_SEL0, CYREG_PRT12_OUT_SEL0
+.set SCSI_Out_DBx__2__PRTDSI__OUT_SEL1, CYREG_PRT12_OUT_SEL1
+.set SCSI_Out_DBx__2__PRTDSI__SYNC_OUT, CYREG_PRT12_SYNC_OUT
+.set SCSI_Out_DBx__2__PS, CYREG_PRT12_PS
+.set SCSI_Out_DBx__2__SHIFT, 5
+.set SCSI_Out_DBx__2__SIO_CFG, CYREG_PRT12_SIO_CFG
+.set SCSI_Out_DBx__2__SIO_DIFF, CYREG_PRT12_SIO_DIFF
+.set SCSI_Out_DBx__2__SIO_HYST_EN, CYREG_PRT12_SIO_HYST_EN
+.set SCSI_Out_DBx__2__SIO_REG_HIFREQ, CYREG_PRT12_SIO_REG_HIFREQ
+.set SCSI_Out_DBx__2__SLW, CYREG_PRT12_SLW
+.set SCSI_Out_DBx__3__AG, CYREG_PRT2_AG
+.set SCSI_Out_DBx__3__AMUX, CYREG_PRT2_AMUX
+.set SCSI_Out_DBx__3__BIE, CYREG_PRT2_BIE
+.set SCSI_Out_DBx__3__BIT_MASK, CYREG_PRT2_BIT_MASK
+.set SCSI_Out_DBx__3__BYP, CYREG_PRT2_BYP
+.set SCSI_Out_DBx__3__CTL, CYREG_PRT2_CTL
+.set SCSI_Out_DBx__3__DM0, CYREG_PRT2_DM0
+.set SCSI_Out_DBx__3__DM1, CYREG_PRT2_DM1
+.set SCSI_Out_DBx__3__DM2, CYREG_PRT2_DM2
+.set SCSI_Out_DBx__3__DR, CYREG_PRT2_DR
+.set SCSI_Out_DBx__3__INP_DIS, CYREG_PRT2_INP_DIS
+.set SCSI_Out_DBx__3__INTTYPE, CYREG_PICU2_INTTYPE7
+.set SCSI_Out_DBx__3__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG
+.set SCSI_Out_DBx__3__LCD_EN, CYREG_PRT2_LCD_EN
+.set SCSI_Out_DBx__3__MASK, 0x80
+.set SCSI_Out_DBx__3__PC, CYREG_PRT2_PC7
+.set SCSI_Out_DBx__3__PORT, 2
+.set SCSI_Out_DBx__3__PRT, CYREG_PRT2_PRT
+.set SCSI_Out_DBx__3__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL
+.set SCSI_Out_DBx__3__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN
+.set SCSI_Out_DBx__3__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0
+.set SCSI_Out_DBx__3__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1
+.set SCSI_Out_DBx__3__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0
+.set SCSI_Out_DBx__3__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1
+.set SCSI_Out_DBx__3__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT
+.set SCSI_Out_DBx__3__PS, CYREG_PRT2_PS
+.set SCSI_Out_DBx__3__SHIFT, 7
+.set SCSI_Out_DBx__3__SLW, CYREG_PRT2_SLW
+.set SCSI_Out_DBx__4__AG, CYREG_PRT2_AG
+.set SCSI_Out_DBx__4__AMUX, CYREG_PRT2_AMUX
+.set SCSI_Out_DBx__4__BIE, CYREG_PRT2_BIE
+.set SCSI_Out_DBx__4__BIT_MASK, CYREG_PRT2_BIT_MASK
+.set SCSI_Out_DBx__4__BYP, CYREG_PRT2_BYP
+.set SCSI_Out_DBx__4__CTL, CYREG_PRT2_CTL
+.set SCSI_Out_DBx__4__DM0, CYREG_PRT2_DM0
+.set SCSI_Out_DBx__4__DM1, CYREG_PRT2_DM1
+.set SCSI_Out_DBx__4__DM2, CYREG_PRT2_DM2
+.set SCSI_Out_DBx__4__DR, CYREG_PRT2_DR
+.set SCSI_Out_DBx__4__INP_DIS, CYREG_PRT2_INP_DIS
+.set SCSI_Out_DBx__4__INTTYPE, CYREG_PICU2_INTTYPE5
+.set SCSI_Out_DBx__4__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG
+.set SCSI_Out_DBx__4__LCD_EN, CYREG_PRT2_LCD_EN
+.set SCSI_Out_DBx__4__MASK, 0x20
+.set SCSI_Out_DBx__4__PC, CYREG_PRT2_PC5
+.set SCSI_Out_DBx__4__PORT, 2
+.set SCSI_Out_DBx__4__PRT, CYREG_PRT2_PRT
+.set SCSI_Out_DBx__4__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL
+.set SCSI_Out_DBx__4__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN
+.set SCSI_Out_DBx__4__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0
+.set SCSI_Out_DBx__4__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1
+.set SCSI_Out_DBx__4__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0
+.set SCSI_Out_DBx__4__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1
+.set SCSI_Out_DBx__4__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT
+.set SCSI_Out_DBx__4__PS, CYREG_PRT2_PS
+.set SCSI_Out_DBx__4__SHIFT, 5
+.set SCSI_Out_DBx__4__SLW, CYREG_PRT2_SLW
+.set SCSI_Out_DBx__5__AG, CYREG_PRT2_AG
+.set SCSI_Out_DBx__5__AMUX, CYREG_PRT2_AMUX
+.set SCSI_Out_DBx__5__BIE, CYREG_PRT2_BIE
+.set SCSI_Out_DBx__5__BIT_MASK, CYREG_PRT2_BIT_MASK
+.set SCSI_Out_DBx__5__BYP, CYREG_PRT2_BYP
+.set SCSI_Out_DBx__5__CTL, CYREG_PRT2_CTL
+.set SCSI_Out_DBx__5__DM0, CYREG_PRT2_DM0
+.set SCSI_Out_DBx__5__DM1, CYREG_PRT2_DM1
+.set SCSI_Out_DBx__5__DM2, CYREG_PRT2_DM2
+.set SCSI_Out_DBx__5__DR, CYREG_PRT2_DR
+.set SCSI_Out_DBx__5__INP_DIS, CYREG_PRT2_INP_DIS
+.set SCSI_Out_DBx__5__INTTYPE, CYREG_PICU2_INTTYPE3
+.set SCSI_Out_DBx__5__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG
+.set SCSI_Out_DBx__5__LCD_EN, CYREG_PRT2_LCD_EN
+.set SCSI_Out_DBx__5__MASK, 0x08
+.set SCSI_Out_DBx__5__PC, CYREG_PRT2_PC3
+.set SCSI_Out_DBx__5__PORT, 2
+.set SCSI_Out_DBx__5__PRT, CYREG_PRT2_PRT
+.set SCSI_Out_DBx__5__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL
+.set SCSI_Out_DBx__5__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN
+.set SCSI_Out_DBx__5__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0
+.set SCSI_Out_DBx__5__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1
+.set SCSI_Out_DBx__5__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0
+.set SCSI_Out_DBx__5__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1
+.set SCSI_Out_DBx__5__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT
+.set SCSI_Out_DBx__5__PS, CYREG_PRT2_PS
+.set SCSI_Out_DBx__5__SHIFT, 3
+.set SCSI_Out_DBx__5__SLW, CYREG_PRT2_SLW
+.set SCSI_Out_DBx__6__AG, CYREG_PRT2_AG
+.set SCSI_Out_DBx__6__AMUX, CYREG_PRT2_AMUX
+.set SCSI_Out_DBx__6__BIE, CYREG_PRT2_BIE
+.set SCSI_Out_DBx__6__BIT_MASK, CYREG_PRT2_BIT_MASK
+.set SCSI_Out_DBx__6__BYP, CYREG_PRT2_BYP
+.set SCSI_Out_DBx__6__CTL, CYREG_PRT2_CTL
+.set SCSI_Out_DBx__6__DM0, CYREG_PRT2_DM0
+.set SCSI_Out_DBx__6__DM1, CYREG_PRT2_DM1
+.set SCSI_Out_DBx__6__DM2, CYREG_PRT2_DM2
+.set SCSI_Out_DBx__6__DR, CYREG_PRT2_DR
+.set SCSI_Out_DBx__6__INP_DIS, CYREG_PRT2_INP_DIS
+.set SCSI_Out_DBx__6__INTTYPE, CYREG_PICU2_INTTYPE1
+.set SCSI_Out_DBx__6__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG
+.set SCSI_Out_DBx__6__LCD_EN, CYREG_PRT2_LCD_EN
+.set SCSI_Out_DBx__6__MASK, 0x02
+.set SCSI_Out_DBx__6__PC, CYREG_PRT2_PC1
+.set SCSI_Out_DBx__6__PORT, 2
+.set SCSI_Out_DBx__6__PRT, CYREG_PRT2_PRT
+.set SCSI_Out_DBx__6__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL
+.set SCSI_Out_DBx__6__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN
+.set SCSI_Out_DBx__6__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0
+.set SCSI_Out_DBx__6__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1
+.set SCSI_Out_DBx__6__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0
+.set SCSI_Out_DBx__6__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1
+.set SCSI_Out_DBx__6__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT
+.set SCSI_Out_DBx__6__PS, CYREG_PRT2_PS
+.set SCSI_Out_DBx__6__SHIFT, 1
+.set SCSI_Out_DBx__6__SLW, CYREG_PRT2_SLW
+.set SCSI_Out_DBx__7__AG, CYREG_PRT15_AG
+.set SCSI_Out_DBx__7__AMUX, CYREG_PRT15_AMUX
+.set SCSI_Out_DBx__7__BIE, CYREG_PRT15_BIE
+.set SCSI_Out_DBx__7__BIT_MASK, CYREG_PRT15_BIT_MASK
+.set SCSI_Out_DBx__7__BYP, CYREG_PRT15_BYP
+.set SCSI_Out_DBx__7__CTL, CYREG_PRT15_CTL
+.set SCSI_Out_DBx__7__DM0, CYREG_PRT15_DM0
+.set SCSI_Out_DBx__7__DM1, CYREG_PRT15_DM1
+.set SCSI_Out_DBx__7__DM2, CYREG_PRT15_DM2
+.set SCSI_Out_DBx__7__DR, CYREG_PRT15_DR
+.set SCSI_Out_DBx__7__INP_DIS, CYREG_PRT15_INP_DIS
+.set SCSI_Out_DBx__7__INTTYPE, CYREG_PICU15_INTTYPE5
+.set SCSI_Out_DBx__7__LCD_COM_SEG, CYREG_PRT15_LCD_COM_SEG
+.set SCSI_Out_DBx__7__LCD_EN, CYREG_PRT15_LCD_EN
+.set SCSI_Out_DBx__7__MASK, 0x20
+.set SCSI_Out_DBx__7__PC, CYREG_IO_PC_PRT15_PC5
+.set SCSI_Out_DBx__7__PORT, 15
+.set SCSI_Out_DBx__7__PRT, CYREG_PRT15_PRT
+.set SCSI_Out_DBx__7__PRTDSI__CAPS_SEL, CYREG_PRT15_CAPS_SEL
+.set SCSI_Out_DBx__7__PRTDSI__DBL_SYNC_IN, CYREG_PRT15_DBL_SYNC_IN
+.set SCSI_Out_DBx__7__PRTDSI__OE_SEL0, CYREG_PRT15_OE_SEL0
+.set SCSI_Out_DBx__7__PRTDSI__OE_SEL1, CYREG_PRT15_OE_SEL1
+.set SCSI_Out_DBx__7__PRTDSI__OUT_SEL0, CYREG_PRT15_OUT_SEL0
+.set SCSI_Out_DBx__7__PRTDSI__OUT_SEL1, CYREG_PRT15_OUT_SEL1
+.set SCSI_Out_DBx__7__PRTDSI__SYNC_OUT, CYREG_PRT15_SYNC_OUT
+.set SCSI_Out_DBx__7__PS, CYREG_PRT15_PS
+.set SCSI_Out_DBx__7__SHIFT, 5
+.set SCSI_Out_DBx__7__SLW, CYREG_PRT15_SLW
+.set SCSI_Out_DBx__DB0__AG, CYREG_PRT6_AG
+.set SCSI_Out_DBx__DB0__AMUX, CYREG_PRT6_AMUX
+.set SCSI_Out_DBx__DB0__BIE, CYREG_PRT6_BIE
+.set SCSI_Out_DBx__DB0__BIT_MASK, CYREG_PRT6_BIT_MASK
+.set SCSI_Out_DBx__DB0__BYP, CYREG_PRT6_BYP
+.set SCSI_Out_DBx__DB0__CTL, CYREG_PRT6_CTL
+.set SCSI_Out_DBx__DB0__DM0, CYREG_PRT6_DM0
+.set SCSI_Out_DBx__DB0__DM1, CYREG_PRT6_DM1
+.set SCSI_Out_DBx__DB0__DM2, CYREG_PRT6_DM2
+.set SCSI_Out_DBx__DB0__DR, CYREG_PRT6_DR
+.set SCSI_Out_DBx__DB0__INP_DIS, CYREG_PRT6_INP_DIS
+.set SCSI_Out_DBx__DB0__INTTYPE, CYREG_PICU6_INTTYPE7
+.set SCSI_Out_DBx__DB0__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG
+.set SCSI_Out_DBx__DB0__LCD_EN, CYREG_PRT6_LCD_EN
+.set SCSI_Out_DBx__DB0__MASK, 0x80
+.set SCSI_Out_DBx__DB0__PC, CYREG_PRT6_PC7
+.set SCSI_Out_DBx__DB0__PORT, 6
+.set SCSI_Out_DBx__DB0__PRT, CYREG_PRT6_PRT
+.set SCSI_Out_DBx__DB0__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL
+.set SCSI_Out_DBx__DB0__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN
+.set SCSI_Out_DBx__DB0__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0
+.set SCSI_Out_DBx__DB0__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1
+.set SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0
+.set SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1
+.set SCSI_Out_DBx__DB0__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT
+.set SCSI_Out_DBx__DB0__PS, CYREG_PRT6_PS
+.set SCSI_Out_DBx__DB0__SHIFT, 7
+.set SCSI_Out_DBx__DB0__SLW, CYREG_PRT6_SLW
+.set SCSI_Out_DBx__DB1__AG, CYREG_PRT6_AG
+.set SCSI_Out_DBx__DB1__AMUX, CYREG_PRT6_AMUX
+.set SCSI_Out_DBx__DB1__BIE, CYREG_PRT6_BIE
+.set SCSI_Out_DBx__DB1__BIT_MASK, CYREG_PRT6_BIT_MASK
+.set SCSI_Out_DBx__DB1__BYP, CYREG_PRT6_BYP
+.set SCSI_Out_DBx__DB1__CTL, CYREG_PRT6_CTL
+.set SCSI_Out_DBx__DB1__DM0, CYREG_PRT6_DM0
+.set SCSI_Out_DBx__DB1__DM1, CYREG_PRT6_DM1
+.set SCSI_Out_DBx__DB1__DM2, CYREG_PRT6_DM2
+.set SCSI_Out_DBx__DB1__DR, CYREG_PRT6_DR
+.set SCSI_Out_DBx__DB1__INP_DIS, CYREG_PRT6_INP_DIS
+.set SCSI_Out_DBx__DB1__INTTYPE, CYREG_PICU6_INTTYPE5
+.set SCSI_Out_DBx__DB1__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG
+.set SCSI_Out_DBx__DB1__LCD_EN, CYREG_PRT6_LCD_EN
+.set SCSI_Out_DBx__DB1__MASK, 0x20
+.set SCSI_Out_DBx__DB1__PC, CYREG_PRT6_PC5
+.set SCSI_Out_DBx__DB1__PORT, 6
+.set SCSI_Out_DBx__DB1__PRT, CYREG_PRT6_PRT
+.set SCSI_Out_DBx__DB1__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL
+.set SCSI_Out_DBx__DB1__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN
+.set SCSI_Out_DBx__DB1__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0
+.set SCSI_Out_DBx__DB1__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1
+.set SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0
+.set SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1
+.set SCSI_Out_DBx__DB1__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT
+.set SCSI_Out_DBx__DB1__PS, CYREG_PRT6_PS
+.set SCSI_Out_DBx__DB1__SHIFT, 5
+.set SCSI_Out_DBx__DB1__SLW, CYREG_PRT6_SLW
+.set SCSI_Out_DBx__DB2__AG, CYREG_PRT12_AG
+.set SCSI_Out_DBx__DB2__BIE, CYREG_PRT12_BIE
+.set SCSI_Out_DBx__DB2__BIT_MASK, CYREG_PRT12_BIT_MASK
+.set SCSI_Out_DBx__DB2__BYP, CYREG_PRT12_BYP
+.set SCSI_Out_DBx__DB2__DM0, CYREG_PRT12_DM0
+.set SCSI_Out_DBx__DB2__DM1, CYREG_PRT12_DM1
+.set SCSI_Out_DBx__DB2__DM2, CYREG_PRT12_DM2
+.set SCSI_Out_DBx__DB2__DR, CYREG_PRT12_DR
+.set SCSI_Out_DBx__DB2__INP_DIS, CYREG_PRT12_INP_DIS
+.set SCSI_Out_DBx__DB2__INTTYPE, CYREG_PICU12_INTTYPE5
+.set SCSI_Out_DBx__DB2__MASK, 0x20
+.set SCSI_Out_DBx__DB2__PC, CYREG_PRT12_PC5
+.set SCSI_Out_DBx__DB2__PORT, 12
+.set SCSI_Out_DBx__DB2__PRT, CYREG_PRT12_PRT
+.set SCSI_Out_DBx__DB2__PRTDSI__DBL_SYNC_IN, CYREG_PRT12_DBL_SYNC_IN
+.set SCSI_Out_DBx__DB2__PRTDSI__OE_SEL0, CYREG_PRT12_OE_SEL0
+.set SCSI_Out_DBx__DB2__PRTDSI__OE_SEL1, CYREG_PRT12_OE_SEL1
+.set SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL0, CYREG_PRT12_OUT_SEL0
+.set SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL1, CYREG_PRT12_OUT_SEL1
+.set SCSI_Out_DBx__DB2__PRTDSI__SYNC_OUT, CYREG_PRT12_SYNC_OUT
+.set SCSI_Out_DBx__DB2__PS, CYREG_PRT12_PS
+.set SCSI_Out_DBx__DB2__SHIFT, 5
+.set SCSI_Out_DBx__DB2__SIO_CFG, CYREG_PRT12_SIO_CFG
+.set SCSI_Out_DBx__DB2__SIO_DIFF, CYREG_PRT12_SIO_DIFF
+.set SCSI_Out_DBx__DB2__SIO_HYST_EN, CYREG_PRT12_SIO_HYST_EN
+.set SCSI_Out_DBx__DB2__SIO_REG_HIFREQ, CYREG_PRT12_SIO_REG_HIFREQ
+.set SCSI_Out_DBx__DB2__SLW, CYREG_PRT12_SLW
+.set SCSI_Out_DBx__DB3__AG, CYREG_PRT2_AG
+.set SCSI_Out_DBx__DB3__AMUX, CYREG_PRT2_AMUX
+.set SCSI_Out_DBx__DB3__BIE, CYREG_PRT2_BIE
+.set SCSI_Out_DBx__DB3__BIT_MASK, CYREG_PRT2_BIT_MASK
+.set SCSI_Out_DBx__DB3__BYP, CYREG_PRT2_BYP
+.set SCSI_Out_DBx__DB3__CTL, CYREG_PRT2_CTL
+.set SCSI_Out_DBx__DB3__DM0, CYREG_PRT2_DM0
+.set SCSI_Out_DBx__DB3__DM1, CYREG_PRT2_DM1
+.set SCSI_Out_DBx__DB3__DM2, CYREG_PRT2_DM2
+.set SCSI_Out_DBx__DB3__DR, CYREG_PRT2_DR
+.set SCSI_Out_DBx__DB3__INP_DIS, CYREG_PRT2_INP_DIS
+.set SCSI_Out_DBx__DB3__INTTYPE, CYREG_PICU2_INTTYPE7
+.set SCSI_Out_DBx__DB3__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG
+.set SCSI_Out_DBx__DB3__LCD_EN, CYREG_PRT2_LCD_EN
+.set SCSI_Out_DBx__DB3__MASK, 0x80
+.set SCSI_Out_DBx__DB3__PC, CYREG_PRT2_PC7
+.set SCSI_Out_DBx__DB3__PORT, 2
+.set SCSI_Out_DBx__DB3__PRT, CYREG_PRT2_PRT
+.set SCSI_Out_DBx__DB3__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL
+.set SCSI_Out_DBx__DB3__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN
+.set SCSI_Out_DBx__DB3__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0
+.set SCSI_Out_DBx__DB3__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1
+.set SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0
+.set SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1
+.set SCSI_Out_DBx__DB3__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT
+.set SCSI_Out_DBx__DB3__PS, CYREG_PRT2_PS
+.set SCSI_Out_DBx__DB3__SHIFT, 7
+.set SCSI_Out_DBx__DB3__SLW, CYREG_PRT2_SLW
+.set SCSI_Out_DBx__DB4__AG, CYREG_PRT2_AG
+.set SCSI_Out_DBx__DB4__AMUX, CYREG_PRT2_AMUX
+.set SCSI_Out_DBx__DB4__BIE, CYREG_PRT2_BIE
+.set SCSI_Out_DBx__DB4__BIT_MASK, CYREG_PRT2_BIT_MASK
+.set SCSI_Out_DBx__DB4__BYP, CYREG_PRT2_BYP
+.set SCSI_Out_DBx__DB4__CTL, CYREG_PRT2_CTL
+.set SCSI_Out_DBx__DB4__DM0, CYREG_PRT2_DM0
+.set SCSI_Out_DBx__DB4__DM1, CYREG_PRT2_DM1
+.set SCSI_Out_DBx__DB4__DM2, CYREG_PRT2_DM2
+.set SCSI_Out_DBx__DB4__DR, CYREG_PRT2_DR
+.set SCSI_Out_DBx__DB4__INP_DIS, CYREG_PRT2_INP_DIS
+.set SCSI_Out_DBx__DB4__INTTYPE, CYREG_PICU2_INTTYPE5
+.set SCSI_Out_DBx__DB4__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG
+.set SCSI_Out_DBx__DB4__LCD_EN, CYREG_PRT2_LCD_EN
+.set SCSI_Out_DBx__DB4__MASK, 0x20
+.set SCSI_Out_DBx__DB4__PC, CYREG_PRT2_PC5
+.set SCSI_Out_DBx__DB4__PORT, 2
+.set SCSI_Out_DBx__DB4__PRT, CYREG_PRT2_PRT
+.set SCSI_Out_DBx__DB4__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL
+.set SCSI_Out_DBx__DB4__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN
+.set SCSI_Out_DBx__DB4__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0
+.set SCSI_Out_DBx__DB4__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1
+.set SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0
+.set SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1
+.set SCSI_Out_DBx__DB4__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT
+.set SCSI_Out_DBx__DB4__PS, CYREG_PRT2_PS
+.set SCSI_Out_DBx__DB4__SHIFT, 5
+.set SCSI_Out_DBx__DB4__SLW, CYREG_PRT2_SLW
+.set SCSI_Out_DBx__DB5__AG, CYREG_PRT2_AG
+.set SCSI_Out_DBx__DB5__AMUX, CYREG_PRT2_AMUX
+.set SCSI_Out_DBx__DB5__BIE, CYREG_PRT2_BIE
+.set SCSI_Out_DBx__DB5__BIT_MASK, CYREG_PRT2_BIT_MASK
+.set SCSI_Out_DBx__DB5__BYP, CYREG_PRT2_BYP
+.set SCSI_Out_DBx__DB5__CTL, CYREG_PRT2_CTL
+.set SCSI_Out_DBx__DB5__DM0, CYREG_PRT2_DM0
+.set SCSI_Out_DBx__DB5__DM1, CYREG_PRT2_DM1
+.set SCSI_Out_DBx__DB5__DM2, CYREG_PRT2_DM2
+.set SCSI_Out_DBx__DB5__DR, CYREG_PRT2_DR
+.set SCSI_Out_DBx__DB5__INP_DIS, CYREG_PRT2_INP_DIS
+.set SCSI_Out_DBx__DB5__INTTYPE, CYREG_PICU2_INTTYPE3
+.set SCSI_Out_DBx__DB5__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG
+.set SCSI_Out_DBx__DB5__LCD_EN, CYREG_PRT2_LCD_EN
+.set SCSI_Out_DBx__DB5__MASK, 0x08
+.set SCSI_Out_DBx__DB5__PC, CYREG_PRT2_PC3
+.set SCSI_Out_DBx__DB5__PORT, 2
+.set SCSI_Out_DBx__DB5__PRT, CYREG_PRT2_PRT
+.set SCSI_Out_DBx__DB5__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL
+.set SCSI_Out_DBx__DB5__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN
+.set SCSI_Out_DBx__DB5__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0
+.set SCSI_Out_DBx__DB5__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1
+.set SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0
+.set SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1
+.set SCSI_Out_DBx__DB5__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT
+.set SCSI_Out_DBx__DB5__PS, CYREG_PRT2_PS
+.set SCSI_Out_DBx__DB5__SHIFT, 3
+.set SCSI_Out_DBx__DB5__SLW, CYREG_PRT2_SLW
+.set SCSI_Out_DBx__DB6__AG, CYREG_PRT2_AG
+.set SCSI_Out_DBx__DB6__AMUX, CYREG_PRT2_AMUX
+.set SCSI_Out_DBx__DB6__BIE, CYREG_PRT2_BIE
+.set SCSI_Out_DBx__DB6__BIT_MASK, CYREG_PRT2_BIT_MASK
+.set SCSI_Out_DBx__DB6__BYP, CYREG_PRT2_BYP
+.set SCSI_Out_DBx__DB6__CTL, CYREG_PRT2_CTL
+.set SCSI_Out_DBx__DB6__DM0, CYREG_PRT2_DM0
+.set SCSI_Out_DBx__DB6__DM1, CYREG_PRT2_DM1
+.set SCSI_Out_DBx__DB6__DM2, CYREG_PRT2_DM2
+.set SCSI_Out_DBx__DB6__DR, CYREG_PRT2_DR
+.set SCSI_Out_DBx__DB6__INP_DIS, CYREG_PRT2_INP_DIS
+.set SCSI_Out_DBx__DB6__INTTYPE, CYREG_PICU2_INTTYPE1
+.set SCSI_Out_DBx__DB6__LCD_COM_SEG, CYREG_PRT2_LCD_COM_SEG
+.set SCSI_Out_DBx__DB6__LCD_EN, CYREG_PRT2_LCD_EN
+.set SCSI_Out_DBx__DB6__MASK, 0x02
+.set SCSI_Out_DBx__DB6__PC, CYREG_PRT2_PC1
+.set SCSI_Out_DBx__DB6__PORT, 2
+.set SCSI_Out_DBx__DB6__PRT, CYREG_PRT2_PRT
+.set SCSI_Out_DBx__DB6__PRTDSI__CAPS_SEL, CYREG_PRT2_CAPS_SEL
+.set SCSI_Out_DBx__DB6__PRTDSI__DBL_SYNC_IN, CYREG_PRT2_DBL_SYNC_IN
+.set SCSI_Out_DBx__DB6__PRTDSI__OE_SEL0, CYREG_PRT2_OE_SEL0
+.set SCSI_Out_DBx__DB6__PRTDSI__OE_SEL1, CYREG_PRT2_OE_SEL1
+.set SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL0, CYREG_PRT2_OUT_SEL0
+.set SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL1, CYREG_PRT2_OUT_SEL1
+.set SCSI_Out_DBx__DB6__PRTDSI__SYNC_OUT, CYREG_PRT2_SYNC_OUT
+.set SCSI_Out_DBx__DB6__PS, CYREG_PRT2_PS
+.set SCSI_Out_DBx__DB6__SHIFT, 1
+.set SCSI_Out_DBx__DB6__SLW, CYREG_PRT2_SLW
+.set SCSI_Out_DBx__DB7__AG, CYREG_PRT15_AG
+.set SCSI_Out_DBx__DB7__AMUX, CYREG_PRT15_AMUX
+.set SCSI_Out_DBx__DB7__BIE, CYREG_PRT15_BIE
+.set SCSI_Out_DBx__DB7__BIT_MASK, CYREG_PRT15_BIT_MASK
+.set SCSI_Out_DBx__DB7__BYP, CYREG_PRT15_BYP
+.set SCSI_Out_DBx__DB7__CTL, CYREG_PRT15_CTL
+.set SCSI_Out_DBx__DB7__DM0, CYREG_PRT15_DM0
+.set SCSI_Out_DBx__DB7__DM1, CYREG_PRT15_DM1
+.set SCSI_Out_DBx__DB7__DM2, CYREG_PRT15_DM2
+.set SCSI_Out_DBx__DB7__DR, CYREG_PRT15_DR
+.set SCSI_Out_DBx__DB7__INP_DIS, CYREG_PRT15_INP_DIS
+.set SCSI_Out_DBx__DB7__INTTYPE, CYREG_PICU15_INTTYPE5
+.set SCSI_Out_DBx__DB7__LCD_COM_SEG, CYREG_PRT15_LCD_COM_SEG
+.set SCSI_Out_DBx__DB7__LCD_EN, CYREG_PRT15_LCD_EN
+.set SCSI_Out_DBx__DB7__MASK, 0x20
+.set SCSI_Out_DBx__DB7__PC, CYREG_IO_PC_PRT15_PC5
+.set SCSI_Out_DBx__DB7__PORT, 15
+.set SCSI_Out_DBx__DB7__PRT, CYREG_PRT15_PRT
+.set SCSI_Out_DBx__DB7__PRTDSI__CAPS_SEL, CYREG_PRT15_CAPS_SEL
+.set SCSI_Out_DBx__DB7__PRTDSI__DBL_SYNC_IN, CYREG_PRT15_DBL_SYNC_IN
+.set SCSI_Out_DBx__DB7__PRTDSI__OE_SEL0, CYREG_PRT15_OE_SEL0
+.set SCSI_Out_DBx__DB7__PRTDSI__OE_SEL1, CYREG_PRT15_OE_SEL1
+.set SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL0, CYREG_PRT15_OUT_SEL0
+.set SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL1, CYREG_PRT15_OUT_SEL1
+.set SCSI_Out_DBx__DB7__PRTDSI__SYNC_OUT, CYREG_PRT15_SYNC_OUT
+.set SCSI_Out_DBx__DB7__PS, CYREG_PRT15_PS
+.set SCSI_Out_DBx__DB7__SHIFT, 5
+.set SCSI_Out_DBx__DB7__SLW, CYREG_PRT15_SLW
+
+/* SD_RX_DMA */
+.set SD_RX_DMA__DRQ_CTL, CYREG_IDMUX_DRQ_CTL0
+.set SD_RX_DMA__DRQ_NUMBER, 2
+.set SD_RX_DMA__NUMBEROF_TDS, 0
+.set SD_RX_DMA__PRIORITY, 0
+.set SD_RX_DMA__TERMIN_EN, 0
+.set SD_RX_DMA__TERMIN_SEL, 0
+.set SD_RX_DMA__TERMOUT0_EN, 1
+.set SD_RX_DMA__TERMOUT0_SEL, 2
+.set SD_RX_DMA__TERMOUT1_EN, 0
+.set SD_RX_DMA__TERMOUT1_SEL, 0
+.set SD_RX_DMA_COMPLETE__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0
+.set SD_RX_DMA_COMPLETE__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0
+.set SD_RX_DMA_COMPLETE__INTC_MASK, 0x20
+.set SD_RX_DMA_COMPLETE__INTC_NUMBER, 5
+.set SD_RX_DMA_COMPLETE__INTC_PRIOR_NUM, 7
+.set SD_RX_DMA_COMPLETE__INTC_PRIOR_REG, CYREG_NVIC_PRI_5
+.set SD_RX_DMA_COMPLETE__INTC_SET_EN_REG, CYREG_NVIC_SETENA0
+.set SD_RX_DMA_COMPLETE__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0
+
+/* SD_TX_DMA */
+.set SD_TX_DMA__DRQ_CTL, CYREG_IDMUX_DRQ_CTL0
+.set SD_TX_DMA__DRQ_NUMBER, 3
+.set SD_TX_DMA__NUMBEROF_TDS, 0
+.set SD_TX_DMA__PRIORITY, 1
+.set SD_TX_DMA__TERMIN_EN, 0
+.set SD_TX_DMA__TERMIN_SEL, 0
+.set SD_TX_DMA__TERMOUT0_EN, 1
+.set SD_TX_DMA__TERMOUT0_SEL, 3
+.set SD_TX_DMA__TERMOUT1_EN, 0
+.set SD_TX_DMA__TERMOUT1_SEL, 0
+.set SD_TX_DMA_COMPLETE__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0
+.set SD_TX_DMA_COMPLETE__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0
+.set SD_TX_DMA_COMPLETE__INTC_MASK, 0x40
+.set SD_TX_DMA_COMPLETE__INTC_NUMBER, 6
+.set SD_TX_DMA_COMPLETE__INTC_PRIOR_NUM, 7
+.set SD_TX_DMA_COMPLETE__INTC_PRIOR_REG, CYREG_NVIC_PRI_6
+.set SD_TX_DMA_COMPLETE__INTC_SET_EN_REG, CYREG_NVIC_SETENA0
+.set SD_TX_DMA_COMPLETE__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0
+
+/* SCSI_Noise */
+.set SCSI_Noise__0__AG, CYREG_PRT4_AG
+.set SCSI_Noise__0__AMUX, CYREG_PRT4_AMUX
+.set SCSI_Noise__0__BIE, CYREG_PRT4_BIE
+.set SCSI_Noise__0__BIT_MASK, CYREG_PRT4_BIT_MASK
+.set SCSI_Noise__0__BYP, CYREG_PRT4_BYP
+.set SCSI_Noise__0__CTL, CYREG_PRT4_CTL
+.set SCSI_Noise__0__DM0, CYREG_PRT4_DM0
+.set SCSI_Noise__0__DM1, CYREG_PRT4_DM1
+.set SCSI_Noise__0__DM2, CYREG_PRT4_DM2
+.set SCSI_Noise__0__DR, CYREG_PRT4_DR
+.set SCSI_Noise__0__INP_DIS, CYREG_PRT4_INP_DIS
+.set SCSI_Noise__0__INTTYPE, CYREG_PICU4_INTTYPE7
+.set SCSI_Noise__0__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG
+.set SCSI_Noise__0__LCD_EN, CYREG_PRT4_LCD_EN
+.set SCSI_Noise__0__MASK, 0x80
+.set SCSI_Noise__0__PC, CYREG_PRT4_PC7
+.set SCSI_Noise__0__PORT, 4
+.set SCSI_Noise__0__PRT, CYREG_PRT4_PRT
+.set SCSI_Noise__0__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL
+.set SCSI_Noise__0__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN
+.set SCSI_Noise__0__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0
+.set SCSI_Noise__0__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1
+.set SCSI_Noise__0__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0
+.set SCSI_Noise__0__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1
+.set SCSI_Noise__0__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT
+.set SCSI_Noise__0__PS, CYREG_PRT4_PS
+.set SCSI_Noise__0__SHIFT, 7
+.set SCSI_Noise__0__SLW, CYREG_PRT4_SLW
+.set SCSI_Noise__1__AG, CYREG_PRT4_AG
+.set SCSI_Noise__1__AMUX, CYREG_PRT4_AMUX
+.set SCSI_Noise__1__BIE, CYREG_PRT4_BIE
+.set SCSI_Noise__1__BIT_MASK, CYREG_PRT4_BIT_MASK
+.set SCSI_Noise__1__BYP, CYREG_PRT4_BYP
+.set SCSI_Noise__1__CTL, CYREG_PRT4_CTL
+.set SCSI_Noise__1__DM0, CYREG_PRT4_DM0
+.set SCSI_Noise__1__DM1, CYREG_PRT4_DM1
+.set SCSI_Noise__1__DM2, CYREG_PRT4_DM2
+.set SCSI_Noise__1__DR, CYREG_PRT4_DR
+.set SCSI_Noise__1__INP_DIS, CYREG_PRT4_INP_DIS
+.set SCSI_Noise__1__INTTYPE, CYREG_PICU4_INTTYPE5
+.set SCSI_Noise__1__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG
+.set SCSI_Noise__1__LCD_EN, CYREG_PRT4_LCD_EN
+.set SCSI_Noise__1__MASK, 0x20
+.set SCSI_Noise__1__PC, CYREG_PRT4_PC5
+.set SCSI_Noise__1__PORT, 4
+.set SCSI_Noise__1__PRT, CYREG_PRT4_PRT
+.set SCSI_Noise__1__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL
+.set SCSI_Noise__1__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN
+.set SCSI_Noise__1__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0
+.set SCSI_Noise__1__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1
+.set SCSI_Noise__1__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0
+.set SCSI_Noise__1__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1
+.set SCSI_Noise__1__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT
+.set SCSI_Noise__1__PS, CYREG_PRT4_PS
+.set SCSI_Noise__1__SHIFT, 5
+.set SCSI_Noise__1__SLW, CYREG_PRT4_SLW
+.set SCSI_Noise__2__AG, CYREG_PRT0_AG
+.set SCSI_Noise__2__AMUX, CYREG_PRT0_AMUX
+.set SCSI_Noise__2__BIE, CYREG_PRT0_BIE
+.set SCSI_Noise__2__BIT_MASK, CYREG_PRT0_BIT_MASK
+.set SCSI_Noise__2__BYP, CYREG_PRT0_BYP
+.set SCSI_Noise__2__CTL, CYREG_PRT0_CTL
+.set SCSI_Noise__2__DM0, CYREG_PRT0_DM0
+.set SCSI_Noise__2__DM1, CYREG_PRT0_DM1
+.set SCSI_Noise__2__DM2, CYREG_PRT0_DM2
+.set SCSI_Noise__2__DR, CYREG_PRT0_DR
+.set SCSI_Noise__2__INP_DIS, CYREG_PRT0_INP_DIS
+.set SCSI_Noise__2__INTTYPE, CYREG_PICU0_INTTYPE2
+.set SCSI_Noise__2__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG
+.set SCSI_Noise__2__LCD_EN, CYREG_PRT0_LCD_EN
+.set SCSI_Noise__2__MASK, 0x04
+.set SCSI_Noise__2__PC, CYREG_PRT0_PC2
+.set SCSI_Noise__2__PORT, 0
+.set SCSI_Noise__2__PRT, CYREG_PRT0_PRT
+.set SCSI_Noise__2__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL
+.set SCSI_Noise__2__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN
+.set SCSI_Noise__2__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0
+.set SCSI_Noise__2__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1
+.set SCSI_Noise__2__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0
+.set SCSI_Noise__2__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1
+.set SCSI_Noise__2__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT
+.set SCSI_Noise__2__PS, CYREG_PRT0_PS
+.set SCSI_Noise__2__SHIFT, 2
+.set SCSI_Noise__2__SLW, CYREG_PRT0_SLW
+.set SCSI_Noise__3__AG, CYREG_PRT0_AG
+.set SCSI_Noise__3__AMUX, CYREG_PRT0_AMUX
+.set SCSI_Noise__3__BIE, CYREG_PRT0_BIE
+.set SCSI_Noise__3__BIT_MASK, CYREG_PRT0_BIT_MASK
+.set SCSI_Noise__3__BYP, CYREG_PRT0_BYP
+.set SCSI_Noise__3__CTL, CYREG_PRT0_CTL
+.set SCSI_Noise__3__DM0, CYREG_PRT0_DM0
+.set SCSI_Noise__3__DM1, CYREG_PRT0_DM1
+.set SCSI_Noise__3__DM2, CYREG_PRT0_DM2
+.set SCSI_Noise__3__DR, CYREG_PRT0_DR
+.set SCSI_Noise__3__INP_DIS, CYREG_PRT0_INP_DIS
+.set SCSI_Noise__3__INTTYPE, CYREG_PICU0_INTTYPE6
+.set SCSI_Noise__3__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG
+.set SCSI_Noise__3__LCD_EN, CYREG_PRT0_LCD_EN
+.set SCSI_Noise__3__MASK, 0x40
+.set SCSI_Noise__3__PC, CYREG_PRT0_PC6
+.set SCSI_Noise__3__PORT, 0
+.set SCSI_Noise__3__PRT, CYREG_PRT0_PRT
+.set SCSI_Noise__3__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL
+.set SCSI_Noise__3__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN
+.set SCSI_Noise__3__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0
+.set SCSI_Noise__3__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1
+.set SCSI_Noise__3__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0
+.set SCSI_Noise__3__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1
+.set SCSI_Noise__3__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT
+.set SCSI_Noise__3__PS, CYREG_PRT0_PS
+.set SCSI_Noise__3__SHIFT, 6
+.set SCSI_Noise__3__SLW, CYREG_PRT0_SLW
+.set SCSI_Noise__4__AG, CYREG_PRT4_AG
+.set SCSI_Noise__4__AMUX, CYREG_PRT4_AMUX
+.set SCSI_Noise__4__BIE, CYREG_PRT4_BIE
+.set SCSI_Noise__4__BIT_MASK, CYREG_PRT4_BIT_MASK
+.set SCSI_Noise__4__BYP, CYREG_PRT4_BYP
+.set SCSI_Noise__4__CTL, CYREG_PRT4_CTL
+.set SCSI_Noise__4__DM0, CYREG_PRT4_DM0
+.set SCSI_Noise__4__DM1, CYREG_PRT4_DM1
+.set SCSI_Noise__4__DM2, CYREG_PRT4_DM2
+.set SCSI_Noise__4__DR, CYREG_PRT4_DR
+.set SCSI_Noise__4__INP_DIS, CYREG_PRT4_INP_DIS
+.set SCSI_Noise__4__INTTYPE, CYREG_PICU4_INTTYPE3
+.set SCSI_Noise__4__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG
+.set SCSI_Noise__4__LCD_EN, CYREG_PRT4_LCD_EN
+.set SCSI_Noise__4__MASK, 0x08
+.set SCSI_Noise__4__PC, CYREG_PRT4_PC3
+.set SCSI_Noise__4__PORT, 4
+.set SCSI_Noise__4__PRT, CYREG_PRT4_PRT
+.set SCSI_Noise__4__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL
+.set SCSI_Noise__4__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN
+.set SCSI_Noise__4__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0
+.set SCSI_Noise__4__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1
+.set SCSI_Noise__4__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0
+.set SCSI_Noise__4__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1
+.set SCSI_Noise__4__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT
+.set SCSI_Noise__4__PS, CYREG_PRT4_PS
+.set SCSI_Noise__4__SHIFT, 3
+.set SCSI_Noise__4__SLW, CYREG_PRT4_SLW
+.set SCSI_Noise__ACK__AG, CYREG_PRT4_AG
+.set SCSI_Noise__ACK__AMUX, CYREG_PRT4_AMUX
+.set SCSI_Noise__ACK__BIE, CYREG_PRT4_BIE
+.set SCSI_Noise__ACK__BIT_MASK, CYREG_PRT4_BIT_MASK
+.set SCSI_Noise__ACK__BYP, CYREG_PRT4_BYP
+.set SCSI_Noise__ACK__CTL, CYREG_PRT4_CTL
+.set SCSI_Noise__ACK__DM0, CYREG_PRT4_DM0
+.set SCSI_Noise__ACK__DM1, CYREG_PRT4_DM1
+.set SCSI_Noise__ACK__DM2, CYREG_PRT4_DM2
+.set SCSI_Noise__ACK__DR, CYREG_PRT4_DR
+.set SCSI_Noise__ACK__INP_DIS, CYREG_PRT4_INP_DIS
+.set SCSI_Noise__ACK__INTTYPE, CYREG_PICU4_INTTYPE3
+.set SCSI_Noise__ACK__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG
+.set SCSI_Noise__ACK__LCD_EN, CYREG_PRT4_LCD_EN
+.set SCSI_Noise__ACK__MASK, 0x08
+.set SCSI_Noise__ACK__PC, CYREG_PRT4_PC3
+.set SCSI_Noise__ACK__PORT, 4
+.set SCSI_Noise__ACK__PRT, CYREG_PRT4_PRT
+.set SCSI_Noise__ACK__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL
+.set SCSI_Noise__ACK__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN
+.set SCSI_Noise__ACK__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0
+.set SCSI_Noise__ACK__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1
+.set SCSI_Noise__ACK__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0
+.set SCSI_Noise__ACK__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1
+.set SCSI_Noise__ACK__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT
+.set SCSI_Noise__ACK__PS, CYREG_PRT4_PS
+.set SCSI_Noise__ACK__SHIFT, 3
+.set SCSI_Noise__ACK__SLW, CYREG_PRT4_SLW
+.set SCSI_Noise__ATN__AG, CYREG_PRT4_AG
+.set SCSI_Noise__ATN__AMUX, CYREG_PRT4_AMUX
+.set SCSI_Noise__ATN__BIE, CYREG_PRT4_BIE
+.set SCSI_Noise__ATN__BIT_MASK, CYREG_PRT4_BIT_MASK
+.set SCSI_Noise__ATN__BYP, CYREG_PRT4_BYP
+.set SCSI_Noise__ATN__CTL, CYREG_PRT4_CTL
+.set SCSI_Noise__ATN__DM0, CYREG_PRT4_DM0
+.set SCSI_Noise__ATN__DM1, CYREG_PRT4_DM1
+.set SCSI_Noise__ATN__DM2, CYREG_PRT4_DM2
+.set SCSI_Noise__ATN__DR, CYREG_PRT4_DR
+.set SCSI_Noise__ATN__INP_DIS, CYREG_PRT4_INP_DIS
+.set SCSI_Noise__ATN__INTTYPE, CYREG_PICU4_INTTYPE7
+.set SCSI_Noise__ATN__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG
+.set SCSI_Noise__ATN__LCD_EN, CYREG_PRT4_LCD_EN
+.set SCSI_Noise__ATN__MASK, 0x80
+.set SCSI_Noise__ATN__PC, CYREG_PRT4_PC7
+.set SCSI_Noise__ATN__PORT, 4
+.set SCSI_Noise__ATN__PRT, CYREG_PRT4_PRT
+.set SCSI_Noise__ATN__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL
+.set SCSI_Noise__ATN__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN
+.set SCSI_Noise__ATN__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0
+.set SCSI_Noise__ATN__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1
+.set SCSI_Noise__ATN__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0
+.set SCSI_Noise__ATN__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1
+.set SCSI_Noise__ATN__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT
+.set SCSI_Noise__ATN__PS, CYREG_PRT4_PS
+.set SCSI_Noise__ATN__SHIFT, 7
+.set SCSI_Noise__ATN__SLW, CYREG_PRT4_SLW
+.set SCSI_Noise__BSY__AG, CYREG_PRT4_AG
+.set SCSI_Noise__BSY__AMUX, CYREG_PRT4_AMUX
+.set SCSI_Noise__BSY__BIE, CYREG_PRT4_BIE
+.set SCSI_Noise__BSY__BIT_MASK, CYREG_PRT4_BIT_MASK
+.set SCSI_Noise__BSY__BYP, CYREG_PRT4_BYP
+.set SCSI_Noise__BSY__CTL, CYREG_PRT4_CTL
+.set SCSI_Noise__BSY__DM0, CYREG_PRT4_DM0
+.set SCSI_Noise__BSY__DM1, CYREG_PRT4_DM1
+.set SCSI_Noise__BSY__DM2, CYREG_PRT4_DM2
+.set SCSI_Noise__BSY__DR, CYREG_PRT4_DR
+.set SCSI_Noise__BSY__INP_DIS, CYREG_PRT4_INP_DIS
+.set SCSI_Noise__BSY__INTTYPE, CYREG_PICU4_INTTYPE5
+.set SCSI_Noise__BSY__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG
+.set SCSI_Noise__BSY__LCD_EN, CYREG_PRT4_LCD_EN
+.set SCSI_Noise__BSY__MASK, 0x20
+.set SCSI_Noise__BSY__PC, CYREG_PRT4_PC5
+.set SCSI_Noise__BSY__PORT, 4
+.set SCSI_Noise__BSY__PRT, CYREG_PRT4_PRT
+.set SCSI_Noise__BSY__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL
+.set SCSI_Noise__BSY__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN
+.set SCSI_Noise__BSY__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0
+.set SCSI_Noise__BSY__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1
+.set SCSI_Noise__BSY__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0
+.set SCSI_Noise__BSY__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1
+.set SCSI_Noise__BSY__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT
+.set SCSI_Noise__BSY__PS, CYREG_PRT4_PS
+.set SCSI_Noise__BSY__SHIFT, 5
+.set SCSI_Noise__BSY__SLW, CYREG_PRT4_SLW
+.set SCSI_Noise__RST__AG, CYREG_PRT0_AG
+.set SCSI_Noise__RST__AMUX, CYREG_PRT0_AMUX
+.set SCSI_Noise__RST__BIE, CYREG_PRT0_BIE
+.set SCSI_Noise__RST__BIT_MASK, CYREG_PRT0_BIT_MASK
+.set SCSI_Noise__RST__BYP, CYREG_PRT0_BYP
+.set SCSI_Noise__RST__CTL, CYREG_PRT0_CTL
+.set SCSI_Noise__RST__DM0, CYREG_PRT0_DM0
+.set SCSI_Noise__RST__DM1, CYREG_PRT0_DM1
+.set SCSI_Noise__RST__DM2, CYREG_PRT0_DM2
+.set SCSI_Noise__RST__DR, CYREG_PRT0_DR
+.set SCSI_Noise__RST__INP_DIS, CYREG_PRT0_INP_DIS
+.set SCSI_Noise__RST__INTTYPE, CYREG_PICU0_INTTYPE6
+.set SCSI_Noise__RST__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG
+.set SCSI_Noise__RST__LCD_EN, CYREG_PRT0_LCD_EN
+.set SCSI_Noise__RST__MASK, 0x40
+.set SCSI_Noise__RST__PC, CYREG_PRT0_PC6
+.set SCSI_Noise__RST__PORT, 0
+.set SCSI_Noise__RST__PRT, CYREG_PRT0_PRT
+.set SCSI_Noise__RST__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL
+.set SCSI_Noise__RST__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN
+.set SCSI_Noise__RST__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0
+.set SCSI_Noise__RST__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1
+.set SCSI_Noise__RST__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0
+.set SCSI_Noise__RST__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1
+.set SCSI_Noise__RST__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT
+.set SCSI_Noise__RST__PS, CYREG_PRT0_PS
+.set SCSI_Noise__RST__SHIFT, 6
+.set SCSI_Noise__RST__SLW, CYREG_PRT0_SLW
+.set SCSI_Noise__SEL__AG, CYREG_PRT0_AG
+.set SCSI_Noise__SEL__AMUX, CYREG_PRT0_AMUX
+.set SCSI_Noise__SEL__BIE, CYREG_PRT0_BIE
+.set SCSI_Noise__SEL__BIT_MASK, CYREG_PRT0_BIT_MASK
+.set SCSI_Noise__SEL__BYP, CYREG_PRT0_BYP
+.set SCSI_Noise__SEL__CTL, CYREG_PRT0_CTL
+.set SCSI_Noise__SEL__DM0, CYREG_PRT0_DM0
+.set SCSI_Noise__SEL__DM1, CYREG_PRT0_DM1
+.set SCSI_Noise__SEL__DM2, CYREG_PRT0_DM2
+.set SCSI_Noise__SEL__DR, CYREG_PRT0_DR
+.set SCSI_Noise__SEL__INP_DIS, CYREG_PRT0_INP_DIS
+.set SCSI_Noise__SEL__INTTYPE, CYREG_PICU0_INTTYPE2
+.set SCSI_Noise__SEL__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG
+.set SCSI_Noise__SEL__LCD_EN, CYREG_PRT0_LCD_EN
+.set SCSI_Noise__SEL__MASK, 0x04
+.set SCSI_Noise__SEL__PC, CYREG_PRT0_PC2
+.set SCSI_Noise__SEL__PORT, 0
+.set SCSI_Noise__SEL__PRT, CYREG_PRT0_PRT
+.set SCSI_Noise__SEL__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL
+.set SCSI_Noise__SEL__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN
+.set SCSI_Noise__SEL__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0
+.set SCSI_Noise__SEL__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1
+.set SCSI_Noise__SEL__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0
+.set SCSI_Noise__SEL__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1
+.set SCSI_Noise__SEL__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT
+.set SCSI_Noise__SEL__PS, CYREG_PRT0_PS
+.set SCSI_Noise__SEL__SHIFT, 2
+.set SCSI_Noise__SEL__SLW, CYREG_PRT0_SLW
+
/* scsiTarget */
.set scsiTarget_datapath__16BIT_A0_REG, CYREG_B0_UDB00_01_A0
.set scsiTarget_datapath__16BIT_A1_REG, CYREG_B0_UDB00_01_A1
.set scsiTarget_StatusReg__STATUS_AUX_CTL_REG, CYREG_B0_UDB15_ACTL
.set scsiTarget_StatusReg__STATUS_REG, CYREG_B0_UDB15_ST
+/* Debug_Timer */
+.set Debug_Timer_Interrupt__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0
+.set Debug_Timer_Interrupt__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0
+.set Debug_Timer_Interrupt__INTC_MASK, 0x01
+.set Debug_Timer_Interrupt__INTC_NUMBER, 0
+.set Debug_Timer_Interrupt__INTC_PRIOR_NUM, 7
+.set Debug_Timer_Interrupt__INTC_PRIOR_REG, CYREG_NVIC_PRI_0
+.set Debug_Timer_Interrupt__INTC_SET_EN_REG, CYREG_NVIC_SETENA0
+.set Debug_Timer_Interrupt__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0
+.set Debug_Timer_TimerHW__CAP0, CYREG_TMR0_CAP0
+.set Debug_Timer_TimerHW__CAP1, CYREG_TMR0_CAP1
+.set Debug_Timer_TimerHW__CFG0, CYREG_TMR0_CFG0
+.set Debug_Timer_TimerHW__CFG1, CYREG_TMR0_CFG1
+.set Debug_Timer_TimerHW__CFG2, CYREG_TMR0_CFG2
+.set Debug_Timer_TimerHW__CNT_CMP0, CYREG_TMR0_CNT_CMP0
+.set Debug_Timer_TimerHW__CNT_CMP1, CYREG_TMR0_CNT_CMP1
+.set Debug_Timer_TimerHW__PER0, CYREG_TMR0_PER0
+.set Debug_Timer_TimerHW__PER1, CYREG_TMR0_PER1
+.set Debug_Timer_TimerHW__PM_ACT_CFG, CYREG_PM_ACT_CFG3
+.set Debug_Timer_TimerHW__PM_ACT_MSK, 0x01
+.set Debug_Timer_TimerHW__PM_STBY_CFG, CYREG_PM_STBY_CFG3
+.set Debug_Timer_TimerHW__PM_STBY_MSK, 0x01
+.set Debug_Timer_TimerHW__RT0, CYREG_TMR0_RT0
+.set Debug_Timer_TimerHW__RT1, CYREG_TMR0_RT1
+.set Debug_Timer_TimerHW__SR0, CYREG_TMR0_SR0
+
+/* SCSI_RX_DMA */
+.set SCSI_RX_DMA__DRQ_CTL, CYREG_IDMUX_DRQ_CTL0
+.set SCSI_RX_DMA__DRQ_NUMBER, 0
+.set SCSI_RX_DMA__NUMBEROF_TDS, 0
+.set SCSI_RX_DMA__PRIORITY, 2
+.set SCSI_RX_DMA__TERMIN_EN, 0
+.set SCSI_RX_DMA__TERMIN_SEL, 0
+.set SCSI_RX_DMA__TERMOUT0_EN, 1
+.set SCSI_RX_DMA__TERMOUT0_SEL, 0
+.set SCSI_RX_DMA__TERMOUT1_EN, 0
+.set SCSI_RX_DMA__TERMOUT1_SEL, 0
+.set SCSI_RX_DMA_COMPLETE__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0
+.set SCSI_RX_DMA_COMPLETE__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0
+.set SCSI_RX_DMA_COMPLETE__INTC_MASK, 0x04
+.set SCSI_RX_DMA_COMPLETE__INTC_NUMBER, 2
+.set SCSI_RX_DMA_COMPLETE__INTC_PRIOR_NUM, 7
+.set SCSI_RX_DMA_COMPLETE__INTC_PRIOR_REG, CYREG_NVIC_PRI_2
+.set SCSI_RX_DMA_COMPLETE__INTC_SET_EN_REG, CYREG_NVIC_SETENA0
+.set SCSI_RX_DMA_COMPLETE__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0
+
+/* SCSI_TX_DMA */
+.set SCSI_TX_DMA__DRQ_CTL, CYREG_IDMUX_DRQ_CTL0
+.set SCSI_TX_DMA__DRQ_NUMBER, 1
+.set SCSI_TX_DMA__NUMBEROF_TDS, 0
+.set SCSI_TX_DMA__PRIORITY, 2
+.set SCSI_TX_DMA__TERMIN_EN, 0
+.set SCSI_TX_DMA__TERMIN_SEL, 0
+.set SCSI_TX_DMA__TERMOUT0_EN, 1
+.set SCSI_TX_DMA__TERMOUT0_SEL, 1
+.set SCSI_TX_DMA__TERMOUT1_EN, 0
+.set SCSI_TX_DMA__TERMOUT1_SEL, 0
+.set SCSI_TX_DMA_COMPLETE__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0
+.set SCSI_TX_DMA_COMPLETE__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0
+.set SCSI_TX_DMA_COMPLETE__INTC_MASK, 0x10
+.set SCSI_TX_DMA_COMPLETE__INTC_NUMBER, 4
+.set SCSI_TX_DMA_COMPLETE__INTC_PRIOR_NUM, 7
+.set SCSI_TX_DMA_COMPLETE__INTC_PRIOR_REG, CYREG_NVIC_PRI_4
+.set SCSI_TX_DMA_COMPLETE__INTC_SET_EN_REG, CYREG_NVIC_SETENA0
+.set SCSI_TX_DMA_COMPLETE__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0
+
+/* SD_Data_Clk */
+.set SD_Data_Clk__CFG0, CYREG_CLKDIST_DCFG0_CFG0
+.set SD_Data_Clk__CFG1, CYREG_CLKDIST_DCFG0_CFG1
+.set SD_Data_Clk__CFG2, CYREG_CLKDIST_DCFG0_CFG2
+.set SD_Data_Clk__CFG2_SRC_SEL_MASK, 0x07
+.set SD_Data_Clk__INDEX, 0x00
+.set SD_Data_Clk__PM_ACT_CFG, CYREG_PM_ACT_CFG2
+.set SD_Data_Clk__PM_ACT_MSK, 0x01
+.set SD_Data_Clk__PM_STBY_CFG, CYREG_PM_STBY_CFG2
+.set SD_Data_Clk__PM_STBY_MSK, 0x01
+
/* timer_clock */
.set timer_clock__CFG0, CYREG_CLKDIST_DCFG2_CFG0
.set timer_clock__CFG1, CYREG_CLKDIST_DCFG2_CFG1
.set timer_clock__PM_STBY_CFG, CYREG_PM_STBY_CFG2
.set timer_clock__PM_STBY_MSK, 0x04
+/* SCSI_RST_ISR */
+.set SCSI_RST_ISR__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0
+.set SCSI_RST_ISR__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0
+.set SCSI_RST_ISR__INTC_MASK, 0x02
+.set SCSI_RST_ISR__INTC_NUMBER, 1
+.set SCSI_RST_ISR__INTC_PRIOR_NUM, 7
+.set SCSI_RST_ISR__INTC_PRIOR_REG, CYREG_NVIC_PRI_1
+.set SCSI_RST_ISR__INTC_SET_EN_REG, CYREG_NVIC_SETENA0
+.set SCSI_RST_ISR__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0
+
+/* SCSI_SEL_ISR */
+.set SCSI_SEL_ISR__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0
+.set SCSI_SEL_ISR__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0
+.set SCSI_SEL_ISR__INTC_MASK, 0x08
+.set SCSI_SEL_ISR__INTC_NUMBER, 3
+.set SCSI_SEL_ISR__INTC_PRIOR_NUM, 7
+.set SCSI_SEL_ISR__INTC_PRIOR_REG, CYREG_NVIC_PRI_3
+.set SCSI_SEL_ISR__INTC_SET_EN_REG, CYREG_NVIC_SETENA0
+.set SCSI_SEL_ISR__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0
+
+/* SCSI_Filtered */
+.set SCSI_Filtered_sts_sts_reg__0__MASK, 0x01
+.set SCSI_Filtered_sts_sts_reg__0__POS, 0
+.set SCSI_Filtered_sts_sts_reg__1__MASK, 0x02
+.set SCSI_Filtered_sts_sts_reg__1__POS, 1
+.set SCSI_Filtered_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG, CYREG_B0_UDB11_12_ACTL
+.set SCSI_Filtered_sts_sts_reg__16BIT_STATUS_REG, CYREG_B0_UDB11_12_ST
+.set SCSI_Filtered_sts_sts_reg__2__MASK, 0x04
+.set SCSI_Filtered_sts_sts_reg__2__POS, 2
+.set SCSI_Filtered_sts_sts_reg__3__MASK, 0x08
+.set SCSI_Filtered_sts_sts_reg__3__POS, 3
+.set SCSI_Filtered_sts_sts_reg__4__MASK, 0x10
+.set SCSI_Filtered_sts_sts_reg__4__POS, 4
+.set SCSI_Filtered_sts_sts_reg__MASK, 0x1F
+.set SCSI_Filtered_sts_sts_reg__MASK_REG, CYREG_B0_UDB11_MSK
+.set SCSI_Filtered_sts_sts_reg__MASK_ST_AUX_CTL_REG, CYREG_B0_UDB11_MSK_ACTL
+.set SCSI_Filtered_sts_sts_reg__PER_ST_AUX_CTL_REG, CYREG_B0_UDB11_MSK_ACTL
+.set SCSI_Filtered_sts_sts_reg__STATUS_AUX_CTL_REG, CYREG_B0_UDB11_ACTL
+.set SCSI_Filtered_sts_sts_reg__STATUS_CNT_REG, CYREG_B0_UDB11_ST_CTL
+.set SCSI_Filtered_sts_sts_reg__STATUS_CONTROL_REG, CYREG_B0_UDB11_ST_CTL
+.set SCSI_Filtered_sts_sts_reg__STATUS_REG, CYREG_B0_UDB11_ST
+
+/* SCSI_CTL_PHASE */
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__0__MASK, 0x01
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__0__POS, 0
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__1__MASK, 0x02
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__1__POS, 1
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG, CYREG_B0_UDB02_03_ACTL
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG, CYREG_B0_UDB02_03_CTL
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG, CYREG_B0_UDB02_03_CTL
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG, CYREG_B0_UDB02_03_CTL
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG, CYREG_B0_UDB02_03_CTL
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_MASK_REG, CYREG_B0_UDB02_03_MSK
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG, CYREG_B0_UDB02_03_MSK
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG, CYREG_B0_UDB02_03_MSK
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG, CYREG_B0_UDB02_03_MSK
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__2__MASK, 0x04
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__2__POS, 2
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_AUX_CTL_REG, CYREG_B0_UDB02_ACTL
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_REG, CYREG_B0_UDB02_CTL
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_ST_REG, CYREG_B0_UDB02_ST_CTL
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_REG, CYREG_B0_UDB02_CTL
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_ST_REG, CYREG_B0_UDB02_ST_CTL
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__MASK, 0x07
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG, CYREG_B0_UDB02_MSK_ACTL
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG, CYREG_B0_UDB02_MSK_ACTL
+.set SCSI_CTL_PHASE_Sync_ctrl_reg__PERIOD_REG, CYREG_B0_UDB02_MSK
+
+/* SCSI_Glitch_Ctl */
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__0__MASK, 0x01
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__0__POS, 0
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG, CYREG_B0_UDB05_06_ACTL
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG, CYREG_B0_UDB05_06_CTL
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG, CYREG_B0_UDB05_06_CTL
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG, CYREG_B0_UDB05_06_CTL
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG, CYREG_B0_UDB05_06_CTL
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG, CYREG_B0_UDB05_06_MSK
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG, CYREG_B0_UDB05_06_MSK
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG, CYREG_B0_UDB05_06_MSK
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG, CYREG_B0_UDB05_06_MSK
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG, CYREG_B0_UDB05_ACTL
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_REG, CYREG_B0_UDB05_CTL
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_ST_REG, CYREG_B0_UDB05_ST_CTL
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__COUNT_REG, CYREG_B0_UDB05_CTL
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__COUNT_ST_REG, CYREG_B0_UDB05_ST_CTL
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__MASK, 0x01
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG, CYREG_B0_UDB05_MSK_ACTL
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG, CYREG_B0_UDB05_MSK_ACTL
+.set SCSI_Glitch_Ctl_Sync_ctrl_reg__PERIOD_REG, CYREG_B0_UDB05_MSK
+
+/* SCSI_Parity_Error */
+.set SCSI_Parity_Error_sts_sts_reg__0__MASK, 0x01
+.set SCSI_Parity_Error_sts_sts_reg__0__POS, 0
+.set SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG, CYREG_B0_UDB02_03_ACTL
+.set SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_REG, CYREG_B0_UDB02_03_ST
+.set SCSI_Parity_Error_sts_sts_reg__MASK, 0x01
+.set SCSI_Parity_Error_sts_sts_reg__MASK_REG, CYREG_B0_UDB02_MSK
+.set SCSI_Parity_Error_sts_sts_reg__MASK_ST_AUX_CTL_REG, CYREG_B0_UDB02_MSK_ACTL
+.set SCSI_Parity_Error_sts_sts_reg__PER_ST_AUX_CTL_REG, CYREG_B0_UDB02_MSK_ACTL
+.set SCSI_Parity_Error_sts_sts_reg__STATUS_AUX_CTL_REG, CYREG_B0_UDB02_ACTL
+.set SCSI_Parity_Error_sts_sts_reg__STATUS_CNT_REG, CYREG_B0_UDB02_ST_CTL
+.set SCSI_Parity_Error_sts_sts_reg__STATUS_CONTROL_REG, CYREG_B0_UDB02_ST_CTL
+.set SCSI_Parity_Error_sts_sts_reg__STATUS_REG, CYREG_B0_UDB02_ST
+
/* Miscellaneous */
.set BCLK__BUS_CLK__HZ, 50000000
.set BCLK__BUS_CLK__KHZ, 50000
.set BCLK__BUS_CLK__MHZ, 50
.set CYDEV_CHIP_DIE_LEOPARD, 1
-.set CYDEV_CHIP_DIE_PSOC4A, 16
+.set CYDEV_CHIP_DIE_PSOC4A, 18
.set CYDEV_CHIP_DIE_PSOC5LP, 2
.set CYDEV_CHIP_DIE_PSOC5TM, 3
.set CYDEV_CHIP_DIE_TMA4, 4
.set CYDEV_CHIP_FAMILY_USED, CYDEV_CHIP_FAMILY_PSOC5
.set CYDEV_CHIP_JTAG_ID, 0x2E133069
.set CYDEV_CHIP_MEMBER_3A, 1
-.set CYDEV_CHIP_MEMBER_4A, 16
-.set CYDEV_CHIP_MEMBER_4D, 12
+.set CYDEV_CHIP_MEMBER_4A, 18
+.set CYDEV_CHIP_MEMBER_4D, 13
.set CYDEV_CHIP_MEMBER_4E, 6
-.set CYDEV_CHIP_MEMBER_4F, 17
+.set CYDEV_CHIP_MEMBER_4F, 19
.set CYDEV_CHIP_MEMBER_4G, 4
-.set CYDEV_CHIP_MEMBER_4H, 15
-.set CYDEV_CHIP_MEMBER_4I, 21
-.set CYDEV_CHIP_MEMBER_4J, 13
-.set CYDEV_CHIP_MEMBER_4K, 14
-.set CYDEV_CHIP_MEMBER_4L, 20
-.set CYDEV_CHIP_MEMBER_4M, 19
-.set CYDEV_CHIP_MEMBER_4N, 9
+.set CYDEV_CHIP_MEMBER_4H, 17
+.set CYDEV_CHIP_MEMBER_4I, 23
+.set CYDEV_CHIP_MEMBER_4J, 14
+.set CYDEV_CHIP_MEMBER_4K, 15
+.set CYDEV_CHIP_MEMBER_4L, 22
+.set CYDEV_CHIP_MEMBER_4M, 21
+.set CYDEV_CHIP_MEMBER_4N, 10
.set CYDEV_CHIP_MEMBER_4O, 7
-.set CYDEV_CHIP_MEMBER_4P, 18
-.set CYDEV_CHIP_MEMBER_4Q, 11
+.set CYDEV_CHIP_MEMBER_4P, 20
+.set CYDEV_CHIP_MEMBER_4Q, 12
.set CYDEV_CHIP_MEMBER_4R, 8
-.set CYDEV_CHIP_MEMBER_4S, 10
+.set CYDEV_CHIP_MEMBER_4S, 11
+.set CYDEV_CHIP_MEMBER_4T, 9
.set CYDEV_CHIP_MEMBER_4U, 5
+.set CYDEV_CHIP_MEMBER_4V, 16
.set CYDEV_CHIP_MEMBER_5A, 3
.set CYDEV_CHIP_MEMBER_5B, 2
-.set CYDEV_CHIP_MEMBER_6A, 22
-.set CYDEV_CHIP_MEMBER_FM3, 26
-.set CYDEV_CHIP_MEMBER_FM4, 27
-.set CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE1, 23
-.set CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE2, 24
-.set CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE3, 25
+.set CYDEV_CHIP_MEMBER_6A, 24
+.set CYDEV_CHIP_MEMBER_FM3, 28
+.set CYDEV_CHIP_MEMBER_FM4, 29
+.set CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE1, 25
+.set CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE2, 26
+.set CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE3, 27
.set CYDEV_CHIP_MEMBER_UNKNOWN, 0
.set CYDEV_CHIP_MEMBER_USED, CYDEV_CHIP_MEMBER_5B
.set CYDEV_CHIP_DIE_EXPECT, CYDEV_CHIP_MEMBER_USED
.set CYDEV_CHIP_REVISION_4A_ES0, 17
.set CYDEV_CHIP_REVISION_4A_PRODUCTION, 17
.set CYDEV_CHIP_REVISION_4D_PRODUCTION, 0
+.set CYDEV_CHIP_REVISION_4E_CCG2_NO_USBPD, 0
.set CYDEV_CHIP_REVISION_4E_PRODUCTION, 0
.set CYDEV_CHIP_REVISION_4F_PRODUCTION, 0
.set CYDEV_CHIP_REVISION_4F_PRODUCTION_256DMA, 0
.set CYDEV_CHIP_REVISION_4Q_PRODUCTION, 0
.set CYDEV_CHIP_REVISION_4R_PRODUCTION, 0
.set CYDEV_CHIP_REVISION_4S_PRODUCTION, 0
+.set CYDEV_CHIP_REVISION_4T_PRODUCTION, 0
.set CYDEV_CHIP_REVISION_4U_PRODUCTION, 0
+.set CYDEV_CHIP_REVISION_4V_PRODUCTION, 0
.set CYDEV_CHIP_REVISION_5A_ES0, 0
.set CYDEV_CHIP_REVISION_5A_ES1, 1
.set CYDEV_CHIP_REVISION_5A_PRODUCTION, 1
.set CYDEV_CHIP_REVISION_5B_ES0, 0
.set CYDEV_CHIP_REVISION_5B_PRODUCTION, 0
-.set CYDEV_CHIP_REVISION_6A_NO_UDB, 0
-.set CYDEV_CHIP_REVISION_6A_PRODUCTION, 0
+.set CYDEV_CHIP_REVISION_6A_ES, 17
+.set CYDEV_CHIP_REVISION_6A_NO_UDB, 33
+.set CYDEV_CHIP_REVISION_6A_PRODUCTION, 33
.set CYDEV_CHIP_REVISION_FM3_PRODUCTION, 0
.set CYDEV_CHIP_REVISION_FM4_PRODUCTION, 0
.set CYDEV_CHIP_REVISION_PDL_FM0P_TYPE1_PRODUCTION, 0
;
; File Name: cyfitteriar.inc
;
-; PSoC Creator 4.1
+; PSoC Creator 4.2
;
; Description:
;
;
;-------------------------------------------------------------------------------
-; Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.
+; Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
; You may use this file only in accordance with the license, terms, conditions,
; disclaimers, and limitations in the end user license agreement accompanying
; the software package with which this file was provided.
INCLUDE cydeviceiar.inc
INCLUDE cydeviceiar_trm.inc
-/* Debug_Timer_Interrupt */
-Debug_Timer_Interrupt__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0
-Debug_Timer_Interrupt__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0
-Debug_Timer_Interrupt__INTC_MASK EQU 0x01
-Debug_Timer_Interrupt__INTC_NUMBER EQU 0
-Debug_Timer_Interrupt__INTC_PRIOR_NUM EQU 7
-Debug_Timer_Interrupt__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_0
-Debug_Timer_Interrupt__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0
-Debug_Timer_Interrupt__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0
-
-/* Debug_Timer_TimerHW */
-Debug_Timer_TimerHW__CAP0 EQU CYREG_TMR0_CAP0
-Debug_Timer_TimerHW__CAP1 EQU CYREG_TMR0_CAP1
-Debug_Timer_TimerHW__CFG0 EQU CYREG_TMR0_CFG0
-Debug_Timer_TimerHW__CFG1 EQU CYREG_TMR0_CFG1
-Debug_Timer_TimerHW__CFG2 EQU CYREG_TMR0_CFG2
-Debug_Timer_TimerHW__CNT_CMP0 EQU CYREG_TMR0_CNT_CMP0
-Debug_Timer_TimerHW__CNT_CMP1 EQU CYREG_TMR0_CNT_CMP1
-Debug_Timer_TimerHW__PER0 EQU CYREG_TMR0_PER0
-Debug_Timer_TimerHW__PER1 EQU CYREG_TMR0_PER1
-Debug_Timer_TimerHW__PM_ACT_CFG EQU CYREG_PM_ACT_CFG3
-Debug_Timer_TimerHW__PM_ACT_MSK EQU 0x01
-Debug_Timer_TimerHW__PM_STBY_CFG EQU CYREG_PM_STBY_CFG3
-Debug_Timer_TimerHW__PM_STBY_MSK EQU 0x01
-Debug_Timer_TimerHW__RT0 EQU CYREG_TMR0_RT0
-Debug_Timer_TimerHW__RT1 EQU CYREG_TMR0_RT1
-Debug_Timer_TimerHW__SR0 EQU CYREG_TMR0_SR0
-
/* LED1 */
LED1__0__INTTYPE EQU CYREG_PICU12_INTTYPE0
LED1__0__MASK EQU 0x01
LED1__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ
LED1__SLW EQU CYREG_PRT12_SLW
-/* SCSI_CLK */
-SCSI_CLK__CFG0 EQU CYREG_CLKDIST_DCFG1_CFG0
-SCSI_CLK__CFG1 EQU CYREG_CLKDIST_DCFG1_CFG1
-SCSI_CLK__CFG2 EQU CYREG_CLKDIST_DCFG1_CFG2
-SCSI_CLK__CFG2_SRC_SEL_MASK EQU 0x07
-SCSI_CLK__INDEX EQU 0x01
-SCSI_CLK__PM_ACT_CFG EQU CYREG_PM_ACT_CFG2
-SCSI_CLK__PM_ACT_MSK EQU 0x02
-SCSI_CLK__PM_STBY_CFG EQU CYREG_PM_STBY_CFG2
-SCSI_CLK__PM_STBY_MSK EQU 0x02
-
-/* SCSI_CTL_PHASE */
-SCSI_CTL_PHASE_Sync_ctrl_reg__0__MASK EQU 0x01
-SCSI_CTL_PHASE_Sync_ctrl_reg__0__POS EQU 0
-SCSI_CTL_PHASE_Sync_ctrl_reg__1__MASK EQU 0x02
-SCSI_CTL_PHASE_Sync_ctrl_reg__1__POS EQU 1
-SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB02_03_ACTL
-SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB02_03_CTL
-SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB02_03_CTL
-SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB02_03_CTL
-SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB02_03_CTL
-SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB02_03_MSK
-SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB02_03_MSK
-SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB02_03_MSK
-SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB02_03_MSK
-SCSI_CTL_PHASE_Sync_ctrl_reg__2__MASK EQU 0x04
-SCSI_CTL_PHASE_Sync_ctrl_reg__2__POS EQU 2
-SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB02_ACTL
-SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB02_CTL
-SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB02_ST_CTL
-SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB02_CTL
-SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB02_ST_CTL
-SCSI_CTL_PHASE_Sync_ctrl_reg__MASK EQU 0x07
-SCSI_CTL_PHASE_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB02_MSK_ACTL
-SCSI_CTL_PHASE_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB02_MSK_ACTL
-SCSI_CTL_PHASE_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB02_MSK
-
-/* SCSI_Filtered */
-SCSI_Filtered_sts_sts_reg__0__MASK EQU 0x01
-SCSI_Filtered_sts_sts_reg__0__POS EQU 0
-SCSI_Filtered_sts_sts_reg__1__MASK EQU 0x02
-SCSI_Filtered_sts_sts_reg__1__POS EQU 1
-SCSI_Filtered_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB11_12_ACTL
-SCSI_Filtered_sts_sts_reg__16BIT_STATUS_REG EQU CYREG_B0_UDB11_12_ST
-SCSI_Filtered_sts_sts_reg__2__MASK EQU 0x04
-SCSI_Filtered_sts_sts_reg__2__POS EQU 2
-SCSI_Filtered_sts_sts_reg__3__MASK EQU 0x08
-SCSI_Filtered_sts_sts_reg__3__POS EQU 3
-SCSI_Filtered_sts_sts_reg__4__MASK EQU 0x10
-SCSI_Filtered_sts_sts_reg__4__POS EQU 4
-SCSI_Filtered_sts_sts_reg__MASK EQU 0x1F
-SCSI_Filtered_sts_sts_reg__MASK_REG EQU CYREG_B0_UDB11_MSK
-SCSI_Filtered_sts_sts_reg__MASK_ST_AUX_CTL_REG EQU CYREG_B0_UDB11_MSK_ACTL
-SCSI_Filtered_sts_sts_reg__PER_ST_AUX_CTL_REG EQU CYREG_B0_UDB11_MSK_ACTL
-SCSI_Filtered_sts_sts_reg__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB11_ACTL
-SCSI_Filtered_sts_sts_reg__STATUS_CNT_REG EQU CYREG_B0_UDB11_ST_CTL
-SCSI_Filtered_sts_sts_reg__STATUS_CONTROL_REG EQU CYREG_B0_UDB11_ST_CTL
-SCSI_Filtered_sts_sts_reg__STATUS_REG EQU CYREG_B0_UDB11_ST
-
-/* SCSI_Glitch_Ctl */
-SCSI_Glitch_Ctl_Sync_ctrl_reg__0__MASK EQU 0x01
-SCSI_Glitch_Ctl_Sync_ctrl_reg__0__POS EQU 0
-SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB05_06_ACTL
-SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB05_06_CTL
-SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB05_06_CTL
-SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB05_06_CTL
-SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB05_06_CTL
-SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB05_06_MSK
-SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB05_06_MSK
-SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB05_06_MSK
-SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB05_06_MSK
-SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB05_ACTL
-SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB05_CTL
-SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB05_ST_CTL
-SCSI_Glitch_Ctl_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB05_CTL
-SCSI_Glitch_Ctl_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB05_ST_CTL
-SCSI_Glitch_Ctl_Sync_ctrl_reg__MASK EQU 0x01
-SCSI_Glitch_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB05_MSK_ACTL
-SCSI_Glitch_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB05_MSK_ACTL
-SCSI_Glitch_Ctl_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB05_MSK
-
-/* SCSI_In */
-SCSI_In__0__INTTYPE EQU CYREG_PICU6_INTTYPE1
-SCSI_In__0__MASK EQU 0x02
-SCSI_In__0__PC EQU CYREG_PRT6_PC1
-SCSI_In__0__PORT EQU 6
-SCSI_In__0__SHIFT EQU 1
-SCSI_In__AG EQU CYREG_PRT6_AG
-SCSI_In__AMUX EQU CYREG_PRT6_AMUX
-SCSI_In__BIE EQU CYREG_PRT6_BIE
-SCSI_In__BIT_MASK EQU CYREG_PRT6_BIT_MASK
-SCSI_In__BYP EQU CYREG_PRT6_BYP
-SCSI_In__CTL EQU CYREG_PRT6_CTL
-SCSI_In__DBP__INTTYPE EQU CYREG_PICU6_INTTYPE1
-SCSI_In__DBP__MASK EQU 0x02
-SCSI_In__DBP__PC EQU CYREG_PRT6_PC1
-SCSI_In__DBP__PORT EQU 6
-SCSI_In__DBP__SHIFT EQU 1
-SCSI_In__DM0 EQU CYREG_PRT6_DM0
-SCSI_In__DM1 EQU CYREG_PRT6_DM1
-SCSI_In__DM2 EQU CYREG_PRT6_DM2
-SCSI_In__DR EQU CYREG_PRT6_DR
-SCSI_In__INP_DIS EQU CYREG_PRT6_INP_DIS
-SCSI_In__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU6_BASE
-SCSI_In__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
-SCSI_In__LCD_EN EQU CYREG_PRT6_LCD_EN
-SCSI_In__MASK EQU 0x02
-SCSI_In__PORT EQU 6
-SCSI_In__PRT EQU CYREG_PRT6_PRT
-SCSI_In__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
-SCSI_In__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
-SCSI_In__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
-SCSI_In__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
-SCSI_In__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
-SCSI_In__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
-SCSI_In__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
-SCSI_In__PS EQU CYREG_PRT6_PS
-SCSI_In__SHIFT EQU 1
-SCSI_In__SLW EQU CYREG_PRT6_SLW
-SCSI_In_DBx__0__AG EQU CYREG_PRT6_AG
-SCSI_In_DBx__0__AMUX EQU CYREG_PRT6_AMUX
-SCSI_In_DBx__0__BIE EQU CYREG_PRT6_BIE
-SCSI_In_DBx__0__BIT_MASK EQU CYREG_PRT6_BIT_MASK
-SCSI_In_DBx__0__BYP EQU CYREG_PRT6_BYP
-SCSI_In_DBx__0__CTL EQU CYREG_PRT6_CTL
-SCSI_In_DBx__0__DM0 EQU CYREG_PRT6_DM0
-SCSI_In_DBx__0__DM1 EQU CYREG_PRT6_DM1
-SCSI_In_DBx__0__DM2 EQU CYREG_PRT6_DM2
-SCSI_In_DBx__0__DR EQU CYREG_PRT6_DR
-SCSI_In_DBx__0__INP_DIS EQU CYREG_PRT6_INP_DIS
-SCSI_In_DBx__0__INTTYPE EQU CYREG_PICU6_INTTYPE6
-SCSI_In_DBx__0__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
-SCSI_In_DBx__0__LCD_EN EQU CYREG_PRT6_LCD_EN
-SCSI_In_DBx__0__MASK EQU 0x40
-SCSI_In_DBx__0__PC EQU CYREG_PRT6_PC6
-SCSI_In_DBx__0__PORT EQU 6
-SCSI_In_DBx__0__PRT EQU CYREG_PRT6_PRT
-SCSI_In_DBx__0__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
-SCSI_In_DBx__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
-SCSI_In_DBx__0__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
-SCSI_In_DBx__0__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
-SCSI_In_DBx__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
-SCSI_In_DBx__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
-SCSI_In_DBx__0__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
-SCSI_In_DBx__0__PS EQU CYREG_PRT6_PS
-SCSI_In_DBx__0__SHIFT EQU 6
-SCSI_In_DBx__0__SLW EQU CYREG_PRT6_SLW
-SCSI_In_DBx__1__AG EQU CYREG_PRT6_AG
-SCSI_In_DBx__1__AMUX EQU CYREG_PRT6_AMUX
-SCSI_In_DBx__1__BIE EQU CYREG_PRT6_BIE
-SCSI_In_DBx__1__BIT_MASK EQU CYREG_PRT6_BIT_MASK
-SCSI_In_DBx__1__BYP EQU CYREG_PRT6_BYP
-SCSI_In_DBx__1__CTL EQU CYREG_PRT6_CTL
-SCSI_In_DBx__1__DM0 EQU CYREG_PRT6_DM0
-SCSI_In_DBx__1__DM1 EQU CYREG_PRT6_DM1
-SCSI_In_DBx__1__DM2 EQU CYREG_PRT6_DM2
-SCSI_In_DBx__1__DR EQU CYREG_PRT6_DR
-SCSI_In_DBx__1__INP_DIS EQU CYREG_PRT6_INP_DIS
-SCSI_In_DBx__1__INTTYPE EQU CYREG_PICU6_INTTYPE4
-SCSI_In_DBx__1__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
-SCSI_In_DBx__1__LCD_EN EQU CYREG_PRT6_LCD_EN
-SCSI_In_DBx__1__MASK EQU 0x10
-SCSI_In_DBx__1__PC EQU CYREG_PRT6_PC4
-SCSI_In_DBx__1__PORT EQU 6
-SCSI_In_DBx__1__PRT EQU CYREG_PRT6_PRT
-SCSI_In_DBx__1__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
-SCSI_In_DBx__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
-SCSI_In_DBx__1__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
-SCSI_In_DBx__1__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
-SCSI_In_DBx__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
-SCSI_In_DBx__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
-SCSI_In_DBx__1__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
-SCSI_In_DBx__1__PS EQU CYREG_PRT6_PS
-SCSI_In_DBx__1__SHIFT EQU 4
-SCSI_In_DBx__1__SLW EQU CYREG_PRT6_SLW
-SCSI_In_DBx__2__AG EQU CYREG_PRT12_AG
-SCSI_In_DBx__2__BIE EQU CYREG_PRT12_BIE
-SCSI_In_DBx__2__BIT_MASK EQU CYREG_PRT12_BIT_MASK
-SCSI_In_DBx__2__BYP EQU CYREG_PRT12_BYP
-SCSI_In_DBx__2__DM0 EQU CYREG_PRT12_DM0
-SCSI_In_DBx__2__DM1 EQU CYREG_PRT12_DM1
-SCSI_In_DBx__2__DM2 EQU CYREG_PRT12_DM2
-SCSI_In_DBx__2__DR EQU CYREG_PRT12_DR
-SCSI_In_DBx__2__INP_DIS EQU CYREG_PRT12_INP_DIS
-SCSI_In_DBx__2__INTTYPE EQU CYREG_PICU12_INTTYPE4
-SCSI_In_DBx__2__MASK EQU 0x10
-SCSI_In_DBx__2__PC EQU CYREG_PRT12_PC4
-SCSI_In_DBx__2__PORT EQU 12
-SCSI_In_DBx__2__PRT EQU CYREG_PRT12_PRT
-SCSI_In_DBx__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN
-SCSI_In_DBx__2__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0
-SCSI_In_DBx__2__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1
-SCSI_In_DBx__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0
-SCSI_In_DBx__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1
-SCSI_In_DBx__2__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT
-SCSI_In_DBx__2__PS EQU CYREG_PRT12_PS
-SCSI_In_DBx__2__SHIFT EQU 4
-SCSI_In_DBx__2__SIO_CFG EQU CYREG_PRT12_SIO_CFG
-SCSI_In_DBx__2__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF
-SCSI_In_DBx__2__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN
-SCSI_In_DBx__2__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ
-SCSI_In_DBx__2__SLW EQU CYREG_PRT12_SLW
-SCSI_In_DBx__3__AG EQU CYREG_PRT2_AG
-SCSI_In_DBx__3__AMUX EQU CYREG_PRT2_AMUX
-SCSI_In_DBx__3__BIE EQU CYREG_PRT2_BIE
-SCSI_In_DBx__3__BIT_MASK EQU CYREG_PRT2_BIT_MASK
-SCSI_In_DBx__3__BYP EQU CYREG_PRT2_BYP
-SCSI_In_DBx__3__CTL EQU CYREG_PRT2_CTL
-SCSI_In_DBx__3__DM0 EQU CYREG_PRT2_DM0
-SCSI_In_DBx__3__DM1 EQU CYREG_PRT2_DM1
-SCSI_In_DBx__3__DM2 EQU CYREG_PRT2_DM2
-SCSI_In_DBx__3__DR EQU CYREG_PRT2_DR
-SCSI_In_DBx__3__INP_DIS EQU CYREG_PRT2_INP_DIS
-SCSI_In_DBx__3__INTTYPE EQU CYREG_PICU2_INTTYPE6
-SCSI_In_DBx__3__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
-SCSI_In_DBx__3__LCD_EN EQU CYREG_PRT2_LCD_EN
-SCSI_In_DBx__3__MASK EQU 0x40
-SCSI_In_DBx__3__PC EQU CYREG_PRT2_PC6
-SCSI_In_DBx__3__PORT EQU 2
-SCSI_In_DBx__3__PRT EQU CYREG_PRT2_PRT
-SCSI_In_DBx__3__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
-SCSI_In_DBx__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
-SCSI_In_DBx__3__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
-SCSI_In_DBx__3__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
-SCSI_In_DBx__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
-SCSI_In_DBx__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
-SCSI_In_DBx__3__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
-SCSI_In_DBx__3__PS EQU CYREG_PRT2_PS
-SCSI_In_DBx__3__SHIFT EQU 6
-SCSI_In_DBx__3__SLW EQU CYREG_PRT2_SLW
-SCSI_In_DBx__4__AG EQU CYREG_PRT2_AG
-SCSI_In_DBx__4__AMUX EQU CYREG_PRT2_AMUX
-SCSI_In_DBx__4__BIE EQU CYREG_PRT2_BIE
-SCSI_In_DBx__4__BIT_MASK EQU CYREG_PRT2_BIT_MASK
-SCSI_In_DBx__4__BYP EQU CYREG_PRT2_BYP
-SCSI_In_DBx__4__CTL EQU CYREG_PRT2_CTL
-SCSI_In_DBx__4__DM0 EQU CYREG_PRT2_DM0
-SCSI_In_DBx__4__DM1 EQU CYREG_PRT2_DM1
-SCSI_In_DBx__4__DM2 EQU CYREG_PRT2_DM2
-SCSI_In_DBx__4__DR EQU CYREG_PRT2_DR
-SCSI_In_DBx__4__INP_DIS EQU CYREG_PRT2_INP_DIS
-SCSI_In_DBx__4__INTTYPE EQU CYREG_PICU2_INTTYPE4
-SCSI_In_DBx__4__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
-SCSI_In_DBx__4__LCD_EN EQU CYREG_PRT2_LCD_EN
-SCSI_In_DBx__4__MASK EQU 0x10
-SCSI_In_DBx__4__PC EQU CYREG_PRT2_PC4
-SCSI_In_DBx__4__PORT EQU 2
-SCSI_In_DBx__4__PRT EQU CYREG_PRT2_PRT
-SCSI_In_DBx__4__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
-SCSI_In_DBx__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
-SCSI_In_DBx__4__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
-SCSI_In_DBx__4__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
-SCSI_In_DBx__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
-SCSI_In_DBx__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
-SCSI_In_DBx__4__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
-SCSI_In_DBx__4__PS EQU CYREG_PRT2_PS
-SCSI_In_DBx__4__SHIFT EQU 4
-SCSI_In_DBx__4__SLW EQU CYREG_PRT2_SLW
-SCSI_In_DBx__5__AG EQU CYREG_PRT2_AG
-SCSI_In_DBx__5__AMUX EQU CYREG_PRT2_AMUX
-SCSI_In_DBx__5__BIE EQU CYREG_PRT2_BIE
-SCSI_In_DBx__5__BIT_MASK EQU CYREG_PRT2_BIT_MASK
-SCSI_In_DBx__5__BYP EQU CYREG_PRT2_BYP
-SCSI_In_DBx__5__CTL EQU CYREG_PRT2_CTL
-SCSI_In_DBx__5__DM0 EQU CYREG_PRT2_DM0
-SCSI_In_DBx__5__DM1 EQU CYREG_PRT2_DM1
-SCSI_In_DBx__5__DM2 EQU CYREG_PRT2_DM2
-SCSI_In_DBx__5__DR EQU CYREG_PRT2_DR
-SCSI_In_DBx__5__INP_DIS EQU CYREG_PRT2_INP_DIS
-SCSI_In_DBx__5__INTTYPE EQU CYREG_PICU2_INTTYPE2
-SCSI_In_DBx__5__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
-SCSI_In_DBx__5__LCD_EN EQU CYREG_PRT2_LCD_EN
-SCSI_In_DBx__5__MASK EQU 0x04
-SCSI_In_DBx__5__PC EQU CYREG_PRT2_PC2
-SCSI_In_DBx__5__PORT EQU 2
-SCSI_In_DBx__5__PRT EQU CYREG_PRT2_PRT
-SCSI_In_DBx__5__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
-SCSI_In_DBx__5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
-SCSI_In_DBx__5__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
-SCSI_In_DBx__5__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
-SCSI_In_DBx__5__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
-SCSI_In_DBx__5__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
-SCSI_In_DBx__5__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
-SCSI_In_DBx__5__PS EQU CYREG_PRT2_PS
-SCSI_In_DBx__5__SHIFT EQU 2
-SCSI_In_DBx__5__SLW EQU CYREG_PRT2_SLW
-SCSI_In_DBx__6__AG EQU CYREG_PRT2_AG
-SCSI_In_DBx__6__AMUX EQU CYREG_PRT2_AMUX
-SCSI_In_DBx__6__BIE EQU CYREG_PRT2_BIE
-SCSI_In_DBx__6__BIT_MASK EQU CYREG_PRT2_BIT_MASK
-SCSI_In_DBx__6__BYP EQU CYREG_PRT2_BYP
-SCSI_In_DBx__6__CTL EQU CYREG_PRT2_CTL
-SCSI_In_DBx__6__DM0 EQU CYREG_PRT2_DM0
-SCSI_In_DBx__6__DM1 EQU CYREG_PRT2_DM1
-SCSI_In_DBx__6__DM2 EQU CYREG_PRT2_DM2
-SCSI_In_DBx__6__DR EQU CYREG_PRT2_DR
-SCSI_In_DBx__6__INP_DIS EQU CYREG_PRT2_INP_DIS
-SCSI_In_DBx__6__INTTYPE EQU CYREG_PICU2_INTTYPE0
-SCSI_In_DBx__6__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
-SCSI_In_DBx__6__LCD_EN EQU CYREG_PRT2_LCD_EN
-SCSI_In_DBx__6__MASK EQU 0x01
-SCSI_In_DBx__6__PC EQU CYREG_PRT2_PC0
-SCSI_In_DBx__6__PORT EQU 2
-SCSI_In_DBx__6__PRT EQU CYREG_PRT2_PRT
-SCSI_In_DBx__6__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
-SCSI_In_DBx__6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
-SCSI_In_DBx__6__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
-SCSI_In_DBx__6__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
-SCSI_In_DBx__6__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
-SCSI_In_DBx__6__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
-SCSI_In_DBx__6__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
-SCSI_In_DBx__6__PS EQU CYREG_PRT2_PS
-SCSI_In_DBx__6__SHIFT EQU 0
-SCSI_In_DBx__6__SLW EQU CYREG_PRT2_SLW
-SCSI_In_DBx__7__AG EQU CYREG_PRT6_AG
-SCSI_In_DBx__7__AMUX EQU CYREG_PRT6_AMUX
-SCSI_In_DBx__7__BIE EQU CYREG_PRT6_BIE
-SCSI_In_DBx__7__BIT_MASK EQU CYREG_PRT6_BIT_MASK
-SCSI_In_DBx__7__BYP EQU CYREG_PRT6_BYP
-SCSI_In_DBx__7__CTL EQU CYREG_PRT6_CTL
-SCSI_In_DBx__7__DM0 EQU CYREG_PRT6_DM0
-SCSI_In_DBx__7__DM1 EQU CYREG_PRT6_DM1
-SCSI_In_DBx__7__DM2 EQU CYREG_PRT6_DM2
-SCSI_In_DBx__7__DR EQU CYREG_PRT6_DR
-SCSI_In_DBx__7__INP_DIS EQU CYREG_PRT6_INP_DIS
-SCSI_In_DBx__7__INTTYPE EQU CYREG_PICU6_INTTYPE3
-SCSI_In_DBx__7__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
-SCSI_In_DBx__7__LCD_EN EQU CYREG_PRT6_LCD_EN
-SCSI_In_DBx__7__MASK EQU 0x08
-SCSI_In_DBx__7__PC EQU CYREG_PRT6_PC3
-SCSI_In_DBx__7__PORT EQU 6
-SCSI_In_DBx__7__PRT EQU CYREG_PRT6_PRT
-SCSI_In_DBx__7__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
-SCSI_In_DBx__7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
-SCSI_In_DBx__7__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
-SCSI_In_DBx__7__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
-SCSI_In_DBx__7__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
-SCSI_In_DBx__7__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
-SCSI_In_DBx__7__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
-SCSI_In_DBx__7__PS EQU CYREG_PRT6_PS
-SCSI_In_DBx__7__SHIFT EQU 3
-SCSI_In_DBx__7__SLW EQU CYREG_PRT6_SLW
-SCSI_In_DBx__DB0__AG EQU CYREG_PRT6_AG
-SCSI_In_DBx__DB0__AMUX EQU CYREG_PRT6_AMUX
-SCSI_In_DBx__DB0__BIE EQU CYREG_PRT6_BIE
-SCSI_In_DBx__DB0__BIT_MASK EQU CYREG_PRT6_BIT_MASK
-SCSI_In_DBx__DB0__BYP EQU CYREG_PRT6_BYP
-SCSI_In_DBx__DB0__CTL EQU CYREG_PRT6_CTL
-SCSI_In_DBx__DB0__DM0 EQU CYREG_PRT6_DM0
-SCSI_In_DBx__DB0__DM1 EQU CYREG_PRT6_DM1
-SCSI_In_DBx__DB0__DM2 EQU CYREG_PRT6_DM2
-SCSI_In_DBx__DB0__DR EQU CYREG_PRT6_DR
-SCSI_In_DBx__DB0__INP_DIS EQU CYREG_PRT6_INP_DIS
-SCSI_In_DBx__DB0__INTTYPE EQU CYREG_PICU6_INTTYPE6
-SCSI_In_DBx__DB0__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
-SCSI_In_DBx__DB0__LCD_EN EQU CYREG_PRT6_LCD_EN
-SCSI_In_DBx__DB0__MASK EQU 0x40
-SCSI_In_DBx__DB0__PC EQU CYREG_PRT6_PC6
-SCSI_In_DBx__DB0__PORT EQU 6
-SCSI_In_DBx__DB0__PRT EQU CYREG_PRT6_PRT
-SCSI_In_DBx__DB0__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
-SCSI_In_DBx__DB0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
-SCSI_In_DBx__DB0__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
-SCSI_In_DBx__DB0__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
-SCSI_In_DBx__DB0__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
-SCSI_In_DBx__DB0__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
-SCSI_In_DBx__DB0__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
-SCSI_In_DBx__DB0__PS EQU CYREG_PRT6_PS
-SCSI_In_DBx__DB0__SHIFT EQU 6
-SCSI_In_DBx__DB0__SLW EQU CYREG_PRT6_SLW
-SCSI_In_DBx__DB1__AG EQU CYREG_PRT6_AG
-SCSI_In_DBx__DB1__AMUX EQU CYREG_PRT6_AMUX
-SCSI_In_DBx__DB1__BIE EQU CYREG_PRT6_BIE
-SCSI_In_DBx__DB1__BIT_MASK EQU CYREG_PRT6_BIT_MASK
-SCSI_In_DBx__DB1__BYP EQU CYREG_PRT6_BYP
-SCSI_In_DBx__DB1__CTL EQU CYREG_PRT6_CTL
-SCSI_In_DBx__DB1__DM0 EQU CYREG_PRT6_DM0
-SCSI_In_DBx__DB1__DM1 EQU CYREG_PRT6_DM1
-SCSI_In_DBx__DB1__DM2 EQU CYREG_PRT6_DM2
-SCSI_In_DBx__DB1__DR EQU CYREG_PRT6_DR
-SCSI_In_DBx__DB1__INP_DIS EQU CYREG_PRT6_INP_DIS
-SCSI_In_DBx__DB1__INTTYPE EQU CYREG_PICU6_INTTYPE4
-SCSI_In_DBx__DB1__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
-SCSI_In_DBx__DB1__LCD_EN EQU CYREG_PRT6_LCD_EN
-SCSI_In_DBx__DB1__MASK EQU 0x10
-SCSI_In_DBx__DB1__PC EQU CYREG_PRT6_PC4
-SCSI_In_DBx__DB1__PORT EQU 6
-SCSI_In_DBx__DB1__PRT EQU CYREG_PRT6_PRT
-SCSI_In_DBx__DB1__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
-SCSI_In_DBx__DB1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
-SCSI_In_DBx__DB1__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
-SCSI_In_DBx__DB1__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
-SCSI_In_DBx__DB1__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
-SCSI_In_DBx__DB1__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
-SCSI_In_DBx__DB1__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
-SCSI_In_DBx__DB1__PS EQU CYREG_PRT6_PS
-SCSI_In_DBx__DB1__SHIFT EQU 4
-SCSI_In_DBx__DB1__SLW EQU CYREG_PRT6_SLW
-SCSI_In_DBx__DB2__AG EQU CYREG_PRT12_AG
-SCSI_In_DBx__DB2__BIE EQU CYREG_PRT12_BIE
-SCSI_In_DBx__DB2__BIT_MASK EQU CYREG_PRT12_BIT_MASK
-SCSI_In_DBx__DB2__BYP EQU CYREG_PRT12_BYP
-SCSI_In_DBx__DB2__DM0 EQU CYREG_PRT12_DM0
-SCSI_In_DBx__DB2__DM1 EQU CYREG_PRT12_DM1
-SCSI_In_DBx__DB2__DM2 EQU CYREG_PRT12_DM2
-SCSI_In_DBx__DB2__DR EQU CYREG_PRT12_DR
-SCSI_In_DBx__DB2__INP_DIS EQU CYREG_PRT12_INP_DIS
-SCSI_In_DBx__DB2__INTTYPE EQU CYREG_PICU12_INTTYPE4
-SCSI_In_DBx__DB2__MASK EQU 0x10
-SCSI_In_DBx__DB2__PC EQU CYREG_PRT12_PC4
-SCSI_In_DBx__DB2__PORT EQU 12
-SCSI_In_DBx__DB2__PRT EQU CYREG_PRT12_PRT
-SCSI_In_DBx__DB2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN
-SCSI_In_DBx__DB2__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0
-SCSI_In_DBx__DB2__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1
-SCSI_In_DBx__DB2__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0
-SCSI_In_DBx__DB2__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1
-SCSI_In_DBx__DB2__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT
-SCSI_In_DBx__DB2__PS EQU CYREG_PRT12_PS
-SCSI_In_DBx__DB2__SHIFT EQU 4
-SCSI_In_DBx__DB2__SIO_CFG EQU CYREG_PRT12_SIO_CFG
-SCSI_In_DBx__DB2__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF
-SCSI_In_DBx__DB2__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN
-SCSI_In_DBx__DB2__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ
-SCSI_In_DBx__DB2__SLW EQU CYREG_PRT12_SLW
-SCSI_In_DBx__DB3__AG EQU CYREG_PRT2_AG
-SCSI_In_DBx__DB3__AMUX EQU CYREG_PRT2_AMUX
-SCSI_In_DBx__DB3__BIE EQU CYREG_PRT2_BIE
-SCSI_In_DBx__DB3__BIT_MASK EQU CYREG_PRT2_BIT_MASK
-SCSI_In_DBx__DB3__BYP EQU CYREG_PRT2_BYP
-SCSI_In_DBx__DB3__CTL EQU CYREG_PRT2_CTL
-SCSI_In_DBx__DB3__DM0 EQU CYREG_PRT2_DM0
-SCSI_In_DBx__DB3__DM1 EQU CYREG_PRT2_DM1
-SCSI_In_DBx__DB3__DM2 EQU CYREG_PRT2_DM2
-SCSI_In_DBx__DB3__DR EQU CYREG_PRT2_DR
-SCSI_In_DBx__DB3__INP_DIS EQU CYREG_PRT2_INP_DIS
-SCSI_In_DBx__DB3__INTTYPE EQU CYREG_PICU2_INTTYPE6
-SCSI_In_DBx__DB3__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
-SCSI_In_DBx__DB3__LCD_EN EQU CYREG_PRT2_LCD_EN
-SCSI_In_DBx__DB3__MASK EQU 0x40
-SCSI_In_DBx__DB3__PC EQU CYREG_PRT2_PC6
-SCSI_In_DBx__DB3__PORT EQU 2
-SCSI_In_DBx__DB3__PRT EQU CYREG_PRT2_PRT
-SCSI_In_DBx__DB3__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
-SCSI_In_DBx__DB3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
-SCSI_In_DBx__DB3__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
-SCSI_In_DBx__DB3__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
-SCSI_In_DBx__DB3__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
-SCSI_In_DBx__DB3__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
-SCSI_In_DBx__DB3__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
-SCSI_In_DBx__DB3__PS EQU CYREG_PRT2_PS
-SCSI_In_DBx__DB3__SHIFT EQU 6
-SCSI_In_DBx__DB3__SLW EQU CYREG_PRT2_SLW
-SCSI_In_DBx__DB4__AG EQU CYREG_PRT2_AG
-SCSI_In_DBx__DB4__AMUX EQU CYREG_PRT2_AMUX
-SCSI_In_DBx__DB4__BIE EQU CYREG_PRT2_BIE
-SCSI_In_DBx__DB4__BIT_MASK EQU CYREG_PRT2_BIT_MASK
-SCSI_In_DBx__DB4__BYP EQU CYREG_PRT2_BYP
-SCSI_In_DBx__DB4__CTL EQU CYREG_PRT2_CTL
-SCSI_In_DBx__DB4__DM0 EQU CYREG_PRT2_DM0
-SCSI_In_DBx__DB4__DM1 EQU CYREG_PRT2_DM1
-SCSI_In_DBx__DB4__DM2 EQU CYREG_PRT2_DM2
-SCSI_In_DBx__DB4__DR EQU CYREG_PRT2_DR
-SCSI_In_DBx__DB4__INP_DIS EQU CYREG_PRT2_INP_DIS
-SCSI_In_DBx__DB4__INTTYPE EQU CYREG_PICU2_INTTYPE4
-SCSI_In_DBx__DB4__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
-SCSI_In_DBx__DB4__LCD_EN EQU CYREG_PRT2_LCD_EN
-SCSI_In_DBx__DB4__MASK EQU 0x10
-SCSI_In_DBx__DB4__PC EQU CYREG_PRT2_PC4
-SCSI_In_DBx__DB4__PORT EQU 2
-SCSI_In_DBx__DB4__PRT EQU CYREG_PRT2_PRT
-SCSI_In_DBx__DB4__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
-SCSI_In_DBx__DB4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
-SCSI_In_DBx__DB4__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
-SCSI_In_DBx__DB4__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
-SCSI_In_DBx__DB4__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
-SCSI_In_DBx__DB4__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
-SCSI_In_DBx__DB4__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
-SCSI_In_DBx__DB4__PS EQU CYREG_PRT2_PS
-SCSI_In_DBx__DB4__SHIFT EQU 4
-SCSI_In_DBx__DB4__SLW EQU CYREG_PRT2_SLW
-SCSI_In_DBx__DB5__AG EQU CYREG_PRT2_AG
-SCSI_In_DBx__DB5__AMUX EQU CYREG_PRT2_AMUX
-SCSI_In_DBx__DB5__BIE EQU CYREG_PRT2_BIE
-SCSI_In_DBx__DB5__BIT_MASK EQU CYREG_PRT2_BIT_MASK
-SCSI_In_DBx__DB5__BYP EQU CYREG_PRT2_BYP
-SCSI_In_DBx__DB5__CTL EQU CYREG_PRT2_CTL
-SCSI_In_DBx__DB5__DM0 EQU CYREG_PRT2_DM0
-SCSI_In_DBx__DB5__DM1 EQU CYREG_PRT2_DM1
-SCSI_In_DBx__DB5__DM2 EQU CYREG_PRT2_DM2
-SCSI_In_DBx__DB5__DR EQU CYREG_PRT2_DR
-SCSI_In_DBx__DB5__INP_DIS EQU CYREG_PRT2_INP_DIS
-SCSI_In_DBx__DB5__INTTYPE EQU CYREG_PICU2_INTTYPE2
-SCSI_In_DBx__DB5__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
-SCSI_In_DBx__DB5__LCD_EN EQU CYREG_PRT2_LCD_EN
-SCSI_In_DBx__DB5__MASK EQU 0x04
-SCSI_In_DBx__DB5__PC EQU CYREG_PRT2_PC2
-SCSI_In_DBx__DB5__PORT EQU 2
-SCSI_In_DBx__DB5__PRT EQU CYREG_PRT2_PRT
-SCSI_In_DBx__DB5__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
-SCSI_In_DBx__DB5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
-SCSI_In_DBx__DB5__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
-SCSI_In_DBx__DB5__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
-SCSI_In_DBx__DB5__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
-SCSI_In_DBx__DB5__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
-SCSI_In_DBx__DB5__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
-SCSI_In_DBx__DB5__PS EQU CYREG_PRT2_PS
-SCSI_In_DBx__DB5__SHIFT EQU 2
-SCSI_In_DBx__DB5__SLW EQU CYREG_PRT2_SLW
-SCSI_In_DBx__DB6__AG EQU CYREG_PRT2_AG
-SCSI_In_DBx__DB6__AMUX EQU CYREG_PRT2_AMUX
-SCSI_In_DBx__DB6__BIE EQU CYREG_PRT2_BIE
-SCSI_In_DBx__DB6__BIT_MASK EQU CYREG_PRT2_BIT_MASK
-SCSI_In_DBx__DB6__BYP EQU CYREG_PRT2_BYP
-SCSI_In_DBx__DB6__CTL EQU CYREG_PRT2_CTL
-SCSI_In_DBx__DB6__DM0 EQU CYREG_PRT2_DM0
-SCSI_In_DBx__DB6__DM1 EQU CYREG_PRT2_DM1
-SCSI_In_DBx__DB6__DM2 EQU CYREG_PRT2_DM2
-SCSI_In_DBx__DB6__DR EQU CYREG_PRT2_DR
-SCSI_In_DBx__DB6__INP_DIS EQU CYREG_PRT2_INP_DIS
-SCSI_In_DBx__DB6__INTTYPE EQU CYREG_PICU2_INTTYPE0
-SCSI_In_DBx__DB6__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
-SCSI_In_DBx__DB6__LCD_EN EQU CYREG_PRT2_LCD_EN
-SCSI_In_DBx__DB6__MASK EQU 0x01
-SCSI_In_DBx__DB6__PC EQU CYREG_PRT2_PC0
-SCSI_In_DBx__DB6__PORT EQU 2
-SCSI_In_DBx__DB6__PRT EQU CYREG_PRT2_PRT
-SCSI_In_DBx__DB6__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
-SCSI_In_DBx__DB6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
-SCSI_In_DBx__DB6__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
-SCSI_In_DBx__DB6__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
-SCSI_In_DBx__DB6__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
-SCSI_In_DBx__DB6__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
-SCSI_In_DBx__DB6__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
-SCSI_In_DBx__DB6__PS EQU CYREG_PRT2_PS
-SCSI_In_DBx__DB6__SHIFT EQU 0
-SCSI_In_DBx__DB6__SLW EQU CYREG_PRT2_SLW
-SCSI_In_DBx__DB7__AG EQU CYREG_PRT6_AG
-SCSI_In_DBx__DB7__AMUX EQU CYREG_PRT6_AMUX
-SCSI_In_DBx__DB7__BIE EQU CYREG_PRT6_BIE
-SCSI_In_DBx__DB7__BIT_MASK EQU CYREG_PRT6_BIT_MASK
-SCSI_In_DBx__DB7__BYP EQU CYREG_PRT6_BYP
-SCSI_In_DBx__DB7__CTL EQU CYREG_PRT6_CTL
-SCSI_In_DBx__DB7__DM0 EQU CYREG_PRT6_DM0
-SCSI_In_DBx__DB7__DM1 EQU CYREG_PRT6_DM1
-SCSI_In_DBx__DB7__DM2 EQU CYREG_PRT6_DM2
-SCSI_In_DBx__DB7__DR EQU CYREG_PRT6_DR
-SCSI_In_DBx__DB7__INP_DIS EQU CYREG_PRT6_INP_DIS
-SCSI_In_DBx__DB7__INTTYPE EQU CYREG_PICU6_INTTYPE3
-SCSI_In_DBx__DB7__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
-SCSI_In_DBx__DB7__LCD_EN EQU CYREG_PRT6_LCD_EN
-SCSI_In_DBx__DB7__MASK EQU 0x08
-SCSI_In_DBx__DB7__PC EQU CYREG_PRT6_PC3
-SCSI_In_DBx__DB7__PORT EQU 6
-SCSI_In_DBx__DB7__PRT EQU CYREG_PRT6_PRT
-SCSI_In_DBx__DB7__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
-SCSI_In_DBx__DB7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
-SCSI_In_DBx__DB7__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
-SCSI_In_DBx__DB7__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
-SCSI_In_DBx__DB7__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
-SCSI_In_DBx__DB7__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
-SCSI_In_DBx__DB7__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
-SCSI_In_DBx__DB7__PS EQU CYREG_PRT6_PS
-SCSI_In_DBx__DB7__SHIFT EQU 3
-SCSI_In_DBx__DB7__SLW EQU CYREG_PRT6_SLW
-
-/* SCSI_Noise */
-SCSI_Noise__0__AG EQU CYREG_PRT4_AG
-SCSI_Noise__0__AMUX EQU CYREG_PRT4_AMUX
-SCSI_Noise__0__BIE EQU CYREG_PRT4_BIE
-SCSI_Noise__0__BIT_MASK EQU CYREG_PRT4_BIT_MASK
-SCSI_Noise__0__BYP EQU CYREG_PRT4_BYP
-SCSI_Noise__0__CTL EQU CYREG_PRT4_CTL
-SCSI_Noise__0__DM0 EQU CYREG_PRT4_DM0
-SCSI_Noise__0__DM1 EQU CYREG_PRT4_DM1
-SCSI_Noise__0__DM2 EQU CYREG_PRT4_DM2
-SCSI_Noise__0__DR EQU CYREG_PRT4_DR
-SCSI_Noise__0__INP_DIS EQU CYREG_PRT4_INP_DIS
-SCSI_Noise__0__INTTYPE EQU CYREG_PICU4_INTTYPE7
-SCSI_Noise__0__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
-SCSI_Noise__0__LCD_EN EQU CYREG_PRT4_LCD_EN
-SCSI_Noise__0__MASK EQU 0x80
-SCSI_Noise__0__PC EQU CYREG_PRT4_PC7
-SCSI_Noise__0__PORT EQU 4
-SCSI_Noise__0__PRT EQU CYREG_PRT4_PRT
-SCSI_Noise__0__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
-SCSI_Noise__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
-SCSI_Noise__0__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
-SCSI_Noise__0__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
-SCSI_Noise__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
-SCSI_Noise__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
-SCSI_Noise__0__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
-SCSI_Noise__0__PS EQU CYREG_PRT4_PS
-SCSI_Noise__0__SHIFT EQU 7
-SCSI_Noise__0__SLW EQU CYREG_PRT4_SLW
-SCSI_Noise__1__AG EQU CYREG_PRT4_AG
-SCSI_Noise__1__AMUX EQU CYREG_PRT4_AMUX
-SCSI_Noise__1__BIE EQU CYREG_PRT4_BIE
-SCSI_Noise__1__BIT_MASK EQU CYREG_PRT4_BIT_MASK
-SCSI_Noise__1__BYP EQU CYREG_PRT4_BYP
-SCSI_Noise__1__CTL EQU CYREG_PRT4_CTL
-SCSI_Noise__1__DM0 EQU CYREG_PRT4_DM0
-SCSI_Noise__1__DM1 EQU CYREG_PRT4_DM1
-SCSI_Noise__1__DM2 EQU CYREG_PRT4_DM2
-SCSI_Noise__1__DR EQU CYREG_PRT4_DR
-SCSI_Noise__1__INP_DIS EQU CYREG_PRT4_INP_DIS
-SCSI_Noise__1__INTTYPE EQU CYREG_PICU4_INTTYPE5
-SCSI_Noise__1__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
-SCSI_Noise__1__LCD_EN EQU CYREG_PRT4_LCD_EN
-SCSI_Noise__1__MASK EQU 0x20
-SCSI_Noise__1__PC EQU CYREG_PRT4_PC5
-SCSI_Noise__1__PORT EQU 4
-SCSI_Noise__1__PRT EQU CYREG_PRT4_PRT
-SCSI_Noise__1__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
-SCSI_Noise__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
-SCSI_Noise__1__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
-SCSI_Noise__1__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
-SCSI_Noise__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
-SCSI_Noise__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
-SCSI_Noise__1__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
-SCSI_Noise__1__PS EQU CYREG_PRT4_PS
-SCSI_Noise__1__SHIFT EQU 5
-SCSI_Noise__1__SLW EQU CYREG_PRT4_SLW
-SCSI_Noise__2__AG EQU CYREG_PRT0_AG
-SCSI_Noise__2__AMUX EQU CYREG_PRT0_AMUX
-SCSI_Noise__2__BIE EQU CYREG_PRT0_BIE
-SCSI_Noise__2__BIT_MASK EQU CYREG_PRT0_BIT_MASK
-SCSI_Noise__2__BYP EQU CYREG_PRT0_BYP
-SCSI_Noise__2__CTL EQU CYREG_PRT0_CTL
-SCSI_Noise__2__DM0 EQU CYREG_PRT0_DM0
-SCSI_Noise__2__DM1 EQU CYREG_PRT0_DM1
-SCSI_Noise__2__DM2 EQU CYREG_PRT0_DM2
-SCSI_Noise__2__DR EQU CYREG_PRT0_DR
-SCSI_Noise__2__INP_DIS EQU CYREG_PRT0_INP_DIS
-SCSI_Noise__2__INTTYPE EQU CYREG_PICU0_INTTYPE2
-SCSI_Noise__2__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
-SCSI_Noise__2__LCD_EN EQU CYREG_PRT0_LCD_EN
-SCSI_Noise__2__MASK EQU 0x04
-SCSI_Noise__2__PC EQU CYREG_PRT0_PC2
-SCSI_Noise__2__PORT EQU 0
-SCSI_Noise__2__PRT EQU CYREG_PRT0_PRT
-SCSI_Noise__2__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
-SCSI_Noise__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
-SCSI_Noise__2__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
-SCSI_Noise__2__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
-SCSI_Noise__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
-SCSI_Noise__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
-SCSI_Noise__2__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
-SCSI_Noise__2__PS EQU CYREG_PRT0_PS
-SCSI_Noise__2__SHIFT EQU 2
-SCSI_Noise__2__SLW EQU CYREG_PRT0_SLW
-SCSI_Noise__3__AG EQU CYREG_PRT0_AG
-SCSI_Noise__3__AMUX EQU CYREG_PRT0_AMUX
-SCSI_Noise__3__BIE EQU CYREG_PRT0_BIE
-SCSI_Noise__3__BIT_MASK EQU CYREG_PRT0_BIT_MASK
-SCSI_Noise__3__BYP EQU CYREG_PRT0_BYP
-SCSI_Noise__3__CTL EQU CYREG_PRT0_CTL
-SCSI_Noise__3__DM0 EQU CYREG_PRT0_DM0
-SCSI_Noise__3__DM1 EQU CYREG_PRT0_DM1
-SCSI_Noise__3__DM2 EQU CYREG_PRT0_DM2
-SCSI_Noise__3__DR EQU CYREG_PRT0_DR
-SCSI_Noise__3__INP_DIS EQU CYREG_PRT0_INP_DIS
-SCSI_Noise__3__INTTYPE EQU CYREG_PICU0_INTTYPE6
-SCSI_Noise__3__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
-SCSI_Noise__3__LCD_EN EQU CYREG_PRT0_LCD_EN
-SCSI_Noise__3__MASK EQU 0x40
-SCSI_Noise__3__PC EQU CYREG_PRT0_PC6
-SCSI_Noise__3__PORT EQU 0
-SCSI_Noise__3__PRT EQU CYREG_PRT0_PRT
-SCSI_Noise__3__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
-SCSI_Noise__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
-SCSI_Noise__3__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
-SCSI_Noise__3__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
-SCSI_Noise__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
-SCSI_Noise__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
-SCSI_Noise__3__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
-SCSI_Noise__3__PS EQU CYREG_PRT0_PS
-SCSI_Noise__3__SHIFT EQU 6
-SCSI_Noise__3__SLW EQU CYREG_PRT0_SLW
-SCSI_Noise__4__AG EQU CYREG_PRT4_AG
-SCSI_Noise__4__AMUX EQU CYREG_PRT4_AMUX
-SCSI_Noise__4__BIE EQU CYREG_PRT4_BIE
-SCSI_Noise__4__BIT_MASK EQU CYREG_PRT4_BIT_MASK
-SCSI_Noise__4__BYP EQU CYREG_PRT4_BYP
-SCSI_Noise__4__CTL EQU CYREG_PRT4_CTL
-SCSI_Noise__4__DM0 EQU CYREG_PRT4_DM0
-SCSI_Noise__4__DM1 EQU CYREG_PRT4_DM1
-SCSI_Noise__4__DM2 EQU CYREG_PRT4_DM2
-SCSI_Noise__4__DR EQU CYREG_PRT4_DR
-SCSI_Noise__4__INP_DIS EQU CYREG_PRT4_INP_DIS
-SCSI_Noise__4__INTTYPE EQU CYREG_PICU4_INTTYPE3
-SCSI_Noise__4__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
-SCSI_Noise__4__LCD_EN EQU CYREG_PRT4_LCD_EN
-SCSI_Noise__4__MASK EQU 0x08
-SCSI_Noise__4__PC EQU CYREG_PRT4_PC3
-SCSI_Noise__4__PORT EQU 4
-SCSI_Noise__4__PRT EQU CYREG_PRT4_PRT
-SCSI_Noise__4__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
-SCSI_Noise__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
-SCSI_Noise__4__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
-SCSI_Noise__4__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
-SCSI_Noise__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
-SCSI_Noise__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
-SCSI_Noise__4__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
-SCSI_Noise__4__PS EQU CYREG_PRT4_PS
-SCSI_Noise__4__SHIFT EQU 3
-SCSI_Noise__4__SLW EQU CYREG_PRT4_SLW
-SCSI_Noise__ACK__AG EQU CYREG_PRT4_AG
-SCSI_Noise__ACK__AMUX EQU CYREG_PRT4_AMUX
-SCSI_Noise__ACK__BIE EQU CYREG_PRT4_BIE
-SCSI_Noise__ACK__BIT_MASK EQU CYREG_PRT4_BIT_MASK
-SCSI_Noise__ACK__BYP EQU CYREG_PRT4_BYP
-SCSI_Noise__ACK__CTL EQU CYREG_PRT4_CTL
-SCSI_Noise__ACK__DM0 EQU CYREG_PRT4_DM0
-SCSI_Noise__ACK__DM1 EQU CYREG_PRT4_DM1
-SCSI_Noise__ACK__DM2 EQU CYREG_PRT4_DM2
-SCSI_Noise__ACK__DR EQU CYREG_PRT4_DR
-SCSI_Noise__ACK__INP_DIS EQU CYREG_PRT4_INP_DIS
-SCSI_Noise__ACK__INTTYPE EQU CYREG_PICU4_INTTYPE3
-SCSI_Noise__ACK__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
-SCSI_Noise__ACK__LCD_EN EQU CYREG_PRT4_LCD_EN
-SCSI_Noise__ACK__MASK EQU 0x08
-SCSI_Noise__ACK__PC EQU CYREG_PRT4_PC3
-SCSI_Noise__ACK__PORT EQU 4
-SCSI_Noise__ACK__PRT EQU CYREG_PRT4_PRT
-SCSI_Noise__ACK__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
-SCSI_Noise__ACK__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
-SCSI_Noise__ACK__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
-SCSI_Noise__ACK__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
-SCSI_Noise__ACK__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
-SCSI_Noise__ACK__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
-SCSI_Noise__ACK__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
-SCSI_Noise__ACK__PS EQU CYREG_PRT4_PS
-SCSI_Noise__ACK__SHIFT EQU 3
-SCSI_Noise__ACK__SLW EQU CYREG_PRT4_SLW
-SCSI_Noise__ATN__AG EQU CYREG_PRT4_AG
-SCSI_Noise__ATN__AMUX EQU CYREG_PRT4_AMUX
-SCSI_Noise__ATN__BIE EQU CYREG_PRT4_BIE
-SCSI_Noise__ATN__BIT_MASK EQU CYREG_PRT4_BIT_MASK
-SCSI_Noise__ATN__BYP EQU CYREG_PRT4_BYP
-SCSI_Noise__ATN__CTL EQU CYREG_PRT4_CTL
-SCSI_Noise__ATN__DM0 EQU CYREG_PRT4_DM0
-SCSI_Noise__ATN__DM1 EQU CYREG_PRT4_DM1
-SCSI_Noise__ATN__DM2 EQU CYREG_PRT4_DM2
-SCSI_Noise__ATN__DR EQU CYREG_PRT4_DR
-SCSI_Noise__ATN__INP_DIS EQU CYREG_PRT4_INP_DIS
-SCSI_Noise__ATN__INTTYPE EQU CYREG_PICU4_INTTYPE7
-SCSI_Noise__ATN__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
-SCSI_Noise__ATN__LCD_EN EQU CYREG_PRT4_LCD_EN
-SCSI_Noise__ATN__MASK EQU 0x80
-SCSI_Noise__ATN__PC EQU CYREG_PRT4_PC7
-SCSI_Noise__ATN__PORT EQU 4
-SCSI_Noise__ATN__PRT EQU CYREG_PRT4_PRT
-SCSI_Noise__ATN__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
-SCSI_Noise__ATN__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
-SCSI_Noise__ATN__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
-SCSI_Noise__ATN__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
-SCSI_Noise__ATN__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
-SCSI_Noise__ATN__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
-SCSI_Noise__ATN__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
-SCSI_Noise__ATN__PS EQU CYREG_PRT4_PS
-SCSI_Noise__ATN__SHIFT EQU 7
-SCSI_Noise__ATN__SLW EQU CYREG_PRT4_SLW
-SCSI_Noise__BSY__AG EQU CYREG_PRT4_AG
-SCSI_Noise__BSY__AMUX EQU CYREG_PRT4_AMUX
-SCSI_Noise__BSY__BIE EQU CYREG_PRT4_BIE
-SCSI_Noise__BSY__BIT_MASK EQU CYREG_PRT4_BIT_MASK
-SCSI_Noise__BSY__BYP EQU CYREG_PRT4_BYP
-SCSI_Noise__BSY__CTL EQU CYREG_PRT4_CTL
-SCSI_Noise__BSY__DM0 EQU CYREG_PRT4_DM0
-SCSI_Noise__BSY__DM1 EQU CYREG_PRT4_DM1
-SCSI_Noise__BSY__DM2 EQU CYREG_PRT4_DM2
-SCSI_Noise__BSY__DR EQU CYREG_PRT4_DR
-SCSI_Noise__BSY__INP_DIS EQU CYREG_PRT4_INP_DIS
-SCSI_Noise__BSY__INTTYPE EQU CYREG_PICU4_INTTYPE5
-SCSI_Noise__BSY__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
-SCSI_Noise__BSY__LCD_EN EQU CYREG_PRT4_LCD_EN
-SCSI_Noise__BSY__MASK EQU 0x20
-SCSI_Noise__BSY__PC EQU CYREG_PRT4_PC5
-SCSI_Noise__BSY__PORT EQU 4
-SCSI_Noise__BSY__PRT EQU CYREG_PRT4_PRT
-SCSI_Noise__BSY__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
-SCSI_Noise__BSY__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
-SCSI_Noise__BSY__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
-SCSI_Noise__BSY__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
-SCSI_Noise__BSY__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
-SCSI_Noise__BSY__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
-SCSI_Noise__BSY__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
-SCSI_Noise__BSY__PS EQU CYREG_PRT4_PS
-SCSI_Noise__BSY__SHIFT EQU 5
-SCSI_Noise__BSY__SLW EQU CYREG_PRT4_SLW
-SCSI_Noise__RST__AG EQU CYREG_PRT0_AG
-SCSI_Noise__RST__AMUX EQU CYREG_PRT0_AMUX
-SCSI_Noise__RST__BIE EQU CYREG_PRT0_BIE
-SCSI_Noise__RST__BIT_MASK EQU CYREG_PRT0_BIT_MASK
-SCSI_Noise__RST__BYP EQU CYREG_PRT0_BYP
-SCSI_Noise__RST__CTL EQU CYREG_PRT0_CTL
-SCSI_Noise__RST__DM0 EQU CYREG_PRT0_DM0
-SCSI_Noise__RST__DM1 EQU CYREG_PRT0_DM1
-SCSI_Noise__RST__DM2 EQU CYREG_PRT0_DM2
-SCSI_Noise__RST__DR EQU CYREG_PRT0_DR
-SCSI_Noise__RST__INP_DIS EQU CYREG_PRT0_INP_DIS
-SCSI_Noise__RST__INTTYPE EQU CYREG_PICU0_INTTYPE6
-SCSI_Noise__RST__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
-SCSI_Noise__RST__LCD_EN EQU CYREG_PRT0_LCD_EN
-SCSI_Noise__RST__MASK EQU 0x40
-SCSI_Noise__RST__PC EQU CYREG_PRT0_PC6
-SCSI_Noise__RST__PORT EQU 0
-SCSI_Noise__RST__PRT EQU CYREG_PRT0_PRT
-SCSI_Noise__RST__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
-SCSI_Noise__RST__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
-SCSI_Noise__RST__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
-SCSI_Noise__RST__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
-SCSI_Noise__RST__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
-SCSI_Noise__RST__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
-SCSI_Noise__RST__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
-SCSI_Noise__RST__PS EQU CYREG_PRT0_PS
-SCSI_Noise__RST__SHIFT EQU 6
-SCSI_Noise__RST__SLW EQU CYREG_PRT0_SLW
-SCSI_Noise__SEL__AG EQU CYREG_PRT0_AG
-SCSI_Noise__SEL__AMUX EQU CYREG_PRT0_AMUX
-SCSI_Noise__SEL__BIE EQU CYREG_PRT0_BIE
-SCSI_Noise__SEL__BIT_MASK EQU CYREG_PRT0_BIT_MASK
-SCSI_Noise__SEL__BYP EQU CYREG_PRT0_BYP
-SCSI_Noise__SEL__CTL EQU CYREG_PRT0_CTL
-SCSI_Noise__SEL__DM0 EQU CYREG_PRT0_DM0
-SCSI_Noise__SEL__DM1 EQU CYREG_PRT0_DM1
-SCSI_Noise__SEL__DM2 EQU CYREG_PRT0_DM2
-SCSI_Noise__SEL__DR EQU CYREG_PRT0_DR
-SCSI_Noise__SEL__INP_DIS EQU CYREG_PRT0_INP_DIS
-SCSI_Noise__SEL__INTTYPE EQU CYREG_PICU0_INTTYPE2
-SCSI_Noise__SEL__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
-SCSI_Noise__SEL__LCD_EN EQU CYREG_PRT0_LCD_EN
-SCSI_Noise__SEL__MASK EQU 0x04
-SCSI_Noise__SEL__PC EQU CYREG_PRT0_PC2
-SCSI_Noise__SEL__PORT EQU 0
-SCSI_Noise__SEL__PRT EQU CYREG_PRT0_PRT
-SCSI_Noise__SEL__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
-SCSI_Noise__SEL__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
-SCSI_Noise__SEL__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
-SCSI_Noise__SEL__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
-SCSI_Noise__SEL__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
-SCSI_Noise__SEL__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
-SCSI_Noise__SEL__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
-SCSI_Noise__SEL__PS EQU CYREG_PRT0_PS
-SCSI_Noise__SEL__SHIFT EQU 2
-SCSI_Noise__SEL__SLW EQU CYREG_PRT0_SLW
-
-/* SCSI_Out */
-SCSI_Out__0__AG EQU CYREG_PRT6_AG
-SCSI_Out__0__AMUX EQU CYREG_PRT6_AMUX
-SCSI_Out__0__BIE EQU CYREG_PRT6_BIE
-SCSI_Out__0__BIT_MASK EQU CYREG_PRT6_BIT_MASK
-SCSI_Out__0__BYP EQU CYREG_PRT6_BYP
-SCSI_Out__0__CTL EQU CYREG_PRT6_CTL
-SCSI_Out__0__DM0 EQU CYREG_PRT6_DM0
-SCSI_Out__0__DM1 EQU CYREG_PRT6_DM1
-SCSI_Out__0__DM2 EQU CYREG_PRT6_DM2
-SCSI_Out__0__DR EQU CYREG_PRT6_DR
-SCSI_Out__0__INP_DIS EQU CYREG_PRT6_INP_DIS
-SCSI_Out__0__INTTYPE EQU CYREG_PICU6_INTTYPE2
-SCSI_Out__0__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
-SCSI_Out__0__LCD_EN EQU CYREG_PRT6_LCD_EN
-SCSI_Out__0__MASK EQU 0x04
-SCSI_Out__0__PC EQU CYREG_PRT6_PC2
-SCSI_Out__0__PORT EQU 6
-SCSI_Out__0__PRT EQU CYREG_PRT6_PRT
-SCSI_Out__0__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
-SCSI_Out__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
-SCSI_Out__0__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
-SCSI_Out__0__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
-SCSI_Out__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
-SCSI_Out__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
-SCSI_Out__0__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
-SCSI_Out__0__PS EQU CYREG_PRT6_PS
-SCSI_Out__0__SHIFT EQU 2
-SCSI_Out__0__SLW EQU CYREG_PRT6_SLW
-SCSI_Out__1__AG EQU CYREG_PRT4_AG
-SCSI_Out__1__AMUX EQU CYREG_PRT4_AMUX
-SCSI_Out__1__BIE EQU CYREG_PRT4_BIE
-SCSI_Out__1__BIT_MASK EQU CYREG_PRT4_BIT_MASK
-SCSI_Out__1__BYP EQU CYREG_PRT4_BYP
-SCSI_Out__1__CTL EQU CYREG_PRT4_CTL
-SCSI_Out__1__DM0 EQU CYREG_PRT4_DM0
-SCSI_Out__1__DM1 EQU CYREG_PRT4_DM1
-SCSI_Out__1__DM2 EQU CYREG_PRT4_DM2
-SCSI_Out__1__DR EQU CYREG_PRT4_DR
-SCSI_Out__1__INP_DIS EQU CYREG_PRT4_INP_DIS
-SCSI_Out__1__INTTYPE EQU CYREG_PICU4_INTTYPE6
-SCSI_Out__1__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
-SCSI_Out__1__LCD_EN EQU CYREG_PRT4_LCD_EN
-SCSI_Out__1__MASK EQU 0x40
-SCSI_Out__1__PC EQU CYREG_PRT4_PC6
-SCSI_Out__1__PORT EQU 4
-SCSI_Out__1__PRT EQU CYREG_PRT4_PRT
-SCSI_Out__1__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
-SCSI_Out__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
-SCSI_Out__1__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
-SCSI_Out__1__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
-SCSI_Out__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
-SCSI_Out__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
-SCSI_Out__1__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
-SCSI_Out__1__PS EQU CYREG_PRT4_PS
-SCSI_Out__1__SHIFT EQU 6
-SCSI_Out__1__SLW EQU CYREG_PRT4_SLW
-SCSI_Out__2__AG EQU CYREG_PRT0_AG
-SCSI_Out__2__AMUX EQU CYREG_PRT0_AMUX
-SCSI_Out__2__BIE EQU CYREG_PRT0_BIE
-SCSI_Out__2__BIT_MASK EQU CYREG_PRT0_BIT_MASK
-SCSI_Out__2__BYP EQU CYREG_PRT0_BYP
-SCSI_Out__2__CTL EQU CYREG_PRT0_CTL
-SCSI_Out__2__DM0 EQU CYREG_PRT0_DM0
-SCSI_Out__2__DM1 EQU CYREG_PRT0_DM1
-SCSI_Out__2__DM2 EQU CYREG_PRT0_DM2
-SCSI_Out__2__DR EQU CYREG_PRT0_DR
-SCSI_Out__2__INP_DIS EQU CYREG_PRT0_INP_DIS
-SCSI_Out__2__INTTYPE EQU CYREG_PICU0_INTTYPE7
-SCSI_Out__2__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
-SCSI_Out__2__LCD_EN EQU CYREG_PRT0_LCD_EN
-SCSI_Out__2__MASK EQU 0x80
-SCSI_Out__2__PC EQU CYREG_PRT0_PC7
-SCSI_Out__2__PORT EQU 0
-SCSI_Out__2__PRT EQU CYREG_PRT0_PRT
-SCSI_Out__2__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
-SCSI_Out__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
-SCSI_Out__2__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
-SCSI_Out__2__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
-SCSI_Out__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
-SCSI_Out__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
-SCSI_Out__2__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
-SCSI_Out__2__PS EQU CYREG_PRT0_PS
-SCSI_Out__2__SHIFT EQU 7
-SCSI_Out__2__SLW EQU CYREG_PRT0_SLW
-SCSI_Out__3__AG EQU CYREG_PRT0_AG
-SCSI_Out__3__AMUX EQU CYREG_PRT0_AMUX
-SCSI_Out__3__BIE EQU CYREG_PRT0_BIE
-SCSI_Out__3__BIT_MASK EQU CYREG_PRT0_BIT_MASK
-SCSI_Out__3__BYP EQU CYREG_PRT0_BYP
-SCSI_Out__3__CTL EQU CYREG_PRT0_CTL
-SCSI_Out__3__DM0 EQU CYREG_PRT0_DM0
-SCSI_Out__3__DM1 EQU CYREG_PRT0_DM1
-SCSI_Out__3__DM2 EQU CYREG_PRT0_DM2
-SCSI_Out__3__DR EQU CYREG_PRT0_DR
-SCSI_Out__3__INP_DIS EQU CYREG_PRT0_INP_DIS
-SCSI_Out__3__INTTYPE EQU CYREG_PICU0_INTTYPE5
-SCSI_Out__3__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
-SCSI_Out__3__LCD_EN EQU CYREG_PRT0_LCD_EN
-SCSI_Out__3__MASK EQU 0x20
-SCSI_Out__3__PC EQU CYREG_PRT0_PC5
-SCSI_Out__3__PORT EQU 0
-SCSI_Out__3__PRT EQU CYREG_PRT0_PRT
-SCSI_Out__3__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
-SCSI_Out__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
-SCSI_Out__3__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
-SCSI_Out__3__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
-SCSI_Out__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
-SCSI_Out__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
-SCSI_Out__3__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
-SCSI_Out__3__PS EQU CYREG_PRT0_PS
-SCSI_Out__3__SHIFT EQU 5
-SCSI_Out__3__SLW EQU CYREG_PRT0_SLW
-SCSI_Out__4__AG EQU CYREG_PRT0_AG
-SCSI_Out__4__AMUX EQU CYREG_PRT0_AMUX
-SCSI_Out__4__BIE EQU CYREG_PRT0_BIE
-SCSI_Out__4__BIT_MASK EQU CYREG_PRT0_BIT_MASK
-SCSI_Out__4__BYP EQU CYREG_PRT0_BYP
-SCSI_Out__4__CTL EQU CYREG_PRT0_CTL
-SCSI_Out__4__DM0 EQU CYREG_PRT0_DM0
-SCSI_Out__4__DM1 EQU CYREG_PRT0_DM1
-SCSI_Out__4__DM2 EQU CYREG_PRT0_DM2
-SCSI_Out__4__DR EQU CYREG_PRT0_DR
-SCSI_Out__4__INP_DIS EQU CYREG_PRT0_INP_DIS
-SCSI_Out__4__INTTYPE EQU CYREG_PICU0_INTTYPE3
-SCSI_Out__4__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
-SCSI_Out__4__LCD_EN EQU CYREG_PRT0_LCD_EN
-SCSI_Out__4__MASK EQU 0x08
-SCSI_Out__4__PC EQU CYREG_PRT0_PC3
-SCSI_Out__4__PORT EQU 0
-SCSI_Out__4__PRT EQU CYREG_PRT0_PRT
-SCSI_Out__4__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
-SCSI_Out__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
-SCSI_Out__4__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
-SCSI_Out__4__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
-SCSI_Out__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
-SCSI_Out__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
-SCSI_Out__4__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
-SCSI_Out__4__PS EQU CYREG_PRT0_PS
-SCSI_Out__4__SHIFT EQU 3
-SCSI_Out__4__SLW EQU CYREG_PRT0_SLW
-SCSI_Out__5__AG EQU CYREG_PRT0_AG
-SCSI_Out__5__AMUX EQU CYREG_PRT0_AMUX
-SCSI_Out__5__BIE EQU CYREG_PRT0_BIE
-SCSI_Out__5__BIT_MASK EQU CYREG_PRT0_BIT_MASK
-SCSI_Out__5__BYP EQU CYREG_PRT0_BYP
-SCSI_Out__5__CTL EQU CYREG_PRT0_CTL
-SCSI_Out__5__DM0 EQU CYREG_PRT0_DM0
-SCSI_Out__5__DM1 EQU CYREG_PRT0_DM1
-SCSI_Out__5__DM2 EQU CYREG_PRT0_DM2
-SCSI_Out__5__DR EQU CYREG_PRT0_DR
-SCSI_Out__5__INP_DIS EQU CYREG_PRT0_INP_DIS
-SCSI_Out__5__INTTYPE EQU CYREG_PICU0_INTTYPE1
-SCSI_Out__5__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
-SCSI_Out__5__LCD_EN EQU CYREG_PRT0_LCD_EN
-SCSI_Out__5__MASK EQU 0x02
-SCSI_Out__5__PC EQU CYREG_PRT0_PC1
-SCSI_Out__5__PORT EQU 0
-SCSI_Out__5__PRT EQU CYREG_PRT0_PRT
-SCSI_Out__5__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
-SCSI_Out__5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
-SCSI_Out__5__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
-SCSI_Out__5__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
-SCSI_Out__5__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
-SCSI_Out__5__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
-SCSI_Out__5__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
-SCSI_Out__5__PS EQU CYREG_PRT0_PS
-SCSI_Out__5__SHIFT EQU 1
-SCSI_Out__5__SLW EQU CYREG_PRT0_SLW
-SCSI_Out__6__AG EQU CYREG_PRT4_AG
-SCSI_Out__6__AMUX EQU CYREG_PRT4_AMUX
-SCSI_Out__6__BIE EQU CYREG_PRT4_BIE
-SCSI_Out__6__BIT_MASK EQU CYREG_PRT4_BIT_MASK
-SCSI_Out__6__BYP EQU CYREG_PRT4_BYP
-SCSI_Out__6__CTL EQU CYREG_PRT4_CTL
-SCSI_Out__6__DM0 EQU CYREG_PRT4_DM0
-SCSI_Out__6__DM1 EQU CYREG_PRT4_DM1
-SCSI_Out__6__DM2 EQU CYREG_PRT4_DM2
-SCSI_Out__6__DR EQU CYREG_PRT4_DR
-SCSI_Out__6__INP_DIS EQU CYREG_PRT4_INP_DIS
-SCSI_Out__6__INTTYPE EQU CYREG_PICU4_INTTYPE1
-SCSI_Out__6__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
-SCSI_Out__6__LCD_EN EQU CYREG_PRT4_LCD_EN
-SCSI_Out__6__MASK EQU 0x02
-SCSI_Out__6__PC EQU CYREG_PRT4_PC1
-SCSI_Out__6__PORT EQU 4
-SCSI_Out__6__PRT EQU CYREG_PRT4_PRT
-SCSI_Out__6__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
-SCSI_Out__6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
-SCSI_Out__6__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
-SCSI_Out__6__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
-SCSI_Out__6__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
-SCSI_Out__6__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
-SCSI_Out__6__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
-SCSI_Out__6__PS EQU CYREG_PRT4_PS
-SCSI_Out__6__SHIFT EQU 1
-SCSI_Out__6__SLW EQU CYREG_PRT4_SLW
-SCSI_Out__7__AG EQU CYREG_PRT12_AG
-SCSI_Out__7__BIE EQU CYREG_PRT12_BIE
-SCSI_Out__7__BIT_MASK EQU CYREG_PRT12_BIT_MASK
-SCSI_Out__7__BYP EQU CYREG_PRT12_BYP
-SCSI_Out__7__DM0 EQU CYREG_PRT12_DM0
-SCSI_Out__7__DM1 EQU CYREG_PRT12_DM1
-SCSI_Out__7__DM2 EQU CYREG_PRT12_DM2
-SCSI_Out__7__DR EQU CYREG_PRT12_DR
-SCSI_Out__7__INP_DIS EQU CYREG_PRT12_INP_DIS
-SCSI_Out__7__INTTYPE EQU CYREG_PICU12_INTTYPE3
-SCSI_Out__7__MASK EQU 0x08
-SCSI_Out__7__PC EQU CYREG_PRT12_PC3
-SCSI_Out__7__PORT EQU 12
-SCSI_Out__7__PRT EQU CYREG_PRT12_PRT
-SCSI_Out__7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN
-SCSI_Out__7__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0
-SCSI_Out__7__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1
-SCSI_Out__7__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0
-SCSI_Out__7__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1
-SCSI_Out__7__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT
-SCSI_Out__7__PS EQU CYREG_PRT12_PS
-SCSI_Out__7__SHIFT EQU 3
-SCSI_Out__7__SIO_CFG EQU CYREG_PRT12_SIO_CFG
-SCSI_Out__7__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF
-SCSI_Out__7__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN
-SCSI_Out__7__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ
-SCSI_Out__7__SLW EQU CYREG_PRT12_SLW
-SCSI_Out__BSY__AG EQU CYREG_PRT4_AG
-SCSI_Out__BSY__AMUX EQU CYREG_PRT4_AMUX
-SCSI_Out__BSY__BIE EQU CYREG_PRT4_BIE
-SCSI_Out__BSY__BIT_MASK EQU CYREG_PRT4_BIT_MASK
-SCSI_Out__BSY__BYP EQU CYREG_PRT4_BYP
-SCSI_Out__BSY__CTL EQU CYREG_PRT4_CTL
-SCSI_Out__BSY__DM0 EQU CYREG_PRT4_DM0
-SCSI_Out__BSY__DM1 EQU CYREG_PRT4_DM1
-SCSI_Out__BSY__DM2 EQU CYREG_PRT4_DM2
-SCSI_Out__BSY__DR EQU CYREG_PRT4_DR
-SCSI_Out__BSY__INP_DIS EQU CYREG_PRT4_INP_DIS
-SCSI_Out__BSY__INTTYPE EQU CYREG_PICU4_INTTYPE6
-SCSI_Out__BSY__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
-SCSI_Out__BSY__LCD_EN EQU CYREG_PRT4_LCD_EN
-SCSI_Out__BSY__MASK EQU 0x40
-SCSI_Out__BSY__PC EQU CYREG_PRT4_PC6
-SCSI_Out__BSY__PORT EQU 4
-SCSI_Out__BSY__PRT EQU CYREG_PRT4_PRT
-SCSI_Out__BSY__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
-SCSI_Out__BSY__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
-SCSI_Out__BSY__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
-SCSI_Out__BSY__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
-SCSI_Out__BSY__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
-SCSI_Out__BSY__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
-SCSI_Out__BSY__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
-SCSI_Out__BSY__PS EQU CYREG_PRT4_PS
-SCSI_Out__BSY__SHIFT EQU 6
-SCSI_Out__BSY__SLW EQU CYREG_PRT4_SLW
-SCSI_Out__CD_raw__AG EQU CYREG_PRT0_AG
-SCSI_Out__CD_raw__AMUX EQU CYREG_PRT0_AMUX
-SCSI_Out__CD_raw__BIE EQU CYREG_PRT0_BIE
-SCSI_Out__CD_raw__BIT_MASK EQU CYREG_PRT0_BIT_MASK
-SCSI_Out__CD_raw__BYP EQU CYREG_PRT0_BYP
-SCSI_Out__CD_raw__CTL EQU CYREG_PRT0_CTL
-SCSI_Out__CD_raw__DM0 EQU CYREG_PRT0_DM0
-SCSI_Out__CD_raw__DM1 EQU CYREG_PRT0_DM1
-SCSI_Out__CD_raw__DM2 EQU CYREG_PRT0_DM2
-SCSI_Out__CD_raw__DR EQU CYREG_PRT0_DR
-SCSI_Out__CD_raw__INP_DIS EQU CYREG_PRT0_INP_DIS
-SCSI_Out__CD_raw__INTTYPE EQU CYREG_PICU0_INTTYPE1
-SCSI_Out__CD_raw__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
-SCSI_Out__CD_raw__LCD_EN EQU CYREG_PRT0_LCD_EN
-SCSI_Out__CD_raw__MASK EQU 0x02
-SCSI_Out__CD_raw__PC EQU CYREG_PRT0_PC1
-SCSI_Out__CD_raw__PORT EQU 0
-SCSI_Out__CD_raw__PRT EQU CYREG_PRT0_PRT
-SCSI_Out__CD_raw__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
-SCSI_Out__CD_raw__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
-SCSI_Out__CD_raw__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
-SCSI_Out__CD_raw__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
-SCSI_Out__CD_raw__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
-SCSI_Out__CD_raw__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
-SCSI_Out__CD_raw__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
-SCSI_Out__CD_raw__PS EQU CYREG_PRT0_PS
-SCSI_Out__CD_raw__SHIFT EQU 1
-SCSI_Out__CD_raw__SLW EQU CYREG_PRT0_SLW
-SCSI_Out__DBP_raw__AG EQU CYREG_PRT6_AG
-SCSI_Out__DBP_raw__AMUX EQU CYREG_PRT6_AMUX
-SCSI_Out__DBP_raw__BIE EQU CYREG_PRT6_BIE
-SCSI_Out__DBP_raw__BIT_MASK EQU CYREG_PRT6_BIT_MASK
-SCSI_Out__DBP_raw__BYP EQU CYREG_PRT6_BYP
-SCSI_Out__DBP_raw__CTL EQU CYREG_PRT6_CTL
-SCSI_Out__DBP_raw__DM0 EQU CYREG_PRT6_DM0
-SCSI_Out__DBP_raw__DM1 EQU CYREG_PRT6_DM1
-SCSI_Out__DBP_raw__DM2 EQU CYREG_PRT6_DM2
-SCSI_Out__DBP_raw__DR EQU CYREG_PRT6_DR
-SCSI_Out__DBP_raw__INP_DIS EQU CYREG_PRT6_INP_DIS
-SCSI_Out__DBP_raw__INTTYPE EQU CYREG_PICU6_INTTYPE2
-SCSI_Out__DBP_raw__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
-SCSI_Out__DBP_raw__LCD_EN EQU CYREG_PRT6_LCD_EN
-SCSI_Out__DBP_raw__MASK EQU 0x04
-SCSI_Out__DBP_raw__PC EQU CYREG_PRT6_PC2
-SCSI_Out__DBP_raw__PORT EQU 6
-SCSI_Out__DBP_raw__PRT EQU CYREG_PRT6_PRT
-SCSI_Out__DBP_raw__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
-SCSI_Out__DBP_raw__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
-SCSI_Out__DBP_raw__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
-SCSI_Out__DBP_raw__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
-SCSI_Out__DBP_raw__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
-SCSI_Out__DBP_raw__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
-SCSI_Out__DBP_raw__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
-SCSI_Out__DBP_raw__PS EQU CYREG_PRT6_PS
-SCSI_Out__DBP_raw__SHIFT EQU 2
-SCSI_Out__DBP_raw__SLW EQU CYREG_PRT6_SLW
-SCSI_Out__IO_raw__AG EQU CYREG_PRT12_AG
-SCSI_Out__IO_raw__BIE EQU CYREG_PRT12_BIE
-SCSI_Out__IO_raw__BIT_MASK EQU CYREG_PRT12_BIT_MASK
-SCSI_Out__IO_raw__BYP EQU CYREG_PRT12_BYP
-SCSI_Out__IO_raw__DM0 EQU CYREG_PRT12_DM0
-SCSI_Out__IO_raw__DM1 EQU CYREG_PRT12_DM1
-SCSI_Out__IO_raw__DM2 EQU CYREG_PRT12_DM2
-SCSI_Out__IO_raw__DR EQU CYREG_PRT12_DR
-SCSI_Out__IO_raw__INP_DIS EQU CYREG_PRT12_INP_DIS
-SCSI_Out__IO_raw__INTTYPE EQU CYREG_PICU12_INTTYPE3
-SCSI_Out__IO_raw__MASK EQU 0x08
-SCSI_Out__IO_raw__PC EQU CYREG_PRT12_PC3
-SCSI_Out__IO_raw__PORT EQU 12
-SCSI_Out__IO_raw__PRT EQU CYREG_PRT12_PRT
-SCSI_Out__IO_raw__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN
-SCSI_Out__IO_raw__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0
-SCSI_Out__IO_raw__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1
-SCSI_Out__IO_raw__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0
-SCSI_Out__IO_raw__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1
-SCSI_Out__IO_raw__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT
-SCSI_Out__IO_raw__PS EQU CYREG_PRT12_PS
-SCSI_Out__IO_raw__SHIFT EQU 3
-SCSI_Out__IO_raw__SIO_CFG EQU CYREG_PRT12_SIO_CFG
-SCSI_Out__IO_raw__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF
-SCSI_Out__IO_raw__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN
-SCSI_Out__IO_raw__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ
-SCSI_Out__IO_raw__SLW EQU CYREG_PRT12_SLW
-SCSI_Out__MSG_raw__AG EQU CYREG_PRT0_AG
-SCSI_Out__MSG_raw__AMUX EQU CYREG_PRT0_AMUX
-SCSI_Out__MSG_raw__BIE EQU CYREG_PRT0_BIE
-SCSI_Out__MSG_raw__BIT_MASK EQU CYREG_PRT0_BIT_MASK
-SCSI_Out__MSG_raw__BYP EQU CYREG_PRT0_BYP
-SCSI_Out__MSG_raw__CTL EQU CYREG_PRT0_CTL
-SCSI_Out__MSG_raw__DM0 EQU CYREG_PRT0_DM0
-SCSI_Out__MSG_raw__DM1 EQU CYREG_PRT0_DM1
-SCSI_Out__MSG_raw__DM2 EQU CYREG_PRT0_DM2
-SCSI_Out__MSG_raw__DR EQU CYREG_PRT0_DR
-SCSI_Out__MSG_raw__INP_DIS EQU CYREG_PRT0_INP_DIS
-SCSI_Out__MSG_raw__INTTYPE EQU CYREG_PICU0_INTTYPE5
-SCSI_Out__MSG_raw__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
-SCSI_Out__MSG_raw__LCD_EN EQU CYREG_PRT0_LCD_EN
-SCSI_Out__MSG_raw__MASK EQU 0x20
-SCSI_Out__MSG_raw__PC EQU CYREG_PRT0_PC5
-SCSI_Out__MSG_raw__PORT EQU 0
-SCSI_Out__MSG_raw__PRT EQU CYREG_PRT0_PRT
-SCSI_Out__MSG_raw__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
-SCSI_Out__MSG_raw__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
-SCSI_Out__MSG_raw__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
-SCSI_Out__MSG_raw__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
-SCSI_Out__MSG_raw__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
-SCSI_Out__MSG_raw__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
-SCSI_Out__MSG_raw__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
-SCSI_Out__MSG_raw__PS EQU CYREG_PRT0_PS
-SCSI_Out__MSG_raw__SHIFT EQU 5
-SCSI_Out__MSG_raw__SLW EQU CYREG_PRT0_SLW
-SCSI_Out__REQ__AG EQU CYREG_PRT4_AG
-SCSI_Out__REQ__AMUX EQU CYREG_PRT4_AMUX
-SCSI_Out__REQ__BIE EQU CYREG_PRT4_BIE
-SCSI_Out__REQ__BIT_MASK EQU CYREG_PRT4_BIT_MASK
-SCSI_Out__REQ__BYP EQU CYREG_PRT4_BYP
-SCSI_Out__REQ__CTL EQU CYREG_PRT4_CTL
-SCSI_Out__REQ__DM0 EQU CYREG_PRT4_DM0
-SCSI_Out__REQ__DM1 EQU CYREG_PRT4_DM1
-SCSI_Out__REQ__DM2 EQU CYREG_PRT4_DM2
-SCSI_Out__REQ__DR EQU CYREG_PRT4_DR
-SCSI_Out__REQ__INP_DIS EQU CYREG_PRT4_INP_DIS
-SCSI_Out__REQ__INTTYPE EQU CYREG_PICU4_INTTYPE1
-SCSI_Out__REQ__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
-SCSI_Out__REQ__LCD_EN EQU CYREG_PRT4_LCD_EN
-SCSI_Out__REQ__MASK EQU 0x02
-SCSI_Out__REQ__PC EQU CYREG_PRT4_PC1
-SCSI_Out__REQ__PORT EQU 4
-SCSI_Out__REQ__PRT EQU CYREG_PRT4_PRT
-SCSI_Out__REQ__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
-SCSI_Out__REQ__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
-SCSI_Out__REQ__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
-SCSI_Out__REQ__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
-SCSI_Out__REQ__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
-SCSI_Out__REQ__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
-SCSI_Out__REQ__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
-SCSI_Out__REQ__PS EQU CYREG_PRT4_PS
-SCSI_Out__REQ__SHIFT EQU 1
-SCSI_Out__REQ__SLW EQU CYREG_PRT4_SLW
-SCSI_Out__RST__AG EQU CYREG_PRT0_AG
-SCSI_Out__RST__AMUX EQU CYREG_PRT0_AMUX
-SCSI_Out__RST__BIE EQU CYREG_PRT0_BIE
-SCSI_Out__RST__BIT_MASK EQU CYREG_PRT0_BIT_MASK
-SCSI_Out__RST__BYP EQU CYREG_PRT0_BYP
-SCSI_Out__RST__CTL EQU CYREG_PRT0_CTL
-SCSI_Out__RST__DM0 EQU CYREG_PRT0_DM0
-SCSI_Out__RST__DM1 EQU CYREG_PRT0_DM1
-SCSI_Out__RST__DM2 EQU CYREG_PRT0_DM2
-SCSI_Out__RST__DR EQU CYREG_PRT0_DR
-SCSI_Out__RST__INP_DIS EQU CYREG_PRT0_INP_DIS
-SCSI_Out__RST__INTTYPE EQU CYREG_PICU0_INTTYPE7
-SCSI_Out__RST__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
-SCSI_Out__RST__LCD_EN EQU CYREG_PRT0_LCD_EN
-SCSI_Out__RST__MASK EQU 0x80
-SCSI_Out__RST__PC EQU CYREG_PRT0_PC7
-SCSI_Out__RST__PORT EQU 0
-SCSI_Out__RST__PRT EQU CYREG_PRT0_PRT
-SCSI_Out__RST__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
-SCSI_Out__RST__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
-SCSI_Out__RST__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
-SCSI_Out__RST__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
-SCSI_Out__RST__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
-SCSI_Out__RST__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
-SCSI_Out__RST__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
-SCSI_Out__RST__PS EQU CYREG_PRT0_PS
-SCSI_Out__RST__SHIFT EQU 7
-SCSI_Out__RST__SLW EQU CYREG_PRT0_SLW
-SCSI_Out__SEL__AG EQU CYREG_PRT0_AG
-SCSI_Out__SEL__AMUX EQU CYREG_PRT0_AMUX
-SCSI_Out__SEL__BIE EQU CYREG_PRT0_BIE
-SCSI_Out__SEL__BIT_MASK EQU CYREG_PRT0_BIT_MASK
-SCSI_Out__SEL__BYP EQU CYREG_PRT0_BYP
-SCSI_Out__SEL__CTL EQU CYREG_PRT0_CTL
-SCSI_Out__SEL__DM0 EQU CYREG_PRT0_DM0
-SCSI_Out__SEL__DM1 EQU CYREG_PRT0_DM1
-SCSI_Out__SEL__DM2 EQU CYREG_PRT0_DM2
-SCSI_Out__SEL__DR EQU CYREG_PRT0_DR
-SCSI_Out__SEL__INP_DIS EQU CYREG_PRT0_INP_DIS
-SCSI_Out__SEL__INTTYPE EQU CYREG_PICU0_INTTYPE3
-SCSI_Out__SEL__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
-SCSI_Out__SEL__LCD_EN EQU CYREG_PRT0_LCD_EN
-SCSI_Out__SEL__MASK EQU 0x08
-SCSI_Out__SEL__PC EQU CYREG_PRT0_PC3
-SCSI_Out__SEL__PORT EQU 0
-SCSI_Out__SEL__PRT EQU CYREG_PRT0_PRT
-SCSI_Out__SEL__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
-SCSI_Out__SEL__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
-SCSI_Out__SEL__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
-SCSI_Out__SEL__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
-SCSI_Out__SEL__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
-SCSI_Out__SEL__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
-SCSI_Out__SEL__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
-SCSI_Out__SEL__PS EQU CYREG_PRT0_PS
-SCSI_Out__SEL__SHIFT EQU 3
-SCSI_Out__SEL__SLW EQU CYREG_PRT0_SLW
-SCSI_Out_Bits_Sync_ctrl_reg__0__MASK EQU 0x01
-SCSI_Out_Bits_Sync_ctrl_reg__0__POS EQU 0
-SCSI_Out_Bits_Sync_ctrl_reg__1__MASK EQU 0x02
-SCSI_Out_Bits_Sync_ctrl_reg__1__POS EQU 1
-SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB07_08_ACTL
-SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB07_08_CTL
-SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB07_08_CTL
-SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB07_08_CTL
-SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB07_08_CTL
-SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB07_08_MSK
-SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB07_08_MSK
-SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB07_08_MSK
-SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB07_08_MSK
-SCSI_Out_Bits_Sync_ctrl_reg__2__MASK EQU 0x04
-SCSI_Out_Bits_Sync_ctrl_reg__2__POS EQU 2
-SCSI_Out_Bits_Sync_ctrl_reg__3__MASK EQU 0x08
-SCSI_Out_Bits_Sync_ctrl_reg__3__POS EQU 3
-SCSI_Out_Bits_Sync_ctrl_reg__4__MASK EQU 0x10
-SCSI_Out_Bits_Sync_ctrl_reg__4__POS EQU 4
-SCSI_Out_Bits_Sync_ctrl_reg__5__MASK EQU 0x20
-SCSI_Out_Bits_Sync_ctrl_reg__5__POS EQU 5
-SCSI_Out_Bits_Sync_ctrl_reg__6__MASK EQU 0x40
-SCSI_Out_Bits_Sync_ctrl_reg__6__POS EQU 6
-SCSI_Out_Bits_Sync_ctrl_reg__7__MASK EQU 0x80
-SCSI_Out_Bits_Sync_ctrl_reg__7__POS EQU 7
-SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB07_ACTL
-SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB07_CTL
-SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB07_ST_CTL
-SCSI_Out_Bits_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB07_CTL
-SCSI_Out_Bits_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB07_ST_CTL
-SCSI_Out_Bits_Sync_ctrl_reg__MASK EQU 0xFF
-SCSI_Out_Bits_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB07_MSK_ACTL
-SCSI_Out_Bits_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB07_MSK_ACTL
-SCSI_Out_Bits_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB07_MSK
-SCSI_Out_Ctl_Sync_ctrl_reg__0__MASK EQU 0x01
-SCSI_Out_Ctl_Sync_ctrl_reg__0__POS EQU 0
-SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB11_12_ACTL
-SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB11_12_CTL
-SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB11_12_CTL
-SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB11_12_CTL
-SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB11_12_CTL
-SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB11_12_MSK
-SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB11_12_MSK
-SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB11_12_MSK
-SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB11_12_MSK
-SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB11_ACTL
-SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB11_CTL
-SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB11_ST_CTL
-SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB11_CTL
-SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB11_ST_CTL
-SCSI_Out_Ctl_Sync_ctrl_reg__MASK EQU 0x01
-SCSI_Out_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB11_MSK_ACTL
-SCSI_Out_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB11_MSK_ACTL
-SCSI_Out_Ctl_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB11_MSK
-SCSI_Out_DBx__0__AG EQU CYREG_PRT6_AG
-SCSI_Out_DBx__0__AMUX EQU CYREG_PRT6_AMUX
-SCSI_Out_DBx__0__BIE EQU CYREG_PRT6_BIE
-SCSI_Out_DBx__0__BIT_MASK EQU CYREG_PRT6_BIT_MASK
-SCSI_Out_DBx__0__BYP EQU CYREG_PRT6_BYP
-SCSI_Out_DBx__0__CTL EQU CYREG_PRT6_CTL
-SCSI_Out_DBx__0__DM0 EQU CYREG_PRT6_DM0
-SCSI_Out_DBx__0__DM1 EQU CYREG_PRT6_DM1
-SCSI_Out_DBx__0__DM2 EQU CYREG_PRT6_DM2
-SCSI_Out_DBx__0__DR EQU CYREG_PRT6_DR
-SCSI_Out_DBx__0__INP_DIS EQU CYREG_PRT6_INP_DIS
-SCSI_Out_DBx__0__INTTYPE EQU CYREG_PICU6_INTTYPE7
-SCSI_Out_DBx__0__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
-SCSI_Out_DBx__0__LCD_EN EQU CYREG_PRT6_LCD_EN
-SCSI_Out_DBx__0__MASK EQU 0x80
-SCSI_Out_DBx__0__PC EQU CYREG_PRT6_PC7
-SCSI_Out_DBx__0__PORT EQU 6
-SCSI_Out_DBx__0__PRT EQU CYREG_PRT6_PRT
-SCSI_Out_DBx__0__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
-SCSI_Out_DBx__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
-SCSI_Out_DBx__0__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
-SCSI_Out_DBx__0__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
-SCSI_Out_DBx__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
-SCSI_Out_DBx__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
-SCSI_Out_DBx__0__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
-SCSI_Out_DBx__0__PS EQU CYREG_PRT6_PS
-SCSI_Out_DBx__0__SHIFT EQU 7
-SCSI_Out_DBx__0__SLW EQU CYREG_PRT6_SLW
-SCSI_Out_DBx__1__AG EQU CYREG_PRT6_AG
-SCSI_Out_DBx__1__AMUX EQU CYREG_PRT6_AMUX
-SCSI_Out_DBx__1__BIE EQU CYREG_PRT6_BIE
-SCSI_Out_DBx__1__BIT_MASK EQU CYREG_PRT6_BIT_MASK
-SCSI_Out_DBx__1__BYP EQU CYREG_PRT6_BYP
-SCSI_Out_DBx__1__CTL EQU CYREG_PRT6_CTL
-SCSI_Out_DBx__1__DM0 EQU CYREG_PRT6_DM0
-SCSI_Out_DBx__1__DM1 EQU CYREG_PRT6_DM1
-SCSI_Out_DBx__1__DM2 EQU CYREG_PRT6_DM2
-SCSI_Out_DBx__1__DR EQU CYREG_PRT6_DR
-SCSI_Out_DBx__1__INP_DIS EQU CYREG_PRT6_INP_DIS
-SCSI_Out_DBx__1__INTTYPE EQU CYREG_PICU6_INTTYPE5
-SCSI_Out_DBx__1__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
-SCSI_Out_DBx__1__LCD_EN EQU CYREG_PRT6_LCD_EN
-SCSI_Out_DBx__1__MASK EQU 0x20
-SCSI_Out_DBx__1__PC EQU CYREG_PRT6_PC5
-SCSI_Out_DBx__1__PORT EQU 6
-SCSI_Out_DBx__1__PRT EQU CYREG_PRT6_PRT
-SCSI_Out_DBx__1__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
-SCSI_Out_DBx__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
-SCSI_Out_DBx__1__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
-SCSI_Out_DBx__1__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
-SCSI_Out_DBx__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
-SCSI_Out_DBx__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
-SCSI_Out_DBx__1__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
-SCSI_Out_DBx__1__PS EQU CYREG_PRT6_PS
-SCSI_Out_DBx__1__SHIFT EQU 5
-SCSI_Out_DBx__1__SLW EQU CYREG_PRT6_SLW
-SCSI_Out_DBx__2__AG EQU CYREG_PRT12_AG
-SCSI_Out_DBx__2__BIE EQU CYREG_PRT12_BIE
-SCSI_Out_DBx__2__BIT_MASK EQU CYREG_PRT12_BIT_MASK
-SCSI_Out_DBx__2__BYP EQU CYREG_PRT12_BYP
-SCSI_Out_DBx__2__DM0 EQU CYREG_PRT12_DM0
-SCSI_Out_DBx__2__DM1 EQU CYREG_PRT12_DM1
-SCSI_Out_DBx__2__DM2 EQU CYREG_PRT12_DM2
-SCSI_Out_DBx__2__DR EQU CYREG_PRT12_DR
-SCSI_Out_DBx__2__INP_DIS EQU CYREG_PRT12_INP_DIS
-SCSI_Out_DBx__2__INTTYPE EQU CYREG_PICU12_INTTYPE5
-SCSI_Out_DBx__2__MASK EQU 0x20
-SCSI_Out_DBx__2__PC EQU CYREG_PRT12_PC5
-SCSI_Out_DBx__2__PORT EQU 12
-SCSI_Out_DBx__2__PRT EQU CYREG_PRT12_PRT
-SCSI_Out_DBx__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN
-SCSI_Out_DBx__2__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0
-SCSI_Out_DBx__2__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1
-SCSI_Out_DBx__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0
-SCSI_Out_DBx__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1
-SCSI_Out_DBx__2__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT
-SCSI_Out_DBx__2__PS EQU CYREG_PRT12_PS
-SCSI_Out_DBx__2__SHIFT EQU 5
-SCSI_Out_DBx__2__SIO_CFG EQU CYREG_PRT12_SIO_CFG
-SCSI_Out_DBx__2__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF
-SCSI_Out_DBx__2__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN
-SCSI_Out_DBx__2__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ
-SCSI_Out_DBx__2__SLW EQU CYREG_PRT12_SLW
-SCSI_Out_DBx__3__AG EQU CYREG_PRT2_AG
-SCSI_Out_DBx__3__AMUX EQU CYREG_PRT2_AMUX
-SCSI_Out_DBx__3__BIE EQU CYREG_PRT2_BIE
-SCSI_Out_DBx__3__BIT_MASK EQU CYREG_PRT2_BIT_MASK
-SCSI_Out_DBx__3__BYP EQU CYREG_PRT2_BYP
-SCSI_Out_DBx__3__CTL EQU CYREG_PRT2_CTL
-SCSI_Out_DBx__3__DM0 EQU CYREG_PRT2_DM0
-SCSI_Out_DBx__3__DM1 EQU CYREG_PRT2_DM1
-SCSI_Out_DBx__3__DM2 EQU CYREG_PRT2_DM2
-SCSI_Out_DBx__3__DR EQU CYREG_PRT2_DR
-SCSI_Out_DBx__3__INP_DIS EQU CYREG_PRT2_INP_DIS
-SCSI_Out_DBx__3__INTTYPE EQU CYREG_PICU2_INTTYPE7
-SCSI_Out_DBx__3__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
-SCSI_Out_DBx__3__LCD_EN EQU CYREG_PRT2_LCD_EN
-SCSI_Out_DBx__3__MASK EQU 0x80
-SCSI_Out_DBx__3__PC EQU CYREG_PRT2_PC7
-SCSI_Out_DBx__3__PORT EQU 2
-SCSI_Out_DBx__3__PRT EQU CYREG_PRT2_PRT
-SCSI_Out_DBx__3__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
-SCSI_Out_DBx__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
-SCSI_Out_DBx__3__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
-SCSI_Out_DBx__3__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
-SCSI_Out_DBx__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
-SCSI_Out_DBx__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
-SCSI_Out_DBx__3__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
-SCSI_Out_DBx__3__PS EQU CYREG_PRT2_PS
-SCSI_Out_DBx__3__SHIFT EQU 7
-SCSI_Out_DBx__3__SLW EQU CYREG_PRT2_SLW
-SCSI_Out_DBx__4__AG EQU CYREG_PRT2_AG
-SCSI_Out_DBx__4__AMUX EQU CYREG_PRT2_AMUX
-SCSI_Out_DBx__4__BIE EQU CYREG_PRT2_BIE
-SCSI_Out_DBx__4__BIT_MASK EQU CYREG_PRT2_BIT_MASK
-SCSI_Out_DBx__4__BYP EQU CYREG_PRT2_BYP
-SCSI_Out_DBx__4__CTL EQU CYREG_PRT2_CTL
-SCSI_Out_DBx__4__DM0 EQU CYREG_PRT2_DM0
-SCSI_Out_DBx__4__DM1 EQU CYREG_PRT2_DM1
-SCSI_Out_DBx__4__DM2 EQU CYREG_PRT2_DM2
-SCSI_Out_DBx__4__DR EQU CYREG_PRT2_DR
-SCSI_Out_DBx__4__INP_DIS EQU CYREG_PRT2_INP_DIS
-SCSI_Out_DBx__4__INTTYPE EQU CYREG_PICU2_INTTYPE5
-SCSI_Out_DBx__4__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
-SCSI_Out_DBx__4__LCD_EN EQU CYREG_PRT2_LCD_EN
-SCSI_Out_DBx__4__MASK EQU 0x20
-SCSI_Out_DBx__4__PC EQU CYREG_PRT2_PC5
-SCSI_Out_DBx__4__PORT EQU 2
-SCSI_Out_DBx__4__PRT EQU CYREG_PRT2_PRT
-SCSI_Out_DBx__4__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
-SCSI_Out_DBx__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
-SCSI_Out_DBx__4__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
-SCSI_Out_DBx__4__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
-SCSI_Out_DBx__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
-SCSI_Out_DBx__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
-SCSI_Out_DBx__4__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
-SCSI_Out_DBx__4__PS EQU CYREG_PRT2_PS
-SCSI_Out_DBx__4__SHIFT EQU 5
-SCSI_Out_DBx__4__SLW EQU CYREG_PRT2_SLW
-SCSI_Out_DBx__5__AG EQU CYREG_PRT2_AG
-SCSI_Out_DBx__5__AMUX EQU CYREG_PRT2_AMUX
-SCSI_Out_DBx__5__BIE EQU CYREG_PRT2_BIE
-SCSI_Out_DBx__5__BIT_MASK EQU CYREG_PRT2_BIT_MASK
-SCSI_Out_DBx__5__BYP EQU CYREG_PRT2_BYP
-SCSI_Out_DBx__5__CTL EQU CYREG_PRT2_CTL
-SCSI_Out_DBx__5__DM0 EQU CYREG_PRT2_DM0
-SCSI_Out_DBx__5__DM1 EQU CYREG_PRT2_DM1
-SCSI_Out_DBx__5__DM2 EQU CYREG_PRT2_DM2
-SCSI_Out_DBx__5__DR EQU CYREG_PRT2_DR
-SCSI_Out_DBx__5__INP_DIS EQU CYREG_PRT2_INP_DIS
-SCSI_Out_DBx__5__INTTYPE EQU CYREG_PICU2_INTTYPE3
-SCSI_Out_DBx__5__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
-SCSI_Out_DBx__5__LCD_EN EQU CYREG_PRT2_LCD_EN
-SCSI_Out_DBx__5__MASK EQU 0x08
-SCSI_Out_DBx__5__PC EQU CYREG_PRT2_PC3
-SCSI_Out_DBx__5__PORT EQU 2
-SCSI_Out_DBx__5__PRT EQU CYREG_PRT2_PRT
-SCSI_Out_DBx__5__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
-SCSI_Out_DBx__5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
-SCSI_Out_DBx__5__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
-SCSI_Out_DBx__5__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
-SCSI_Out_DBx__5__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
-SCSI_Out_DBx__5__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
-SCSI_Out_DBx__5__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
-SCSI_Out_DBx__5__PS EQU CYREG_PRT2_PS
-SCSI_Out_DBx__5__SHIFT EQU 3
-SCSI_Out_DBx__5__SLW EQU CYREG_PRT2_SLW
-SCSI_Out_DBx__6__AG EQU CYREG_PRT2_AG
-SCSI_Out_DBx__6__AMUX EQU CYREG_PRT2_AMUX
-SCSI_Out_DBx__6__BIE EQU CYREG_PRT2_BIE
-SCSI_Out_DBx__6__BIT_MASK EQU CYREG_PRT2_BIT_MASK
-SCSI_Out_DBx__6__BYP EQU CYREG_PRT2_BYP
-SCSI_Out_DBx__6__CTL EQU CYREG_PRT2_CTL
-SCSI_Out_DBx__6__DM0 EQU CYREG_PRT2_DM0
-SCSI_Out_DBx__6__DM1 EQU CYREG_PRT2_DM1
-SCSI_Out_DBx__6__DM2 EQU CYREG_PRT2_DM2
-SCSI_Out_DBx__6__DR EQU CYREG_PRT2_DR
-SCSI_Out_DBx__6__INP_DIS EQU CYREG_PRT2_INP_DIS
-SCSI_Out_DBx__6__INTTYPE EQU CYREG_PICU2_INTTYPE1
-SCSI_Out_DBx__6__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
-SCSI_Out_DBx__6__LCD_EN EQU CYREG_PRT2_LCD_EN
-SCSI_Out_DBx__6__MASK EQU 0x02
-SCSI_Out_DBx__6__PC EQU CYREG_PRT2_PC1
-SCSI_Out_DBx__6__PORT EQU 2
-SCSI_Out_DBx__6__PRT EQU CYREG_PRT2_PRT
-SCSI_Out_DBx__6__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
-SCSI_Out_DBx__6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
-SCSI_Out_DBx__6__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
-SCSI_Out_DBx__6__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
-SCSI_Out_DBx__6__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
-SCSI_Out_DBx__6__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
-SCSI_Out_DBx__6__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
-SCSI_Out_DBx__6__PS EQU CYREG_PRT2_PS
-SCSI_Out_DBx__6__SHIFT EQU 1
-SCSI_Out_DBx__6__SLW EQU CYREG_PRT2_SLW
-SCSI_Out_DBx__7__AG EQU CYREG_PRT15_AG
-SCSI_Out_DBx__7__AMUX EQU CYREG_PRT15_AMUX
-SCSI_Out_DBx__7__BIE EQU CYREG_PRT15_BIE
-SCSI_Out_DBx__7__BIT_MASK EQU CYREG_PRT15_BIT_MASK
-SCSI_Out_DBx__7__BYP EQU CYREG_PRT15_BYP
-SCSI_Out_DBx__7__CTL EQU CYREG_PRT15_CTL
-SCSI_Out_DBx__7__DM0 EQU CYREG_PRT15_DM0
-SCSI_Out_DBx__7__DM1 EQU CYREG_PRT15_DM1
-SCSI_Out_DBx__7__DM2 EQU CYREG_PRT15_DM2
-SCSI_Out_DBx__7__DR EQU CYREG_PRT15_DR
-SCSI_Out_DBx__7__INP_DIS EQU CYREG_PRT15_INP_DIS
-SCSI_Out_DBx__7__INTTYPE EQU CYREG_PICU15_INTTYPE5
-SCSI_Out_DBx__7__LCD_COM_SEG EQU CYREG_PRT15_LCD_COM_SEG
-SCSI_Out_DBx__7__LCD_EN EQU CYREG_PRT15_LCD_EN
-SCSI_Out_DBx__7__MASK EQU 0x20
-SCSI_Out_DBx__7__PC EQU CYREG_IO_PC_PRT15_PC5
-SCSI_Out_DBx__7__PORT EQU 15
-SCSI_Out_DBx__7__PRT EQU CYREG_PRT15_PRT
-SCSI_Out_DBx__7__PRTDSI__CAPS_SEL EQU CYREG_PRT15_CAPS_SEL
-SCSI_Out_DBx__7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT15_DBL_SYNC_IN
-SCSI_Out_DBx__7__PRTDSI__OE_SEL0 EQU CYREG_PRT15_OE_SEL0
-SCSI_Out_DBx__7__PRTDSI__OE_SEL1 EQU CYREG_PRT15_OE_SEL1
-SCSI_Out_DBx__7__PRTDSI__OUT_SEL0 EQU CYREG_PRT15_OUT_SEL0
-SCSI_Out_DBx__7__PRTDSI__OUT_SEL1 EQU CYREG_PRT15_OUT_SEL1
-SCSI_Out_DBx__7__PRTDSI__SYNC_OUT EQU CYREG_PRT15_SYNC_OUT
-SCSI_Out_DBx__7__PS EQU CYREG_PRT15_PS
-SCSI_Out_DBx__7__SHIFT EQU 5
-SCSI_Out_DBx__7__SLW EQU CYREG_PRT15_SLW
-SCSI_Out_DBx__DB0__AG EQU CYREG_PRT6_AG
-SCSI_Out_DBx__DB0__AMUX EQU CYREG_PRT6_AMUX
-SCSI_Out_DBx__DB0__BIE EQU CYREG_PRT6_BIE
-SCSI_Out_DBx__DB0__BIT_MASK EQU CYREG_PRT6_BIT_MASK
-SCSI_Out_DBx__DB0__BYP EQU CYREG_PRT6_BYP
-SCSI_Out_DBx__DB0__CTL EQU CYREG_PRT6_CTL
-SCSI_Out_DBx__DB0__DM0 EQU CYREG_PRT6_DM0
-SCSI_Out_DBx__DB0__DM1 EQU CYREG_PRT6_DM1
-SCSI_Out_DBx__DB0__DM2 EQU CYREG_PRT6_DM2
-SCSI_Out_DBx__DB0__DR EQU CYREG_PRT6_DR
-SCSI_Out_DBx__DB0__INP_DIS EQU CYREG_PRT6_INP_DIS
-SCSI_Out_DBx__DB0__INTTYPE EQU CYREG_PICU6_INTTYPE7
-SCSI_Out_DBx__DB0__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
-SCSI_Out_DBx__DB0__LCD_EN EQU CYREG_PRT6_LCD_EN
-SCSI_Out_DBx__DB0__MASK EQU 0x80
-SCSI_Out_DBx__DB0__PC EQU CYREG_PRT6_PC7
-SCSI_Out_DBx__DB0__PORT EQU 6
-SCSI_Out_DBx__DB0__PRT EQU CYREG_PRT6_PRT
-SCSI_Out_DBx__DB0__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
-SCSI_Out_DBx__DB0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
-SCSI_Out_DBx__DB0__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
-SCSI_Out_DBx__DB0__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
-SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
-SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
-SCSI_Out_DBx__DB0__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
-SCSI_Out_DBx__DB0__PS EQU CYREG_PRT6_PS
-SCSI_Out_DBx__DB0__SHIFT EQU 7
-SCSI_Out_DBx__DB0__SLW EQU CYREG_PRT6_SLW
-SCSI_Out_DBx__DB1__AG EQU CYREG_PRT6_AG
-SCSI_Out_DBx__DB1__AMUX EQU CYREG_PRT6_AMUX
-SCSI_Out_DBx__DB1__BIE EQU CYREG_PRT6_BIE
-SCSI_Out_DBx__DB1__BIT_MASK EQU CYREG_PRT6_BIT_MASK
-SCSI_Out_DBx__DB1__BYP EQU CYREG_PRT6_BYP
-SCSI_Out_DBx__DB1__CTL EQU CYREG_PRT6_CTL
-SCSI_Out_DBx__DB1__DM0 EQU CYREG_PRT6_DM0
-SCSI_Out_DBx__DB1__DM1 EQU CYREG_PRT6_DM1
-SCSI_Out_DBx__DB1__DM2 EQU CYREG_PRT6_DM2
-SCSI_Out_DBx__DB1__DR EQU CYREG_PRT6_DR
-SCSI_Out_DBx__DB1__INP_DIS EQU CYREG_PRT6_INP_DIS
-SCSI_Out_DBx__DB1__INTTYPE EQU CYREG_PICU6_INTTYPE5
-SCSI_Out_DBx__DB1__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
-SCSI_Out_DBx__DB1__LCD_EN EQU CYREG_PRT6_LCD_EN
-SCSI_Out_DBx__DB1__MASK EQU 0x20
-SCSI_Out_DBx__DB1__PC EQU CYREG_PRT6_PC5
-SCSI_Out_DBx__DB1__PORT EQU 6
-SCSI_Out_DBx__DB1__PRT EQU CYREG_PRT6_PRT
-SCSI_Out_DBx__DB1__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
-SCSI_Out_DBx__DB1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
-SCSI_Out_DBx__DB1__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
-SCSI_Out_DBx__DB1__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
-SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
-SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
-SCSI_Out_DBx__DB1__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
-SCSI_Out_DBx__DB1__PS EQU CYREG_PRT6_PS
-SCSI_Out_DBx__DB1__SHIFT EQU 5
-SCSI_Out_DBx__DB1__SLW EQU CYREG_PRT6_SLW
-SCSI_Out_DBx__DB2__AG EQU CYREG_PRT12_AG
-SCSI_Out_DBx__DB2__BIE EQU CYREG_PRT12_BIE
-SCSI_Out_DBx__DB2__BIT_MASK EQU CYREG_PRT12_BIT_MASK
-SCSI_Out_DBx__DB2__BYP EQU CYREG_PRT12_BYP
-SCSI_Out_DBx__DB2__DM0 EQU CYREG_PRT12_DM0
-SCSI_Out_DBx__DB2__DM1 EQU CYREG_PRT12_DM1
-SCSI_Out_DBx__DB2__DM2 EQU CYREG_PRT12_DM2
-SCSI_Out_DBx__DB2__DR EQU CYREG_PRT12_DR
-SCSI_Out_DBx__DB2__INP_DIS EQU CYREG_PRT12_INP_DIS
-SCSI_Out_DBx__DB2__INTTYPE EQU CYREG_PICU12_INTTYPE5
-SCSI_Out_DBx__DB2__MASK EQU 0x20
-SCSI_Out_DBx__DB2__PC EQU CYREG_PRT12_PC5
-SCSI_Out_DBx__DB2__PORT EQU 12
-SCSI_Out_DBx__DB2__PRT EQU CYREG_PRT12_PRT
-SCSI_Out_DBx__DB2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN
-SCSI_Out_DBx__DB2__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0
-SCSI_Out_DBx__DB2__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1
-SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0
-SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1
-SCSI_Out_DBx__DB2__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT
-SCSI_Out_DBx__DB2__PS EQU CYREG_PRT12_PS
-SCSI_Out_DBx__DB2__SHIFT EQU 5
-SCSI_Out_DBx__DB2__SIO_CFG EQU CYREG_PRT12_SIO_CFG
-SCSI_Out_DBx__DB2__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF
-SCSI_Out_DBx__DB2__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN
-SCSI_Out_DBx__DB2__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ
-SCSI_Out_DBx__DB2__SLW EQU CYREG_PRT12_SLW
-SCSI_Out_DBx__DB3__AG EQU CYREG_PRT2_AG
-SCSI_Out_DBx__DB3__AMUX EQU CYREG_PRT2_AMUX
-SCSI_Out_DBx__DB3__BIE EQU CYREG_PRT2_BIE
-SCSI_Out_DBx__DB3__BIT_MASK EQU CYREG_PRT2_BIT_MASK
-SCSI_Out_DBx__DB3__BYP EQU CYREG_PRT2_BYP
-SCSI_Out_DBx__DB3__CTL EQU CYREG_PRT2_CTL
-SCSI_Out_DBx__DB3__DM0 EQU CYREG_PRT2_DM0
-SCSI_Out_DBx__DB3__DM1 EQU CYREG_PRT2_DM1
-SCSI_Out_DBx__DB3__DM2 EQU CYREG_PRT2_DM2
-SCSI_Out_DBx__DB3__DR EQU CYREG_PRT2_DR
-SCSI_Out_DBx__DB3__INP_DIS EQU CYREG_PRT2_INP_DIS
-SCSI_Out_DBx__DB3__INTTYPE EQU CYREG_PICU2_INTTYPE7
-SCSI_Out_DBx__DB3__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
-SCSI_Out_DBx__DB3__LCD_EN EQU CYREG_PRT2_LCD_EN
-SCSI_Out_DBx__DB3__MASK EQU 0x80
-SCSI_Out_DBx__DB3__PC EQU CYREG_PRT2_PC7
-SCSI_Out_DBx__DB3__PORT EQU 2
-SCSI_Out_DBx__DB3__PRT EQU CYREG_PRT2_PRT
-SCSI_Out_DBx__DB3__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
-SCSI_Out_DBx__DB3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
-SCSI_Out_DBx__DB3__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
-SCSI_Out_DBx__DB3__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
-SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
-SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
-SCSI_Out_DBx__DB3__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
-SCSI_Out_DBx__DB3__PS EQU CYREG_PRT2_PS
-SCSI_Out_DBx__DB3__SHIFT EQU 7
-SCSI_Out_DBx__DB3__SLW EQU CYREG_PRT2_SLW
-SCSI_Out_DBx__DB4__AG EQU CYREG_PRT2_AG
-SCSI_Out_DBx__DB4__AMUX EQU CYREG_PRT2_AMUX
-SCSI_Out_DBx__DB4__BIE EQU CYREG_PRT2_BIE
-SCSI_Out_DBx__DB4__BIT_MASK EQU CYREG_PRT2_BIT_MASK
-SCSI_Out_DBx__DB4__BYP EQU CYREG_PRT2_BYP
-SCSI_Out_DBx__DB4__CTL EQU CYREG_PRT2_CTL
-SCSI_Out_DBx__DB4__DM0 EQU CYREG_PRT2_DM0
-SCSI_Out_DBx__DB4__DM1 EQU CYREG_PRT2_DM1
-SCSI_Out_DBx__DB4__DM2 EQU CYREG_PRT2_DM2
-SCSI_Out_DBx__DB4__DR EQU CYREG_PRT2_DR
-SCSI_Out_DBx__DB4__INP_DIS EQU CYREG_PRT2_INP_DIS
-SCSI_Out_DBx__DB4__INTTYPE EQU CYREG_PICU2_INTTYPE5
-SCSI_Out_DBx__DB4__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
-SCSI_Out_DBx__DB4__LCD_EN EQU CYREG_PRT2_LCD_EN
-SCSI_Out_DBx__DB4__MASK EQU 0x20
-SCSI_Out_DBx__DB4__PC EQU CYREG_PRT2_PC5
-SCSI_Out_DBx__DB4__PORT EQU 2
-SCSI_Out_DBx__DB4__PRT EQU CYREG_PRT2_PRT
-SCSI_Out_DBx__DB4__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
-SCSI_Out_DBx__DB4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
-SCSI_Out_DBx__DB4__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
-SCSI_Out_DBx__DB4__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
-SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
-SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
-SCSI_Out_DBx__DB4__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
-SCSI_Out_DBx__DB4__PS EQU CYREG_PRT2_PS
-SCSI_Out_DBx__DB4__SHIFT EQU 5
-SCSI_Out_DBx__DB4__SLW EQU CYREG_PRT2_SLW
-SCSI_Out_DBx__DB5__AG EQU CYREG_PRT2_AG
-SCSI_Out_DBx__DB5__AMUX EQU CYREG_PRT2_AMUX
-SCSI_Out_DBx__DB5__BIE EQU CYREG_PRT2_BIE
-SCSI_Out_DBx__DB5__BIT_MASK EQU CYREG_PRT2_BIT_MASK
-SCSI_Out_DBx__DB5__BYP EQU CYREG_PRT2_BYP
-SCSI_Out_DBx__DB5__CTL EQU CYREG_PRT2_CTL
-SCSI_Out_DBx__DB5__DM0 EQU CYREG_PRT2_DM0
-SCSI_Out_DBx__DB5__DM1 EQU CYREG_PRT2_DM1
-SCSI_Out_DBx__DB5__DM2 EQU CYREG_PRT2_DM2
-SCSI_Out_DBx__DB5__DR EQU CYREG_PRT2_DR
-SCSI_Out_DBx__DB5__INP_DIS EQU CYREG_PRT2_INP_DIS
-SCSI_Out_DBx__DB5__INTTYPE EQU CYREG_PICU2_INTTYPE3
-SCSI_Out_DBx__DB5__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
-SCSI_Out_DBx__DB5__LCD_EN EQU CYREG_PRT2_LCD_EN
-SCSI_Out_DBx__DB5__MASK EQU 0x08
-SCSI_Out_DBx__DB5__PC EQU CYREG_PRT2_PC3
-SCSI_Out_DBx__DB5__PORT EQU 2
-SCSI_Out_DBx__DB5__PRT EQU CYREG_PRT2_PRT
-SCSI_Out_DBx__DB5__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
-SCSI_Out_DBx__DB5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
-SCSI_Out_DBx__DB5__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
-SCSI_Out_DBx__DB5__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
-SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
-SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
-SCSI_Out_DBx__DB5__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
-SCSI_Out_DBx__DB5__PS EQU CYREG_PRT2_PS
-SCSI_Out_DBx__DB5__SHIFT EQU 3
-SCSI_Out_DBx__DB5__SLW EQU CYREG_PRT2_SLW
-SCSI_Out_DBx__DB6__AG EQU CYREG_PRT2_AG
-SCSI_Out_DBx__DB6__AMUX EQU CYREG_PRT2_AMUX
-SCSI_Out_DBx__DB6__BIE EQU CYREG_PRT2_BIE
-SCSI_Out_DBx__DB6__BIT_MASK EQU CYREG_PRT2_BIT_MASK
-SCSI_Out_DBx__DB6__BYP EQU CYREG_PRT2_BYP
-SCSI_Out_DBx__DB6__CTL EQU CYREG_PRT2_CTL
-SCSI_Out_DBx__DB6__DM0 EQU CYREG_PRT2_DM0
-SCSI_Out_DBx__DB6__DM1 EQU CYREG_PRT2_DM1
-SCSI_Out_DBx__DB6__DM2 EQU CYREG_PRT2_DM2
-SCSI_Out_DBx__DB6__DR EQU CYREG_PRT2_DR
-SCSI_Out_DBx__DB6__INP_DIS EQU CYREG_PRT2_INP_DIS
-SCSI_Out_DBx__DB6__INTTYPE EQU CYREG_PICU2_INTTYPE1
-SCSI_Out_DBx__DB6__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
-SCSI_Out_DBx__DB6__LCD_EN EQU CYREG_PRT2_LCD_EN
-SCSI_Out_DBx__DB6__MASK EQU 0x02
-SCSI_Out_DBx__DB6__PC EQU CYREG_PRT2_PC1
-SCSI_Out_DBx__DB6__PORT EQU 2
-SCSI_Out_DBx__DB6__PRT EQU CYREG_PRT2_PRT
-SCSI_Out_DBx__DB6__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
-SCSI_Out_DBx__DB6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
-SCSI_Out_DBx__DB6__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
-SCSI_Out_DBx__DB6__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
-SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
-SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
-SCSI_Out_DBx__DB6__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
-SCSI_Out_DBx__DB6__PS EQU CYREG_PRT2_PS
-SCSI_Out_DBx__DB6__SHIFT EQU 1
-SCSI_Out_DBx__DB6__SLW EQU CYREG_PRT2_SLW
-SCSI_Out_DBx__DB7__AG EQU CYREG_PRT15_AG
-SCSI_Out_DBx__DB7__AMUX EQU CYREG_PRT15_AMUX
-SCSI_Out_DBx__DB7__BIE EQU CYREG_PRT15_BIE
-SCSI_Out_DBx__DB7__BIT_MASK EQU CYREG_PRT15_BIT_MASK
-SCSI_Out_DBx__DB7__BYP EQU CYREG_PRT15_BYP
-SCSI_Out_DBx__DB7__CTL EQU CYREG_PRT15_CTL
-SCSI_Out_DBx__DB7__DM0 EQU CYREG_PRT15_DM0
-SCSI_Out_DBx__DB7__DM1 EQU CYREG_PRT15_DM1
-SCSI_Out_DBx__DB7__DM2 EQU CYREG_PRT15_DM2
-SCSI_Out_DBx__DB7__DR EQU CYREG_PRT15_DR
-SCSI_Out_DBx__DB7__INP_DIS EQU CYREG_PRT15_INP_DIS
-SCSI_Out_DBx__DB7__INTTYPE EQU CYREG_PICU15_INTTYPE5
-SCSI_Out_DBx__DB7__LCD_COM_SEG EQU CYREG_PRT15_LCD_COM_SEG
-SCSI_Out_DBx__DB7__LCD_EN EQU CYREG_PRT15_LCD_EN
-SCSI_Out_DBx__DB7__MASK EQU 0x20
-SCSI_Out_DBx__DB7__PC EQU CYREG_IO_PC_PRT15_PC5
-SCSI_Out_DBx__DB7__PORT EQU 15
-SCSI_Out_DBx__DB7__PRT EQU CYREG_PRT15_PRT
-SCSI_Out_DBx__DB7__PRTDSI__CAPS_SEL EQU CYREG_PRT15_CAPS_SEL
-SCSI_Out_DBx__DB7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT15_DBL_SYNC_IN
-SCSI_Out_DBx__DB7__PRTDSI__OE_SEL0 EQU CYREG_PRT15_OE_SEL0
-SCSI_Out_DBx__DB7__PRTDSI__OE_SEL1 EQU CYREG_PRT15_OE_SEL1
-SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL0 EQU CYREG_PRT15_OUT_SEL0
-SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL1 EQU CYREG_PRT15_OUT_SEL1
-SCSI_Out_DBx__DB7__PRTDSI__SYNC_OUT EQU CYREG_PRT15_SYNC_OUT
-SCSI_Out_DBx__DB7__PS EQU CYREG_PRT15_PS
-SCSI_Out_DBx__DB7__SHIFT EQU 5
-SCSI_Out_DBx__DB7__SLW EQU CYREG_PRT15_SLW
-
-/* SCSI_Parity_Error */
-SCSI_Parity_Error_sts_sts_reg__0__MASK EQU 0x01
-SCSI_Parity_Error_sts_sts_reg__0__POS EQU 0
-SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB02_03_ACTL
-SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_REG EQU CYREG_B0_UDB02_03_ST
-SCSI_Parity_Error_sts_sts_reg__MASK EQU 0x01
-SCSI_Parity_Error_sts_sts_reg__MASK_REG EQU CYREG_B0_UDB02_MSK
-SCSI_Parity_Error_sts_sts_reg__MASK_ST_AUX_CTL_REG EQU CYREG_B0_UDB02_MSK_ACTL
-SCSI_Parity_Error_sts_sts_reg__PER_ST_AUX_CTL_REG EQU CYREG_B0_UDB02_MSK_ACTL
-SCSI_Parity_Error_sts_sts_reg__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB02_ACTL
-SCSI_Parity_Error_sts_sts_reg__STATUS_CNT_REG EQU CYREG_B0_UDB02_ST_CTL
-SCSI_Parity_Error_sts_sts_reg__STATUS_CONTROL_REG EQU CYREG_B0_UDB02_ST_CTL
-SCSI_Parity_Error_sts_sts_reg__STATUS_REG EQU CYREG_B0_UDB02_ST
-
-/* SCSI_RST_ISR */
-SCSI_RST_ISR__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0
-SCSI_RST_ISR__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0
-SCSI_RST_ISR__INTC_MASK EQU 0x02
-SCSI_RST_ISR__INTC_NUMBER EQU 1
-SCSI_RST_ISR__INTC_PRIOR_NUM EQU 7
-SCSI_RST_ISR__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_1
-SCSI_RST_ISR__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0
-SCSI_RST_ISR__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0
-
-/* SCSI_RX_DMA */
-SCSI_RX_DMA__DRQ_CTL EQU CYREG_IDMUX_DRQ_CTL0
-SCSI_RX_DMA__DRQ_NUMBER EQU 0
-SCSI_RX_DMA__NUMBEROF_TDS EQU 0
-SCSI_RX_DMA__PRIORITY EQU 2
-SCSI_RX_DMA__TERMIN_EN EQU 0
-SCSI_RX_DMA__TERMIN_SEL EQU 0
-SCSI_RX_DMA__TERMOUT0_EN EQU 1
-SCSI_RX_DMA__TERMOUT0_SEL EQU 0
-SCSI_RX_DMA__TERMOUT1_EN EQU 0
-SCSI_RX_DMA__TERMOUT1_SEL EQU 0
-SCSI_RX_DMA_COMPLETE__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0
-SCSI_RX_DMA_COMPLETE__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0
-SCSI_RX_DMA_COMPLETE__INTC_MASK EQU 0x04
-SCSI_RX_DMA_COMPLETE__INTC_NUMBER EQU 2
-SCSI_RX_DMA_COMPLETE__INTC_PRIOR_NUM EQU 7
-SCSI_RX_DMA_COMPLETE__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_2
-SCSI_RX_DMA_COMPLETE__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0
-SCSI_RX_DMA_COMPLETE__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0
-
-/* SCSI_SEL_ISR */
-SCSI_SEL_ISR__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0
-SCSI_SEL_ISR__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0
-SCSI_SEL_ISR__INTC_MASK EQU 0x08
-SCSI_SEL_ISR__INTC_NUMBER EQU 3
-SCSI_SEL_ISR__INTC_PRIOR_NUM EQU 7
-SCSI_SEL_ISR__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_3
-SCSI_SEL_ISR__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0
-SCSI_SEL_ISR__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0
-
-/* SCSI_TX_DMA */
-SCSI_TX_DMA__DRQ_CTL EQU CYREG_IDMUX_DRQ_CTL0
-SCSI_TX_DMA__DRQ_NUMBER EQU 1
-SCSI_TX_DMA__NUMBEROF_TDS EQU 0
-SCSI_TX_DMA__PRIORITY EQU 2
-SCSI_TX_DMA__TERMIN_EN EQU 0
-SCSI_TX_DMA__TERMIN_SEL EQU 0
-SCSI_TX_DMA__TERMOUT0_EN EQU 1
-SCSI_TX_DMA__TERMOUT0_SEL EQU 1
-SCSI_TX_DMA__TERMOUT1_EN EQU 0
-SCSI_TX_DMA__TERMOUT1_SEL EQU 0
-SCSI_TX_DMA_COMPLETE__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0
-SCSI_TX_DMA_COMPLETE__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0
-SCSI_TX_DMA_COMPLETE__INTC_MASK EQU 0x10
-SCSI_TX_DMA_COMPLETE__INTC_NUMBER EQU 4
-SCSI_TX_DMA_COMPLETE__INTC_PRIOR_NUM EQU 7
-SCSI_TX_DMA_COMPLETE__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_4
-SCSI_TX_DMA_COMPLETE__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0
-SCSI_TX_DMA_COMPLETE__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0
-
-/* SDCard_BSPIM */
-SDCard_BSPIM_BitCounter__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B1_UDB04_05_ACTL
-SDCard_BSPIM_BitCounter__16BIT_CONTROL_CONTROL_REG EQU CYREG_B1_UDB04_05_CTL
-SDCard_BSPIM_BitCounter__16BIT_CONTROL_COUNT_REG EQU CYREG_B1_UDB04_05_CTL
-SDCard_BSPIM_BitCounter__16BIT_COUNT_CONTROL_REG EQU CYREG_B1_UDB04_05_CTL
-SDCard_BSPIM_BitCounter__16BIT_COUNT_COUNT_REG EQU CYREG_B1_UDB04_05_CTL
-SDCard_BSPIM_BitCounter__16BIT_MASK_MASK_REG EQU CYREG_B1_UDB04_05_MSK
-SDCard_BSPIM_BitCounter__16BIT_MASK_PERIOD_REG EQU CYREG_B1_UDB04_05_MSK
-SDCard_BSPIM_BitCounter__16BIT_PERIOD_MASK_REG EQU CYREG_B1_UDB04_05_MSK
-SDCard_BSPIM_BitCounter__16BIT_PERIOD_PERIOD_REG EQU CYREG_B1_UDB04_05_MSK
-SDCard_BSPIM_BitCounter__CONTROL_AUX_CTL_REG EQU CYREG_B1_UDB04_ACTL
-SDCard_BSPIM_BitCounter__CONTROL_REG EQU CYREG_B1_UDB04_CTL
-SDCard_BSPIM_BitCounter__CONTROL_ST_REG EQU CYREG_B1_UDB04_ST_CTL
-SDCard_BSPIM_BitCounter__COUNT_REG EQU CYREG_B1_UDB04_CTL
-SDCard_BSPIM_BitCounter__COUNT_ST_REG EQU CYREG_B1_UDB04_ST_CTL
-SDCard_BSPIM_BitCounter__MASK_CTL_AUX_CTL_REG EQU CYREG_B1_UDB04_MSK_ACTL
-SDCard_BSPIM_BitCounter__PER_CTL_AUX_CTL_REG EQU CYREG_B1_UDB04_MSK_ACTL
-SDCard_BSPIM_BitCounter__PERIOD_REG EQU CYREG_B1_UDB04_MSK
-SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B1_UDB04_05_ACTL
-SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_REG EQU CYREG_B1_UDB04_05_ST
-SDCard_BSPIM_BitCounter_ST__MASK_REG EQU CYREG_B1_UDB04_MSK
-SDCard_BSPIM_BitCounter_ST__MASK_ST_AUX_CTL_REG EQU CYREG_B1_UDB04_MSK_ACTL
-SDCard_BSPIM_BitCounter_ST__PER_ST_AUX_CTL_REG EQU CYREG_B1_UDB04_MSK_ACTL
-SDCard_BSPIM_BitCounter_ST__STATUS_AUX_CTL_REG EQU CYREG_B1_UDB04_ACTL
-SDCard_BSPIM_BitCounter_ST__STATUS_CNT_REG EQU CYREG_B1_UDB04_ST_CTL
-SDCard_BSPIM_BitCounter_ST__STATUS_CONTROL_REG EQU CYREG_B1_UDB04_ST_CTL
-SDCard_BSPIM_BitCounter_ST__STATUS_REG EQU CYREG_B1_UDB04_ST
-SDCard_BSPIM_RxStsReg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB07_08_ACTL
-SDCard_BSPIM_RxStsReg__16BIT_STATUS_REG EQU CYREG_B0_UDB07_08_ST
-SDCard_BSPIM_RxStsReg__4__MASK EQU 0x10
-SDCard_BSPIM_RxStsReg__4__POS EQU 4
-SDCard_BSPIM_RxStsReg__5__MASK EQU 0x20
-SDCard_BSPIM_RxStsReg__5__POS EQU 5
-SDCard_BSPIM_RxStsReg__6__MASK EQU 0x40
-SDCard_BSPIM_RxStsReg__6__POS EQU 6
-SDCard_BSPIM_RxStsReg__MASK EQU 0x70
-SDCard_BSPIM_RxStsReg__MASK_REG EQU CYREG_B0_UDB07_MSK
-SDCard_BSPIM_RxStsReg__MASK_ST_AUX_CTL_REG EQU CYREG_B0_UDB07_MSK_ACTL
-SDCard_BSPIM_RxStsReg__PER_ST_AUX_CTL_REG EQU CYREG_B0_UDB07_MSK_ACTL
-SDCard_BSPIM_RxStsReg__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB07_ACTL
-SDCard_BSPIM_RxStsReg__STATUS_CNT_REG EQU CYREG_B0_UDB07_ST_CTL
-SDCard_BSPIM_RxStsReg__STATUS_CONTROL_REG EQU CYREG_B0_UDB07_ST_CTL
-SDCard_BSPIM_RxStsReg__STATUS_REG EQU CYREG_B0_UDB07_ST
-SDCard_BSPIM_sR8_Dp_u0__16BIT_A0_REG EQU CYREG_B1_UDB04_05_A0
-SDCard_BSPIM_sR8_Dp_u0__16BIT_A1_REG EQU CYREG_B1_UDB04_05_A1
-SDCard_BSPIM_sR8_Dp_u0__16BIT_D0_REG EQU CYREG_B1_UDB04_05_D0
-SDCard_BSPIM_sR8_Dp_u0__16BIT_D1_REG EQU CYREG_B1_UDB04_05_D1
-SDCard_BSPIM_sR8_Dp_u0__16BIT_DP_AUX_CTL_REG EQU CYREG_B1_UDB04_05_ACTL
-SDCard_BSPIM_sR8_Dp_u0__16BIT_F0_REG EQU CYREG_B1_UDB04_05_F0
-SDCard_BSPIM_sR8_Dp_u0__16BIT_F1_REG EQU CYREG_B1_UDB04_05_F1
-SDCard_BSPIM_sR8_Dp_u0__A0_A1_REG EQU CYREG_B1_UDB04_A0_A1
-SDCard_BSPIM_sR8_Dp_u0__A0_REG EQU CYREG_B1_UDB04_A0
-SDCard_BSPIM_sR8_Dp_u0__A1_REG EQU CYREG_B1_UDB04_A1
-SDCard_BSPIM_sR8_Dp_u0__D0_D1_REG EQU CYREG_B1_UDB04_D0_D1
-SDCard_BSPIM_sR8_Dp_u0__D0_REG EQU CYREG_B1_UDB04_D0
-SDCard_BSPIM_sR8_Dp_u0__D1_REG EQU CYREG_B1_UDB04_D1
-SDCard_BSPIM_sR8_Dp_u0__DP_AUX_CTL_REG EQU CYREG_B1_UDB04_ACTL
-SDCard_BSPIM_sR8_Dp_u0__F0_F1_REG EQU CYREG_B1_UDB04_F0_F1
-SDCard_BSPIM_sR8_Dp_u0__F0_REG EQU CYREG_B1_UDB04_F0
-SDCard_BSPIM_sR8_Dp_u0__F1_REG EQU CYREG_B1_UDB04_F1
-SDCard_BSPIM_sR8_Dp_u0__MSK_DP_AUX_CTL_REG EQU CYREG_B1_UDB04_MSK_ACTL
-SDCard_BSPIM_sR8_Dp_u0__PER_DP_AUX_CTL_REG EQU CYREG_B1_UDB04_MSK_ACTL
-SDCard_BSPIM_TxStsReg__0__MASK EQU 0x01
-SDCard_BSPIM_TxStsReg__0__POS EQU 0
-SDCard_BSPIM_TxStsReg__1__MASK EQU 0x02
-SDCard_BSPIM_TxStsReg__1__POS EQU 1
-SDCard_BSPIM_TxStsReg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B1_UDB07_08_ACTL
-SDCard_BSPIM_TxStsReg__16BIT_STATUS_REG EQU CYREG_B1_UDB07_08_ST
-SDCard_BSPIM_TxStsReg__2__MASK EQU 0x04
-SDCard_BSPIM_TxStsReg__2__POS EQU 2
-SDCard_BSPIM_TxStsReg__3__MASK EQU 0x08
-SDCard_BSPIM_TxStsReg__3__POS EQU 3
-SDCard_BSPIM_TxStsReg__4__MASK EQU 0x10
-SDCard_BSPIM_TxStsReg__4__POS EQU 4
-SDCard_BSPIM_TxStsReg__MASK EQU 0x1F
-SDCard_BSPIM_TxStsReg__MASK_REG EQU CYREG_B1_UDB07_MSK
-SDCard_BSPIM_TxStsReg__STATUS_AUX_CTL_REG EQU CYREG_B1_UDB07_ACTL
-SDCard_BSPIM_TxStsReg__STATUS_REG EQU CYREG_B1_UDB07_ST
-
-/* SD_CS */
-SD_CS__0__INTTYPE EQU CYREG_PICU3_INTTYPE5
-SD_CS__0__MASK EQU 0x20
-SD_CS__0__PC EQU CYREG_PRT3_PC5
-SD_CS__0__PORT EQU 3
-SD_CS__0__SHIFT EQU 5
-SD_CS__AG EQU CYREG_PRT3_AG
-SD_CS__AMUX EQU CYREG_PRT3_AMUX
-SD_CS__BIE EQU CYREG_PRT3_BIE
-SD_CS__BIT_MASK EQU CYREG_PRT3_BIT_MASK
-SD_CS__BYP EQU CYREG_PRT3_BYP
-SD_CS__CTL EQU CYREG_PRT3_CTL
-SD_CS__DM0 EQU CYREG_PRT3_DM0
-SD_CS__DM1 EQU CYREG_PRT3_DM1
-SD_CS__DM2 EQU CYREG_PRT3_DM2
-SD_CS__DR EQU CYREG_PRT3_DR
-SD_CS__INP_DIS EQU CYREG_PRT3_INP_DIS
-SD_CS__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU3_BASE
-SD_CS__LCD_COM_SEG EQU CYREG_PRT3_LCD_COM_SEG
-SD_CS__LCD_EN EQU CYREG_PRT3_LCD_EN
-SD_CS__MASK EQU 0x20
-SD_CS__PORT EQU 3
-SD_CS__PRT EQU CYREG_PRT3_PRT
-SD_CS__PRTDSI__CAPS_SEL EQU CYREG_PRT3_CAPS_SEL
-SD_CS__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT3_DBL_SYNC_IN
-SD_CS__PRTDSI__OE_SEL0 EQU CYREG_PRT3_OE_SEL0
-SD_CS__PRTDSI__OE_SEL1 EQU CYREG_PRT3_OE_SEL1
-SD_CS__PRTDSI__OUT_SEL0 EQU CYREG_PRT3_OUT_SEL0
-SD_CS__PRTDSI__OUT_SEL1 EQU CYREG_PRT3_OUT_SEL1
-SD_CS__PRTDSI__SYNC_OUT EQU CYREG_PRT3_SYNC_OUT
-SD_CS__PS EQU CYREG_PRT3_PS
-SD_CS__SHIFT EQU 5
-SD_CS__SLW EQU CYREG_PRT3_SLW
-
-/* SD_Data_Clk */
-SD_Data_Clk__CFG0 EQU CYREG_CLKDIST_DCFG0_CFG0
-SD_Data_Clk__CFG1 EQU CYREG_CLKDIST_DCFG0_CFG1
-SD_Data_Clk__CFG2 EQU CYREG_CLKDIST_DCFG0_CFG2
-SD_Data_Clk__CFG2_SRC_SEL_MASK EQU 0x07
-SD_Data_Clk__INDEX EQU 0x00
-SD_Data_Clk__PM_ACT_CFG EQU CYREG_PM_ACT_CFG2
-SD_Data_Clk__PM_ACT_MSK EQU 0x01
-SD_Data_Clk__PM_STBY_CFG EQU CYREG_PM_STBY_CFG2
-SD_Data_Clk__PM_STBY_MSK EQU 0x01
-
-/* SD_MISO */
-SD_MISO__0__INTTYPE EQU CYREG_PICU3_INTTYPE2
-SD_MISO__0__MASK EQU 0x04
-SD_MISO__0__PC EQU CYREG_PRT3_PC2
-SD_MISO__0__PORT EQU 3
-SD_MISO__0__SHIFT EQU 2
-SD_MISO__AG EQU CYREG_PRT3_AG
-SD_MISO__AMUX EQU CYREG_PRT3_AMUX
-SD_MISO__BIE EQU CYREG_PRT3_BIE
-SD_MISO__BIT_MASK EQU CYREG_PRT3_BIT_MASK
-SD_MISO__BYP EQU CYREG_PRT3_BYP
-SD_MISO__CTL EQU CYREG_PRT3_CTL
-SD_MISO__DM0 EQU CYREG_PRT3_DM0
-SD_MISO__DM1 EQU CYREG_PRT3_DM1
-SD_MISO__DM2 EQU CYREG_PRT3_DM2
-SD_MISO__DR EQU CYREG_PRT3_DR
-SD_MISO__INP_DIS EQU CYREG_PRT3_INP_DIS
-SD_MISO__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU3_BASE
-SD_MISO__LCD_COM_SEG EQU CYREG_PRT3_LCD_COM_SEG
-SD_MISO__LCD_EN EQU CYREG_PRT3_LCD_EN
-SD_MISO__MASK EQU 0x04
-SD_MISO__PORT EQU 3
-SD_MISO__PRT EQU CYREG_PRT3_PRT
-SD_MISO__PRTDSI__CAPS_SEL EQU CYREG_PRT3_CAPS_SEL
-SD_MISO__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT3_DBL_SYNC_IN
-SD_MISO__PRTDSI__OE_SEL0 EQU CYREG_PRT3_OE_SEL0
-SD_MISO__PRTDSI__OE_SEL1 EQU CYREG_PRT3_OE_SEL1
-SD_MISO__PRTDSI__OUT_SEL0 EQU CYREG_PRT3_OUT_SEL0
-SD_MISO__PRTDSI__OUT_SEL1 EQU CYREG_PRT3_OUT_SEL1
-SD_MISO__PRTDSI__SYNC_OUT EQU CYREG_PRT3_SYNC_OUT
-SD_MISO__PS EQU CYREG_PRT3_PS
-SD_MISO__SHIFT EQU 2
-SD_MISO__SLW EQU CYREG_PRT3_SLW
-
-/* SD_MOSI */
-SD_MOSI__0__INTTYPE EQU CYREG_PICU3_INTTYPE4
-SD_MOSI__0__MASK EQU 0x10
-SD_MOSI__0__PC EQU CYREG_PRT3_PC4
-SD_MOSI__0__PORT EQU 3
-SD_MOSI__0__SHIFT EQU 4
-SD_MOSI__AG EQU CYREG_PRT3_AG
-SD_MOSI__AMUX EQU CYREG_PRT3_AMUX
-SD_MOSI__BIE EQU CYREG_PRT3_BIE
-SD_MOSI__BIT_MASK EQU CYREG_PRT3_BIT_MASK
-SD_MOSI__BYP EQU CYREG_PRT3_BYP
-SD_MOSI__CTL EQU CYREG_PRT3_CTL
-SD_MOSI__DM0 EQU CYREG_PRT3_DM0
-SD_MOSI__DM1 EQU CYREG_PRT3_DM1
-SD_MOSI__DM2 EQU CYREG_PRT3_DM2
-SD_MOSI__DR EQU CYREG_PRT3_DR
-SD_MOSI__INP_DIS EQU CYREG_PRT3_INP_DIS
-SD_MOSI__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU3_BASE
-SD_MOSI__LCD_COM_SEG EQU CYREG_PRT3_LCD_COM_SEG
-SD_MOSI__LCD_EN EQU CYREG_PRT3_LCD_EN
-SD_MOSI__MASK EQU 0x10
-SD_MOSI__PORT EQU 3
-SD_MOSI__PRT EQU CYREG_PRT3_PRT
-SD_MOSI__PRTDSI__CAPS_SEL EQU CYREG_PRT3_CAPS_SEL
-SD_MOSI__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT3_DBL_SYNC_IN
-SD_MOSI__PRTDSI__OE_SEL0 EQU CYREG_PRT3_OE_SEL0
-SD_MOSI__PRTDSI__OE_SEL1 EQU CYREG_PRT3_OE_SEL1
-SD_MOSI__PRTDSI__OUT_SEL0 EQU CYREG_PRT3_OUT_SEL0
-SD_MOSI__PRTDSI__OUT_SEL1 EQU CYREG_PRT3_OUT_SEL1
-SD_MOSI__PRTDSI__SYNC_OUT EQU CYREG_PRT3_SYNC_OUT
-SD_MOSI__PS EQU CYREG_PRT3_PS
-SD_MOSI__SHIFT EQU 4
-SD_MOSI__SLW EQU CYREG_PRT3_SLW
-
-/* SD_RX_DMA */
-SD_RX_DMA__DRQ_CTL EQU CYREG_IDMUX_DRQ_CTL0
-SD_RX_DMA__DRQ_NUMBER EQU 2
-SD_RX_DMA__NUMBEROF_TDS EQU 0
-SD_RX_DMA__PRIORITY EQU 0
-SD_RX_DMA__TERMIN_EN EQU 0
-SD_RX_DMA__TERMIN_SEL EQU 0
-SD_RX_DMA__TERMOUT0_EN EQU 1
-SD_RX_DMA__TERMOUT0_SEL EQU 2
-SD_RX_DMA__TERMOUT1_EN EQU 0
-SD_RX_DMA__TERMOUT1_SEL EQU 0
-SD_RX_DMA_COMPLETE__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0
-SD_RX_DMA_COMPLETE__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0
-SD_RX_DMA_COMPLETE__INTC_MASK EQU 0x20
-SD_RX_DMA_COMPLETE__INTC_NUMBER EQU 5
-SD_RX_DMA_COMPLETE__INTC_PRIOR_NUM EQU 7
-SD_RX_DMA_COMPLETE__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_5
-SD_RX_DMA_COMPLETE__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0
-SD_RX_DMA_COMPLETE__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0
-
-/* SD_SCK */
-SD_SCK__0__INTTYPE EQU CYREG_PICU3_INTTYPE3
-SD_SCK__0__MASK EQU 0x08
-SD_SCK__0__PC EQU CYREG_PRT3_PC3
-SD_SCK__0__PORT EQU 3
-SD_SCK__0__SHIFT EQU 3
-SD_SCK__AG EQU CYREG_PRT3_AG
-SD_SCK__AMUX EQU CYREG_PRT3_AMUX
-SD_SCK__BIE EQU CYREG_PRT3_BIE
-SD_SCK__BIT_MASK EQU CYREG_PRT3_BIT_MASK
-SD_SCK__BYP EQU CYREG_PRT3_BYP
-SD_SCK__CTL EQU CYREG_PRT3_CTL
-SD_SCK__DM0 EQU CYREG_PRT3_DM0
-SD_SCK__DM1 EQU CYREG_PRT3_DM1
-SD_SCK__DM2 EQU CYREG_PRT3_DM2
-SD_SCK__DR EQU CYREG_PRT3_DR
-SD_SCK__INP_DIS EQU CYREG_PRT3_INP_DIS
-SD_SCK__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU3_BASE
-SD_SCK__LCD_COM_SEG EQU CYREG_PRT3_LCD_COM_SEG
-SD_SCK__LCD_EN EQU CYREG_PRT3_LCD_EN
-SD_SCK__MASK EQU 0x08
-SD_SCK__PORT EQU 3
-SD_SCK__PRT EQU CYREG_PRT3_PRT
-SD_SCK__PRTDSI__CAPS_SEL EQU CYREG_PRT3_CAPS_SEL
-SD_SCK__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT3_DBL_SYNC_IN
-SD_SCK__PRTDSI__OE_SEL0 EQU CYREG_PRT3_OE_SEL0
-SD_SCK__PRTDSI__OE_SEL1 EQU CYREG_PRT3_OE_SEL1
-SD_SCK__PRTDSI__OUT_SEL0 EQU CYREG_PRT3_OUT_SEL0
-SD_SCK__PRTDSI__OUT_SEL1 EQU CYREG_PRT3_OUT_SEL1
-SD_SCK__PRTDSI__SYNC_OUT EQU CYREG_PRT3_SYNC_OUT
-SD_SCK__PS EQU CYREG_PRT3_PS
-SD_SCK__SHIFT EQU 3
-SD_SCK__SLW EQU CYREG_PRT3_SLW
-
-/* SD_TX_DMA */
-SD_TX_DMA__DRQ_CTL EQU CYREG_IDMUX_DRQ_CTL0
-SD_TX_DMA__DRQ_NUMBER EQU 3
-SD_TX_DMA__NUMBEROF_TDS EQU 0
-SD_TX_DMA__PRIORITY EQU 1
-SD_TX_DMA__TERMIN_EN EQU 0
-SD_TX_DMA__TERMIN_SEL EQU 0
-SD_TX_DMA__TERMOUT0_EN EQU 1
-SD_TX_DMA__TERMOUT0_SEL EQU 3
-SD_TX_DMA__TERMOUT1_EN EQU 0
-SD_TX_DMA__TERMOUT1_SEL EQU 0
-SD_TX_DMA_COMPLETE__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0
-SD_TX_DMA_COMPLETE__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0
-SD_TX_DMA_COMPLETE__INTC_MASK EQU 0x40
-SD_TX_DMA_COMPLETE__INTC_NUMBER EQU 6
-SD_TX_DMA_COMPLETE__INTC_PRIOR_NUM EQU 7
-SD_TX_DMA_COMPLETE__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_6
-SD_TX_DMA_COMPLETE__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0
-SD_TX_DMA_COMPLETE__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0
-
-/* TERM_EN */
-TERM_EN__0__INTTYPE EQU CYREG_PICU15_INTTYPE3
-TERM_EN__0__MASK EQU 0x08
-TERM_EN__0__PC EQU CYREG_IO_PC_PRT15_PC3
-TERM_EN__0__PORT EQU 15
-TERM_EN__0__SHIFT EQU 3
-TERM_EN__AG EQU CYREG_PRT15_AG
-TERM_EN__AMUX EQU CYREG_PRT15_AMUX
-TERM_EN__BIE EQU CYREG_PRT15_BIE
-TERM_EN__BIT_MASK EQU CYREG_PRT15_BIT_MASK
-TERM_EN__BYP EQU CYREG_PRT15_BYP
-TERM_EN__CTL EQU CYREG_PRT15_CTL
-TERM_EN__DM0 EQU CYREG_PRT15_DM0
-TERM_EN__DM1 EQU CYREG_PRT15_DM1
-TERM_EN__DM2 EQU CYREG_PRT15_DM2
-TERM_EN__DR EQU CYREG_PRT15_DR
-TERM_EN__INP_DIS EQU CYREG_PRT15_INP_DIS
-TERM_EN__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU15_BASE
-TERM_EN__LCD_COM_SEG EQU CYREG_PRT15_LCD_COM_SEG
-TERM_EN__LCD_EN EQU CYREG_PRT15_LCD_EN
-TERM_EN__MASK EQU 0x08
-TERM_EN__PORT EQU 15
-TERM_EN__PRT EQU CYREG_PRT15_PRT
-TERM_EN__PRTDSI__CAPS_SEL EQU CYREG_PRT15_CAPS_SEL
-TERM_EN__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT15_DBL_SYNC_IN
-TERM_EN__PRTDSI__OE_SEL0 EQU CYREG_PRT15_OE_SEL0
-TERM_EN__PRTDSI__OE_SEL1 EQU CYREG_PRT15_OE_SEL1
-TERM_EN__PRTDSI__OUT_SEL0 EQU CYREG_PRT15_OUT_SEL0
-TERM_EN__PRTDSI__OUT_SEL1 EQU CYREG_PRT15_OUT_SEL1
-TERM_EN__PRTDSI__SYNC_OUT EQU CYREG_PRT15_SYNC_OUT
-TERM_EN__PS EQU CYREG_PRT15_PS
-TERM_EN__SHIFT EQU 3
-TERM_EN__SLW EQU CYREG_PRT15_SLW
+/* SD_CS */
+SD_CS__0__INTTYPE EQU CYREG_PICU3_INTTYPE5
+SD_CS__0__MASK EQU 0x20
+SD_CS__0__PC EQU CYREG_PRT3_PC5
+SD_CS__0__PORT EQU 3
+SD_CS__0__SHIFT EQU 5
+SD_CS__AG EQU CYREG_PRT3_AG
+SD_CS__AMUX EQU CYREG_PRT3_AMUX
+SD_CS__BIE EQU CYREG_PRT3_BIE
+SD_CS__BIT_MASK EQU CYREG_PRT3_BIT_MASK
+SD_CS__BYP EQU CYREG_PRT3_BYP
+SD_CS__CTL EQU CYREG_PRT3_CTL
+SD_CS__DM0 EQU CYREG_PRT3_DM0
+SD_CS__DM1 EQU CYREG_PRT3_DM1
+SD_CS__DM2 EQU CYREG_PRT3_DM2
+SD_CS__DR EQU CYREG_PRT3_DR
+SD_CS__INP_DIS EQU CYREG_PRT3_INP_DIS
+SD_CS__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU3_BASE
+SD_CS__LCD_COM_SEG EQU CYREG_PRT3_LCD_COM_SEG
+SD_CS__LCD_EN EQU CYREG_PRT3_LCD_EN
+SD_CS__MASK EQU 0x20
+SD_CS__PORT EQU 3
+SD_CS__PRT EQU CYREG_PRT3_PRT
+SD_CS__PRTDSI__CAPS_SEL EQU CYREG_PRT3_CAPS_SEL
+SD_CS__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT3_DBL_SYNC_IN
+SD_CS__PRTDSI__OE_SEL0 EQU CYREG_PRT3_OE_SEL0
+SD_CS__PRTDSI__OE_SEL1 EQU CYREG_PRT3_OE_SEL1
+SD_CS__PRTDSI__OUT_SEL0 EQU CYREG_PRT3_OUT_SEL0
+SD_CS__PRTDSI__OUT_SEL1 EQU CYREG_PRT3_OUT_SEL1
+SD_CS__PRTDSI__SYNC_OUT EQU CYREG_PRT3_SYNC_OUT
+SD_CS__PS EQU CYREG_PRT3_PS
+SD_CS__SHIFT EQU 5
+SD_CS__SLW EQU CYREG_PRT3_SLW
/* USBFS */
USBFS_arb_int__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0
USBFS_USB__USBIO_CR0 EQU CYREG_USB_USBIO_CR0
USBFS_USB__USBIO_CR1 EQU CYREG_USB_USBIO_CR1
+/* SDCard */
+SDCard_BSPIM_BitCounter__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B1_UDB04_05_ACTL
+SDCard_BSPIM_BitCounter__16BIT_CONTROL_CONTROL_REG EQU CYREG_B1_UDB04_05_CTL
+SDCard_BSPIM_BitCounter__16BIT_CONTROL_COUNT_REG EQU CYREG_B1_UDB04_05_CTL
+SDCard_BSPIM_BitCounter__16BIT_COUNT_CONTROL_REG EQU CYREG_B1_UDB04_05_CTL
+SDCard_BSPIM_BitCounter__16BIT_COUNT_COUNT_REG EQU CYREG_B1_UDB04_05_CTL
+SDCard_BSPIM_BitCounter__16BIT_MASK_MASK_REG EQU CYREG_B1_UDB04_05_MSK
+SDCard_BSPIM_BitCounter__16BIT_MASK_PERIOD_REG EQU CYREG_B1_UDB04_05_MSK
+SDCard_BSPIM_BitCounter__16BIT_PERIOD_MASK_REG EQU CYREG_B1_UDB04_05_MSK
+SDCard_BSPIM_BitCounter__16BIT_PERIOD_PERIOD_REG EQU CYREG_B1_UDB04_05_MSK
+SDCard_BSPIM_BitCounter__CONTROL_AUX_CTL_REG EQU CYREG_B1_UDB04_ACTL
+SDCard_BSPIM_BitCounter__CONTROL_REG EQU CYREG_B1_UDB04_CTL
+SDCard_BSPIM_BitCounter__CONTROL_ST_REG EQU CYREG_B1_UDB04_ST_CTL
+SDCard_BSPIM_BitCounter__COUNT_REG EQU CYREG_B1_UDB04_CTL
+SDCard_BSPIM_BitCounter__COUNT_ST_REG EQU CYREG_B1_UDB04_ST_CTL
+SDCard_BSPIM_BitCounter__MASK_CTL_AUX_CTL_REG EQU CYREG_B1_UDB04_MSK_ACTL
+SDCard_BSPIM_BitCounter__PER_CTL_AUX_CTL_REG EQU CYREG_B1_UDB04_MSK_ACTL
+SDCard_BSPIM_BitCounter__PERIOD_REG EQU CYREG_B1_UDB04_MSK
+SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B1_UDB04_05_ACTL
+SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_REG EQU CYREG_B1_UDB04_05_ST
+SDCard_BSPIM_BitCounter_ST__MASK_REG EQU CYREG_B1_UDB04_MSK
+SDCard_BSPIM_BitCounter_ST__MASK_ST_AUX_CTL_REG EQU CYREG_B1_UDB04_MSK_ACTL
+SDCard_BSPIM_BitCounter_ST__PER_ST_AUX_CTL_REG EQU CYREG_B1_UDB04_MSK_ACTL
+SDCard_BSPIM_BitCounter_ST__STATUS_AUX_CTL_REG EQU CYREG_B1_UDB04_ACTL
+SDCard_BSPIM_BitCounter_ST__STATUS_CNT_REG EQU CYREG_B1_UDB04_ST_CTL
+SDCard_BSPIM_BitCounter_ST__STATUS_CONTROL_REG EQU CYREG_B1_UDB04_ST_CTL
+SDCard_BSPIM_BitCounter_ST__STATUS_REG EQU CYREG_B1_UDB04_ST
+SDCard_BSPIM_RxStsReg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB07_08_ACTL
+SDCard_BSPIM_RxStsReg__16BIT_STATUS_REG EQU CYREG_B0_UDB07_08_ST
+SDCard_BSPIM_RxStsReg__4__MASK EQU 0x10
+SDCard_BSPIM_RxStsReg__4__POS EQU 4
+SDCard_BSPIM_RxStsReg__5__MASK EQU 0x20
+SDCard_BSPIM_RxStsReg__5__POS EQU 5
+SDCard_BSPIM_RxStsReg__6__MASK EQU 0x40
+SDCard_BSPIM_RxStsReg__6__POS EQU 6
+SDCard_BSPIM_RxStsReg__MASK EQU 0x70
+SDCard_BSPIM_RxStsReg__MASK_REG EQU CYREG_B0_UDB07_MSK
+SDCard_BSPIM_RxStsReg__MASK_ST_AUX_CTL_REG EQU CYREG_B0_UDB07_MSK_ACTL
+SDCard_BSPIM_RxStsReg__PER_ST_AUX_CTL_REG EQU CYREG_B0_UDB07_MSK_ACTL
+SDCard_BSPIM_RxStsReg__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB07_ACTL
+SDCard_BSPIM_RxStsReg__STATUS_CNT_REG EQU CYREG_B0_UDB07_ST_CTL
+SDCard_BSPIM_RxStsReg__STATUS_CONTROL_REG EQU CYREG_B0_UDB07_ST_CTL
+SDCard_BSPIM_RxStsReg__STATUS_REG EQU CYREG_B0_UDB07_ST
+SDCard_BSPIM_sR8_Dp_u0__16BIT_A0_REG EQU CYREG_B1_UDB04_05_A0
+SDCard_BSPIM_sR8_Dp_u0__16BIT_A1_REG EQU CYREG_B1_UDB04_05_A1
+SDCard_BSPIM_sR8_Dp_u0__16BIT_D0_REG EQU CYREG_B1_UDB04_05_D0
+SDCard_BSPIM_sR8_Dp_u0__16BIT_D1_REG EQU CYREG_B1_UDB04_05_D1
+SDCard_BSPIM_sR8_Dp_u0__16BIT_DP_AUX_CTL_REG EQU CYREG_B1_UDB04_05_ACTL
+SDCard_BSPIM_sR8_Dp_u0__16BIT_F0_REG EQU CYREG_B1_UDB04_05_F0
+SDCard_BSPIM_sR8_Dp_u0__16BIT_F1_REG EQU CYREG_B1_UDB04_05_F1
+SDCard_BSPIM_sR8_Dp_u0__A0_A1_REG EQU CYREG_B1_UDB04_A0_A1
+SDCard_BSPIM_sR8_Dp_u0__A0_REG EQU CYREG_B1_UDB04_A0
+SDCard_BSPIM_sR8_Dp_u0__A1_REG EQU CYREG_B1_UDB04_A1
+SDCard_BSPIM_sR8_Dp_u0__D0_D1_REG EQU CYREG_B1_UDB04_D0_D1
+SDCard_BSPIM_sR8_Dp_u0__D0_REG EQU CYREG_B1_UDB04_D0
+SDCard_BSPIM_sR8_Dp_u0__D1_REG EQU CYREG_B1_UDB04_D1
+SDCard_BSPIM_sR8_Dp_u0__DP_AUX_CTL_REG EQU CYREG_B1_UDB04_ACTL
+SDCard_BSPIM_sR8_Dp_u0__F0_F1_REG EQU CYREG_B1_UDB04_F0_F1
+SDCard_BSPIM_sR8_Dp_u0__F0_REG EQU CYREG_B1_UDB04_F0
+SDCard_BSPIM_sR8_Dp_u0__F1_REG EQU CYREG_B1_UDB04_F1
+SDCard_BSPIM_sR8_Dp_u0__MSK_DP_AUX_CTL_REG EQU CYREG_B1_UDB04_MSK_ACTL
+SDCard_BSPIM_sR8_Dp_u0__PER_DP_AUX_CTL_REG EQU CYREG_B1_UDB04_MSK_ACTL
+SDCard_BSPIM_TxStsReg__0__MASK EQU 0x01
+SDCard_BSPIM_TxStsReg__0__POS EQU 0
+SDCard_BSPIM_TxStsReg__1__MASK EQU 0x02
+SDCard_BSPIM_TxStsReg__1__POS EQU 1
+SDCard_BSPIM_TxStsReg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B1_UDB07_08_ACTL
+SDCard_BSPIM_TxStsReg__16BIT_STATUS_REG EQU CYREG_B1_UDB07_08_ST
+SDCard_BSPIM_TxStsReg__2__MASK EQU 0x04
+SDCard_BSPIM_TxStsReg__2__POS EQU 2
+SDCard_BSPIM_TxStsReg__3__MASK EQU 0x08
+SDCard_BSPIM_TxStsReg__3__POS EQU 3
+SDCard_BSPIM_TxStsReg__4__MASK EQU 0x10
+SDCard_BSPIM_TxStsReg__4__POS EQU 4
+SDCard_BSPIM_TxStsReg__MASK EQU 0x1F
+SDCard_BSPIM_TxStsReg__MASK_REG EQU CYREG_B1_UDB07_MSK
+SDCard_BSPIM_TxStsReg__STATUS_AUX_CTL_REG EQU CYREG_B1_UDB07_ACTL
+SDCard_BSPIM_TxStsReg__STATUS_REG EQU CYREG_B1_UDB07_ST
+
+/* SD_SCK */
+SD_SCK__0__INTTYPE EQU CYREG_PICU3_INTTYPE3
+SD_SCK__0__MASK EQU 0x08
+SD_SCK__0__PC EQU CYREG_PRT3_PC3
+SD_SCK__0__PORT EQU 3
+SD_SCK__0__SHIFT EQU 3
+SD_SCK__AG EQU CYREG_PRT3_AG
+SD_SCK__AMUX EQU CYREG_PRT3_AMUX
+SD_SCK__BIE EQU CYREG_PRT3_BIE
+SD_SCK__BIT_MASK EQU CYREG_PRT3_BIT_MASK
+SD_SCK__BYP EQU CYREG_PRT3_BYP
+SD_SCK__CTL EQU CYREG_PRT3_CTL
+SD_SCK__DM0 EQU CYREG_PRT3_DM0
+SD_SCK__DM1 EQU CYREG_PRT3_DM1
+SD_SCK__DM2 EQU CYREG_PRT3_DM2
+SD_SCK__DR EQU CYREG_PRT3_DR
+SD_SCK__INP_DIS EQU CYREG_PRT3_INP_DIS
+SD_SCK__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU3_BASE
+SD_SCK__LCD_COM_SEG EQU CYREG_PRT3_LCD_COM_SEG
+SD_SCK__LCD_EN EQU CYREG_PRT3_LCD_EN
+SD_SCK__MASK EQU 0x08
+SD_SCK__PORT EQU 3
+SD_SCK__PRT EQU CYREG_PRT3_PRT
+SD_SCK__PRTDSI__CAPS_SEL EQU CYREG_PRT3_CAPS_SEL
+SD_SCK__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT3_DBL_SYNC_IN
+SD_SCK__PRTDSI__OE_SEL0 EQU CYREG_PRT3_OE_SEL0
+SD_SCK__PRTDSI__OE_SEL1 EQU CYREG_PRT3_OE_SEL1
+SD_SCK__PRTDSI__OUT_SEL0 EQU CYREG_PRT3_OUT_SEL0
+SD_SCK__PRTDSI__OUT_SEL1 EQU CYREG_PRT3_OUT_SEL1
+SD_SCK__PRTDSI__SYNC_OUT EQU CYREG_PRT3_SYNC_OUT
+SD_SCK__PS EQU CYREG_PRT3_PS
+SD_SCK__SHIFT EQU 3
+SD_SCK__SLW EQU CYREG_PRT3_SLW
+
+/* SCSI_In */
+SCSI_In__0__INTTYPE EQU CYREG_PICU6_INTTYPE1
+SCSI_In__0__MASK EQU 0x02
+SCSI_In__0__PC EQU CYREG_PRT6_PC1
+SCSI_In__0__PORT EQU 6
+SCSI_In__0__SHIFT EQU 1
+SCSI_In__AG EQU CYREG_PRT6_AG
+SCSI_In__AMUX EQU CYREG_PRT6_AMUX
+SCSI_In__BIE EQU CYREG_PRT6_BIE
+SCSI_In__BIT_MASK EQU CYREG_PRT6_BIT_MASK
+SCSI_In__BYP EQU CYREG_PRT6_BYP
+SCSI_In__CTL EQU CYREG_PRT6_CTL
+SCSI_In__DBP__INTTYPE EQU CYREG_PICU6_INTTYPE1
+SCSI_In__DBP__MASK EQU 0x02
+SCSI_In__DBP__PC EQU CYREG_PRT6_PC1
+SCSI_In__DBP__PORT EQU 6
+SCSI_In__DBP__SHIFT EQU 1
+SCSI_In__DM0 EQU CYREG_PRT6_DM0
+SCSI_In__DM1 EQU CYREG_PRT6_DM1
+SCSI_In__DM2 EQU CYREG_PRT6_DM2
+SCSI_In__DR EQU CYREG_PRT6_DR
+SCSI_In__INP_DIS EQU CYREG_PRT6_INP_DIS
+SCSI_In__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU6_BASE
+SCSI_In__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
+SCSI_In__LCD_EN EQU CYREG_PRT6_LCD_EN
+SCSI_In__MASK EQU 0x02
+SCSI_In__PORT EQU 6
+SCSI_In__PRT EQU CYREG_PRT6_PRT
+SCSI_In__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
+SCSI_In__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
+SCSI_In__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
+SCSI_In__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
+SCSI_In__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
+SCSI_In__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
+SCSI_In__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
+SCSI_In__PS EQU CYREG_PRT6_PS
+SCSI_In__SHIFT EQU 1
+SCSI_In__SLW EQU CYREG_PRT6_SLW
+SCSI_In_DBx__0__AG EQU CYREG_PRT6_AG
+SCSI_In_DBx__0__AMUX EQU CYREG_PRT6_AMUX
+SCSI_In_DBx__0__BIE EQU CYREG_PRT6_BIE
+SCSI_In_DBx__0__BIT_MASK EQU CYREG_PRT6_BIT_MASK
+SCSI_In_DBx__0__BYP EQU CYREG_PRT6_BYP
+SCSI_In_DBx__0__CTL EQU CYREG_PRT6_CTL
+SCSI_In_DBx__0__DM0 EQU CYREG_PRT6_DM0
+SCSI_In_DBx__0__DM1 EQU CYREG_PRT6_DM1
+SCSI_In_DBx__0__DM2 EQU CYREG_PRT6_DM2
+SCSI_In_DBx__0__DR EQU CYREG_PRT6_DR
+SCSI_In_DBx__0__INP_DIS EQU CYREG_PRT6_INP_DIS
+SCSI_In_DBx__0__INTTYPE EQU CYREG_PICU6_INTTYPE6
+SCSI_In_DBx__0__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
+SCSI_In_DBx__0__LCD_EN EQU CYREG_PRT6_LCD_EN
+SCSI_In_DBx__0__MASK EQU 0x40
+SCSI_In_DBx__0__PC EQU CYREG_PRT6_PC6
+SCSI_In_DBx__0__PORT EQU 6
+SCSI_In_DBx__0__PRT EQU CYREG_PRT6_PRT
+SCSI_In_DBx__0__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
+SCSI_In_DBx__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
+SCSI_In_DBx__0__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
+SCSI_In_DBx__0__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
+SCSI_In_DBx__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
+SCSI_In_DBx__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
+SCSI_In_DBx__0__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
+SCSI_In_DBx__0__PS EQU CYREG_PRT6_PS
+SCSI_In_DBx__0__SHIFT EQU 6
+SCSI_In_DBx__0__SLW EQU CYREG_PRT6_SLW
+SCSI_In_DBx__1__AG EQU CYREG_PRT6_AG
+SCSI_In_DBx__1__AMUX EQU CYREG_PRT6_AMUX
+SCSI_In_DBx__1__BIE EQU CYREG_PRT6_BIE
+SCSI_In_DBx__1__BIT_MASK EQU CYREG_PRT6_BIT_MASK
+SCSI_In_DBx__1__BYP EQU CYREG_PRT6_BYP
+SCSI_In_DBx__1__CTL EQU CYREG_PRT6_CTL
+SCSI_In_DBx__1__DM0 EQU CYREG_PRT6_DM0
+SCSI_In_DBx__1__DM1 EQU CYREG_PRT6_DM1
+SCSI_In_DBx__1__DM2 EQU CYREG_PRT6_DM2
+SCSI_In_DBx__1__DR EQU CYREG_PRT6_DR
+SCSI_In_DBx__1__INP_DIS EQU CYREG_PRT6_INP_DIS
+SCSI_In_DBx__1__INTTYPE EQU CYREG_PICU6_INTTYPE4
+SCSI_In_DBx__1__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
+SCSI_In_DBx__1__LCD_EN EQU CYREG_PRT6_LCD_EN
+SCSI_In_DBx__1__MASK EQU 0x10
+SCSI_In_DBx__1__PC EQU CYREG_PRT6_PC4
+SCSI_In_DBx__1__PORT EQU 6
+SCSI_In_DBx__1__PRT EQU CYREG_PRT6_PRT
+SCSI_In_DBx__1__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
+SCSI_In_DBx__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
+SCSI_In_DBx__1__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
+SCSI_In_DBx__1__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
+SCSI_In_DBx__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
+SCSI_In_DBx__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
+SCSI_In_DBx__1__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
+SCSI_In_DBx__1__PS EQU CYREG_PRT6_PS
+SCSI_In_DBx__1__SHIFT EQU 4
+SCSI_In_DBx__1__SLW EQU CYREG_PRT6_SLW
+SCSI_In_DBx__2__AG EQU CYREG_PRT12_AG
+SCSI_In_DBx__2__BIE EQU CYREG_PRT12_BIE
+SCSI_In_DBx__2__BIT_MASK EQU CYREG_PRT12_BIT_MASK
+SCSI_In_DBx__2__BYP EQU CYREG_PRT12_BYP
+SCSI_In_DBx__2__DM0 EQU CYREG_PRT12_DM0
+SCSI_In_DBx__2__DM1 EQU CYREG_PRT12_DM1
+SCSI_In_DBx__2__DM2 EQU CYREG_PRT12_DM2
+SCSI_In_DBx__2__DR EQU CYREG_PRT12_DR
+SCSI_In_DBx__2__INP_DIS EQU CYREG_PRT12_INP_DIS
+SCSI_In_DBx__2__INTTYPE EQU CYREG_PICU12_INTTYPE4
+SCSI_In_DBx__2__MASK EQU 0x10
+SCSI_In_DBx__2__PC EQU CYREG_PRT12_PC4
+SCSI_In_DBx__2__PORT EQU 12
+SCSI_In_DBx__2__PRT EQU CYREG_PRT12_PRT
+SCSI_In_DBx__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN
+SCSI_In_DBx__2__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0
+SCSI_In_DBx__2__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1
+SCSI_In_DBx__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0
+SCSI_In_DBx__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1
+SCSI_In_DBx__2__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT
+SCSI_In_DBx__2__PS EQU CYREG_PRT12_PS
+SCSI_In_DBx__2__SHIFT EQU 4
+SCSI_In_DBx__2__SIO_CFG EQU CYREG_PRT12_SIO_CFG
+SCSI_In_DBx__2__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF
+SCSI_In_DBx__2__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN
+SCSI_In_DBx__2__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ
+SCSI_In_DBx__2__SLW EQU CYREG_PRT12_SLW
+SCSI_In_DBx__3__AG EQU CYREG_PRT2_AG
+SCSI_In_DBx__3__AMUX EQU CYREG_PRT2_AMUX
+SCSI_In_DBx__3__BIE EQU CYREG_PRT2_BIE
+SCSI_In_DBx__3__BIT_MASK EQU CYREG_PRT2_BIT_MASK
+SCSI_In_DBx__3__BYP EQU CYREG_PRT2_BYP
+SCSI_In_DBx__3__CTL EQU CYREG_PRT2_CTL
+SCSI_In_DBx__3__DM0 EQU CYREG_PRT2_DM0
+SCSI_In_DBx__3__DM1 EQU CYREG_PRT2_DM1
+SCSI_In_DBx__3__DM2 EQU CYREG_PRT2_DM2
+SCSI_In_DBx__3__DR EQU CYREG_PRT2_DR
+SCSI_In_DBx__3__INP_DIS EQU CYREG_PRT2_INP_DIS
+SCSI_In_DBx__3__INTTYPE EQU CYREG_PICU2_INTTYPE6
+SCSI_In_DBx__3__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
+SCSI_In_DBx__3__LCD_EN EQU CYREG_PRT2_LCD_EN
+SCSI_In_DBx__3__MASK EQU 0x40
+SCSI_In_DBx__3__PC EQU CYREG_PRT2_PC6
+SCSI_In_DBx__3__PORT EQU 2
+SCSI_In_DBx__3__PRT EQU CYREG_PRT2_PRT
+SCSI_In_DBx__3__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
+SCSI_In_DBx__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
+SCSI_In_DBx__3__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
+SCSI_In_DBx__3__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
+SCSI_In_DBx__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
+SCSI_In_DBx__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
+SCSI_In_DBx__3__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
+SCSI_In_DBx__3__PS EQU CYREG_PRT2_PS
+SCSI_In_DBx__3__SHIFT EQU 6
+SCSI_In_DBx__3__SLW EQU CYREG_PRT2_SLW
+SCSI_In_DBx__4__AG EQU CYREG_PRT2_AG
+SCSI_In_DBx__4__AMUX EQU CYREG_PRT2_AMUX
+SCSI_In_DBx__4__BIE EQU CYREG_PRT2_BIE
+SCSI_In_DBx__4__BIT_MASK EQU CYREG_PRT2_BIT_MASK
+SCSI_In_DBx__4__BYP EQU CYREG_PRT2_BYP
+SCSI_In_DBx__4__CTL EQU CYREG_PRT2_CTL
+SCSI_In_DBx__4__DM0 EQU CYREG_PRT2_DM0
+SCSI_In_DBx__4__DM1 EQU CYREG_PRT2_DM1
+SCSI_In_DBx__4__DM2 EQU CYREG_PRT2_DM2
+SCSI_In_DBx__4__DR EQU CYREG_PRT2_DR
+SCSI_In_DBx__4__INP_DIS EQU CYREG_PRT2_INP_DIS
+SCSI_In_DBx__4__INTTYPE EQU CYREG_PICU2_INTTYPE4
+SCSI_In_DBx__4__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
+SCSI_In_DBx__4__LCD_EN EQU CYREG_PRT2_LCD_EN
+SCSI_In_DBx__4__MASK EQU 0x10
+SCSI_In_DBx__4__PC EQU CYREG_PRT2_PC4
+SCSI_In_DBx__4__PORT EQU 2
+SCSI_In_DBx__4__PRT EQU CYREG_PRT2_PRT
+SCSI_In_DBx__4__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
+SCSI_In_DBx__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
+SCSI_In_DBx__4__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
+SCSI_In_DBx__4__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
+SCSI_In_DBx__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
+SCSI_In_DBx__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
+SCSI_In_DBx__4__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
+SCSI_In_DBx__4__PS EQU CYREG_PRT2_PS
+SCSI_In_DBx__4__SHIFT EQU 4
+SCSI_In_DBx__4__SLW EQU CYREG_PRT2_SLW
+SCSI_In_DBx__5__AG EQU CYREG_PRT2_AG
+SCSI_In_DBx__5__AMUX EQU CYREG_PRT2_AMUX
+SCSI_In_DBx__5__BIE EQU CYREG_PRT2_BIE
+SCSI_In_DBx__5__BIT_MASK EQU CYREG_PRT2_BIT_MASK
+SCSI_In_DBx__5__BYP EQU CYREG_PRT2_BYP
+SCSI_In_DBx__5__CTL EQU CYREG_PRT2_CTL
+SCSI_In_DBx__5__DM0 EQU CYREG_PRT2_DM0
+SCSI_In_DBx__5__DM1 EQU CYREG_PRT2_DM1
+SCSI_In_DBx__5__DM2 EQU CYREG_PRT2_DM2
+SCSI_In_DBx__5__DR EQU CYREG_PRT2_DR
+SCSI_In_DBx__5__INP_DIS EQU CYREG_PRT2_INP_DIS
+SCSI_In_DBx__5__INTTYPE EQU CYREG_PICU2_INTTYPE2
+SCSI_In_DBx__5__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
+SCSI_In_DBx__5__LCD_EN EQU CYREG_PRT2_LCD_EN
+SCSI_In_DBx__5__MASK EQU 0x04
+SCSI_In_DBx__5__PC EQU CYREG_PRT2_PC2
+SCSI_In_DBx__5__PORT EQU 2
+SCSI_In_DBx__5__PRT EQU CYREG_PRT2_PRT
+SCSI_In_DBx__5__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
+SCSI_In_DBx__5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
+SCSI_In_DBx__5__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
+SCSI_In_DBx__5__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
+SCSI_In_DBx__5__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
+SCSI_In_DBx__5__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
+SCSI_In_DBx__5__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
+SCSI_In_DBx__5__PS EQU CYREG_PRT2_PS
+SCSI_In_DBx__5__SHIFT EQU 2
+SCSI_In_DBx__5__SLW EQU CYREG_PRT2_SLW
+SCSI_In_DBx__6__AG EQU CYREG_PRT2_AG
+SCSI_In_DBx__6__AMUX EQU CYREG_PRT2_AMUX
+SCSI_In_DBx__6__BIE EQU CYREG_PRT2_BIE
+SCSI_In_DBx__6__BIT_MASK EQU CYREG_PRT2_BIT_MASK
+SCSI_In_DBx__6__BYP EQU CYREG_PRT2_BYP
+SCSI_In_DBx__6__CTL EQU CYREG_PRT2_CTL
+SCSI_In_DBx__6__DM0 EQU CYREG_PRT2_DM0
+SCSI_In_DBx__6__DM1 EQU CYREG_PRT2_DM1
+SCSI_In_DBx__6__DM2 EQU CYREG_PRT2_DM2
+SCSI_In_DBx__6__DR EQU CYREG_PRT2_DR
+SCSI_In_DBx__6__INP_DIS EQU CYREG_PRT2_INP_DIS
+SCSI_In_DBx__6__INTTYPE EQU CYREG_PICU2_INTTYPE0
+SCSI_In_DBx__6__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
+SCSI_In_DBx__6__LCD_EN EQU CYREG_PRT2_LCD_EN
+SCSI_In_DBx__6__MASK EQU 0x01
+SCSI_In_DBx__6__PC EQU CYREG_PRT2_PC0
+SCSI_In_DBx__6__PORT EQU 2
+SCSI_In_DBx__6__PRT EQU CYREG_PRT2_PRT
+SCSI_In_DBx__6__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
+SCSI_In_DBx__6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
+SCSI_In_DBx__6__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
+SCSI_In_DBx__6__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
+SCSI_In_DBx__6__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
+SCSI_In_DBx__6__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
+SCSI_In_DBx__6__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
+SCSI_In_DBx__6__PS EQU CYREG_PRT2_PS
+SCSI_In_DBx__6__SHIFT EQU 0
+SCSI_In_DBx__6__SLW EQU CYREG_PRT2_SLW
+SCSI_In_DBx__7__AG EQU CYREG_PRT6_AG
+SCSI_In_DBx__7__AMUX EQU CYREG_PRT6_AMUX
+SCSI_In_DBx__7__BIE EQU CYREG_PRT6_BIE
+SCSI_In_DBx__7__BIT_MASK EQU CYREG_PRT6_BIT_MASK
+SCSI_In_DBx__7__BYP EQU CYREG_PRT6_BYP
+SCSI_In_DBx__7__CTL EQU CYREG_PRT6_CTL
+SCSI_In_DBx__7__DM0 EQU CYREG_PRT6_DM0
+SCSI_In_DBx__7__DM1 EQU CYREG_PRT6_DM1
+SCSI_In_DBx__7__DM2 EQU CYREG_PRT6_DM2
+SCSI_In_DBx__7__DR EQU CYREG_PRT6_DR
+SCSI_In_DBx__7__INP_DIS EQU CYREG_PRT6_INP_DIS
+SCSI_In_DBx__7__INTTYPE EQU CYREG_PICU6_INTTYPE3
+SCSI_In_DBx__7__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
+SCSI_In_DBx__7__LCD_EN EQU CYREG_PRT6_LCD_EN
+SCSI_In_DBx__7__MASK EQU 0x08
+SCSI_In_DBx__7__PC EQU CYREG_PRT6_PC3
+SCSI_In_DBx__7__PORT EQU 6
+SCSI_In_DBx__7__PRT EQU CYREG_PRT6_PRT
+SCSI_In_DBx__7__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
+SCSI_In_DBx__7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
+SCSI_In_DBx__7__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
+SCSI_In_DBx__7__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
+SCSI_In_DBx__7__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
+SCSI_In_DBx__7__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
+SCSI_In_DBx__7__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
+SCSI_In_DBx__7__PS EQU CYREG_PRT6_PS
+SCSI_In_DBx__7__SHIFT EQU 3
+SCSI_In_DBx__7__SLW EQU CYREG_PRT6_SLW
+SCSI_In_DBx__DB0__AG EQU CYREG_PRT6_AG
+SCSI_In_DBx__DB0__AMUX EQU CYREG_PRT6_AMUX
+SCSI_In_DBx__DB0__BIE EQU CYREG_PRT6_BIE
+SCSI_In_DBx__DB0__BIT_MASK EQU CYREG_PRT6_BIT_MASK
+SCSI_In_DBx__DB0__BYP EQU CYREG_PRT6_BYP
+SCSI_In_DBx__DB0__CTL EQU CYREG_PRT6_CTL
+SCSI_In_DBx__DB0__DM0 EQU CYREG_PRT6_DM0
+SCSI_In_DBx__DB0__DM1 EQU CYREG_PRT6_DM1
+SCSI_In_DBx__DB0__DM2 EQU CYREG_PRT6_DM2
+SCSI_In_DBx__DB0__DR EQU CYREG_PRT6_DR
+SCSI_In_DBx__DB0__INP_DIS EQU CYREG_PRT6_INP_DIS
+SCSI_In_DBx__DB0__INTTYPE EQU CYREG_PICU6_INTTYPE6
+SCSI_In_DBx__DB0__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
+SCSI_In_DBx__DB0__LCD_EN EQU CYREG_PRT6_LCD_EN
+SCSI_In_DBx__DB0__MASK EQU 0x40
+SCSI_In_DBx__DB0__PC EQU CYREG_PRT6_PC6
+SCSI_In_DBx__DB0__PORT EQU 6
+SCSI_In_DBx__DB0__PRT EQU CYREG_PRT6_PRT
+SCSI_In_DBx__DB0__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
+SCSI_In_DBx__DB0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
+SCSI_In_DBx__DB0__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
+SCSI_In_DBx__DB0__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
+SCSI_In_DBx__DB0__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
+SCSI_In_DBx__DB0__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
+SCSI_In_DBx__DB0__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
+SCSI_In_DBx__DB0__PS EQU CYREG_PRT6_PS
+SCSI_In_DBx__DB0__SHIFT EQU 6
+SCSI_In_DBx__DB0__SLW EQU CYREG_PRT6_SLW
+SCSI_In_DBx__DB1__AG EQU CYREG_PRT6_AG
+SCSI_In_DBx__DB1__AMUX EQU CYREG_PRT6_AMUX
+SCSI_In_DBx__DB1__BIE EQU CYREG_PRT6_BIE
+SCSI_In_DBx__DB1__BIT_MASK EQU CYREG_PRT6_BIT_MASK
+SCSI_In_DBx__DB1__BYP EQU CYREG_PRT6_BYP
+SCSI_In_DBx__DB1__CTL EQU CYREG_PRT6_CTL
+SCSI_In_DBx__DB1__DM0 EQU CYREG_PRT6_DM0
+SCSI_In_DBx__DB1__DM1 EQU CYREG_PRT6_DM1
+SCSI_In_DBx__DB1__DM2 EQU CYREG_PRT6_DM2
+SCSI_In_DBx__DB1__DR EQU CYREG_PRT6_DR
+SCSI_In_DBx__DB1__INP_DIS EQU CYREG_PRT6_INP_DIS
+SCSI_In_DBx__DB1__INTTYPE EQU CYREG_PICU6_INTTYPE4
+SCSI_In_DBx__DB1__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
+SCSI_In_DBx__DB1__LCD_EN EQU CYREG_PRT6_LCD_EN
+SCSI_In_DBx__DB1__MASK EQU 0x10
+SCSI_In_DBx__DB1__PC EQU CYREG_PRT6_PC4
+SCSI_In_DBx__DB1__PORT EQU 6
+SCSI_In_DBx__DB1__PRT EQU CYREG_PRT6_PRT
+SCSI_In_DBx__DB1__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
+SCSI_In_DBx__DB1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
+SCSI_In_DBx__DB1__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
+SCSI_In_DBx__DB1__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
+SCSI_In_DBx__DB1__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
+SCSI_In_DBx__DB1__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
+SCSI_In_DBx__DB1__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
+SCSI_In_DBx__DB1__PS EQU CYREG_PRT6_PS
+SCSI_In_DBx__DB1__SHIFT EQU 4
+SCSI_In_DBx__DB1__SLW EQU CYREG_PRT6_SLW
+SCSI_In_DBx__DB2__AG EQU CYREG_PRT12_AG
+SCSI_In_DBx__DB2__BIE EQU CYREG_PRT12_BIE
+SCSI_In_DBx__DB2__BIT_MASK EQU CYREG_PRT12_BIT_MASK
+SCSI_In_DBx__DB2__BYP EQU CYREG_PRT12_BYP
+SCSI_In_DBx__DB2__DM0 EQU CYREG_PRT12_DM0
+SCSI_In_DBx__DB2__DM1 EQU CYREG_PRT12_DM1
+SCSI_In_DBx__DB2__DM2 EQU CYREG_PRT12_DM2
+SCSI_In_DBx__DB2__DR EQU CYREG_PRT12_DR
+SCSI_In_DBx__DB2__INP_DIS EQU CYREG_PRT12_INP_DIS
+SCSI_In_DBx__DB2__INTTYPE EQU CYREG_PICU12_INTTYPE4
+SCSI_In_DBx__DB2__MASK EQU 0x10
+SCSI_In_DBx__DB2__PC EQU CYREG_PRT12_PC4
+SCSI_In_DBx__DB2__PORT EQU 12
+SCSI_In_DBx__DB2__PRT EQU CYREG_PRT12_PRT
+SCSI_In_DBx__DB2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN
+SCSI_In_DBx__DB2__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0
+SCSI_In_DBx__DB2__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1
+SCSI_In_DBx__DB2__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0
+SCSI_In_DBx__DB2__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1
+SCSI_In_DBx__DB2__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT
+SCSI_In_DBx__DB2__PS EQU CYREG_PRT12_PS
+SCSI_In_DBx__DB2__SHIFT EQU 4
+SCSI_In_DBx__DB2__SIO_CFG EQU CYREG_PRT12_SIO_CFG
+SCSI_In_DBx__DB2__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF
+SCSI_In_DBx__DB2__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN
+SCSI_In_DBx__DB2__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ
+SCSI_In_DBx__DB2__SLW EQU CYREG_PRT12_SLW
+SCSI_In_DBx__DB3__AG EQU CYREG_PRT2_AG
+SCSI_In_DBx__DB3__AMUX EQU CYREG_PRT2_AMUX
+SCSI_In_DBx__DB3__BIE EQU CYREG_PRT2_BIE
+SCSI_In_DBx__DB3__BIT_MASK EQU CYREG_PRT2_BIT_MASK
+SCSI_In_DBx__DB3__BYP EQU CYREG_PRT2_BYP
+SCSI_In_DBx__DB3__CTL EQU CYREG_PRT2_CTL
+SCSI_In_DBx__DB3__DM0 EQU CYREG_PRT2_DM0
+SCSI_In_DBx__DB3__DM1 EQU CYREG_PRT2_DM1
+SCSI_In_DBx__DB3__DM2 EQU CYREG_PRT2_DM2
+SCSI_In_DBx__DB3__DR EQU CYREG_PRT2_DR
+SCSI_In_DBx__DB3__INP_DIS EQU CYREG_PRT2_INP_DIS
+SCSI_In_DBx__DB3__INTTYPE EQU CYREG_PICU2_INTTYPE6
+SCSI_In_DBx__DB3__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
+SCSI_In_DBx__DB3__LCD_EN EQU CYREG_PRT2_LCD_EN
+SCSI_In_DBx__DB3__MASK EQU 0x40
+SCSI_In_DBx__DB3__PC EQU CYREG_PRT2_PC6
+SCSI_In_DBx__DB3__PORT EQU 2
+SCSI_In_DBx__DB3__PRT EQU CYREG_PRT2_PRT
+SCSI_In_DBx__DB3__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
+SCSI_In_DBx__DB3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
+SCSI_In_DBx__DB3__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
+SCSI_In_DBx__DB3__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
+SCSI_In_DBx__DB3__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
+SCSI_In_DBx__DB3__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
+SCSI_In_DBx__DB3__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
+SCSI_In_DBx__DB3__PS EQU CYREG_PRT2_PS
+SCSI_In_DBx__DB3__SHIFT EQU 6
+SCSI_In_DBx__DB3__SLW EQU CYREG_PRT2_SLW
+SCSI_In_DBx__DB4__AG EQU CYREG_PRT2_AG
+SCSI_In_DBx__DB4__AMUX EQU CYREG_PRT2_AMUX
+SCSI_In_DBx__DB4__BIE EQU CYREG_PRT2_BIE
+SCSI_In_DBx__DB4__BIT_MASK EQU CYREG_PRT2_BIT_MASK
+SCSI_In_DBx__DB4__BYP EQU CYREG_PRT2_BYP
+SCSI_In_DBx__DB4__CTL EQU CYREG_PRT2_CTL
+SCSI_In_DBx__DB4__DM0 EQU CYREG_PRT2_DM0
+SCSI_In_DBx__DB4__DM1 EQU CYREG_PRT2_DM1
+SCSI_In_DBx__DB4__DM2 EQU CYREG_PRT2_DM2
+SCSI_In_DBx__DB4__DR EQU CYREG_PRT2_DR
+SCSI_In_DBx__DB4__INP_DIS EQU CYREG_PRT2_INP_DIS
+SCSI_In_DBx__DB4__INTTYPE EQU CYREG_PICU2_INTTYPE4
+SCSI_In_DBx__DB4__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
+SCSI_In_DBx__DB4__LCD_EN EQU CYREG_PRT2_LCD_EN
+SCSI_In_DBx__DB4__MASK EQU 0x10
+SCSI_In_DBx__DB4__PC EQU CYREG_PRT2_PC4
+SCSI_In_DBx__DB4__PORT EQU 2
+SCSI_In_DBx__DB4__PRT EQU CYREG_PRT2_PRT
+SCSI_In_DBx__DB4__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
+SCSI_In_DBx__DB4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
+SCSI_In_DBx__DB4__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
+SCSI_In_DBx__DB4__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
+SCSI_In_DBx__DB4__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
+SCSI_In_DBx__DB4__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
+SCSI_In_DBx__DB4__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
+SCSI_In_DBx__DB4__PS EQU CYREG_PRT2_PS
+SCSI_In_DBx__DB4__SHIFT EQU 4
+SCSI_In_DBx__DB4__SLW EQU CYREG_PRT2_SLW
+SCSI_In_DBx__DB5__AG EQU CYREG_PRT2_AG
+SCSI_In_DBx__DB5__AMUX EQU CYREG_PRT2_AMUX
+SCSI_In_DBx__DB5__BIE EQU CYREG_PRT2_BIE
+SCSI_In_DBx__DB5__BIT_MASK EQU CYREG_PRT2_BIT_MASK
+SCSI_In_DBx__DB5__BYP EQU CYREG_PRT2_BYP
+SCSI_In_DBx__DB5__CTL EQU CYREG_PRT2_CTL
+SCSI_In_DBx__DB5__DM0 EQU CYREG_PRT2_DM0
+SCSI_In_DBx__DB5__DM1 EQU CYREG_PRT2_DM1
+SCSI_In_DBx__DB5__DM2 EQU CYREG_PRT2_DM2
+SCSI_In_DBx__DB5__DR EQU CYREG_PRT2_DR
+SCSI_In_DBx__DB5__INP_DIS EQU CYREG_PRT2_INP_DIS
+SCSI_In_DBx__DB5__INTTYPE EQU CYREG_PICU2_INTTYPE2
+SCSI_In_DBx__DB5__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
+SCSI_In_DBx__DB5__LCD_EN EQU CYREG_PRT2_LCD_EN
+SCSI_In_DBx__DB5__MASK EQU 0x04
+SCSI_In_DBx__DB5__PC EQU CYREG_PRT2_PC2
+SCSI_In_DBx__DB5__PORT EQU 2
+SCSI_In_DBx__DB5__PRT EQU CYREG_PRT2_PRT
+SCSI_In_DBx__DB5__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
+SCSI_In_DBx__DB5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
+SCSI_In_DBx__DB5__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
+SCSI_In_DBx__DB5__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
+SCSI_In_DBx__DB5__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
+SCSI_In_DBx__DB5__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
+SCSI_In_DBx__DB5__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
+SCSI_In_DBx__DB5__PS EQU CYREG_PRT2_PS
+SCSI_In_DBx__DB5__SHIFT EQU 2
+SCSI_In_DBx__DB5__SLW EQU CYREG_PRT2_SLW
+SCSI_In_DBx__DB6__AG EQU CYREG_PRT2_AG
+SCSI_In_DBx__DB6__AMUX EQU CYREG_PRT2_AMUX
+SCSI_In_DBx__DB6__BIE EQU CYREG_PRT2_BIE
+SCSI_In_DBx__DB6__BIT_MASK EQU CYREG_PRT2_BIT_MASK
+SCSI_In_DBx__DB6__BYP EQU CYREG_PRT2_BYP
+SCSI_In_DBx__DB6__CTL EQU CYREG_PRT2_CTL
+SCSI_In_DBx__DB6__DM0 EQU CYREG_PRT2_DM0
+SCSI_In_DBx__DB6__DM1 EQU CYREG_PRT2_DM1
+SCSI_In_DBx__DB6__DM2 EQU CYREG_PRT2_DM2
+SCSI_In_DBx__DB6__DR EQU CYREG_PRT2_DR
+SCSI_In_DBx__DB6__INP_DIS EQU CYREG_PRT2_INP_DIS
+SCSI_In_DBx__DB6__INTTYPE EQU CYREG_PICU2_INTTYPE0
+SCSI_In_DBx__DB6__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
+SCSI_In_DBx__DB6__LCD_EN EQU CYREG_PRT2_LCD_EN
+SCSI_In_DBx__DB6__MASK EQU 0x01
+SCSI_In_DBx__DB6__PC EQU CYREG_PRT2_PC0
+SCSI_In_DBx__DB6__PORT EQU 2
+SCSI_In_DBx__DB6__PRT EQU CYREG_PRT2_PRT
+SCSI_In_DBx__DB6__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
+SCSI_In_DBx__DB6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
+SCSI_In_DBx__DB6__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
+SCSI_In_DBx__DB6__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
+SCSI_In_DBx__DB6__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
+SCSI_In_DBx__DB6__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
+SCSI_In_DBx__DB6__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
+SCSI_In_DBx__DB6__PS EQU CYREG_PRT2_PS
+SCSI_In_DBx__DB6__SHIFT EQU 0
+SCSI_In_DBx__DB6__SLW EQU CYREG_PRT2_SLW
+SCSI_In_DBx__DB7__AG EQU CYREG_PRT6_AG
+SCSI_In_DBx__DB7__AMUX EQU CYREG_PRT6_AMUX
+SCSI_In_DBx__DB7__BIE EQU CYREG_PRT6_BIE
+SCSI_In_DBx__DB7__BIT_MASK EQU CYREG_PRT6_BIT_MASK
+SCSI_In_DBx__DB7__BYP EQU CYREG_PRT6_BYP
+SCSI_In_DBx__DB7__CTL EQU CYREG_PRT6_CTL
+SCSI_In_DBx__DB7__DM0 EQU CYREG_PRT6_DM0
+SCSI_In_DBx__DB7__DM1 EQU CYREG_PRT6_DM1
+SCSI_In_DBx__DB7__DM2 EQU CYREG_PRT6_DM2
+SCSI_In_DBx__DB7__DR EQU CYREG_PRT6_DR
+SCSI_In_DBx__DB7__INP_DIS EQU CYREG_PRT6_INP_DIS
+SCSI_In_DBx__DB7__INTTYPE EQU CYREG_PICU6_INTTYPE3
+SCSI_In_DBx__DB7__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
+SCSI_In_DBx__DB7__LCD_EN EQU CYREG_PRT6_LCD_EN
+SCSI_In_DBx__DB7__MASK EQU 0x08
+SCSI_In_DBx__DB7__PC EQU CYREG_PRT6_PC3
+SCSI_In_DBx__DB7__PORT EQU 6
+SCSI_In_DBx__DB7__PRT EQU CYREG_PRT6_PRT
+SCSI_In_DBx__DB7__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
+SCSI_In_DBx__DB7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
+SCSI_In_DBx__DB7__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
+SCSI_In_DBx__DB7__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
+SCSI_In_DBx__DB7__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
+SCSI_In_DBx__DB7__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
+SCSI_In_DBx__DB7__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
+SCSI_In_DBx__DB7__PS EQU CYREG_PRT6_PS
+SCSI_In_DBx__DB7__SHIFT EQU 3
+SCSI_In_DBx__DB7__SLW EQU CYREG_PRT6_SLW
+
+/* SD_MISO */
+SD_MISO__0__INTTYPE EQU CYREG_PICU3_INTTYPE2
+SD_MISO__0__MASK EQU 0x04
+SD_MISO__0__PC EQU CYREG_PRT3_PC2
+SD_MISO__0__PORT EQU 3
+SD_MISO__0__SHIFT EQU 2
+SD_MISO__AG EQU CYREG_PRT3_AG
+SD_MISO__AMUX EQU CYREG_PRT3_AMUX
+SD_MISO__BIE EQU CYREG_PRT3_BIE
+SD_MISO__BIT_MASK EQU CYREG_PRT3_BIT_MASK
+SD_MISO__BYP EQU CYREG_PRT3_BYP
+SD_MISO__CTL EQU CYREG_PRT3_CTL
+SD_MISO__DM0 EQU CYREG_PRT3_DM0
+SD_MISO__DM1 EQU CYREG_PRT3_DM1
+SD_MISO__DM2 EQU CYREG_PRT3_DM2
+SD_MISO__DR EQU CYREG_PRT3_DR
+SD_MISO__INP_DIS EQU CYREG_PRT3_INP_DIS
+SD_MISO__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU3_BASE
+SD_MISO__LCD_COM_SEG EQU CYREG_PRT3_LCD_COM_SEG
+SD_MISO__LCD_EN EQU CYREG_PRT3_LCD_EN
+SD_MISO__MASK EQU 0x04
+SD_MISO__PORT EQU 3
+SD_MISO__PRT EQU CYREG_PRT3_PRT
+SD_MISO__PRTDSI__CAPS_SEL EQU CYREG_PRT3_CAPS_SEL
+SD_MISO__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT3_DBL_SYNC_IN
+SD_MISO__PRTDSI__OE_SEL0 EQU CYREG_PRT3_OE_SEL0
+SD_MISO__PRTDSI__OE_SEL1 EQU CYREG_PRT3_OE_SEL1
+SD_MISO__PRTDSI__OUT_SEL0 EQU CYREG_PRT3_OUT_SEL0
+SD_MISO__PRTDSI__OUT_SEL1 EQU CYREG_PRT3_OUT_SEL1
+SD_MISO__PRTDSI__SYNC_OUT EQU CYREG_PRT3_SYNC_OUT
+SD_MISO__PS EQU CYREG_PRT3_PS
+SD_MISO__SHIFT EQU 2
+SD_MISO__SLW EQU CYREG_PRT3_SLW
+
+/* SD_MOSI */
+SD_MOSI__0__INTTYPE EQU CYREG_PICU3_INTTYPE4
+SD_MOSI__0__MASK EQU 0x10
+SD_MOSI__0__PC EQU CYREG_PRT3_PC4
+SD_MOSI__0__PORT EQU 3
+SD_MOSI__0__SHIFT EQU 4
+SD_MOSI__AG EQU CYREG_PRT3_AG
+SD_MOSI__AMUX EQU CYREG_PRT3_AMUX
+SD_MOSI__BIE EQU CYREG_PRT3_BIE
+SD_MOSI__BIT_MASK EQU CYREG_PRT3_BIT_MASK
+SD_MOSI__BYP EQU CYREG_PRT3_BYP
+SD_MOSI__CTL EQU CYREG_PRT3_CTL
+SD_MOSI__DM0 EQU CYREG_PRT3_DM0
+SD_MOSI__DM1 EQU CYREG_PRT3_DM1
+SD_MOSI__DM2 EQU CYREG_PRT3_DM2
+SD_MOSI__DR EQU CYREG_PRT3_DR
+SD_MOSI__INP_DIS EQU CYREG_PRT3_INP_DIS
+SD_MOSI__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU3_BASE
+SD_MOSI__LCD_COM_SEG EQU CYREG_PRT3_LCD_COM_SEG
+SD_MOSI__LCD_EN EQU CYREG_PRT3_LCD_EN
+SD_MOSI__MASK EQU 0x10
+SD_MOSI__PORT EQU 3
+SD_MOSI__PRT EQU CYREG_PRT3_PRT
+SD_MOSI__PRTDSI__CAPS_SEL EQU CYREG_PRT3_CAPS_SEL
+SD_MOSI__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT3_DBL_SYNC_IN
+SD_MOSI__PRTDSI__OE_SEL0 EQU CYREG_PRT3_OE_SEL0
+SD_MOSI__PRTDSI__OE_SEL1 EQU CYREG_PRT3_OE_SEL1
+SD_MOSI__PRTDSI__OUT_SEL0 EQU CYREG_PRT3_OUT_SEL0
+SD_MOSI__PRTDSI__OUT_SEL1 EQU CYREG_PRT3_OUT_SEL1
+SD_MOSI__PRTDSI__SYNC_OUT EQU CYREG_PRT3_SYNC_OUT
+SD_MOSI__PS EQU CYREG_PRT3_PS
+SD_MOSI__SHIFT EQU 4
+SD_MOSI__SLW EQU CYREG_PRT3_SLW
+
+/* TERM_EN */
+TERM_EN__0__INTTYPE EQU CYREG_PICU15_INTTYPE3
+TERM_EN__0__MASK EQU 0x08
+TERM_EN__0__PC EQU CYREG_IO_PC_PRT15_PC3
+TERM_EN__0__PORT EQU 15
+TERM_EN__0__SHIFT EQU 3
+TERM_EN__AG EQU CYREG_PRT15_AG
+TERM_EN__AMUX EQU CYREG_PRT15_AMUX
+TERM_EN__BIE EQU CYREG_PRT15_BIE
+TERM_EN__BIT_MASK EQU CYREG_PRT15_BIT_MASK
+TERM_EN__BYP EQU CYREG_PRT15_BYP
+TERM_EN__CTL EQU CYREG_PRT15_CTL
+TERM_EN__DM0 EQU CYREG_PRT15_DM0
+TERM_EN__DM1 EQU CYREG_PRT15_DM1
+TERM_EN__DM2 EQU CYREG_PRT15_DM2
+TERM_EN__DR EQU CYREG_PRT15_DR
+TERM_EN__INP_DIS EQU CYREG_PRT15_INP_DIS
+TERM_EN__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU15_BASE
+TERM_EN__LCD_COM_SEG EQU CYREG_PRT15_LCD_COM_SEG
+TERM_EN__LCD_EN EQU CYREG_PRT15_LCD_EN
+TERM_EN__MASK EQU 0x08
+TERM_EN__PORT EQU 15
+TERM_EN__PRT EQU CYREG_PRT15_PRT
+TERM_EN__PRTDSI__CAPS_SEL EQU CYREG_PRT15_CAPS_SEL
+TERM_EN__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT15_DBL_SYNC_IN
+TERM_EN__PRTDSI__OE_SEL0 EQU CYREG_PRT15_OE_SEL0
+TERM_EN__PRTDSI__OE_SEL1 EQU CYREG_PRT15_OE_SEL1
+TERM_EN__PRTDSI__OUT_SEL0 EQU CYREG_PRT15_OUT_SEL0
+TERM_EN__PRTDSI__OUT_SEL1 EQU CYREG_PRT15_OUT_SEL1
+TERM_EN__PRTDSI__SYNC_OUT EQU CYREG_PRT15_SYNC_OUT
+TERM_EN__PS EQU CYREG_PRT15_PS
+TERM_EN__SHIFT EQU 3
+TERM_EN__SLW EQU CYREG_PRT15_SLW
+
+/* SCSI_CLK */
+SCSI_CLK__CFG0 EQU CYREG_CLKDIST_DCFG1_CFG0
+SCSI_CLK__CFG1 EQU CYREG_CLKDIST_DCFG1_CFG1
+SCSI_CLK__CFG2 EQU CYREG_CLKDIST_DCFG1_CFG2
+SCSI_CLK__CFG2_SRC_SEL_MASK EQU 0x07
+SCSI_CLK__INDEX EQU 0x01
+SCSI_CLK__PM_ACT_CFG EQU CYREG_PM_ACT_CFG2
+SCSI_CLK__PM_ACT_MSK EQU 0x02
+SCSI_CLK__PM_STBY_CFG EQU CYREG_PM_STBY_CFG2
+SCSI_CLK__PM_STBY_MSK EQU 0x02
+
+/* SCSI_Out */
+SCSI_Out__0__AG EQU CYREG_PRT6_AG
+SCSI_Out__0__AMUX EQU CYREG_PRT6_AMUX
+SCSI_Out__0__BIE EQU CYREG_PRT6_BIE
+SCSI_Out__0__BIT_MASK EQU CYREG_PRT6_BIT_MASK
+SCSI_Out__0__BYP EQU CYREG_PRT6_BYP
+SCSI_Out__0__CTL EQU CYREG_PRT6_CTL
+SCSI_Out__0__DM0 EQU CYREG_PRT6_DM0
+SCSI_Out__0__DM1 EQU CYREG_PRT6_DM1
+SCSI_Out__0__DM2 EQU CYREG_PRT6_DM2
+SCSI_Out__0__DR EQU CYREG_PRT6_DR
+SCSI_Out__0__INP_DIS EQU CYREG_PRT6_INP_DIS
+SCSI_Out__0__INTTYPE EQU CYREG_PICU6_INTTYPE2
+SCSI_Out__0__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
+SCSI_Out__0__LCD_EN EQU CYREG_PRT6_LCD_EN
+SCSI_Out__0__MASK EQU 0x04
+SCSI_Out__0__PC EQU CYREG_PRT6_PC2
+SCSI_Out__0__PORT EQU 6
+SCSI_Out__0__PRT EQU CYREG_PRT6_PRT
+SCSI_Out__0__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
+SCSI_Out__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
+SCSI_Out__0__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
+SCSI_Out__0__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
+SCSI_Out__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
+SCSI_Out__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
+SCSI_Out__0__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
+SCSI_Out__0__PS EQU CYREG_PRT6_PS
+SCSI_Out__0__SHIFT EQU 2
+SCSI_Out__0__SLW EQU CYREG_PRT6_SLW
+SCSI_Out__1__AG EQU CYREG_PRT4_AG
+SCSI_Out__1__AMUX EQU CYREG_PRT4_AMUX
+SCSI_Out__1__BIE EQU CYREG_PRT4_BIE
+SCSI_Out__1__BIT_MASK EQU CYREG_PRT4_BIT_MASK
+SCSI_Out__1__BYP EQU CYREG_PRT4_BYP
+SCSI_Out__1__CTL EQU CYREG_PRT4_CTL
+SCSI_Out__1__DM0 EQU CYREG_PRT4_DM0
+SCSI_Out__1__DM1 EQU CYREG_PRT4_DM1
+SCSI_Out__1__DM2 EQU CYREG_PRT4_DM2
+SCSI_Out__1__DR EQU CYREG_PRT4_DR
+SCSI_Out__1__INP_DIS EQU CYREG_PRT4_INP_DIS
+SCSI_Out__1__INTTYPE EQU CYREG_PICU4_INTTYPE6
+SCSI_Out__1__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
+SCSI_Out__1__LCD_EN EQU CYREG_PRT4_LCD_EN
+SCSI_Out__1__MASK EQU 0x40
+SCSI_Out__1__PC EQU CYREG_PRT4_PC6
+SCSI_Out__1__PORT EQU 4
+SCSI_Out__1__PRT EQU CYREG_PRT4_PRT
+SCSI_Out__1__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
+SCSI_Out__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
+SCSI_Out__1__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
+SCSI_Out__1__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
+SCSI_Out__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
+SCSI_Out__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
+SCSI_Out__1__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
+SCSI_Out__1__PS EQU CYREG_PRT4_PS
+SCSI_Out__1__SHIFT EQU 6
+SCSI_Out__1__SLW EQU CYREG_PRT4_SLW
+SCSI_Out__2__AG EQU CYREG_PRT0_AG
+SCSI_Out__2__AMUX EQU CYREG_PRT0_AMUX
+SCSI_Out__2__BIE EQU CYREG_PRT0_BIE
+SCSI_Out__2__BIT_MASK EQU CYREG_PRT0_BIT_MASK
+SCSI_Out__2__BYP EQU CYREG_PRT0_BYP
+SCSI_Out__2__CTL EQU CYREG_PRT0_CTL
+SCSI_Out__2__DM0 EQU CYREG_PRT0_DM0
+SCSI_Out__2__DM1 EQU CYREG_PRT0_DM1
+SCSI_Out__2__DM2 EQU CYREG_PRT0_DM2
+SCSI_Out__2__DR EQU CYREG_PRT0_DR
+SCSI_Out__2__INP_DIS EQU CYREG_PRT0_INP_DIS
+SCSI_Out__2__INTTYPE EQU CYREG_PICU0_INTTYPE7
+SCSI_Out__2__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
+SCSI_Out__2__LCD_EN EQU CYREG_PRT0_LCD_EN
+SCSI_Out__2__MASK EQU 0x80
+SCSI_Out__2__PC EQU CYREG_PRT0_PC7
+SCSI_Out__2__PORT EQU 0
+SCSI_Out__2__PRT EQU CYREG_PRT0_PRT
+SCSI_Out__2__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
+SCSI_Out__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
+SCSI_Out__2__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
+SCSI_Out__2__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
+SCSI_Out__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
+SCSI_Out__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
+SCSI_Out__2__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
+SCSI_Out__2__PS EQU CYREG_PRT0_PS
+SCSI_Out__2__SHIFT EQU 7
+SCSI_Out__2__SLW EQU CYREG_PRT0_SLW
+SCSI_Out__3__AG EQU CYREG_PRT0_AG
+SCSI_Out__3__AMUX EQU CYREG_PRT0_AMUX
+SCSI_Out__3__BIE EQU CYREG_PRT0_BIE
+SCSI_Out__3__BIT_MASK EQU CYREG_PRT0_BIT_MASK
+SCSI_Out__3__BYP EQU CYREG_PRT0_BYP
+SCSI_Out__3__CTL EQU CYREG_PRT0_CTL
+SCSI_Out__3__DM0 EQU CYREG_PRT0_DM0
+SCSI_Out__3__DM1 EQU CYREG_PRT0_DM1
+SCSI_Out__3__DM2 EQU CYREG_PRT0_DM2
+SCSI_Out__3__DR EQU CYREG_PRT0_DR
+SCSI_Out__3__INP_DIS EQU CYREG_PRT0_INP_DIS
+SCSI_Out__3__INTTYPE EQU CYREG_PICU0_INTTYPE5
+SCSI_Out__3__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
+SCSI_Out__3__LCD_EN EQU CYREG_PRT0_LCD_EN
+SCSI_Out__3__MASK EQU 0x20
+SCSI_Out__3__PC EQU CYREG_PRT0_PC5
+SCSI_Out__3__PORT EQU 0
+SCSI_Out__3__PRT EQU CYREG_PRT0_PRT
+SCSI_Out__3__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
+SCSI_Out__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
+SCSI_Out__3__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
+SCSI_Out__3__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
+SCSI_Out__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
+SCSI_Out__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
+SCSI_Out__3__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
+SCSI_Out__3__PS EQU CYREG_PRT0_PS
+SCSI_Out__3__SHIFT EQU 5
+SCSI_Out__3__SLW EQU CYREG_PRT0_SLW
+SCSI_Out__4__AG EQU CYREG_PRT0_AG
+SCSI_Out__4__AMUX EQU CYREG_PRT0_AMUX
+SCSI_Out__4__BIE EQU CYREG_PRT0_BIE
+SCSI_Out__4__BIT_MASK EQU CYREG_PRT0_BIT_MASK
+SCSI_Out__4__BYP EQU CYREG_PRT0_BYP
+SCSI_Out__4__CTL EQU CYREG_PRT0_CTL
+SCSI_Out__4__DM0 EQU CYREG_PRT0_DM0
+SCSI_Out__4__DM1 EQU CYREG_PRT0_DM1
+SCSI_Out__4__DM2 EQU CYREG_PRT0_DM2
+SCSI_Out__4__DR EQU CYREG_PRT0_DR
+SCSI_Out__4__INP_DIS EQU CYREG_PRT0_INP_DIS
+SCSI_Out__4__INTTYPE EQU CYREG_PICU0_INTTYPE3
+SCSI_Out__4__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
+SCSI_Out__4__LCD_EN EQU CYREG_PRT0_LCD_EN
+SCSI_Out__4__MASK EQU 0x08
+SCSI_Out__4__PC EQU CYREG_PRT0_PC3
+SCSI_Out__4__PORT EQU 0
+SCSI_Out__4__PRT EQU CYREG_PRT0_PRT
+SCSI_Out__4__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
+SCSI_Out__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
+SCSI_Out__4__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
+SCSI_Out__4__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
+SCSI_Out__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
+SCSI_Out__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
+SCSI_Out__4__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
+SCSI_Out__4__PS EQU CYREG_PRT0_PS
+SCSI_Out__4__SHIFT EQU 3
+SCSI_Out__4__SLW EQU CYREG_PRT0_SLW
+SCSI_Out__5__AG EQU CYREG_PRT0_AG
+SCSI_Out__5__AMUX EQU CYREG_PRT0_AMUX
+SCSI_Out__5__BIE EQU CYREG_PRT0_BIE
+SCSI_Out__5__BIT_MASK EQU CYREG_PRT0_BIT_MASK
+SCSI_Out__5__BYP EQU CYREG_PRT0_BYP
+SCSI_Out__5__CTL EQU CYREG_PRT0_CTL
+SCSI_Out__5__DM0 EQU CYREG_PRT0_DM0
+SCSI_Out__5__DM1 EQU CYREG_PRT0_DM1
+SCSI_Out__5__DM2 EQU CYREG_PRT0_DM2
+SCSI_Out__5__DR EQU CYREG_PRT0_DR
+SCSI_Out__5__INP_DIS EQU CYREG_PRT0_INP_DIS
+SCSI_Out__5__INTTYPE EQU CYREG_PICU0_INTTYPE1
+SCSI_Out__5__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
+SCSI_Out__5__LCD_EN EQU CYREG_PRT0_LCD_EN
+SCSI_Out__5__MASK EQU 0x02
+SCSI_Out__5__PC EQU CYREG_PRT0_PC1
+SCSI_Out__5__PORT EQU 0
+SCSI_Out__5__PRT EQU CYREG_PRT0_PRT
+SCSI_Out__5__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
+SCSI_Out__5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
+SCSI_Out__5__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
+SCSI_Out__5__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
+SCSI_Out__5__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
+SCSI_Out__5__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
+SCSI_Out__5__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
+SCSI_Out__5__PS EQU CYREG_PRT0_PS
+SCSI_Out__5__SHIFT EQU 1
+SCSI_Out__5__SLW EQU CYREG_PRT0_SLW
+SCSI_Out__6__AG EQU CYREG_PRT4_AG
+SCSI_Out__6__AMUX EQU CYREG_PRT4_AMUX
+SCSI_Out__6__BIE EQU CYREG_PRT4_BIE
+SCSI_Out__6__BIT_MASK EQU CYREG_PRT4_BIT_MASK
+SCSI_Out__6__BYP EQU CYREG_PRT4_BYP
+SCSI_Out__6__CTL EQU CYREG_PRT4_CTL
+SCSI_Out__6__DM0 EQU CYREG_PRT4_DM0
+SCSI_Out__6__DM1 EQU CYREG_PRT4_DM1
+SCSI_Out__6__DM2 EQU CYREG_PRT4_DM2
+SCSI_Out__6__DR EQU CYREG_PRT4_DR
+SCSI_Out__6__INP_DIS EQU CYREG_PRT4_INP_DIS
+SCSI_Out__6__INTTYPE EQU CYREG_PICU4_INTTYPE1
+SCSI_Out__6__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
+SCSI_Out__6__LCD_EN EQU CYREG_PRT4_LCD_EN
+SCSI_Out__6__MASK EQU 0x02
+SCSI_Out__6__PC EQU CYREG_PRT4_PC1
+SCSI_Out__6__PORT EQU 4
+SCSI_Out__6__PRT EQU CYREG_PRT4_PRT
+SCSI_Out__6__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
+SCSI_Out__6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
+SCSI_Out__6__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
+SCSI_Out__6__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
+SCSI_Out__6__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
+SCSI_Out__6__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
+SCSI_Out__6__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
+SCSI_Out__6__PS EQU CYREG_PRT4_PS
+SCSI_Out__6__SHIFT EQU 1
+SCSI_Out__6__SLW EQU CYREG_PRT4_SLW
+SCSI_Out__7__AG EQU CYREG_PRT12_AG
+SCSI_Out__7__BIE EQU CYREG_PRT12_BIE
+SCSI_Out__7__BIT_MASK EQU CYREG_PRT12_BIT_MASK
+SCSI_Out__7__BYP EQU CYREG_PRT12_BYP
+SCSI_Out__7__DM0 EQU CYREG_PRT12_DM0
+SCSI_Out__7__DM1 EQU CYREG_PRT12_DM1
+SCSI_Out__7__DM2 EQU CYREG_PRT12_DM2
+SCSI_Out__7__DR EQU CYREG_PRT12_DR
+SCSI_Out__7__INP_DIS EQU CYREG_PRT12_INP_DIS
+SCSI_Out__7__INTTYPE EQU CYREG_PICU12_INTTYPE3
+SCSI_Out__7__MASK EQU 0x08
+SCSI_Out__7__PC EQU CYREG_PRT12_PC3
+SCSI_Out__7__PORT EQU 12
+SCSI_Out__7__PRT EQU CYREG_PRT12_PRT
+SCSI_Out__7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN
+SCSI_Out__7__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0
+SCSI_Out__7__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1
+SCSI_Out__7__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0
+SCSI_Out__7__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1
+SCSI_Out__7__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT
+SCSI_Out__7__PS EQU CYREG_PRT12_PS
+SCSI_Out__7__SHIFT EQU 3
+SCSI_Out__7__SIO_CFG EQU CYREG_PRT12_SIO_CFG
+SCSI_Out__7__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF
+SCSI_Out__7__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN
+SCSI_Out__7__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ
+SCSI_Out__7__SLW EQU CYREG_PRT12_SLW
+SCSI_Out__BSY__AG EQU CYREG_PRT4_AG
+SCSI_Out__BSY__AMUX EQU CYREG_PRT4_AMUX
+SCSI_Out__BSY__BIE EQU CYREG_PRT4_BIE
+SCSI_Out__BSY__BIT_MASK EQU CYREG_PRT4_BIT_MASK
+SCSI_Out__BSY__BYP EQU CYREG_PRT4_BYP
+SCSI_Out__BSY__CTL EQU CYREG_PRT4_CTL
+SCSI_Out__BSY__DM0 EQU CYREG_PRT4_DM0
+SCSI_Out__BSY__DM1 EQU CYREG_PRT4_DM1
+SCSI_Out__BSY__DM2 EQU CYREG_PRT4_DM2
+SCSI_Out__BSY__DR EQU CYREG_PRT4_DR
+SCSI_Out__BSY__INP_DIS EQU CYREG_PRT4_INP_DIS
+SCSI_Out__BSY__INTTYPE EQU CYREG_PICU4_INTTYPE6
+SCSI_Out__BSY__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
+SCSI_Out__BSY__LCD_EN EQU CYREG_PRT4_LCD_EN
+SCSI_Out__BSY__MASK EQU 0x40
+SCSI_Out__BSY__PC EQU CYREG_PRT4_PC6
+SCSI_Out__BSY__PORT EQU 4
+SCSI_Out__BSY__PRT EQU CYREG_PRT4_PRT
+SCSI_Out__BSY__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
+SCSI_Out__BSY__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
+SCSI_Out__BSY__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
+SCSI_Out__BSY__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
+SCSI_Out__BSY__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
+SCSI_Out__BSY__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
+SCSI_Out__BSY__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
+SCSI_Out__BSY__PS EQU CYREG_PRT4_PS
+SCSI_Out__BSY__SHIFT EQU 6
+SCSI_Out__BSY__SLW EQU CYREG_PRT4_SLW
+SCSI_Out__CD_raw__AG EQU CYREG_PRT0_AG
+SCSI_Out__CD_raw__AMUX EQU CYREG_PRT0_AMUX
+SCSI_Out__CD_raw__BIE EQU CYREG_PRT0_BIE
+SCSI_Out__CD_raw__BIT_MASK EQU CYREG_PRT0_BIT_MASK
+SCSI_Out__CD_raw__BYP EQU CYREG_PRT0_BYP
+SCSI_Out__CD_raw__CTL EQU CYREG_PRT0_CTL
+SCSI_Out__CD_raw__DM0 EQU CYREG_PRT0_DM0
+SCSI_Out__CD_raw__DM1 EQU CYREG_PRT0_DM1
+SCSI_Out__CD_raw__DM2 EQU CYREG_PRT0_DM2
+SCSI_Out__CD_raw__DR EQU CYREG_PRT0_DR
+SCSI_Out__CD_raw__INP_DIS EQU CYREG_PRT0_INP_DIS
+SCSI_Out__CD_raw__INTTYPE EQU CYREG_PICU0_INTTYPE1
+SCSI_Out__CD_raw__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
+SCSI_Out__CD_raw__LCD_EN EQU CYREG_PRT0_LCD_EN
+SCSI_Out__CD_raw__MASK EQU 0x02
+SCSI_Out__CD_raw__PC EQU CYREG_PRT0_PC1
+SCSI_Out__CD_raw__PORT EQU 0
+SCSI_Out__CD_raw__PRT EQU CYREG_PRT0_PRT
+SCSI_Out__CD_raw__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
+SCSI_Out__CD_raw__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
+SCSI_Out__CD_raw__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
+SCSI_Out__CD_raw__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
+SCSI_Out__CD_raw__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
+SCSI_Out__CD_raw__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
+SCSI_Out__CD_raw__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
+SCSI_Out__CD_raw__PS EQU CYREG_PRT0_PS
+SCSI_Out__CD_raw__SHIFT EQU 1
+SCSI_Out__CD_raw__SLW EQU CYREG_PRT0_SLW
+SCSI_Out__DBP_raw__AG EQU CYREG_PRT6_AG
+SCSI_Out__DBP_raw__AMUX EQU CYREG_PRT6_AMUX
+SCSI_Out__DBP_raw__BIE EQU CYREG_PRT6_BIE
+SCSI_Out__DBP_raw__BIT_MASK EQU CYREG_PRT6_BIT_MASK
+SCSI_Out__DBP_raw__BYP EQU CYREG_PRT6_BYP
+SCSI_Out__DBP_raw__CTL EQU CYREG_PRT6_CTL
+SCSI_Out__DBP_raw__DM0 EQU CYREG_PRT6_DM0
+SCSI_Out__DBP_raw__DM1 EQU CYREG_PRT6_DM1
+SCSI_Out__DBP_raw__DM2 EQU CYREG_PRT6_DM2
+SCSI_Out__DBP_raw__DR EQU CYREG_PRT6_DR
+SCSI_Out__DBP_raw__INP_DIS EQU CYREG_PRT6_INP_DIS
+SCSI_Out__DBP_raw__INTTYPE EQU CYREG_PICU6_INTTYPE2
+SCSI_Out__DBP_raw__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
+SCSI_Out__DBP_raw__LCD_EN EQU CYREG_PRT6_LCD_EN
+SCSI_Out__DBP_raw__MASK EQU 0x04
+SCSI_Out__DBP_raw__PC EQU CYREG_PRT6_PC2
+SCSI_Out__DBP_raw__PORT EQU 6
+SCSI_Out__DBP_raw__PRT EQU CYREG_PRT6_PRT
+SCSI_Out__DBP_raw__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
+SCSI_Out__DBP_raw__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
+SCSI_Out__DBP_raw__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
+SCSI_Out__DBP_raw__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
+SCSI_Out__DBP_raw__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
+SCSI_Out__DBP_raw__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
+SCSI_Out__DBP_raw__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
+SCSI_Out__DBP_raw__PS EQU CYREG_PRT6_PS
+SCSI_Out__DBP_raw__SHIFT EQU 2
+SCSI_Out__DBP_raw__SLW EQU CYREG_PRT6_SLW
+SCSI_Out__IO_raw__AG EQU CYREG_PRT12_AG
+SCSI_Out__IO_raw__BIE EQU CYREG_PRT12_BIE
+SCSI_Out__IO_raw__BIT_MASK EQU CYREG_PRT12_BIT_MASK
+SCSI_Out__IO_raw__BYP EQU CYREG_PRT12_BYP
+SCSI_Out__IO_raw__DM0 EQU CYREG_PRT12_DM0
+SCSI_Out__IO_raw__DM1 EQU CYREG_PRT12_DM1
+SCSI_Out__IO_raw__DM2 EQU CYREG_PRT12_DM2
+SCSI_Out__IO_raw__DR EQU CYREG_PRT12_DR
+SCSI_Out__IO_raw__INP_DIS EQU CYREG_PRT12_INP_DIS
+SCSI_Out__IO_raw__INTTYPE EQU CYREG_PICU12_INTTYPE3
+SCSI_Out__IO_raw__MASK EQU 0x08
+SCSI_Out__IO_raw__PC EQU CYREG_PRT12_PC3
+SCSI_Out__IO_raw__PORT EQU 12
+SCSI_Out__IO_raw__PRT EQU CYREG_PRT12_PRT
+SCSI_Out__IO_raw__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN
+SCSI_Out__IO_raw__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0
+SCSI_Out__IO_raw__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1
+SCSI_Out__IO_raw__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0
+SCSI_Out__IO_raw__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1
+SCSI_Out__IO_raw__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT
+SCSI_Out__IO_raw__PS EQU CYREG_PRT12_PS
+SCSI_Out__IO_raw__SHIFT EQU 3
+SCSI_Out__IO_raw__SIO_CFG EQU CYREG_PRT12_SIO_CFG
+SCSI_Out__IO_raw__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF
+SCSI_Out__IO_raw__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN
+SCSI_Out__IO_raw__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ
+SCSI_Out__IO_raw__SLW EQU CYREG_PRT12_SLW
+SCSI_Out__MSG_raw__AG EQU CYREG_PRT0_AG
+SCSI_Out__MSG_raw__AMUX EQU CYREG_PRT0_AMUX
+SCSI_Out__MSG_raw__BIE EQU CYREG_PRT0_BIE
+SCSI_Out__MSG_raw__BIT_MASK EQU CYREG_PRT0_BIT_MASK
+SCSI_Out__MSG_raw__BYP EQU CYREG_PRT0_BYP
+SCSI_Out__MSG_raw__CTL EQU CYREG_PRT0_CTL
+SCSI_Out__MSG_raw__DM0 EQU CYREG_PRT0_DM0
+SCSI_Out__MSG_raw__DM1 EQU CYREG_PRT0_DM1
+SCSI_Out__MSG_raw__DM2 EQU CYREG_PRT0_DM2
+SCSI_Out__MSG_raw__DR EQU CYREG_PRT0_DR
+SCSI_Out__MSG_raw__INP_DIS EQU CYREG_PRT0_INP_DIS
+SCSI_Out__MSG_raw__INTTYPE EQU CYREG_PICU0_INTTYPE5
+SCSI_Out__MSG_raw__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
+SCSI_Out__MSG_raw__LCD_EN EQU CYREG_PRT0_LCD_EN
+SCSI_Out__MSG_raw__MASK EQU 0x20
+SCSI_Out__MSG_raw__PC EQU CYREG_PRT0_PC5
+SCSI_Out__MSG_raw__PORT EQU 0
+SCSI_Out__MSG_raw__PRT EQU CYREG_PRT0_PRT
+SCSI_Out__MSG_raw__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
+SCSI_Out__MSG_raw__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
+SCSI_Out__MSG_raw__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
+SCSI_Out__MSG_raw__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
+SCSI_Out__MSG_raw__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
+SCSI_Out__MSG_raw__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
+SCSI_Out__MSG_raw__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
+SCSI_Out__MSG_raw__PS EQU CYREG_PRT0_PS
+SCSI_Out__MSG_raw__SHIFT EQU 5
+SCSI_Out__MSG_raw__SLW EQU CYREG_PRT0_SLW
+SCSI_Out__REQ__AG EQU CYREG_PRT4_AG
+SCSI_Out__REQ__AMUX EQU CYREG_PRT4_AMUX
+SCSI_Out__REQ__BIE EQU CYREG_PRT4_BIE
+SCSI_Out__REQ__BIT_MASK EQU CYREG_PRT4_BIT_MASK
+SCSI_Out__REQ__BYP EQU CYREG_PRT4_BYP
+SCSI_Out__REQ__CTL EQU CYREG_PRT4_CTL
+SCSI_Out__REQ__DM0 EQU CYREG_PRT4_DM0
+SCSI_Out__REQ__DM1 EQU CYREG_PRT4_DM1
+SCSI_Out__REQ__DM2 EQU CYREG_PRT4_DM2
+SCSI_Out__REQ__DR EQU CYREG_PRT4_DR
+SCSI_Out__REQ__INP_DIS EQU CYREG_PRT4_INP_DIS
+SCSI_Out__REQ__INTTYPE EQU CYREG_PICU4_INTTYPE1
+SCSI_Out__REQ__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
+SCSI_Out__REQ__LCD_EN EQU CYREG_PRT4_LCD_EN
+SCSI_Out__REQ__MASK EQU 0x02
+SCSI_Out__REQ__PC EQU CYREG_PRT4_PC1
+SCSI_Out__REQ__PORT EQU 4
+SCSI_Out__REQ__PRT EQU CYREG_PRT4_PRT
+SCSI_Out__REQ__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
+SCSI_Out__REQ__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
+SCSI_Out__REQ__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
+SCSI_Out__REQ__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
+SCSI_Out__REQ__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
+SCSI_Out__REQ__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
+SCSI_Out__REQ__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
+SCSI_Out__REQ__PS EQU CYREG_PRT4_PS
+SCSI_Out__REQ__SHIFT EQU 1
+SCSI_Out__REQ__SLW EQU CYREG_PRT4_SLW
+SCSI_Out__RST__AG EQU CYREG_PRT0_AG
+SCSI_Out__RST__AMUX EQU CYREG_PRT0_AMUX
+SCSI_Out__RST__BIE EQU CYREG_PRT0_BIE
+SCSI_Out__RST__BIT_MASK EQU CYREG_PRT0_BIT_MASK
+SCSI_Out__RST__BYP EQU CYREG_PRT0_BYP
+SCSI_Out__RST__CTL EQU CYREG_PRT0_CTL
+SCSI_Out__RST__DM0 EQU CYREG_PRT0_DM0
+SCSI_Out__RST__DM1 EQU CYREG_PRT0_DM1
+SCSI_Out__RST__DM2 EQU CYREG_PRT0_DM2
+SCSI_Out__RST__DR EQU CYREG_PRT0_DR
+SCSI_Out__RST__INP_DIS EQU CYREG_PRT0_INP_DIS
+SCSI_Out__RST__INTTYPE EQU CYREG_PICU0_INTTYPE7
+SCSI_Out__RST__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
+SCSI_Out__RST__LCD_EN EQU CYREG_PRT0_LCD_EN
+SCSI_Out__RST__MASK EQU 0x80
+SCSI_Out__RST__PC EQU CYREG_PRT0_PC7
+SCSI_Out__RST__PORT EQU 0
+SCSI_Out__RST__PRT EQU CYREG_PRT0_PRT
+SCSI_Out__RST__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
+SCSI_Out__RST__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
+SCSI_Out__RST__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
+SCSI_Out__RST__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
+SCSI_Out__RST__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
+SCSI_Out__RST__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
+SCSI_Out__RST__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
+SCSI_Out__RST__PS EQU CYREG_PRT0_PS
+SCSI_Out__RST__SHIFT EQU 7
+SCSI_Out__RST__SLW EQU CYREG_PRT0_SLW
+SCSI_Out__SEL__AG EQU CYREG_PRT0_AG
+SCSI_Out__SEL__AMUX EQU CYREG_PRT0_AMUX
+SCSI_Out__SEL__BIE EQU CYREG_PRT0_BIE
+SCSI_Out__SEL__BIT_MASK EQU CYREG_PRT0_BIT_MASK
+SCSI_Out__SEL__BYP EQU CYREG_PRT0_BYP
+SCSI_Out__SEL__CTL EQU CYREG_PRT0_CTL
+SCSI_Out__SEL__DM0 EQU CYREG_PRT0_DM0
+SCSI_Out__SEL__DM1 EQU CYREG_PRT0_DM1
+SCSI_Out__SEL__DM2 EQU CYREG_PRT0_DM2
+SCSI_Out__SEL__DR EQU CYREG_PRT0_DR
+SCSI_Out__SEL__INP_DIS EQU CYREG_PRT0_INP_DIS
+SCSI_Out__SEL__INTTYPE EQU CYREG_PICU0_INTTYPE3
+SCSI_Out__SEL__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
+SCSI_Out__SEL__LCD_EN EQU CYREG_PRT0_LCD_EN
+SCSI_Out__SEL__MASK EQU 0x08
+SCSI_Out__SEL__PC EQU CYREG_PRT0_PC3
+SCSI_Out__SEL__PORT EQU 0
+SCSI_Out__SEL__PRT EQU CYREG_PRT0_PRT
+SCSI_Out__SEL__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
+SCSI_Out__SEL__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
+SCSI_Out__SEL__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
+SCSI_Out__SEL__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
+SCSI_Out__SEL__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
+SCSI_Out__SEL__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
+SCSI_Out__SEL__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
+SCSI_Out__SEL__PS EQU CYREG_PRT0_PS
+SCSI_Out__SEL__SHIFT EQU 3
+SCSI_Out__SEL__SLW EQU CYREG_PRT0_SLW
+SCSI_Out_Bits_Sync_ctrl_reg__0__MASK EQU 0x01
+SCSI_Out_Bits_Sync_ctrl_reg__0__POS EQU 0
+SCSI_Out_Bits_Sync_ctrl_reg__1__MASK EQU 0x02
+SCSI_Out_Bits_Sync_ctrl_reg__1__POS EQU 1
+SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB07_08_ACTL
+SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB07_08_CTL
+SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB07_08_CTL
+SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB07_08_CTL
+SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB07_08_CTL
+SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB07_08_MSK
+SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB07_08_MSK
+SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB07_08_MSK
+SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB07_08_MSK
+SCSI_Out_Bits_Sync_ctrl_reg__2__MASK EQU 0x04
+SCSI_Out_Bits_Sync_ctrl_reg__2__POS EQU 2
+SCSI_Out_Bits_Sync_ctrl_reg__3__MASK EQU 0x08
+SCSI_Out_Bits_Sync_ctrl_reg__3__POS EQU 3
+SCSI_Out_Bits_Sync_ctrl_reg__4__MASK EQU 0x10
+SCSI_Out_Bits_Sync_ctrl_reg__4__POS EQU 4
+SCSI_Out_Bits_Sync_ctrl_reg__5__MASK EQU 0x20
+SCSI_Out_Bits_Sync_ctrl_reg__5__POS EQU 5
+SCSI_Out_Bits_Sync_ctrl_reg__6__MASK EQU 0x40
+SCSI_Out_Bits_Sync_ctrl_reg__6__POS EQU 6
+SCSI_Out_Bits_Sync_ctrl_reg__7__MASK EQU 0x80
+SCSI_Out_Bits_Sync_ctrl_reg__7__POS EQU 7
+SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB07_ACTL
+SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB07_CTL
+SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB07_ST_CTL
+SCSI_Out_Bits_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB07_CTL
+SCSI_Out_Bits_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB07_ST_CTL
+SCSI_Out_Bits_Sync_ctrl_reg__MASK EQU 0xFF
+SCSI_Out_Bits_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB07_MSK_ACTL
+SCSI_Out_Bits_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB07_MSK_ACTL
+SCSI_Out_Bits_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB07_MSK
+SCSI_Out_Ctl_Sync_ctrl_reg__0__MASK EQU 0x01
+SCSI_Out_Ctl_Sync_ctrl_reg__0__POS EQU 0
+SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB11_12_ACTL
+SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB11_12_CTL
+SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB11_12_CTL
+SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB11_12_CTL
+SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB11_12_CTL
+SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB11_12_MSK
+SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB11_12_MSK
+SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB11_12_MSK
+SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB11_12_MSK
+SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB11_ACTL
+SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB11_CTL
+SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB11_ST_CTL
+SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB11_CTL
+SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB11_ST_CTL
+SCSI_Out_Ctl_Sync_ctrl_reg__MASK EQU 0x01
+SCSI_Out_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB11_MSK_ACTL
+SCSI_Out_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB11_MSK_ACTL
+SCSI_Out_Ctl_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB11_MSK
+SCSI_Out_DBx__0__AG EQU CYREG_PRT6_AG
+SCSI_Out_DBx__0__AMUX EQU CYREG_PRT6_AMUX
+SCSI_Out_DBx__0__BIE EQU CYREG_PRT6_BIE
+SCSI_Out_DBx__0__BIT_MASK EQU CYREG_PRT6_BIT_MASK
+SCSI_Out_DBx__0__BYP EQU CYREG_PRT6_BYP
+SCSI_Out_DBx__0__CTL EQU CYREG_PRT6_CTL
+SCSI_Out_DBx__0__DM0 EQU CYREG_PRT6_DM0
+SCSI_Out_DBx__0__DM1 EQU CYREG_PRT6_DM1
+SCSI_Out_DBx__0__DM2 EQU CYREG_PRT6_DM2
+SCSI_Out_DBx__0__DR EQU CYREG_PRT6_DR
+SCSI_Out_DBx__0__INP_DIS EQU CYREG_PRT6_INP_DIS
+SCSI_Out_DBx__0__INTTYPE EQU CYREG_PICU6_INTTYPE7
+SCSI_Out_DBx__0__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
+SCSI_Out_DBx__0__LCD_EN EQU CYREG_PRT6_LCD_EN
+SCSI_Out_DBx__0__MASK EQU 0x80
+SCSI_Out_DBx__0__PC EQU CYREG_PRT6_PC7
+SCSI_Out_DBx__0__PORT EQU 6
+SCSI_Out_DBx__0__PRT EQU CYREG_PRT6_PRT
+SCSI_Out_DBx__0__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
+SCSI_Out_DBx__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
+SCSI_Out_DBx__0__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
+SCSI_Out_DBx__0__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
+SCSI_Out_DBx__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
+SCSI_Out_DBx__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
+SCSI_Out_DBx__0__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
+SCSI_Out_DBx__0__PS EQU CYREG_PRT6_PS
+SCSI_Out_DBx__0__SHIFT EQU 7
+SCSI_Out_DBx__0__SLW EQU CYREG_PRT6_SLW
+SCSI_Out_DBx__1__AG EQU CYREG_PRT6_AG
+SCSI_Out_DBx__1__AMUX EQU CYREG_PRT6_AMUX
+SCSI_Out_DBx__1__BIE EQU CYREG_PRT6_BIE
+SCSI_Out_DBx__1__BIT_MASK EQU CYREG_PRT6_BIT_MASK
+SCSI_Out_DBx__1__BYP EQU CYREG_PRT6_BYP
+SCSI_Out_DBx__1__CTL EQU CYREG_PRT6_CTL
+SCSI_Out_DBx__1__DM0 EQU CYREG_PRT6_DM0
+SCSI_Out_DBx__1__DM1 EQU CYREG_PRT6_DM1
+SCSI_Out_DBx__1__DM2 EQU CYREG_PRT6_DM2
+SCSI_Out_DBx__1__DR EQU CYREG_PRT6_DR
+SCSI_Out_DBx__1__INP_DIS EQU CYREG_PRT6_INP_DIS
+SCSI_Out_DBx__1__INTTYPE EQU CYREG_PICU6_INTTYPE5
+SCSI_Out_DBx__1__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
+SCSI_Out_DBx__1__LCD_EN EQU CYREG_PRT6_LCD_EN
+SCSI_Out_DBx__1__MASK EQU 0x20
+SCSI_Out_DBx__1__PC EQU CYREG_PRT6_PC5
+SCSI_Out_DBx__1__PORT EQU 6
+SCSI_Out_DBx__1__PRT EQU CYREG_PRT6_PRT
+SCSI_Out_DBx__1__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
+SCSI_Out_DBx__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
+SCSI_Out_DBx__1__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
+SCSI_Out_DBx__1__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
+SCSI_Out_DBx__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
+SCSI_Out_DBx__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
+SCSI_Out_DBx__1__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
+SCSI_Out_DBx__1__PS EQU CYREG_PRT6_PS
+SCSI_Out_DBx__1__SHIFT EQU 5
+SCSI_Out_DBx__1__SLW EQU CYREG_PRT6_SLW
+SCSI_Out_DBx__2__AG EQU CYREG_PRT12_AG
+SCSI_Out_DBx__2__BIE EQU CYREG_PRT12_BIE
+SCSI_Out_DBx__2__BIT_MASK EQU CYREG_PRT12_BIT_MASK
+SCSI_Out_DBx__2__BYP EQU CYREG_PRT12_BYP
+SCSI_Out_DBx__2__DM0 EQU CYREG_PRT12_DM0
+SCSI_Out_DBx__2__DM1 EQU CYREG_PRT12_DM1
+SCSI_Out_DBx__2__DM2 EQU CYREG_PRT12_DM2
+SCSI_Out_DBx__2__DR EQU CYREG_PRT12_DR
+SCSI_Out_DBx__2__INP_DIS EQU CYREG_PRT12_INP_DIS
+SCSI_Out_DBx__2__INTTYPE EQU CYREG_PICU12_INTTYPE5
+SCSI_Out_DBx__2__MASK EQU 0x20
+SCSI_Out_DBx__2__PC EQU CYREG_PRT12_PC5
+SCSI_Out_DBx__2__PORT EQU 12
+SCSI_Out_DBx__2__PRT EQU CYREG_PRT12_PRT
+SCSI_Out_DBx__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN
+SCSI_Out_DBx__2__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0
+SCSI_Out_DBx__2__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1
+SCSI_Out_DBx__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0
+SCSI_Out_DBx__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1
+SCSI_Out_DBx__2__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT
+SCSI_Out_DBx__2__PS EQU CYREG_PRT12_PS
+SCSI_Out_DBx__2__SHIFT EQU 5
+SCSI_Out_DBx__2__SIO_CFG EQU CYREG_PRT12_SIO_CFG
+SCSI_Out_DBx__2__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF
+SCSI_Out_DBx__2__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN
+SCSI_Out_DBx__2__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ
+SCSI_Out_DBx__2__SLW EQU CYREG_PRT12_SLW
+SCSI_Out_DBx__3__AG EQU CYREG_PRT2_AG
+SCSI_Out_DBx__3__AMUX EQU CYREG_PRT2_AMUX
+SCSI_Out_DBx__3__BIE EQU CYREG_PRT2_BIE
+SCSI_Out_DBx__3__BIT_MASK EQU CYREG_PRT2_BIT_MASK
+SCSI_Out_DBx__3__BYP EQU CYREG_PRT2_BYP
+SCSI_Out_DBx__3__CTL EQU CYREG_PRT2_CTL
+SCSI_Out_DBx__3__DM0 EQU CYREG_PRT2_DM0
+SCSI_Out_DBx__3__DM1 EQU CYREG_PRT2_DM1
+SCSI_Out_DBx__3__DM2 EQU CYREG_PRT2_DM2
+SCSI_Out_DBx__3__DR EQU CYREG_PRT2_DR
+SCSI_Out_DBx__3__INP_DIS EQU CYREG_PRT2_INP_DIS
+SCSI_Out_DBx__3__INTTYPE EQU CYREG_PICU2_INTTYPE7
+SCSI_Out_DBx__3__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
+SCSI_Out_DBx__3__LCD_EN EQU CYREG_PRT2_LCD_EN
+SCSI_Out_DBx__3__MASK EQU 0x80
+SCSI_Out_DBx__3__PC EQU CYREG_PRT2_PC7
+SCSI_Out_DBx__3__PORT EQU 2
+SCSI_Out_DBx__3__PRT EQU CYREG_PRT2_PRT
+SCSI_Out_DBx__3__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
+SCSI_Out_DBx__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
+SCSI_Out_DBx__3__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
+SCSI_Out_DBx__3__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
+SCSI_Out_DBx__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
+SCSI_Out_DBx__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
+SCSI_Out_DBx__3__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
+SCSI_Out_DBx__3__PS EQU CYREG_PRT2_PS
+SCSI_Out_DBx__3__SHIFT EQU 7
+SCSI_Out_DBx__3__SLW EQU CYREG_PRT2_SLW
+SCSI_Out_DBx__4__AG EQU CYREG_PRT2_AG
+SCSI_Out_DBx__4__AMUX EQU CYREG_PRT2_AMUX
+SCSI_Out_DBx__4__BIE EQU CYREG_PRT2_BIE
+SCSI_Out_DBx__4__BIT_MASK EQU CYREG_PRT2_BIT_MASK
+SCSI_Out_DBx__4__BYP EQU CYREG_PRT2_BYP
+SCSI_Out_DBx__4__CTL EQU CYREG_PRT2_CTL
+SCSI_Out_DBx__4__DM0 EQU CYREG_PRT2_DM0
+SCSI_Out_DBx__4__DM1 EQU CYREG_PRT2_DM1
+SCSI_Out_DBx__4__DM2 EQU CYREG_PRT2_DM2
+SCSI_Out_DBx__4__DR EQU CYREG_PRT2_DR
+SCSI_Out_DBx__4__INP_DIS EQU CYREG_PRT2_INP_DIS
+SCSI_Out_DBx__4__INTTYPE EQU CYREG_PICU2_INTTYPE5
+SCSI_Out_DBx__4__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
+SCSI_Out_DBx__4__LCD_EN EQU CYREG_PRT2_LCD_EN
+SCSI_Out_DBx__4__MASK EQU 0x20
+SCSI_Out_DBx__4__PC EQU CYREG_PRT2_PC5
+SCSI_Out_DBx__4__PORT EQU 2
+SCSI_Out_DBx__4__PRT EQU CYREG_PRT2_PRT
+SCSI_Out_DBx__4__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
+SCSI_Out_DBx__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
+SCSI_Out_DBx__4__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
+SCSI_Out_DBx__4__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
+SCSI_Out_DBx__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
+SCSI_Out_DBx__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
+SCSI_Out_DBx__4__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
+SCSI_Out_DBx__4__PS EQU CYREG_PRT2_PS
+SCSI_Out_DBx__4__SHIFT EQU 5
+SCSI_Out_DBx__4__SLW EQU CYREG_PRT2_SLW
+SCSI_Out_DBx__5__AG EQU CYREG_PRT2_AG
+SCSI_Out_DBx__5__AMUX EQU CYREG_PRT2_AMUX
+SCSI_Out_DBx__5__BIE EQU CYREG_PRT2_BIE
+SCSI_Out_DBx__5__BIT_MASK EQU CYREG_PRT2_BIT_MASK
+SCSI_Out_DBx__5__BYP EQU CYREG_PRT2_BYP
+SCSI_Out_DBx__5__CTL EQU CYREG_PRT2_CTL
+SCSI_Out_DBx__5__DM0 EQU CYREG_PRT2_DM0
+SCSI_Out_DBx__5__DM1 EQU CYREG_PRT2_DM1
+SCSI_Out_DBx__5__DM2 EQU CYREG_PRT2_DM2
+SCSI_Out_DBx__5__DR EQU CYREG_PRT2_DR
+SCSI_Out_DBx__5__INP_DIS EQU CYREG_PRT2_INP_DIS
+SCSI_Out_DBx__5__INTTYPE EQU CYREG_PICU2_INTTYPE3
+SCSI_Out_DBx__5__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
+SCSI_Out_DBx__5__LCD_EN EQU CYREG_PRT2_LCD_EN
+SCSI_Out_DBx__5__MASK EQU 0x08
+SCSI_Out_DBx__5__PC EQU CYREG_PRT2_PC3
+SCSI_Out_DBx__5__PORT EQU 2
+SCSI_Out_DBx__5__PRT EQU CYREG_PRT2_PRT
+SCSI_Out_DBx__5__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
+SCSI_Out_DBx__5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
+SCSI_Out_DBx__5__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
+SCSI_Out_DBx__5__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
+SCSI_Out_DBx__5__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
+SCSI_Out_DBx__5__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
+SCSI_Out_DBx__5__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
+SCSI_Out_DBx__5__PS EQU CYREG_PRT2_PS
+SCSI_Out_DBx__5__SHIFT EQU 3
+SCSI_Out_DBx__5__SLW EQU CYREG_PRT2_SLW
+SCSI_Out_DBx__6__AG EQU CYREG_PRT2_AG
+SCSI_Out_DBx__6__AMUX EQU CYREG_PRT2_AMUX
+SCSI_Out_DBx__6__BIE EQU CYREG_PRT2_BIE
+SCSI_Out_DBx__6__BIT_MASK EQU CYREG_PRT2_BIT_MASK
+SCSI_Out_DBx__6__BYP EQU CYREG_PRT2_BYP
+SCSI_Out_DBx__6__CTL EQU CYREG_PRT2_CTL
+SCSI_Out_DBx__6__DM0 EQU CYREG_PRT2_DM0
+SCSI_Out_DBx__6__DM1 EQU CYREG_PRT2_DM1
+SCSI_Out_DBx__6__DM2 EQU CYREG_PRT2_DM2
+SCSI_Out_DBx__6__DR EQU CYREG_PRT2_DR
+SCSI_Out_DBx__6__INP_DIS EQU CYREG_PRT2_INP_DIS
+SCSI_Out_DBx__6__INTTYPE EQU CYREG_PICU2_INTTYPE1
+SCSI_Out_DBx__6__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
+SCSI_Out_DBx__6__LCD_EN EQU CYREG_PRT2_LCD_EN
+SCSI_Out_DBx__6__MASK EQU 0x02
+SCSI_Out_DBx__6__PC EQU CYREG_PRT2_PC1
+SCSI_Out_DBx__6__PORT EQU 2
+SCSI_Out_DBx__6__PRT EQU CYREG_PRT2_PRT
+SCSI_Out_DBx__6__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
+SCSI_Out_DBx__6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
+SCSI_Out_DBx__6__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
+SCSI_Out_DBx__6__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
+SCSI_Out_DBx__6__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
+SCSI_Out_DBx__6__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
+SCSI_Out_DBx__6__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
+SCSI_Out_DBx__6__PS EQU CYREG_PRT2_PS
+SCSI_Out_DBx__6__SHIFT EQU 1
+SCSI_Out_DBx__6__SLW EQU CYREG_PRT2_SLW
+SCSI_Out_DBx__7__AG EQU CYREG_PRT15_AG
+SCSI_Out_DBx__7__AMUX EQU CYREG_PRT15_AMUX
+SCSI_Out_DBx__7__BIE EQU CYREG_PRT15_BIE
+SCSI_Out_DBx__7__BIT_MASK EQU CYREG_PRT15_BIT_MASK
+SCSI_Out_DBx__7__BYP EQU CYREG_PRT15_BYP
+SCSI_Out_DBx__7__CTL EQU CYREG_PRT15_CTL
+SCSI_Out_DBx__7__DM0 EQU CYREG_PRT15_DM0
+SCSI_Out_DBx__7__DM1 EQU CYREG_PRT15_DM1
+SCSI_Out_DBx__7__DM2 EQU CYREG_PRT15_DM2
+SCSI_Out_DBx__7__DR EQU CYREG_PRT15_DR
+SCSI_Out_DBx__7__INP_DIS EQU CYREG_PRT15_INP_DIS
+SCSI_Out_DBx__7__INTTYPE EQU CYREG_PICU15_INTTYPE5
+SCSI_Out_DBx__7__LCD_COM_SEG EQU CYREG_PRT15_LCD_COM_SEG
+SCSI_Out_DBx__7__LCD_EN EQU CYREG_PRT15_LCD_EN
+SCSI_Out_DBx__7__MASK EQU 0x20
+SCSI_Out_DBx__7__PC EQU CYREG_IO_PC_PRT15_PC5
+SCSI_Out_DBx__7__PORT EQU 15
+SCSI_Out_DBx__7__PRT EQU CYREG_PRT15_PRT
+SCSI_Out_DBx__7__PRTDSI__CAPS_SEL EQU CYREG_PRT15_CAPS_SEL
+SCSI_Out_DBx__7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT15_DBL_SYNC_IN
+SCSI_Out_DBx__7__PRTDSI__OE_SEL0 EQU CYREG_PRT15_OE_SEL0
+SCSI_Out_DBx__7__PRTDSI__OE_SEL1 EQU CYREG_PRT15_OE_SEL1
+SCSI_Out_DBx__7__PRTDSI__OUT_SEL0 EQU CYREG_PRT15_OUT_SEL0
+SCSI_Out_DBx__7__PRTDSI__OUT_SEL1 EQU CYREG_PRT15_OUT_SEL1
+SCSI_Out_DBx__7__PRTDSI__SYNC_OUT EQU CYREG_PRT15_SYNC_OUT
+SCSI_Out_DBx__7__PS EQU CYREG_PRT15_PS
+SCSI_Out_DBx__7__SHIFT EQU 5
+SCSI_Out_DBx__7__SLW EQU CYREG_PRT15_SLW
+SCSI_Out_DBx__DB0__AG EQU CYREG_PRT6_AG
+SCSI_Out_DBx__DB0__AMUX EQU CYREG_PRT6_AMUX
+SCSI_Out_DBx__DB0__BIE EQU CYREG_PRT6_BIE
+SCSI_Out_DBx__DB0__BIT_MASK EQU CYREG_PRT6_BIT_MASK
+SCSI_Out_DBx__DB0__BYP EQU CYREG_PRT6_BYP
+SCSI_Out_DBx__DB0__CTL EQU CYREG_PRT6_CTL
+SCSI_Out_DBx__DB0__DM0 EQU CYREG_PRT6_DM0
+SCSI_Out_DBx__DB0__DM1 EQU CYREG_PRT6_DM1
+SCSI_Out_DBx__DB0__DM2 EQU CYREG_PRT6_DM2
+SCSI_Out_DBx__DB0__DR EQU CYREG_PRT6_DR
+SCSI_Out_DBx__DB0__INP_DIS EQU CYREG_PRT6_INP_DIS
+SCSI_Out_DBx__DB0__INTTYPE EQU CYREG_PICU6_INTTYPE7
+SCSI_Out_DBx__DB0__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
+SCSI_Out_DBx__DB0__LCD_EN EQU CYREG_PRT6_LCD_EN
+SCSI_Out_DBx__DB0__MASK EQU 0x80
+SCSI_Out_DBx__DB0__PC EQU CYREG_PRT6_PC7
+SCSI_Out_DBx__DB0__PORT EQU 6
+SCSI_Out_DBx__DB0__PRT EQU CYREG_PRT6_PRT
+SCSI_Out_DBx__DB0__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
+SCSI_Out_DBx__DB0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
+SCSI_Out_DBx__DB0__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
+SCSI_Out_DBx__DB0__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
+SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
+SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
+SCSI_Out_DBx__DB0__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
+SCSI_Out_DBx__DB0__PS EQU CYREG_PRT6_PS
+SCSI_Out_DBx__DB0__SHIFT EQU 7
+SCSI_Out_DBx__DB0__SLW EQU CYREG_PRT6_SLW
+SCSI_Out_DBx__DB1__AG EQU CYREG_PRT6_AG
+SCSI_Out_DBx__DB1__AMUX EQU CYREG_PRT6_AMUX
+SCSI_Out_DBx__DB1__BIE EQU CYREG_PRT6_BIE
+SCSI_Out_DBx__DB1__BIT_MASK EQU CYREG_PRT6_BIT_MASK
+SCSI_Out_DBx__DB1__BYP EQU CYREG_PRT6_BYP
+SCSI_Out_DBx__DB1__CTL EQU CYREG_PRT6_CTL
+SCSI_Out_DBx__DB1__DM0 EQU CYREG_PRT6_DM0
+SCSI_Out_DBx__DB1__DM1 EQU CYREG_PRT6_DM1
+SCSI_Out_DBx__DB1__DM2 EQU CYREG_PRT6_DM2
+SCSI_Out_DBx__DB1__DR EQU CYREG_PRT6_DR
+SCSI_Out_DBx__DB1__INP_DIS EQU CYREG_PRT6_INP_DIS
+SCSI_Out_DBx__DB1__INTTYPE EQU CYREG_PICU6_INTTYPE5
+SCSI_Out_DBx__DB1__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
+SCSI_Out_DBx__DB1__LCD_EN EQU CYREG_PRT6_LCD_EN
+SCSI_Out_DBx__DB1__MASK EQU 0x20
+SCSI_Out_DBx__DB1__PC EQU CYREG_PRT6_PC5
+SCSI_Out_DBx__DB1__PORT EQU 6
+SCSI_Out_DBx__DB1__PRT EQU CYREG_PRT6_PRT
+SCSI_Out_DBx__DB1__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
+SCSI_Out_DBx__DB1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
+SCSI_Out_DBx__DB1__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
+SCSI_Out_DBx__DB1__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
+SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
+SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
+SCSI_Out_DBx__DB1__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
+SCSI_Out_DBx__DB1__PS EQU CYREG_PRT6_PS
+SCSI_Out_DBx__DB1__SHIFT EQU 5
+SCSI_Out_DBx__DB1__SLW EQU CYREG_PRT6_SLW
+SCSI_Out_DBx__DB2__AG EQU CYREG_PRT12_AG
+SCSI_Out_DBx__DB2__BIE EQU CYREG_PRT12_BIE
+SCSI_Out_DBx__DB2__BIT_MASK EQU CYREG_PRT12_BIT_MASK
+SCSI_Out_DBx__DB2__BYP EQU CYREG_PRT12_BYP
+SCSI_Out_DBx__DB2__DM0 EQU CYREG_PRT12_DM0
+SCSI_Out_DBx__DB2__DM1 EQU CYREG_PRT12_DM1
+SCSI_Out_DBx__DB2__DM2 EQU CYREG_PRT12_DM2
+SCSI_Out_DBx__DB2__DR EQU CYREG_PRT12_DR
+SCSI_Out_DBx__DB2__INP_DIS EQU CYREG_PRT12_INP_DIS
+SCSI_Out_DBx__DB2__INTTYPE EQU CYREG_PICU12_INTTYPE5
+SCSI_Out_DBx__DB2__MASK EQU 0x20
+SCSI_Out_DBx__DB2__PC EQU CYREG_PRT12_PC5
+SCSI_Out_DBx__DB2__PORT EQU 12
+SCSI_Out_DBx__DB2__PRT EQU CYREG_PRT12_PRT
+SCSI_Out_DBx__DB2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN
+SCSI_Out_DBx__DB2__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0
+SCSI_Out_DBx__DB2__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1
+SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0
+SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1
+SCSI_Out_DBx__DB2__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT
+SCSI_Out_DBx__DB2__PS EQU CYREG_PRT12_PS
+SCSI_Out_DBx__DB2__SHIFT EQU 5
+SCSI_Out_DBx__DB2__SIO_CFG EQU CYREG_PRT12_SIO_CFG
+SCSI_Out_DBx__DB2__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF
+SCSI_Out_DBx__DB2__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN
+SCSI_Out_DBx__DB2__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ
+SCSI_Out_DBx__DB2__SLW EQU CYREG_PRT12_SLW
+SCSI_Out_DBx__DB3__AG EQU CYREG_PRT2_AG
+SCSI_Out_DBx__DB3__AMUX EQU CYREG_PRT2_AMUX
+SCSI_Out_DBx__DB3__BIE EQU CYREG_PRT2_BIE
+SCSI_Out_DBx__DB3__BIT_MASK EQU CYREG_PRT2_BIT_MASK
+SCSI_Out_DBx__DB3__BYP EQU CYREG_PRT2_BYP
+SCSI_Out_DBx__DB3__CTL EQU CYREG_PRT2_CTL
+SCSI_Out_DBx__DB3__DM0 EQU CYREG_PRT2_DM0
+SCSI_Out_DBx__DB3__DM1 EQU CYREG_PRT2_DM1
+SCSI_Out_DBx__DB3__DM2 EQU CYREG_PRT2_DM2
+SCSI_Out_DBx__DB3__DR EQU CYREG_PRT2_DR
+SCSI_Out_DBx__DB3__INP_DIS EQU CYREG_PRT2_INP_DIS
+SCSI_Out_DBx__DB3__INTTYPE EQU CYREG_PICU2_INTTYPE7
+SCSI_Out_DBx__DB3__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
+SCSI_Out_DBx__DB3__LCD_EN EQU CYREG_PRT2_LCD_EN
+SCSI_Out_DBx__DB3__MASK EQU 0x80
+SCSI_Out_DBx__DB3__PC EQU CYREG_PRT2_PC7
+SCSI_Out_DBx__DB3__PORT EQU 2
+SCSI_Out_DBx__DB3__PRT EQU CYREG_PRT2_PRT
+SCSI_Out_DBx__DB3__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
+SCSI_Out_DBx__DB3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
+SCSI_Out_DBx__DB3__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
+SCSI_Out_DBx__DB3__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
+SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
+SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
+SCSI_Out_DBx__DB3__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
+SCSI_Out_DBx__DB3__PS EQU CYREG_PRT2_PS
+SCSI_Out_DBx__DB3__SHIFT EQU 7
+SCSI_Out_DBx__DB3__SLW EQU CYREG_PRT2_SLW
+SCSI_Out_DBx__DB4__AG EQU CYREG_PRT2_AG
+SCSI_Out_DBx__DB4__AMUX EQU CYREG_PRT2_AMUX
+SCSI_Out_DBx__DB4__BIE EQU CYREG_PRT2_BIE
+SCSI_Out_DBx__DB4__BIT_MASK EQU CYREG_PRT2_BIT_MASK
+SCSI_Out_DBx__DB4__BYP EQU CYREG_PRT2_BYP
+SCSI_Out_DBx__DB4__CTL EQU CYREG_PRT2_CTL
+SCSI_Out_DBx__DB4__DM0 EQU CYREG_PRT2_DM0
+SCSI_Out_DBx__DB4__DM1 EQU CYREG_PRT2_DM1
+SCSI_Out_DBx__DB4__DM2 EQU CYREG_PRT2_DM2
+SCSI_Out_DBx__DB4__DR EQU CYREG_PRT2_DR
+SCSI_Out_DBx__DB4__INP_DIS EQU CYREG_PRT2_INP_DIS
+SCSI_Out_DBx__DB4__INTTYPE EQU CYREG_PICU2_INTTYPE5
+SCSI_Out_DBx__DB4__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
+SCSI_Out_DBx__DB4__LCD_EN EQU CYREG_PRT2_LCD_EN
+SCSI_Out_DBx__DB4__MASK EQU 0x20
+SCSI_Out_DBx__DB4__PC EQU CYREG_PRT2_PC5
+SCSI_Out_DBx__DB4__PORT EQU 2
+SCSI_Out_DBx__DB4__PRT EQU CYREG_PRT2_PRT
+SCSI_Out_DBx__DB4__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
+SCSI_Out_DBx__DB4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
+SCSI_Out_DBx__DB4__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
+SCSI_Out_DBx__DB4__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
+SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
+SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
+SCSI_Out_DBx__DB4__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
+SCSI_Out_DBx__DB4__PS EQU CYREG_PRT2_PS
+SCSI_Out_DBx__DB4__SHIFT EQU 5
+SCSI_Out_DBx__DB4__SLW EQU CYREG_PRT2_SLW
+SCSI_Out_DBx__DB5__AG EQU CYREG_PRT2_AG
+SCSI_Out_DBx__DB5__AMUX EQU CYREG_PRT2_AMUX
+SCSI_Out_DBx__DB5__BIE EQU CYREG_PRT2_BIE
+SCSI_Out_DBx__DB5__BIT_MASK EQU CYREG_PRT2_BIT_MASK
+SCSI_Out_DBx__DB5__BYP EQU CYREG_PRT2_BYP
+SCSI_Out_DBx__DB5__CTL EQU CYREG_PRT2_CTL
+SCSI_Out_DBx__DB5__DM0 EQU CYREG_PRT2_DM0
+SCSI_Out_DBx__DB5__DM1 EQU CYREG_PRT2_DM1
+SCSI_Out_DBx__DB5__DM2 EQU CYREG_PRT2_DM2
+SCSI_Out_DBx__DB5__DR EQU CYREG_PRT2_DR
+SCSI_Out_DBx__DB5__INP_DIS EQU CYREG_PRT2_INP_DIS
+SCSI_Out_DBx__DB5__INTTYPE EQU CYREG_PICU2_INTTYPE3
+SCSI_Out_DBx__DB5__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
+SCSI_Out_DBx__DB5__LCD_EN EQU CYREG_PRT2_LCD_EN
+SCSI_Out_DBx__DB5__MASK EQU 0x08
+SCSI_Out_DBx__DB5__PC EQU CYREG_PRT2_PC3
+SCSI_Out_DBx__DB5__PORT EQU 2
+SCSI_Out_DBx__DB5__PRT EQU CYREG_PRT2_PRT
+SCSI_Out_DBx__DB5__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
+SCSI_Out_DBx__DB5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
+SCSI_Out_DBx__DB5__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
+SCSI_Out_DBx__DB5__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
+SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
+SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
+SCSI_Out_DBx__DB5__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
+SCSI_Out_DBx__DB5__PS EQU CYREG_PRT2_PS
+SCSI_Out_DBx__DB5__SHIFT EQU 3
+SCSI_Out_DBx__DB5__SLW EQU CYREG_PRT2_SLW
+SCSI_Out_DBx__DB6__AG EQU CYREG_PRT2_AG
+SCSI_Out_DBx__DB6__AMUX EQU CYREG_PRT2_AMUX
+SCSI_Out_DBx__DB6__BIE EQU CYREG_PRT2_BIE
+SCSI_Out_DBx__DB6__BIT_MASK EQU CYREG_PRT2_BIT_MASK
+SCSI_Out_DBx__DB6__BYP EQU CYREG_PRT2_BYP
+SCSI_Out_DBx__DB6__CTL EQU CYREG_PRT2_CTL
+SCSI_Out_DBx__DB6__DM0 EQU CYREG_PRT2_DM0
+SCSI_Out_DBx__DB6__DM1 EQU CYREG_PRT2_DM1
+SCSI_Out_DBx__DB6__DM2 EQU CYREG_PRT2_DM2
+SCSI_Out_DBx__DB6__DR EQU CYREG_PRT2_DR
+SCSI_Out_DBx__DB6__INP_DIS EQU CYREG_PRT2_INP_DIS
+SCSI_Out_DBx__DB6__INTTYPE EQU CYREG_PICU2_INTTYPE1
+SCSI_Out_DBx__DB6__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
+SCSI_Out_DBx__DB6__LCD_EN EQU CYREG_PRT2_LCD_EN
+SCSI_Out_DBx__DB6__MASK EQU 0x02
+SCSI_Out_DBx__DB6__PC EQU CYREG_PRT2_PC1
+SCSI_Out_DBx__DB6__PORT EQU 2
+SCSI_Out_DBx__DB6__PRT EQU CYREG_PRT2_PRT
+SCSI_Out_DBx__DB6__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
+SCSI_Out_DBx__DB6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
+SCSI_Out_DBx__DB6__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
+SCSI_Out_DBx__DB6__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
+SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
+SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
+SCSI_Out_DBx__DB6__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
+SCSI_Out_DBx__DB6__PS EQU CYREG_PRT2_PS
+SCSI_Out_DBx__DB6__SHIFT EQU 1
+SCSI_Out_DBx__DB6__SLW EQU CYREG_PRT2_SLW
+SCSI_Out_DBx__DB7__AG EQU CYREG_PRT15_AG
+SCSI_Out_DBx__DB7__AMUX EQU CYREG_PRT15_AMUX
+SCSI_Out_DBx__DB7__BIE EQU CYREG_PRT15_BIE
+SCSI_Out_DBx__DB7__BIT_MASK EQU CYREG_PRT15_BIT_MASK
+SCSI_Out_DBx__DB7__BYP EQU CYREG_PRT15_BYP
+SCSI_Out_DBx__DB7__CTL EQU CYREG_PRT15_CTL
+SCSI_Out_DBx__DB7__DM0 EQU CYREG_PRT15_DM0
+SCSI_Out_DBx__DB7__DM1 EQU CYREG_PRT15_DM1
+SCSI_Out_DBx__DB7__DM2 EQU CYREG_PRT15_DM2
+SCSI_Out_DBx__DB7__DR EQU CYREG_PRT15_DR
+SCSI_Out_DBx__DB7__INP_DIS EQU CYREG_PRT15_INP_DIS
+SCSI_Out_DBx__DB7__INTTYPE EQU CYREG_PICU15_INTTYPE5
+SCSI_Out_DBx__DB7__LCD_COM_SEG EQU CYREG_PRT15_LCD_COM_SEG
+SCSI_Out_DBx__DB7__LCD_EN EQU CYREG_PRT15_LCD_EN
+SCSI_Out_DBx__DB7__MASK EQU 0x20
+SCSI_Out_DBx__DB7__PC EQU CYREG_IO_PC_PRT15_PC5
+SCSI_Out_DBx__DB7__PORT EQU 15
+SCSI_Out_DBx__DB7__PRT EQU CYREG_PRT15_PRT
+SCSI_Out_DBx__DB7__PRTDSI__CAPS_SEL EQU CYREG_PRT15_CAPS_SEL
+SCSI_Out_DBx__DB7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT15_DBL_SYNC_IN
+SCSI_Out_DBx__DB7__PRTDSI__OE_SEL0 EQU CYREG_PRT15_OE_SEL0
+SCSI_Out_DBx__DB7__PRTDSI__OE_SEL1 EQU CYREG_PRT15_OE_SEL1
+SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL0 EQU CYREG_PRT15_OUT_SEL0
+SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL1 EQU CYREG_PRT15_OUT_SEL1
+SCSI_Out_DBx__DB7__PRTDSI__SYNC_OUT EQU CYREG_PRT15_SYNC_OUT
+SCSI_Out_DBx__DB7__PS EQU CYREG_PRT15_PS
+SCSI_Out_DBx__DB7__SHIFT EQU 5
+SCSI_Out_DBx__DB7__SLW EQU CYREG_PRT15_SLW
+
+/* SD_RX_DMA */
+SD_RX_DMA__DRQ_CTL EQU CYREG_IDMUX_DRQ_CTL0
+SD_RX_DMA__DRQ_NUMBER EQU 2
+SD_RX_DMA__NUMBEROF_TDS EQU 0
+SD_RX_DMA__PRIORITY EQU 0
+SD_RX_DMA__TERMIN_EN EQU 0
+SD_RX_DMA__TERMIN_SEL EQU 0
+SD_RX_DMA__TERMOUT0_EN EQU 1
+SD_RX_DMA__TERMOUT0_SEL EQU 2
+SD_RX_DMA__TERMOUT1_EN EQU 0
+SD_RX_DMA__TERMOUT1_SEL EQU 0
+SD_RX_DMA_COMPLETE__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0
+SD_RX_DMA_COMPLETE__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0
+SD_RX_DMA_COMPLETE__INTC_MASK EQU 0x20
+SD_RX_DMA_COMPLETE__INTC_NUMBER EQU 5
+SD_RX_DMA_COMPLETE__INTC_PRIOR_NUM EQU 7
+SD_RX_DMA_COMPLETE__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_5
+SD_RX_DMA_COMPLETE__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0
+SD_RX_DMA_COMPLETE__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0
+
+/* SD_TX_DMA */
+SD_TX_DMA__DRQ_CTL EQU CYREG_IDMUX_DRQ_CTL0
+SD_TX_DMA__DRQ_NUMBER EQU 3
+SD_TX_DMA__NUMBEROF_TDS EQU 0
+SD_TX_DMA__PRIORITY EQU 1
+SD_TX_DMA__TERMIN_EN EQU 0
+SD_TX_DMA__TERMIN_SEL EQU 0
+SD_TX_DMA__TERMOUT0_EN EQU 1
+SD_TX_DMA__TERMOUT0_SEL EQU 3
+SD_TX_DMA__TERMOUT1_EN EQU 0
+SD_TX_DMA__TERMOUT1_SEL EQU 0
+SD_TX_DMA_COMPLETE__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0
+SD_TX_DMA_COMPLETE__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0
+SD_TX_DMA_COMPLETE__INTC_MASK EQU 0x40
+SD_TX_DMA_COMPLETE__INTC_NUMBER EQU 6
+SD_TX_DMA_COMPLETE__INTC_PRIOR_NUM EQU 7
+SD_TX_DMA_COMPLETE__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_6
+SD_TX_DMA_COMPLETE__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0
+SD_TX_DMA_COMPLETE__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0
+
+/* SCSI_Noise */
+SCSI_Noise__0__AG EQU CYREG_PRT4_AG
+SCSI_Noise__0__AMUX EQU CYREG_PRT4_AMUX
+SCSI_Noise__0__BIE EQU CYREG_PRT4_BIE
+SCSI_Noise__0__BIT_MASK EQU CYREG_PRT4_BIT_MASK
+SCSI_Noise__0__BYP EQU CYREG_PRT4_BYP
+SCSI_Noise__0__CTL EQU CYREG_PRT4_CTL
+SCSI_Noise__0__DM0 EQU CYREG_PRT4_DM0
+SCSI_Noise__0__DM1 EQU CYREG_PRT4_DM1
+SCSI_Noise__0__DM2 EQU CYREG_PRT4_DM2
+SCSI_Noise__0__DR EQU CYREG_PRT4_DR
+SCSI_Noise__0__INP_DIS EQU CYREG_PRT4_INP_DIS
+SCSI_Noise__0__INTTYPE EQU CYREG_PICU4_INTTYPE7
+SCSI_Noise__0__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
+SCSI_Noise__0__LCD_EN EQU CYREG_PRT4_LCD_EN
+SCSI_Noise__0__MASK EQU 0x80
+SCSI_Noise__0__PC EQU CYREG_PRT4_PC7
+SCSI_Noise__0__PORT EQU 4
+SCSI_Noise__0__PRT EQU CYREG_PRT4_PRT
+SCSI_Noise__0__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
+SCSI_Noise__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
+SCSI_Noise__0__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
+SCSI_Noise__0__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
+SCSI_Noise__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
+SCSI_Noise__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
+SCSI_Noise__0__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
+SCSI_Noise__0__PS EQU CYREG_PRT4_PS
+SCSI_Noise__0__SHIFT EQU 7
+SCSI_Noise__0__SLW EQU CYREG_PRT4_SLW
+SCSI_Noise__1__AG EQU CYREG_PRT4_AG
+SCSI_Noise__1__AMUX EQU CYREG_PRT4_AMUX
+SCSI_Noise__1__BIE EQU CYREG_PRT4_BIE
+SCSI_Noise__1__BIT_MASK EQU CYREG_PRT4_BIT_MASK
+SCSI_Noise__1__BYP EQU CYREG_PRT4_BYP
+SCSI_Noise__1__CTL EQU CYREG_PRT4_CTL
+SCSI_Noise__1__DM0 EQU CYREG_PRT4_DM0
+SCSI_Noise__1__DM1 EQU CYREG_PRT4_DM1
+SCSI_Noise__1__DM2 EQU CYREG_PRT4_DM2
+SCSI_Noise__1__DR EQU CYREG_PRT4_DR
+SCSI_Noise__1__INP_DIS EQU CYREG_PRT4_INP_DIS
+SCSI_Noise__1__INTTYPE EQU CYREG_PICU4_INTTYPE5
+SCSI_Noise__1__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
+SCSI_Noise__1__LCD_EN EQU CYREG_PRT4_LCD_EN
+SCSI_Noise__1__MASK EQU 0x20
+SCSI_Noise__1__PC EQU CYREG_PRT4_PC5
+SCSI_Noise__1__PORT EQU 4
+SCSI_Noise__1__PRT EQU CYREG_PRT4_PRT
+SCSI_Noise__1__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
+SCSI_Noise__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
+SCSI_Noise__1__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
+SCSI_Noise__1__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
+SCSI_Noise__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
+SCSI_Noise__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
+SCSI_Noise__1__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
+SCSI_Noise__1__PS EQU CYREG_PRT4_PS
+SCSI_Noise__1__SHIFT EQU 5
+SCSI_Noise__1__SLW EQU CYREG_PRT4_SLW
+SCSI_Noise__2__AG EQU CYREG_PRT0_AG
+SCSI_Noise__2__AMUX EQU CYREG_PRT0_AMUX
+SCSI_Noise__2__BIE EQU CYREG_PRT0_BIE
+SCSI_Noise__2__BIT_MASK EQU CYREG_PRT0_BIT_MASK
+SCSI_Noise__2__BYP EQU CYREG_PRT0_BYP
+SCSI_Noise__2__CTL EQU CYREG_PRT0_CTL
+SCSI_Noise__2__DM0 EQU CYREG_PRT0_DM0
+SCSI_Noise__2__DM1 EQU CYREG_PRT0_DM1
+SCSI_Noise__2__DM2 EQU CYREG_PRT0_DM2
+SCSI_Noise__2__DR EQU CYREG_PRT0_DR
+SCSI_Noise__2__INP_DIS EQU CYREG_PRT0_INP_DIS
+SCSI_Noise__2__INTTYPE EQU CYREG_PICU0_INTTYPE2
+SCSI_Noise__2__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
+SCSI_Noise__2__LCD_EN EQU CYREG_PRT0_LCD_EN
+SCSI_Noise__2__MASK EQU 0x04
+SCSI_Noise__2__PC EQU CYREG_PRT0_PC2
+SCSI_Noise__2__PORT EQU 0
+SCSI_Noise__2__PRT EQU CYREG_PRT0_PRT
+SCSI_Noise__2__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
+SCSI_Noise__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
+SCSI_Noise__2__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
+SCSI_Noise__2__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
+SCSI_Noise__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
+SCSI_Noise__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
+SCSI_Noise__2__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
+SCSI_Noise__2__PS EQU CYREG_PRT0_PS
+SCSI_Noise__2__SHIFT EQU 2
+SCSI_Noise__2__SLW EQU CYREG_PRT0_SLW
+SCSI_Noise__3__AG EQU CYREG_PRT0_AG
+SCSI_Noise__3__AMUX EQU CYREG_PRT0_AMUX
+SCSI_Noise__3__BIE EQU CYREG_PRT0_BIE
+SCSI_Noise__3__BIT_MASK EQU CYREG_PRT0_BIT_MASK
+SCSI_Noise__3__BYP EQU CYREG_PRT0_BYP
+SCSI_Noise__3__CTL EQU CYREG_PRT0_CTL
+SCSI_Noise__3__DM0 EQU CYREG_PRT0_DM0
+SCSI_Noise__3__DM1 EQU CYREG_PRT0_DM1
+SCSI_Noise__3__DM2 EQU CYREG_PRT0_DM2
+SCSI_Noise__3__DR EQU CYREG_PRT0_DR
+SCSI_Noise__3__INP_DIS EQU CYREG_PRT0_INP_DIS
+SCSI_Noise__3__INTTYPE EQU CYREG_PICU0_INTTYPE6
+SCSI_Noise__3__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
+SCSI_Noise__3__LCD_EN EQU CYREG_PRT0_LCD_EN
+SCSI_Noise__3__MASK EQU 0x40
+SCSI_Noise__3__PC EQU CYREG_PRT0_PC6
+SCSI_Noise__3__PORT EQU 0
+SCSI_Noise__3__PRT EQU CYREG_PRT0_PRT
+SCSI_Noise__3__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
+SCSI_Noise__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
+SCSI_Noise__3__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
+SCSI_Noise__3__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
+SCSI_Noise__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
+SCSI_Noise__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
+SCSI_Noise__3__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
+SCSI_Noise__3__PS EQU CYREG_PRT0_PS
+SCSI_Noise__3__SHIFT EQU 6
+SCSI_Noise__3__SLW EQU CYREG_PRT0_SLW
+SCSI_Noise__4__AG EQU CYREG_PRT4_AG
+SCSI_Noise__4__AMUX EQU CYREG_PRT4_AMUX
+SCSI_Noise__4__BIE EQU CYREG_PRT4_BIE
+SCSI_Noise__4__BIT_MASK EQU CYREG_PRT4_BIT_MASK
+SCSI_Noise__4__BYP EQU CYREG_PRT4_BYP
+SCSI_Noise__4__CTL EQU CYREG_PRT4_CTL
+SCSI_Noise__4__DM0 EQU CYREG_PRT4_DM0
+SCSI_Noise__4__DM1 EQU CYREG_PRT4_DM1
+SCSI_Noise__4__DM2 EQU CYREG_PRT4_DM2
+SCSI_Noise__4__DR EQU CYREG_PRT4_DR
+SCSI_Noise__4__INP_DIS EQU CYREG_PRT4_INP_DIS
+SCSI_Noise__4__INTTYPE EQU CYREG_PICU4_INTTYPE3
+SCSI_Noise__4__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
+SCSI_Noise__4__LCD_EN EQU CYREG_PRT4_LCD_EN
+SCSI_Noise__4__MASK EQU 0x08
+SCSI_Noise__4__PC EQU CYREG_PRT4_PC3
+SCSI_Noise__4__PORT EQU 4
+SCSI_Noise__4__PRT EQU CYREG_PRT4_PRT
+SCSI_Noise__4__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
+SCSI_Noise__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
+SCSI_Noise__4__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
+SCSI_Noise__4__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
+SCSI_Noise__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
+SCSI_Noise__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
+SCSI_Noise__4__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
+SCSI_Noise__4__PS EQU CYREG_PRT4_PS
+SCSI_Noise__4__SHIFT EQU 3
+SCSI_Noise__4__SLW EQU CYREG_PRT4_SLW
+SCSI_Noise__ACK__AG EQU CYREG_PRT4_AG
+SCSI_Noise__ACK__AMUX EQU CYREG_PRT4_AMUX
+SCSI_Noise__ACK__BIE EQU CYREG_PRT4_BIE
+SCSI_Noise__ACK__BIT_MASK EQU CYREG_PRT4_BIT_MASK
+SCSI_Noise__ACK__BYP EQU CYREG_PRT4_BYP
+SCSI_Noise__ACK__CTL EQU CYREG_PRT4_CTL
+SCSI_Noise__ACK__DM0 EQU CYREG_PRT4_DM0
+SCSI_Noise__ACK__DM1 EQU CYREG_PRT4_DM1
+SCSI_Noise__ACK__DM2 EQU CYREG_PRT4_DM2
+SCSI_Noise__ACK__DR EQU CYREG_PRT4_DR
+SCSI_Noise__ACK__INP_DIS EQU CYREG_PRT4_INP_DIS
+SCSI_Noise__ACK__INTTYPE EQU CYREG_PICU4_INTTYPE3
+SCSI_Noise__ACK__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
+SCSI_Noise__ACK__LCD_EN EQU CYREG_PRT4_LCD_EN
+SCSI_Noise__ACK__MASK EQU 0x08
+SCSI_Noise__ACK__PC EQU CYREG_PRT4_PC3
+SCSI_Noise__ACK__PORT EQU 4
+SCSI_Noise__ACK__PRT EQU CYREG_PRT4_PRT
+SCSI_Noise__ACK__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
+SCSI_Noise__ACK__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
+SCSI_Noise__ACK__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
+SCSI_Noise__ACK__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
+SCSI_Noise__ACK__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
+SCSI_Noise__ACK__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
+SCSI_Noise__ACK__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
+SCSI_Noise__ACK__PS EQU CYREG_PRT4_PS
+SCSI_Noise__ACK__SHIFT EQU 3
+SCSI_Noise__ACK__SLW EQU CYREG_PRT4_SLW
+SCSI_Noise__ATN__AG EQU CYREG_PRT4_AG
+SCSI_Noise__ATN__AMUX EQU CYREG_PRT4_AMUX
+SCSI_Noise__ATN__BIE EQU CYREG_PRT4_BIE
+SCSI_Noise__ATN__BIT_MASK EQU CYREG_PRT4_BIT_MASK
+SCSI_Noise__ATN__BYP EQU CYREG_PRT4_BYP
+SCSI_Noise__ATN__CTL EQU CYREG_PRT4_CTL
+SCSI_Noise__ATN__DM0 EQU CYREG_PRT4_DM0
+SCSI_Noise__ATN__DM1 EQU CYREG_PRT4_DM1
+SCSI_Noise__ATN__DM2 EQU CYREG_PRT4_DM2
+SCSI_Noise__ATN__DR EQU CYREG_PRT4_DR
+SCSI_Noise__ATN__INP_DIS EQU CYREG_PRT4_INP_DIS
+SCSI_Noise__ATN__INTTYPE EQU CYREG_PICU4_INTTYPE7
+SCSI_Noise__ATN__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
+SCSI_Noise__ATN__LCD_EN EQU CYREG_PRT4_LCD_EN
+SCSI_Noise__ATN__MASK EQU 0x80
+SCSI_Noise__ATN__PC EQU CYREG_PRT4_PC7
+SCSI_Noise__ATN__PORT EQU 4
+SCSI_Noise__ATN__PRT EQU CYREG_PRT4_PRT
+SCSI_Noise__ATN__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
+SCSI_Noise__ATN__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
+SCSI_Noise__ATN__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
+SCSI_Noise__ATN__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
+SCSI_Noise__ATN__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
+SCSI_Noise__ATN__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
+SCSI_Noise__ATN__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
+SCSI_Noise__ATN__PS EQU CYREG_PRT4_PS
+SCSI_Noise__ATN__SHIFT EQU 7
+SCSI_Noise__ATN__SLW EQU CYREG_PRT4_SLW
+SCSI_Noise__BSY__AG EQU CYREG_PRT4_AG
+SCSI_Noise__BSY__AMUX EQU CYREG_PRT4_AMUX
+SCSI_Noise__BSY__BIE EQU CYREG_PRT4_BIE
+SCSI_Noise__BSY__BIT_MASK EQU CYREG_PRT4_BIT_MASK
+SCSI_Noise__BSY__BYP EQU CYREG_PRT4_BYP
+SCSI_Noise__BSY__CTL EQU CYREG_PRT4_CTL
+SCSI_Noise__BSY__DM0 EQU CYREG_PRT4_DM0
+SCSI_Noise__BSY__DM1 EQU CYREG_PRT4_DM1
+SCSI_Noise__BSY__DM2 EQU CYREG_PRT4_DM2
+SCSI_Noise__BSY__DR EQU CYREG_PRT4_DR
+SCSI_Noise__BSY__INP_DIS EQU CYREG_PRT4_INP_DIS
+SCSI_Noise__BSY__INTTYPE EQU CYREG_PICU4_INTTYPE5
+SCSI_Noise__BSY__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
+SCSI_Noise__BSY__LCD_EN EQU CYREG_PRT4_LCD_EN
+SCSI_Noise__BSY__MASK EQU 0x20
+SCSI_Noise__BSY__PC EQU CYREG_PRT4_PC5
+SCSI_Noise__BSY__PORT EQU 4
+SCSI_Noise__BSY__PRT EQU CYREG_PRT4_PRT
+SCSI_Noise__BSY__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
+SCSI_Noise__BSY__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
+SCSI_Noise__BSY__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
+SCSI_Noise__BSY__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
+SCSI_Noise__BSY__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
+SCSI_Noise__BSY__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
+SCSI_Noise__BSY__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
+SCSI_Noise__BSY__PS EQU CYREG_PRT4_PS
+SCSI_Noise__BSY__SHIFT EQU 5
+SCSI_Noise__BSY__SLW EQU CYREG_PRT4_SLW
+SCSI_Noise__RST__AG EQU CYREG_PRT0_AG
+SCSI_Noise__RST__AMUX EQU CYREG_PRT0_AMUX
+SCSI_Noise__RST__BIE EQU CYREG_PRT0_BIE
+SCSI_Noise__RST__BIT_MASK EQU CYREG_PRT0_BIT_MASK
+SCSI_Noise__RST__BYP EQU CYREG_PRT0_BYP
+SCSI_Noise__RST__CTL EQU CYREG_PRT0_CTL
+SCSI_Noise__RST__DM0 EQU CYREG_PRT0_DM0
+SCSI_Noise__RST__DM1 EQU CYREG_PRT0_DM1
+SCSI_Noise__RST__DM2 EQU CYREG_PRT0_DM2
+SCSI_Noise__RST__DR EQU CYREG_PRT0_DR
+SCSI_Noise__RST__INP_DIS EQU CYREG_PRT0_INP_DIS
+SCSI_Noise__RST__INTTYPE EQU CYREG_PICU0_INTTYPE6
+SCSI_Noise__RST__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
+SCSI_Noise__RST__LCD_EN EQU CYREG_PRT0_LCD_EN
+SCSI_Noise__RST__MASK EQU 0x40
+SCSI_Noise__RST__PC EQU CYREG_PRT0_PC6
+SCSI_Noise__RST__PORT EQU 0
+SCSI_Noise__RST__PRT EQU CYREG_PRT0_PRT
+SCSI_Noise__RST__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
+SCSI_Noise__RST__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
+SCSI_Noise__RST__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
+SCSI_Noise__RST__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
+SCSI_Noise__RST__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
+SCSI_Noise__RST__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
+SCSI_Noise__RST__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
+SCSI_Noise__RST__PS EQU CYREG_PRT0_PS
+SCSI_Noise__RST__SHIFT EQU 6
+SCSI_Noise__RST__SLW EQU CYREG_PRT0_SLW
+SCSI_Noise__SEL__AG EQU CYREG_PRT0_AG
+SCSI_Noise__SEL__AMUX EQU CYREG_PRT0_AMUX
+SCSI_Noise__SEL__BIE EQU CYREG_PRT0_BIE
+SCSI_Noise__SEL__BIT_MASK EQU CYREG_PRT0_BIT_MASK
+SCSI_Noise__SEL__BYP EQU CYREG_PRT0_BYP
+SCSI_Noise__SEL__CTL EQU CYREG_PRT0_CTL
+SCSI_Noise__SEL__DM0 EQU CYREG_PRT0_DM0
+SCSI_Noise__SEL__DM1 EQU CYREG_PRT0_DM1
+SCSI_Noise__SEL__DM2 EQU CYREG_PRT0_DM2
+SCSI_Noise__SEL__DR EQU CYREG_PRT0_DR
+SCSI_Noise__SEL__INP_DIS EQU CYREG_PRT0_INP_DIS
+SCSI_Noise__SEL__INTTYPE EQU CYREG_PICU0_INTTYPE2
+SCSI_Noise__SEL__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
+SCSI_Noise__SEL__LCD_EN EQU CYREG_PRT0_LCD_EN
+SCSI_Noise__SEL__MASK EQU 0x04
+SCSI_Noise__SEL__PC EQU CYREG_PRT0_PC2
+SCSI_Noise__SEL__PORT EQU 0
+SCSI_Noise__SEL__PRT EQU CYREG_PRT0_PRT
+SCSI_Noise__SEL__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
+SCSI_Noise__SEL__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
+SCSI_Noise__SEL__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
+SCSI_Noise__SEL__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
+SCSI_Noise__SEL__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
+SCSI_Noise__SEL__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
+SCSI_Noise__SEL__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
+SCSI_Noise__SEL__PS EQU CYREG_PRT0_PS
+SCSI_Noise__SEL__SHIFT EQU 2
+SCSI_Noise__SEL__SLW EQU CYREG_PRT0_SLW
+
/* scsiTarget */
scsiTarget_datapath__16BIT_A0_REG EQU CYREG_B0_UDB00_01_A0
scsiTarget_datapath__16BIT_A1_REG EQU CYREG_B0_UDB00_01_A1
scsiTarget_StatusReg__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB15_ACTL
scsiTarget_StatusReg__STATUS_REG EQU CYREG_B0_UDB15_ST
+/* Debug_Timer */
+Debug_Timer_Interrupt__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0
+Debug_Timer_Interrupt__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0
+Debug_Timer_Interrupt__INTC_MASK EQU 0x01
+Debug_Timer_Interrupt__INTC_NUMBER EQU 0
+Debug_Timer_Interrupt__INTC_PRIOR_NUM EQU 7
+Debug_Timer_Interrupt__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_0
+Debug_Timer_Interrupt__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0
+Debug_Timer_Interrupt__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0
+Debug_Timer_TimerHW__CAP0 EQU CYREG_TMR0_CAP0
+Debug_Timer_TimerHW__CAP1 EQU CYREG_TMR0_CAP1
+Debug_Timer_TimerHW__CFG0 EQU CYREG_TMR0_CFG0
+Debug_Timer_TimerHW__CFG1 EQU CYREG_TMR0_CFG1
+Debug_Timer_TimerHW__CFG2 EQU CYREG_TMR0_CFG2
+Debug_Timer_TimerHW__CNT_CMP0 EQU CYREG_TMR0_CNT_CMP0
+Debug_Timer_TimerHW__CNT_CMP1 EQU CYREG_TMR0_CNT_CMP1
+Debug_Timer_TimerHW__PER0 EQU CYREG_TMR0_PER0
+Debug_Timer_TimerHW__PER1 EQU CYREG_TMR0_PER1
+Debug_Timer_TimerHW__PM_ACT_CFG EQU CYREG_PM_ACT_CFG3
+Debug_Timer_TimerHW__PM_ACT_MSK EQU 0x01
+Debug_Timer_TimerHW__PM_STBY_CFG EQU CYREG_PM_STBY_CFG3
+Debug_Timer_TimerHW__PM_STBY_MSK EQU 0x01
+Debug_Timer_TimerHW__RT0 EQU CYREG_TMR0_RT0
+Debug_Timer_TimerHW__RT1 EQU CYREG_TMR0_RT1
+Debug_Timer_TimerHW__SR0 EQU CYREG_TMR0_SR0
+
+/* SCSI_RX_DMA */
+SCSI_RX_DMA__DRQ_CTL EQU CYREG_IDMUX_DRQ_CTL0
+SCSI_RX_DMA__DRQ_NUMBER EQU 0
+SCSI_RX_DMA__NUMBEROF_TDS EQU 0
+SCSI_RX_DMA__PRIORITY EQU 2
+SCSI_RX_DMA__TERMIN_EN EQU 0
+SCSI_RX_DMA__TERMIN_SEL EQU 0
+SCSI_RX_DMA__TERMOUT0_EN EQU 1
+SCSI_RX_DMA__TERMOUT0_SEL EQU 0
+SCSI_RX_DMA__TERMOUT1_EN EQU 0
+SCSI_RX_DMA__TERMOUT1_SEL EQU 0
+SCSI_RX_DMA_COMPLETE__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0
+SCSI_RX_DMA_COMPLETE__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0
+SCSI_RX_DMA_COMPLETE__INTC_MASK EQU 0x04
+SCSI_RX_DMA_COMPLETE__INTC_NUMBER EQU 2
+SCSI_RX_DMA_COMPLETE__INTC_PRIOR_NUM EQU 7
+SCSI_RX_DMA_COMPLETE__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_2
+SCSI_RX_DMA_COMPLETE__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0
+SCSI_RX_DMA_COMPLETE__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0
+
+/* SCSI_TX_DMA */
+SCSI_TX_DMA__DRQ_CTL EQU CYREG_IDMUX_DRQ_CTL0
+SCSI_TX_DMA__DRQ_NUMBER EQU 1
+SCSI_TX_DMA__NUMBEROF_TDS EQU 0
+SCSI_TX_DMA__PRIORITY EQU 2
+SCSI_TX_DMA__TERMIN_EN EQU 0
+SCSI_TX_DMA__TERMIN_SEL EQU 0
+SCSI_TX_DMA__TERMOUT0_EN EQU 1
+SCSI_TX_DMA__TERMOUT0_SEL EQU 1
+SCSI_TX_DMA__TERMOUT1_EN EQU 0
+SCSI_TX_DMA__TERMOUT1_SEL EQU 0
+SCSI_TX_DMA_COMPLETE__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0
+SCSI_TX_DMA_COMPLETE__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0
+SCSI_TX_DMA_COMPLETE__INTC_MASK EQU 0x10
+SCSI_TX_DMA_COMPLETE__INTC_NUMBER EQU 4
+SCSI_TX_DMA_COMPLETE__INTC_PRIOR_NUM EQU 7
+SCSI_TX_DMA_COMPLETE__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_4
+SCSI_TX_DMA_COMPLETE__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0
+SCSI_TX_DMA_COMPLETE__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0
+
+/* SD_Data_Clk */
+SD_Data_Clk__CFG0 EQU CYREG_CLKDIST_DCFG0_CFG0
+SD_Data_Clk__CFG1 EQU CYREG_CLKDIST_DCFG0_CFG1
+SD_Data_Clk__CFG2 EQU CYREG_CLKDIST_DCFG0_CFG2
+SD_Data_Clk__CFG2_SRC_SEL_MASK EQU 0x07
+SD_Data_Clk__INDEX EQU 0x00
+SD_Data_Clk__PM_ACT_CFG EQU CYREG_PM_ACT_CFG2
+SD_Data_Clk__PM_ACT_MSK EQU 0x01
+SD_Data_Clk__PM_STBY_CFG EQU CYREG_PM_STBY_CFG2
+SD_Data_Clk__PM_STBY_MSK EQU 0x01
+
/* timer_clock */
timer_clock__CFG0 EQU CYREG_CLKDIST_DCFG2_CFG0
timer_clock__CFG1 EQU CYREG_CLKDIST_DCFG2_CFG1
timer_clock__PM_STBY_CFG EQU CYREG_PM_STBY_CFG2
timer_clock__PM_STBY_MSK EQU 0x04
+/* SCSI_RST_ISR */
+SCSI_RST_ISR__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0
+SCSI_RST_ISR__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0
+SCSI_RST_ISR__INTC_MASK EQU 0x02
+SCSI_RST_ISR__INTC_NUMBER EQU 1
+SCSI_RST_ISR__INTC_PRIOR_NUM EQU 7
+SCSI_RST_ISR__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_1
+SCSI_RST_ISR__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0
+SCSI_RST_ISR__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0
+
+/* SCSI_SEL_ISR */
+SCSI_SEL_ISR__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0
+SCSI_SEL_ISR__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0
+SCSI_SEL_ISR__INTC_MASK EQU 0x08
+SCSI_SEL_ISR__INTC_NUMBER EQU 3
+SCSI_SEL_ISR__INTC_PRIOR_NUM EQU 7
+SCSI_SEL_ISR__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_3
+SCSI_SEL_ISR__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0
+SCSI_SEL_ISR__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0
+
+/* SCSI_Filtered */
+SCSI_Filtered_sts_sts_reg__0__MASK EQU 0x01
+SCSI_Filtered_sts_sts_reg__0__POS EQU 0
+SCSI_Filtered_sts_sts_reg__1__MASK EQU 0x02
+SCSI_Filtered_sts_sts_reg__1__POS EQU 1
+SCSI_Filtered_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB11_12_ACTL
+SCSI_Filtered_sts_sts_reg__16BIT_STATUS_REG EQU CYREG_B0_UDB11_12_ST
+SCSI_Filtered_sts_sts_reg__2__MASK EQU 0x04
+SCSI_Filtered_sts_sts_reg__2__POS EQU 2
+SCSI_Filtered_sts_sts_reg__3__MASK EQU 0x08
+SCSI_Filtered_sts_sts_reg__3__POS EQU 3
+SCSI_Filtered_sts_sts_reg__4__MASK EQU 0x10
+SCSI_Filtered_sts_sts_reg__4__POS EQU 4
+SCSI_Filtered_sts_sts_reg__MASK EQU 0x1F
+SCSI_Filtered_sts_sts_reg__MASK_REG EQU CYREG_B0_UDB11_MSK
+SCSI_Filtered_sts_sts_reg__MASK_ST_AUX_CTL_REG EQU CYREG_B0_UDB11_MSK_ACTL
+SCSI_Filtered_sts_sts_reg__PER_ST_AUX_CTL_REG EQU CYREG_B0_UDB11_MSK_ACTL
+SCSI_Filtered_sts_sts_reg__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB11_ACTL
+SCSI_Filtered_sts_sts_reg__STATUS_CNT_REG EQU CYREG_B0_UDB11_ST_CTL
+SCSI_Filtered_sts_sts_reg__STATUS_CONTROL_REG EQU CYREG_B0_UDB11_ST_CTL
+SCSI_Filtered_sts_sts_reg__STATUS_REG EQU CYREG_B0_UDB11_ST
+
+/* SCSI_CTL_PHASE */
+SCSI_CTL_PHASE_Sync_ctrl_reg__0__MASK EQU 0x01
+SCSI_CTL_PHASE_Sync_ctrl_reg__0__POS EQU 0
+SCSI_CTL_PHASE_Sync_ctrl_reg__1__MASK EQU 0x02
+SCSI_CTL_PHASE_Sync_ctrl_reg__1__POS EQU 1
+SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB02_03_ACTL
+SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB02_03_CTL
+SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB02_03_CTL
+SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB02_03_CTL
+SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB02_03_CTL
+SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB02_03_MSK
+SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB02_03_MSK
+SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB02_03_MSK
+SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB02_03_MSK
+SCSI_CTL_PHASE_Sync_ctrl_reg__2__MASK EQU 0x04
+SCSI_CTL_PHASE_Sync_ctrl_reg__2__POS EQU 2
+SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB02_ACTL
+SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB02_CTL
+SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB02_ST_CTL
+SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB02_CTL
+SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB02_ST_CTL
+SCSI_CTL_PHASE_Sync_ctrl_reg__MASK EQU 0x07
+SCSI_CTL_PHASE_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB02_MSK_ACTL
+SCSI_CTL_PHASE_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB02_MSK_ACTL
+SCSI_CTL_PHASE_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB02_MSK
+
+/* SCSI_Glitch_Ctl */
+SCSI_Glitch_Ctl_Sync_ctrl_reg__0__MASK EQU 0x01
+SCSI_Glitch_Ctl_Sync_ctrl_reg__0__POS EQU 0
+SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB05_06_ACTL
+SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB05_06_CTL
+SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB05_06_CTL
+SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB05_06_CTL
+SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB05_06_CTL
+SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB05_06_MSK
+SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB05_06_MSK
+SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB05_06_MSK
+SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB05_06_MSK
+SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB05_ACTL
+SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB05_CTL
+SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB05_ST_CTL
+SCSI_Glitch_Ctl_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB05_CTL
+SCSI_Glitch_Ctl_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB05_ST_CTL
+SCSI_Glitch_Ctl_Sync_ctrl_reg__MASK EQU 0x01
+SCSI_Glitch_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB05_MSK_ACTL
+SCSI_Glitch_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB05_MSK_ACTL
+SCSI_Glitch_Ctl_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB05_MSK
+
+/* SCSI_Parity_Error */
+SCSI_Parity_Error_sts_sts_reg__0__MASK EQU 0x01
+SCSI_Parity_Error_sts_sts_reg__0__POS EQU 0
+SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB02_03_ACTL
+SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_REG EQU CYREG_B0_UDB02_03_ST
+SCSI_Parity_Error_sts_sts_reg__MASK EQU 0x01
+SCSI_Parity_Error_sts_sts_reg__MASK_REG EQU CYREG_B0_UDB02_MSK
+SCSI_Parity_Error_sts_sts_reg__MASK_ST_AUX_CTL_REG EQU CYREG_B0_UDB02_MSK_ACTL
+SCSI_Parity_Error_sts_sts_reg__PER_ST_AUX_CTL_REG EQU CYREG_B0_UDB02_MSK_ACTL
+SCSI_Parity_Error_sts_sts_reg__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB02_ACTL
+SCSI_Parity_Error_sts_sts_reg__STATUS_CNT_REG EQU CYREG_B0_UDB02_ST_CTL
+SCSI_Parity_Error_sts_sts_reg__STATUS_CONTROL_REG EQU CYREG_B0_UDB02_ST_CTL
+SCSI_Parity_Error_sts_sts_reg__STATUS_REG EQU CYREG_B0_UDB02_ST
+
/* Miscellaneous */
BCLK__BUS_CLK__HZ EQU 50000000
BCLK__BUS_CLK__KHZ EQU 50000
BCLK__BUS_CLK__MHZ EQU 50
CYDEV_CHIP_DIE_LEOPARD EQU 1
-CYDEV_CHIP_DIE_PSOC4A EQU 16
+CYDEV_CHIP_DIE_PSOC4A EQU 18
CYDEV_CHIP_DIE_PSOC5LP EQU 2
CYDEV_CHIP_DIE_PSOC5TM EQU 3
CYDEV_CHIP_DIE_TMA4 EQU 4
CYDEV_CHIP_FAMILY_USED EQU CYDEV_CHIP_FAMILY_PSOC5
CYDEV_CHIP_JTAG_ID EQU 0x2E133069
CYDEV_CHIP_MEMBER_3A EQU 1
-CYDEV_CHIP_MEMBER_4A EQU 16
-CYDEV_CHIP_MEMBER_4D EQU 12
+CYDEV_CHIP_MEMBER_4A EQU 18
+CYDEV_CHIP_MEMBER_4D EQU 13
CYDEV_CHIP_MEMBER_4E EQU 6
-CYDEV_CHIP_MEMBER_4F EQU 17
+CYDEV_CHIP_MEMBER_4F EQU 19
CYDEV_CHIP_MEMBER_4G EQU 4
-CYDEV_CHIP_MEMBER_4H EQU 15
-CYDEV_CHIP_MEMBER_4I EQU 21
-CYDEV_CHIP_MEMBER_4J EQU 13
-CYDEV_CHIP_MEMBER_4K EQU 14
-CYDEV_CHIP_MEMBER_4L EQU 20
-CYDEV_CHIP_MEMBER_4M EQU 19
-CYDEV_CHIP_MEMBER_4N EQU 9
+CYDEV_CHIP_MEMBER_4H EQU 17
+CYDEV_CHIP_MEMBER_4I EQU 23
+CYDEV_CHIP_MEMBER_4J EQU 14
+CYDEV_CHIP_MEMBER_4K EQU 15
+CYDEV_CHIP_MEMBER_4L EQU 22
+CYDEV_CHIP_MEMBER_4M EQU 21
+CYDEV_CHIP_MEMBER_4N EQU 10
CYDEV_CHIP_MEMBER_4O EQU 7
-CYDEV_CHIP_MEMBER_4P EQU 18
-CYDEV_CHIP_MEMBER_4Q EQU 11
+CYDEV_CHIP_MEMBER_4P EQU 20
+CYDEV_CHIP_MEMBER_4Q EQU 12
CYDEV_CHIP_MEMBER_4R EQU 8
-CYDEV_CHIP_MEMBER_4S EQU 10
+CYDEV_CHIP_MEMBER_4S EQU 11
+CYDEV_CHIP_MEMBER_4T EQU 9
CYDEV_CHIP_MEMBER_4U EQU 5
+CYDEV_CHIP_MEMBER_4V EQU 16
CYDEV_CHIP_MEMBER_5A EQU 3
CYDEV_CHIP_MEMBER_5B EQU 2
-CYDEV_CHIP_MEMBER_6A EQU 22
-CYDEV_CHIP_MEMBER_FM3 EQU 26
-CYDEV_CHIP_MEMBER_FM4 EQU 27
-CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE1 EQU 23
-CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE2 EQU 24
-CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE3 EQU 25
+CYDEV_CHIP_MEMBER_6A EQU 24
+CYDEV_CHIP_MEMBER_FM3 EQU 28
+CYDEV_CHIP_MEMBER_FM4 EQU 29
+CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE1 EQU 25
+CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE2 EQU 26
+CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE3 EQU 27
CYDEV_CHIP_MEMBER_UNKNOWN EQU 0
CYDEV_CHIP_MEMBER_USED EQU CYDEV_CHIP_MEMBER_5B
CYDEV_CHIP_DIE_EXPECT EQU CYDEV_CHIP_MEMBER_USED
CYDEV_CHIP_REVISION_4A_ES0 EQU 17
CYDEV_CHIP_REVISION_4A_PRODUCTION EQU 17
CYDEV_CHIP_REVISION_4D_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_4E_CCG2_NO_USBPD EQU 0
CYDEV_CHIP_REVISION_4E_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4F_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4F_PRODUCTION_256DMA EQU 0
CYDEV_CHIP_REVISION_4Q_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4R_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4S_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_4T_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4U_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_4V_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_5A_ES0 EQU 0
CYDEV_CHIP_REVISION_5A_ES1 EQU 1
CYDEV_CHIP_REVISION_5A_PRODUCTION EQU 1
CYDEV_CHIP_REVISION_5B_ES0 EQU 0
CYDEV_CHIP_REVISION_5B_PRODUCTION EQU 0
-CYDEV_CHIP_REVISION_6A_NO_UDB EQU 0
-CYDEV_CHIP_REVISION_6A_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_6A_ES EQU 17
+CYDEV_CHIP_REVISION_6A_NO_UDB EQU 33
+CYDEV_CHIP_REVISION_6A_PRODUCTION EQU 33
CYDEV_CHIP_REVISION_FM3_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_FM4_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_PDL_FM0P_TYPE1_PRODUCTION EQU 0
;
; File Name: cyfitterrv.inc
;
-; PSoC Creator 4.1
+; PSoC Creator 4.2
;
; Description:
;
;
;-------------------------------------------------------------------------------
-; Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.
+; Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
; You may use this file only in accordance with the license, terms, conditions,
; disclaimers, and limitations in the end user license agreement accompanying
; the software package with which this file was provided.
GET cydevicerv.inc
GET cydevicerv_trm.inc
-; Debug_Timer_Interrupt
-Debug_Timer_Interrupt__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0
-Debug_Timer_Interrupt__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0
-Debug_Timer_Interrupt__INTC_MASK EQU 0x01
-Debug_Timer_Interrupt__INTC_NUMBER EQU 0
-Debug_Timer_Interrupt__INTC_PRIOR_NUM EQU 7
-Debug_Timer_Interrupt__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_0
-Debug_Timer_Interrupt__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0
-Debug_Timer_Interrupt__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0
-
-; Debug_Timer_TimerHW
-Debug_Timer_TimerHW__CAP0 EQU CYREG_TMR0_CAP0
-Debug_Timer_TimerHW__CAP1 EQU CYREG_TMR0_CAP1
-Debug_Timer_TimerHW__CFG0 EQU CYREG_TMR0_CFG0
-Debug_Timer_TimerHW__CFG1 EQU CYREG_TMR0_CFG1
-Debug_Timer_TimerHW__CFG2 EQU CYREG_TMR0_CFG2
-Debug_Timer_TimerHW__CNT_CMP0 EQU CYREG_TMR0_CNT_CMP0
-Debug_Timer_TimerHW__CNT_CMP1 EQU CYREG_TMR0_CNT_CMP1
-Debug_Timer_TimerHW__PER0 EQU CYREG_TMR0_PER0
-Debug_Timer_TimerHW__PER1 EQU CYREG_TMR0_PER1
-Debug_Timer_TimerHW__PM_ACT_CFG EQU CYREG_PM_ACT_CFG3
-Debug_Timer_TimerHW__PM_ACT_MSK EQU 0x01
-Debug_Timer_TimerHW__PM_STBY_CFG EQU CYREG_PM_STBY_CFG3
-Debug_Timer_TimerHW__PM_STBY_MSK EQU 0x01
-Debug_Timer_TimerHW__RT0 EQU CYREG_TMR0_RT0
-Debug_Timer_TimerHW__RT1 EQU CYREG_TMR0_RT1
-Debug_Timer_TimerHW__SR0 EQU CYREG_TMR0_SR0
-
; LED1
LED1__0__INTTYPE EQU CYREG_PICU12_INTTYPE0
LED1__0__MASK EQU 0x01
LED1__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ
LED1__SLW EQU CYREG_PRT12_SLW
-; SCSI_CLK
-SCSI_CLK__CFG0 EQU CYREG_CLKDIST_DCFG1_CFG0
-SCSI_CLK__CFG1 EQU CYREG_CLKDIST_DCFG1_CFG1
-SCSI_CLK__CFG2 EQU CYREG_CLKDIST_DCFG1_CFG2
-SCSI_CLK__CFG2_SRC_SEL_MASK EQU 0x07
-SCSI_CLK__INDEX EQU 0x01
-SCSI_CLK__PM_ACT_CFG EQU CYREG_PM_ACT_CFG2
-SCSI_CLK__PM_ACT_MSK EQU 0x02
-SCSI_CLK__PM_STBY_CFG EQU CYREG_PM_STBY_CFG2
-SCSI_CLK__PM_STBY_MSK EQU 0x02
-
-; SCSI_CTL_PHASE
-SCSI_CTL_PHASE_Sync_ctrl_reg__0__MASK EQU 0x01
-SCSI_CTL_PHASE_Sync_ctrl_reg__0__POS EQU 0
-SCSI_CTL_PHASE_Sync_ctrl_reg__1__MASK EQU 0x02
-SCSI_CTL_PHASE_Sync_ctrl_reg__1__POS EQU 1
-SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB02_03_ACTL
-SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB02_03_CTL
-SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB02_03_CTL
-SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB02_03_CTL
-SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB02_03_CTL
-SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB02_03_MSK
-SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB02_03_MSK
-SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB02_03_MSK
-SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB02_03_MSK
-SCSI_CTL_PHASE_Sync_ctrl_reg__2__MASK EQU 0x04
-SCSI_CTL_PHASE_Sync_ctrl_reg__2__POS EQU 2
-SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB02_ACTL
-SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB02_CTL
-SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB02_ST_CTL
-SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB02_CTL
-SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB02_ST_CTL
-SCSI_CTL_PHASE_Sync_ctrl_reg__MASK EQU 0x07
-SCSI_CTL_PHASE_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB02_MSK_ACTL
-SCSI_CTL_PHASE_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB02_MSK_ACTL
-SCSI_CTL_PHASE_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB02_MSK
-
-; SCSI_Filtered
-SCSI_Filtered_sts_sts_reg__0__MASK EQU 0x01
-SCSI_Filtered_sts_sts_reg__0__POS EQU 0
-SCSI_Filtered_sts_sts_reg__1__MASK EQU 0x02
-SCSI_Filtered_sts_sts_reg__1__POS EQU 1
-SCSI_Filtered_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB11_12_ACTL
-SCSI_Filtered_sts_sts_reg__16BIT_STATUS_REG EQU CYREG_B0_UDB11_12_ST
-SCSI_Filtered_sts_sts_reg__2__MASK EQU 0x04
-SCSI_Filtered_sts_sts_reg__2__POS EQU 2
-SCSI_Filtered_sts_sts_reg__3__MASK EQU 0x08
-SCSI_Filtered_sts_sts_reg__3__POS EQU 3
-SCSI_Filtered_sts_sts_reg__4__MASK EQU 0x10
-SCSI_Filtered_sts_sts_reg__4__POS EQU 4
-SCSI_Filtered_sts_sts_reg__MASK EQU 0x1F
-SCSI_Filtered_sts_sts_reg__MASK_REG EQU CYREG_B0_UDB11_MSK
-SCSI_Filtered_sts_sts_reg__MASK_ST_AUX_CTL_REG EQU CYREG_B0_UDB11_MSK_ACTL
-SCSI_Filtered_sts_sts_reg__PER_ST_AUX_CTL_REG EQU CYREG_B0_UDB11_MSK_ACTL
-SCSI_Filtered_sts_sts_reg__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB11_ACTL
-SCSI_Filtered_sts_sts_reg__STATUS_CNT_REG EQU CYREG_B0_UDB11_ST_CTL
-SCSI_Filtered_sts_sts_reg__STATUS_CONTROL_REG EQU CYREG_B0_UDB11_ST_CTL
-SCSI_Filtered_sts_sts_reg__STATUS_REG EQU CYREG_B0_UDB11_ST
-
-; SCSI_Glitch_Ctl
-SCSI_Glitch_Ctl_Sync_ctrl_reg__0__MASK EQU 0x01
-SCSI_Glitch_Ctl_Sync_ctrl_reg__0__POS EQU 0
-SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB05_06_ACTL
-SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB05_06_CTL
-SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB05_06_CTL
-SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB05_06_CTL
-SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB05_06_CTL
-SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB05_06_MSK
-SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB05_06_MSK
-SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB05_06_MSK
-SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB05_06_MSK
-SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB05_ACTL
-SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB05_CTL
-SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB05_ST_CTL
-SCSI_Glitch_Ctl_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB05_CTL
-SCSI_Glitch_Ctl_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB05_ST_CTL
-SCSI_Glitch_Ctl_Sync_ctrl_reg__MASK EQU 0x01
-SCSI_Glitch_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB05_MSK_ACTL
-SCSI_Glitch_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB05_MSK_ACTL
-SCSI_Glitch_Ctl_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB05_MSK
-
-; SCSI_In
-SCSI_In__0__INTTYPE EQU CYREG_PICU6_INTTYPE1
-SCSI_In__0__MASK EQU 0x02
-SCSI_In__0__PC EQU CYREG_PRT6_PC1
-SCSI_In__0__PORT EQU 6
-SCSI_In__0__SHIFT EQU 1
-SCSI_In__AG EQU CYREG_PRT6_AG
-SCSI_In__AMUX EQU CYREG_PRT6_AMUX
-SCSI_In__BIE EQU CYREG_PRT6_BIE
-SCSI_In__BIT_MASK EQU CYREG_PRT6_BIT_MASK
-SCSI_In__BYP EQU CYREG_PRT6_BYP
-SCSI_In__CTL EQU CYREG_PRT6_CTL
-SCSI_In__DBP__INTTYPE EQU CYREG_PICU6_INTTYPE1
-SCSI_In__DBP__MASK EQU 0x02
-SCSI_In__DBP__PC EQU CYREG_PRT6_PC1
-SCSI_In__DBP__PORT EQU 6
-SCSI_In__DBP__SHIFT EQU 1
-SCSI_In__DM0 EQU CYREG_PRT6_DM0
-SCSI_In__DM1 EQU CYREG_PRT6_DM1
-SCSI_In__DM2 EQU CYREG_PRT6_DM2
-SCSI_In__DR EQU CYREG_PRT6_DR
-SCSI_In__INP_DIS EQU CYREG_PRT6_INP_DIS
-SCSI_In__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU6_BASE
-SCSI_In__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
-SCSI_In__LCD_EN EQU CYREG_PRT6_LCD_EN
-SCSI_In__MASK EQU 0x02
-SCSI_In__PORT EQU 6
-SCSI_In__PRT EQU CYREG_PRT6_PRT
-SCSI_In__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
-SCSI_In__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
-SCSI_In__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
-SCSI_In__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
-SCSI_In__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
-SCSI_In__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
-SCSI_In__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
-SCSI_In__PS EQU CYREG_PRT6_PS
-SCSI_In__SHIFT EQU 1
-SCSI_In__SLW EQU CYREG_PRT6_SLW
-SCSI_In_DBx__0__AG EQU CYREG_PRT6_AG
-SCSI_In_DBx__0__AMUX EQU CYREG_PRT6_AMUX
-SCSI_In_DBx__0__BIE EQU CYREG_PRT6_BIE
-SCSI_In_DBx__0__BIT_MASK EQU CYREG_PRT6_BIT_MASK
-SCSI_In_DBx__0__BYP EQU CYREG_PRT6_BYP
-SCSI_In_DBx__0__CTL EQU CYREG_PRT6_CTL
-SCSI_In_DBx__0__DM0 EQU CYREG_PRT6_DM0
-SCSI_In_DBx__0__DM1 EQU CYREG_PRT6_DM1
-SCSI_In_DBx__0__DM2 EQU CYREG_PRT6_DM2
-SCSI_In_DBx__0__DR EQU CYREG_PRT6_DR
-SCSI_In_DBx__0__INP_DIS EQU CYREG_PRT6_INP_DIS
-SCSI_In_DBx__0__INTTYPE EQU CYREG_PICU6_INTTYPE6
-SCSI_In_DBx__0__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
-SCSI_In_DBx__0__LCD_EN EQU CYREG_PRT6_LCD_EN
-SCSI_In_DBx__0__MASK EQU 0x40
-SCSI_In_DBx__0__PC EQU CYREG_PRT6_PC6
-SCSI_In_DBx__0__PORT EQU 6
-SCSI_In_DBx__0__PRT EQU CYREG_PRT6_PRT
-SCSI_In_DBx__0__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
-SCSI_In_DBx__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
-SCSI_In_DBx__0__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
-SCSI_In_DBx__0__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
-SCSI_In_DBx__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
-SCSI_In_DBx__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
-SCSI_In_DBx__0__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
-SCSI_In_DBx__0__PS EQU CYREG_PRT6_PS
-SCSI_In_DBx__0__SHIFT EQU 6
-SCSI_In_DBx__0__SLW EQU CYREG_PRT6_SLW
-SCSI_In_DBx__1__AG EQU CYREG_PRT6_AG
-SCSI_In_DBx__1__AMUX EQU CYREG_PRT6_AMUX
-SCSI_In_DBx__1__BIE EQU CYREG_PRT6_BIE
-SCSI_In_DBx__1__BIT_MASK EQU CYREG_PRT6_BIT_MASK
-SCSI_In_DBx__1__BYP EQU CYREG_PRT6_BYP
-SCSI_In_DBx__1__CTL EQU CYREG_PRT6_CTL
-SCSI_In_DBx__1__DM0 EQU CYREG_PRT6_DM0
-SCSI_In_DBx__1__DM1 EQU CYREG_PRT6_DM1
-SCSI_In_DBx__1__DM2 EQU CYREG_PRT6_DM2
-SCSI_In_DBx__1__DR EQU CYREG_PRT6_DR
-SCSI_In_DBx__1__INP_DIS EQU CYREG_PRT6_INP_DIS
-SCSI_In_DBx__1__INTTYPE EQU CYREG_PICU6_INTTYPE4
-SCSI_In_DBx__1__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
-SCSI_In_DBx__1__LCD_EN EQU CYREG_PRT6_LCD_EN
-SCSI_In_DBx__1__MASK EQU 0x10
-SCSI_In_DBx__1__PC EQU CYREG_PRT6_PC4
-SCSI_In_DBx__1__PORT EQU 6
-SCSI_In_DBx__1__PRT EQU CYREG_PRT6_PRT
-SCSI_In_DBx__1__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
-SCSI_In_DBx__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
-SCSI_In_DBx__1__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
-SCSI_In_DBx__1__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
-SCSI_In_DBx__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
-SCSI_In_DBx__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
-SCSI_In_DBx__1__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
-SCSI_In_DBx__1__PS EQU CYREG_PRT6_PS
-SCSI_In_DBx__1__SHIFT EQU 4
-SCSI_In_DBx__1__SLW EQU CYREG_PRT6_SLW
-SCSI_In_DBx__2__AG EQU CYREG_PRT12_AG
-SCSI_In_DBx__2__BIE EQU CYREG_PRT12_BIE
-SCSI_In_DBx__2__BIT_MASK EQU CYREG_PRT12_BIT_MASK
-SCSI_In_DBx__2__BYP EQU CYREG_PRT12_BYP
-SCSI_In_DBx__2__DM0 EQU CYREG_PRT12_DM0
-SCSI_In_DBx__2__DM1 EQU CYREG_PRT12_DM1
-SCSI_In_DBx__2__DM2 EQU CYREG_PRT12_DM2
-SCSI_In_DBx__2__DR EQU CYREG_PRT12_DR
-SCSI_In_DBx__2__INP_DIS EQU CYREG_PRT12_INP_DIS
-SCSI_In_DBx__2__INTTYPE EQU CYREG_PICU12_INTTYPE4
-SCSI_In_DBx__2__MASK EQU 0x10
-SCSI_In_DBx__2__PC EQU CYREG_PRT12_PC4
-SCSI_In_DBx__2__PORT EQU 12
-SCSI_In_DBx__2__PRT EQU CYREG_PRT12_PRT
-SCSI_In_DBx__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN
-SCSI_In_DBx__2__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0
-SCSI_In_DBx__2__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1
-SCSI_In_DBx__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0
-SCSI_In_DBx__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1
-SCSI_In_DBx__2__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT
-SCSI_In_DBx__2__PS EQU CYREG_PRT12_PS
-SCSI_In_DBx__2__SHIFT EQU 4
-SCSI_In_DBx__2__SIO_CFG EQU CYREG_PRT12_SIO_CFG
-SCSI_In_DBx__2__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF
-SCSI_In_DBx__2__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN
-SCSI_In_DBx__2__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ
-SCSI_In_DBx__2__SLW EQU CYREG_PRT12_SLW
-SCSI_In_DBx__3__AG EQU CYREG_PRT2_AG
-SCSI_In_DBx__3__AMUX EQU CYREG_PRT2_AMUX
-SCSI_In_DBx__3__BIE EQU CYREG_PRT2_BIE
-SCSI_In_DBx__3__BIT_MASK EQU CYREG_PRT2_BIT_MASK
-SCSI_In_DBx__3__BYP EQU CYREG_PRT2_BYP
-SCSI_In_DBx__3__CTL EQU CYREG_PRT2_CTL
-SCSI_In_DBx__3__DM0 EQU CYREG_PRT2_DM0
-SCSI_In_DBx__3__DM1 EQU CYREG_PRT2_DM1
-SCSI_In_DBx__3__DM2 EQU CYREG_PRT2_DM2
-SCSI_In_DBx__3__DR EQU CYREG_PRT2_DR
-SCSI_In_DBx__3__INP_DIS EQU CYREG_PRT2_INP_DIS
-SCSI_In_DBx__3__INTTYPE EQU CYREG_PICU2_INTTYPE6
-SCSI_In_DBx__3__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
-SCSI_In_DBx__3__LCD_EN EQU CYREG_PRT2_LCD_EN
-SCSI_In_DBx__3__MASK EQU 0x40
-SCSI_In_DBx__3__PC EQU CYREG_PRT2_PC6
-SCSI_In_DBx__3__PORT EQU 2
-SCSI_In_DBx__3__PRT EQU CYREG_PRT2_PRT
-SCSI_In_DBx__3__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
-SCSI_In_DBx__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
-SCSI_In_DBx__3__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
-SCSI_In_DBx__3__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
-SCSI_In_DBx__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
-SCSI_In_DBx__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
-SCSI_In_DBx__3__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
-SCSI_In_DBx__3__PS EQU CYREG_PRT2_PS
-SCSI_In_DBx__3__SHIFT EQU 6
-SCSI_In_DBx__3__SLW EQU CYREG_PRT2_SLW
-SCSI_In_DBx__4__AG EQU CYREG_PRT2_AG
-SCSI_In_DBx__4__AMUX EQU CYREG_PRT2_AMUX
-SCSI_In_DBx__4__BIE EQU CYREG_PRT2_BIE
-SCSI_In_DBx__4__BIT_MASK EQU CYREG_PRT2_BIT_MASK
-SCSI_In_DBx__4__BYP EQU CYREG_PRT2_BYP
-SCSI_In_DBx__4__CTL EQU CYREG_PRT2_CTL
-SCSI_In_DBx__4__DM0 EQU CYREG_PRT2_DM0
-SCSI_In_DBx__4__DM1 EQU CYREG_PRT2_DM1
-SCSI_In_DBx__4__DM2 EQU CYREG_PRT2_DM2
-SCSI_In_DBx__4__DR EQU CYREG_PRT2_DR
-SCSI_In_DBx__4__INP_DIS EQU CYREG_PRT2_INP_DIS
-SCSI_In_DBx__4__INTTYPE EQU CYREG_PICU2_INTTYPE4
-SCSI_In_DBx__4__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
-SCSI_In_DBx__4__LCD_EN EQU CYREG_PRT2_LCD_EN
-SCSI_In_DBx__4__MASK EQU 0x10
-SCSI_In_DBx__4__PC EQU CYREG_PRT2_PC4
-SCSI_In_DBx__4__PORT EQU 2
-SCSI_In_DBx__4__PRT EQU CYREG_PRT2_PRT
-SCSI_In_DBx__4__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
-SCSI_In_DBx__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
-SCSI_In_DBx__4__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
-SCSI_In_DBx__4__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
-SCSI_In_DBx__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
-SCSI_In_DBx__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
-SCSI_In_DBx__4__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
-SCSI_In_DBx__4__PS EQU CYREG_PRT2_PS
-SCSI_In_DBx__4__SHIFT EQU 4
-SCSI_In_DBx__4__SLW EQU CYREG_PRT2_SLW
-SCSI_In_DBx__5__AG EQU CYREG_PRT2_AG
-SCSI_In_DBx__5__AMUX EQU CYREG_PRT2_AMUX
-SCSI_In_DBx__5__BIE EQU CYREG_PRT2_BIE
-SCSI_In_DBx__5__BIT_MASK EQU CYREG_PRT2_BIT_MASK
-SCSI_In_DBx__5__BYP EQU CYREG_PRT2_BYP
-SCSI_In_DBx__5__CTL EQU CYREG_PRT2_CTL
-SCSI_In_DBx__5__DM0 EQU CYREG_PRT2_DM0
-SCSI_In_DBx__5__DM1 EQU CYREG_PRT2_DM1
-SCSI_In_DBx__5__DM2 EQU CYREG_PRT2_DM2
-SCSI_In_DBx__5__DR EQU CYREG_PRT2_DR
-SCSI_In_DBx__5__INP_DIS EQU CYREG_PRT2_INP_DIS
-SCSI_In_DBx__5__INTTYPE EQU CYREG_PICU2_INTTYPE2
-SCSI_In_DBx__5__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
-SCSI_In_DBx__5__LCD_EN EQU CYREG_PRT2_LCD_EN
-SCSI_In_DBx__5__MASK EQU 0x04
-SCSI_In_DBx__5__PC EQU CYREG_PRT2_PC2
-SCSI_In_DBx__5__PORT EQU 2
-SCSI_In_DBx__5__PRT EQU CYREG_PRT2_PRT
-SCSI_In_DBx__5__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
-SCSI_In_DBx__5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
-SCSI_In_DBx__5__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
-SCSI_In_DBx__5__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
-SCSI_In_DBx__5__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
-SCSI_In_DBx__5__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
-SCSI_In_DBx__5__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
-SCSI_In_DBx__5__PS EQU CYREG_PRT2_PS
-SCSI_In_DBx__5__SHIFT EQU 2
-SCSI_In_DBx__5__SLW EQU CYREG_PRT2_SLW
-SCSI_In_DBx__6__AG EQU CYREG_PRT2_AG
-SCSI_In_DBx__6__AMUX EQU CYREG_PRT2_AMUX
-SCSI_In_DBx__6__BIE EQU CYREG_PRT2_BIE
-SCSI_In_DBx__6__BIT_MASK EQU CYREG_PRT2_BIT_MASK
-SCSI_In_DBx__6__BYP EQU CYREG_PRT2_BYP
-SCSI_In_DBx__6__CTL EQU CYREG_PRT2_CTL
-SCSI_In_DBx__6__DM0 EQU CYREG_PRT2_DM0
-SCSI_In_DBx__6__DM1 EQU CYREG_PRT2_DM1
-SCSI_In_DBx__6__DM2 EQU CYREG_PRT2_DM2
-SCSI_In_DBx__6__DR EQU CYREG_PRT2_DR
-SCSI_In_DBx__6__INP_DIS EQU CYREG_PRT2_INP_DIS
-SCSI_In_DBx__6__INTTYPE EQU CYREG_PICU2_INTTYPE0
-SCSI_In_DBx__6__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
-SCSI_In_DBx__6__LCD_EN EQU CYREG_PRT2_LCD_EN
-SCSI_In_DBx__6__MASK EQU 0x01
-SCSI_In_DBx__6__PC EQU CYREG_PRT2_PC0
-SCSI_In_DBx__6__PORT EQU 2
-SCSI_In_DBx__6__PRT EQU CYREG_PRT2_PRT
-SCSI_In_DBx__6__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
-SCSI_In_DBx__6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
-SCSI_In_DBx__6__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
-SCSI_In_DBx__6__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
-SCSI_In_DBx__6__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
-SCSI_In_DBx__6__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
-SCSI_In_DBx__6__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
-SCSI_In_DBx__6__PS EQU CYREG_PRT2_PS
-SCSI_In_DBx__6__SHIFT EQU 0
-SCSI_In_DBx__6__SLW EQU CYREG_PRT2_SLW
-SCSI_In_DBx__7__AG EQU CYREG_PRT6_AG
-SCSI_In_DBx__7__AMUX EQU CYREG_PRT6_AMUX
-SCSI_In_DBx__7__BIE EQU CYREG_PRT6_BIE
-SCSI_In_DBx__7__BIT_MASK EQU CYREG_PRT6_BIT_MASK
-SCSI_In_DBx__7__BYP EQU CYREG_PRT6_BYP
-SCSI_In_DBx__7__CTL EQU CYREG_PRT6_CTL
-SCSI_In_DBx__7__DM0 EQU CYREG_PRT6_DM0
-SCSI_In_DBx__7__DM1 EQU CYREG_PRT6_DM1
-SCSI_In_DBx__7__DM2 EQU CYREG_PRT6_DM2
-SCSI_In_DBx__7__DR EQU CYREG_PRT6_DR
-SCSI_In_DBx__7__INP_DIS EQU CYREG_PRT6_INP_DIS
-SCSI_In_DBx__7__INTTYPE EQU CYREG_PICU6_INTTYPE3
-SCSI_In_DBx__7__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
-SCSI_In_DBx__7__LCD_EN EQU CYREG_PRT6_LCD_EN
-SCSI_In_DBx__7__MASK EQU 0x08
-SCSI_In_DBx__7__PC EQU CYREG_PRT6_PC3
-SCSI_In_DBx__7__PORT EQU 6
-SCSI_In_DBx__7__PRT EQU CYREG_PRT6_PRT
-SCSI_In_DBx__7__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
-SCSI_In_DBx__7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
-SCSI_In_DBx__7__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
-SCSI_In_DBx__7__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
-SCSI_In_DBx__7__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
-SCSI_In_DBx__7__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
-SCSI_In_DBx__7__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
-SCSI_In_DBx__7__PS EQU CYREG_PRT6_PS
-SCSI_In_DBx__7__SHIFT EQU 3
-SCSI_In_DBx__7__SLW EQU CYREG_PRT6_SLW
-SCSI_In_DBx__DB0__AG EQU CYREG_PRT6_AG
-SCSI_In_DBx__DB0__AMUX EQU CYREG_PRT6_AMUX
-SCSI_In_DBx__DB0__BIE EQU CYREG_PRT6_BIE
-SCSI_In_DBx__DB0__BIT_MASK EQU CYREG_PRT6_BIT_MASK
-SCSI_In_DBx__DB0__BYP EQU CYREG_PRT6_BYP
-SCSI_In_DBx__DB0__CTL EQU CYREG_PRT6_CTL
-SCSI_In_DBx__DB0__DM0 EQU CYREG_PRT6_DM0
-SCSI_In_DBx__DB0__DM1 EQU CYREG_PRT6_DM1
-SCSI_In_DBx__DB0__DM2 EQU CYREG_PRT6_DM2
-SCSI_In_DBx__DB0__DR EQU CYREG_PRT6_DR
-SCSI_In_DBx__DB0__INP_DIS EQU CYREG_PRT6_INP_DIS
-SCSI_In_DBx__DB0__INTTYPE EQU CYREG_PICU6_INTTYPE6
-SCSI_In_DBx__DB0__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
-SCSI_In_DBx__DB0__LCD_EN EQU CYREG_PRT6_LCD_EN
-SCSI_In_DBx__DB0__MASK EQU 0x40
-SCSI_In_DBx__DB0__PC EQU CYREG_PRT6_PC6
-SCSI_In_DBx__DB0__PORT EQU 6
-SCSI_In_DBx__DB0__PRT EQU CYREG_PRT6_PRT
-SCSI_In_DBx__DB0__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
-SCSI_In_DBx__DB0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
-SCSI_In_DBx__DB0__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
-SCSI_In_DBx__DB0__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
-SCSI_In_DBx__DB0__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
-SCSI_In_DBx__DB0__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
-SCSI_In_DBx__DB0__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
-SCSI_In_DBx__DB0__PS EQU CYREG_PRT6_PS
-SCSI_In_DBx__DB0__SHIFT EQU 6
-SCSI_In_DBx__DB0__SLW EQU CYREG_PRT6_SLW
-SCSI_In_DBx__DB1__AG EQU CYREG_PRT6_AG
-SCSI_In_DBx__DB1__AMUX EQU CYREG_PRT6_AMUX
-SCSI_In_DBx__DB1__BIE EQU CYREG_PRT6_BIE
-SCSI_In_DBx__DB1__BIT_MASK EQU CYREG_PRT6_BIT_MASK
-SCSI_In_DBx__DB1__BYP EQU CYREG_PRT6_BYP
-SCSI_In_DBx__DB1__CTL EQU CYREG_PRT6_CTL
-SCSI_In_DBx__DB1__DM0 EQU CYREG_PRT6_DM0
-SCSI_In_DBx__DB1__DM1 EQU CYREG_PRT6_DM1
-SCSI_In_DBx__DB1__DM2 EQU CYREG_PRT6_DM2
-SCSI_In_DBx__DB1__DR EQU CYREG_PRT6_DR
-SCSI_In_DBx__DB1__INP_DIS EQU CYREG_PRT6_INP_DIS
-SCSI_In_DBx__DB1__INTTYPE EQU CYREG_PICU6_INTTYPE4
-SCSI_In_DBx__DB1__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
-SCSI_In_DBx__DB1__LCD_EN EQU CYREG_PRT6_LCD_EN
-SCSI_In_DBx__DB1__MASK EQU 0x10
-SCSI_In_DBx__DB1__PC EQU CYREG_PRT6_PC4
-SCSI_In_DBx__DB1__PORT EQU 6
-SCSI_In_DBx__DB1__PRT EQU CYREG_PRT6_PRT
-SCSI_In_DBx__DB1__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
-SCSI_In_DBx__DB1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
-SCSI_In_DBx__DB1__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
-SCSI_In_DBx__DB1__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
-SCSI_In_DBx__DB1__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
-SCSI_In_DBx__DB1__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
-SCSI_In_DBx__DB1__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
-SCSI_In_DBx__DB1__PS EQU CYREG_PRT6_PS
-SCSI_In_DBx__DB1__SHIFT EQU 4
-SCSI_In_DBx__DB1__SLW EQU CYREG_PRT6_SLW
-SCSI_In_DBx__DB2__AG EQU CYREG_PRT12_AG
-SCSI_In_DBx__DB2__BIE EQU CYREG_PRT12_BIE
-SCSI_In_DBx__DB2__BIT_MASK EQU CYREG_PRT12_BIT_MASK
-SCSI_In_DBx__DB2__BYP EQU CYREG_PRT12_BYP
-SCSI_In_DBx__DB2__DM0 EQU CYREG_PRT12_DM0
-SCSI_In_DBx__DB2__DM1 EQU CYREG_PRT12_DM1
-SCSI_In_DBx__DB2__DM2 EQU CYREG_PRT12_DM2
-SCSI_In_DBx__DB2__DR EQU CYREG_PRT12_DR
-SCSI_In_DBx__DB2__INP_DIS EQU CYREG_PRT12_INP_DIS
-SCSI_In_DBx__DB2__INTTYPE EQU CYREG_PICU12_INTTYPE4
-SCSI_In_DBx__DB2__MASK EQU 0x10
-SCSI_In_DBx__DB2__PC EQU CYREG_PRT12_PC4
-SCSI_In_DBx__DB2__PORT EQU 12
-SCSI_In_DBx__DB2__PRT EQU CYREG_PRT12_PRT
-SCSI_In_DBx__DB2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN
-SCSI_In_DBx__DB2__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0
-SCSI_In_DBx__DB2__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1
-SCSI_In_DBx__DB2__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0
-SCSI_In_DBx__DB2__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1
-SCSI_In_DBx__DB2__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT
-SCSI_In_DBx__DB2__PS EQU CYREG_PRT12_PS
-SCSI_In_DBx__DB2__SHIFT EQU 4
-SCSI_In_DBx__DB2__SIO_CFG EQU CYREG_PRT12_SIO_CFG
-SCSI_In_DBx__DB2__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF
-SCSI_In_DBx__DB2__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN
-SCSI_In_DBx__DB2__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ
-SCSI_In_DBx__DB2__SLW EQU CYREG_PRT12_SLW
-SCSI_In_DBx__DB3__AG EQU CYREG_PRT2_AG
-SCSI_In_DBx__DB3__AMUX EQU CYREG_PRT2_AMUX
-SCSI_In_DBx__DB3__BIE EQU CYREG_PRT2_BIE
-SCSI_In_DBx__DB3__BIT_MASK EQU CYREG_PRT2_BIT_MASK
-SCSI_In_DBx__DB3__BYP EQU CYREG_PRT2_BYP
-SCSI_In_DBx__DB3__CTL EQU CYREG_PRT2_CTL
-SCSI_In_DBx__DB3__DM0 EQU CYREG_PRT2_DM0
-SCSI_In_DBx__DB3__DM1 EQU CYREG_PRT2_DM1
-SCSI_In_DBx__DB3__DM2 EQU CYREG_PRT2_DM2
-SCSI_In_DBx__DB3__DR EQU CYREG_PRT2_DR
-SCSI_In_DBx__DB3__INP_DIS EQU CYREG_PRT2_INP_DIS
-SCSI_In_DBx__DB3__INTTYPE EQU CYREG_PICU2_INTTYPE6
-SCSI_In_DBx__DB3__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
-SCSI_In_DBx__DB3__LCD_EN EQU CYREG_PRT2_LCD_EN
-SCSI_In_DBx__DB3__MASK EQU 0x40
-SCSI_In_DBx__DB3__PC EQU CYREG_PRT2_PC6
-SCSI_In_DBx__DB3__PORT EQU 2
-SCSI_In_DBx__DB3__PRT EQU CYREG_PRT2_PRT
-SCSI_In_DBx__DB3__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
-SCSI_In_DBx__DB3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
-SCSI_In_DBx__DB3__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
-SCSI_In_DBx__DB3__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
-SCSI_In_DBx__DB3__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
-SCSI_In_DBx__DB3__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
-SCSI_In_DBx__DB3__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
-SCSI_In_DBx__DB3__PS EQU CYREG_PRT2_PS
-SCSI_In_DBx__DB3__SHIFT EQU 6
-SCSI_In_DBx__DB3__SLW EQU CYREG_PRT2_SLW
-SCSI_In_DBx__DB4__AG EQU CYREG_PRT2_AG
-SCSI_In_DBx__DB4__AMUX EQU CYREG_PRT2_AMUX
-SCSI_In_DBx__DB4__BIE EQU CYREG_PRT2_BIE
-SCSI_In_DBx__DB4__BIT_MASK EQU CYREG_PRT2_BIT_MASK
-SCSI_In_DBx__DB4__BYP EQU CYREG_PRT2_BYP
-SCSI_In_DBx__DB4__CTL EQU CYREG_PRT2_CTL
-SCSI_In_DBx__DB4__DM0 EQU CYREG_PRT2_DM0
-SCSI_In_DBx__DB4__DM1 EQU CYREG_PRT2_DM1
-SCSI_In_DBx__DB4__DM2 EQU CYREG_PRT2_DM2
-SCSI_In_DBx__DB4__DR EQU CYREG_PRT2_DR
-SCSI_In_DBx__DB4__INP_DIS EQU CYREG_PRT2_INP_DIS
-SCSI_In_DBx__DB4__INTTYPE EQU CYREG_PICU2_INTTYPE4
-SCSI_In_DBx__DB4__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
-SCSI_In_DBx__DB4__LCD_EN EQU CYREG_PRT2_LCD_EN
-SCSI_In_DBx__DB4__MASK EQU 0x10
-SCSI_In_DBx__DB4__PC EQU CYREG_PRT2_PC4
-SCSI_In_DBx__DB4__PORT EQU 2
-SCSI_In_DBx__DB4__PRT EQU CYREG_PRT2_PRT
-SCSI_In_DBx__DB4__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
-SCSI_In_DBx__DB4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
-SCSI_In_DBx__DB4__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
-SCSI_In_DBx__DB4__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
-SCSI_In_DBx__DB4__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
-SCSI_In_DBx__DB4__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
-SCSI_In_DBx__DB4__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
-SCSI_In_DBx__DB4__PS EQU CYREG_PRT2_PS
-SCSI_In_DBx__DB4__SHIFT EQU 4
-SCSI_In_DBx__DB4__SLW EQU CYREG_PRT2_SLW
-SCSI_In_DBx__DB5__AG EQU CYREG_PRT2_AG
-SCSI_In_DBx__DB5__AMUX EQU CYREG_PRT2_AMUX
-SCSI_In_DBx__DB5__BIE EQU CYREG_PRT2_BIE
-SCSI_In_DBx__DB5__BIT_MASK EQU CYREG_PRT2_BIT_MASK
-SCSI_In_DBx__DB5__BYP EQU CYREG_PRT2_BYP
-SCSI_In_DBx__DB5__CTL EQU CYREG_PRT2_CTL
-SCSI_In_DBx__DB5__DM0 EQU CYREG_PRT2_DM0
-SCSI_In_DBx__DB5__DM1 EQU CYREG_PRT2_DM1
-SCSI_In_DBx__DB5__DM2 EQU CYREG_PRT2_DM2
-SCSI_In_DBx__DB5__DR EQU CYREG_PRT2_DR
-SCSI_In_DBx__DB5__INP_DIS EQU CYREG_PRT2_INP_DIS
-SCSI_In_DBx__DB5__INTTYPE EQU CYREG_PICU2_INTTYPE2
-SCSI_In_DBx__DB5__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
-SCSI_In_DBx__DB5__LCD_EN EQU CYREG_PRT2_LCD_EN
-SCSI_In_DBx__DB5__MASK EQU 0x04
-SCSI_In_DBx__DB5__PC EQU CYREG_PRT2_PC2
-SCSI_In_DBx__DB5__PORT EQU 2
-SCSI_In_DBx__DB5__PRT EQU CYREG_PRT2_PRT
-SCSI_In_DBx__DB5__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
-SCSI_In_DBx__DB5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
-SCSI_In_DBx__DB5__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
-SCSI_In_DBx__DB5__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
-SCSI_In_DBx__DB5__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
-SCSI_In_DBx__DB5__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
-SCSI_In_DBx__DB5__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
-SCSI_In_DBx__DB5__PS EQU CYREG_PRT2_PS
-SCSI_In_DBx__DB5__SHIFT EQU 2
-SCSI_In_DBx__DB5__SLW EQU CYREG_PRT2_SLW
-SCSI_In_DBx__DB6__AG EQU CYREG_PRT2_AG
-SCSI_In_DBx__DB6__AMUX EQU CYREG_PRT2_AMUX
-SCSI_In_DBx__DB6__BIE EQU CYREG_PRT2_BIE
-SCSI_In_DBx__DB6__BIT_MASK EQU CYREG_PRT2_BIT_MASK
-SCSI_In_DBx__DB6__BYP EQU CYREG_PRT2_BYP
-SCSI_In_DBx__DB6__CTL EQU CYREG_PRT2_CTL
-SCSI_In_DBx__DB6__DM0 EQU CYREG_PRT2_DM0
-SCSI_In_DBx__DB6__DM1 EQU CYREG_PRT2_DM1
-SCSI_In_DBx__DB6__DM2 EQU CYREG_PRT2_DM2
-SCSI_In_DBx__DB6__DR EQU CYREG_PRT2_DR
-SCSI_In_DBx__DB6__INP_DIS EQU CYREG_PRT2_INP_DIS
-SCSI_In_DBx__DB6__INTTYPE EQU CYREG_PICU2_INTTYPE0
-SCSI_In_DBx__DB6__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
-SCSI_In_DBx__DB6__LCD_EN EQU CYREG_PRT2_LCD_EN
-SCSI_In_DBx__DB6__MASK EQU 0x01
-SCSI_In_DBx__DB6__PC EQU CYREG_PRT2_PC0
-SCSI_In_DBx__DB6__PORT EQU 2
-SCSI_In_DBx__DB6__PRT EQU CYREG_PRT2_PRT
-SCSI_In_DBx__DB6__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
-SCSI_In_DBx__DB6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
-SCSI_In_DBx__DB6__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
-SCSI_In_DBx__DB6__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
-SCSI_In_DBx__DB6__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
-SCSI_In_DBx__DB6__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
-SCSI_In_DBx__DB6__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
-SCSI_In_DBx__DB6__PS EQU CYREG_PRT2_PS
-SCSI_In_DBx__DB6__SHIFT EQU 0
-SCSI_In_DBx__DB6__SLW EQU CYREG_PRT2_SLW
-SCSI_In_DBx__DB7__AG EQU CYREG_PRT6_AG
-SCSI_In_DBx__DB7__AMUX EQU CYREG_PRT6_AMUX
-SCSI_In_DBx__DB7__BIE EQU CYREG_PRT6_BIE
-SCSI_In_DBx__DB7__BIT_MASK EQU CYREG_PRT6_BIT_MASK
-SCSI_In_DBx__DB7__BYP EQU CYREG_PRT6_BYP
-SCSI_In_DBx__DB7__CTL EQU CYREG_PRT6_CTL
-SCSI_In_DBx__DB7__DM0 EQU CYREG_PRT6_DM0
-SCSI_In_DBx__DB7__DM1 EQU CYREG_PRT6_DM1
-SCSI_In_DBx__DB7__DM2 EQU CYREG_PRT6_DM2
-SCSI_In_DBx__DB7__DR EQU CYREG_PRT6_DR
-SCSI_In_DBx__DB7__INP_DIS EQU CYREG_PRT6_INP_DIS
-SCSI_In_DBx__DB7__INTTYPE EQU CYREG_PICU6_INTTYPE3
-SCSI_In_DBx__DB7__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
-SCSI_In_DBx__DB7__LCD_EN EQU CYREG_PRT6_LCD_EN
-SCSI_In_DBx__DB7__MASK EQU 0x08
-SCSI_In_DBx__DB7__PC EQU CYREG_PRT6_PC3
-SCSI_In_DBx__DB7__PORT EQU 6
-SCSI_In_DBx__DB7__PRT EQU CYREG_PRT6_PRT
-SCSI_In_DBx__DB7__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
-SCSI_In_DBx__DB7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
-SCSI_In_DBx__DB7__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
-SCSI_In_DBx__DB7__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
-SCSI_In_DBx__DB7__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
-SCSI_In_DBx__DB7__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
-SCSI_In_DBx__DB7__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
-SCSI_In_DBx__DB7__PS EQU CYREG_PRT6_PS
-SCSI_In_DBx__DB7__SHIFT EQU 3
-SCSI_In_DBx__DB7__SLW EQU CYREG_PRT6_SLW
-
-; SCSI_Noise
-SCSI_Noise__0__AG EQU CYREG_PRT4_AG
-SCSI_Noise__0__AMUX EQU CYREG_PRT4_AMUX
-SCSI_Noise__0__BIE EQU CYREG_PRT4_BIE
-SCSI_Noise__0__BIT_MASK EQU CYREG_PRT4_BIT_MASK
-SCSI_Noise__0__BYP EQU CYREG_PRT4_BYP
-SCSI_Noise__0__CTL EQU CYREG_PRT4_CTL
-SCSI_Noise__0__DM0 EQU CYREG_PRT4_DM0
-SCSI_Noise__0__DM1 EQU CYREG_PRT4_DM1
-SCSI_Noise__0__DM2 EQU CYREG_PRT4_DM2
-SCSI_Noise__0__DR EQU CYREG_PRT4_DR
-SCSI_Noise__0__INP_DIS EQU CYREG_PRT4_INP_DIS
-SCSI_Noise__0__INTTYPE EQU CYREG_PICU4_INTTYPE7
-SCSI_Noise__0__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
-SCSI_Noise__0__LCD_EN EQU CYREG_PRT4_LCD_EN
-SCSI_Noise__0__MASK EQU 0x80
-SCSI_Noise__0__PC EQU CYREG_PRT4_PC7
-SCSI_Noise__0__PORT EQU 4
-SCSI_Noise__0__PRT EQU CYREG_PRT4_PRT
-SCSI_Noise__0__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
-SCSI_Noise__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
-SCSI_Noise__0__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
-SCSI_Noise__0__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
-SCSI_Noise__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
-SCSI_Noise__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
-SCSI_Noise__0__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
-SCSI_Noise__0__PS EQU CYREG_PRT4_PS
-SCSI_Noise__0__SHIFT EQU 7
-SCSI_Noise__0__SLW EQU CYREG_PRT4_SLW
-SCSI_Noise__1__AG EQU CYREG_PRT4_AG
-SCSI_Noise__1__AMUX EQU CYREG_PRT4_AMUX
-SCSI_Noise__1__BIE EQU CYREG_PRT4_BIE
-SCSI_Noise__1__BIT_MASK EQU CYREG_PRT4_BIT_MASK
-SCSI_Noise__1__BYP EQU CYREG_PRT4_BYP
-SCSI_Noise__1__CTL EQU CYREG_PRT4_CTL
-SCSI_Noise__1__DM0 EQU CYREG_PRT4_DM0
-SCSI_Noise__1__DM1 EQU CYREG_PRT4_DM1
-SCSI_Noise__1__DM2 EQU CYREG_PRT4_DM2
-SCSI_Noise__1__DR EQU CYREG_PRT4_DR
-SCSI_Noise__1__INP_DIS EQU CYREG_PRT4_INP_DIS
-SCSI_Noise__1__INTTYPE EQU CYREG_PICU4_INTTYPE5
-SCSI_Noise__1__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
-SCSI_Noise__1__LCD_EN EQU CYREG_PRT4_LCD_EN
-SCSI_Noise__1__MASK EQU 0x20
-SCSI_Noise__1__PC EQU CYREG_PRT4_PC5
-SCSI_Noise__1__PORT EQU 4
-SCSI_Noise__1__PRT EQU CYREG_PRT4_PRT
-SCSI_Noise__1__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
-SCSI_Noise__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
-SCSI_Noise__1__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
-SCSI_Noise__1__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
-SCSI_Noise__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
-SCSI_Noise__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
-SCSI_Noise__1__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
-SCSI_Noise__1__PS EQU CYREG_PRT4_PS
-SCSI_Noise__1__SHIFT EQU 5
-SCSI_Noise__1__SLW EQU CYREG_PRT4_SLW
-SCSI_Noise__2__AG EQU CYREG_PRT0_AG
-SCSI_Noise__2__AMUX EQU CYREG_PRT0_AMUX
-SCSI_Noise__2__BIE EQU CYREG_PRT0_BIE
-SCSI_Noise__2__BIT_MASK EQU CYREG_PRT0_BIT_MASK
-SCSI_Noise__2__BYP EQU CYREG_PRT0_BYP
-SCSI_Noise__2__CTL EQU CYREG_PRT0_CTL
-SCSI_Noise__2__DM0 EQU CYREG_PRT0_DM0
-SCSI_Noise__2__DM1 EQU CYREG_PRT0_DM1
-SCSI_Noise__2__DM2 EQU CYREG_PRT0_DM2
-SCSI_Noise__2__DR EQU CYREG_PRT0_DR
-SCSI_Noise__2__INP_DIS EQU CYREG_PRT0_INP_DIS
-SCSI_Noise__2__INTTYPE EQU CYREG_PICU0_INTTYPE2
-SCSI_Noise__2__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
-SCSI_Noise__2__LCD_EN EQU CYREG_PRT0_LCD_EN
-SCSI_Noise__2__MASK EQU 0x04
-SCSI_Noise__2__PC EQU CYREG_PRT0_PC2
-SCSI_Noise__2__PORT EQU 0
-SCSI_Noise__2__PRT EQU CYREG_PRT0_PRT
-SCSI_Noise__2__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
-SCSI_Noise__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
-SCSI_Noise__2__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
-SCSI_Noise__2__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
-SCSI_Noise__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
-SCSI_Noise__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
-SCSI_Noise__2__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
-SCSI_Noise__2__PS EQU CYREG_PRT0_PS
-SCSI_Noise__2__SHIFT EQU 2
-SCSI_Noise__2__SLW EQU CYREG_PRT0_SLW
-SCSI_Noise__3__AG EQU CYREG_PRT0_AG
-SCSI_Noise__3__AMUX EQU CYREG_PRT0_AMUX
-SCSI_Noise__3__BIE EQU CYREG_PRT0_BIE
-SCSI_Noise__3__BIT_MASK EQU CYREG_PRT0_BIT_MASK
-SCSI_Noise__3__BYP EQU CYREG_PRT0_BYP
-SCSI_Noise__3__CTL EQU CYREG_PRT0_CTL
-SCSI_Noise__3__DM0 EQU CYREG_PRT0_DM0
-SCSI_Noise__3__DM1 EQU CYREG_PRT0_DM1
-SCSI_Noise__3__DM2 EQU CYREG_PRT0_DM2
-SCSI_Noise__3__DR EQU CYREG_PRT0_DR
-SCSI_Noise__3__INP_DIS EQU CYREG_PRT0_INP_DIS
-SCSI_Noise__3__INTTYPE EQU CYREG_PICU0_INTTYPE6
-SCSI_Noise__3__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
-SCSI_Noise__3__LCD_EN EQU CYREG_PRT0_LCD_EN
-SCSI_Noise__3__MASK EQU 0x40
-SCSI_Noise__3__PC EQU CYREG_PRT0_PC6
-SCSI_Noise__3__PORT EQU 0
-SCSI_Noise__3__PRT EQU CYREG_PRT0_PRT
-SCSI_Noise__3__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
-SCSI_Noise__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
-SCSI_Noise__3__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
-SCSI_Noise__3__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
-SCSI_Noise__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
-SCSI_Noise__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
-SCSI_Noise__3__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
-SCSI_Noise__3__PS EQU CYREG_PRT0_PS
-SCSI_Noise__3__SHIFT EQU 6
-SCSI_Noise__3__SLW EQU CYREG_PRT0_SLW
-SCSI_Noise__4__AG EQU CYREG_PRT4_AG
-SCSI_Noise__4__AMUX EQU CYREG_PRT4_AMUX
-SCSI_Noise__4__BIE EQU CYREG_PRT4_BIE
-SCSI_Noise__4__BIT_MASK EQU CYREG_PRT4_BIT_MASK
-SCSI_Noise__4__BYP EQU CYREG_PRT4_BYP
-SCSI_Noise__4__CTL EQU CYREG_PRT4_CTL
-SCSI_Noise__4__DM0 EQU CYREG_PRT4_DM0
-SCSI_Noise__4__DM1 EQU CYREG_PRT4_DM1
-SCSI_Noise__4__DM2 EQU CYREG_PRT4_DM2
-SCSI_Noise__4__DR EQU CYREG_PRT4_DR
-SCSI_Noise__4__INP_DIS EQU CYREG_PRT4_INP_DIS
-SCSI_Noise__4__INTTYPE EQU CYREG_PICU4_INTTYPE3
-SCSI_Noise__4__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
-SCSI_Noise__4__LCD_EN EQU CYREG_PRT4_LCD_EN
-SCSI_Noise__4__MASK EQU 0x08
-SCSI_Noise__4__PC EQU CYREG_PRT4_PC3
-SCSI_Noise__4__PORT EQU 4
-SCSI_Noise__4__PRT EQU CYREG_PRT4_PRT
-SCSI_Noise__4__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
-SCSI_Noise__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
-SCSI_Noise__4__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
-SCSI_Noise__4__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
-SCSI_Noise__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
-SCSI_Noise__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
-SCSI_Noise__4__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
-SCSI_Noise__4__PS EQU CYREG_PRT4_PS
-SCSI_Noise__4__SHIFT EQU 3
-SCSI_Noise__4__SLW EQU CYREG_PRT4_SLW
-SCSI_Noise__ACK__AG EQU CYREG_PRT4_AG
-SCSI_Noise__ACK__AMUX EQU CYREG_PRT4_AMUX
-SCSI_Noise__ACK__BIE EQU CYREG_PRT4_BIE
-SCSI_Noise__ACK__BIT_MASK EQU CYREG_PRT4_BIT_MASK
-SCSI_Noise__ACK__BYP EQU CYREG_PRT4_BYP
-SCSI_Noise__ACK__CTL EQU CYREG_PRT4_CTL
-SCSI_Noise__ACK__DM0 EQU CYREG_PRT4_DM0
-SCSI_Noise__ACK__DM1 EQU CYREG_PRT4_DM1
-SCSI_Noise__ACK__DM2 EQU CYREG_PRT4_DM2
-SCSI_Noise__ACK__DR EQU CYREG_PRT4_DR
-SCSI_Noise__ACK__INP_DIS EQU CYREG_PRT4_INP_DIS
-SCSI_Noise__ACK__INTTYPE EQU CYREG_PICU4_INTTYPE3
-SCSI_Noise__ACK__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
-SCSI_Noise__ACK__LCD_EN EQU CYREG_PRT4_LCD_EN
-SCSI_Noise__ACK__MASK EQU 0x08
-SCSI_Noise__ACK__PC EQU CYREG_PRT4_PC3
-SCSI_Noise__ACK__PORT EQU 4
-SCSI_Noise__ACK__PRT EQU CYREG_PRT4_PRT
-SCSI_Noise__ACK__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
-SCSI_Noise__ACK__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
-SCSI_Noise__ACK__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
-SCSI_Noise__ACK__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
-SCSI_Noise__ACK__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
-SCSI_Noise__ACK__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
-SCSI_Noise__ACK__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
-SCSI_Noise__ACK__PS EQU CYREG_PRT4_PS
-SCSI_Noise__ACK__SHIFT EQU 3
-SCSI_Noise__ACK__SLW EQU CYREG_PRT4_SLW
-SCSI_Noise__ATN__AG EQU CYREG_PRT4_AG
-SCSI_Noise__ATN__AMUX EQU CYREG_PRT4_AMUX
-SCSI_Noise__ATN__BIE EQU CYREG_PRT4_BIE
-SCSI_Noise__ATN__BIT_MASK EQU CYREG_PRT4_BIT_MASK
-SCSI_Noise__ATN__BYP EQU CYREG_PRT4_BYP
-SCSI_Noise__ATN__CTL EQU CYREG_PRT4_CTL
-SCSI_Noise__ATN__DM0 EQU CYREG_PRT4_DM0
-SCSI_Noise__ATN__DM1 EQU CYREG_PRT4_DM1
-SCSI_Noise__ATN__DM2 EQU CYREG_PRT4_DM2
-SCSI_Noise__ATN__DR EQU CYREG_PRT4_DR
-SCSI_Noise__ATN__INP_DIS EQU CYREG_PRT4_INP_DIS
-SCSI_Noise__ATN__INTTYPE EQU CYREG_PICU4_INTTYPE7
-SCSI_Noise__ATN__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
-SCSI_Noise__ATN__LCD_EN EQU CYREG_PRT4_LCD_EN
-SCSI_Noise__ATN__MASK EQU 0x80
-SCSI_Noise__ATN__PC EQU CYREG_PRT4_PC7
-SCSI_Noise__ATN__PORT EQU 4
-SCSI_Noise__ATN__PRT EQU CYREG_PRT4_PRT
-SCSI_Noise__ATN__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
-SCSI_Noise__ATN__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
-SCSI_Noise__ATN__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
-SCSI_Noise__ATN__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
-SCSI_Noise__ATN__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
-SCSI_Noise__ATN__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
-SCSI_Noise__ATN__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
-SCSI_Noise__ATN__PS EQU CYREG_PRT4_PS
-SCSI_Noise__ATN__SHIFT EQU 7
-SCSI_Noise__ATN__SLW EQU CYREG_PRT4_SLW
-SCSI_Noise__BSY__AG EQU CYREG_PRT4_AG
-SCSI_Noise__BSY__AMUX EQU CYREG_PRT4_AMUX
-SCSI_Noise__BSY__BIE EQU CYREG_PRT4_BIE
-SCSI_Noise__BSY__BIT_MASK EQU CYREG_PRT4_BIT_MASK
-SCSI_Noise__BSY__BYP EQU CYREG_PRT4_BYP
-SCSI_Noise__BSY__CTL EQU CYREG_PRT4_CTL
-SCSI_Noise__BSY__DM0 EQU CYREG_PRT4_DM0
-SCSI_Noise__BSY__DM1 EQU CYREG_PRT4_DM1
-SCSI_Noise__BSY__DM2 EQU CYREG_PRT4_DM2
-SCSI_Noise__BSY__DR EQU CYREG_PRT4_DR
-SCSI_Noise__BSY__INP_DIS EQU CYREG_PRT4_INP_DIS
-SCSI_Noise__BSY__INTTYPE EQU CYREG_PICU4_INTTYPE5
-SCSI_Noise__BSY__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
-SCSI_Noise__BSY__LCD_EN EQU CYREG_PRT4_LCD_EN
-SCSI_Noise__BSY__MASK EQU 0x20
-SCSI_Noise__BSY__PC EQU CYREG_PRT4_PC5
-SCSI_Noise__BSY__PORT EQU 4
-SCSI_Noise__BSY__PRT EQU CYREG_PRT4_PRT
-SCSI_Noise__BSY__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
-SCSI_Noise__BSY__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
-SCSI_Noise__BSY__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
-SCSI_Noise__BSY__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
-SCSI_Noise__BSY__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
-SCSI_Noise__BSY__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
-SCSI_Noise__BSY__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
-SCSI_Noise__BSY__PS EQU CYREG_PRT4_PS
-SCSI_Noise__BSY__SHIFT EQU 5
-SCSI_Noise__BSY__SLW EQU CYREG_PRT4_SLW
-SCSI_Noise__RST__AG EQU CYREG_PRT0_AG
-SCSI_Noise__RST__AMUX EQU CYREG_PRT0_AMUX
-SCSI_Noise__RST__BIE EQU CYREG_PRT0_BIE
-SCSI_Noise__RST__BIT_MASK EQU CYREG_PRT0_BIT_MASK
-SCSI_Noise__RST__BYP EQU CYREG_PRT0_BYP
-SCSI_Noise__RST__CTL EQU CYREG_PRT0_CTL
-SCSI_Noise__RST__DM0 EQU CYREG_PRT0_DM0
-SCSI_Noise__RST__DM1 EQU CYREG_PRT0_DM1
-SCSI_Noise__RST__DM2 EQU CYREG_PRT0_DM2
-SCSI_Noise__RST__DR EQU CYREG_PRT0_DR
-SCSI_Noise__RST__INP_DIS EQU CYREG_PRT0_INP_DIS
-SCSI_Noise__RST__INTTYPE EQU CYREG_PICU0_INTTYPE6
-SCSI_Noise__RST__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
-SCSI_Noise__RST__LCD_EN EQU CYREG_PRT0_LCD_EN
-SCSI_Noise__RST__MASK EQU 0x40
-SCSI_Noise__RST__PC EQU CYREG_PRT0_PC6
-SCSI_Noise__RST__PORT EQU 0
-SCSI_Noise__RST__PRT EQU CYREG_PRT0_PRT
-SCSI_Noise__RST__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
-SCSI_Noise__RST__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
-SCSI_Noise__RST__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
-SCSI_Noise__RST__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
-SCSI_Noise__RST__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
-SCSI_Noise__RST__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
-SCSI_Noise__RST__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
-SCSI_Noise__RST__PS EQU CYREG_PRT0_PS
-SCSI_Noise__RST__SHIFT EQU 6
-SCSI_Noise__RST__SLW EQU CYREG_PRT0_SLW
-SCSI_Noise__SEL__AG EQU CYREG_PRT0_AG
-SCSI_Noise__SEL__AMUX EQU CYREG_PRT0_AMUX
-SCSI_Noise__SEL__BIE EQU CYREG_PRT0_BIE
-SCSI_Noise__SEL__BIT_MASK EQU CYREG_PRT0_BIT_MASK
-SCSI_Noise__SEL__BYP EQU CYREG_PRT0_BYP
-SCSI_Noise__SEL__CTL EQU CYREG_PRT0_CTL
-SCSI_Noise__SEL__DM0 EQU CYREG_PRT0_DM0
-SCSI_Noise__SEL__DM1 EQU CYREG_PRT0_DM1
-SCSI_Noise__SEL__DM2 EQU CYREG_PRT0_DM2
-SCSI_Noise__SEL__DR EQU CYREG_PRT0_DR
-SCSI_Noise__SEL__INP_DIS EQU CYREG_PRT0_INP_DIS
-SCSI_Noise__SEL__INTTYPE EQU CYREG_PICU0_INTTYPE2
-SCSI_Noise__SEL__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
-SCSI_Noise__SEL__LCD_EN EQU CYREG_PRT0_LCD_EN
-SCSI_Noise__SEL__MASK EQU 0x04
-SCSI_Noise__SEL__PC EQU CYREG_PRT0_PC2
-SCSI_Noise__SEL__PORT EQU 0
-SCSI_Noise__SEL__PRT EQU CYREG_PRT0_PRT
-SCSI_Noise__SEL__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
-SCSI_Noise__SEL__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
-SCSI_Noise__SEL__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
-SCSI_Noise__SEL__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
-SCSI_Noise__SEL__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
-SCSI_Noise__SEL__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
-SCSI_Noise__SEL__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
-SCSI_Noise__SEL__PS EQU CYREG_PRT0_PS
-SCSI_Noise__SEL__SHIFT EQU 2
-SCSI_Noise__SEL__SLW EQU CYREG_PRT0_SLW
-
-; SCSI_Out
-SCSI_Out__0__AG EQU CYREG_PRT6_AG
-SCSI_Out__0__AMUX EQU CYREG_PRT6_AMUX
-SCSI_Out__0__BIE EQU CYREG_PRT6_BIE
-SCSI_Out__0__BIT_MASK EQU CYREG_PRT6_BIT_MASK
-SCSI_Out__0__BYP EQU CYREG_PRT6_BYP
-SCSI_Out__0__CTL EQU CYREG_PRT6_CTL
-SCSI_Out__0__DM0 EQU CYREG_PRT6_DM0
-SCSI_Out__0__DM1 EQU CYREG_PRT6_DM1
-SCSI_Out__0__DM2 EQU CYREG_PRT6_DM2
-SCSI_Out__0__DR EQU CYREG_PRT6_DR
-SCSI_Out__0__INP_DIS EQU CYREG_PRT6_INP_DIS
-SCSI_Out__0__INTTYPE EQU CYREG_PICU6_INTTYPE2
-SCSI_Out__0__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
-SCSI_Out__0__LCD_EN EQU CYREG_PRT6_LCD_EN
-SCSI_Out__0__MASK EQU 0x04
-SCSI_Out__0__PC EQU CYREG_PRT6_PC2
-SCSI_Out__0__PORT EQU 6
-SCSI_Out__0__PRT EQU CYREG_PRT6_PRT
-SCSI_Out__0__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
-SCSI_Out__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
-SCSI_Out__0__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
-SCSI_Out__0__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
-SCSI_Out__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
-SCSI_Out__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
-SCSI_Out__0__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
-SCSI_Out__0__PS EQU CYREG_PRT6_PS
-SCSI_Out__0__SHIFT EQU 2
-SCSI_Out__0__SLW EQU CYREG_PRT6_SLW
-SCSI_Out__1__AG EQU CYREG_PRT4_AG
-SCSI_Out__1__AMUX EQU CYREG_PRT4_AMUX
-SCSI_Out__1__BIE EQU CYREG_PRT4_BIE
-SCSI_Out__1__BIT_MASK EQU CYREG_PRT4_BIT_MASK
-SCSI_Out__1__BYP EQU CYREG_PRT4_BYP
-SCSI_Out__1__CTL EQU CYREG_PRT4_CTL
-SCSI_Out__1__DM0 EQU CYREG_PRT4_DM0
-SCSI_Out__1__DM1 EQU CYREG_PRT4_DM1
-SCSI_Out__1__DM2 EQU CYREG_PRT4_DM2
-SCSI_Out__1__DR EQU CYREG_PRT4_DR
-SCSI_Out__1__INP_DIS EQU CYREG_PRT4_INP_DIS
-SCSI_Out__1__INTTYPE EQU CYREG_PICU4_INTTYPE6
-SCSI_Out__1__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
-SCSI_Out__1__LCD_EN EQU CYREG_PRT4_LCD_EN
-SCSI_Out__1__MASK EQU 0x40
-SCSI_Out__1__PC EQU CYREG_PRT4_PC6
-SCSI_Out__1__PORT EQU 4
-SCSI_Out__1__PRT EQU CYREG_PRT4_PRT
-SCSI_Out__1__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
-SCSI_Out__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
-SCSI_Out__1__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
-SCSI_Out__1__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
-SCSI_Out__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
-SCSI_Out__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
-SCSI_Out__1__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
-SCSI_Out__1__PS EQU CYREG_PRT4_PS
-SCSI_Out__1__SHIFT EQU 6
-SCSI_Out__1__SLW EQU CYREG_PRT4_SLW
-SCSI_Out__2__AG EQU CYREG_PRT0_AG
-SCSI_Out__2__AMUX EQU CYREG_PRT0_AMUX
-SCSI_Out__2__BIE EQU CYREG_PRT0_BIE
-SCSI_Out__2__BIT_MASK EQU CYREG_PRT0_BIT_MASK
-SCSI_Out__2__BYP EQU CYREG_PRT0_BYP
-SCSI_Out__2__CTL EQU CYREG_PRT0_CTL
-SCSI_Out__2__DM0 EQU CYREG_PRT0_DM0
-SCSI_Out__2__DM1 EQU CYREG_PRT0_DM1
-SCSI_Out__2__DM2 EQU CYREG_PRT0_DM2
-SCSI_Out__2__DR EQU CYREG_PRT0_DR
-SCSI_Out__2__INP_DIS EQU CYREG_PRT0_INP_DIS
-SCSI_Out__2__INTTYPE EQU CYREG_PICU0_INTTYPE7
-SCSI_Out__2__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
-SCSI_Out__2__LCD_EN EQU CYREG_PRT0_LCD_EN
-SCSI_Out__2__MASK EQU 0x80
-SCSI_Out__2__PC EQU CYREG_PRT0_PC7
-SCSI_Out__2__PORT EQU 0
-SCSI_Out__2__PRT EQU CYREG_PRT0_PRT
-SCSI_Out__2__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
-SCSI_Out__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
-SCSI_Out__2__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
-SCSI_Out__2__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
-SCSI_Out__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
-SCSI_Out__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
-SCSI_Out__2__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
-SCSI_Out__2__PS EQU CYREG_PRT0_PS
-SCSI_Out__2__SHIFT EQU 7
-SCSI_Out__2__SLW EQU CYREG_PRT0_SLW
-SCSI_Out__3__AG EQU CYREG_PRT0_AG
-SCSI_Out__3__AMUX EQU CYREG_PRT0_AMUX
-SCSI_Out__3__BIE EQU CYREG_PRT0_BIE
-SCSI_Out__3__BIT_MASK EQU CYREG_PRT0_BIT_MASK
-SCSI_Out__3__BYP EQU CYREG_PRT0_BYP
-SCSI_Out__3__CTL EQU CYREG_PRT0_CTL
-SCSI_Out__3__DM0 EQU CYREG_PRT0_DM0
-SCSI_Out__3__DM1 EQU CYREG_PRT0_DM1
-SCSI_Out__3__DM2 EQU CYREG_PRT0_DM2
-SCSI_Out__3__DR EQU CYREG_PRT0_DR
-SCSI_Out__3__INP_DIS EQU CYREG_PRT0_INP_DIS
-SCSI_Out__3__INTTYPE EQU CYREG_PICU0_INTTYPE5
-SCSI_Out__3__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
-SCSI_Out__3__LCD_EN EQU CYREG_PRT0_LCD_EN
-SCSI_Out__3__MASK EQU 0x20
-SCSI_Out__3__PC EQU CYREG_PRT0_PC5
-SCSI_Out__3__PORT EQU 0
-SCSI_Out__3__PRT EQU CYREG_PRT0_PRT
-SCSI_Out__3__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
-SCSI_Out__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
-SCSI_Out__3__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
-SCSI_Out__3__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
-SCSI_Out__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
-SCSI_Out__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
-SCSI_Out__3__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
-SCSI_Out__3__PS EQU CYREG_PRT0_PS
-SCSI_Out__3__SHIFT EQU 5
-SCSI_Out__3__SLW EQU CYREG_PRT0_SLW
-SCSI_Out__4__AG EQU CYREG_PRT0_AG
-SCSI_Out__4__AMUX EQU CYREG_PRT0_AMUX
-SCSI_Out__4__BIE EQU CYREG_PRT0_BIE
-SCSI_Out__4__BIT_MASK EQU CYREG_PRT0_BIT_MASK
-SCSI_Out__4__BYP EQU CYREG_PRT0_BYP
-SCSI_Out__4__CTL EQU CYREG_PRT0_CTL
-SCSI_Out__4__DM0 EQU CYREG_PRT0_DM0
-SCSI_Out__4__DM1 EQU CYREG_PRT0_DM1
-SCSI_Out__4__DM2 EQU CYREG_PRT0_DM2
-SCSI_Out__4__DR EQU CYREG_PRT0_DR
-SCSI_Out__4__INP_DIS EQU CYREG_PRT0_INP_DIS
-SCSI_Out__4__INTTYPE EQU CYREG_PICU0_INTTYPE3
-SCSI_Out__4__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
-SCSI_Out__4__LCD_EN EQU CYREG_PRT0_LCD_EN
-SCSI_Out__4__MASK EQU 0x08
-SCSI_Out__4__PC EQU CYREG_PRT0_PC3
-SCSI_Out__4__PORT EQU 0
-SCSI_Out__4__PRT EQU CYREG_PRT0_PRT
-SCSI_Out__4__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
-SCSI_Out__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
-SCSI_Out__4__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
-SCSI_Out__4__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
-SCSI_Out__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
-SCSI_Out__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
-SCSI_Out__4__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
-SCSI_Out__4__PS EQU CYREG_PRT0_PS
-SCSI_Out__4__SHIFT EQU 3
-SCSI_Out__4__SLW EQU CYREG_PRT0_SLW
-SCSI_Out__5__AG EQU CYREG_PRT0_AG
-SCSI_Out__5__AMUX EQU CYREG_PRT0_AMUX
-SCSI_Out__5__BIE EQU CYREG_PRT0_BIE
-SCSI_Out__5__BIT_MASK EQU CYREG_PRT0_BIT_MASK
-SCSI_Out__5__BYP EQU CYREG_PRT0_BYP
-SCSI_Out__5__CTL EQU CYREG_PRT0_CTL
-SCSI_Out__5__DM0 EQU CYREG_PRT0_DM0
-SCSI_Out__5__DM1 EQU CYREG_PRT0_DM1
-SCSI_Out__5__DM2 EQU CYREG_PRT0_DM2
-SCSI_Out__5__DR EQU CYREG_PRT0_DR
-SCSI_Out__5__INP_DIS EQU CYREG_PRT0_INP_DIS
-SCSI_Out__5__INTTYPE EQU CYREG_PICU0_INTTYPE1
-SCSI_Out__5__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
-SCSI_Out__5__LCD_EN EQU CYREG_PRT0_LCD_EN
-SCSI_Out__5__MASK EQU 0x02
-SCSI_Out__5__PC EQU CYREG_PRT0_PC1
-SCSI_Out__5__PORT EQU 0
-SCSI_Out__5__PRT EQU CYREG_PRT0_PRT
-SCSI_Out__5__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
-SCSI_Out__5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
-SCSI_Out__5__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
-SCSI_Out__5__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
-SCSI_Out__5__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
-SCSI_Out__5__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
-SCSI_Out__5__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
-SCSI_Out__5__PS EQU CYREG_PRT0_PS
-SCSI_Out__5__SHIFT EQU 1
-SCSI_Out__5__SLW EQU CYREG_PRT0_SLW
-SCSI_Out__6__AG EQU CYREG_PRT4_AG
-SCSI_Out__6__AMUX EQU CYREG_PRT4_AMUX
-SCSI_Out__6__BIE EQU CYREG_PRT4_BIE
-SCSI_Out__6__BIT_MASK EQU CYREG_PRT4_BIT_MASK
-SCSI_Out__6__BYP EQU CYREG_PRT4_BYP
-SCSI_Out__6__CTL EQU CYREG_PRT4_CTL
-SCSI_Out__6__DM0 EQU CYREG_PRT4_DM0
-SCSI_Out__6__DM1 EQU CYREG_PRT4_DM1
-SCSI_Out__6__DM2 EQU CYREG_PRT4_DM2
-SCSI_Out__6__DR EQU CYREG_PRT4_DR
-SCSI_Out__6__INP_DIS EQU CYREG_PRT4_INP_DIS
-SCSI_Out__6__INTTYPE EQU CYREG_PICU4_INTTYPE1
-SCSI_Out__6__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
-SCSI_Out__6__LCD_EN EQU CYREG_PRT4_LCD_EN
-SCSI_Out__6__MASK EQU 0x02
-SCSI_Out__6__PC EQU CYREG_PRT4_PC1
-SCSI_Out__6__PORT EQU 4
-SCSI_Out__6__PRT EQU CYREG_PRT4_PRT
-SCSI_Out__6__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
-SCSI_Out__6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
-SCSI_Out__6__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
-SCSI_Out__6__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
-SCSI_Out__6__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
-SCSI_Out__6__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
-SCSI_Out__6__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
-SCSI_Out__6__PS EQU CYREG_PRT4_PS
-SCSI_Out__6__SHIFT EQU 1
-SCSI_Out__6__SLW EQU CYREG_PRT4_SLW
-SCSI_Out__7__AG EQU CYREG_PRT12_AG
-SCSI_Out__7__BIE EQU CYREG_PRT12_BIE
-SCSI_Out__7__BIT_MASK EQU CYREG_PRT12_BIT_MASK
-SCSI_Out__7__BYP EQU CYREG_PRT12_BYP
-SCSI_Out__7__DM0 EQU CYREG_PRT12_DM0
-SCSI_Out__7__DM1 EQU CYREG_PRT12_DM1
-SCSI_Out__7__DM2 EQU CYREG_PRT12_DM2
-SCSI_Out__7__DR EQU CYREG_PRT12_DR
-SCSI_Out__7__INP_DIS EQU CYREG_PRT12_INP_DIS
-SCSI_Out__7__INTTYPE EQU CYREG_PICU12_INTTYPE3
-SCSI_Out__7__MASK EQU 0x08
-SCSI_Out__7__PC EQU CYREG_PRT12_PC3
-SCSI_Out__7__PORT EQU 12
-SCSI_Out__7__PRT EQU CYREG_PRT12_PRT
-SCSI_Out__7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN
-SCSI_Out__7__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0
-SCSI_Out__7__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1
-SCSI_Out__7__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0
-SCSI_Out__7__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1
-SCSI_Out__7__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT
-SCSI_Out__7__PS EQU CYREG_PRT12_PS
-SCSI_Out__7__SHIFT EQU 3
-SCSI_Out__7__SIO_CFG EQU CYREG_PRT12_SIO_CFG
-SCSI_Out__7__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF
-SCSI_Out__7__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN
-SCSI_Out__7__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ
-SCSI_Out__7__SLW EQU CYREG_PRT12_SLW
-SCSI_Out__BSY__AG EQU CYREG_PRT4_AG
-SCSI_Out__BSY__AMUX EQU CYREG_PRT4_AMUX
-SCSI_Out__BSY__BIE EQU CYREG_PRT4_BIE
-SCSI_Out__BSY__BIT_MASK EQU CYREG_PRT4_BIT_MASK
-SCSI_Out__BSY__BYP EQU CYREG_PRT4_BYP
-SCSI_Out__BSY__CTL EQU CYREG_PRT4_CTL
-SCSI_Out__BSY__DM0 EQU CYREG_PRT4_DM0
-SCSI_Out__BSY__DM1 EQU CYREG_PRT4_DM1
-SCSI_Out__BSY__DM2 EQU CYREG_PRT4_DM2
-SCSI_Out__BSY__DR EQU CYREG_PRT4_DR
-SCSI_Out__BSY__INP_DIS EQU CYREG_PRT4_INP_DIS
-SCSI_Out__BSY__INTTYPE EQU CYREG_PICU4_INTTYPE6
-SCSI_Out__BSY__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
-SCSI_Out__BSY__LCD_EN EQU CYREG_PRT4_LCD_EN
-SCSI_Out__BSY__MASK EQU 0x40
-SCSI_Out__BSY__PC EQU CYREG_PRT4_PC6
-SCSI_Out__BSY__PORT EQU 4
-SCSI_Out__BSY__PRT EQU CYREG_PRT4_PRT
-SCSI_Out__BSY__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
-SCSI_Out__BSY__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
-SCSI_Out__BSY__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
-SCSI_Out__BSY__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
-SCSI_Out__BSY__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
-SCSI_Out__BSY__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
-SCSI_Out__BSY__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
-SCSI_Out__BSY__PS EQU CYREG_PRT4_PS
-SCSI_Out__BSY__SHIFT EQU 6
-SCSI_Out__BSY__SLW EQU CYREG_PRT4_SLW
-SCSI_Out__CD_raw__AG EQU CYREG_PRT0_AG
-SCSI_Out__CD_raw__AMUX EQU CYREG_PRT0_AMUX
-SCSI_Out__CD_raw__BIE EQU CYREG_PRT0_BIE
-SCSI_Out__CD_raw__BIT_MASK EQU CYREG_PRT0_BIT_MASK
-SCSI_Out__CD_raw__BYP EQU CYREG_PRT0_BYP
-SCSI_Out__CD_raw__CTL EQU CYREG_PRT0_CTL
-SCSI_Out__CD_raw__DM0 EQU CYREG_PRT0_DM0
-SCSI_Out__CD_raw__DM1 EQU CYREG_PRT0_DM1
-SCSI_Out__CD_raw__DM2 EQU CYREG_PRT0_DM2
-SCSI_Out__CD_raw__DR EQU CYREG_PRT0_DR
-SCSI_Out__CD_raw__INP_DIS EQU CYREG_PRT0_INP_DIS
-SCSI_Out__CD_raw__INTTYPE EQU CYREG_PICU0_INTTYPE1
-SCSI_Out__CD_raw__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
-SCSI_Out__CD_raw__LCD_EN EQU CYREG_PRT0_LCD_EN
-SCSI_Out__CD_raw__MASK EQU 0x02
-SCSI_Out__CD_raw__PC EQU CYREG_PRT0_PC1
-SCSI_Out__CD_raw__PORT EQU 0
-SCSI_Out__CD_raw__PRT EQU CYREG_PRT0_PRT
-SCSI_Out__CD_raw__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
-SCSI_Out__CD_raw__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
-SCSI_Out__CD_raw__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
-SCSI_Out__CD_raw__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
-SCSI_Out__CD_raw__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
-SCSI_Out__CD_raw__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
-SCSI_Out__CD_raw__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
-SCSI_Out__CD_raw__PS EQU CYREG_PRT0_PS
-SCSI_Out__CD_raw__SHIFT EQU 1
-SCSI_Out__CD_raw__SLW EQU CYREG_PRT0_SLW
-SCSI_Out__DBP_raw__AG EQU CYREG_PRT6_AG
-SCSI_Out__DBP_raw__AMUX EQU CYREG_PRT6_AMUX
-SCSI_Out__DBP_raw__BIE EQU CYREG_PRT6_BIE
-SCSI_Out__DBP_raw__BIT_MASK EQU CYREG_PRT6_BIT_MASK
-SCSI_Out__DBP_raw__BYP EQU CYREG_PRT6_BYP
-SCSI_Out__DBP_raw__CTL EQU CYREG_PRT6_CTL
-SCSI_Out__DBP_raw__DM0 EQU CYREG_PRT6_DM0
-SCSI_Out__DBP_raw__DM1 EQU CYREG_PRT6_DM1
-SCSI_Out__DBP_raw__DM2 EQU CYREG_PRT6_DM2
-SCSI_Out__DBP_raw__DR EQU CYREG_PRT6_DR
-SCSI_Out__DBP_raw__INP_DIS EQU CYREG_PRT6_INP_DIS
-SCSI_Out__DBP_raw__INTTYPE EQU CYREG_PICU6_INTTYPE2
-SCSI_Out__DBP_raw__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
-SCSI_Out__DBP_raw__LCD_EN EQU CYREG_PRT6_LCD_EN
-SCSI_Out__DBP_raw__MASK EQU 0x04
-SCSI_Out__DBP_raw__PC EQU CYREG_PRT6_PC2
-SCSI_Out__DBP_raw__PORT EQU 6
-SCSI_Out__DBP_raw__PRT EQU CYREG_PRT6_PRT
-SCSI_Out__DBP_raw__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
-SCSI_Out__DBP_raw__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
-SCSI_Out__DBP_raw__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
-SCSI_Out__DBP_raw__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
-SCSI_Out__DBP_raw__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
-SCSI_Out__DBP_raw__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
-SCSI_Out__DBP_raw__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
-SCSI_Out__DBP_raw__PS EQU CYREG_PRT6_PS
-SCSI_Out__DBP_raw__SHIFT EQU 2
-SCSI_Out__DBP_raw__SLW EQU CYREG_PRT6_SLW
-SCSI_Out__IO_raw__AG EQU CYREG_PRT12_AG
-SCSI_Out__IO_raw__BIE EQU CYREG_PRT12_BIE
-SCSI_Out__IO_raw__BIT_MASK EQU CYREG_PRT12_BIT_MASK
-SCSI_Out__IO_raw__BYP EQU CYREG_PRT12_BYP
-SCSI_Out__IO_raw__DM0 EQU CYREG_PRT12_DM0
-SCSI_Out__IO_raw__DM1 EQU CYREG_PRT12_DM1
-SCSI_Out__IO_raw__DM2 EQU CYREG_PRT12_DM2
-SCSI_Out__IO_raw__DR EQU CYREG_PRT12_DR
-SCSI_Out__IO_raw__INP_DIS EQU CYREG_PRT12_INP_DIS
-SCSI_Out__IO_raw__INTTYPE EQU CYREG_PICU12_INTTYPE3
-SCSI_Out__IO_raw__MASK EQU 0x08
-SCSI_Out__IO_raw__PC EQU CYREG_PRT12_PC3
-SCSI_Out__IO_raw__PORT EQU 12
-SCSI_Out__IO_raw__PRT EQU CYREG_PRT12_PRT
-SCSI_Out__IO_raw__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN
-SCSI_Out__IO_raw__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0
-SCSI_Out__IO_raw__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1
-SCSI_Out__IO_raw__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0
-SCSI_Out__IO_raw__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1
-SCSI_Out__IO_raw__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT
-SCSI_Out__IO_raw__PS EQU CYREG_PRT12_PS
-SCSI_Out__IO_raw__SHIFT EQU 3
-SCSI_Out__IO_raw__SIO_CFG EQU CYREG_PRT12_SIO_CFG
-SCSI_Out__IO_raw__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF
-SCSI_Out__IO_raw__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN
-SCSI_Out__IO_raw__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ
-SCSI_Out__IO_raw__SLW EQU CYREG_PRT12_SLW
-SCSI_Out__MSG_raw__AG EQU CYREG_PRT0_AG
-SCSI_Out__MSG_raw__AMUX EQU CYREG_PRT0_AMUX
-SCSI_Out__MSG_raw__BIE EQU CYREG_PRT0_BIE
-SCSI_Out__MSG_raw__BIT_MASK EQU CYREG_PRT0_BIT_MASK
-SCSI_Out__MSG_raw__BYP EQU CYREG_PRT0_BYP
-SCSI_Out__MSG_raw__CTL EQU CYREG_PRT0_CTL
-SCSI_Out__MSG_raw__DM0 EQU CYREG_PRT0_DM0
-SCSI_Out__MSG_raw__DM1 EQU CYREG_PRT0_DM1
-SCSI_Out__MSG_raw__DM2 EQU CYREG_PRT0_DM2
-SCSI_Out__MSG_raw__DR EQU CYREG_PRT0_DR
-SCSI_Out__MSG_raw__INP_DIS EQU CYREG_PRT0_INP_DIS
-SCSI_Out__MSG_raw__INTTYPE EQU CYREG_PICU0_INTTYPE5
-SCSI_Out__MSG_raw__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
-SCSI_Out__MSG_raw__LCD_EN EQU CYREG_PRT0_LCD_EN
-SCSI_Out__MSG_raw__MASK EQU 0x20
-SCSI_Out__MSG_raw__PC EQU CYREG_PRT0_PC5
-SCSI_Out__MSG_raw__PORT EQU 0
-SCSI_Out__MSG_raw__PRT EQU CYREG_PRT0_PRT
-SCSI_Out__MSG_raw__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
-SCSI_Out__MSG_raw__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
-SCSI_Out__MSG_raw__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
-SCSI_Out__MSG_raw__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
-SCSI_Out__MSG_raw__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
-SCSI_Out__MSG_raw__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
-SCSI_Out__MSG_raw__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
-SCSI_Out__MSG_raw__PS EQU CYREG_PRT0_PS
-SCSI_Out__MSG_raw__SHIFT EQU 5
-SCSI_Out__MSG_raw__SLW EQU CYREG_PRT0_SLW
-SCSI_Out__REQ__AG EQU CYREG_PRT4_AG
-SCSI_Out__REQ__AMUX EQU CYREG_PRT4_AMUX
-SCSI_Out__REQ__BIE EQU CYREG_PRT4_BIE
-SCSI_Out__REQ__BIT_MASK EQU CYREG_PRT4_BIT_MASK
-SCSI_Out__REQ__BYP EQU CYREG_PRT4_BYP
-SCSI_Out__REQ__CTL EQU CYREG_PRT4_CTL
-SCSI_Out__REQ__DM0 EQU CYREG_PRT4_DM0
-SCSI_Out__REQ__DM1 EQU CYREG_PRT4_DM1
-SCSI_Out__REQ__DM2 EQU CYREG_PRT4_DM2
-SCSI_Out__REQ__DR EQU CYREG_PRT4_DR
-SCSI_Out__REQ__INP_DIS EQU CYREG_PRT4_INP_DIS
-SCSI_Out__REQ__INTTYPE EQU CYREG_PICU4_INTTYPE1
-SCSI_Out__REQ__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
-SCSI_Out__REQ__LCD_EN EQU CYREG_PRT4_LCD_EN
-SCSI_Out__REQ__MASK EQU 0x02
-SCSI_Out__REQ__PC EQU CYREG_PRT4_PC1
-SCSI_Out__REQ__PORT EQU 4
-SCSI_Out__REQ__PRT EQU CYREG_PRT4_PRT
-SCSI_Out__REQ__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
-SCSI_Out__REQ__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
-SCSI_Out__REQ__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
-SCSI_Out__REQ__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
-SCSI_Out__REQ__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
-SCSI_Out__REQ__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
-SCSI_Out__REQ__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
-SCSI_Out__REQ__PS EQU CYREG_PRT4_PS
-SCSI_Out__REQ__SHIFT EQU 1
-SCSI_Out__REQ__SLW EQU CYREG_PRT4_SLW
-SCSI_Out__RST__AG EQU CYREG_PRT0_AG
-SCSI_Out__RST__AMUX EQU CYREG_PRT0_AMUX
-SCSI_Out__RST__BIE EQU CYREG_PRT0_BIE
-SCSI_Out__RST__BIT_MASK EQU CYREG_PRT0_BIT_MASK
-SCSI_Out__RST__BYP EQU CYREG_PRT0_BYP
-SCSI_Out__RST__CTL EQU CYREG_PRT0_CTL
-SCSI_Out__RST__DM0 EQU CYREG_PRT0_DM0
-SCSI_Out__RST__DM1 EQU CYREG_PRT0_DM1
-SCSI_Out__RST__DM2 EQU CYREG_PRT0_DM2
-SCSI_Out__RST__DR EQU CYREG_PRT0_DR
-SCSI_Out__RST__INP_DIS EQU CYREG_PRT0_INP_DIS
-SCSI_Out__RST__INTTYPE EQU CYREG_PICU0_INTTYPE7
-SCSI_Out__RST__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
-SCSI_Out__RST__LCD_EN EQU CYREG_PRT0_LCD_EN
-SCSI_Out__RST__MASK EQU 0x80
-SCSI_Out__RST__PC EQU CYREG_PRT0_PC7
-SCSI_Out__RST__PORT EQU 0
-SCSI_Out__RST__PRT EQU CYREG_PRT0_PRT
-SCSI_Out__RST__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
-SCSI_Out__RST__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
-SCSI_Out__RST__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
-SCSI_Out__RST__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
-SCSI_Out__RST__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
-SCSI_Out__RST__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
-SCSI_Out__RST__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
-SCSI_Out__RST__PS EQU CYREG_PRT0_PS
-SCSI_Out__RST__SHIFT EQU 7
-SCSI_Out__RST__SLW EQU CYREG_PRT0_SLW
-SCSI_Out__SEL__AG EQU CYREG_PRT0_AG
-SCSI_Out__SEL__AMUX EQU CYREG_PRT0_AMUX
-SCSI_Out__SEL__BIE EQU CYREG_PRT0_BIE
-SCSI_Out__SEL__BIT_MASK EQU CYREG_PRT0_BIT_MASK
-SCSI_Out__SEL__BYP EQU CYREG_PRT0_BYP
-SCSI_Out__SEL__CTL EQU CYREG_PRT0_CTL
-SCSI_Out__SEL__DM0 EQU CYREG_PRT0_DM0
-SCSI_Out__SEL__DM1 EQU CYREG_PRT0_DM1
-SCSI_Out__SEL__DM2 EQU CYREG_PRT0_DM2
-SCSI_Out__SEL__DR EQU CYREG_PRT0_DR
-SCSI_Out__SEL__INP_DIS EQU CYREG_PRT0_INP_DIS
-SCSI_Out__SEL__INTTYPE EQU CYREG_PICU0_INTTYPE3
-SCSI_Out__SEL__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
-SCSI_Out__SEL__LCD_EN EQU CYREG_PRT0_LCD_EN
-SCSI_Out__SEL__MASK EQU 0x08
-SCSI_Out__SEL__PC EQU CYREG_PRT0_PC3
-SCSI_Out__SEL__PORT EQU 0
-SCSI_Out__SEL__PRT EQU CYREG_PRT0_PRT
-SCSI_Out__SEL__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
-SCSI_Out__SEL__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
-SCSI_Out__SEL__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
-SCSI_Out__SEL__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
-SCSI_Out__SEL__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
-SCSI_Out__SEL__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
-SCSI_Out__SEL__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
-SCSI_Out__SEL__PS EQU CYREG_PRT0_PS
-SCSI_Out__SEL__SHIFT EQU 3
-SCSI_Out__SEL__SLW EQU CYREG_PRT0_SLW
-SCSI_Out_Bits_Sync_ctrl_reg__0__MASK EQU 0x01
-SCSI_Out_Bits_Sync_ctrl_reg__0__POS EQU 0
-SCSI_Out_Bits_Sync_ctrl_reg__1__MASK EQU 0x02
-SCSI_Out_Bits_Sync_ctrl_reg__1__POS EQU 1
-SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB07_08_ACTL
-SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB07_08_CTL
-SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB07_08_CTL
-SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB07_08_CTL
-SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB07_08_CTL
-SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB07_08_MSK
-SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB07_08_MSK
-SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB07_08_MSK
-SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB07_08_MSK
-SCSI_Out_Bits_Sync_ctrl_reg__2__MASK EQU 0x04
-SCSI_Out_Bits_Sync_ctrl_reg__2__POS EQU 2
-SCSI_Out_Bits_Sync_ctrl_reg__3__MASK EQU 0x08
-SCSI_Out_Bits_Sync_ctrl_reg__3__POS EQU 3
-SCSI_Out_Bits_Sync_ctrl_reg__4__MASK EQU 0x10
-SCSI_Out_Bits_Sync_ctrl_reg__4__POS EQU 4
-SCSI_Out_Bits_Sync_ctrl_reg__5__MASK EQU 0x20
-SCSI_Out_Bits_Sync_ctrl_reg__5__POS EQU 5
-SCSI_Out_Bits_Sync_ctrl_reg__6__MASK EQU 0x40
-SCSI_Out_Bits_Sync_ctrl_reg__6__POS EQU 6
-SCSI_Out_Bits_Sync_ctrl_reg__7__MASK EQU 0x80
-SCSI_Out_Bits_Sync_ctrl_reg__7__POS EQU 7
-SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB07_ACTL
-SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB07_CTL
-SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB07_ST_CTL
-SCSI_Out_Bits_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB07_CTL
-SCSI_Out_Bits_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB07_ST_CTL
-SCSI_Out_Bits_Sync_ctrl_reg__MASK EQU 0xFF
-SCSI_Out_Bits_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB07_MSK_ACTL
-SCSI_Out_Bits_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB07_MSK_ACTL
-SCSI_Out_Bits_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB07_MSK
-SCSI_Out_Ctl_Sync_ctrl_reg__0__MASK EQU 0x01
-SCSI_Out_Ctl_Sync_ctrl_reg__0__POS EQU 0
-SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB11_12_ACTL
-SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB11_12_CTL
-SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB11_12_CTL
-SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB11_12_CTL
-SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB11_12_CTL
-SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB11_12_MSK
-SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB11_12_MSK
-SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB11_12_MSK
-SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB11_12_MSK
-SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB11_ACTL
-SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB11_CTL
-SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB11_ST_CTL
-SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB11_CTL
-SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB11_ST_CTL
-SCSI_Out_Ctl_Sync_ctrl_reg__MASK EQU 0x01
-SCSI_Out_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB11_MSK_ACTL
-SCSI_Out_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB11_MSK_ACTL
-SCSI_Out_Ctl_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB11_MSK
-SCSI_Out_DBx__0__AG EQU CYREG_PRT6_AG
-SCSI_Out_DBx__0__AMUX EQU CYREG_PRT6_AMUX
-SCSI_Out_DBx__0__BIE EQU CYREG_PRT6_BIE
-SCSI_Out_DBx__0__BIT_MASK EQU CYREG_PRT6_BIT_MASK
-SCSI_Out_DBx__0__BYP EQU CYREG_PRT6_BYP
-SCSI_Out_DBx__0__CTL EQU CYREG_PRT6_CTL
-SCSI_Out_DBx__0__DM0 EQU CYREG_PRT6_DM0
-SCSI_Out_DBx__0__DM1 EQU CYREG_PRT6_DM1
-SCSI_Out_DBx__0__DM2 EQU CYREG_PRT6_DM2
-SCSI_Out_DBx__0__DR EQU CYREG_PRT6_DR
-SCSI_Out_DBx__0__INP_DIS EQU CYREG_PRT6_INP_DIS
-SCSI_Out_DBx__0__INTTYPE EQU CYREG_PICU6_INTTYPE7
-SCSI_Out_DBx__0__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
-SCSI_Out_DBx__0__LCD_EN EQU CYREG_PRT6_LCD_EN
-SCSI_Out_DBx__0__MASK EQU 0x80
-SCSI_Out_DBx__0__PC EQU CYREG_PRT6_PC7
-SCSI_Out_DBx__0__PORT EQU 6
-SCSI_Out_DBx__0__PRT EQU CYREG_PRT6_PRT
-SCSI_Out_DBx__0__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
-SCSI_Out_DBx__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
-SCSI_Out_DBx__0__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
-SCSI_Out_DBx__0__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
-SCSI_Out_DBx__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
-SCSI_Out_DBx__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
-SCSI_Out_DBx__0__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
-SCSI_Out_DBx__0__PS EQU CYREG_PRT6_PS
-SCSI_Out_DBx__0__SHIFT EQU 7
-SCSI_Out_DBx__0__SLW EQU CYREG_PRT6_SLW
-SCSI_Out_DBx__1__AG EQU CYREG_PRT6_AG
-SCSI_Out_DBx__1__AMUX EQU CYREG_PRT6_AMUX
-SCSI_Out_DBx__1__BIE EQU CYREG_PRT6_BIE
-SCSI_Out_DBx__1__BIT_MASK EQU CYREG_PRT6_BIT_MASK
-SCSI_Out_DBx__1__BYP EQU CYREG_PRT6_BYP
-SCSI_Out_DBx__1__CTL EQU CYREG_PRT6_CTL
-SCSI_Out_DBx__1__DM0 EQU CYREG_PRT6_DM0
-SCSI_Out_DBx__1__DM1 EQU CYREG_PRT6_DM1
-SCSI_Out_DBx__1__DM2 EQU CYREG_PRT6_DM2
-SCSI_Out_DBx__1__DR EQU CYREG_PRT6_DR
-SCSI_Out_DBx__1__INP_DIS EQU CYREG_PRT6_INP_DIS
-SCSI_Out_DBx__1__INTTYPE EQU CYREG_PICU6_INTTYPE5
-SCSI_Out_DBx__1__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
-SCSI_Out_DBx__1__LCD_EN EQU CYREG_PRT6_LCD_EN
-SCSI_Out_DBx__1__MASK EQU 0x20
-SCSI_Out_DBx__1__PC EQU CYREG_PRT6_PC5
-SCSI_Out_DBx__1__PORT EQU 6
-SCSI_Out_DBx__1__PRT EQU CYREG_PRT6_PRT
-SCSI_Out_DBx__1__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
-SCSI_Out_DBx__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
-SCSI_Out_DBx__1__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
-SCSI_Out_DBx__1__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
-SCSI_Out_DBx__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
-SCSI_Out_DBx__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
-SCSI_Out_DBx__1__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
-SCSI_Out_DBx__1__PS EQU CYREG_PRT6_PS
-SCSI_Out_DBx__1__SHIFT EQU 5
-SCSI_Out_DBx__1__SLW EQU CYREG_PRT6_SLW
-SCSI_Out_DBx__2__AG EQU CYREG_PRT12_AG
-SCSI_Out_DBx__2__BIE EQU CYREG_PRT12_BIE
-SCSI_Out_DBx__2__BIT_MASK EQU CYREG_PRT12_BIT_MASK
-SCSI_Out_DBx__2__BYP EQU CYREG_PRT12_BYP
-SCSI_Out_DBx__2__DM0 EQU CYREG_PRT12_DM0
-SCSI_Out_DBx__2__DM1 EQU CYREG_PRT12_DM1
-SCSI_Out_DBx__2__DM2 EQU CYREG_PRT12_DM2
-SCSI_Out_DBx__2__DR EQU CYREG_PRT12_DR
-SCSI_Out_DBx__2__INP_DIS EQU CYREG_PRT12_INP_DIS
-SCSI_Out_DBx__2__INTTYPE EQU CYREG_PICU12_INTTYPE5
-SCSI_Out_DBx__2__MASK EQU 0x20
-SCSI_Out_DBx__2__PC EQU CYREG_PRT12_PC5
-SCSI_Out_DBx__2__PORT EQU 12
-SCSI_Out_DBx__2__PRT EQU CYREG_PRT12_PRT
-SCSI_Out_DBx__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN
-SCSI_Out_DBx__2__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0
-SCSI_Out_DBx__2__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1
-SCSI_Out_DBx__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0
-SCSI_Out_DBx__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1
-SCSI_Out_DBx__2__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT
-SCSI_Out_DBx__2__PS EQU CYREG_PRT12_PS
-SCSI_Out_DBx__2__SHIFT EQU 5
-SCSI_Out_DBx__2__SIO_CFG EQU CYREG_PRT12_SIO_CFG
-SCSI_Out_DBx__2__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF
-SCSI_Out_DBx__2__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN
-SCSI_Out_DBx__2__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ
-SCSI_Out_DBx__2__SLW EQU CYREG_PRT12_SLW
-SCSI_Out_DBx__3__AG EQU CYREG_PRT2_AG
-SCSI_Out_DBx__3__AMUX EQU CYREG_PRT2_AMUX
-SCSI_Out_DBx__3__BIE EQU CYREG_PRT2_BIE
-SCSI_Out_DBx__3__BIT_MASK EQU CYREG_PRT2_BIT_MASK
-SCSI_Out_DBx__3__BYP EQU CYREG_PRT2_BYP
-SCSI_Out_DBx__3__CTL EQU CYREG_PRT2_CTL
-SCSI_Out_DBx__3__DM0 EQU CYREG_PRT2_DM0
-SCSI_Out_DBx__3__DM1 EQU CYREG_PRT2_DM1
-SCSI_Out_DBx__3__DM2 EQU CYREG_PRT2_DM2
-SCSI_Out_DBx__3__DR EQU CYREG_PRT2_DR
-SCSI_Out_DBx__3__INP_DIS EQU CYREG_PRT2_INP_DIS
-SCSI_Out_DBx__3__INTTYPE EQU CYREG_PICU2_INTTYPE7
-SCSI_Out_DBx__3__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
-SCSI_Out_DBx__3__LCD_EN EQU CYREG_PRT2_LCD_EN
-SCSI_Out_DBx__3__MASK EQU 0x80
-SCSI_Out_DBx__3__PC EQU CYREG_PRT2_PC7
-SCSI_Out_DBx__3__PORT EQU 2
-SCSI_Out_DBx__3__PRT EQU CYREG_PRT2_PRT
-SCSI_Out_DBx__3__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
-SCSI_Out_DBx__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
-SCSI_Out_DBx__3__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
-SCSI_Out_DBx__3__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
-SCSI_Out_DBx__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
-SCSI_Out_DBx__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
-SCSI_Out_DBx__3__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
-SCSI_Out_DBx__3__PS EQU CYREG_PRT2_PS
-SCSI_Out_DBx__3__SHIFT EQU 7
-SCSI_Out_DBx__3__SLW EQU CYREG_PRT2_SLW
-SCSI_Out_DBx__4__AG EQU CYREG_PRT2_AG
-SCSI_Out_DBx__4__AMUX EQU CYREG_PRT2_AMUX
-SCSI_Out_DBx__4__BIE EQU CYREG_PRT2_BIE
-SCSI_Out_DBx__4__BIT_MASK EQU CYREG_PRT2_BIT_MASK
-SCSI_Out_DBx__4__BYP EQU CYREG_PRT2_BYP
-SCSI_Out_DBx__4__CTL EQU CYREG_PRT2_CTL
-SCSI_Out_DBx__4__DM0 EQU CYREG_PRT2_DM0
-SCSI_Out_DBx__4__DM1 EQU CYREG_PRT2_DM1
-SCSI_Out_DBx__4__DM2 EQU CYREG_PRT2_DM2
-SCSI_Out_DBx__4__DR EQU CYREG_PRT2_DR
-SCSI_Out_DBx__4__INP_DIS EQU CYREG_PRT2_INP_DIS
-SCSI_Out_DBx__4__INTTYPE EQU CYREG_PICU2_INTTYPE5
-SCSI_Out_DBx__4__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
-SCSI_Out_DBx__4__LCD_EN EQU CYREG_PRT2_LCD_EN
-SCSI_Out_DBx__4__MASK EQU 0x20
-SCSI_Out_DBx__4__PC EQU CYREG_PRT2_PC5
-SCSI_Out_DBx__4__PORT EQU 2
-SCSI_Out_DBx__4__PRT EQU CYREG_PRT2_PRT
-SCSI_Out_DBx__4__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
-SCSI_Out_DBx__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
-SCSI_Out_DBx__4__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
-SCSI_Out_DBx__4__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
-SCSI_Out_DBx__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
-SCSI_Out_DBx__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
-SCSI_Out_DBx__4__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
-SCSI_Out_DBx__4__PS EQU CYREG_PRT2_PS
-SCSI_Out_DBx__4__SHIFT EQU 5
-SCSI_Out_DBx__4__SLW EQU CYREG_PRT2_SLW
-SCSI_Out_DBx__5__AG EQU CYREG_PRT2_AG
-SCSI_Out_DBx__5__AMUX EQU CYREG_PRT2_AMUX
-SCSI_Out_DBx__5__BIE EQU CYREG_PRT2_BIE
-SCSI_Out_DBx__5__BIT_MASK EQU CYREG_PRT2_BIT_MASK
-SCSI_Out_DBx__5__BYP EQU CYREG_PRT2_BYP
-SCSI_Out_DBx__5__CTL EQU CYREG_PRT2_CTL
-SCSI_Out_DBx__5__DM0 EQU CYREG_PRT2_DM0
-SCSI_Out_DBx__5__DM1 EQU CYREG_PRT2_DM1
-SCSI_Out_DBx__5__DM2 EQU CYREG_PRT2_DM2
-SCSI_Out_DBx__5__DR EQU CYREG_PRT2_DR
-SCSI_Out_DBx__5__INP_DIS EQU CYREG_PRT2_INP_DIS
-SCSI_Out_DBx__5__INTTYPE EQU CYREG_PICU2_INTTYPE3
-SCSI_Out_DBx__5__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
-SCSI_Out_DBx__5__LCD_EN EQU CYREG_PRT2_LCD_EN
-SCSI_Out_DBx__5__MASK EQU 0x08
-SCSI_Out_DBx__5__PC EQU CYREG_PRT2_PC3
-SCSI_Out_DBx__5__PORT EQU 2
-SCSI_Out_DBx__5__PRT EQU CYREG_PRT2_PRT
-SCSI_Out_DBx__5__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
-SCSI_Out_DBx__5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
-SCSI_Out_DBx__5__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
-SCSI_Out_DBx__5__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
-SCSI_Out_DBx__5__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
-SCSI_Out_DBx__5__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
-SCSI_Out_DBx__5__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
-SCSI_Out_DBx__5__PS EQU CYREG_PRT2_PS
-SCSI_Out_DBx__5__SHIFT EQU 3
-SCSI_Out_DBx__5__SLW EQU CYREG_PRT2_SLW
-SCSI_Out_DBx__6__AG EQU CYREG_PRT2_AG
-SCSI_Out_DBx__6__AMUX EQU CYREG_PRT2_AMUX
-SCSI_Out_DBx__6__BIE EQU CYREG_PRT2_BIE
-SCSI_Out_DBx__6__BIT_MASK EQU CYREG_PRT2_BIT_MASK
-SCSI_Out_DBx__6__BYP EQU CYREG_PRT2_BYP
-SCSI_Out_DBx__6__CTL EQU CYREG_PRT2_CTL
-SCSI_Out_DBx__6__DM0 EQU CYREG_PRT2_DM0
-SCSI_Out_DBx__6__DM1 EQU CYREG_PRT2_DM1
-SCSI_Out_DBx__6__DM2 EQU CYREG_PRT2_DM2
-SCSI_Out_DBx__6__DR EQU CYREG_PRT2_DR
-SCSI_Out_DBx__6__INP_DIS EQU CYREG_PRT2_INP_DIS
-SCSI_Out_DBx__6__INTTYPE EQU CYREG_PICU2_INTTYPE1
-SCSI_Out_DBx__6__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
-SCSI_Out_DBx__6__LCD_EN EQU CYREG_PRT2_LCD_EN
-SCSI_Out_DBx__6__MASK EQU 0x02
-SCSI_Out_DBx__6__PC EQU CYREG_PRT2_PC1
-SCSI_Out_DBx__6__PORT EQU 2
-SCSI_Out_DBx__6__PRT EQU CYREG_PRT2_PRT
-SCSI_Out_DBx__6__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
-SCSI_Out_DBx__6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
-SCSI_Out_DBx__6__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
-SCSI_Out_DBx__6__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
-SCSI_Out_DBx__6__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
-SCSI_Out_DBx__6__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
-SCSI_Out_DBx__6__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
-SCSI_Out_DBx__6__PS EQU CYREG_PRT2_PS
-SCSI_Out_DBx__6__SHIFT EQU 1
-SCSI_Out_DBx__6__SLW EQU CYREG_PRT2_SLW
-SCSI_Out_DBx__7__AG EQU CYREG_PRT15_AG
-SCSI_Out_DBx__7__AMUX EQU CYREG_PRT15_AMUX
-SCSI_Out_DBx__7__BIE EQU CYREG_PRT15_BIE
-SCSI_Out_DBx__7__BIT_MASK EQU CYREG_PRT15_BIT_MASK
-SCSI_Out_DBx__7__BYP EQU CYREG_PRT15_BYP
-SCSI_Out_DBx__7__CTL EQU CYREG_PRT15_CTL
-SCSI_Out_DBx__7__DM0 EQU CYREG_PRT15_DM0
-SCSI_Out_DBx__7__DM1 EQU CYREG_PRT15_DM1
-SCSI_Out_DBx__7__DM2 EQU CYREG_PRT15_DM2
-SCSI_Out_DBx__7__DR EQU CYREG_PRT15_DR
-SCSI_Out_DBx__7__INP_DIS EQU CYREG_PRT15_INP_DIS
-SCSI_Out_DBx__7__INTTYPE EQU CYREG_PICU15_INTTYPE5
-SCSI_Out_DBx__7__LCD_COM_SEG EQU CYREG_PRT15_LCD_COM_SEG
-SCSI_Out_DBx__7__LCD_EN EQU CYREG_PRT15_LCD_EN
-SCSI_Out_DBx__7__MASK EQU 0x20
-SCSI_Out_DBx__7__PC EQU CYREG_IO_PC_PRT15_PC5
-SCSI_Out_DBx__7__PORT EQU 15
-SCSI_Out_DBx__7__PRT EQU CYREG_PRT15_PRT
-SCSI_Out_DBx__7__PRTDSI__CAPS_SEL EQU CYREG_PRT15_CAPS_SEL
-SCSI_Out_DBx__7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT15_DBL_SYNC_IN
-SCSI_Out_DBx__7__PRTDSI__OE_SEL0 EQU CYREG_PRT15_OE_SEL0
-SCSI_Out_DBx__7__PRTDSI__OE_SEL1 EQU CYREG_PRT15_OE_SEL1
-SCSI_Out_DBx__7__PRTDSI__OUT_SEL0 EQU CYREG_PRT15_OUT_SEL0
-SCSI_Out_DBx__7__PRTDSI__OUT_SEL1 EQU CYREG_PRT15_OUT_SEL1
-SCSI_Out_DBx__7__PRTDSI__SYNC_OUT EQU CYREG_PRT15_SYNC_OUT
-SCSI_Out_DBx__7__PS EQU CYREG_PRT15_PS
-SCSI_Out_DBx__7__SHIFT EQU 5
-SCSI_Out_DBx__7__SLW EQU CYREG_PRT15_SLW
-SCSI_Out_DBx__DB0__AG EQU CYREG_PRT6_AG
-SCSI_Out_DBx__DB0__AMUX EQU CYREG_PRT6_AMUX
-SCSI_Out_DBx__DB0__BIE EQU CYREG_PRT6_BIE
-SCSI_Out_DBx__DB0__BIT_MASK EQU CYREG_PRT6_BIT_MASK
-SCSI_Out_DBx__DB0__BYP EQU CYREG_PRT6_BYP
-SCSI_Out_DBx__DB0__CTL EQU CYREG_PRT6_CTL
-SCSI_Out_DBx__DB0__DM0 EQU CYREG_PRT6_DM0
-SCSI_Out_DBx__DB0__DM1 EQU CYREG_PRT6_DM1
-SCSI_Out_DBx__DB0__DM2 EQU CYREG_PRT6_DM2
-SCSI_Out_DBx__DB0__DR EQU CYREG_PRT6_DR
-SCSI_Out_DBx__DB0__INP_DIS EQU CYREG_PRT6_INP_DIS
-SCSI_Out_DBx__DB0__INTTYPE EQU CYREG_PICU6_INTTYPE7
-SCSI_Out_DBx__DB0__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
-SCSI_Out_DBx__DB0__LCD_EN EQU CYREG_PRT6_LCD_EN
-SCSI_Out_DBx__DB0__MASK EQU 0x80
-SCSI_Out_DBx__DB0__PC EQU CYREG_PRT6_PC7
-SCSI_Out_DBx__DB0__PORT EQU 6
-SCSI_Out_DBx__DB0__PRT EQU CYREG_PRT6_PRT
-SCSI_Out_DBx__DB0__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
-SCSI_Out_DBx__DB0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
-SCSI_Out_DBx__DB0__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
-SCSI_Out_DBx__DB0__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
-SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
-SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
-SCSI_Out_DBx__DB0__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
-SCSI_Out_DBx__DB0__PS EQU CYREG_PRT6_PS
-SCSI_Out_DBx__DB0__SHIFT EQU 7
-SCSI_Out_DBx__DB0__SLW EQU CYREG_PRT6_SLW
-SCSI_Out_DBx__DB1__AG EQU CYREG_PRT6_AG
-SCSI_Out_DBx__DB1__AMUX EQU CYREG_PRT6_AMUX
-SCSI_Out_DBx__DB1__BIE EQU CYREG_PRT6_BIE
-SCSI_Out_DBx__DB1__BIT_MASK EQU CYREG_PRT6_BIT_MASK
-SCSI_Out_DBx__DB1__BYP EQU CYREG_PRT6_BYP
-SCSI_Out_DBx__DB1__CTL EQU CYREG_PRT6_CTL
-SCSI_Out_DBx__DB1__DM0 EQU CYREG_PRT6_DM0
-SCSI_Out_DBx__DB1__DM1 EQU CYREG_PRT6_DM1
-SCSI_Out_DBx__DB1__DM2 EQU CYREG_PRT6_DM2
-SCSI_Out_DBx__DB1__DR EQU CYREG_PRT6_DR
-SCSI_Out_DBx__DB1__INP_DIS EQU CYREG_PRT6_INP_DIS
-SCSI_Out_DBx__DB1__INTTYPE EQU CYREG_PICU6_INTTYPE5
-SCSI_Out_DBx__DB1__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
-SCSI_Out_DBx__DB1__LCD_EN EQU CYREG_PRT6_LCD_EN
-SCSI_Out_DBx__DB1__MASK EQU 0x20
-SCSI_Out_DBx__DB1__PC EQU CYREG_PRT6_PC5
-SCSI_Out_DBx__DB1__PORT EQU 6
-SCSI_Out_DBx__DB1__PRT EQU CYREG_PRT6_PRT
-SCSI_Out_DBx__DB1__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
-SCSI_Out_DBx__DB1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
-SCSI_Out_DBx__DB1__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
-SCSI_Out_DBx__DB1__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
-SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
-SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
-SCSI_Out_DBx__DB1__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
-SCSI_Out_DBx__DB1__PS EQU CYREG_PRT6_PS
-SCSI_Out_DBx__DB1__SHIFT EQU 5
-SCSI_Out_DBx__DB1__SLW EQU CYREG_PRT6_SLW
-SCSI_Out_DBx__DB2__AG EQU CYREG_PRT12_AG
-SCSI_Out_DBx__DB2__BIE EQU CYREG_PRT12_BIE
-SCSI_Out_DBx__DB2__BIT_MASK EQU CYREG_PRT12_BIT_MASK
-SCSI_Out_DBx__DB2__BYP EQU CYREG_PRT12_BYP
-SCSI_Out_DBx__DB2__DM0 EQU CYREG_PRT12_DM0
-SCSI_Out_DBx__DB2__DM1 EQU CYREG_PRT12_DM1
-SCSI_Out_DBx__DB2__DM2 EQU CYREG_PRT12_DM2
-SCSI_Out_DBx__DB2__DR EQU CYREG_PRT12_DR
-SCSI_Out_DBx__DB2__INP_DIS EQU CYREG_PRT12_INP_DIS
-SCSI_Out_DBx__DB2__INTTYPE EQU CYREG_PICU12_INTTYPE5
-SCSI_Out_DBx__DB2__MASK EQU 0x20
-SCSI_Out_DBx__DB2__PC EQU CYREG_PRT12_PC5
-SCSI_Out_DBx__DB2__PORT EQU 12
-SCSI_Out_DBx__DB2__PRT EQU CYREG_PRT12_PRT
-SCSI_Out_DBx__DB2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN
-SCSI_Out_DBx__DB2__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0
-SCSI_Out_DBx__DB2__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1
-SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0
-SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1
-SCSI_Out_DBx__DB2__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT
-SCSI_Out_DBx__DB2__PS EQU CYREG_PRT12_PS
-SCSI_Out_DBx__DB2__SHIFT EQU 5
-SCSI_Out_DBx__DB2__SIO_CFG EQU CYREG_PRT12_SIO_CFG
-SCSI_Out_DBx__DB2__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF
-SCSI_Out_DBx__DB2__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN
-SCSI_Out_DBx__DB2__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ
-SCSI_Out_DBx__DB2__SLW EQU CYREG_PRT12_SLW
-SCSI_Out_DBx__DB3__AG EQU CYREG_PRT2_AG
-SCSI_Out_DBx__DB3__AMUX EQU CYREG_PRT2_AMUX
-SCSI_Out_DBx__DB3__BIE EQU CYREG_PRT2_BIE
-SCSI_Out_DBx__DB3__BIT_MASK EQU CYREG_PRT2_BIT_MASK
-SCSI_Out_DBx__DB3__BYP EQU CYREG_PRT2_BYP
-SCSI_Out_DBx__DB3__CTL EQU CYREG_PRT2_CTL
-SCSI_Out_DBx__DB3__DM0 EQU CYREG_PRT2_DM0
-SCSI_Out_DBx__DB3__DM1 EQU CYREG_PRT2_DM1
-SCSI_Out_DBx__DB3__DM2 EQU CYREG_PRT2_DM2
-SCSI_Out_DBx__DB3__DR EQU CYREG_PRT2_DR
-SCSI_Out_DBx__DB3__INP_DIS EQU CYREG_PRT2_INP_DIS
-SCSI_Out_DBx__DB3__INTTYPE EQU CYREG_PICU2_INTTYPE7
-SCSI_Out_DBx__DB3__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
-SCSI_Out_DBx__DB3__LCD_EN EQU CYREG_PRT2_LCD_EN
-SCSI_Out_DBx__DB3__MASK EQU 0x80
-SCSI_Out_DBx__DB3__PC EQU CYREG_PRT2_PC7
-SCSI_Out_DBx__DB3__PORT EQU 2
-SCSI_Out_DBx__DB3__PRT EQU CYREG_PRT2_PRT
-SCSI_Out_DBx__DB3__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
-SCSI_Out_DBx__DB3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
-SCSI_Out_DBx__DB3__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
-SCSI_Out_DBx__DB3__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
-SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
-SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
-SCSI_Out_DBx__DB3__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
-SCSI_Out_DBx__DB3__PS EQU CYREG_PRT2_PS
-SCSI_Out_DBx__DB3__SHIFT EQU 7
-SCSI_Out_DBx__DB3__SLW EQU CYREG_PRT2_SLW
-SCSI_Out_DBx__DB4__AG EQU CYREG_PRT2_AG
-SCSI_Out_DBx__DB4__AMUX EQU CYREG_PRT2_AMUX
-SCSI_Out_DBx__DB4__BIE EQU CYREG_PRT2_BIE
-SCSI_Out_DBx__DB4__BIT_MASK EQU CYREG_PRT2_BIT_MASK
-SCSI_Out_DBx__DB4__BYP EQU CYREG_PRT2_BYP
-SCSI_Out_DBx__DB4__CTL EQU CYREG_PRT2_CTL
-SCSI_Out_DBx__DB4__DM0 EQU CYREG_PRT2_DM0
-SCSI_Out_DBx__DB4__DM1 EQU CYREG_PRT2_DM1
-SCSI_Out_DBx__DB4__DM2 EQU CYREG_PRT2_DM2
-SCSI_Out_DBx__DB4__DR EQU CYREG_PRT2_DR
-SCSI_Out_DBx__DB4__INP_DIS EQU CYREG_PRT2_INP_DIS
-SCSI_Out_DBx__DB4__INTTYPE EQU CYREG_PICU2_INTTYPE5
-SCSI_Out_DBx__DB4__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
-SCSI_Out_DBx__DB4__LCD_EN EQU CYREG_PRT2_LCD_EN
-SCSI_Out_DBx__DB4__MASK EQU 0x20
-SCSI_Out_DBx__DB4__PC EQU CYREG_PRT2_PC5
-SCSI_Out_DBx__DB4__PORT EQU 2
-SCSI_Out_DBx__DB4__PRT EQU CYREG_PRT2_PRT
-SCSI_Out_DBx__DB4__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
-SCSI_Out_DBx__DB4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
-SCSI_Out_DBx__DB4__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
-SCSI_Out_DBx__DB4__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
-SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
-SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
-SCSI_Out_DBx__DB4__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
-SCSI_Out_DBx__DB4__PS EQU CYREG_PRT2_PS
-SCSI_Out_DBx__DB4__SHIFT EQU 5
-SCSI_Out_DBx__DB4__SLW EQU CYREG_PRT2_SLW
-SCSI_Out_DBx__DB5__AG EQU CYREG_PRT2_AG
-SCSI_Out_DBx__DB5__AMUX EQU CYREG_PRT2_AMUX
-SCSI_Out_DBx__DB5__BIE EQU CYREG_PRT2_BIE
-SCSI_Out_DBx__DB5__BIT_MASK EQU CYREG_PRT2_BIT_MASK
-SCSI_Out_DBx__DB5__BYP EQU CYREG_PRT2_BYP
-SCSI_Out_DBx__DB5__CTL EQU CYREG_PRT2_CTL
-SCSI_Out_DBx__DB5__DM0 EQU CYREG_PRT2_DM0
-SCSI_Out_DBx__DB5__DM1 EQU CYREG_PRT2_DM1
-SCSI_Out_DBx__DB5__DM2 EQU CYREG_PRT2_DM2
-SCSI_Out_DBx__DB5__DR EQU CYREG_PRT2_DR
-SCSI_Out_DBx__DB5__INP_DIS EQU CYREG_PRT2_INP_DIS
-SCSI_Out_DBx__DB5__INTTYPE EQU CYREG_PICU2_INTTYPE3
-SCSI_Out_DBx__DB5__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
-SCSI_Out_DBx__DB5__LCD_EN EQU CYREG_PRT2_LCD_EN
-SCSI_Out_DBx__DB5__MASK EQU 0x08
-SCSI_Out_DBx__DB5__PC EQU CYREG_PRT2_PC3
-SCSI_Out_DBx__DB5__PORT EQU 2
-SCSI_Out_DBx__DB5__PRT EQU CYREG_PRT2_PRT
-SCSI_Out_DBx__DB5__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
-SCSI_Out_DBx__DB5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
-SCSI_Out_DBx__DB5__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
-SCSI_Out_DBx__DB5__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
-SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
-SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
-SCSI_Out_DBx__DB5__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
-SCSI_Out_DBx__DB5__PS EQU CYREG_PRT2_PS
-SCSI_Out_DBx__DB5__SHIFT EQU 3
-SCSI_Out_DBx__DB5__SLW EQU CYREG_PRT2_SLW
-SCSI_Out_DBx__DB6__AG EQU CYREG_PRT2_AG
-SCSI_Out_DBx__DB6__AMUX EQU CYREG_PRT2_AMUX
-SCSI_Out_DBx__DB6__BIE EQU CYREG_PRT2_BIE
-SCSI_Out_DBx__DB6__BIT_MASK EQU CYREG_PRT2_BIT_MASK
-SCSI_Out_DBx__DB6__BYP EQU CYREG_PRT2_BYP
-SCSI_Out_DBx__DB6__CTL EQU CYREG_PRT2_CTL
-SCSI_Out_DBx__DB6__DM0 EQU CYREG_PRT2_DM0
-SCSI_Out_DBx__DB6__DM1 EQU CYREG_PRT2_DM1
-SCSI_Out_DBx__DB6__DM2 EQU CYREG_PRT2_DM2
-SCSI_Out_DBx__DB6__DR EQU CYREG_PRT2_DR
-SCSI_Out_DBx__DB6__INP_DIS EQU CYREG_PRT2_INP_DIS
-SCSI_Out_DBx__DB6__INTTYPE EQU CYREG_PICU2_INTTYPE1
-SCSI_Out_DBx__DB6__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
-SCSI_Out_DBx__DB6__LCD_EN EQU CYREG_PRT2_LCD_EN
-SCSI_Out_DBx__DB6__MASK EQU 0x02
-SCSI_Out_DBx__DB6__PC EQU CYREG_PRT2_PC1
-SCSI_Out_DBx__DB6__PORT EQU 2
-SCSI_Out_DBx__DB6__PRT EQU CYREG_PRT2_PRT
-SCSI_Out_DBx__DB6__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
-SCSI_Out_DBx__DB6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
-SCSI_Out_DBx__DB6__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
-SCSI_Out_DBx__DB6__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
-SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
-SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
-SCSI_Out_DBx__DB6__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
-SCSI_Out_DBx__DB6__PS EQU CYREG_PRT2_PS
-SCSI_Out_DBx__DB6__SHIFT EQU 1
-SCSI_Out_DBx__DB6__SLW EQU CYREG_PRT2_SLW
-SCSI_Out_DBx__DB7__AG EQU CYREG_PRT15_AG
-SCSI_Out_DBx__DB7__AMUX EQU CYREG_PRT15_AMUX
-SCSI_Out_DBx__DB7__BIE EQU CYREG_PRT15_BIE
-SCSI_Out_DBx__DB7__BIT_MASK EQU CYREG_PRT15_BIT_MASK
-SCSI_Out_DBx__DB7__BYP EQU CYREG_PRT15_BYP
-SCSI_Out_DBx__DB7__CTL EQU CYREG_PRT15_CTL
-SCSI_Out_DBx__DB7__DM0 EQU CYREG_PRT15_DM0
-SCSI_Out_DBx__DB7__DM1 EQU CYREG_PRT15_DM1
-SCSI_Out_DBx__DB7__DM2 EQU CYREG_PRT15_DM2
-SCSI_Out_DBx__DB7__DR EQU CYREG_PRT15_DR
-SCSI_Out_DBx__DB7__INP_DIS EQU CYREG_PRT15_INP_DIS
-SCSI_Out_DBx__DB7__INTTYPE EQU CYREG_PICU15_INTTYPE5
-SCSI_Out_DBx__DB7__LCD_COM_SEG EQU CYREG_PRT15_LCD_COM_SEG
-SCSI_Out_DBx__DB7__LCD_EN EQU CYREG_PRT15_LCD_EN
-SCSI_Out_DBx__DB7__MASK EQU 0x20
-SCSI_Out_DBx__DB7__PC EQU CYREG_IO_PC_PRT15_PC5
-SCSI_Out_DBx__DB7__PORT EQU 15
-SCSI_Out_DBx__DB7__PRT EQU CYREG_PRT15_PRT
-SCSI_Out_DBx__DB7__PRTDSI__CAPS_SEL EQU CYREG_PRT15_CAPS_SEL
-SCSI_Out_DBx__DB7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT15_DBL_SYNC_IN
-SCSI_Out_DBx__DB7__PRTDSI__OE_SEL0 EQU CYREG_PRT15_OE_SEL0
-SCSI_Out_DBx__DB7__PRTDSI__OE_SEL1 EQU CYREG_PRT15_OE_SEL1
-SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL0 EQU CYREG_PRT15_OUT_SEL0
-SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL1 EQU CYREG_PRT15_OUT_SEL1
-SCSI_Out_DBx__DB7__PRTDSI__SYNC_OUT EQU CYREG_PRT15_SYNC_OUT
-SCSI_Out_DBx__DB7__PS EQU CYREG_PRT15_PS
-SCSI_Out_DBx__DB7__SHIFT EQU 5
-SCSI_Out_DBx__DB7__SLW EQU CYREG_PRT15_SLW
-
-; SCSI_Parity_Error
-SCSI_Parity_Error_sts_sts_reg__0__MASK EQU 0x01
-SCSI_Parity_Error_sts_sts_reg__0__POS EQU 0
-SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB02_03_ACTL
-SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_REG EQU CYREG_B0_UDB02_03_ST
-SCSI_Parity_Error_sts_sts_reg__MASK EQU 0x01
-SCSI_Parity_Error_sts_sts_reg__MASK_REG EQU CYREG_B0_UDB02_MSK
-SCSI_Parity_Error_sts_sts_reg__MASK_ST_AUX_CTL_REG EQU CYREG_B0_UDB02_MSK_ACTL
-SCSI_Parity_Error_sts_sts_reg__PER_ST_AUX_CTL_REG EQU CYREG_B0_UDB02_MSK_ACTL
-SCSI_Parity_Error_sts_sts_reg__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB02_ACTL
-SCSI_Parity_Error_sts_sts_reg__STATUS_CNT_REG EQU CYREG_B0_UDB02_ST_CTL
-SCSI_Parity_Error_sts_sts_reg__STATUS_CONTROL_REG EQU CYREG_B0_UDB02_ST_CTL
-SCSI_Parity_Error_sts_sts_reg__STATUS_REG EQU CYREG_B0_UDB02_ST
-
-; SCSI_RST_ISR
-SCSI_RST_ISR__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0
-SCSI_RST_ISR__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0
-SCSI_RST_ISR__INTC_MASK EQU 0x02
-SCSI_RST_ISR__INTC_NUMBER EQU 1
-SCSI_RST_ISR__INTC_PRIOR_NUM EQU 7
-SCSI_RST_ISR__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_1
-SCSI_RST_ISR__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0
-SCSI_RST_ISR__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0
-
-; SCSI_RX_DMA
-SCSI_RX_DMA__DRQ_CTL EQU CYREG_IDMUX_DRQ_CTL0
-SCSI_RX_DMA__DRQ_NUMBER EQU 0
-SCSI_RX_DMA__NUMBEROF_TDS EQU 0
-SCSI_RX_DMA__PRIORITY EQU 2
-SCSI_RX_DMA__TERMIN_EN EQU 0
-SCSI_RX_DMA__TERMIN_SEL EQU 0
-SCSI_RX_DMA__TERMOUT0_EN EQU 1
-SCSI_RX_DMA__TERMOUT0_SEL EQU 0
-SCSI_RX_DMA__TERMOUT1_EN EQU 0
-SCSI_RX_DMA__TERMOUT1_SEL EQU 0
-SCSI_RX_DMA_COMPLETE__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0
-SCSI_RX_DMA_COMPLETE__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0
-SCSI_RX_DMA_COMPLETE__INTC_MASK EQU 0x04
-SCSI_RX_DMA_COMPLETE__INTC_NUMBER EQU 2
-SCSI_RX_DMA_COMPLETE__INTC_PRIOR_NUM EQU 7
-SCSI_RX_DMA_COMPLETE__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_2
-SCSI_RX_DMA_COMPLETE__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0
-SCSI_RX_DMA_COMPLETE__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0
-
-; SCSI_SEL_ISR
-SCSI_SEL_ISR__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0
-SCSI_SEL_ISR__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0
-SCSI_SEL_ISR__INTC_MASK EQU 0x08
-SCSI_SEL_ISR__INTC_NUMBER EQU 3
-SCSI_SEL_ISR__INTC_PRIOR_NUM EQU 7
-SCSI_SEL_ISR__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_3
-SCSI_SEL_ISR__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0
-SCSI_SEL_ISR__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0
-
-; SCSI_TX_DMA
-SCSI_TX_DMA__DRQ_CTL EQU CYREG_IDMUX_DRQ_CTL0
-SCSI_TX_DMA__DRQ_NUMBER EQU 1
-SCSI_TX_DMA__NUMBEROF_TDS EQU 0
-SCSI_TX_DMA__PRIORITY EQU 2
-SCSI_TX_DMA__TERMIN_EN EQU 0
-SCSI_TX_DMA__TERMIN_SEL EQU 0
-SCSI_TX_DMA__TERMOUT0_EN EQU 1
-SCSI_TX_DMA__TERMOUT0_SEL EQU 1
-SCSI_TX_DMA__TERMOUT1_EN EQU 0
-SCSI_TX_DMA__TERMOUT1_SEL EQU 0
-SCSI_TX_DMA_COMPLETE__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0
-SCSI_TX_DMA_COMPLETE__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0
-SCSI_TX_DMA_COMPLETE__INTC_MASK EQU 0x10
-SCSI_TX_DMA_COMPLETE__INTC_NUMBER EQU 4
-SCSI_TX_DMA_COMPLETE__INTC_PRIOR_NUM EQU 7
-SCSI_TX_DMA_COMPLETE__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_4
-SCSI_TX_DMA_COMPLETE__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0
-SCSI_TX_DMA_COMPLETE__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0
-
-; SDCard_BSPIM
-SDCard_BSPIM_BitCounter__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B1_UDB04_05_ACTL
-SDCard_BSPIM_BitCounter__16BIT_CONTROL_CONTROL_REG EQU CYREG_B1_UDB04_05_CTL
-SDCard_BSPIM_BitCounter__16BIT_CONTROL_COUNT_REG EQU CYREG_B1_UDB04_05_CTL
-SDCard_BSPIM_BitCounter__16BIT_COUNT_CONTROL_REG EQU CYREG_B1_UDB04_05_CTL
-SDCard_BSPIM_BitCounter__16BIT_COUNT_COUNT_REG EQU CYREG_B1_UDB04_05_CTL
-SDCard_BSPIM_BitCounter__16BIT_MASK_MASK_REG EQU CYREG_B1_UDB04_05_MSK
-SDCard_BSPIM_BitCounter__16BIT_MASK_PERIOD_REG EQU CYREG_B1_UDB04_05_MSK
-SDCard_BSPIM_BitCounter__16BIT_PERIOD_MASK_REG EQU CYREG_B1_UDB04_05_MSK
-SDCard_BSPIM_BitCounter__16BIT_PERIOD_PERIOD_REG EQU CYREG_B1_UDB04_05_MSK
-SDCard_BSPIM_BitCounter__CONTROL_AUX_CTL_REG EQU CYREG_B1_UDB04_ACTL
-SDCard_BSPIM_BitCounter__CONTROL_REG EQU CYREG_B1_UDB04_CTL
-SDCard_BSPIM_BitCounter__CONTROL_ST_REG EQU CYREG_B1_UDB04_ST_CTL
-SDCard_BSPIM_BitCounter__COUNT_REG EQU CYREG_B1_UDB04_CTL
-SDCard_BSPIM_BitCounter__COUNT_ST_REG EQU CYREG_B1_UDB04_ST_CTL
-SDCard_BSPIM_BitCounter__MASK_CTL_AUX_CTL_REG EQU CYREG_B1_UDB04_MSK_ACTL
-SDCard_BSPIM_BitCounter__PER_CTL_AUX_CTL_REG EQU CYREG_B1_UDB04_MSK_ACTL
-SDCard_BSPIM_BitCounter__PERIOD_REG EQU CYREG_B1_UDB04_MSK
-SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B1_UDB04_05_ACTL
-SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_REG EQU CYREG_B1_UDB04_05_ST
-SDCard_BSPIM_BitCounter_ST__MASK_REG EQU CYREG_B1_UDB04_MSK
-SDCard_BSPIM_BitCounter_ST__MASK_ST_AUX_CTL_REG EQU CYREG_B1_UDB04_MSK_ACTL
-SDCard_BSPIM_BitCounter_ST__PER_ST_AUX_CTL_REG EQU CYREG_B1_UDB04_MSK_ACTL
-SDCard_BSPIM_BitCounter_ST__STATUS_AUX_CTL_REG EQU CYREG_B1_UDB04_ACTL
-SDCard_BSPIM_BitCounter_ST__STATUS_CNT_REG EQU CYREG_B1_UDB04_ST_CTL
-SDCard_BSPIM_BitCounter_ST__STATUS_CONTROL_REG EQU CYREG_B1_UDB04_ST_CTL
-SDCard_BSPIM_BitCounter_ST__STATUS_REG EQU CYREG_B1_UDB04_ST
-SDCard_BSPIM_RxStsReg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB07_08_ACTL
-SDCard_BSPIM_RxStsReg__16BIT_STATUS_REG EQU CYREG_B0_UDB07_08_ST
-SDCard_BSPIM_RxStsReg__4__MASK EQU 0x10
-SDCard_BSPIM_RxStsReg__4__POS EQU 4
-SDCard_BSPIM_RxStsReg__5__MASK EQU 0x20
-SDCard_BSPIM_RxStsReg__5__POS EQU 5
-SDCard_BSPIM_RxStsReg__6__MASK EQU 0x40
-SDCard_BSPIM_RxStsReg__6__POS EQU 6
-SDCard_BSPIM_RxStsReg__MASK EQU 0x70
-SDCard_BSPIM_RxStsReg__MASK_REG EQU CYREG_B0_UDB07_MSK
-SDCard_BSPIM_RxStsReg__MASK_ST_AUX_CTL_REG EQU CYREG_B0_UDB07_MSK_ACTL
-SDCard_BSPIM_RxStsReg__PER_ST_AUX_CTL_REG EQU CYREG_B0_UDB07_MSK_ACTL
-SDCard_BSPIM_RxStsReg__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB07_ACTL
-SDCard_BSPIM_RxStsReg__STATUS_CNT_REG EQU CYREG_B0_UDB07_ST_CTL
-SDCard_BSPIM_RxStsReg__STATUS_CONTROL_REG EQU CYREG_B0_UDB07_ST_CTL
-SDCard_BSPIM_RxStsReg__STATUS_REG EQU CYREG_B0_UDB07_ST
-SDCard_BSPIM_sR8_Dp_u0__16BIT_A0_REG EQU CYREG_B1_UDB04_05_A0
-SDCard_BSPIM_sR8_Dp_u0__16BIT_A1_REG EQU CYREG_B1_UDB04_05_A1
-SDCard_BSPIM_sR8_Dp_u0__16BIT_D0_REG EQU CYREG_B1_UDB04_05_D0
-SDCard_BSPIM_sR8_Dp_u0__16BIT_D1_REG EQU CYREG_B1_UDB04_05_D1
-SDCard_BSPIM_sR8_Dp_u0__16BIT_DP_AUX_CTL_REG EQU CYREG_B1_UDB04_05_ACTL
-SDCard_BSPIM_sR8_Dp_u0__16BIT_F0_REG EQU CYREG_B1_UDB04_05_F0
-SDCard_BSPIM_sR8_Dp_u0__16BIT_F1_REG EQU CYREG_B1_UDB04_05_F1
-SDCard_BSPIM_sR8_Dp_u0__A0_A1_REG EQU CYREG_B1_UDB04_A0_A1
-SDCard_BSPIM_sR8_Dp_u0__A0_REG EQU CYREG_B1_UDB04_A0
-SDCard_BSPIM_sR8_Dp_u0__A1_REG EQU CYREG_B1_UDB04_A1
-SDCard_BSPIM_sR8_Dp_u0__D0_D1_REG EQU CYREG_B1_UDB04_D0_D1
-SDCard_BSPIM_sR8_Dp_u0__D0_REG EQU CYREG_B1_UDB04_D0
-SDCard_BSPIM_sR8_Dp_u0__D1_REG EQU CYREG_B1_UDB04_D1
-SDCard_BSPIM_sR8_Dp_u0__DP_AUX_CTL_REG EQU CYREG_B1_UDB04_ACTL
-SDCard_BSPIM_sR8_Dp_u0__F0_F1_REG EQU CYREG_B1_UDB04_F0_F1
-SDCard_BSPIM_sR8_Dp_u0__F0_REG EQU CYREG_B1_UDB04_F0
-SDCard_BSPIM_sR8_Dp_u0__F1_REG EQU CYREG_B1_UDB04_F1
-SDCard_BSPIM_sR8_Dp_u0__MSK_DP_AUX_CTL_REG EQU CYREG_B1_UDB04_MSK_ACTL
-SDCard_BSPIM_sR8_Dp_u0__PER_DP_AUX_CTL_REG EQU CYREG_B1_UDB04_MSK_ACTL
-SDCard_BSPIM_TxStsReg__0__MASK EQU 0x01
-SDCard_BSPIM_TxStsReg__0__POS EQU 0
-SDCard_BSPIM_TxStsReg__1__MASK EQU 0x02
-SDCard_BSPIM_TxStsReg__1__POS EQU 1
-SDCard_BSPIM_TxStsReg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B1_UDB07_08_ACTL
-SDCard_BSPIM_TxStsReg__16BIT_STATUS_REG EQU CYREG_B1_UDB07_08_ST
-SDCard_BSPIM_TxStsReg__2__MASK EQU 0x04
-SDCard_BSPIM_TxStsReg__2__POS EQU 2
-SDCard_BSPIM_TxStsReg__3__MASK EQU 0x08
-SDCard_BSPIM_TxStsReg__3__POS EQU 3
-SDCard_BSPIM_TxStsReg__4__MASK EQU 0x10
-SDCard_BSPIM_TxStsReg__4__POS EQU 4
-SDCard_BSPIM_TxStsReg__MASK EQU 0x1F
-SDCard_BSPIM_TxStsReg__MASK_REG EQU CYREG_B1_UDB07_MSK
-SDCard_BSPIM_TxStsReg__STATUS_AUX_CTL_REG EQU CYREG_B1_UDB07_ACTL
-SDCard_BSPIM_TxStsReg__STATUS_REG EQU CYREG_B1_UDB07_ST
-
-; SD_CS
-SD_CS__0__INTTYPE EQU CYREG_PICU3_INTTYPE5
-SD_CS__0__MASK EQU 0x20
-SD_CS__0__PC EQU CYREG_PRT3_PC5
-SD_CS__0__PORT EQU 3
-SD_CS__0__SHIFT EQU 5
-SD_CS__AG EQU CYREG_PRT3_AG
-SD_CS__AMUX EQU CYREG_PRT3_AMUX
-SD_CS__BIE EQU CYREG_PRT3_BIE
-SD_CS__BIT_MASK EQU CYREG_PRT3_BIT_MASK
-SD_CS__BYP EQU CYREG_PRT3_BYP
-SD_CS__CTL EQU CYREG_PRT3_CTL
-SD_CS__DM0 EQU CYREG_PRT3_DM0
-SD_CS__DM1 EQU CYREG_PRT3_DM1
-SD_CS__DM2 EQU CYREG_PRT3_DM2
-SD_CS__DR EQU CYREG_PRT3_DR
-SD_CS__INP_DIS EQU CYREG_PRT3_INP_DIS
-SD_CS__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU3_BASE
-SD_CS__LCD_COM_SEG EQU CYREG_PRT3_LCD_COM_SEG
-SD_CS__LCD_EN EQU CYREG_PRT3_LCD_EN
-SD_CS__MASK EQU 0x20
-SD_CS__PORT EQU 3
-SD_CS__PRT EQU CYREG_PRT3_PRT
-SD_CS__PRTDSI__CAPS_SEL EQU CYREG_PRT3_CAPS_SEL
-SD_CS__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT3_DBL_SYNC_IN
-SD_CS__PRTDSI__OE_SEL0 EQU CYREG_PRT3_OE_SEL0
-SD_CS__PRTDSI__OE_SEL1 EQU CYREG_PRT3_OE_SEL1
-SD_CS__PRTDSI__OUT_SEL0 EQU CYREG_PRT3_OUT_SEL0
-SD_CS__PRTDSI__OUT_SEL1 EQU CYREG_PRT3_OUT_SEL1
-SD_CS__PRTDSI__SYNC_OUT EQU CYREG_PRT3_SYNC_OUT
-SD_CS__PS EQU CYREG_PRT3_PS
-SD_CS__SHIFT EQU 5
-SD_CS__SLW EQU CYREG_PRT3_SLW
-
-; SD_Data_Clk
-SD_Data_Clk__CFG0 EQU CYREG_CLKDIST_DCFG0_CFG0
-SD_Data_Clk__CFG1 EQU CYREG_CLKDIST_DCFG0_CFG1
-SD_Data_Clk__CFG2 EQU CYREG_CLKDIST_DCFG0_CFG2
-SD_Data_Clk__CFG2_SRC_SEL_MASK EQU 0x07
-SD_Data_Clk__INDEX EQU 0x00
-SD_Data_Clk__PM_ACT_CFG EQU CYREG_PM_ACT_CFG2
-SD_Data_Clk__PM_ACT_MSK EQU 0x01
-SD_Data_Clk__PM_STBY_CFG EQU CYREG_PM_STBY_CFG2
-SD_Data_Clk__PM_STBY_MSK EQU 0x01
-
-; SD_MISO
-SD_MISO__0__INTTYPE EQU CYREG_PICU3_INTTYPE2
-SD_MISO__0__MASK EQU 0x04
-SD_MISO__0__PC EQU CYREG_PRT3_PC2
-SD_MISO__0__PORT EQU 3
-SD_MISO__0__SHIFT EQU 2
-SD_MISO__AG EQU CYREG_PRT3_AG
-SD_MISO__AMUX EQU CYREG_PRT3_AMUX
-SD_MISO__BIE EQU CYREG_PRT3_BIE
-SD_MISO__BIT_MASK EQU CYREG_PRT3_BIT_MASK
-SD_MISO__BYP EQU CYREG_PRT3_BYP
-SD_MISO__CTL EQU CYREG_PRT3_CTL
-SD_MISO__DM0 EQU CYREG_PRT3_DM0
-SD_MISO__DM1 EQU CYREG_PRT3_DM1
-SD_MISO__DM2 EQU CYREG_PRT3_DM2
-SD_MISO__DR EQU CYREG_PRT3_DR
-SD_MISO__INP_DIS EQU CYREG_PRT3_INP_DIS
-SD_MISO__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU3_BASE
-SD_MISO__LCD_COM_SEG EQU CYREG_PRT3_LCD_COM_SEG
-SD_MISO__LCD_EN EQU CYREG_PRT3_LCD_EN
-SD_MISO__MASK EQU 0x04
-SD_MISO__PORT EQU 3
-SD_MISO__PRT EQU CYREG_PRT3_PRT
-SD_MISO__PRTDSI__CAPS_SEL EQU CYREG_PRT3_CAPS_SEL
-SD_MISO__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT3_DBL_SYNC_IN
-SD_MISO__PRTDSI__OE_SEL0 EQU CYREG_PRT3_OE_SEL0
-SD_MISO__PRTDSI__OE_SEL1 EQU CYREG_PRT3_OE_SEL1
-SD_MISO__PRTDSI__OUT_SEL0 EQU CYREG_PRT3_OUT_SEL0
-SD_MISO__PRTDSI__OUT_SEL1 EQU CYREG_PRT3_OUT_SEL1
-SD_MISO__PRTDSI__SYNC_OUT EQU CYREG_PRT3_SYNC_OUT
-SD_MISO__PS EQU CYREG_PRT3_PS
-SD_MISO__SHIFT EQU 2
-SD_MISO__SLW EQU CYREG_PRT3_SLW
-
-; SD_MOSI
-SD_MOSI__0__INTTYPE EQU CYREG_PICU3_INTTYPE4
-SD_MOSI__0__MASK EQU 0x10
-SD_MOSI__0__PC EQU CYREG_PRT3_PC4
-SD_MOSI__0__PORT EQU 3
-SD_MOSI__0__SHIFT EQU 4
-SD_MOSI__AG EQU CYREG_PRT3_AG
-SD_MOSI__AMUX EQU CYREG_PRT3_AMUX
-SD_MOSI__BIE EQU CYREG_PRT3_BIE
-SD_MOSI__BIT_MASK EQU CYREG_PRT3_BIT_MASK
-SD_MOSI__BYP EQU CYREG_PRT3_BYP
-SD_MOSI__CTL EQU CYREG_PRT3_CTL
-SD_MOSI__DM0 EQU CYREG_PRT3_DM0
-SD_MOSI__DM1 EQU CYREG_PRT3_DM1
-SD_MOSI__DM2 EQU CYREG_PRT3_DM2
-SD_MOSI__DR EQU CYREG_PRT3_DR
-SD_MOSI__INP_DIS EQU CYREG_PRT3_INP_DIS
-SD_MOSI__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU3_BASE
-SD_MOSI__LCD_COM_SEG EQU CYREG_PRT3_LCD_COM_SEG
-SD_MOSI__LCD_EN EQU CYREG_PRT3_LCD_EN
-SD_MOSI__MASK EQU 0x10
-SD_MOSI__PORT EQU 3
-SD_MOSI__PRT EQU CYREG_PRT3_PRT
-SD_MOSI__PRTDSI__CAPS_SEL EQU CYREG_PRT3_CAPS_SEL
-SD_MOSI__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT3_DBL_SYNC_IN
-SD_MOSI__PRTDSI__OE_SEL0 EQU CYREG_PRT3_OE_SEL0
-SD_MOSI__PRTDSI__OE_SEL1 EQU CYREG_PRT3_OE_SEL1
-SD_MOSI__PRTDSI__OUT_SEL0 EQU CYREG_PRT3_OUT_SEL0
-SD_MOSI__PRTDSI__OUT_SEL1 EQU CYREG_PRT3_OUT_SEL1
-SD_MOSI__PRTDSI__SYNC_OUT EQU CYREG_PRT3_SYNC_OUT
-SD_MOSI__PS EQU CYREG_PRT3_PS
-SD_MOSI__SHIFT EQU 4
-SD_MOSI__SLW EQU CYREG_PRT3_SLW
-
-; SD_RX_DMA
-SD_RX_DMA__DRQ_CTL EQU CYREG_IDMUX_DRQ_CTL0
-SD_RX_DMA__DRQ_NUMBER EQU 2
-SD_RX_DMA__NUMBEROF_TDS EQU 0
-SD_RX_DMA__PRIORITY EQU 0
-SD_RX_DMA__TERMIN_EN EQU 0
-SD_RX_DMA__TERMIN_SEL EQU 0
-SD_RX_DMA__TERMOUT0_EN EQU 1
-SD_RX_DMA__TERMOUT0_SEL EQU 2
-SD_RX_DMA__TERMOUT1_EN EQU 0
-SD_RX_DMA__TERMOUT1_SEL EQU 0
-SD_RX_DMA_COMPLETE__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0
-SD_RX_DMA_COMPLETE__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0
-SD_RX_DMA_COMPLETE__INTC_MASK EQU 0x20
-SD_RX_DMA_COMPLETE__INTC_NUMBER EQU 5
-SD_RX_DMA_COMPLETE__INTC_PRIOR_NUM EQU 7
-SD_RX_DMA_COMPLETE__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_5
-SD_RX_DMA_COMPLETE__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0
-SD_RX_DMA_COMPLETE__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0
-
-; SD_SCK
-SD_SCK__0__INTTYPE EQU CYREG_PICU3_INTTYPE3
-SD_SCK__0__MASK EQU 0x08
-SD_SCK__0__PC EQU CYREG_PRT3_PC3
-SD_SCK__0__PORT EQU 3
-SD_SCK__0__SHIFT EQU 3
-SD_SCK__AG EQU CYREG_PRT3_AG
-SD_SCK__AMUX EQU CYREG_PRT3_AMUX
-SD_SCK__BIE EQU CYREG_PRT3_BIE
-SD_SCK__BIT_MASK EQU CYREG_PRT3_BIT_MASK
-SD_SCK__BYP EQU CYREG_PRT3_BYP
-SD_SCK__CTL EQU CYREG_PRT3_CTL
-SD_SCK__DM0 EQU CYREG_PRT3_DM0
-SD_SCK__DM1 EQU CYREG_PRT3_DM1
-SD_SCK__DM2 EQU CYREG_PRT3_DM2
-SD_SCK__DR EQU CYREG_PRT3_DR
-SD_SCK__INP_DIS EQU CYREG_PRT3_INP_DIS
-SD_SCK__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU3_BASE
-SD_SCK__LCD_COM_SEG EQU CYREG_PRT3_LCD_COM_SEG
-SD_SCK__LCD_EN EQU CYREG_PRT3_LCD_EN
-SD_SCK__MASK EQU 0x08
-SD_SCK__PORT EQU 3
-SD_SCK__PRT EQU CYREG_PRT3_PRT
-SD_SCK__PRTDSI__CAPS_SEL EQU CYREG_PRT3_CAPS_SEL
-SD_SCK__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT3_DBL_SYNC_IN
-SD_SCK__PRTDSI__OE_SEL0 EQU CYREG_PRT3_OE_SEL0
-SD_SCK__PRTDSI__OE_SEL1 EQU CYREG_PRT3_OE_SEL1
-SD_SCK__PRTDSI__OUT_SEL0 EQU CYREG_PRT3_OUT_SEL0
-SD_SCK__PRTDSI__OUT_SEL1 EQU CYREG_PRT3_OUT_SEL1
-SD_SCK__PRTDSI__SYNC_OUT EQU CYREG_PRT3_SYNC_OUT
-SD_SCK__PS EQU CYREG_PRT3_PS
-SD_SCK__SHIFT EQU 3
-SD_SCK__SLW EQU CYREG_PRT3_SLW
-
-; SD_TX_DMA
-SD_TX_DMA__DRQ_CTL EQU CYREG_IDMUX_DRQ_CTL0
-SD_TX_DMA__DRQ_NUMBER EQU 3
-SD_TX_DMA__NUMBEROF_TDS EQU 0
-SD_TX_DMA__PRIORITY EQU 1
-SD_TX_DMA__TERMIN_EN EQU 0
-SD_TX_DMA__TERMIN_SEL EQU 0
-SD_TX_DMA__TERMOUT0_EN EQU 1
-SD_TX_DMA__TERMOUT0_SEL EQU 3
-SD_TX_DMA__TERMOUT1_EN EQU 0
-SD_TX_DMA__TERMOUT1_SEL EQU 0
-SD_TX_DMA_COMPLETE__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0
-SD_TX_DMA_COMPLETE__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0
-SD_TX_DMA_COMPLETE__INTC_MASK EQU 0x40
-SD_TX_DMA_COMPLETE__INTC_NUMBER EQU 6
-SD_TX_DMA_COMPLETE__INTC_PRIOR_NUM EQU 7
-SD_TX_DMA_COMPLETE__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_6
-SD_TX_DMA_COMPLETE__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0
-SD_TX_DMA_COMPLETE__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0
-
-; TERM_EN
-TERM_EN__0__INTTYPE EQU CYREG_PICU15_INTTYPE3
-TERM_EN__0__MASK EQU 0x08
-TERM_EN__0__PC EQU CYREG_IO_PC_PRT15_PC3
-TERM_EN__0__PORT EQU 15
-TERM_EN__0__SHIFT EQU 3
-TERM_EN__AG EQU CYREG_PRT15_AG
-TERM_EN__AMUX EQU CYREG_PRT15_AMUX
-TERM_EN__BIE EQU CYREG_PRT15_BIE
-TERM_EN__BIT_MASK EQU CYREG_PRT15_BIT_MASK
-TERM_EN__BYP EQU CYREG_PRT15_BYP
-TERM_EN__CTL EQU CYREG_PRT15_CTL
-TERM_EN__DM0 EQU CYREG_PRT15_DM0
-TERM_EN__DM1 EQU CYREG_PRT15_DM1
-TERM_EN__DM2 EQU CYREG_PRT15_DM2
-TERM_EN__DR EQU CYREG_PRT15_DR
-TERM_EN__INP_DIS EQU CYREG_PRT15_INP_DIS
-TERM_EN__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU15_BASE
-TERM_EN__LCD_COM_SEG EQU CYREG_PRT15_LCD_COM_SEG
-TERM_EN__LCD_EN EQU CYREG_PRT15_LCD_EN
-TERM_EN__MASK EQU 0x08
-TERM_EN__PORT EQU 15
-TERM_EN__PRT EQU CYREG_PRT15_PRT
-TERM_EN__PRTDSI__CAPS_SEL EQU CYREG_PRT15_CAPS_SEL
-TERM_EN__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT15_DBL_SYNC_IN
-TERM_EN__PRTDSI__OE_SEL0 EQU CYREG_PRT15_OE_SEL0
-TERM_EN__PRTDSI__OE_SEL1 EQU CYREG_PRT15_OE_SEL1
-TERM_EN__PRTDSI__OUT_SEL0 EQU CYREG_PRT15_OUT_SEL0
-TERM_EN__PRTDSI__OUT_SEL1 EQU CYREG_PRT15_OUT_SEL1
-TERM_EN__PRTDSI__SYNC_OUT EQU CYREG_PRT15_SYNC_OUT
-TERM_EN__PS EQU CYREG_PRT15_PS
-TERM_EN__SHIFT EQU 3
-TERM_EN__SLW EQU CYREG_PRT15_SLW
+; SD_CS
+SD_CS__0__INTTYPE EQU CYREG_PICU3_INTTYPE5
+SD_CS__0__MASK EQU 0x20
+SD_CS__0__PC EQU CYREG_PRT3_PC5
+SD_CS__0__PORT EQU 3
+SD_CS__0__SHIFT EQU 5
+SD_CS__AG EQU CYREG_PRT3_AG
+SD_CS__AMUX EQU CYREG_PRT3_AMUX
+SD_CS__BIE EQU CYREG_PRT3_BIE
+SD_CS__BIT_MASK EQU CYREG_PRT3_BIT_MASK
+SD_CS__BYP EQU CYREG_PRT3_BYP
+SD_CS__CTL EQU CYREG_PRT3_CTL
+SD_CS__DM0 EQU CYREG_PRT3_DM0
+SD_CS__DM1 EQU CYREG_PRT3_DM1
+SD_CS__DM2 EQU CYREG_PRT3_DM2
+SD_CS__DR EQU CYREG_PRT3_DR
+SD_CS__INP_DIS EQU CYREG_PRT3_INP_DIS
+SD_CS__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU3_BASE
+SD_CS__LCD_COM_SEG EQU CYREG_PRT3_LCD_COM_SEG
+SD_CS__LCD_EN EQU CYREG_PRT3_LCD_EN
+SD_CS__MASK EQU 0x20
+SD_CS__PORT EQU 3
+SD_CS__PRT EQU CYREG_PRT3_PRT
+SD_CS__PRTDSI__CAPS_SEL EQU CYREG_PRT3_CAPS_SEL
+SD_CS__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT3_DBL_SYNC_IN
+SD_CS__PRTDSI__OE_SEL0 EQU CYREG_PRT3_OE_SEL0
+SD_CS__PRTDSI__OE_SEL1 EQU CYREG_PRT3_OE_SEL1
+SD_CS__PRTDSI__OUT_SEL0 EQU CYREG_PRT3_OUT_SEL0
+SD_CS__PRTDSI__OUT_SEL1 EQU CYREG_PRT3_OUT_SEL1
+SD_CS__PRTDSI__SYNC_OUT EQU CYREG_PRT3_SYNC_OUT
+SD_CS__PS EQU CYREG_PRT3_PS
+SD_CS__SHIFT EQU 5
+SD_CS__SLW EQU CYREG_PRT3_SLW
; USBFS
USBFS_arb_int__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0
USBFS_USB__USBIO_CR0 EQU CYREG_USB_USBIO_CR0
USBFS_USB__USBIO_CR1 EQU CYREG_USB_USBIO_CR1
+; SDCard
+SDCard_BSPIM_BitCounter__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B1_UDB04_05_ACTL
+SDCard_BSPIM_BitCounter__16BIT_CONTROL_CONTROL_REG EQU CYREG_B1_UDB04_05_CTL
+SDCard_BSPIM_BitCounter__16BIT_CONTROL_COUNT_REG EQU CYREG_B1_UDB04_05_CTL
+SDCard_BSPIM_BitCounter__16BIT_COUNT_CONTROL_REG EQU CYREG_B1_UDB04_05_CTL
+SDCard_BSPIM_BitCounter__16BIT_COUNT_COUNT_REG EQU CYREG_B1_UDB04_05_CTL
+SDCard_BSPIM_BitCounter__16BIT_MASK_MASK_REG EQU CYREG_B1_UDB04_05_MSK
+SDCard_BSPIM_BitCounter__16BIT_MASK_PERIOD_REG EQU CYREG_B1_UDB04_05_MSK
+SDCard_BSPIM_BitCounter__16BIT_PERIOD_MASK_REG EQU CYREG_B1_UDB04_05_MSK
+SDCard_BSPIM_BitCounter__16BIT_PERIOD_PERIOD_REG EQU CYREG_B1_UDB04_05_MSK
+SDCard_BSPIM_BitCounter__CONTROL_AUX_CTL_REG EQU CYREG_B1_UDB04_ACTL
+SDCard_BSPIM_BitCounter__CONTROL_REG EQU CYREG_B1_UDB04_CTL
+SDCard_BSPIM_BitCounter__CONTROL_ST_REG EQU CYREG_B1_UDB04_ST_CTL
+SDCard_BSPIM_BitCounter__COUNT_REG EQU CYREG_B1_UDB04_CTL
+SDCard_BSPIM_BitCounter__COUNT_ST_REG EQU CYREG_B1_UDB04_ST_CTL
+SDCard_BSPIM_BitCounter__MASK_CTL_AUX_CTL_REG EQU CYREG_B1_UDB04_MSK_ACTL
+SDCard_BSPIM_BitCounter__PER_CTL_AUX_CTL_REG EQU CYREG_B1_UDB04_MSK_ACTL
+SDCard_BSPIM_BitCounter__PERIOD_REG EQU CYREG_B1_UDB04_MSK
+SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B1_UDB04_05_ACTL
+SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_REG EQU CYREG_B1_UDB04_05_ST
+SDCard_BSPIM_BitCounter_ST__MASK_REG EQU CYREG_B1_UDB04_MSK
+SDCard_BSPIM_BitCounter_ST__MASK_ST_AUX_CTL_REG EQU CYREG_B1_UDB04_MSK_ACTL
+SDCard_BSPIM_BitCounter_ST__PER_ST_AUX_CTL_REG EQU CYREG_B1_UDB04_MSK_ACTL
+SDCard_BSPIM_BitCounter_ST__STATUS_AUX_CTL_REG EQU CYREG_B1_UDB04_ACTL
+SDCard_BSPIM_BitCounter_ST__STATUS_CNT_REG EQU CYREG_B1_UDB04_ST_CTL
+SDCard_BSPIM_BitCounter_ST__STATUS_CONTROL_REG EQU CYREG_B1_UDB04_ST_CTL
+SDCard_BSPIM_BitCounter_ST__STATUS_REG EQU CYREG_B1_UDB04_ST
+SDCard_BSPIM_RxStsReg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB07_08_ACTL
+SDCard_BSPIM_RxStsReg__16BIT_STATUS_REG EQU CYREG_B0_UDB07_08_ST
+SDCard_BSPIM_RxStsReg__4__MASK EQU 0x10
+SDCard_BSPIM_RxStsReg__4__POS EQU 4
+SDCard_BSPIM_RxStsReg__5__MASK EQU 0x20
+SDCard_BSPIM_RxStsReg__5__POS EQU 5
+SDCard_BSPIM_RxStsReg__6__MASK EQU 0x40
+SDCard_BSPIM_RxStsReg__6__POS EQU 6
+SDCard_BSPIM_RxStsReg__MASK EQU 0x70
+SDCard_BSPIM_RxStsReg__MASK_REG EQU CYREG_B0_UDB07_MSK
+SDCard_BSPIM_RxStsReg__MASK_ST_AUX_CTL_REG EQU CYREG_B0_UDB07_MSK_ACTL
+SDCard_BSPIM_RxStsReg__PER_ST_AUX_CTL_REG EQU CYREG_B0_UDB07_MSK_ACTL
+SDCard_BSPIM_RxStsReg__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB07_ACTL
+SDCard_BSPIM_RxStsReg__STATUS_CNT_REG EQU CYREG_B0_UDB07_ST_CTL
+SDCard_BSPIM_RxStsReg__STATUS_CONTROL_REG EQU CYREG_B0_UDB07_ST_CTL
+SDCard_BSPIM_RxStsReg__STATUS_REG EQU CYREG_B0_UDB07_ST
+SDCard_BSPIM_sR8_Dp_u0__16BIT_A0_REG EQU CYREG_B1_UDB04_05_A0
+SDCard_BSPIM_sR8_Dp_u0__16BIT_A1_REG EQU CYREG_B1_UDB04_05_A1
+SDCard_BSPIM_sR8_Dp_u0__16BIT_D0_REG EQU CYREG_B1_UDB04_05_D0
+SDCard_BSPIM_sR8_Dp_u0__16BIT_D1_REG EQU CYREG_B1_UDB04_05_D1
+SDCard_BSPIM_sR8_Dp_u0__16BIT_DP_AUX_CTL_REG EQU CYREG_B1_UDB04_05_ACTL
+SDCard_BSPIM_sR8_Dp_u0__16BIT_F0_REG EQU CYREG_B1_UDB04_05_F0
+SDCard_BSPIM_sR8_Dp_u0__16BIT_F1_REG EQU CYREG_B1_UDB04_05_F1
+SDCard_BSPIM_sR8_Dp_u0__A0_A1_REG EQU CYREG_B1_UDB04_A0_A1
+SDCard_BSPIM_sR8_Dp_u0__A0_REG EQU CYREG_B1_UDB04_A0
+SDCard_BSPIM_sR8_Dp_u0__A1_REG EQU CYREG_B1_UDB04_A1
+SDCard_BSPIM_sR8_Dp_u0__D0_D1_REG EQU CYREG_B1_UDB04_D0_D1
+SDCard_BSPIM_sR8_Dp_u0__D0_REG EQU CYREG_B1_UDB04_D0
+SDCard_BSPIM_sR8_Dp_u0__D1_REG EQU CYREG_B1_UDB04_D1
+SDCard_BSPIM_sR8_Dp_u0__DP_AUX_CTL_REG EQU CYREG_B1_UDB04_ACTL
+SDCard_BSPIM_sR8_Dp_u0__F0_F1_REG EQU CYREG_B1_UDB04_F0_F1
+SDCard_BSPIM_sR8_Dp_u0__F0_REG EQU CYREG_B1_UDB04_F0
+SDCard_BSPIM_sR8_Dp_u0__F1_REG EQU CYREG_B1_UDB04_F1
+SDCard_BSPIM_sR8_Dp_u0__MSK_DP_AUX_CTL_REG EQU CYREG_B1_UDB04_MSK_ACTL
+SDCard_BSPIM_sR8_Dp_u0__PER_DP_AUX_CTL_REG EQU CYREG_B1_UDB04_MSK_ACTL
+SDCard_BSPIM_TxStsReg__0__MASK EQU 0x01
+SDCard_BSPIM_TxStsReg__0__POS EQU 0
+SDCard_BSPIM_TxStsReg__1__MASK EQU 0x02
+SDCard_BSPIM_TxStsReg__1__POS EQU 1
+SDCard_BSPIM_TxStsReg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B1_UDB07_08_ACTL
+SDCard_BSPIM_TxStsReg__16BIT_STATUS_REG EQU CYREG_B1_UDB07_08_ST
+SDCard_BSPIM_TxStsReg__2__MASK EQU 0x04
+SDCard_BSPIM_TxStsReg__2__POS EQU 2
+SDCard_BSPIM_TxStsReg__3__MASK EQU 0x08
+SDCard_BSPIM_TxStsReg__3__POS EQU 3
+SDCard_BSPIM_TxStsReg__4__MASK EQU 0x10
+SDCard_BSPIM_TxStsReg__4__POS EQU 4
+SDCard_BSPIM_TxStsReg__MASK EQU 0x1F
+SDCard_BSPIM_TxStsReg__MASK_REG EQU CYREG_B1_UDB07_MSK
+SDCard_BSPIM_TxStsReg__STATUS_AUX_CTL_REG EQU CYREG_B1_UDB07_ACTL
+SDCard_BSPIM_TxStsReg__STATUS_REG EQU CYREG_B1_UDB07_ST
+
+; SD_SCK
+SD_SCK__0__INTTYPE EQU CYREG_PICU3_INTTYPE3
+SD_SCK__0__MASK EQU 0x08
+SD_SCK__0__PC EQU CYREG_PRT3_PC3
+SD_SCK__0__PORT EQU 3
+SD_SCK__0__SHIFT EQU 3
+SD_SCK__AG EQU CYREG_PRT3_AG
+SD_SCK__AMUX EQU CYREG_PRT3_AMUX
+SD_SCK__BIE EQU CYREG_PRT3_BIE
+SD_SCK__BIT_MASK EQU CYREG_PRT3_BIT_MASK
+SD_SCK__BYP EQU CYREG_PRT3_BYP
+SD_SCK__CTL EQU CYREG_PRT3_CTL
+SD_SCK__DM0 EQU CYREG_PRT3_DM0
+SD_SCK__DM1 EQU CYREG_PRT3_DM1
+SD_SCK__DM2 EQU CYREG_PRT3_DM2
+SD_SCK__DR EQU CYREG_PRT3_DR
+SD_SCK__INP_DIS EQU CYREG_PRT3_INP_DIS
+SD_SCK__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU3_BASE
+SD_SCK__LCD_COM_SEG EQU CYREG_PRT3_LCD_COM_SEG
+SD_SCK__LCD_EN EQU CYREG_PRT3_LCD_EN
+SD_SCK__MASK EQU 0x08
+SD_SCK__PORT EQU 3
+SD_SCK__PRT EQU CYREG_PRT3_PRT
+SD_SCK__PRTDSI__CAPS_SEL EQU CYREG_PRT3_CAPS_SEL
+SD_SCK__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT3_DBL_SYNC_IN
+SD_SCK__PRTDSI__OE_SEL0 EQU CYREG_PRT3_OE_SEL0
+SD_SCK__PRTDSI__OE_SEL1 EQU CYREG_PRT3_OE_SEL1
+SD_SCK__PRTDSI__OUT_SEL0 EQU CYREG_PRT3_OUT_SEL0
+SD_SCK__PRTDSI__OUT_SEL1 EQU CYREG_PRT3_OUT_SEL1
+SD_SCK__PRTDSI__SYNC_OUT EQU CYREG_PRT3_SYNC_OUT
+SD_SCK__PS EQU CYREG_PRT3_PS
+SD_SCK__SHIFT EQU 3
+SD_SCK__SLW EQU CYREG_PRT3_SLW
+
+; SCSI_In
+SCSI_In__0__INTTYPE EQU CYREG_PICU6_INTTYPE1
+SCSI_In__0__MASK EQU 0x02
+SCSI_In__0__PC EQU CYREG_PRT6_PC1
+SCSI_In__0__PORT EQU 6
+SCSI_In__0__SHIFT EQU 1
+SCSI_In__AG EQU CYREG_PRT6_AG
+SCSI_In__AMUX EQU CYREG_PRT6_AMUX
+SCSI_In__BIE EQU CYREG_PRT6_BIE
+SCSI_In__BIT_MASK EQU CYREG_PRT6_BIT_MASK
+SCSI_In__BYP EQU CYREG_PRT6_BYP
+SCSI_In__CTL EQU CYREG_PRT6_CTL
+SCSI_In__DBP__INTTYPE EQU CYREG_PICU6_INTTYPE1
+SCSI_In__DBP__MASK EQU 0x02
+SCSI_In__DBP__PC EQU CYREG_PRT6_PC1
+SCSI_In__DBP__PORT EQU 6
+SCSI_In__DBP__SHIFT EQU 1
+SCSI_In__DM0 EQU CYREG_PRT6_DM0
+SCSI_In__DM1 EQU CYREG_PRT6_DM1
+SCSI_In__DM2 EQU CYREG_PRT6_DM2
+SCSI_In__DR EQU CYREG_PRT6_DR
+SCSI_In__INP_DIS EQU CYREG_PRT6_INP_DIS
+SCSI_In__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU6_BASE
+SCSI_In__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
+SCSI_In__LCD_EN EQU CYREG_PRT6_LCD_EN
+SCSI_In__MASK EQU 0x02
+SCSI_In__PORT EQU 6
+SCSI_In__PRT EQU CYREG_PRT6_PRT
+SCSI_In__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
+SCSI_In__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
+SCSI_In__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
+SCSI_In__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
+SCSI_In__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
+SCSI_In__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
+SCSI_In__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
+SCSI_In__PS EQU CYREG_PRT6_PS
+SCSI_In__SHIFT EQU 1
+SCSI_In__SLW EQU CYREG_PRT6_SLW
+SCSI_In_DBx__0__AG EQU CYREG_PRT6_AG
+SCSI_In_DBx__0__AMUX EQU CYREG_PRT6_AMUX
+SCSI_In_DBx__0__BIE EQU CYREG_PRT6_BIE
+SCSI_In_DBx__0__BIT_MASK EQU CYREG_PRT6_BIT_MASK
+SCSI_In_DBx__0__BYP EQU CYREG_PRT6_BYP
+SCSI_In_DBx__0__CTL EQU CYREG_PRT6_CTL
+SCSI_In_DBx__0__DM0 EQU CYREG_PRT6_DM0
+SCSI_In_DBx__0__DM1 EQU CYREG_PRT6_DM1
+SCSI_In_DBx__0__DM2 EQU CYREG_PRT6_DM2
+SCSI_In_DBx__0__DR EQU CYREG_PRT6_DR
+SCSI_In_DBx__0__INP_DIS EQU CYREG_PRT6_INP_DIS
+SCSI_In_DBx__0__INTTYPE EQU CYREG_PICU6_INTTYPE6
+SCSI_In_DBx__0__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
+SCSI_In_DBx__0__LCD_EN EQU CYREG_PRT6_LCD_EN
+SCSI_In_DBx__0__MASK EQU 0x40
+SCSI_In_DBx__0__PC EQU CYREG_PRT6_PC6
+SCSI_In_DBx__0__PORT EQU 6
+SCSI_In_DBx__0__PRT EQU CYREG_PRT6_PRT
+SCSI_In_DBx__0__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
+SCSI_In_DBx__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
+SCSI_In_DBx__0__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
+SCSI_In_DBx__0__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
+SCSI_In_DBx__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
+SCSI_In_DBx__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
+SCSI_In_DBx__0__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
+SCSI_In_DBx__0__PS EQU CYREG_PRT6_PS
+SCSI_In_DBx__0__SHIFT EQU 6
+SCSI_In_DBx__0__SLW EQU CYREG_PRT6_SLW
+SCSI_In_DBx__1__AG EQU CYREG_PRT6_AG
+SCSI_In_DBx__1__AMUX EQU CYREG_PRT6_AMUX
+SCSI_In_DBx__1__BIE EQU CYREG_PRT6_BIE
+SCSI_In_DBx__1__BIT_MASK EQU CYREG_PRT6_BIT_MASK
+SCSI_In_DBx__1__BYP EQU CYREG_PRT6_BYP
+SCSI_In_DBx__1__CTL EQU CYREG_PRT6_CTL
+SCSI_In_DBx__1__DM0 EQU CYREG_PRT6_DM0
+SCSI_In_DBx__1__DM1 EQU CYREG_PRT6_DM1
+SCSI_In_DBx__1__DM2 EQU CYREG_PRT6_DM2
+SCSI_In_DBx__1__DR EQU CYREG_PRT6_DR
+SCSI_In_DBx__1__INP_DIS EQU CYREG_PRT6_INP_DIS
+SCSI_In_DBx__1__INTTYPE EQU CYREG_PICU6_INTTYPE4
+SCSI_In_DBx__1__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
+SCSI_In_DBx__1__LCD_EN EQU CYREG_PRT6_LCD_EN
+SCSI_In_DBx__1__MASK EQU 0x10
+SCSI_In_DBx__1__PC EQU CYREG_PRT6_PC4
+SCSI_In_DBx__1__PORT EQU 6
+SCSI_In_DBx__1__PRT EQU CYREG_PRT6_PRT
+SCSI_In_DBx__1__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
+SCSI_In_DBx__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
+SCSI_In_DBx__1__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
+SCSI_In_DBx__1__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
+SCSI_In_DBx__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
+SCSI_In_DBx__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
+SCSI_In_DBx__1__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
+SCSI_In_DBx__1__PS EQU CYREG_PRT6_PS
+SCSI_In_DBx__1__SHIFT EQU 4
+SCSI_In_DBx__1__SLW EQU CYREG_PRT6_SLW
+SCSI_In_DBx__2__AG EQU CYREG_PRT12_AG
+SCSI_In_DBx__2__BIE EQU CYREG_PRT12_BIE
+SCSI_In_DBx__2__BIT_MASK EQU CYREG_PRT12_BIT_MASK
+SCSI_In_DBx__2__BYP EQU CYREG_PRT12_BYP
+SCSI_In_DBx__2__DM0 EQU CYREG_PRT12_DM0
+SCSI_In_DBx__2__DM1 EQU CYREG_PRT12_DM1
+SCSI_In_DBx__2__DM2 EQU CYREG_PRT12_DM2
+SCSI_In_DBx__2__DR EQU CYREG_PRT12_DR
+SCSI_In_DBx__2__INP_DIS EQU CYREG_PRT12_INP_DIS
+SCSI_In_DBx__2__INTTYPE EQU CYREG_PICU12_INTTYPE4
+SCSI_In_DBx__2__MASK EQU 0x10
+SCSI_In_DBx__2__PC EQU CYREG_PRT12_PC4
+SCSI_In_DBx__2__PORT EQU 12
+SCSI_In_DBx__2__PRT EQU CYREG_PRT12_PRT
+SCSI_In_DBx__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN
+SCSI_In_DBx__2__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0
+SCSI_In_DBx__2__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1
+SCSI_In_DBx__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0
+SCSI_In_DBx__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1
+SCSI_In_DBx__2__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT
+SCSI_In_DBx__2__PS EQU CYREG_PRT12_PS
+SCSI_In_DBx__2__SHIFT EQU 4
+SCSI_In_DBx__2__SIO_CFG EQU CYREG_PRT12_SIO_CFG
+SCSI_In_DBx__2__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF
+SCSI_In_DBx__2__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN
+SCSI_In_DBx__2__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ
+SCSI_In_DBx__2__SLW EQU CYREG_PRT12_SLW
+SCSI_In_DBx__3__AG EQU CYREG_PRT2_AG
+SCSI_In_DBx__3__AMUX EQU CYREG_PRT2_AMUX
+SCSI_In_DBx__3__BIE EQU CYREG_PRT2_BIE
+SCSI_In_DBx__3__BIT_MASK EQU CYREG_PRT2_BIT_MASK
+SCSI_In_DBx__3__BYP EQU CYREG_PRT2_BYP
+SCSI_In_DBx__3__CTL EQU CYREG_PRT2_CTL
+SCSI_In_DBx__3__DM0 EQU CYREG_PRT2_DM0
+SCSI_In_DBx__3__DM1 EQU CYREG_PRT2_DM1
+SCSI_In_DBx__3__DM2 EQU CYREG_PRT2_DM2
+SCSI_In_DBx__3__DR EQU CYREG_PRT2_DR
+SCSI_In_DBx__3__INP_DIS EQU CYREG_PRT2_INP_DIS
+SCSI_In_DBx__3__INTTYPE EQU CYREG_PICU2_INTTYPE6
+SCSI_In_DBx__3__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
+SCSI_In_DBx__3__LCD_EN EQU CYREG_PRT2_LCD_EN
+SCSI_In_DBx__3__MASK EQU 0x40
+SCSI_In_DBx__3__PC EQU CYREG_PRT2_PC6
+SCSI_In_DBx__3__PORT EQU 2
+SCSI_In_DBx__3__PRT EQU CYREG_PRT2_PRT
+SCSI_In_DBx__3__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
+SCSI_In_DBx__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
+SCSI_In_DBx__3__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
+SCSI_In_DBx__3__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
+SCSI_In_DBx__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
+SCSI_In_DBx__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
+SCSI_In_DBx__3__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
+SCSI_In_DBx__3__PS EQU CYREG_PRT2_PS
+SCSI_In_DBx__3__SHIFT EQU 6
+SCSI_In_DBx__3__SLW EQU CYREG_PRT2_SLW
+SCSI_In_DBx__4__AG EQU CYREG_PRT2_AG
+SCSI_In_DBx__4__AMUX EQU CYREG_PRT2_AMUX
+SCSI_In_DBx__4__BIE EQU CYREG_PRT2_BIE
+SCSI_In_DBx__4__BIT_MASK EQU CYREG_PRT2_BIT_MASK
+SCSI_In_DBx__4__BYP EQU CYREG_PRT2_BYP
+SCSI_In_DBx__4__CTL EQU CYREG_PRT2_CTL
+SCSI_In_DBx__4__DM0 EQU CYREG_PRT2_DM0
+SCSI_In_DBx__4__DM1 EQU CYREG_PRT2_DM1
+SCSI_In_DBx__4__DM2 EQU CYREG_PRT2_DM2
+SCSI_In_DBx__4__DR EQU CYREG_PRT2_DR
+SCSI_In_DBx__4__INP_DIS EQU CYREG_PRT2_INP_DIS
+SCSI_In_DBx__4__INTTYPE EQU CYREG_PICU2_INTTYPE4
+SCSI_In_DBx__4__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
+SCSI_In_DBx__4__LCD_EN EQU CYREG_PRT2_LCD_EN
+SCSI_In_DBx__4__MASK EQU 0x10
+SCSI_In_DBx__4__PC EQU CYREG_PRT2_PC4
+SCSI_In_DBx__4__PORT EQU 2
+SCSI_In_DBx__4__PRT EQU CYREG_PRT2_PRT
+SCSI_In_DBx__4__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
+SCSI_In_DBx__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
+SCSI_In_DBx__4__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
+SCSI_In_DBx__4__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
+SCSI_In_DBx__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
+SCSI_In_DBx__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
+SCSI_In_DBx__4__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
+SCSI_In_DBx__4__PS EQU CYREG_PRT2_PS
+SCSI_In_DBx__4__SHIFT EQU 4
+SCSI_In_DBx__4__SLW EQU CYREG_PRT2_SLW
+SCSI_In_DBx__5__AG EQU CYREG_PRT2_AG
+SCSI_In_DBx__5__AMUX EQU CYREG_PRT2_AMUX
+SCSI_In_DBx__5__BIE EQU CYREG_PRT2_BIE
+SCSI_In_DBx__5__BIT_MASK EQU CYREG_PRT2_BIT_MASK
+SCSI_In_DBx__5__BYP EQU CYREG_PRT2_BYP
+SCSI_In_DBx__5__CTL EQU CYREG_PRT2_CTL
+SCSI_In_DBx__5__DM0 EQU CYREG_PRT2_DM0
+SCSI_In_DBx__5__DM1 EQU CYREG_PRT2_DM1
+SCSI_In_DBx__5__DM2 EQU CYREG_PRT2_DM2
+SCSI_In_DBx__5__DR EQU CYREG_PRT2_DR
+SCSI_In_DBx__5__INP_DIS EQU CYREG_PRT2_INP_DIS
+SCSI_In_DBx__5__INTTYPE EQU CYREG_PICU2_INTTYPE2
+SCSI_In_DBx__5__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
+SCSI_In_DBx__5__LCD_EN EQU CYREG_PRT2_LCD_EN
+SCSI_In_DBx__5__MASK EQU 0x04
+SCSI_In_DBx__5__PC EQU CYREG_PRT2_PC2
+SCSI_In_DBx__5__PORT EQU 2
+SCSI_In_DBx__5__PRT EQU CYREG_PRT2_PRT
+SCSI_In_DBx__5__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
+SCSI_In_DBx__5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
+SCSI_In_DBx__5__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
+SCSI_In_DBx__5__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
+SCSI_In_DBx__5__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
+SCSI_In_DBx__5__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
+SCSI_In_DBx__5__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
+SCSI_In_DBx__5__PS EQU CYREG_PRT2_PS
+SCSI_In_DBx__5__SHIFT EQU 2
+SCSI_In_DBx__5__SLW EQU CYREG_PRT2_SLW
+SCSI_In_DBx__6__AG EQU CYREG_PRT2_AG
+SCSI_In_DBx__6__AMUX EQU CYREG_PRT2_AMUX
+SCSI_In_DBx__6__BIE EQU CYREG_PRT2_BIE
+SCSI_In_DBx__6__BIT_MASK EQU CYREG_PRT2_BIT_MASK
+SCSI_In_DBx__6__BYP EQU CYREG_PRT2_BYP
+SCSI_In_DBx__6__CTL EQU CYREG_PRT2_CTL
+SCSI_In_DBx__6__DM0 EQU CYREG_PRT2_DM0
+SCSI_In_DBx__6__DM1 EQU CYREG_PRT2_DM1
+SCSI_In_DBx__6__DM2 EQU CYREG_PRT2_DM2
+SCSI_In_DBx__6__DR EQU CYREG_PRT2_DR
+SCSI_In_DBx__6__INP_DIS EQU CYREG_PRT2_INP_DIS
+SCSI_In_DBx__6__INTTYPE EQU CYREG_PICU2_INTTYPE0
+SCSI_In_DBx__6__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
+SCSI_In_DBx__6__LCD_EN EQU CYREG_PRT2_LCD_EN
+SCSI_In_DBx__6__MASK EQU 0x01
+SCSI_In_DBx__6__PC EQU CYREG_PRT2_PC0
+SCSI_In_DBx__6__PORT EQU 2
+SCSI_In_DBx__6__PRT EQU CYREG_PRT2_PRT
+SCSI_In_DBx__6__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
+SCSI_In_DBx__6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
+SCSI_In_DBx__6__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
+SCSI_In_DBx__6__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
+SCSI_In_DBx__6__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
+SCSI_In_DBx__6__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
+SCSI_In_DBx__6__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
+SCSI_In_DBx__6__PS EQU CYREG_PRT2_PS
+SCSI_In_DBx__6__SHIFT EQU 0
+SCSI_In_DBx__6__SLW EQU CYREG_PRT2_SLW
+SCSI_In_DBx__7__AG EQU CYREG_PRT6_AG
+SCSI_In_DBx__7__AMUX EQU CYREG_PRT6_AMUX
+SCSI_In_DBx__7__BIE EQU CYREG_PRT6_BIE
+SCSI_In_DBx__7__BIT_MASK EQU CYREG_PRT6_BIT_MASK
+SCSI_In_DBx__7__BYP EQU CYREG_PRT6_BYP
+SCSI_In_DBx__7__CTL EQU CYREG_PRT6_CTL
+SCSI_In_DBx__7__DM0 EQU CYREG_PRT6_DM0
+SCSI_In_DBx__7__DM1 EQU CYREG_PRT6_DM1
+SCSI_In_DBx__7__DM2 EQU CYREG_PRT6_DM2
+SCSI_In_DBx__7__DR EQU CYREG_PRT6_DR
+SCSI_In_DBx__7__INP_DIS EQU CYREG_PRT6_INP_DIS
+SCSI_In_DBx__7__INTTYPE EQU CYREG_PICU6_INTTYPE3
+SCSI_In_DBx__7__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
+SCSI_In_DBx__7__LCD_EN EQU CYREG_PRT6_LCD_EN
+SCSI_In_DBx__7__MASK EQU 0x08
+SCSI_In_DBx__7__PC EQU CYREG_PRT6_PC3
+SCSI_In_DBx__7__PORT EQU 6
+SCSI_In_DBx__7__PRT EQU CYREG_PRT6_PRT
+SCSI_In_DBx__7__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
+SCSI_In_DBx__7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
+SCSI_In_DBx__7__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
+SCSI_In_DBx__7__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
+SCSI_In_DBx__7__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
+SCSI_In_DBx__7__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
+SCSI_In_DBx__7__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
+SCSI_In_DBx__7__PS EQU CYREG_PRT6_PS
+SCSI_In_DBx__7__SHIFT EQU 3
+SCSI_In_DBx__7__SLW EQU CYREG_PRT6_SLW
+SCSI_In_DBx__DB0__AG EQU CYREG_PRT6_AG
+SCSI_In_DBx__DB0__AMUX EQU CYREG_PRT6_AMUX
+SCSI_In_DBx__DB0__BIE EQU CYREG_PRT6_BIE
+SCSI_In_DBx__DB0__BIT_MASK EQU CYREG_PRT6_BIT_MASK
+SCSI_In_DBx__DB0__BYP EQU CYREG_PRT6_BYP
+SCSI_In_DBx__DB0__CTL EQU CYREG_PRT6_CTL
+SCSI_In_DBx__DB0__DM0 EQU CYREG_PRT6_DM0
+SCSI_In_DBx__DB0__DM1 EQU CYREG_PRT6_DM1
+SCSI_In_DBx__DB0__DM2 EQU CYREG_PRT6_DM2
+SCSI_In_DBx__DB0__DR EQU CYREG_PRT6_DR
+SCSI_In_DBx__DB0__INP_DIS EQU CYREG_PRT6_INP_DIS
+SCSI_In_DBx__DB0__INTTYPE EQU CYREG_PICU6_INTTYPE6
+SCSI_In_DBx__DB0__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
+SCSI_In_DBx__DB0__LCD_EN EQU CYREG_PRT6_LCD_EN
+SCSI_In_DBx__DB0__MASK EQU 0x40
+SCSI_In_DBx__DB0__PC EQU CYREG_PRT6_PC6
+SCSI_In_DBx__DB0__PORT EQU 6
+SCSI_In_DBx__DB0__PRT EQU CYREG_PRT6_PRT
+SCSI_In_DBx__DB0__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
+SCSI_In_DBx__DB0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
+SCSI_In_DBx__DB0__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
+SCSI_In_DBx__DB0__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
+SCSI_In_DBx__DB0__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
+SCSI_In_DBx__DB0__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
+SCSI_In_DBx__DB0__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
+SCSI_In_DBx__DB0__PS EQU CYREG_PRT6_PS
+SCSI_In_DBx__DB0__SHIFT EQU 6
+SCSI_In_DBx__DB0__SLW EQU CYREG_PRT6_SLW
+SCSI_In_DBx__DB1__AG EQU CYREG_PRT6_AG
+SCSI_In_DBx__DB1__AMUX EQU CYREG_PRT6_AMUX
+SCSI_In_DBx__DB1__BIE EQU CYREG_PRT6_BIE
+SCSI_In_DBx__DB1__BIT_MASK EQU CYREG_PRT6_BIT_MASK
+SCSI_In_DBx__DB1__BYP EQU CYREG_PRT6_BYP
+SCSI_In_DBx__DB1__CTL EQU CYREG_PRT6_CTL
+SCSI_In_DBx__DB1__DM0 EQU CYREG_PRT6_DM0
+SCSI_In_DBx__DB1__DM1 EQU CYREG_PRT6_DM1
+SCSI_In_DBx__DB1__DM2 EQU CYREG_PRT6_DM2
+SCSI_In_DBx__DB1__DR EQU CYREG_PRT6_DR
+SCSI_In_DBx__DB1__INP_DIS EQU CYREG_PRT6_INP_DIS
+SCSI_In_DBx__DB1__INTTYPE EQU CYREG_PICU6_INTTYPE4
+SCSI_In_DBx__DB1__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
+SCSI_In_DBx__DB1__LCD_EN EQU CYREG_PRT6_LCD_EN
+SCSI_In_DBx__DB1__MASK EQU 0x10
+SCSI_In_DBx__DB1__PC EQU CYREG_PRT6_PC4
+SCSI_In_DBx__DB1__PORT EQU 6
+SCSI_In_DBx__DB1__PRT EQU CYREG_PRT6_PRT
+SCSI_In_DBx__DB1__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
+SCSI_In_DBx__DB1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
+SCSI_In_DBx__DB1__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
+SCSI_In_DBx__DB1__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
+SCSI_In_DBx__DB1__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
+SCSI_In_DBx__DB1__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
+SCSI_In_DBx__DB1__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
+SCSI_In_DBx__DB1__PS EQU CYREG_PRT6_PS
+SCSI_In_DBx__DB1__SHIFT EQU 4
+SCSI_In_DBx__DB1__SLW EQU CYREG_PRT6_SLW
+SCSI_In_DBx__DB2__AG EQU CYREG_PRT12_AG
+SCSI_In_DBx__DB2__BIE EQU CYREG_PRT12_BIE
+SCSI_In_DBx__DB2__BIT_MASK EQU CYREG_PRT12_BIT_MASK
+SCSI_In_DBx__DB2__BYP EQU CYREG_PRT12_BYP
+SCSI_In_DBx__DB2__DM0 EQU CYREG_PRT12_DM0
+SCSI_In_DBx__DB2__DM1 EQU CYREG_PRT12_DM1
+SCSI_In_DBx__DB2__DM2 EQU CYREG_PRT12_DM2
+SCSI_In_DBx__DB2__DR EQU CYREG_PRT12_DR
+SCSI_In_DBx__DB2__INP_DIS EQU CYREG_PRT12_INP_DIS
+SCSI_In_DBx__DB2__INTTYPE EQU CYREG_PICU12_INTTYPE4
+SCSI_In_DBx__DB2__MASK EQU 0x10
+SCSI_In_DBx__DB2__PC EQU CYREG_PRT12_PC4
+SCSI_In_DBx__DB2__PORT EQU 12
+SCSI_In_DBx__DB2__PRT EQU CYREG_PRT12_PRT
+SCSI_In_DBx__DB2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN
+SCSI_In_DBx__DB2__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0
+SCSI_In_DBx__DB2__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1
+SCSI_In_DBx__DB2__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0
+SCSI_In_DBx__DB2__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1
+SCSI_In_DBx__DB2__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT
+SCSI_In_DBx__DB2__PS EQU CYREG_PRT12_PS
+SCSI_In_DBx__DB2__SHIFT EQU 4
+SCSI_In_DBx__DB2__SIO_CFG EQU CYREG_PRT12_SIO_CFG
+SCSI_In_DBx__DB2__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF
+SCSI_In_DBx__DB2__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN
+SCSI_In_DBx__DB2__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ
+SCSI_In_DBx__DB2__SLW EQU CYREG_PRT12_SLW
+SCSI_In_DBx__DB3__AG EQU CYREG_PRT2_AG
+SCSI_In_DBx__DB3__AMUX EQU CYREG_PRT2_AMUX
+SCSI_In_DBx__DB3__BIE EQU CYREG_PRT2_BIE
+SCSI_In_DBx__DB3__BIT_MASK EQU CYREG_PRT2_BIT_MASK
+SCSI_In_DBx__DB3__BYP EQU CYREG_PRT2_BYP
+SCSI_In_DBx__DB3__CTL EQU CYREG_PRT2_CTL
+SCSI_In_DBx__DB3__DM0 EQU CYREG_PRT2_DM0
+SCSI_In_DBx__DB3__DM1 EQU CYREG_PRT2_DM1
+SCSI_In_DBx__DB3__DM2 EQU CYREG_PRT2_DM2
+SCSI_In_DBx__DB3__DR EQU CYREG_PRT2_DR
+SCSI_In_DBx__DB3__INP_DIS EQU CYREG_PRT2_INP_DIS
+SCSI_In_DBx__DB3__INTTYPE EQU CYREG_PICU2_INTTYPE6
+SCSI_In_DBx__DB3__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
+SCSI_In_DBx__DB3__LCD_EN EQU CYREG_PRT2_LCD_EN
+SCSI_In_DBx__DB3__MASK EQU 0x40
+SCSI_In_DBx__DB3__PC EQU CYREG_PRT2_PC6
+SCSI_In_DBx__DB3__PORT EQU 2
+SCSI_In_DBx__DB3__PRT EQU CYREG_PRT2_PRT
+SCSI_In_DBx__DB3__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
+SCSI_In_DBx__DB3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
+SCSI_In_DBx__DB3__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
+SCSI_In_DBx__DB3__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
+SCSI_In_DBx__DB3__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
+SCSI_In_DBx__DB3__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
+SCSI_In_DBx__DB3__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
+SCSI_In_DBx__DB3__PS EQU CYREG_PRT2_PS
+SCSI_In_DBx__DB3__SHIFT EQU 6
+SCSI_In_DBx__DB3__SLW EQU CYREG_PRT2_SLW
+SCSI_In_DBx__DB4__AG EQU CYREG_PRT2_AG
+SCSI_In_DBx__DB4__AMUX EQU CYREG_PRT2_AMUX
+SCSI_In_DBx__DB4__BIE EQU CYREG_PRT2_BIE
+SCSI_In_DBx__DB4__BIT_MASK EQU CYREG_PRT2_BIT_MASK
+SCSI_In_DBx__DB4__BYP EQU CYREG_PRT2_BYP
+SCSI_In_DBx__DB4__CTL EQU CYREG_PRT2_CTL
+SCSI_In_DBx__DB4__DM0 EQU CYREG_PRT2_DM0
+SCSI_In_DBx__DB4__DM1 EQU CYREG_PRT2_DM1
+SCSI_In_DBx__DB4__DM2 EQU CYREG_PRT2_DM2
+SCSI_In_DBx__DB4__DR EQU CYREG_PRT2_DR
+SCSI_In_DBx__DB4__INP_DIS EQU CYREG_PRT2_INP_DIS
+SCSI_In_DBx__DB4__INTTYPE EQU CYREG_PICU2_INTTYPE4
+SCSI_In_DBx__DB4__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
+SCSI_In_DBx__DB4__LCD_EN EQU CYREG_PRT2_LCD_EN
+SCSI_In_DBx__DB4__MASK EQU 0x10
+SCSI_In_DBx__DB4__PC EQU CYREG_PRT2_PC4
+SCSI_In_DBx__DB4__PORT EQU 2
+SCSI_In_DBx__DB4__PRT EQU CYREG_PRT2_PRT
+SCSI_In_DBx__DB4__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
+SCSI_In_DBx__DB4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
+SCSI_In_DBx__DB4__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
+SCSI_In_DBx__DB4__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
+SCSI_In_DBx__DB4__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
+SCSI_In_DBx__DB4__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
+SCSI_In_DBx__DB4__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
+SCSI_In_DBx__DB4__PS EQU CYREG_PRT2_PS
+SCSI_In_DBx__DB4__SHIFT EQU 4
+SCSI_In_DBx__DB4__SLW EQU CYREG_PRT2_SLW
+SCSI_In_DBx__DB5__AG EQU CYREG_PRT2_AG
+SCSI_In_DBx__DB5__AMUX EQU CYREG_PRT2_AMUX
+SCSI_In_DBx__DB5__BIE EQU CYREG_PRT2_BIE
+SCSI_In_DBx__DB5__BIT_MASK EQU CYREG_PRT2_BIT_MASK
+SCSI_In_DBx__DB5__BYP EQU CYREG_PRT2_BYP
+SCSI_In_DBx__DB5__CTL EQU CYREG_PRT2_CTL
+SCSI_In_DBx__DB5__DM0 EQU CYREG_PRT2_DM0
+SCSI_In_DBx__DB5__DM1 EQU CYREG_PRT2_DM1
+SCSI_In_DBx__DB5__DM2 EQU CYREG_PRT2_DM2
+SCSI_In_DBx__DB5__DR EQU CYREG_PRT2_DR
+SCSI_In_DBx__DB5__INP_DIS EQU CYREG_PRT2_INP_DIS
+SCSI_In_DBx__DB5__INTTYPE EQU CYREG_PICU2_INTTYPE2
+SCSI_In_DBx__DB5__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
+SCSI_In_DBx__DB5__LCD_EN EQU CYREG_PRT2_LCD_EN
+SCSI_In_DBx__DB5__MASK EQU 0x04
+SCSI_In_DBx__DB5__PC EQU CYREG_PRT2_PC2
+SCSI_In_DBx__DB5__PORT EQU 2
+SCSI_In_DBx__DB5__PRT EQU CYREG_PRT2_PRT
+SCSI_In_DBx__DB5__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
+SCSI_In_DBx__DB5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
+SCSI_In_DBx__DB5__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
+SCSI_In_DBx__DB5__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
+SCSI_In_DBx__DB5__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
+SCSI_In_DBx__DB5__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
+SCSI_In_DBx__DB5__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
+SCSI_In_DBx__DB5__PS EQU CYREG_PRT2_PS
+SCSI_In_DBx__DB5__SHIFT EQU 2
+SCSI_In_DBx__DB5__SLW EQU CYREG_PRT2_SLW
+SCSI_In_DBx__DB6__AG EQU CYREG_PRT2_AG
+SCSI_In_DBx__DB6__AMUX EQU CYREG_PRT2_AMUX
+SCSI_In_DBx__DB6__BIE EQU CYREG_PRT2_BIE
+SCSI_In_DBx__DB6__BIT_MASK EQU CYREG_PRT2_BIT_MASK
+SCSI_In_DBx__DB6__BYP EQU CYREG_PRT2_BYP
+SCSI_In_DBx__DB6__CTL EQU CYREG_PRT2_CTL
+SCSI_In_DBx__DB6__DM0 EQU CYREG_PRT2_DM0
+SCSI_In_DBx__DB6__DM1 EQU CYREG_PRT2_DM1
+SCSI_In_DBx__DB6__DM2 EQU CYREG_PRT2_DM2
+SCSI_In_DBx__DB6__DR EQU CYREG_PRT2_DR
+SCSI_In_DBx__DB6__INP_DIS EQU CYREG_PRT2_INP_DIS
+SCSI_In_DBx__DB6__INTTYPE EQU CYREG_PICU2_INTTYPE0
+SCSI_In_DBx__DB6__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
+SCSI_In_DBx__DB6__LCD_EN EQU CYREG_PRT2_LCD_EN
+SCSI_In_DBx__DB6__MASK EQU 0x01
+SCSI_In_DBx__DB6__PC EQU CYREG_PRT2_PC0
+SCSI_In_DBx__DB6__PORT EQU 2
+SCSI_In_DBx__DB6__PRT EQU CYREG_PRT2_PRT
+SCSI_In_DBx__DB6__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
+SCSI_In_DBx__DB6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
+SCSI_In_DBx__DB6__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
+SCSI_In_DBx__DB6__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
+SCSI_In_DBx__DB6__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
+SCSI_In_DBx__DB6__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
+SCSI_In_DBx__DB6__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
+SCSI_In_DBx__DB6__PS EQU CYREG_PRT2_PS
+SCSI_In_DBx__DB6__SHIFT EQU 0
+SCSI_In_DBx__DB6__SLW EQU CYREG_PRT2_SLW
+SCSI_In_DBx__DB7__AG EQU CYREG_PRT6_AG
+SCSI_In_DBx__DB7__AMUX EQU CYREG_PRT6_AMUX
+SCSI_In_DBx__DB7__BIE EQU CYREG_PRT6_BIE
+SCSI_In_DBx__DB7__BIT_MASK EQU CYREG_PRT6_BIT_MASK
+SCSI_In_DBx__DB7__BYP EQU CYREG_PRT6_BYP
+SCSI_In_DBx__DB7__CTL EQU CYREG_PRT6_CTL
+SCSI_In_DBx__DB7__DM0 EQU CYREG_PRT6_DM0
+SCSI_In_DBx__DB7__DM1 EQU CYREG_PRT6_DM1
+SCSI_In_DBx__DB7__DM2 EQU CYREG_PRT6_DM2
+SCSI_In_DBx__DB7__DR EQU CYREG_PRT6_DR
+SCSI_In_DBx__DB7__INP_DIS EQU CYREG_PRT6_INP_DIS
+SCSI_In_DBx__DB7__INTTYPE EQU CYREG_PICU6_INTTYPE3
+SCSI_In_DBx__DB7__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
+SCSI_In_DBx__DB7__LCD_EN EQU CYREG_PRT6_LCD_EN
+SCSI_In_DBx__DB7__MASK EQU 0x08
+SCSI_In_DBx__DB7__PC EQU CYREG_PRT6_PC3
+SCSI_In_DBx__DB7__PORT EQU 6
+SCSI_In_DBx__DB7__PRT EQU CYREG_PRT6_PRT
+SCSI_In_DBx__DB7__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
+SCSI_In_DBx__DB7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
+SCSI_In_DBx__DB7__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
+SCSI_In_DBx__DB7__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
+SCSI_In_DBx__DB7__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
+SCSI_In_DBx__DB7__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
+SCSI_In_DBx__DB7__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
+SCSI_In_DBx__DB7__PS EQU CYREG_PRT6_PS
+SCSI_In_DBx__DB7__SHIFT EQU 3
+SCSI_In_DBx__DB7__SLW EQU CYREG_PRT6_SLW
+
+; SD_MISO
+SD_MISO__0__INTTYPE EQU CYREG_PICU3_INTTYPE2
+SD_MISO__0__MASK EQU 0x04
+SD_MISO__0__PC EQU CYREG_PRT3_PC2
+SD_MISO__0__PORT EQU 3
+SD_MISO__0__SHIFT EQU 2
+SD_MISO__AG EQU CYREG_PRT3_AG
+SD_MISO__AMUX EQU CYREG_PRT3_AMUX
+SD_MISO__BIE EQU CYREG_PRT3_BIE
+SD_MISO__BIT_MASK EQU CYREG_PRT3_BIT_MASK
+SD_MISO__BYP EQU CYREG_PRT3_BYP
+SD_MISO__CTL EQU CYREG_PRT3_CTL
+SD_MISO__DM0 EQU CYREG_PRT3_DM0
+SD_MISO__DM1 EQU CYREG_PRT3_DM1
+SD_MISO__DM2 EQU CYREG_PRT3_DM2
+SD_MISO__DR EQU CYREG_PRT3_DR
+SD_MISO__INP_DIS EQU CYREG_PRT3_INP_DIS
+SD_MISO__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU3_BASE
+SD_MISO__LCD_COM_SEG EQU CYREG_PRT3_LCD_COM_SEG
+SD_MISO__LCD_EN EQU CYREG_PRT3_LCD_EN
+SD_MISO__MASK EQU 0x04
+SD_MISO__PORT EQU 3
+SD_MISO__PRT EQU CYREG_PRT3_PRT
+SD_MISO__PRTDSI__CAPS_SEL EQU CYREG_PRT3_CAPS_SEL
+SD_MISO__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT3_DBL_SYNC_IN
+SD_MISO__PRTDSI__OE_SEL0 EQU CYREG_PRT3_OE_SEL0
+SD_MISO__PRTDSI__OE_SEL1 EQU CYREG_PRT3_OE_SEL1
+SD_MISO__PRTDSI__OUT_SEL0 EQU CYREG_PRT3_OUT_SEL0
+SD_MISO__PRTDSI__OUT_SEL1 EQU CYREG_PRT3_OUT_SEL1
+SD_MISO__PRTDSI__SYNC_OUT EQU CYREG_PRT3_SYNC_OUT
+SD_MISO__PS EQU CYREG_PRT3_PS
+SD_MISO__SHIFT EQU 2
+SD_MISO__SLW EQU CYREG_PRT3_SLW
+
+; SD_MOSI
+SD_MOSI__0__INTTYPE EQU CYREG_PICU3_INTTYPE4
+SD_MOSI__0__MASK EQU 0x10
+SD_MOSI__0__PC EQU CYREG_PRT3_PC4
+SD_MOSI__0__PORT EQU 3
+SD_MOSI__0__SHIFT EQU 4
+SD_MOSI__AG EQU CYREG_PRT3_AG
+SD_MOSI__AMUX EQU CYREG_PRT3_AMUX
+SD_MOSI__BIE EQU CYREG_PRT3_BIE
+SD_MOSI__BIT_MASK EQU CYREG_PRT3_BIT_MASK
+SD_MOSI__BYP EQU CYREG_PRT3_BYP
+SD_MOSI__CTL EQU CYREG_PRT3_CTL
+SD_MOSI__DM0 EQU CYREG_PRT3_DM0
+SD_MOSI__DM1 EQU CYREG_PRT3_DM1
+SD_MOSI__DM2 EQU CYREG_PRT3_DM2
+SD_MOSI__DR EQU CYREG_PRT3_DR
+SD_MOSI__INP_DIS EQU CYREG_PRT3_INP_DIS
+SD_MOSI__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU3_BASE
+SD_MOSI__LCD_COM_SEG EQU CYREG_PRT3_LCD_COM_SEG
+SD_MOSI__LCD_EN EQU CYREG_PRT3_LCD_EN
+SD_MOSI__MASK EQU 0x10
+SD_MOSI__PORT EQU 3
+SD_MOSI__PRT EQU CYREG_PRT3_PRT
+SD_MOSI__PRTDSI__CAPS_SEL EQU CYREG_PRT3_CAPS_SEL
+SD_MOSI__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT3_DBL_SYNC_IN
+SD_MOSI__PRTDSI__OE_SEL0 EQU CYREG_PRT3_OE_SEL0
+SD_MOSI__PRTDSI__OE_SEL1 EQU CYREG_PRT3_OE_SEL1
+SD_MOSI__PRTDSI__OUT_SEL0 EQU CYREG_PRT3_OUT_SEL0
+SD_MOSI__PRTDSI__OUT_SEL1 EQU CYREG_PRT3_OUT_SEL1
+SD_MOSI__PRTDSI__SYNC_OUT EQU CYREG_PRT3_SYNC_OUT
+SD_MOSI__PS EQU CYREG_PRT3_PS
+SD_MOSI__SHIFT EQU 4
+SD_MOSI__SLW EQU CYREG_PRT3_SLW
+
+; TERM_EN
+TERM_EN__0__INTTYPE EQU CYREG_PICU15_INTTYPE3
+TERM_EN__0__MASK EQU 0x08
+TERM_EN__0__PC EQU CYREG_IO_PC_PRT15_PC3
+TERM_EN__0__PORT EQU 15
+TERM_EN__0__SHIFT EQU 3
+TERM_EN__AG EQU CYREG_PRT15_AG
+TERM_EN__AMUX EQU CYREG_PRT15_AMUX
+TERM_EN__BIE EQU CYREG_PRT15_BIE
+TERM_EN__BIT_MASK EQU CYREG_PRT15_BIT_MASK
+TERM_EN__BYP EQU CYREG_PRT15_BYP
+TERM_EN__CTL EQU CYREG_PRT15_CTL
+TERM_EN__DM0 EQU CYREG_PRT15_DM0
+TERM_EN__DM1 EQU CYREG_PRT15_DM1
+TERM_EN__DM2 EQU CYREG_PRT15_DM2
+TERM_EN__DR EQU CYREG_PRT15_DR
+TERM_EN__INP_DIS EQU CYREG_PRT15_INP_DIS
+TERM_EN__INTTYPE_BASE EQU CYDEV_PICU_INTTYPE_PICU15_BASE
+TERM_EN__LCD_COM_SEG EQU CYREG_PRT15_LCD_COM_SEG
+TERM_EN__LCD_EN EQU CYREG_PRT15_LCD_EN
+TERM_EN__MASK EQU 0x08
+TERM_EN__PORT EQU 15
+TERM_EN__PRT EQU CYREG_PRT15_PRT
+TERM_EN__PRTDSI__CAPS_SEL EQU CYREG_PRT15_CAPS_SEL
+TERM_EN__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT15_DBL_SYNC_IN
+TERM_EN__PRTDSI__OE_SEL0 EQU CYREG_PRT15_OE_SEL0
+TERM_EN__PRTDSI__OE_SEL1 EQU CYREG_PRT15_OE_SEL1
+TERM_EN__PRTDSI__OUT_SEL0 EQU CYREG_PRT15_OUT_SEL0
+TERM_EN__PRTDSI__OUT_SEL1 EQU CYREG_PRT15_OUT_SEL1
+TERM_EN__PRTDSI__SYNC_OUT EQU CYREG_PRT15_SYNC_OUT
+TERM_EN__PS EQU CYREG_PRT15_PS
+TERM_EN__SHIFT EQU 3
+TERM_EN__SLW EQU CYREG_PRT15_SLW
+
+; SCSI_CLK
+SCSI_CLK__CFG0 EQU CYREG_CLKDIST_DCFG1_CFG0
+SCSI_CLK__CFG1 EQU CYREG_CLKDIST_DCFG1_CFG1
+SCSI_CLK__CFG2 EQU CYREG_CLKDIST_DCFG1_CFG2
+SCSI_CLK__CFG2_SRC_SEL_MASK EQU 0x07
+SCSI_CLK__INDEX EQU 0x01
+SCSI_CLK__PM_ACT_CFG EQU CYREG_PM_ACT_CFG2
+SCSI_CLK__PM_ACT_MSK EQU 0x02
+SCSI_CLK__PM_STBY_CFG EQU CYREG_PM_STBY_CFG2
+SCSI_CLK__PM_STBY_MSK EQU 0x02
+
+; SCSI_Out
+SCSI_Out__0__AG EQU CYREG_PRT6_AG
+SCSI_Out__0__AMUX EQU CYREG_PRT6_AMUX
+SCSI_Out__0__BIE EQU CYREG_PRT6_BIE
+SCSI_Out__0__BIT_MASK EQU CYREG_PRT6_BIT_MASK
+SCSI_Out__0__BYP EQU CYREG_PRT6_BYP
+SCSI_Out__0__CTL EQU CYREG_PRT6_CTL
+SCSI_Out__0__DM0 EQU CYREG_PRT6_DM0
+SCSI_Out__0__DM1 EQU CYREG_PRT6_DM1
+SCSI_Out__0__DM2 EQU CYREG_PRT6_DM2
+SCSI_Out__0__DR EQU CYREG_PRT6_DR
+SCSI_Out__0__INP_DIS EQU CYREG_PRT6_INP_DIS
+SCSI_Out__0__INTTYPE EQU CYREG_PICU6_INTTYPE2
+SCSI_Out__0__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
+SCSI_Out__0__LCD_EN EQU CYREG_PRT6_LCD_EN
+SCSI_Out__0__MASK EQU 0x04
+SCSI_Out__0__PC EQU CYREG_PRT6_PC2
+SCSI_Out__0__PORT EQU 6
+SCSI_Out__0__PRT EQU CYREG_PRT6_PRT
+SCSI_Out__0__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
+SCSI_Out__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
+SCSI_Out__0__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
+SCSI_Out__0__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
+SCSI_Out__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
+SCSI_Out__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
+SCSI_Out__0__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
+SCSI_Out__0__PS EQU CYREG_PRT6_PS
+SCSI_Out__0__SHIFT EQU 2
+SCSI_Out__0__SLW EQU CYREG_PRT6_SLW
+SCSI_Out__1__AG EQU CYREG_PRT4_AG
+SCSI_Out__1__AMUX EQU CYREG_PRT4_AMUX
+SCSI_Out__1__BIE EQU CYREG_PRT4_BIE
+SCSI_Out__1__BIT_MASK EQU CYREG_PRT4_BIT_MASK
+SCSI_Out__1__BYP EQU CYREG_PRT4_BYP
+SCSI_Out__1__CTL EQU CYREG_PRT4_CTL
+SCSI_Out__1__DM0 EQU CYREG_PRT4_DM0
+SCSI_Out__1__DM1 EQU CYREG_PRT4_DM1
+SCSI_Out__1__DM2 EQU CYREG_PRT4_DM2
+SCSI_Out__1__DR EQU CYREG_PRT4_DR
+SCSI_Out__1__INP_DIS EQU CYREG_PRT4_INP_DIS
+SCSI_Out__1__INTTYPE EQU CYREG_PICU4_INTTYPE6
+SCSI_Out__1__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
+SCSI_Out__1__LCD_EN EQU CYREG_PRT4_LCD_EN
+SCSI_Out__1__MASK EQU 0x40
+SCSI_Out__1__PC EQU CYREG_PRT4_PC6
+SCSI_Out__1__PORT EQU 4
+SCSI_Out__1__PRT EQU CYREG_PRT4_PRT
+SCSI_Out__1__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
+SCSI_Out__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
+SCSI_Out__1__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
+SCSI_Out__1__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
+SCSI_Out__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
+SCSI_Out__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
+SCSI_Out__1__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
+SCSI_Out__1__PS EQU CYREG_PRT4_PS
+SCSI_Out__1__SHIFT EQU 6
+SCSI_Out__1__SLW EQU CYREG_PRT4_SLW
+SCSI_Out__2__AG EQU CYREG_PRT0_AG
+SCSI_Out__2__AMUX EQU CYREG_PRT0_AMUX
+SCSI_Out__2__BIE EQU CYREG_PRT0_BIE
+SCSI_Out__2__BIT_MASK EQU CYREG_PRT0_BIT_MASK
+SCSI_Out__2__BYP EQU CYREG_PRT0_BYP
+SCSI_Out__2__CTL EQU CYREG_PRT0_CTL
+SCSI_Out__2__DM0 EQU CYREG_PRT0_DM0
+SCSI_Out__2__DM1 EQU CYREG_PRT0_DM1
+SCSI_Out__2__DM2 EQU CYREG_PRT0_DM2
+SCSI_Out__2__DR EQU CYREG_PRT0_DR
+SCSI_Out__2__INP_DIS EQU CYREG_PRT0_INP_DIS
+SCSI_Out__2__INTTYPE EQU CYREG_PICU0_INTTYPE7
+SCSI_Out__2__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
+SCSI_Out__2__LCD_EN EQU CYREG_PRT0_LCD_EN
+SCSI_Out__2__MASK EQU 0x80
+SCSI_Out__2__PC EQU CYREG_PRT0_PC7
+SCSI_Out__2__PORT EQU 0
+SCSI_Out__2__PRT EQU CYREG_PRT0_PRT
+SCSI_Out__2__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
+SCSI_Out__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
+SCSI_Out__2__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
+SCSI_Out__2__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
+SCSI_Out__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
+SCSI_Out__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
+SCSI_Out__2__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
+SCSI_Out__2__PS EQU CYREG_PRT0_PS
+SCSI_Out__2__SHIFT EQU 7
+SCSI_Out__2__SLW EQU CYREG_PRT0_SLW
+SCSI_Out__3__AG EQU CYREG_PRT0_AG
+SCSI_Out__3__AMUX EQU CYREG_PRT0_AMUX
+SCSI_Out__3__BIE EQU CYREG_PRT0_BIE
+SCSI_Out__3__BIT_MASK EQU CYREG_PRT0_BIT_MASK
+SCSI_Out__3__BYP EQU CYREG_PRT0_BYP
+SCSI_Out__3__CTL EQU CYREG_PRT0_CTL
+SCSI_Out__3__DM0 EQU CYREG_PRT0_DM0
+SCSI_Out__3__DM1 EQU CYREG_PRT0_DM1
+SCSI_Out__3__DM2 EQU CYREG_PRT0_DM2
+SCSI_Out__3__DR EQU CYREG_PRT0_DR
+SCSI_Out__3__INP_DIS EQU CYREG_PRT0_INP_DIS
+SCSI_Out__3__INTTYPE EQU CYREG_PICU0_INTTYPE5
+SCSI_Out__3__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
+SCSI_Out__3__LCD_EN EQU CYREG_PRT0_LCD_EN
+SCSI_Out__3__MASK EQU 0x20
+SCSI_Out__3__PC EQU CYREG_PRT0_PC5
+SCSI_Out__3__PORT EQU 0
+SCSI_Out__3__PRT EQU CYREG_PRT0_PRT
+SCSI_Out__3__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
+SCSI_Out__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
+SCSI_Out__3__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
+SCSI_Out__3__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
+SCSI_Out__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
+SCSI_Out__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
+SCSI_Out__3__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
+SCSI_Out__3__PS EQU CYREG_PRT0_PS
+SCSI_Out__3__SHIFT EQU 5
+SCSI_Out__3__SLW EQU CYREG_PRT0_SLW
+SCSI_Out__4__AG EQU CYREG_PRT0_AG
+SCSI_Out__4__AMUX EQU CYREG_PRT0_AMUX
+SCSI_Out__4__BIE EQU CYREG_PRT0_BIE
+SCSI_Out__4__BIT_MASK EQU CYREG_PRT0_BIT_MASK
+SCSI_Out__4__BYP EQU CYREG_PRT0_BYP
+SCSI_Out__4__CTL EQU CYREG_PRT0_CTL
+SCSI_Out__4__DM0 EQU CYREG_PRT0_DM0
+SCSI_Out__4__DM1 EQU CYREG_PRT0_DM1
+SCSI_Out__4__DM2 EQU CYREG_PRT0_DM2
+SCSI_Out__4__DR EQU CYREG_PRT0_DR
+SCSI_Out__4__INP_DIS EQU CYREG_PRT0_INP_DIS
+SCSI_Out__4__INTTYPE EQU CYREG_PICU0_INTTYPE3
+SCSI_Out__4__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
+SCSI_Out__4__LCD_EN EQU CYREG_PRT0_LCD_EN
+SCSI_Out__4__MASK EQU 0x08
+SCSI_Out__4__PC EQU CYREG_PRT0_PC3
+SCSI_Out__4__PORT EQU 0
+SCSI_Out__4__PRT EQU CYREG_PRT0_PRT
+SCSI_Out__4__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
+SCSI_Out__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
+SCSI_Out__4__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
+SCSI_Out__4__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
+SCSI_Out__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
+SCSI_Out__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
+SCSI_Out__4__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
+SCSI_Out__4__PS EQU CYREG_PRT0_PS
+SCSI_Out__4__SHIFT EQU 3
+SCSI_Out__4__SLW EQU CYREG_PRT0_SLW
+SCSI_Out__5__AG EQU CYREG_PRT0_AG
+SCSI_Out__5__AMUX EQU CYREG_PRT0_AMUX
+SCSI_Out__5__BIE EQU CYREG_PRT0_BIE
+SCSI_Out__5__BIT_MASK EQU CYREG_PRT0_BIT_MASK
+SCSI_Out__5__BYP EQU CYREG_PRT0_BYP
+SCSI_Out__5__CTL EQU CYREG_PRT0_CTL
+SCSI_Out__5__DM0 EQU CYREG_PRT0_DM0
+SCSI_Out__5__DM1 EQU CYREG_PRT0_DM1
+SCSI_Out__5__DM2 EQU CYREG_PRT0_DM2
+SCSI_Out__5__DR EQU CYREG_PRT0_DR
+SCSI_Out__5__INP_DIS EQU CYREG_PRT0_INP_DIS
+SCSI_Out__5__INTTYPE EQU CYREG_PICU0_INTTYPE1
+SCSI_Out__5__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
+SCSI_Out__5__LCD_EN EQU CYREG_PRT0_LCD_EN
+SCSI_Out__5__MASK EQU 0x02
+SCSI_Out__5__PC EQU CYREG_PRT0_PC1
+SCSI_Out__5__PORT EQU 0
+SCSI_Out__5__PRT EQU CYREG_PRT0_PRT
+SCSI_Out__5__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
+SCSI_Out__5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
+SCSI_Out__5__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
+SCSI_Out__5__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
+SCSI_Out__5__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
+SCSI_Out__5__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
+SCSI_Out__5__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
+SCSI_Out__5__PS EQU CYREG_PRT0_PS
+SCSI_Out__5__SHIFT EQU 1
+SCSI_Out__5__SLW EQU CYREG_PRT0_SLW
+SCSI_Out__6__AG EQU CYREG_PRT4_AG
+SCSI_Out__6__AMUX EQU CYREG_PRT4_AMUX
+SCSI_Out__6__BIE EQU CYREG_PRT4_BIE
+SCSI_Out__6__BIT_MASK EQU CYREG_PRT4_BIT_MASK
+SCSI_Out__6__BYP EQU CYREG_PRT4_BYP
+SCSI_Out__6__CTL EQU CYREG_PRT4_CTL
+SCSI_Out__6__DM0 EQU CYREG_PRT4_DM0
+SCSI_Out__6__DM1 EQU CYREG_PRT4_DM1
+SCSI_Out__6__DM2 EQU CYREG_PRT4_DM2
+SCSI_Out__6__DR EQU CYREG_PRT4_DR
+SCSI_Out__6__INP_DIS EQU CYREG_PRT4_INP_DIS
+SCSI_Out__6__INTTYPE EQU CYREG_PICU4_INTTYPE1
+SCSI_Out__6__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
+SCSI_Out__6__LCD_EN EQU CYREG_PRT4_LCD_EN
+SCSI_Out__6__MASK EQU 0x02
+SCSI_Out__6__PC EQU CYREG_PRT4_PC1
+SCSI_Out__6__PORT EQU 4
+SCSI_Out__6__PRT EQU CYREG_PRT4_PRT
+SCSI_Out__6__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
+SCSI_Out__6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
+SCSI_Out__6__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
+SCSI_Out__6__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
+SCSI_Out__6__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
+SCSI_Out__6__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
+SCSI_Out__6__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
+SCSI_Out__6__PS EQU CYREG_PRT4_PS
+SCSI_Out__6__SHIFT EQU 1
+SCSI_Out__6__SLW EQU CYREG_PRT4_SLW
+SCSI_Out__7__AG EQU CYREG_PRT12_AG
+SCSI_Out__7__BIE EQU CYREG_PRT12_BIE
+SCSI_Out__7__BIT_MASK EQU CYREG_PRT12_BIT_MASK
+SCSI_Out__7__BYP EQU CYREG_PRT12_BYP
+SCSI_Out__7__DM0 EQU CYREG_PRT12_DM0
+SCSI_Out__7__DM1 EQU CYREG_PRT12_DM1
+SCSI_Out__7__DM2 EQU CYREG_PRT12_DM2
+SCSI_Out__7__DR EQU CYREG_PRT12_DR
+SCSI_Out__7__INP_DIS EQU CYREG_PRT12_INP_DIS
+SCSI_Out__7__INTTYPE EQU CYREG_PICU12_INTTYPE3
+SCSI_Out__7__MASK EQU 0x08
+SCSI_Out__7__PC EQU CYREG_PRT12_PC3
+SCSI_Out__7__PORT EQU 12
+SCSI_Out__7__PRT EQU CYREG_PRT12_PRT
+SCSI_Out__7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN
+SCSI_Out__7__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0
+SCSI_Out__7__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1
+SCSI_Out__7__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0
+SCSI_Out__7__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1
+SCSI_Out__7__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT
+SCSI_Out__7__PS EQU CYREG_PRT12_PS
+SCSI_Out__7__SHIFT EQU 3
+SCSI_Out__7__SIO_CFG EQU CYREG_PRT12_SIO_CFG
+SCSI_Out__7__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF
+SCSI_Out__7__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN
+SCSI_Out__7__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ
+SCSI_Out__7__SLW EQU CYREG_PRT12_SLW
+SCSI_Out__BSY__AG EQU CYREG_PRT4_AG
+SCSI_Out__BSY__AMUX EQU CYREG_PRT4_AMUX
+SCSI_Out__BSY__BIE EQU CYREG_PRT4_BIE
+SCSI_Out__BSY__BIT_MASK EQU CYREG_PRT4_BIT_MASK
+SCSI_Out__BSY__BYP EQU CYREG_PRT4_BYP
+SCSI_Out__BSY__CTL EQU CYREG_PRT4_CTL
+SCSI_Out__BSY__DM0 EQU CYREG_PRT4_DM0
+SCSI_Out__BSY__DM1 EQU CYREG_PRT4_DM1
+SCSI_Out__BSY__DM2 EQU CYREG_PRT4_DM2
+SCSI_Out__BSY__DR EQU CYREG_PRT4_DR
+SCSI_Out__BSY__INP_DIS EQU CYREG_PRT4_INP_DIS
+SCSI_Out__BSY__INTTYPE EQU CYREG_PICU4_INTTYPE6
+SCSI_Out__BSY__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
+SCSI_Out__BSY__LCD_EN EQU CYREG_PRT4_LCD_EN
+SCSI_Out__BSY__MASK EQU 0x40
+SCSI_Out__BSY__PC EQU CYREG_PRT4_PC6
+SCSI_Out__BSY__PORT EQU 4
+SCSI_Out__BSY__PRT EQU CYREG_PRT4_PRT
+SCSI_Out__BSY__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
+SCSI_Out__BSY__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
+SCSI_Out__BSY__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
+SCSI_Out__BSY__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
+SCSI_Out__BSY__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
+SCSI_Out__BSY__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
+SCSI_Out__BSY__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
+SCSI_Out__BSY__PS EQU CYREG_PRT4_PS
+SCSI_Out__BSY__SHIFT EQU 6
+SCSI_Out__BSY__SLW EQU CYREG_PRT4_SLW
+SCSI_Out__CD_raw__AG EQU CYREG_PRT0_AG
+SCSI_Out__CD_raw__AMUX EQU CYREG_PRT0_AMUX
+SCSI_Out__CD_raw__BIE EQU CYREG_PRT0_BIE
+SCSI_Out__CD_raw__BIT_MASK EQU CYREG_PRT0_BIT_MASK
+SCSI_Out__CD_raw__BYP EQU CYREG_PRT0_BYP
+SCSI_Out__CD_raw__CTL EQU CYREG_PRT0_CTL
+SCSI_Out__CD_raw__DM0 EQU CYREG_PRT0_DM0
+SCSI_Out__CD_raw__DM1 EQU CYREG_PRT0_DM1
+SCSI_Out__CD_raw__DM2 EQU CYREG_PRT0_DM2
+SCSI_Out__CD_raw__DR EQU CYREG_PRT0_DR
+SCSI_Out__CD_raw__INP_DIS EQU CYREG_PRT0_INP_DIS
+SCSI_Out__CD_raw__INTTYPE EQU CYREG_PICU0_INTTYPE1
+SCSI_Out__CD_raw__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
+SCSI_Out__CD_raw__LCD_EN EQU CYREG_PRT0_LCD_EN
+SCSI_Out__CD_raw__MASK EQU 0x02
+SCSI_Out__CD_raw__PC EQU CYREG_PRT0_PC1
+SCSI_Out__CD_raw__PORT EQU 0
+SCSI_Out__CD_raw__PRT EQU CYREG_PRT0_PRT
+SCSI_Out__CD_raw__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
+SCSI_Out__CD_raw__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
+SCSI_Out__CD_raw__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
+SCSI_Out__CD_raw__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
+SCSI_Out__CD_raw__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
+SCSI_Out__CD_raw__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
+SCSI_Out__CD_raw__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
+SCSI_Out__CD_raw__PS EQU CYREG_PRT0_PS
+SCSI_Out__CD_raw__SHIFT EQU 1
+SCSI_Out__CD_raw__SLW EQU CYREG_PRT0_SLW
+SCSI_Out__DBP_raw__AG EQU CYREG_PRT6_AG
+SCSI_Out__DBP_raw__AMUX EQU CYREG_PRT6_AMUX
+SCSI_Out__DBP_raw__BIE EQU CYREG_PRT6_BIE
+SCSI_Out__DBP_raw__BIT_MASK EQU CYREG_PRT6_BIT_MASK
+SCSI_Out__DBP_raw__BYP EQU CYREG_PRT6_BYP
+SCSI_Out__DBP_raw__CTL EQU CYREG_PRT6_CTL
+SCSI_Out__DBP_raw__DM0 EQU CYREG_PRT6_DM0
+SCSI_Out__DBP_raw__DM1 EQU CYREG_PRT6_DM1
+SCSI_Out__DBP_raw__DM2 EQU CYREG_PRT6_DM2
+SCSI_Out__DBP_raw__DR EQU CYREG_PRT6_DR
+SCSI_Out__DBP_raw__INP_DIS EQU CYREG_PRT6_INP_DIS
+SCSI_Out__DBP_raw__INTTYPE EQU CYREG_PICU6_INTTYPE2
+SCSI_Out__DBP_raw__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
+SCSI_Out__DBP_raw__LCD_EN EQU CYREG_PRT6_LCD_EN
+SCSI_Out__DBP_raw__MASK EQU 0x04
+SCSI_Out__DBP_raw__PC EQU CYREG_PRT6_PC2
+SCSI_Out__DBP_raw__PORT EQU 6
+SCSI_Out__DBP_raw__PRT EQU CYREG_PRT6_PRT
+SCSI_Out__DBP_raw__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
+SCSI_Out__DBP_raw__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
+SCSI_Out__DBP_raw__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
+SCSI_Out__DBP_raw__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
+SCSI_Out__DBP_raw__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
+SCSI_Out__DBP_raw__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
+SCSI_Out__DBP_raw__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
+SCSI_Out__DBP_raw__PS EQU CYREG_PRT6_PS
+SCSI_Out__DBP_raw__SHIFT EQU 2
+SCSI_Out__DBP_raw__SLW EQU CYREG_PRT6_SLW
+SCSI_Out__IO_raw__AG EQU CYREG_PRT12_AG
+SCSI_Out__IO_raw__BIE EQU CYREG_PRT12_BIE
+SCSI_Out__IO_raw__BIT_MASK EQU CYREG_PRT12_BIT_MASK
+SCSI_Out__IO_raw__BYP EQU CYREG_PRT12_BYP
+SCSI_Out__IO_raw__DM0 EQU CYREG_PRT12_DM0
+SCSI_Out__IO_raw__DM1 EQU CYREG_PRT12_DM1
+SCSI_Out__IO_raw__DM2 EQU CYREG_PRT12_DM2
+SCSI_Out__IO_raw__DR EQU CYREG_PRT12_DR
+SCSI_Out__IO_raw__INP_DIS EQU CYREG_PRT12_INP_DIS
+SCSI_Out__IO_raw__INTTYPE EQU CYREG_PICU12_INTTYPE3
+SCSI_Out__IO_raw__MASK EQU 0x08
+SCSI_Out__IO_raw__PC EQU CYREG_PRT12_PC3
+SCSI_Out__IO_raw__PORT EQU 12
+SCSI_Out__IO_raw__PRT EQU CYREG_PRT12_PRT
+SCSI_Out__IO_raw__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN
+SCSI_Out__IO_raw__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0
+SCSI_Out__IO_raw__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1
+SCSI_Out__IO_raw__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0
+SCSI_Out__IO_raw__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1
+SCSI_Out__IO_raw__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT
+SCSI_Out__IO_raw__PS EQU CYREG_PRT12_PS
+SCSI_Out__IO_raw__SHIFT EQU 3
+SCSI_Out__IO_raw__SIO_CFG EQU CYREG_PRT12_SIO_CFG
+SCSI_Out__IO_raw__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF
+SCSI_Out__IO_raw__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN
+SCSI_Out__IO_raw__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ
+SCSI_Out__IO_raw__SLW EQU CYREG_PRT12_SLW
+SCSI_Out__MSG_raw__AG EQU CYREG_PRT0_AG
+SCSI_Out__MSG_raw__AMUX EQU CYREG_PRT0_AMUX
+SCSI_Out__MSG_raw__BIE EQU CYREG_PRT0_BIE
+SCSI_Out__MSG_raw__BIT_MASK EQU CYREG_PRT0_BIT_MASK
+SCSI_Out__MSG_raw__BYP EQU CYREG_PRT0_BYP
+SCSI_Out__MSG_raw__CTL EQU CYREG_PRT0_CTL
+SCSI_Out__MSG_raw__DM0 EQU CYREG_PRT0_DM0
+SCSI_Out__MSG_raw__DM1 EQU CYREG_PRT0_DM1
+SCSI_Out__MSG_raw__DM2 EQU CYREG_PRT0_DM2
+SCSI_Out__MSG_raw__DR EQU CYREG_PRT0_DR
+SCSI_Out__MSG_raw__INP_DIS EQU CYREG_PRT0_INP_DIS
+SCSI_Out__MSG_raw__INTTYPE EQU CYREG_PICU0_INTTYPE5
+SCSI_Out__MSG_raw__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
+SCSI_Out__MSG_raw__LCD_EN EQU CYREG_PRT0_LCD_EN
+SCSI_Out__MSG_raw__MASK EQU 0x20
+SCSI_Out__MSG_raw__PC EQU CYREG_PRT0_PC5
+SCSI_Out__MSG_raw__PORT EQU 0
+SCSI_Out__MSG_raw__PRT EQU CYREG_PRT0_PRT
+SCSI_Out__MSG_raw__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
+SCSI_Out__MSG_raw__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
+SCSI_Out__MSG_raw__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
+SCSI_Out__MSG_raw__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
+SCSI_Out__MSG_raw__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
+SCSI_Out__MSG_raw__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
+SCSI_Out__MSG_raw__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
+SCSI_Out__MSG_raw__PS EQU CYREG_PRT0_PS
+SCSI_Out__MSG_raw__SHIFT EQU 5
+SCSI_Out__MSG_raw__SLW EQU CYREG_PRT0_SLW
+SCSI_Out__REQ__AG EQU CYREG_PRT4_AG
+SCSI_Out__REQ__AMUX EQU CYREG_PRT4_AMUX
+SCSI_Out__REQ__BIE EQU CYREG_PRT4_BIE
+SCSI_Out__REQ__BIT_MASK EQU CYREG_PRT4_BIT_MASK
+SCSI_Out__REQ__BYP EQU CYREG_PRT4_BYP
+SCSI_Out__REQ__CTL EQU CYREG_PRT4_CTL
+SCSI_Out__REQ__DM0 EQU CYREG_PRT4_DM0
+SCSI_Out__REQ__DM1 EQU CYREG_PRT4_DM1
+SCSI_Out__REQ__DM2 EQU CYREG_PRT4_DM2
+SCSI_Out__REQ__DR EQU CYREG_PRT4_DR
+SCSI_Out__REQ__INP_DIS EQU CYREG_PRT4_INP_DIS
+SCSI_Out__REQ__INTTYPE EQU CYREG_PICU4_INTTYPE1
+SCSI_Out__REQ__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
+SCSI_Out__REQ__LCD_EN EQU CYREG_PRT4_LCD_EN
+SCSI_Out__REQ__MASK EQU 0x02
+SCSI_Out__REQ__PC EQU CYREG_PRT4_PC1
+SCSI_Out__REQ__PORT EQU 4
+SCSI_Out__REQ__PRT EQU CYREG_PRT4_PRT
+SCSI_Out__REQ__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
+SCSI_Out__REQ__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
+SCSI_Out__REQ__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
+SCSI_Out__REQ__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
+SCSI_Out__REQ__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
+SCSI_Out__REQ__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
+SCSI_Out__REQ__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
+SCSI_Out__REQ__PS EQU CYREG_PRT4_PS
+SCSI_Out__REQ__SHIFT EQU 1
+SCSI_Out__REQ__SLW EQU CYREG_PRT4_SLW
+SCSI_Out__RST__AG EQU CYREG_PRT0_AG
+SCSI_Out__RST__AMUX EQU CYREG_PRT0_AMUX
+SCSI_Out__RST__BIE EQU CYREG_PRT0_BIE
+SCSI_Out__RST__BIT_MASK EQU CYREG_PRT0_BIT_MASK
+SCSI_Out__RST__BYP EQU CYREG_PRT0_BYP
+SCSI_Out__RST__CTL EQU CYREG_PRT0_CTL
+SCSI_Out__RST__DM0 EQU CYREG_PRT0_DM0
+SCSI_Out__RST__DM1 EQU CYREG_PRT0_DM1
+SCSI_Out__RST__DM2 EQU CYREG_PRT0_DM2
+SCSI_Out__RST__DR EQU CYREG_PRT0_DR
+SCSI_Out__RST__INP_DIS EQU CYREG_PRT0_INP_DIS
+SCSI_Out__RST__INTTYPE EQU CYREG_PICU0_INTTYPE7
+SCSI_Out__RST__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
+SCSI_Out__RST__LCD_EN EQU CYREG_PRT0_LCD_EN
+SCSI_Out__RST__MASK EQU 0x80
+SCSI_Out__RST__PC EQU CYREG_PRT0_PC7
+SCSI_Out__RST__PORT EQU 0
+SCSI_Out__RST__PRT EQU CYREG_PRT0_PRT
+SCSI_Out__RST__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
+SCSI_Out__RST__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
+SCSI_Out__RST__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
+SCSI_Out__RST__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
+SCSI_Out__RST__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
+SCSI_Out__RST__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
+SCSI_Out__RST__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
+SCSI_Out__RST__PS EQU CYREG_PRT0_PS
+SCSI_Out__RST__SHIFT EQU 7
+SCSI_Out__RST__SLW EQU CYREG_PRT0_SLW
+SCSI_Out__SEL__AG EQU CYREG_PRT0_AG
+SCSI_Out__SEL__AMUX EQU CYREG_PRT0_AMUX
+SCSI_Out__SEL__BIE EQU CYREG_PRT0_BIE
+SCSI_Out__SEL__BIT_MASK EQU CYREG_PRT0_BIT_MASK
+SCSI_Out__SEL__BYP EQU CYREG_PRT0_BYP
+SCSI_Out__SEL__CTL EQU CYREG_PRT0_CTL
+SCSI_Out__SEL__DM0 EQU CYREG_PRT0_DM0
+SCSI_Out__SEL__DM1 EQU CYREG_PRT0_DM1
+SCSI_Out__SEL__DM2 EQU CYREG_PRT0_DM2
+SCSI_Out__SEL__DR EQU CYREG_PRT0_DR
+SCSI_Out__SEL__INP_DIS EQU CYREG_PRT0_INP_DIS
+SCSI_Out__SEL__INTTYPE EQU CYREG_PICU0_INTTYPE3
+SCSI_Out__SEL__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
+SCSI_Out__SEL__LCD_EN EQU CYREG_PRT0_LCD_EN
+SCSI_Out__SEL__MASK EQU 0x08
+SCSI_Out__SEL__PC EQU CYREG_PRT0_PC3
+SCSI_Out__SEL__PORT EQU 0
+SCSI_Out__SEL__PRT EQU CYREG_PRT0_PRT
+SCSI_Out__SEL__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
+SCSI_Out__SEL__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
+SCSI_Out__SEL__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
+SCSI_Out__SEL__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
+SCSI_Out__SEL__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
+SCSI_Out__SEL__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
+SCSI_Out__SEL__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
+SCSI_Out__SEL__PS EQU CYREG_PRT0_PS
+SCSI_Out__SEL__SHIFT EQU 3
+SCSI_Out__SEL__SLW EQU CYREG_PRT0_SLW
+SCSI_Out_Bits_Sync_ctrl_reg__0__MASK EQU 0x01
+SCSI_Out_Bits_Sync_ctrl_reg__0__POS EQU 0
+SCSI_Out_Bits_Sync_ctrl_reg__1__MASK EQU 0x02
+SCSI_Out_Bits_Sync_ctrl_reg__1__POS EQU 1
+SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB07_08_ACTL
+SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB07_08_CTL
+SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB07_08_CTL
+SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB07_08_CTL
+SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB07_08_CTL
+SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB07_08_MSK
+SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB07_08_MSK
+SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB07_08_MSK
+SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB07_08_MSK
+SCSI_Out_Bits_Sync_ctrl_reg__2__MASK EQU 0x04
+SCSI_Out_Bits_Sync_ctrl_reg__2__POS EQU 2
+SCSI_Out_Bits_Sync_ctrl_reg__3__MASK EQU 0x08
+SCSI_Out_Bits_Sync_ctrl_reg__3__POS EQU 3
+SCSI_Out_Bits_Sync_ctrl_reg__4__MASK EQU 0x10
+SCSI_Out_Bits_Sync_ctrl_reg__4__POS EQU 4
+SCSI_Out_Bits_Sync_ctrl_reg__5__MASK EQU 0x20
+SCSI_Out_Bits_Sync_ctrl_reg__5__POS EQU 5
+SCSI_Out_Bits_Sync_ctrl_reg__6__MASK EQU 0x40
+SCSI_Out_Bits_Sync_ctrl_reg__6__POS EQU 6
+SCSI_Out_Bits_Sync_ctrl_reg__7__MASK EQU 0x80
+SCSI_Out_Bits_Sync_ctrl_reg__7__POS EQU 7
+SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB07_ACTL
+SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB07_CTL
+SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB07_ST_CTL
+SCSI_Out_Bits_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB07_CTL
+SCSI_Out_Bits_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB07_ST_CTL
+SCSI_Out_Bits_Sync_ctrl_reg__MASK EQU 0xFF
+SCSI_Out_Bits_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB07_MSK_ACTL
+SCSI_Out_Bits_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB07_MSK_ACTL
+SCSI_Out_Bits_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB07_MSK
+SCSI_Out_Ctl_Sync_ctrl_reg__0__MASK EQU 0x01
+SCSI_Out_Ctl_Sync_ctrl_reg__0__POS EQU 0
+SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB11_12_ACTL
+SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB11_12_CTL
+SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB11_12_CTL
+SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB11_12_CTL
+SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB11_12_CTL
+SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB11_12_MSK
+SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB11_12_MSK
+SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB11_12_MSK
+SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB11_12_MSK
+SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB11_ACTL
+SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB11_CTL
+SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB11_ST_CTL
+SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB11_CTL
+SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB11_ST_CTL
+SCSI_Out_Ctl_Sync_ctrl_reg__MASK EQU 0x01
+SCSI_Out_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB11_MSK_ACTL
+SCSI_Out_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB11_MSK_ACTL
+SCSI_Out_Ctl_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB11_MSK
+SCSI_Out_DBx__0__AG EQU CYREG_PRT6_AG
+SCSI_Out_DBx__0__AMUX EQU CYREG_PRT6_AMUX
+SCSI_Out_DBx__0__BIE EQU CYREG_PRT6_BIE
+SCSI_Out_DBx__0__BIT_MASK EQU CYREG_PRT6_BIT_MASK
+SCSI_Out_DBx__0__BYP EQU CYREG_PRT6_BYP
+SCSI_Out_DBx__0__CTL EQU CYREG_PRT6_CTL
+SCSI_Out_DBx__0__DM0 EQU CYREG_PRT6_DM0
+SCSI_Out_DBx__0__DM1 EQU CYREG_PRT6_DM1
+SCSI_Out_DBx__0__DM2 EQU CYREG_PRT6_DM2
+SCSI_Out_DBx__0__DR EQU CYREG_PRT6_DR
+SCSI_Out_DBx__0__INP_DIS EQU CYREG_PRT6_INP_DIS
+SCSI_Out_DBx__0__INTTYPE EQU CYREG_PICU6_INTTYPE7
+SCSI_Out_DBx__0__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
+SCSI_Out_DBx__0__LCD_EN EQU CYREG_PRT6_LCD_EN
+SCSI_Out_DBx__0__MASK EQU 0x80
+SCSI_Out_DBx__0__PC EQU CYREG_PRT6_PC7
+SCSI_Out_DBx__0__PORT EQU 6
+SCSI_Out_DBx__0__PRT EQU CYREG_PRT6_PRT
+SCSI_Out_DBx__0__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
+SCSI_Out_DBx__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
+SCSI_Out_DBx__0__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
+SCSI_Out_DBx__0__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
+SCSI_Out_DBx__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
+SCSI_Out_DBx__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
+SCSI_Out_DBx__0__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
+SCSI_Out_DBx__0__PS EQU CYREG_PRT6_PS
+SCSI_Out_DBx__0__SHIFT EQU 7
+SCSI_Out_DBx__0__SLW EQU CYREG_PRT6_SLW
+SCSI_Out_DBx__1__AG EQU CYREG_PRT6_AG
+SCSI_Out_DBx__1__AMUX EQU CYREG_PRT6_AMUX
+SCSI_Out_DBx__1__BIE EQU CYREG_PRT6_BIE
+SCSI_Out_DBx__1__BIT_MASK EQU CYREG_PRT6_BIT_MASK
+SCSI_Out_DBx__1__BYP EQU CYREG_PRT6_BYP
+SCSI_Out_DBx__1__CTL EQU CYREG_PRT6_CTL
+SCSI_Out_DBx__1__DM0 EQU CYREG_PRT6_DM0
+SCSI_Out_DBx__1__DM1 EQU CYREG_PRT6_DM1
+SCSI_Out_DBx__1__DM2 EQU CYREG_PRT6_DM2
+SCSI_Out_DBx__1__DR EQU CYREG_PRT6_DR
+SCSI_Out_DBx__1__INP_DIS EQU CYREG_PRT6_INP_DIS
+SCSI_Out_DBx__1__INTTYPE EQU CYREG_PICU6_INTTYPE5
+SCSI_Out_DBx__1__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
+SCSI_Out_DBx__1__LCD_EN EQU CYREG_PRT6_LCD_EN
+SCSI_Out_DBx__1__MASK EQU 0x20
+SCSI_Out_DBx__1__PC EQU CYREG_PRT6_PC5
+SCSI_Out_DBx__1__PORT EQU 6
+SCSI_Out_DBx__1__PRT EQU CYREG_PRT6_PRT
+SCSI_Out_DBx__1__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
+SCSI_Out_DBx__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
+SCSI_Out_DBx__1__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
+SCSI_Out_DBx__1__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
+SCSI_Out_DBx__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
+SCSI_Out_DBx__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
+SCSI_Out_DBx__1__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
+SCSI_Out_DBx__1__PS EQU CYREG_PRT6_PS
+SCSI_Out_DBx__1__SHIFT EQU 5
+SCSI_Out_DBx__1__SLW EQU CYREG_PRT6_SLW
+SCSI_Out_DBx__2__AG EQU CYREG_PRT12_AG
+SCSI_Out_DBx__2__BIE EQU CYREG_PRT12_BIE
+SCSI_Out_DBx__2__BIT_MASK EQU CYREG_PRT12_BIT_MASK
+SCSI_Out_DBx__2__BYP EQU CYREG_PRT12_BYP
+SCSI_Out_DBx__2__DM0 EQU CYREG_PRT12_DM0
+SCSI_Out_DBx__2__DM1 EQU CYREG_PRT12_DM1
+SCSI_Out_DBx__2__DM2 EQU CYREG_PRT12_DM2
+SCSI_Out_DBx__2__DR EQU CYREG_PRT12_DR
+SCSI_Out_DBx__2__INP_DIS EQU CYREG_PRT12_INP_DIS
+SCSI_Out_DBx__2__INTTYPE EQU CYREG_PICU12_INTTYPE5
+SCSI_Out_DBx__2__MASK EQU 0x20
+SCSI_Out_DBx__2__PC EQU CYREG_PRT12_PC5
+SCSI_Out_DBx__2__PORT EQU 12
+SCSI_Out_DBx__2__PRT EQU CYREG_PRT12_PRT
+SCSI_Out_DBx__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN
+SCSI_Out_DBx__2__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0
+SCSI_Out_DBx__2__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1
+SCSI_Out_DBx__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0
+SCSI_Out_DBx__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1
+SCSI_Out_DBx__2__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT
+SCSI_Out_DBx__2__PS EQU CYREG_PRT12_PS
+SCSI_Out_DBx__2__SHIFT EQU 5
+SCSI_Out_DBx__2__SIO_CFG EQU CYREG_PRT12_SIO_CFG
+SCSI_Out_DBx__2__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF
+SCSI_Out_DBx__2__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN
+SCSI_Out_DBx__2__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ
+SCSI_Out_DBx__2__SLW EQU CYREG_PRT12_SLW
+SCSI_Out_DBx__3__AG EQU CYREG_PRT2_AG
+SCSI_Out_DBx__3__AMUX EQU CYREG_PRT2_AMUX
+SCSI_Out_DBx__3__BIE EQU CYREG_PRT2_BIE
+SCSI_Out_DBx__3__BIT_MASK EQU CYREG_PRT2_BIT_MASK
+SCSI_Out_DBx__3__BYP EQU CYREG_PRT2_BYP
+SCSI_Out_DBx__3__CTL EQU CYREG_PRT2_CTL
+SCSI_Out_DBx__3__DM0 EQU CYREG_PRT2_DM0
+SCSI_Out_DBx__3__DM1 EQU CYREG_PRT2_DM1
+SCSI_Out_DBx__3__DM2 EQU CYREG_PRT2_DM2
+SCSI_Out_DBx__3__DR EQU CYREG_PRT2_DR
+SCSI_Out_DBx__3__INP_DIS EQU CYREG_PRT2_INP_DIS
+SCSI_Out_DBx__3__INTTYPE EQU CYREG_PICU2_INTTYPE7
+SCSI_Out_DBx__3__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
+SCSI_Out_DBx__3__LCD_EN EQU CYREG_PRT2_LCD_EN
+SCSI_Out_DBx__3__MASK EQU 0x80
+SCSI_Out_DBx__3__PC EQU CYREG_PRT2_PC7
+SCSI_Out_DBx__3__PORT EQU 2
+SCSI_Out_DBx__3__PRT EQU CYREG_PRT2_PRT
+SCSI_Out_DBx__3__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
+SCSI_Out_DBx__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
+SCSI_Out_DBx__3__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
+SCSI_Out_DBx__3__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
+SCSI_Out_DBx__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
+SCSI_Out_DBx__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
+SCSI_Out_DBx__3__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
+SCSI_Out_DBx__3__PS EQU CYREG_PRT2_PS
+SCSI_Out_DBx__3__SHIFT EQU 7
+SCSI_Out_DBx__3__SLW EQU CYREG_PRT2_SLW
+SCSI_Out_DBx__4__AG EQU CYREG_PRT2_AG
+SCSI_Out_DBx__4__AMUX EQU CYREG_PRT2_AMUX
+SCSI_Out_DBx__4__BIE EQU CYREG_PRT2_BIE
+SCSI_Out_DBx__4__BIT_MASK EQU CYREG_PRT2_BIT_MASK
+SCSI_Out_DBx__4__BYP EQU CYREG_PRT2_BYP
+SCSI_Out_DBx__4__CTL EQU CYREG_PRT2_CTL
+SCSI_Out_DBx__4__DM0 EQU CYREG_PRT2_DM0
+SCSI_Out_DBx__4__DM1 EQU CYREG_PRT2_DM1
+SCSI_Out_DBx__4__DM2 EQU CYREG_PRT2_DM2
+SCSI_Out_DBx__4__DR EQU CYREG_PRT2_DR
+SCSI_Out_DBx__4__INP_DIS EQU CYREG_PRT2_INP_DIS
+SCSI_Out_DBx__4__INTTYPE EQU CYREG_PICU2_INTTYPE5
+SCSI_Out_DBx__4__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
+SCSI_Out_DBx__4__LCD_EN EQU CYREG_PRT2_LCD_EN
+SCSI_Out_DBx__4__MASK EQU 0x20
+SCSI_Out_DBx__4__PC EQU CYREG_PRT2_PC5
+SCSI_Out_DBx__4__PORT EQU 2
+SCSI_Out_DBx__4__PRT EQU CYREG_PRT2_PRT
+SCSI_Out_DBx__4__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
+SCSI_Out_DBx__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
+SCSI_Out_DBx__4__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
+SCSI_Out_DBx__4__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
+SCSI_Out_DBx__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
+SCSI_Out_DBx__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
+SCSI_Out_DBx__4__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
+SCSI_Out_DBx__4__PS EQU CYREG_PRT2_PS
+SCSI_Out_DBx__4__SHIFT EQU 5
+SCSI_Out_DBx__4__SLW EQU CYREG_PRT2_SLW
+SCSI_Out_DBx__5__AG EQU CYREG_PRT2_AG
+SCSI_Out_DBx__5__AMUX EQU CYREG_PRT2_AMUX
+SCSI_Out_DBx__5__BIE EQU CYREG_PRT2_BIE
+SCSI_Out_DBx__5__BIT_MASK EQU CYREG_PRT2_BIT_MASK
+SCSI_Out_DBx__5__BYP EQU CYREG_PRT2_BYP
+SCSI_Out_DBx__5__CTL EQU CYREG_PRT2_CTL
+SCSI_Out_DBx__5__DM0 EQU CYREG_PRT2_DM0
+SCSI_Out_DBx__5__DM1 EQU CYREG_PRT2_DM1
+SCSI_Out_DBx__5__DM2 EQU CYREG_PRT2_DM2
+SCSI_Out_DBx__5__DR EQU CYREG_PRT2_DR
+SCSI_Out_DBx__5__INP_DIS EQU CYREG_PRT2_INP_DIS
+SCSI_Out_DBx__5__INTTYPE EQU CYREG_PICU2_INTTYPE3
+SCSI_Out_DBx__5__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
+SCSI_Out_DBx__5__LCD_EN EQU CYREG_PRT2_LCD_EN
+SCSI_Out_DBx__5__MASK EQU 0x08
+SCSI_Out_DBx__5__PC EQU CYREG_PRT2_PC3
+SCSI_Out_DBx__5__PORT EQU 2
+SCSI_Out_DBx__5__PRT EQU CYREG_PRT2_PRT
+SCSI_Out_DBx__5__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
+SCSI_Out_DBx__5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
+SCSI_Out_DBx__5__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
+SCSI_Out_DBx__5__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
+SCSI_Out_DBx__5__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
+SCSI_Out_DBx__5__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
+SCSI_Out_DBx__5__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
+SCSI_Out_DBx__5__PS EQU CYREG_PRT2_PS
+SCSI_Out_DBx__5__SHIFT EQU 3
+SCSI_Out_DBx__5__SLW EQU CYREG_PRT2_SLW
+SCSI_Out_DBx__6__AG EQU CYREG_PRT2_AG
+SCSI_Out_DBx__6__AMUX EQU CYREG_PRT2_AMUX
+SCSI_Out_DBx__6__BIE EQU CYREG_PRT2_BIE
+SCSI_Out_DBx__6__BIT_MASK EQU CYREG_PRT2_BIT_MASK
+SCSI_Out_DBx__6__BYP EQU CYREG_PRT2_BYP
+SCSI_Out_DBx__6__CTL EQU CYREG_PRT2_CTL
+SCSI_Out_DBx__6__DM0 EQU CYREG_PRT2_DM0
+SCSI_Out_DBx__6__DM1 EQU CYREG_PRT2_DM1
+SCSI_Out_DBx__6__DM2 EQU CYREG_PRT2_DM2
+SCSI_Out_DBx__6__DR EQU CYREG_PRT2_DR
+SCSI_Out_DBx__6__INP_DIS EQU CYREG_PRT2_INP_DIS
+SCSI_Out_DBx__6__INTTYPE EQU CYREG_PICU2_INTTYPE1
+SCSI_Out_DBx__6__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
+SCSI_Out_DBx__6__LCD_EN EQU CYREG_PRT2_LCD_EN
+SCSI_Out_DBx__6__MASK EQU 0x02
+SCSI_Out_DBx__6__PC EQU CYREG_PRT2_PC1
+SCSI_Out_DBx__6__PORT EQU 2
+SCSI_Out_DBx__6__PRT EQU CYREG_PRT2_PRT
+SCSI_Out_DBx__6__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
+SCSI_Out_DBx__6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
+SCSI_Out_DBx__6__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
+SCSI_Out_DBx__6__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
+SCSI_Out_DBx__6__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
+SCSI_Out_DBx__6__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
+SCSI_Out_DBx__6__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
+SCSI_Out_DBx__6__PS EQU CYREG_PRT2_PS
+SCSI_Out_DBx__6__SHIFT EQU 1
+SCSI_Out_DBx__6__SLW EQU CYREG_PRT2_SLW
+SCSI_Out_DBx__7__AG EQU CYREG_PRT15_AG
+SCSI_Out_DBx__7__AMUX EQU CYREG_PRT15_AMUX
+SCSI_Out_DBx__7__BIE EQU CYREG_PRT15_BIE
+SCSI_Out_DBx__7__BIT_MASK EQU CYREG_PRT15_BIT_MASK
+SCSI_Out_DBx__7__BYP EQU CYREG_PRT15_BYP
+SCSI_Out_DBx__7__CTL EQU CYREG_PRT15_CTL
+SCSI_Out_DBx__7__DM0 EQU CYREG_PRT15_DM0
+SCSI_Out_DBx__7__DM1 EQU CYREG_PRT15_DM1
+SCSI_Out_DBx__7__DM2 EQU CYREG_PRT15_DM2
+SCSI_Out_DBx__7__DR EQU CYREG_PRT15_DR
+SCSI_Out_DBx__7__INP_DIS EQU CYREG_PRT15_INP_DIS
+SCSI_Out_DBx__7__INTTYPE EQU CYREG_PICU15_INTTYPE5
+SCSI_Out_DBx__7__LCD_COM_SEG EQU CYREG_PRT15_LCD_COM_SEG
+SCSI_Out_DBx__7__LCD_EN EQU CYREG_PRT15_LCD_EN
+SCSI_Out_DBx__7__MASK EQU 0x20
+SCSI_Out_DBx__7__PC EQU CYREG_IO_PC_PRT15_PC5
+SCSI_Out_DBx__7__PORT EQU 15
+SCSI_Out_DBx__7__PRT EQU CYREG_PRT15_PRT
+SCSI_Out_DBx__7__PRTDSI__CAPS_SEL EQU CYREG_PRT15_CAPS_SEL
+SCSI_Out_DBx__7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT15_DBL_SYNC_IN
+SCSI_Out_DBx__7__PRTDSI__OE_SEL0 EQU CYREG_PRT15_OE_SEL0
+SCSI_Out_DBx__7__PRTDSI__OE_SEL1 EQU CYREG_PRT15_OE_SEL1
+SCSI_Out_DBx__7__PRTDSI__OUT_SEL0 EQU CYREG_PRT15_OUT_SEL0
+SCSI_Out_DBx__7__PRTDSI__OUT_SEL1 EQU CYREG_PRT15_OUT_SEL1
+SCSI_Out_DBx__7__PRTDSI__SYNC_OUT EQU CYREG_PRT15_SYNC_OUT
+SCSI_Out_DBx__7__PS EQU CYREG_PRT15_PS
+SCSI_Out_DBx__7__SHIFT EQU 5
+SCSI_Out_DBx__7__SLW EQU CYREG_PRT15_SLW
+SCSI_Out_DBx__DB0__AG EQU CYREG_PRT6_AG
+SCSI_Out_DBx__DB0__AMUX EQU CYREG_PRT6_AMUX
+SCSI_Out_DBx__DB0__BIE EQU CYREG_PRT6_BIE
+SCSI_Out_DBx__DB0__BIT_MASK EQU CYREG_PRT6_BIT_MASK
+SCSI_Out_DBx__DB0__BYP EQU CYREG_PRT6_BYP
+SCSI_Out_DBx__DB0__CTL EQU CYREG_PRT6_CTL
+SCSI_Out_DBx__DB0__DM0 EQU CYREG_PRT6_DM0
+SCSI_Out_DBx__DB0__DM1 EQU CYREG_PRT6_DM1
+SCSI_Out_DBx__DB0__DM2 EQU CYREG_PRT6_DM2
+SCSI_Out_DBx__DB0__DR EQU CYREG_PRT6_DR
+SCSI_Out_DBx__DB0__INP_DIS EQU CYREG_PRT6_INP_DIS
+SCSI_Out_DBx__DB0__INTTYPE EQU CYREG_PICU6_INTTYPE7
+SCSI_Out_DBx__DB0__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
+SCSI_Out_DBx__DB0__LCD_EN EQU CYREG_PRT6_LCD_EN
+SCSI_Out_DBx__DB0__MASK EQU 0x80
+SCSI_Out_DBx__DB0__PC EQU CYREG_PRT6_PC7
+SCSI_Out_DBx__DB0__PORT EQU 6
+SCSI_Out_DBx__DB0__PRT EQU CYREG_PRT6_PRT
+SCSI_Out_DBx__DB0__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
+SCSI_Out_DBx__DB0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
+SCSI_Out_DBx__DB0__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
+SCSI_Out_DBx__DB0__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
+SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
+SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
+SCSI_Out_DBx__DB0__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
+SCSI_Out_DBx__DB0__PS EQU CYREG_PRT6_PS
+SCSI_Out_DBx__DB0__SHIFT EQU 7
+SCSI_Out_DBx__DB0__SLW EQU CYREG_PRT6_SLW
+SCSI_Out_DBx__DB1__AG EQU CYREG_PRT6_AG
+SCSI_Out_DBx__DB1__AMUX EQU CYREG_PRT6_AMUX
+SCSI_Out_DBx__DB1__BIE EQU CYREG_PRT6_BIE
+SCSI_Out_DBx__DB1__BIT_MASK EQU CYREG_PRT6_BIT_MASK
+SCSI_Out_DBx__DB1__BYP EQU CYREG_PRT6_BYP
+SCSI_Out_DBx__DB1__CTL EQU CYREG_PRT6_CTL
+SCSI_Out_DBx__DB1__DM0 EQU CYREG_PRT6_DM0
+SCSI_Out_DBx__DB1__DM1 EQU CYREG_PRT6_DM1
+SCSI_Out_DBx__DB1__DM2 EQU CYREG_PRT6_DM2
+SCSI_Out_DBx__DB1__DR EQU CYREG_PRT6_DR
+SCSI_Out_DBx__DB1__INP_DIS EQU CYREG_PRT6_INP_DIS
+SCSI_Out_DBx__DB1__INTTYPE EQU CYREG_PICU6_INTTYPE5
+SCSI_Out_DBx__DB1__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG
+SCSI_Out_DBx__DB1__LCD_EN EQU CYREG_PRT6_LCD_EN
+SCSI_Out_DBx__DB1__MASK EQU 0x20
+SCSI_Out_DBx__DB1__PC EQU CYREG_PRT6_PC5
+SCSI_Out_DBx__DB1__PORT EQU 6
+SCSI_Out_DBx__DB1__PRT EQU CYREG_PRT6_PRT
+SCSI_Out_DBx__DB1__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL
+SCSI_Out_DBx__DB1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN
+SCSI_Out_DBx__DB1__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0
+SCSI_Out_DBx__DB1__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1
+SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0
+SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1
+SCSI_Out_DBx__DB1__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT
+SCSI_Out_DBx__DB1__PS EQU CYREG_PRT6_PS
+SCSI_Out_DBx__DB1__SHIFT EQU 5
+SCSI_Out_DBx__DB1__SLW EQU CYREG_PRT6_SLW
+SCSI_Out_DBx__DB2__AG EQU CYREG_PRT12_AG
+SCSI_Out_DBx__DB2__BIE EQU CYREG_PRT12_BIE
+SCSI_Out_DBx__DB2__BIT_MASK EQU CYREG_PRT12_BIT_MASK
+SCSI_Out_DBx__DB2__BYP EQU CYREG_PRT12_BYP
+SCSI_Out_DBx__DB2__DM0 EQU CYREG_PRT12_DM0
+SCSI_Out_DBx__DB2__DM1 EQU CYREG_PRT12_DM1
+SCSI_Out_DBx__DB2__DM2 EQU CYREG_PRT12_DM2
+SCSI_Out_DBx__DB2__DR EQU CYREG_PRT12_DR
+SCSI_Out_DBx__DB2__INP_DIS EQU CYREG_PRT12_INP_DIS
+SCSI_Out_DBx__DB2__INTTYPE EQU CYREG_PICU12_INTTYPE5
+SCSI_Out_DBx__DB2__MASK EQU 0x20
+SCSI_Out_DBx__DB2__PC EQU CYREG_PRT12_PC5
+SCSI_Out_DBx__DB2__PORT EQU 12
+SCSI_Out_DBx__DB2__PRT EQU CYREG_PRT12_PRT
+SCSI_Out_DBx__DB2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT12_DBL_SYNC_IN
+SCSI_Out_DBx__DB2__PRTDSI__OE_SEL0 EQU CYREG_PRT12_OE_SEL0
+SCSI_Out_DBx__DB2__PRTDSI__OE_SEL1 EQU CYREG_PRT12_OE_SEL1
+SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL0 EQU CYREG_PRT12_OUT_SEL0
+SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL1 EQU CYREG_PRT12_OUT_SEL1
+SCSI_Out_DBx__DB2__PRTDSI__SYNC_OUT EQU CYREG_PRT12_SYNC_OUT
+SCSI_Out_DBx__DB2__PS EQU CYREG_PRT12_PS
+SCSI_Out_DBx__DB2__SHIFT EQU 5
+SCSI_Out_DBx__DB2__SIO_CFG EQU CYREG_PRT12_SIO_CFG
+SCSI_Out_DBx__DB2__SIO_DIFF EQU CYREG_PRT12_SIO_DIFF
+SCSI_Out_DBx__DB2__SIO_HYST_EN EQU CYREG_PRT12_SIO_HYST_EN
+SCSI_Out_DBx__DB2__SIO_REG_HIFREQ EQU CYREG_PRT12_SIO_REG_HIFREQ
+SCSI_Out_DBx__DB2__SLW EQU CYREG_PRT12_SLW
+SCSI_Out_DBx__DB3__AG EQU CYREG_PRT2_AG
+SCSI_Out_DBx__DB3__AMUX EQU CYREG_PRT2_AMUX
+SCSI_Out_DBx__DB3__BIE EQU CYREG_PRT2_BIE
+SCSI_Out_DBx__DB3__BIT_MASK EQU CYREG_PRT2_BIT_MASK
+SCSI_Out_DBx__DB3__BYP EQU CYREG_PRT2_BYP
+SCSI_Out_DBx__DB3__CTL EQU CYREG_PRT2_CTL
+SCSI_Out_DBx__DB3__DM0 EQU CYREG_PRT2_DM0
+SCSI_Out_DBx__DB3__DM1 EQU CYREG_PRT2_DM1
+SCSI_Out_DBx__DB3__DM2 EQU CYREG_PRT2_DM2
+SCSI_Out_DBx__DB3__DR EQU CYREG_PRT2_DR
+SCSI_Out_DBx__DB3__INP_DIS EQU CYREG_PRT2_INP_DIS
+SCSI_Out_DBx__DB3__INTTYPE EQU CYREG_PICU2_INTTYPE7
+SCSI_Out_DBx__DB3__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
+SCSI_Out_DBx__DB3__LCD_EN EQU CYREG_PRT2_LCD_EN
+SCSI_Out_DBx__DB3__MASK EQU 0x80
+SCSI_Out_DBx__DB3__PC EQU CYREG_PRT2_PC7
+SCSI_Out_DBx__DB3__PORT EQU 2
+SCSI_Out_DBx__DB3__PRT EQU CYREG_PRT2_PRT
+SCSI_Out_DBx__DB3__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
+SCSI_Out_DBx__DB3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
+SCSI_Out_DBx__DB3__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
+SCSI_Out_DBx__DB3__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
+SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
+SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
+SCSI_Out_DBx__DB3__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
+SCSI_Out_DBx__DB3__PS EQU CYREG_PRT2_PS
+SCSI_Out_DBx__DB3__SHIFT EQU 7
+SCSI_Out_DBx__DB3__SLW EQU CYREG_PRT2_SLW
+SCSI_Out_DBx__DB4__AG EQU CYREG_PRT2_AG
+SCSI_Out_DBx__DB4__AMUX EQU CYREG_PRT2_AMUX
+SCSI_Out_DBx__DB4__BIE EQU CYREG_PRT2_BIE
+SCSI_Out_DBx__DB4__BIT_MASK EQU CYREG_PRT2_BIT_MASK
+SCSI_Out_DBx__DB4__BYP EQU CYREG_PRT2_BYP
+SCSI_Out_DBx__DB4__CTL EQU CYREG_PRT2_CTL
+SCSI_Out_DBx__DB4__DM0 EQU CYREG_PRT2_DM0
+SCSI_Out_DBx__DB4__DM1 EQU CYREG_PRT2_DM1
+SCSI_Out_DBx__DB4__DM2 EQU CYREG_PRT2_DM2
+SCSI_Out_DBx__DB4__DR EQU CYREG_PRT2_DR
+SCSI_Out_DBx__DB4__INP_DIS EQU CYREG_PRT2_INP_DIS
+SCSI_Out_DBx__DB4__INTTYPE EQU CYREG_PICU2_INTTYPE5
+SCSI_Out_DBx__DB4__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
+SCSI_Out_DBx__DB4__LCD_EN EQU CYREG_PRT2_LCD_EN
+SCSI_Out_DBx__DB4__MASK EQU 0x20
+SCSI_Out_DBx__DB4__PC EQU CYREG_PRT2_PC5
+SCSI_Out_DBx__DB4__PORT EQU 2
+SCSI_Out_DBx__DB4__PRT EQU CYREG_PRT2_PRT
+SCSI_Out_DBx__DB4__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
+SCSI_Out_DBx__DB4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
+SCSI_Out_DBx__DB4__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
+SCSI_Out_DBx__DB4__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
+SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
+SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
+SCSI_Out_DBx__DB4__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
+SCSI_Out_DBx__DB4__PS EQU CYREG_PRT2_PS
+SCSI_Out_DBx__DB4__SHIFT EQU 5
+SCSI_Out_DBx__DB4__SLW EQU CYREG_PRT2_SLW
+SCSI_Out_DBx__DB5__AG EQU CYREG_PRT2_AG
+SCSI_Out_DBx__DB5__AMUX EQU CYREG_PRT2_AMUX
+SCSI_Out_DBx__DB5__BIE EQU CYREG_PRT2_BIE
+SCSI_Out_DBx__DB5__BIT_MASK EQU CYREG_PRT2_BIT_MASK
+SCSI_Out_DBx__DB5__BYP EQU CYREG_PRT2_BYP
+SCSI_Out_DBx__DB5__CTL EQU CYREG_PRT2_CTL
+SCSI_Out_DBx__DB5__DM0 EQU CYREG_PRT2_DM0
+SCSI_Out_DBx__DB5__DM1 EQU CYREG_PRT2_DM1
+SCSI_Out_DBx__DB5__DM2 EQU CYREG_PRT2_DM2
+SCSI_Out_DBx__DB5__DR EQU CYREG_PRT2_DR
+SCSI_Out_DBx__DB5__INP_DIS EQU CYREG_PRT2_INP_DIS
+SCSI_Out_DBx__DB5__INTTYPE EQU CYREG_PICU2_INTTYPE3
+SCSI_Out_DBx__DB5__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
+SCSI_Out_DBx__DB5__LCD_EN EQU CYREG_PRT2_LCD_EN
+SCSI_Out_DBx__DB5__MASK EQU 0x08
+SCSI_Out_DBx__DB5__PC EQU CYREG_PRT2_PC3
+SCSI_Out_DBx__DB5__PORT EQU 2
+SCSI_Out_DBx__DB5__PRT EQU CYREG_PRT2_PRT
+SCSI_Out_DBx__DB5__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
+SCSI_Out_DBx__DB5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
+SCSI_Out_DBx__DB5__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
+SCSI_Out_DBx__DB5__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
+SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
+SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
+SCSI_Out_DBx__DB5__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
+SCSI_Out_DBx__DB5__PS EQU CYREG_PRT2_PS
+SCSI_Out_DBx__DB5__SHIFT EQU 3
+SCSI_Out_DBx__DB5__SLW EQU CYREG_PRT2_SLW
+SCSI_Out_DBx__DB6__AG EQU CYREG_PRT2_AG
+SCSI_Out_DBx__DB6__AMUX EQU CYREG_PRT2_AMUX
+SCSI_Out_DBx__DB6__BIE EQU CYREG_PRT2_BIE
+SCSI_Out_DBx__DB6__BIT_MASK EQU CYREG_PRT2_BIT_MASK
+SCSI_Out_DBx__DB6__BYP EQU CYREG_PRT2_BYP
+SCSI_Out_DBx__DB6__CTL EQU CYREG_PRT2_CTL
+SCSI_Out_DBx__DB6__DM0 EQU CYREG_PRT2_DM0
+SCSI_Out_DBx__DB6__DM1 EQU CYREG_PRT2_DM1
+SCSI_Out_DBx__DB6__DM2 EQU CYREG_PRT2_DM2
+SCSI_Out_DBx__DB6__DR EQU CYREG_PRT2_DR
+SCSI_Out_DBx__DB6__INP_DIS EQU CYREG_PRT2_INP_DIS
+SCSI_Out_DBx__DB6__INTTYPE EQU CYREG_PICU2_INTTYPE1
+SCSI_Out_DBx__DB6__LCD_COM_SEG EQU CYREG_PRT2_LCD_COM_SEG
+SCSI_Out_DBx__DB6__LCD_EN EQU CYREG_PRT2_LCD_EN
+SCSI_Out_DBx__DB6__MASK EQU 0x02
+SCSI_Out_DBx__DB6__PC EQU CYREG_PRT2_PC1
+SCSI_Out_DBx__DB6__PORT EQU 2
+SCSI_Out_DBx__DB6__PRT EQU CYREG_PRT2_PRT
+SCSI_Out_DBx__DB6__PRTDSI__CAPS_SEL EQU CYREG_PRT2_CAPS_SEL
+SCSI_Out_DBx__DB6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT2_DBL_SYNC_IN
+SCSI_Out_DBx__DB6__PRTDSI__OE_SEL0 EQU CYREG_PRT2_OE_SEL0
+SCSI_Out_DBx__DB6__PRTDSI__OE_SEL1 EQU CYREG_PRT2_OE_SEL1
+SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL0 EQU CYREG_PRT2_OUT_SEL0
+SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL1 EQU CYREG_PRT2_OUT_SEL1
+SCSI_Out_DBx__DB6__PRTDSI__SYNC_OUT EQU CYREG_PRT2_SYNC_OUT
+SCSI_Out_DBx__DB6__PS EQU CYREG_PRT2_PS
+SCSI_Out_DBx__DB6__SHIFT EQU 1
+SCSI_Out_DBx__DB6__SLW EQU CYREG_PRT2_SLW
+SCSI_Out_DBx__DB7__AG EQU CYREG_PRT15_AG
+SCSI_Out_DBx__DB7__AMUX EQU CYREG_PRT15_AMUX
+SCSI_Out_DBx__DB7__BIE EQU CYREG_PRT15_BIE
+SCSI_Out_DBx__DB7__BIT_MASK EQU CYREG_PRT15_BIT_MASK
+SCSI_Out_DBx__DB7__BYP EQU CYREG_PRT15_BYP
+SCSI_Out_DBx__DB7__CTL EQU CYREG_PRT15_CTL
+SCSI_Out_DBx__DB7__DM0 EQU CYREG_PRT15_DM0
+SCSI_Out_DBx__DB7__DM1 EQU CYREG_PRT15_DM1
+SCSI_Out_DBx__DB7__DM2 EQU CYREG_PRT15_DM2
+SCSI_Out_DBx__DB7__DR EQU CYREG_PRT15_DR
+SCSI_Out_DBx__DB7__INP_DIS EQU CYREG_PRT15_INP_DIS
+SCSI_Out_DBx__DB7__INTTYPE EQU CYREG_PICU15_INTTYPE5
+SCSI_Out_DBx__DB7__LCD_COM_SEG EQU CYREG_PRT15_LCD_COM_SEG
+SCSI_Out_DBx__DB7__LCD_EN EQU CYREG_PRT15_LCD_EN
+SCSI_Out_DBx__DB7__MASK EQU 0x20
+SCSI_Out_DBx__DB7__PC EQU CYREG_IO_PC_PRT15_PC5
+SCSI_Out_DBx__DB7__PORT EQU 15
+SCSI_Out_DBx__DB7__PRT EQU CYREG_PRT15_PRT
+SCSI_Out_DBx__DB7__PRTDSI__CAPS_SEL EQU CYREG_PRT15_CAPS_SEL
+SCSI_Out_DBx__DB7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT15_DBL_SYNC_IN
+SCSI_Out_DBx__DB7__PRTDSI__OE_SEL0 EQU CYREG_PRT15_OE_SEL0
+SCSI_Out_DBx__DB7__PRTDSI__OE_SEL1 EQU CYREG_PRT15_OE_SEL1
+SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL0 EQU CYREG_PRT15_OUT_SEL0
+SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL1 EQU CYREG_PRT15_OUT_SEL1
+SCSI_Out_DBx__DB7__PRTDSI__SYNC_OUT EQU CYREG_PRT15_SYNC_OUT
+SCSI_Out_DBx__DB7__PS EQU CYREG_PRT15_PS
+SCSI_Out_DBx__DB7__SHIFT EQU 5
+SCSI_Out_DBx__DB7__SLW EQU CYREG_PRT15_SLW
+
+; SD_RX_DMA
+SD_RX_DMA__DRQ_CTL EQU CYREG_IDMUX_DRQ_CTL0
+SD_RX_DMA__DRQ_NUMBER EQU 2
+SD_RX_DMA__NUMBEROF_TDS EQU 0
+SD_RX_DMA__PRIORITY EQU 0
+SD_RX_DMA__TERMIN_EN EQU 0
+SD_RX_DMA__TERMIN_SEL EQU 0
+SD_RX_DMA__TERMOUT0_EN EQU 1
+SD_RX_DMA__TERMOUT0_SEL EQU 2
+SD_RX_DMA__TERMOUT1_EN EQU 0
+SD_RX_DMA__TERMOUT1_SEL EQU 0
+SD_RX_DMA_COMPLETE__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0
+SD_RX_DMA_COMPLETE__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0
+SD_RX_DMA_COMPLETE__INTC_MASK EQU 0x20
+SD_RX_DMA_COMPLETE__INTC_NUMBER EQU 5
+SD_RX_DMA_COMPLETE__INTC_PRIOR_NUM EQU 7
+SD_RX_DMA_COMPLETE__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_5
+SD_RX_DMA_COMPLETE__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0
+SD_RX_DMA_COMPLETE__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0
+
+; SD_TX_DMA
+SD_TX_DMA__DRQ_CTL EQU CYREG_IDMUX_DRQ_CTL0
+SD_TX_DMA__DRQ_NUMBER EQU 3
+SD_TX_DMA__NUMBEROF_TDS EQU 0
+SD_TX_DMA__PRIORITY EQU 1
+SD_TX_DMA__TERMIN_EN EQU 0
+SD_TX_DMA__TERMIN_SEL EQU 0
+SD_TX_DMA__TERMOUT0_EN EQU 1
+SD_TX_DMA__TERMOUT0_SEL EQU 3
+SD_TX_DMA__TERMOUT1_EN EQU 0
+SD_TX_DMA__TERMOUT1_SEL EQU 0
+SD_TX_DMA_COMPLETE__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0
+SD_TX_DMA_COMPLETE__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0
+SD_TX_DMA_COMPLETE__INTC_MASK EQU 0x40
+SD_TX_DMA_COMPLETE__INTC_NUMBER EQU 6
+SD_TX_DMA_COMPLETE__INTC_PRIOR_NUM EQU 7
+SD_TX_DMA_COMPLETE__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_6
+SD_TX_DMA_COMPLETE__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0
+SD_TX_DMA_COMPLETE__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0
+
+; SCSI_Noise
+SCSI_Noise__0__AG EQU CYREG_PRT4_AG
+SCSI_Noise__0__AMUX EQU CYREG_PRT4_AMUX
+SCSI_Noise__0__BIE EQU CYREG_PRT4_BIE
+SCSI_Noise__0__BIT_MASK EQU CYREG_PRT4_BIT_MASK
+SCSI_Noise__0__BYP EQU CYREG_PRT4_BYP
+SCSI_Noise__0__CTL EQU CYREG_PRT4_CTL
+SCSI_Noise__0__DM0 EQU CYREG_PRT4_DM0
+SCSI_Noise__0__DM1 EQU CYREG_PRT4_DM1
+SCSI_Noise__0__DM2 EQU CYREG_PRT4_DM2
+SCSI_Noise__0__DR EQU CYREG_PRT4_DR
+SCSI_Noise__0__INP_DIS EQU CYREG_PRT4_INP_DIS
+SCSI_Noise__0__INTTYPE EQU CYREG_PICU4_INTTYPE7
+SCSI_Noise__0__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
+SCSI_Noise__0__LCD_EN EQU CYREG_PRT4_LCD_EN
+SCSI_Noise__0__MASK EQU 0x80
+SCSI_Noise__0__PC EQU CYREG_PRT4_PC7
+SCSI_Noise__0__PORT EQU 4
+SCSI_Noise__0__PRT EQU CYREG_PRT4_PRT
+SCSI_Noise__0__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
+SCSI_Noise__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
+SCSI_Noise__0__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
+SCSI_Noise__0__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
+SCSI_Noise__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
+SCSI_Noise__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
+SCSI_Noise__0__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
+SCSI_Noise__0__PS EQU CYREG_PRT4_PS
+SCSI_Noise__0__SHIFT EQU 7
+SCSI_Noise__0__SLW EQU CYREG_PRT4_SLW
+SCSI_Noise__1__AG EQU CYREG_PRT4_AG
+SCSI_Noise__1__AMUX EQU CYREG_PRT4_AMUX
+SCSI_Noise__1__BIE EQU CYREG_PRT4_BIE
+SCSI_Noise__1__BIT_MASK EQU CYREG_PRT4_BIT_MASK
+SCSI_Noise__1__BYP EQU CYREG_PRT4_BYP
+SCSI_Noise__1__CTL EQU CYREG_PRT4_CTL
+SCSI_Noise__1__DM0 EQU CYREG_PRT4_DM0
+SCSI_Noise__1__DM1 EQU CYREG_PRT4_DM1
+SCSI_Noise__1__DM2 EQU CYREG_PRT4_DM2
+SCSI_Noise__1__DR EQU CYREG_PRT4_DR
+SCSI_Noise__1__INP_DIS EQU CYREG_PRT4_INP_DIS
+SCSI_Noise__1__INTTYPE EQU CYREG_PICU4_INTTYPE5
+SCSI_Noise__1__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
+SCSI_Noise__1__LCD_EN EQU CYREG_PRT4_LCD_EN
+SCSI_Noise__1__MASK EQU 0x20
+SCSI_Noise__1__PC EQU CYREG_PRT4_PC5
+SCSI_Noise__1__PORT EQU 4
+SCSI_Noise__1__PRT EQU CYREG_PRT4_PRT
+SCSI_Noise__1__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
+SCSI_Noise__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
+SCSI_Noise__1__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
+SCSI_Noise__1__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
+SCSI_Noise__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
+SCSI_Noise__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
+SCSI_Noise__1__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
+SCSI_Noise__1__PS EQU CYREG_PRT4_PS
+SCSI_Noise__1__SHIFT EQU 5
+SCSI_Noise__1__SLW EQU CYREG_PRT4_SLW
+SCSI_Noise__2__AG EQU CYREG_PRT0_AG
+SCSI_Noise__2__AMUX EQU CYREG_PRT0_AMUX
+SCSI_Noise__2__BIE EQU CYREG_PRT0_BIE
+SCSI_Noise__2__BIT_MASK EQU CYREG_PRT0_BIT_MASK
+SCSI_Noise__2__BYP EQU CYREG_PRT0_BYP
+SCSI_Noise__2__CTL EQU CYREG_PRT0_CTL
+SCSI_Noise__2__DM0 EQU CYREG_PRT0_DM0
+SCSI_Noise__2__DM1 EQU CYREG_PRT0_DM1
+SCSI_Noise__2__DM2 EQU CYREG_PRT0_DM2
+SCSI_Noise__2__DR EQU CYREG_PRT0_DR
+SCSI_Noise__2__INP_DIS EQU CYREG_PRT0_INP_DIS
+SCSI_Noise__2__INTTYPE EQU CYREG_PICU0_INTTYPE2
+SCSI_Noise__2__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
+SCSI_Noise__2__LCD_EN EQU CYREG_PRT0_LCD_EN
+SCSI_Noise__2__MASK EQU 0x04
+SCSI_Noise__2__PC EQU CYREG_PRT0_PC2
+SCSI_Noise__2__PORT EQU 0
+SCSI_Noise__2__PRT EQU CYREG_PRT0_PRT
+SCSI_Noise__2__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
+SCSI_Noise__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
+SCSI_Noise__2__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
+SCSI_Noise__2__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
+SCSI_Noise__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
+SCSI_Noise__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
+SCSI_Noise__2__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
+SCSI_Noise__2__PS EQU CYREG_PRT0_PS
+SCSI_Noise__2__SHIFT EQU 2
+SCSI_Noise__2__SLW EQU CYREG_PRT0_SLW
+SCSI_Noise__3__AG EQU CYREG_PRT0_AG
+SCSI_Noise__3__AMUX EQU CYREG_PRT0_AMUX
+SCSI_Noise__3__BIE EQU CYREG_PRT0_BIE
+SCSI_Noise__3__BIT_MASK EQU CYREG_PRT0_BIT_MASK
+SCSI_Noise__3__BYP EQU CYREG_PRT0_BYP
+SCSI_Noise__3__CTL EQU CYREG_PRT0_CTL
+SCSI_Noise__3__DM0 EQU CYREG_PRT0_DM0
+SCSI_Noise__3__DM1 EQU CYREG_PRT0_DM1
+SCSI_Noise__3__DM2 EQU CYREG_PRT0_DM2
+SCSI_Noise__3__DR EQU CYREG_PRT0_DR
+SCSI_Noise__3__INP_DIS EQU CYREG_PRT0_INP_DIS
+SCSI_Noise__3__INTTYPE EQU CYREG_PICU0_INTTYPE6
+SCSI_Noise__3__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
+SCSI_Noise__3__LCD_EN EQU CYREG_PRT0_LCD_EN
+SCSI_Noise__3__MASK EQU 0x40
+SCSI_Noise__3__PC EQU CYREG_PRT0_PC6
+SCSI_Noise__3__PORT EQU 0
+SCSI_Noise__3__PRT EQU CYREG_PRT0_PRT
+SCSI_Noise__3__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
+SCSI_Noise__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
+SCSI_Noise__3__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
+SCSI_Noise__3__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
+SCSI_Noise__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
+SCSI_Noise__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
+SCSI_Noise__3__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
+SCSI_Noise__3__PS EQU CYREG_PRT0_PS
+SCSI_Noise__3__SHIFT EQU 6
+SCSI_Noise__3__SLW EQU CYREG_PRT0_SLW
+SCSI_Noise__4__AG EQU CYREG_PRT4_AG
+SCSI_Noise__4__AMUX EQU CYREG_PRT4_AMUX
+SCSI_Noise__4__BIE EQU CYREG_PRT4_BIE
+SCSI_Noise__4__BIT_MASK EQU CYREG_PRT4_BIT_MASK
+SCSI_Noise__4__BYP EQU CYREG_PRT4_BYP
+SCSI_Noise__4__CTL EQU CYREG_PRT4_CTL
+SCSI_Noise__4__DM0 EQU CYREG_PRT4_DM0
+SCSI_Noise__4__DM1 EQU CYREG_PRT4_DM1
+SCSI_Noise__4__DM2 EQU CYREG_PRT4_DM2
+SCSI_Noise__4__DR EQU CYREG_PRT4_DR
+SCSI_Noise__4__INP_DIS EQU CYREG_PRT4_INP_DIS
+SCSI_Noise__4__INTTYPE EQU CYREG_PICU4_INTTYPE3
+SCSI_Noise__4__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
+SCSI_Noise__4__LCD_EN EQU CYREG_PRT4_LCD_EN
+SCSI_Noise__4__MASK EQU 0x08
+SCSI_Noise__4__PC EQU CYREG_PRT4_PC3
+SCSI_Noise__4__PORT EQU 4
+SCSI_Noise__4__PRT EQU CYREG_PRT4_PRT
+SCSI_Noise__4__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
+SCSI_Noise__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
+SCSI_Noise__4__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
+SCSI_Noise__4__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
+SCSI_Noise__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
+SCSI_Noise__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
+SCSI_Noise__4__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
+SCSI_Noise__4__PS EQU CYREG_PRT4_PS
+SCSI_Noise__4__SHIFT EQU 3
+SCSI_Noise__4__SLW EQU CYREG_PRT4_SLW
+SCSI_Noise__ACK__AG EQU CYREG_PRT4_AG
+SCSI_Noise__ACK__AMUX EQU CYREG_PRT4_AMUX
+SCSI_Noise__ACK__BIE EQU CYREG_PRT4_BIE
+SCSI_Noise__ACK__BIT_MASK EQU CYREG_PRT4_BIT_MASK
+SCSI_Noise__ACK__BYP EQU CYREG_PRT4_BYP
+SCSI_Noise__ACK__CTL EQU CYREG_PRT4_CTL
+SCSI_Noise__ACK__DM0 EQU CYREG_PRT4_DM0
+SCSI_Noise__ACK__DM1 EQU CYREG_PRT4_DM1
+SCSI_Noise__ACK__DM2 EQU CYREG_PRT4_DM2
+SCSI_Noise__ACK__DR EQU CYREG_PRT4_DR
+SCSI_Noise__ACK__INP_DIS EQU CYREG_PRT4_INP_DIS
+SCSI_Noise__ACK__INTTYPE EQU CYREG_PICU4_INTTYPE3
+SCSI_Noise__ACK__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
+SCSI_Noise__ACK__LCD_EN EQU CYREG_PRT4_LCD_EN
+SCSI_Noise__ACK__MASK EQU 0x08
+SCSI_Noise__ACK__PC EQU CYREG_PRT4_PC3
+SCSI_Noise__ACK__PORT EQU 4
+SCSI_Noise__ACK__PRT EQU CYREG_PRT4_PRT
+SCSI_Noise__ACK__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
+SCSI_Noise__ACK__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
+SCSI_Noise__ACK__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
+SCSI_Noise__ACK__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
+SCSI_Noise__ACK__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
+SCSI_Noise__ACK__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
+SCSI_Noise__ACK__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
+SCSI_Noise__ACK__PS EQU CYREG_PRT4_PS
+SCSI_Noise__ACK__SHIFT EQU 3
+SCSI_Noise__ACK__SLW EQU CYREG_PRT4_SLW
+SCSI_Noise__ATN__AG EQU CYREG_PRT4_AG
+SCSI_Noise__ATN__AMUX EQU CYREG_PRT4_AMUX
+SCSI_Noise__ATN__BIE EQU CYREG_PRT4_BIE
+SCSI_Noise__ATN__BIT_MASK EQU CYREG_PRT4_BIT_MASK
+SCSI_Noise__ATN__BYP EQU CYREG_PRT4_BYP
+SCSI_Noise__ATN__CTL EQU CYREG_PRT4_CTL
+SCSI_Noise__ATN__DM0 EQU CYREG_PRT4_DM0
+SCSI_Noise__ATN__DM1 EQU CYREG_PRT4_DM1
+SCSI_Noise__ATN__DM2 EQU CYREG_PRT4_DM2
+SCSI_Noise__ATN__DR EQU CYREG_PRT4_DR
+SCSI_Noise__ATN__INP_DIS EQU CYREG_PRT4_INP_DIS
+SCSI_Noise__ATN__INTTYPE EQU CYREG_PICU4_INTTYPE7
+SCSI_Noise__ATN__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
+SCSI_Noise__ATN__LCD_EN EQU CYREG_PRT4_LCD_EN
+SCSI_Noise__ATN__MASK EQU 0x80
+SCSI_Noise__ATN__PC EQU CYREG_PRT4_PC7
+SCSI_Noise__ATN__PORT EQU 4
+SCSI_Noise__ATN__PRT EQU CYREG_PRT4_PRT
+SCSI_Noise__ATN__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
+SCSI_Noise__ATN__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
+SCSI_Noise__ATN__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
+SCSI_Noise__ATN__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
+SCSI_Noise__ATN__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
+SCSI_Noise__ATN__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
+SCSI_Noise__ATN__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
+SCSI_Noise__ATN__PS EQU CYREG_PRT4_PS
+SCSI_Noise__ATN__SHIFT EQU 7
+SCSI_Noise__ATN__SLW EQU CYREG_PRT4_SLW
+SCSI_Noise__BSY__AG EQU CYREG_PRT4_AG
+SCSI_Noise__BSY__AMUX EQU CYREG_PRT4_AMUX
+SCSI_Noise__BSY__BIE EQU CYREG_PRT4_BIE
+SCSI_Noise__BSY__BIT_MASK EQU CYREG_PRT4_BIT_MASK
+SCSI_Noise__BSY__BYP EQU CYREG_PRT4_BYP
+SCSI_Noise__BSY__CTL EQU CYREG_PRT4_CTL
+SCSI_Noise__BSY__DM0 EQU CYREG_PRT4_DM0
+SCSI_Noise__BSY__DM1 EQU CYREG_PRT4_DM1
+SCSI_Noise__BSY__DM2 EQU CYREG_PRT4_DM2
+SCSI_Noise__BSY__DR EQU CYREG_PRT4_DR
+SCSI_Noise__BSY__INP_DIS EQU CYREG_PRT4_INP_DIS
+SCSI_Noise__BSY__INTTYPE EQU CYREG_PICU4_INTTYPE5
+SCSI_Noise__BSY__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG
+SCSI_Noise__BSY__LCD_EN EQU CYREG_PRT4_LCD_EN
+SCSI_Noise__BSY__MASK EQU 0x20
+SCSI_Noise__BSY__PC EQU CYREG_PRT4_PC5
+SCSI_Noise__BSY__PORT EQU 4
+SCSI_Noise__BSY__PRT EQU CYREG_PRT4_PRT
+SCSI_Noise__BSY__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL
+SCSI_Noise__BSY__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN
+SCSI_Noise__BSY__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0
+SCSI_Noise__BSY__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1
+SCSI_Noise__BSY__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0
+SCSI_Noise__BSY__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1
+SCSI_Noise__BSY__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT
+SCSI_Noise__BSY__PS EQU CYREG_PRT4_PS
+SCSI_Noise__BSY__SHIFT EQU 5
+SCSI_Noise__BSY__SLW EQU CYREG_PRT4_SLW
+SCSI_Noise__RST__AG EQU CYREG_PRT0_AG
+SCSI_Noise__RST__AMUX EQU CYREG_PRT0_AMUX
+SCSI_Noise__RST__BIE EQU CYREG_PRT0_BIE
+SCSI_Noise__RST__BIT_MASK EQU CYREG_PRT0_BIT_MASK
+SCSI_Noise__RST__BYP EQU CYREG_PRT0_BYP
+SCSI_Noise__RST__CTL EQU CYREG_PRT0_CTL
+SCSI_Noise__RST__DM0 EQU CYREG_PRT0_DM0
+SCSI_Noise__RST__DM1 EQU CYREG_PRT0_DM1
+SCSI_Noise__RST__DM2 EQU CYREG_PRT0_DM2
+SCSI_Noise__RST__DR EQU CYREG_PRT0_DR
+SCSI_Noise__RST__INP_DIS EQU CYREG_PRT0_INP_DIS
+SCSI_Noise__RST__INTTYPE EQU CYREG_PICU0_INTTYPE6
+SCSI_Noise__RST__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
+SCSI_Noise__RST__LCD_EN EQU CYREG_PRT0_LCD_EN
+SCSI_Noise__RST__MASK EQU 0x40
+SCSI_Noise__RST__PC EQU CYREG_PRT0_PC6
+SCSI_Noise__RST__PORT EQU 0
+SCSI_Noise__RST__PRT EQU CYREG_PRT0_PRT
+SCSI_Noise__RST__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
+SCSI_Noise__RST__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
+SCSI_Noise__RST__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
+SCSI_Noise__RST__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
+SCSI_Noise__RST__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
+SCSI_Noise__RST__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
+SCSI_Noise__RST__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
+SCSI_Noise__RST__PS EQU CYREG_PRT0_PS
+SCSI_Noise__RST__SHIFT EQU 6
+SCSI_Noise__RST__SLW EQU CYREG_PRT0_SLW
+SCSI_Noise__SEL__AG EQU CYREG_PRT0_AG
+SCSI_Noise__SEL__AMUX EQU CYREG_PRT0_AMUX
+SCSI_Noise__SEL__BIE EQU CYREG_PRT0_BIE
+SCSI_Noise__SEL__BIT_MASK EQU CYREG_PRT0_BIT_MASK
+SCSI_Noise__SEL__BYP EQU CYREG_PRT0_BYP
+SCSI_Noise__SEL__CTL EQU CYREG_PRT0_CTL
+SCSI_Noise__SEL__DM0 EQU CYREG_PRT0_DM0
+SCSI_Noise__SEL__DM1 EQU CYREG_PRT0_DM1
+SCSI_Noise__SEL__DM2 EQU CYREG_PRT0_DM2
+SCSI_Noise__SEL__DR EQU CYREG_PRT0_DR
+SCSI_Noise__SEL__INP_DIS EQU CYREG_PRT0_INP_DIS
+SCSI_Noise__SEL__INTTYPE EQU CYREG_PICU0_INTTYPE2
+SCSI_Noise__SEL__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG
+SCSI_Noise__SEL__LCD_EN EQU CYREG_PRT0_LCD_EN
+SCSI_Noise__SEL__MASK EQU 0x04
+SCSI_Noise__SEL__PC EQU CYREG_PRT0_PC2
+SCSI_Noise__SEL__PORT EQU 0
+SCSI_Noise__SEL__PRT EQU CYREG_PRT0_PRT
+SCSI_Noise__SEL__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL
+SCSI_Noise__SEL__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN
+SCSI_Noise__SEL__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0
+SCSI_Noise__SEL__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1
+SCSI_Noise__SEL__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0
+SCSI_Noise__SEL__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1
+SCSI_Noise__SEL__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT
+SCSI_Noise__SEL__PS EQU CYREG_PRT0_PS
+SCSI_Noise__SEL__SHIFT EQU 2
+SCSI_Noise__SEL__SLW EQU CYREG_PRT0_SLW
+
; scsiTarget
scsiTarget_datapath__16BIT_A0_REG EQU CYREG_B0_UDB00_01_A0
scsiTarget_datapath__16BIT_A1_REG EQU CYREG_B0_UDB00_01_A1
scsiTarget_StatusReg__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB15_ACTL
scsiTarget_StatusReg__STATUS_REG EQU CYREG_B0_UDB15_ST
+; Debug_Timer
+Debug_Timer_Interrupt__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0
+Debug_Timer_Interrupt__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0
+Debug_Timer_Interrupt__INTC_MASK EQU 0x01
+Debug_Timer_Interrupt__INTC_NUMBER EQU 0
+Debug_Timer_Interrupt__INTC_PRIOR_NUM EQU 7
+Debug_Timer_Interrupt__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_0
+Debug_Timer_Interrupt__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0
+Debug_Timer_Interrupt__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0
+Debug_Timer_TimerHW__CAP0 EQU CYREG_TMR0_CAP0
+Debug_Timer_TimerHW__CAP1 EQU CYREG_TMR0_CAP1
+Debug_Timer_TimerHW__CFG0 EQU CYREG_TMR0_CFG0
+Debug_Timer_TimerHW__CFG1 EQU CYREG_TMR0_CFG1
+Debug_Timer_TimerHW__CFG2 EQU CYREG_TMR0_CFG2
+Debug_Timer_TimerHW__CNT_CMP0 EQU CYREG_TMR0_CNT_CMP0
+Debug_Timer_TimerHW__CNT_CMP1 EQU CYREG_TMR0_CNT_CMP1
+Debug_Timer_TimerHW__PER0 EQU CYREG_TMR0_PER0
+Debug_Timer_TimerHW__PER1 EQU CYREG_TMR0_PER1
+Debug_Timer_TimerHW__PM_ACT_CFG EQU CYREG_PM_ACT_CFG3
+Debug_Timer_TimerHW__PM_ACT_MSK EQU 0x01
+Debug_Timer_TimerHW__PM_STBY_CFG EQU CYREG_PM_STBY_CFG3
+Debug_Timer_TimerHW__PM_STBY_MSK EQU 0x01
+Debug_Timer_TimerHW__RT0 EQU CYREG_TMR0_RT0
+Debug_Timer_TimerHW__RT1 EQU CYREG_TMR0_RT1
+Debug_Timer_TimerHW__SR0 EQU CYREG_TMR0_SR0
+
+; SCSI_RX_DMA
+SCSI_RX_DMA__DRQ_CTL EQU CYREG_IDMUX_DRQ_CTL0
+SCSI_RX_DMA__DRQ_NUMBER EQU 0
+SCSI_RX_DMA__NUMBEROF_TDS EQU 0
+SCSI_RX_DMA__PRIORITY EQU 2
+SCSI_RX_DMA__TERMIN_EN EQU 0
+SCSI_RX_DMA__TERMIN_SEL EQU 0
+SCSI_RX_DMA__TERMOUT0_EN EQU 1
+SCSI_RX_DMA__TERMOUT0_SEL EQU 0
+SCSI_RX_DMA__TERMOUT1_EN EQU 0
+SCSI_RX_DMA__TERMOUT1_SEL EQU 0
+SCSI_RX_DMA_COMPLETE__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0
+SCSI_RX_DMA_COMPLETE__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0
+SCSI_RX_DMA_COMPLETE__INTC_MASK EQU 0x04
+SCSI_RX_DMA_COMPLETE__INTC_NUMBER EQU 2
+SCSI_RX_DMA_COMPLETE__INTC_PRIOR_NUM EQU 7
+SCSI_RX_DMA_COMPLETE__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_2
+SCSI_RX_DMA_COMPLETE__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0
+SCSI_RX_DMA_COMPLETE__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0
+
+; SCSI_TX_DMA
+SCSI_TX_DMA__DRQ_CTL EQU CYREG_IDMUX_DRQ_CTL0
+SCSI_TX_DMA__DRQ_NUMBER EQU 1
+SCSI_TX_DMA__NUMBEROF_TDS EQU 0
+SCSI_TX_DMA__PRIORITY EQU 2
+SCSI_TX_DMA__TERMIN_EN EQU 0
+SCSI_TX_DMA__TERMIN_SEL EQU 0
+SCSI_TX_DMA__TERMOUT0_EN EQU 1
+SCSI_TX_DMA__TERMOUT0_SEL EQU 1
+SCSI_TX_DMA__TERMOUT1_EN EQU 0
+SCSI_TX_DMA__TERMOUT1_SEL EQU 0
+SCSI_TX_DMA_COMPLETE__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0
+SCSI_TX_DMA_COMPLETE__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0
+SCSI_TX_DMA_COMPLETE__INTC_MASK EQU 0x10
+SCSI_TX_DMA_COMPLETE__INTC_NUMBER EQU 4
+SCSI_TX_DMA_COMPLETE__INTC_PRIOR_NUM EQU 7
+SCSI_TX_DMA_COMPLETE__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_4
+SCSI_TX_DMA_COMPLETE__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0
+SCSI_TX_DMA_COMPLETE__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0
+
+; SD_Data_Clk
+SD_Data_Clk__CFG0 EQU CYREG_CLKDIST_DCFG0_CFG0
+SD_Data_Clk__CFG1 EQU CYREG_CLKDIST_DCFG0_CFG1
+SD_Data_Clk__CFG2 EQU CYREG_CLKDIST_DCFG0_CFG2
+SD_Data_Clk__CFG2_SRC_SEL_MASK EQU 0x07
+SD_Data_Clk__INDEX EQU 0x00
+SD_Data_Clk__PM_ACT_CFG EQU CYREG_PM_ACT_CFG2
+SD_Data_Clk__PM_ACT_MSK EQU 0x01
+SD_Data_Clk__PM_STBY_CFG EQU CYREG_PM_STBY_CFG2
+SD_Data_Clk__PM_STBY_MSK EQU 0x01
+
; timer_clock
timer_clock__CFG0 EQU CYREG_CLKDIST_DCFG2_CFG0
timer_clock__CFG1 EQU CYREG_CLKDIST_DCFG2_CFG1
timer_clock__PM_STBY_CFG EQU CYREG_PM_STBY_CFG2
timer_clock__PM_STBY_MSK EQU 0x04
+; SCSI_RST_ISR
+SCSI_RST_ISR__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0
+SCSI_RST_ISR__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0
+SCSI_RST_ISR__INTC_MASK EQU 0x02
+SCSI_RST_ISR__INTC_NUMBER EQU 1
+SCSI_RST_ISR__INTC_PRIOR_NUM EQU 7
+SCSI_RST_ISR__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_1
+SCSI_RST_ISR__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0
+SCSI_RST_ISR__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0
+
+; SCSI_SEL_ISR
+SCSI_SEL_ISR__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0
+SCSI_SEL_ISR__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0
+SCSI_SEL_ISR__INTC_MASK EQU 0x08
+SCSI_SEL_ISR__INTC_NUMBER EQU 3
+SCSI_SEL_ISR__INTC_PRIOR_NUM EQU 7
+SCSI_SEL_ISR__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_3
+SCSI_SEL_ISR__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0
+SCSI_SEL_ISR__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0
+
+; SCSI_Filtered
+SCSI_Filtered_sts_sts_reg__0__MASK EQU 0x01
+SCSI_Filtered_sts_sts_reg__0__POS EQU 0
+SCSI_Filtered_sts_sts_reg__1__MASK EQU 0x02
+SCSI_Filtered_sts_sts_reg__1__POS EQU 1
+SCSI_Filtered_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB11_12_ACTL
+SCSI_Filtered_sts_sts_reg__16BIT_STATUS_REG EQU CYREG_B0_UDB11_12_ST
+SCSI_Filtered_sts_sts_reg__2__MASK EQU 0x04
+SCSI_Filtered_sts_sts_reg__2__POS EQU 2
+SCSI_Filtered_sts_sts_reg__3__MASK EQU 0x08
+SCSI_Filtered_sts_sts_reg__3__POS EQU 3
+SCSI_Filtered_sts_sts_reg__4__MASK EQU 0x10
+SCSI_Filtered_sts_sts_reg__4__POS EQU 4
+SCSI_Filtered_sts_sts_reg__MASK EQU 0x1F
+SCSI_Filtered_sts_sts_reg__MASK_REG EQU CYREG_B0_UDB11_MSK
+SCSI_Filtered_sts_sts_reg__MASK_ST_AUX_CTL_REG EQU CYREG_B0_UDB11_MSK_ACTL
+SCSI_Filtered_sts_sts_reg__PER_ST_AUX_CTL_REG EQU CYREG_B0_UDB11_MSK_ACTL
+SCSI_Filtered_sts_sts_reg__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB11_ACTL
+SCSI_Filtered_sts_sts_reg__STATUS_CNT_REG EQU CYREG_B0_UDB11_ST_CTL
+SCSI_Filtered_sts_sts_reg__STATUS_CONTROL_REG EQU CYREG_B0_UDB11_ST_CTL
+SCSI_Filtered_sts_sts_reg__STATUS_REG EQU CYREG_B0_UDB11_ST
+
+; SCSI_CTL_PHASE
+SCSI_CTL_PHASE_Sync_ctrl_reg__0__MASK EQU 0x01
+SCSI_CTL_PHASE_Sync_ctrl_reg__0__POS EQU 0
+SCSI_CTL_PHASE_Sync_ctrl_reg__1__MASK EQU 0x02
+SCSI_CTL_PHASE_Sync_ctrl_reg__1__POS EQU 1
+SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB02_03_ACTL
+SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB02_03_CTL
+SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB02_03_CTL
+SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB02_03_CTL
+SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB02_03_CTL
+SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB02_03_MSK
+SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB02_03_MSK
+SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB02_03_MSK
+SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB02_03_MSK
+SCSI_CTL_PHASE_Sync_ctrl_reg__2__MASK EQU 0x04
+SCSI_CTL_PHASE_Sync_ctrl_reg__2__POS EQU 2
+SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB02_ACTL
+SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB02_CTL
+SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB02_ST_CTL
+SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB02_CTL
+SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB02_ST_CTL
+SCSI_CTL_PHASE_Sync_ctrl_reg__MASK EQU 0x07
+SCSI_CTL_PHASE_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB02_MSK_ACTL
+SCSI_CTL_PHASE_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB02_MSK_ACTL
+SCSI_CTL_PHASE_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB02_MSK
+
+; SCSI_Glitch_Ctl
+SCSI_Glitch_Ctl_Sync_ctrl_reg__0__MASK EQU 0x01
+SCSI_Glitch_Ctl_Sync_ctrl_reg__0__POS EQU 0
+SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB05_06_ACTL
+SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB05_06_CTL
+SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB05_06_CTL
+SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB05_06_CTL
+SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB05_06_CTL
+SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB05_06_MSK
+SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB05_06_MSK
+SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB05_06_MSK
+SCSI_Glitch_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB05_06_MSK
+SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB05_ACTL
+SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB05_CTL
+SCSI_Glitch_Ctl_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB05_ST_CTL
+SCSI_Glitch_Ctl_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB05_CTL
+SCSI_Glitch_Ctl_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB05_ST_CTL
+SCSI_Glitch_Ctl_Sync_ctrl_reg__MASK EQU 0x01
+SCSI_Glitch_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB05_MSK_ACTL
+SCSI_Glitch_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB05_MSK_ACTL
+SCSI_Glitch_Ctl_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB05_MSK
+
+; SCSI_Parity_Error
+SCSI_Parity_Error_sts_sts_reg__0__MASK EQU 0x01
+SCSI_Parity_Error_sts_sts_reg__0__POS EQU 0
+SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB02_03_ACTL
+SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_REG EQU CYREG_B0_UDB02_03_ST
+SCSI_Parity_Error_sts_sts_reg__MASK EQU 0x01
+SCSI_Parity_Error_sts_sts_reg__MASK_REG EQU CYREG_B0_UDB02_MSK
+SCSI_Parity_Error_sts_sts_reg__MASK_ST_AUX_CTL_REG EQU CYREG_B0_UDB02_MSK_ACTL
+SCSI_Parity_Error_sts_sts_reg__PER_ST_AUX_CTL_REG EQU CYREG_B0_UDB02_MSK_ACTL
+SCSI_Parity_Error_sts_sts_reg__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB02_ACTL
+SCSI_Parity_Error_sts_sts_reg__STATUS_CNT_REG EQU CYREG_B0_UDB02_ST_CTL
+SCSI_Parity_Error_sts_sts_reg__STATUS_CONTROL_REG EQU CYREG_B0_UDB02_ST_CTL
+SCSI_Parity_Error_sts_sts_reg__STATUS_REG EQU CYREG_B0_UDB02_ST
+
; Miscellaneous
BCLK__BUS_CLK__HZ EQU 50000000
BCLK__BUS_CLK__KHZ EQU 50000
BCLK__BUS_CLK__MHZ EQU 50
CYDEV_CHIP_DIE_LEOPARD EQU 1
-CYDEV_CHIP_DIE_PSOC4A EQU 16
+CYDEV_CHIP_DIE_PSOC4A EQU 18
CYDEV_CHIP_DIE_PSOC5LP EQU 2
CYDEV_CHIP_DIE_PSOC5TM EQU 3
CYDEV_CHIP_DIE_TMA4 EQU 4
CYDEV_CHIP_FAMILY_USED EQU CYDEV_CHIP_FAMILY_PSOC5
CYDEV_CHIP_JTAG_ID EQU 0x2E133069
CYDEV_CHIP_MEMBER_3A EQU 1
-CYDEV_CHIP_MEMBER_4A EQU 16
-CYDEV_CHIP_MEMBER_4D EQU 12
+CYDEV_CHIP_MEMBER_4A EQU 18
+CYDEV_CHIP_MEMBER_4D EQU 13
CYDEV_CHIP_MEMBER_4E EQU 6
-CYDEV_CHIP_MEMBER_4F EQU 17
+CYDEV_CHIP_MEMBER_4F EQU 19
CYDEV_CHIP_MEMBER_4G EQU 4
-CYDEV_CHIP_MEMBER_4H EQU 15
-CYDEV_CHIP_MEMBER_4I EQU 21
-CYDEV_CHIP_MEMBER_4J EQU 13
-CYDEV_CHIP_MEMBER_4K EQU 14
-CYDEV_CHIP_MEMBER_4L EQU 20
-CYDEV_CHIP_MEMBER_4M EQU 19
-CYDEV_CHIP_MEMBER_4N EQU 9
+CYDEV_CHIP_MEMBER_4H EQU 17
+CYDEV_CHIP_MEMBER_4I EQU 23
+CYDEV_CHIP_MEMBER_4J EQU 14
+CYDEV_CHIP_MEMBER_4K EQU 15
+CYDEV_CHIP_MEMBER_4L EQU 22
+CYDEV_CHIP_MEMBER_4M EQU 21
+CYDEV_CHIP_MEMBER_4N EQU 10
CYDEV_CHIP_MEMBER_4O EQU 7
-CYDEV_CHIP_MEMBER_4P EQU 18
-CYDEV_CHIP_MEMBER_4Q EQU 11
+CYDEV_CHIP_MEMBER_4P EQU 20
+CYDEV_CHIP_MEMBER_4Q EQU 12
CYDEV_CHIP_MEMBER_4R EQU 8
-CYDEV_CHIP_MEMBER_4S EQU 10
+CYDEV_CHIP_MEMBER_4S EQU 11
+CYDEV_CHIP_MEMBER_4T EQU 9
CYDEV_CHIP_MEMBER_4U EQU 5
+CYDEV_CHIP_MEMBER_4V EQU 16
CYDEV_CHIP_MEMBER_5A EQU 3
CYDEV_CHIP_MEMBER_5B EQU 2
-CYDEV_CHIP_MEMBER_6A EQU 22
-CYDEV_CHIP_MEMBER_FM3 EQU 26
-CYDEV_CHIP_MEMBER_FM4 EQU 27
-CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE1 EQU 23
-CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE2 EQU 24
-CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE3 EQU 25
+CYDEV_CHIP_MEMBER_6A EQU 24
+CYDEV_CHIP_MEMBER_FM3 EQU 28
+CYDEV_CHIP_MEMBER_FM4 EQU 29
+CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE1 EQU 25
+CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE2 EQU 26
+CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE3 EQU 27
CYDEV_CHIP_MEMBER_UNKNOWN EQU 0
CYDEV_CHIP_MEMBER_USED EQU CYDEV_CHIP_MEMBER_5B
CYDEV_CHIP_DIE_EXPECT EQU CYDEV_CHIP_MEMBER_USED
CYDEV_CHIP_REVISION_4A_ES0 EQU 17
CYDEV_CHIP_REVISION_4A_PRODUCTION EQU 17
CYDEV_CHIP_REVISION_4D_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_4E_CCG2_NO_USBPD EQU 0
CYDEV_CHIP_REVISION_4E_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4F_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4F_PRODUCTION_256DMA EQU 0
CYDEV_CHIP_REVISION_4Q_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4R_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4S_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_4T_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4U_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_4V_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_5A_ES0 EQU 0
CYDEV_CHIP_REVISION_5A_ES1 EQU 1
CYDEV_CHIP_REVISION_5A_PRODUCTION EQU 1
CYDEV_CHIP_REVISION_5B_ES0 EQU 0
CYDEV_CHIP_REVISION_5B_PRODUCTION EQU 0
-CYDEV_CHIP_REVISION_6A_NO_UDB EQU 0
-CYDEV_CHIP_REVISION_6A_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_6A_ES EQU 17
+CYDEV_CHIP_REVISION_6A_NO_UDB EQU 33
+CYDEV_CHIP_REVISION_6A_PRODUCTION EQU 33
CYDEV_CHIP_REVISION_FM3_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_FM4_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_PDL_FM0P_TYPE1_PRODUCTION EQU 0
/*******************************************************************************
* File Name: cymetadata.c
*
-* PSoC Creator 4.1
+* PSoC Creator 4.2
*
* Description:
* This file defines all extra memory spaces that need to be included.
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
-* Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.
+* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
/*******************************************************************************
* File Name: project.h
*
-* PSoC Creator 4.1
+* PSoC Creator 4.2
*
* Description:
* It contains references to all generated header files and should not be modified.
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
-* Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved.
+* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
#include "cyPm.h"
#include "CySpc.h"
#include "cytypes.h"
+#include "cy_em_eeprom.h"
/*[]*/
<?xml version="1.0" encoding="utf-8"?>
<blockRegMap version="1" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://cypress.com/xsd/cyblockregmap cyblockregmap.xsd" xmlns="http://cypress.com/xsd/cyblockregmap">
+ <block name="GlitchFilter_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_Filtered" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
<register name="SCSI_Filtered_STATUS_REG" address="0x4000646B" bitWidth="8" desc="" hidden="false" />
<register name="SCSI_Filtered_MASK_REG" address="0x4000648B" bitWidth="8" desc="" hidden="false" />
</field>
</register>
</block>
- <block name="SCSI_RX_DMA_COMPLETE" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
- <block name="GlitchFilter_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
+ <block name="cy_constant_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
+ <block name="not_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Clock_3" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="cydff_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
- <block name="cy_constant_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
+ <block name="SD_TX_DMA" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SD_RX_DMA" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_TX_DMA_COMPLETE" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
- <block name="SCSI_TX_DMA" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
- <block name="SD_TX_DMA" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
+ <block name="SD_RX_DMA_COMPLETE" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
+ <block name="SCSI_RX_DMA_COMPLETE" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_RX_DMA" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SD_TX_DMA_COMPLETE" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
- <block name="SD_RX_DMA_COMPLETE" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
+ <block name="not_5" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="not_8" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="not_4" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
- <block name="not_3" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
- <block name="not_5" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
+ <block name="not_7" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
+ <block name="Em_EEPROM_Dynamic" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="cy_boot" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="not_6" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
- <block name="not_7" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
+ <block name="SCSI_SEL_ISR" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="cydff_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Clock_4" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
- <block name="not_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
- <block name="SCSI_SEL_ISR" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
+ <block name="mux_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
+ <block name="not_3" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="TERM_EN" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_Glitch_Ctl" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
<register name="SCSI_Glitch_Ctl_CONTROL_REG" address="0x40006475" bitWidth="8" desc="" hidden="false" />
</block>
- <block name="mux_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
+ <block name="SCSI_TX_DMA" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SD_SCK" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SD_CS" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="CFG_EEPROM" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<Group key="Component">
<Group key="v1">
<Data key="cy_boot" value="cy_boot_v5_50" />
+ <Data key="Em_EEPROM_Dynamic" value="Em_EEPROM_Dynamic_v2_0" />
<Data key="LIN_Dynamic" value="LIN_Dynamic_v3_40" />
</Group>
</Group>
</Group>
</Group>
<Group key="Interrupt">
- <Data key="791071b3-a348-49c4-b578-64e66d701d0f/d91ea660-bc91-4817-b29b-2fe86c305500" value="6" />
+ <Group key="791071b3-a348-49c4-b578-64e66d701d0f/d91ea660-bc91-4817-b29b-2fe86c305500">
+ <Group key="CortexM3">
+ <Data key="Assigned" value="True" />
+ <Data key="Priority" value="6" />
+ <Data key="Vector" value="-1" />
+ </Group>
+ </Group>
</Group>
<Group key="Pin2">
<Group key="1bd12db2-da87-4f00-90d1-0a734e846c58">
</CyGuid_2f73275c-45bf-46ba-b3b1-00a2fe0c8dd8>
<filters />
</CyGuid_ebc4f06d-207f-49c2-a540-72acf4adabc0>
+<CyGuid_ebc4f06d-207f-49c2-a540-72acf4adabc0 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtFolderSerialize" version="3">
+<CyGuid_2f73275c-45bf-46ba-b3b1-00a2fe0c8dd8 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtBaseContainerSerialize" version="1">
+<CyGuid_31768f72-0253-412b-af77-e7dba74d1330 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtItemSerialize" version="2" name="Em_EEPROM_Dynamic" persistent="">
+<Hidden v="False" />
+</CyGuid_31768f72-0253-412b-af77-e7dba74d1330>
+<CyGuid_0820c2e7-528d-4137-9a08-97257b946089 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtItemListSerialize" version="2">
+<dependencies>
+<CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtFileSerialize" version="3" xml_contents_version="1">
+<CyGuid_31768f72-0253-412b-af77-e7dba74d1330 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtItemSerialize" version="2" name="cy_em_eeprom.c" persistent="Generated_Source\PSoC5\cy_em_eeprom.c">
+<Hidden v="False" />
+</CyGuid_31768f72-0253-412b-af77-e7dba74d1330>
+<build_action v="SOURCE_C;CortexM3;;;" />
+<PropertyDeltas />
+</CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b>
+<CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtFileSerialize" version="3" xml_contents_version="1">
+<CyGuid_31768f72-0253-412b-af77-e7dba74d1330 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtItemSerialize" version="2" name="cy_em_eeprom.h" persistent="Generated_Source\PSoC5\cy_em_eeprom.h">
+<Hidden v="False" />
+</CyGuid_31768f72-0253-412b-af77-e7dba74d1330>
+<build_action v="HEADER;;;;" />
+<PropertyDeltas />
+</CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b>
+</dependencies>
+</CyGuid_0820c2e7-528d-4137-9a08-97257b946089>
+</CyGuid_2f73275c-45bf-46ba-b3b1-00a2fe0c8dd8>
+<filters />
+</CyGuid_ebc4f06d-207f-49c2-a540-72acf4adabc0>
</dependencies>
</CyGuid_0820c2e7-528d-4137-9a08-97257b946089>
</CyGuid_2f73275c-45bf-46ba-b3b1-00a2fe0c8dd8>
</platforms>
<project_current_platform v="c9323d49-d323-40b8-9b59-cc008d68a989" />
<last_selected_tab v="Cypress" />
-<WriteAppVersionLastSavedWith v="4.1.0.2686" />
-<WriteAppMarketingVersionLastSavedWith v=" 4.1" />
+<WriteAppVersionLastSavedWith v="4.2.0.641" />
+<WriteAppMarketingVersionLastSavedWith v=" 4.2" />
<project_id v="6e1f5cbb-a0ca-4f55-a1fa-7b20c5be3a3e" />
<GenerateDescriptionFiles v="False" />
</CyGuid_49cfd574-032a-4a64-b7be-d4eeeaf25e43>
<peripheral>
<name>SCSI_Filtered</name>
<description>No description available</description>
- <baseAddress>0x4000646B</baseAddress>
+ <baseAddress>0x0</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x0</size>
<register>
<name>SCSI_Filtered_STATUS_REG</name>
<description>No description available</description>
- <addressOffset>0x0</addressOffset>
+ <addressOffset>0x4000646B</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0</resetValue>
<register>
<name>SCSI_Filtered_MASK_REG</name>
<description>No description available</description>
- <addressOffset>0x20</addressOffset>
+ <addressOffset>0x4000648B</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0</resetValue>
<register>
<name>SCSI_Filtered_STATUS_AUX_CTL_REG</name>
<description>No description available</description>
- <addressOffset>0x30</addressOffset>
+ <addressOffset>0x4000649B</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0</resetValue>
<peripheral>
<name>SCSI_Parity_Error</name>
<description>No description available</description>
- <baseAddress>0x40006462</baseAddress>
+ <baseAddress>0x0</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x0</size>
<register>
<name>SCSI_Parity_Error_STATUS_REG</name>
<description>No description available</description>
- <addressOffset>0x0</addressOffset>
+ <addressOffset>0x40006462</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0</resetValue>
<register>
<name>SCSI_Parity_Error_MASK_REG</name>
<description>No description available</description>
- <addressOffset>0x20</addressOffset>
+ <addressOffset>0x40006482</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0</resetValue>
<register>
<name>SCSI_Parity_Error_STATUS_AUX_CTL_REG</name>
<description>No description available</description>
- <addressOffset>0x30</addressOffset>
+ <addressOffset>0x40006492</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0</resetValue>
<peripheral>
<name>SCSI_Glitch_Ctl</name>
<description>No description available</description>
- <baseAddress>0x40006475</baseAddress>
+ <baseAddress>0x0</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x0</size>
<register>
<name>SCSI_Glitch_Ctl_CONTROL_REG</name>
<description>No description available</description>
- <addressOffset>0x0</addressOffset>
+ <addressOffset>0x40006475</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0</resetValue>
<peripheral>
<name>SCSI_CTL_PHASE</name>
<description>No description available</description>
- <baseAddress>0x40006472</baseAddress>
+ <baseAddress>0x0</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x0</size>
<register>
<name>SCSI_CTL_PHASE_CONTROL_REG</name>
<description>No description available</description>
- <addressOffset>0x0</addressOffset>
+ <addressOffset>0x40006472</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0</resetValue>
<peripheral>
<name>SCSI_Out_Ctl</name>
<description>No description available</description>
- <baseAddress>0x4000647B</baseAddress>
+ <baseAddress>0x0</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x0</size>
<register>
<name>SCSI_Out_Ctl_CONTROL_REG</name>
<description>No description available</description>
- <addressOffset>0x0</addressOffset>
+ <addressOffset>0x4000647B</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0</resetValue>
<peripheral>
<name>SCSI_Out_Bits</name>
<description>No description available</description>
- <baseAddress>0x40006477</baseAddress>
+ <baseAddress>0x0</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x0</size>
<register>
<name>SCSI_Out_Bits_CONTROL_REG</name>
<description>No description available</description>
- <addressOffset>0x0</addressOffset>
+ <addressOffset>0x40006477</addressOffset>
<size>8</size>
<access>read-write</access>
<resetValue>0</resetValue>
projects / SCSI2SD.git / commitdiff