((uint32_t)cmd[4]) << 8 |\r
((uint32_t)cmd[5]);\r
\r
- uint32_t response[512];\r
+ uint8_t response[512];\r
devices[cmd[1]]->read(devices[cmd[1]], sectorNum, 1, &response[0]);\r
\r
hidPacket_send(&response[0], 512);\r
static void spiFlash_erase(S2S_Device* dev, uint32_t sectorNumber, uint32_t count)
{
- SpiFlash* spiFlash = (SpiFlash*)dev;
+ // SpiFlash* spiFlash = (SpiFlash*)dev;
nNOR_CS_Write(0); // Select
spiFlashByte(linearAddress);
// Initiate erase
- nNOR_CS_Write(1)
+ nNOR_CS_Write(1);
spiFlash_WaitForWIP();
}
- nNOR_CS_Write(0)
+ nNOR_CS_Write(0);
// Send the WREN - Write Disable command
spiFlashByte(0x04);
static void spiFlash_write(S2S_Device* dev, uint32_t sectorNumber, uint32_t count, uint8_t* buffer)
{
- SpiFlash* spiFlash = (SpiFlash*)dev;
+ // SpiFlash* spiFlash = (SpiFlash*)dev;
nNOR_CS_Write(0); // Select
nNOR_CS_Write(1);
// We're assuming here that the page size is 512 bytes or more.
- for (int i = 0; i < count; ++i)
+ for (unsigned int i = 0; i < count; ++i)
{
nNOR_CS_Write(0);
}
// Initiate write
- nNOR_CS_Write(1)
+ nNOR_CS_Write(1);
spiFlash_WaitForWIP();
}
- nNOR_CS_Write(0)
+ nNOR_CS_Write(0);
// Send the WREN - Write Disable command
spiFlashByte(0x04);
static void spiFlash_read(S2S_Device* dev, uint32_t sectorNumber, uint32_t count, uint8_t* buffer)
{
- SpiFlash* spiFlash = (SpiFlash*)dev;
+ // SpiFlash* spiFlash = (SpiFlash*)dev;
nNOR_CS_Write(0); // Select
spiFlashByte(0x13);
/*******************************************************************************
* File Name: cydevice.h
* OBSOLETE: Do not use this file. Use the _trm version instead.
-* PSoC Creator 4.2
+* PSoC Creator 4.4
*
* Description:
* This file provides all of the address values for the entire PSoC device.
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
-* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
+* Copyright (c) 2007-2020 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
/*******************************************************************************
* File Name: cydevice_trm.h
*
-* PSoC Creator 4.2
+* PSoC Creator 4.4
*
* Description:
* This file provides all of the address values for the entire PSoC device.
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
-* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
+* Copyright (c) 2007-2020 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
/*******************************************************************************
* File Name: cydevicegnu.inc
* OBSOLETE: Do not use this file. Use the _trm version instead.
-* PSoC Creator 4.2
+* PSoC Creator 4.4
*
* Description:
* This file provides all of the address values for the entire PSoC device.
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
-* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
+* Copyright (c) 2007-2020 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
/*******************************************************************************
* File Name: cydevicegnu_trm.inc
*
-* PSoC Creator 4.2
+* PSoC Creator 4.4
*
* Description:
* This file provides all of the address values for the entire PSoC device.
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
-* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
+* Copyright (c) 2007-2020 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
;
; File Name: cydeviceiar.inc
; OBSOLETE: Do not use this file. Use the _trm version instead.
-; PSoC Creator 4.2
+; PSoC Creator 4.4
;
; Description:
; This file provides all of the address values for the entire PSoC device.
;
;-------------------------------------------------------------------------------
-; Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
+; Copyright (c) 2007-2020 Cypress Semiconductor. All rights reserved.
; You may use this file only in accordance with the license, terms, conditions,
; disclaimers, and limitations in the end user license agreement accompanying
; the software package with which this file was provided.
;
; File Name: cydeviceiar_trm.inc
;
-; PSoC Creator 4.2
+; PSoC Creator 4.4
;
; Description:
; This file provides all of the address values for the entire PSoC device.
;
;-------------------------------------------------------------------------------
-; Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
+; Copyright (c) 2007-2020 Cypress Semiconductor. All rights reserved.
; You may use this file only in accordance with the license, terms, conditions,
; disclaimers, and limitations in the end user license agreement accompanying
; the software package with which this file was provided.
;
; File Name: cydevicerv.inc
; OBSOLETE: Do not use this file. Use the _trm version instead.
-; PSoC Creator 4.2
+; PSoC Creator 4.4
;
; Description:
; This file provides all of the address values for the entire PSoC device.
;
;-------------------------------------------------------------------------------
-; Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
+; Copyright (c) 2007-2020 Cypress Semiconductor. All rights reserved.
; You may use this file only in accordance with the license, terms, conditions,
; disclaimers, and limitations in the end user license agreement accompanying
; the software package with which this file was provided.
;
; File Name: cydevicerv_trm.inc
;
-; PSoC Creator 4.2
+; PSoC Creator 4.4
;
; Description:
; This file provides all of the address values for the entire PSoC device.
;
;-------------------------------------------------------------------------------
-; Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
+; Copyright (c) 2007-2020 Cypress Semiconductor. All rights reserved.
; You may use this file only in accordance with the license, terms, conditions,
; disclaimers, and limitations in the end user license agreement accompanying
; the software package with which this file was provided.
/*******************************************************************************
* File Name: cyfitter.h
*
-* PSoC Creator 4.2
+* PSoC Creator 4.4
*
* Description:
*
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
-* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
+* Copyright (c) 2007-2020 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
#define BCLK__BUS_CLK__KHZ 50000U
#define BCLK__BUS_CLK__MHZ 50U
#define CY_PROJECT_NAME "SCSI2SD"
-#define CY_VERSION "PSoC Creator 4.2"
+#define CY_VERSION "PSoC Creator 4.4"
#define CYDEV_CHIP_DIE_LEOPARD 1u
-#define CYDEV_CHIP_DIE_PSOC4A 18u
+#define CYDEV_CHIP_DIE_PSOC4A 26u
#define CYDEV_CHIP_DIE_PSOC5LP 2u
#define CYDEV_CHIP_DIE_PSOC5TM 3u
#define CYDEV_CHIP_DIE_TMA4 4u
#define CYDEV_CHIP_FAMILY_USED CYDEV_CHIP_FAMILY_PSOC5
#define CYDEV_CHIP_JTAG_ID 0x2E133069u
#define CYDEV_CHIP_MEMBER_3A 1u
-#define CYDEV_CHIP_MEMBER_4A 18u
-#define CYDEV_CHIP_MEMBER_4D 13u
+#define CYDEV_CHIP_MEMBER_4A 26u
+#define CYDEV_CHIP_MEMBER_4AA 25u
+#define CYDEV_CHIP_MEMBER_4AB 30u
+#define CYDEV_CHIP_MEMBER_4AC 14u
+#define CYDEV_CHIP_MEMBER_4AD 15u
+#define CYDEV_CHIP_MEMBER_4AE 16u
+#define CYDEV_CHIP_MEMBER_4D 20u
#define CYDEV_CHIP_MEMBER_4E 6u
-#define CYDEV_CHIP_MEMBER_4F 19u
+#define CYDEV_CHIP_MEMBER_4F 27u
#define CYDEV_CHIP_MEMBER_4G 4u
-#define CYDEV_CHIP_MEMBER_4H 17u
-#define CYDEV_CHIP_MEMBER_4I 23u
-#define CYDEV_CHIP_MEMBER_4J 14u
-#define CYDEV_CHIP_MEMBER_4K 15u
-#define CYDEV_CHIP_MEMBER_4L 22u
-#define CYDEV_CHIP_MEMBER_4M 21u
-#define CYDEV_CHIP_MEMBER_4N 10u
-#define CYDEV_CHIP_MEMBER_4O 7u
-#define CYDEV_CHIP_MEMBER_4P 20u
-#define CYDEV_CHIP_MEMBER_4Q 12u
-#define CYDEV_CHIP_MEMBER_4R 8u
-#define CYDEV_CHIP_MEMBER_4S 11u
-#define CYDEV_CHIP_MEMBER_4T 9u
+#define CYDEV_CHIP_MEMBER_4H 24u
+#define CYDEV_CHIP_MEMBER_4I 32u
+#define CYDEV_CHIP_MEMBER_4J 21u
+#define CYDEV_CHIP_MEMBER_4K 22u
+#define CYDEV_CHIP_MEMBER_4L 31u
+#define CYDEV_CHIP_MEMBER_4M 29u
+#define CYDEV_CHIP_MEMBER_4N 11u
+#define CYDEV_CHIP_MEMBER_4O 8u
+#define CYDEV_CHIP_MEMBER_4P 28u
+#define CYDEV_CHIP_MEMBER_4Q 17u
+#define CYDEV_CHIP_MEMBER_4R 9u
+#define CYDEV_CHIP_MEMBER_4S 12u
+#define CYDEV_CHIP_MEMBER_4T 10u
#define CYDEV_CHIP_MEMBER_4U 5u
-#define CYDEV_CHIP_MEMBER_4V 16u
+#define CYDEV_CHIP_MEMBER_4V 23u
+#define CYDEV_CHIP_MEMBER_4W 13u
+#define CYDEV_CHIP_MEMBER_4X 7u
+#define CYDEV_CHIP_MEMBER_4Y 18u
+#define CYDEV_CHIP_MEMBER_4Z 19u
#define CYDEV_CHIP_MEMBER_5A 3u
#define CYDEV_CHIP_MEMBER_5B 2u
-#define CYDEV_CHIP_MEMBER_6A 24u
-#define CYDEV_CHIP_MEMBER_FM3 28u
-#define CYDEV_CHIP_MEMBER_FM4 29u
-#define CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE1 25u
-#define CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE2 26u
-#define CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE3 27u
+#define CYDEV_CHIP_MEMBER_6A 33u
+#define CYDEV_CHIP_MEMBER_FM3 37u
+#define CYDEV_CHIP_MEMBER_FM4 38u
+#define CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE1 34u
+#define CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE2 35u
+#define CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE3 36u
#define CYDEV_CHIP_MEMBER_UNKNOWN 0u
#define CYDEV_CHIP_MEMBER_USED CYDEV_CHIP_MEMBER_5B
#define CYDEV_CHIP_DIE_EXPECT CYDEV_CHIP_MEMBER_USED
#define CYDEV_CHIP_REVISION_3A_PRODUCTION 3u
#define CYDEV_CHIP_REVISION_4A_ES0 17u
#define CYDEV_CHIP_REVISION_4A_PRODUCTION 17u
+#define CYDEV_CHIP_REVISION_4AA_PRODUCTION 0u
+#define CYDEV_CHIP_REVISION_4AB_PRODUCTION 0u
+#define CYDEV_CHIP_REVISION_4AC_PRODUCTION 0u
+#define CYDEV_CHIP_REVISION_4AD_PRODUCTION 0u
+#define CYDEV_CHIP_REVISION_4AE_PRODUCTION 0u
#define CYDEV_CHIP_REVISION_4D_PRODUCTION 0u
#define CYDEV_CHIP_REVISION_4E_CCG2_NO_USBPD 0u
#define CYDEV_CHIP_REVISION_4E_PRODUCTION 0u
#define CYDEV_CHIP_REVISION_4T_PRODUCTION 0u
#define CYDEV_CHIP_REVISION_4U_PRODUCTION 0u
#define CYDEV_CHIP_REVISION_4V_PRODUCTION 0u
+#define CYDEV_CHIP_REVISION_4W_PRODUCTION 0u
+#define CYDEV_CHIP_REVISION_4X_PRODUCTION 0u
+#define CYDEV_CHIP_REVISION_4Y_PRODUCTION 0u
+#define CYDEV_CHIP_REVISION_4Z_PRODUCTION 0u
#define CYDEV_CHIP_REVISION_5A_ES0 0u
#define CYDEV_CHIP_REVISION_5A_ES1 1u
#define CYDEV_CHIP_REVISION_5A_PRODUCTION 1u
/*******************************************************************************
* File Name: cyfitter_cfg.c
*
-* PSoC Creator 4.2
+* PSoC Creator 4.4
*
* Description:
* This file contains device initialization code.
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
-* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
+* Copyright (c) 2007-2020 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
/*******************************************************************************
* File Name: cyfitter_cfg.h
*
-* PSoC Creator 4.2
+* PSoC Creator 4.4
*
* Description:
* This file provides basic startup and mux configuration settings
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
-* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
+* Copyright (c) 2007-2020 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
/*******************************************************************************
* File Name: cyfittergnu.inc
*
-* PSoC Creator 4.2
+* PSoC Creator 4.4
*
* Description:
*
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
-* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
+* Copyright (c) 2007-2020 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
.set BCLK__BUS_CLK__KHZ, 50000
.set BCLK__BUS_CLK__MHZ, 50
.set CYDEV_CHIP_DIE_LEOPARD, 1
-.set CYDEV_CHIP_DIE_PSOC4A, 18
+.set CYDEV_CHIP_DIE_PSOC4A, 26
.set CYDEV_CHIP_DIE_PSOC5LP, 2
.set CYDEV_CHIP_DIE_PSOC5TM, 3
.set CYDEV_CHIP_DIE_TMA4, 4
.set CYDEV_CHIP_FAMILY_USED, CYDEV_CHIP_FAMILY_PSOC5
.set CYDEV_CHIP_JTAG_ID, 0x2E133069
.set CYDEV_CHIP_MEMBER_3A, 1
-.set CYDEV_CHIP_MEMBER_4A, 18
-.set CYDEV_CHIP_MEMBER_4D, 13
+.set CYDEV_CHIP_MEMBER_4A, 26
+.set CYDEV_CHIP_MEMBER_4AA, 25
+.set CYDEV_CHIP_MEMBER_4AB, 30
+.set CYDEV_CHIP_MEMBER_4AC, 14
+.set CYDEV_CHIP_MEMBER_4AD, 15
+.set CYDEV_CHIP_MEMBER_4AE, 16
+.set CYDEV_CHIP_MEMBER_4D, 20
.set CYDEV_CHIP_MEMBER_4E, 6
-.set CYDEV_CHIP_MEMBER_4F, 19
+.set CYDEV_CHIP_MEMBER_4F, 27
.set CYDEV_CHIP_MEMBER_4G, 4
-.set CYDEV_CHIP_MEMBER_4H, 17
-.set CYDEV_CHIP_MEMBER_4I, 23
-.set CYDEV_CHIP_MEMBER_4J, 14
-.set CYDEV_CHIP_MEMBER_4K, 15
-.set CYDEV_CHIP_MEMBER_4L, 22
-.set CYDEV_CHIP_MEMBER_4M, 21
-.set CYDEV_CHIP_MEMBER_4N, 10
-.set CYDEV_CHIP_MEMBER_4O, 7
-.set CYDEV_CHIP_MEMBER_4P, 20
-.set CYDEV_CHIP_MEMBER_4Q, 12
-.set CYDEV_CHIP_MEMBER_4R, 8
-.set CYDEV_CHIP_MEMBER_4S, 11
-.set CYDEV_CHIP_MEMBER_4T, 9
+.set CYDEV_CHIP_MEMBER_4H, 24
+.set CYDEV_CHIP_MEMBER_4I, 32
+.set CYDEV_CHIP_MEMBER_4J, 21
+.set CYDEV_CHIP_MEMBER_4K, 22
+.set CYDEV_CHIP_MEMBER_4L, 31
+.set CYDEV_CHIP_MEMBER_4M, 29
+.set CYDEV_CHIP_MEMBER_4N, 11
+.set CYDEV_CHIP_MEMBER_4O, 8
+.set CYDEV_CHIP_MEMBER_4P, 28
+.set CYDEV_CHIP_MEMBER_4Q, 17
+.set CYDEV_CHIP_MEMBER_4R, 9
+.set CYDEV_CHIP_MEMBER_4S, 12
+.set CYDEV_CHIP_MEMBER_4T, 10
.set CYDEV_CHIP_MEMBER_4U, 5
-.set CYDEV_CHIP_MEMBER_4V, 16
+.set CYDEV_CHIP_MEMBER_4V, 23
+.set CYDEV_CHIP_MEMBER_4W, 13
+.set CYDEV_CHIP_MEMBER_4X, 7
+.set CYDEV_CHIP_MEMBER_4Y, 18
+.set CYDEV_CHIP_MEMBER_4Z, 19
.set CYDEV_CHIP_MEMBER_5A, 3
.set CYDEV_CHIP_MEMBER_5B, 2
-.set CYDEV_CHIP_MEMBER_6A, 24
-.set CYDEV_CHIP_MEMBER_FM3, 28
-.set CYDEV_CHIP_MEMBER_FM4, 29
-.set CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE1, 25
-.set CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE2, 26
-.set CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE3, 27
+.set CYDEV_CHIP_MEMBER_6A, 33
+.set CYDEV_CHIP_MEMBER_FM3, 37
+.set CYDEV_CHIP_MEMBER_FM4, 38
+.set CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE1, 34
+.set CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE2, 35
+.set CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE3, 36
.set CYDEV_CHIP_MEMBER_UNKNOWN, 0
.set CYDEV_CHIP_MEMBER_USED, CYDEV_CHIP_MEMBER_5B
.set CYDEV_CHIP_DIE_EXPECT, CYDEV_CHIP_MEMBER_USED
.set CYDEV_CHIP_REVISION_3A_PRODUCTION, 3
.set CYDEV_CHIP_REVISION_4A_ES0, 17
.set CYDEV_CHIP_REVISION_4A_PRODUCTION, 17
+.set CYDEV_CHIP_REVISION_4AA_PRODUCTION, 0
+.set CYDEV_CHIP_REVISION_4AB_PRODUCTION, 0
+.set CYDEV_CHIP_REVISION_4AC_PRODUCTION, 0
+.set CYDEV_CHIP_REVISION_4AD_PRODUCTION, 0
+.set CYDEV_CHIP_REVISION_4AE_PRODUCTION, 0
.set CYDEV_CHIP_REVISION_4D_PRODUCTION, 0
.set CYDEV_CHIP_REVISION_4E_CCG2_NO_USBPD, 0
.set CYDEV_CHIP_REVISION_4E_PRODUCTION, 0
.set CYDEV_CHIP_REVISION_4T_PRODUCTION, 0
.set CYDEV_CHIP_REVISION_4U_PRODUCTION, 0
.set CYDEV_CHIP_REVISION_4V_PRODUCTION, 0
+.set CYDEV_CHIP_REVISION_4W_PRODUCTION, 0
+.set CYDEV_CHIP_REVISION_4X_PRODUCTION, 0
+.set CYDEV_CHIP_REVISION_4Y_PRODUCTION, 0
+.set CYDEV_CHIP_REVISION_4Z_PRODUCTION, 0
.set CYDEV_CHIP_REVISION_5A_ES0, 0
.set CYDEV_CHIP_REVISION_5A_ES1, 1
.set CYDEV_CHIP_REVISION_5A_PRODUCTION, 1
;
; File Name: cyfitteriar.inc
;
-; PSoC Creator 4.2
+; PSoC Creator 4.4
;
; Description:
;
;
;-------------------------------------------------------------------------------
-; Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
+; Copyright (c) 2007-2020 Cypress Semiconductor. All rights reserved.
; You may use this file only in accordance with the license, terms, conditions,
; disclaimers, and limitations in the end user license agreement accompanying
; the software package with which this file was provided.
BCLK__BUS_CLK__KHZ EQU 50000
BCLK__BUS_CLK__MHZ EQU 50
CYDEV_CHIP_DIE_LEOPARD EQU 1
-CYDEV_CHIP_DIE_PSOC4A EQU 18
+CYDEV_CHIP_DIE_PSOC4A EQU 26
CYDEV_CHIP_DIE_PSOC5LP EQU 2
CYDEV_CHIP_DIE_PSOC5TM EQU 3
CYDEV_CHIP_DIE_TMA4 EQU 4
CYDEV_CHIP_FAMILY_USED EQU CYDEV_CHIP_FAMILY_PSOC5
CYDEV_CHIP_JTAG_ID EQU 0x2E133069
CYDEV_CHIP_MEMBER_3A EQU 1
-CYDEV_CHIP_MEMBER_4A EQU 18
-CYDEV_CHIP_MEMBER_4D EQU 13
+CYDEV_CHIP_MEMBER_4A EQU 26
+CYDEV_CHIP_MEMBER_4AA EQU 25
+CYDEV_CHIP_MEMBER_4AB EQU 30
+CYDEV_CHIP_MEMBER_4AC EQU 14
+CYDEV_CHIP_MEMBER_4AD EQU 15
+CYDEV_CHIP_MEMBER_4AE EQU 16
+CYDEV_CHIP_MEMBER_4D EQU 20
CYDEV_CHIP_MEMBER_4E EQU 6
-CYDEV_CHIP_MEMBER_4F EQU 19
+CYDEV_CHIP_MEMBER_4F EQU 27
CYDEV_CHIP_MEMBER_4G EQU 4
-CYDEV_CHIP_MEMBER_4H EQU 17
-CYDEV_CHIP_MEMBER_4I EQU 23
-CYDEV_CHIP_MEMBER_4J EQU 14
-CYDEV_CHIP_MEMBER_4K EQU 15
-CYDEV_CHIP_MEMBER_4L EQU 22
-CYDEV_CHIP_MEMBER_4M EQU 21
-CYDEV_CHIP_MEMBER_4N EQU 10
-CYDEV_CHIP_MEMBER_4O EQU 7
-CYDEV_CHIP_MEMBER_4P EQU 20
-CYDEV_CHIP_MEMBER_4Q EQU 12
-CYDEV_CHIP_MEMBER_4R EQU 8
-CYDEV_CHIP_MEMBER_4S EQU 11
-CYDEV_CHIP_MEMBER_4T EQU 9
+CYDEV_CHIP_MEMBER_4H EQU 24
+CYDEV_CHIP_MEMBER_4I EQU 32
+CYDEV_CHIP_MEMBER_4J EQU 21
+CYDEV_CHIP_MEMBER_4K EQU 22
+CYDEV_CHIP_MEMBER_4L EQU 31
+CYDEV_CHIP_MEMBER_4M EQU 29
+CYDEV_CHIP_MEMBER_4N EQU 11
+CYDEV_CHIP_MEMBER_4O EQU 8
+CYDEV_CHIP_MEMBER_4P EQU 28
+CYDEV_CHIP_MEMBER_4Q EQU 17
+CYDEV_CHIP_MEMBER_4R EQU 9
+CYDEV_CHIP_MEMBER_4S EQU 12
+CYDEV_CHIP_MEMBER_4T EQU 10
CYDEV_CHIP_MEMBER_4U EQU 5
-CYDEV_CHIP_MEMBER_4V EQU 16
+CYDEV_CHIP_MEMBER_4V EQU 23
+CYDEV_CHIP_MEMBER_4W EQU 13
+CYDEV_CHIP_MEMBER_4X EQU 7
+CYDEV_CHIP_MEMBER_4Y EQU 18
+CYDEV_CHIP_MEMBER_4Z EQU 19
CYDEV_CHIP_MEMBER_5A EQU 3
CYDEV_CHIP_MEMBER_5B EQU 2
-CYDEV_CHIP_MEMBER_6A EQU 24
-CYDEV_CHIP_MEMBER_FM3 EQU 28
-CYDEV_CHIP_MEMBER_FM4 EQU 29
-CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE1 EQU 25
-CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE2 EQU 26
-CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE3 EQU 27
+CYDEV_CHIP_MEMBER_6A EQU 33
+CYDEV_CHIP_MEMBER_FM3 EQU 37
+CYDEV_CHIP_MEMBER_FM4 EQU 38
+CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE1 EQU 34
+CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE2 EQU 35
+CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE3 EQU 36
CYDEV_CHIP_MEMBER_UNKNOWN EQU 0
CYDEV_CHIP_MEMBER_USED EQU CYDEV_CHIP_MEMBER_5B
CYDEV_CHIP_DIE_EXPECT EQU CYDEV_CHIP_MEMBER_USED
CYDEV_CHIP_REVISION_3A_PRODUCTION EQU 3
CYDEV_CHIP_REVISION_4A_ES0 EQU 17
CYDEV_CHIP_REVISION_4A_PRODUCTION EQU 17
+CYDEV_CHIP_REVISION_4AA_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_4AB_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_4AC_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_4AD_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_4AE_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4D_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4E_CCG2_NO_USBPD EQU 0
CYDEV_CHIP_REVISION_4E_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4T_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4U_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4V_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_4W_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_4X_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_4Y_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_4Z_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_5A_ES0 EQU 0
CYDEV_CHIP_REVISION_5A_ES1 EQU 1
CYDEV_CHIP_REVISION_5A_PRODUCTION EQU 1
;
; File Name: cyfitterrv.inc
;
-; PSoC Creator 4.2
+; PSoC Creator 4.4
;
; Description:
;
;
;-------------------------------------------------------------------------------
-; Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
+; Copyright (c) 2007-2020 Cypress Semiconductor. All rights reserved.
; You may use this file only in accordance with the license, terms, conditions,
; disclaimers, and limitations in the end user license agreement accompanying
; the software package with which this file was provided.
BCLK__BUS_CLK__KHZ EQU 50000
BCLK__BUS_CLK__MHZ EQU 50
CYDEV_CHIP_DIE_LEOPARD EQU 1
-CYDEV_CHIP_DIE_PSOC4A EQU 18
+CYDEV_CHIP_DIE_PSOC4A EQU 26
CYDEV_CHIP_DIE_PSOC5LP EQU 2
CYDEV_CHIP_DIE_PSOC5TM EQU 3
CYDEV_CHIP_DIE_TMA4 EQU 4
CYDEV_CHIP_FAMILY_USED EQU CYDEV_CHIP_FAMILY_PSOC5
CYDEV_CHIP_JTAG_ID EQU 0x2E133069
CYDEV_CHIP_MEMBER_3A EQU 1
-CYDEV_CHIP_MEMBER_4A EQU 18
-CYDEV_CHIP_MEMBER_4D EQU 13
+CYDEV_CHIP_MEMBER_4A EQU 26
+CYDEV_CHIP_MEMBER_4AA EQU 25
+CYDEV_CHIP_MEMBER_4AB EQU 30
+CYDEV_CHIP_MEMBER_4AC EQU 14
+CYDEV_CHIP_MEMBER_4AD EQU 15
+CYDEV_CHIP_MEMBER_4AE EQU 16
+CYDEV_CHIP_MEMBER_4D EQU 20
CYDEV_CHIP_MEMBER_4E EQU 6
-CYDEV_CHIP_MEMBER_4F EQU 19
+CYDEV_CHIP_MEMBER_4F EQU 27
CYDEV_CHIP_MEMBER_4G EQU 4
-CYDEV_CHIP_MEMBER_4H EQU 17
-CYDEV_CHIP_MEMBER_4I EQU 23
-CYDEV_CHIP_MEMBER_4J EQU 14
-CYDEV_CHIP_MEMBER_4K EQU 15
-CYDEV_CHIP_MEMBER_4L EQU 22
-CYDEV_CHIP_MEMBER_4M EQU 21
-CYDEV_CHIP_MEMBER_4N EQU 10
-CYDEV_CHIP_MEMBER_4O EQU 7
-CYDEV_CHIP_MEMBER_4P EQU 20
-CYDEV_CHIP_MEMBER_4Q EQU 12
-CYDEV_CHIP_MEMBER_4R EQU 8
-CYDEV_CHIP_MEMBER_4S EQU 11
-CYDEV_CHIP_MEMBER_4T EQU 9
+CYDEV_CHIP_MEMBER_4H EQU 24
+CYDEV_CHIP_MEMBER_4I EQU 32
+CYDEV_CHIP_MEMBER_4J EQU 21
+CYDEV_CHIP_MEMBER_4K EQU 22
+CYDEV_CHIP_MEMBER_4L EQU 31
+CYDEV_CHIP_MEMBER_4M EQU 29
+CYDEV_CHIP_MEMBER_4N EQU 11
+CYDEV_CHIP_MEMBER_4O EQU 8
+CYDEV_CHIP_MEMBER_4P EQU 28
+CYDEV_CHIP_MEMBER_4Q EQU 17
+CYDEV_CHIP_MEMBER_4R EQU 9
+CYDEV_CHIP_MEMBER_4S EQU 12
+CYDEV_CHIP_MEMBER_4T EQU 10
CYDEV_CHIP_MEMBER_4U EQU 5
-CYDEV_CHIP_MEMBER_4V EQU 16
+CYDEV_CHIP_MEMBER_4V EQU 23
+CYDEV_CHIP_MEMBER_4W EQU 13
+CYDEV_CHIP_MEMBER_4X EQU 7
+CYDEV_CHIP_MEMBER_4Y EQU 18
+CYDEV_CHIP_MEMBER_4Z EQU 19
CYDEV_CHIP_MEMBER_5A EQU 3
CYDEV_CHIP_MEMBER_5B EQU 2
-CYDEV_CHIP_MEMBER_6A EQU 24
-CYDEV_CHIP_MEMBER_FM3 EQU 28
-CYDEV_CHIP_MEMBER_FM4 EQU 29
-CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE1 EQU 25
-CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE2 EQU 26
-CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE3 EQU 27
+CYDEV_CHIP_MEMBER_6A EQU 33
+CYDEV_CHIP_MEMBER_FM3 EQU 37
+CYDEV_CHIP_MEMBER_FM4 EQU 38
+CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE1 EQU 34
+CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE2 EQU 35
+CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE3 EQU 36
CYDEV_CHIP_MEMBER_UNKNOWN EQU 0
CYDEV_CHIP_MEMBER_USED EQU CYDEV_CHIP_MEMBER_5B
CYDEV_CHIP_DIE_EXPECT EQU CYDEV_CHIP_MEMBER_USED
CYDEV_CHIP_REVISION_3A_PRODUCTION EQU 3
CYDEV_CHIP_REVISION_4A_ES0 EQU 17
CYDEV_CHIP_REVISION_4A_PRODUCTION EQU 17
+CYDEV_CHIP_REVISION_4AA_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_4AB_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_4AC_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_4AD_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_4AE_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4D_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4E_CCG2_NO_USBPD EQU 0
CYDEV_CHIP_REVISION_4E_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4T_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4U_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4V_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_4W_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_4X_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_4Y_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_4Z_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_5A_ES0 EQU 0
CYDEV_CHIP_REVISION_5A_ES1 EQU 1
CYDEV_CHIP_REVISION_5A_PRODUCTION EQU 1
/*******************************************************************************
* File Name: cymetadata.c
*
-* PSoC Creator 4.2
+* PSoC Creator 4.4
*
* Description:
* This file defines all extra memory spaces that need to be included.
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
-* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
+* Copyright (c) 2007-2020 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
/*******************************************************************************
* File Name: project.h
*
-* PSoC Creator 4.2
+* PSoC Creator 4.4
*
* Description:
* It contains references to all generated header files and should not be modified.
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
-* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
+* Copyright (c) 2007-2020 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
</platforms>
<project_current_platform v="c9323d49-d323-40b8-9b59-cc008d68a989" />
<last_selected_tab v="Cypress" />
-<WriteAppVersionLastSavedWith v="4.2.0.641" />
-<WriteAppMarketingVersionLastSavedWith v=" 4.2" />
+<WriteAppVersionLastSavedWith v="4.4.0.80" />
+<WriteAppMarketingVersionLastSavedWith v=" 4.4" />
<project_id v="6e1f5cbb-a0ca-4f55-a1fa-7b20c5be3a3e" />
<GenerateDescriptionFiles v="False" />
</CyGuid_49cfd574-032a-4a64-b7be-d4eeeaf25e43>
/*******************************************************************************
* File Name: LED.c
-* Version 2.10
+* Version 2.20
*
* Description:
* This file contains API to enable firmware control of a Pins component.
* Note:
*
********************************************************************************
-* Copyright 2008-2014, Cypress Semiconductor Corporation. All rights reserved.
+* Copyright 2008-2015, Cypress Semiconductor Corporation. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
/*******************************************************************************
* Function Name: LED_Write
-********************************************************************************
+****************************************************************************//**
*
-* Summary:
-* Assign a new value to the digital port's data output register.
+* \brief Writes the value to the physical port (data output register), masking
+* and shifting the bits appropriately.
*
-* Parameters:
-* prtValue: The value to be assigned to the Digital Port.
+* The data output register controls the signal applied to the physical pin in
+* conjunction with the drive mode parameter. This function avoids changing
+* other bits in the port by using the appropriate method (read-modify-write or
+* bit banding).
*
-* Return:
-* None
-*
+* <b>Note</b> This function should not be used on a hardware digital output pin
+* as it is driven by the hardware signal attached to it.
+*
+* \param value
+* Value to write to the component instance.
+*
+* \return
+* None
+*
+* \sideeffect
+* If you use read-modify-write operations that are not atomic; the Interrupt
+* Service Routines (ISR) can cause corruption of this function. An ISR that
+* interrupts this function and performs writes to the Pins component data
+* register can cause corrupted port data. To avoid this issue, you should
+* either use the Per-Pin APIs (primary method) or disable interrupts around
+* this function.
+*
+* \funcusage
+* \snippet LED_SUT.c usage_LED_Write
*******************************************************************************/
-void LED_Write(uint8 value)
+void LED_Write(uint8 value)
{
uint8 staticBits = (LED_DR & (uint8)(~LED_MASK));
LED_DR = staticBits | ((uint8)(value << LED_SHIFT) & LED_MASK);
/*******************************************************************************
* Function Name: LED_SetDriveMode
-********************************************************************************
+****************************************************************************//**
*
-* Summary:
-* Change the drive mode on the pins of the port.
+* \brief Sets the drive mode for each of the Pins component's pins.
*
-* Parameters:
-* mode: Change the pins to one of the following drive modes.
-*
-* LED_DM_STRONG Strong Drive
-* LED_DM_OD_HI Open Drain, Drives High
-* LED_DM_OD_LO Open Drain, Drives Low
-* LED_DM_RES_UP Resistive Pull Up
-* LED_DM_RES_DWN Resistive Pull Down
-* LED_DM_RES_UPDWN Resistive Pull Up/Down
-* LED_DM_DIG_HIZ High Impedance Digital
-* LED_DM_ALG_HIZ High Impedance Analog
-*
-* Return:
+* <b>Note</b> This affects all pins in the Pins component instance. Use the
+* Per-Pin APIs if you wish to control individual pin's drive modes.
+*
+* \param mode
+* Mode for the selected signals. Valid options are documented in
+* \ref driveMode.
+*
+* \return
* None
*
+* \sideeffect
+* If you use read-modify-write operations that are not atomic, the ISR can
+* cause corruption of this function. An ISR that interrupts this function
+* and performs writes to the Pins component Drive Mode registers can cause
+* corrupted port data. To avoid this issue, you should either use the Per-Pin
+* APIs (primary method) or disable interrupts around this function.
+*
+* \funcusage
+* \snippet LED_SUT.c usage_LED_SetDriveMode
*******************************************************************************/
-void LED_SetDriveMode(uint8 mode)
+void LED_SetDriveMode(uint8 mode)
{
CyPins_SetPinDriveMode(LED_0, mode);
CyPins_SetPinDriveMode(LED_1, mode);
/*******************************************************************************
* Function Name: LED_Read
-********************************************************************************
+****************************************************************************//**
*
-* Summary:
-* Read the current value on the pins of the Digital Port in right justified
-* form.
+* \brief Reads the associated physical port (pin status register) and masks
+* the required bits according to the width and bit position of the component
+* instance.
*
-* Parameters:
-* None
+* The pin's status register returns the current logic level present on the
+* physical pin.
*
-* Return:
-* Returns the current value of the Digital Port as a right justified number
-*
-* Note:
-* Macro LED_ReadPS calls this function.
-*
+* \return
+* The current value for the pins in the component as a right justified number.
+*
+* \funcusage
+* \snippet LED_SUT.c usage_LED_Read
*******************************************************************************/
-uint8 LED_Read(void)
+uint8 LED_Read(void)
{
return (LED_PS & LED_MASK) >> LED_SHIFT;
}
/*******************************************************************************
* Function Name: LED_ReadDataReg
-********************************************************************************
+****************************************************************************//**
*
-* Summary:
-* Read the current value assigned to a Digital Port's data output register
+* \brief Reads the associated physical port's data output register and masks
+* the correct bits according to the width and bit position of the component
+* instance.
*
-* Parameters:
-* None
+* The data output register controls the signal applied to the physical pin in
+* conjunction with the drive mode parameter. This is not the same as the
+* preferred LED_Read() API because the
+* LED_ReadDataReg() reads the data register instead of the status
+* register. For output pins this is a useful function to determine the value
+* just written to the pin.
+*
+* \return
+* The current value of the data register masked and shifted into a right
+* justified number for the component instance.
*
-* Return:
-* Returns the current value assigned to the Digital Port's data output register
-*
+* \funcusage
+* \snippet LED_SUT.c usage_LED_ReadDataReg
*******************************************************************************/
-uint8 LED_ReadDataReg(void)
+uint8 LED_ReadDataReg(void)
{
return (LED_DR & LED_MASK) >> LED_SHIFT;
}
-/* If Interrupts Are Enabled for this Pins component */
+/* If interrupt is connected for this Pins component */
#if defined(LED_INTSTAT)
+ /*******************************************************************************
+ * Function Name: LED_SetInterruptMode
+ ****************************************************************************//**
+ *
+ * \brief Configures the interrupt mode for each of the Pins component's
+ * pins. Alternatively you may set the interrupt mode for all the pins
+ * specified in the Pins component.
+ *
+ * <b>Note</b> The interrupt is port-wide and therefore any enabled pin
+ * interrupt may trigger it.
+ *
+ * \param position
+ * The pin position as listed in the Pins component. You may OR these to be
+ * able to configure the interrupt mode of multiple pins within a Pins
+ * component. Or you may use LED_INTR_ALL to configure the
+ * interrupt mode of all the pins in the Pins component.
+ * - LED_0_INTR (First pin in the list)
+ * - LED_1_INTR (Second pin in the list)
+ * - ...
+ * - LED_INTR_ALL (All pins in Pins component)
+ *
+ * \param mode
+ * Interrupt mode for the selected pins. Valid options are documented in
+ * \ref intrMode.
+ *
+ * \return
+ * None
+ *
+ * \sideeffect
+ * It is recommended that the interrupt be disabled before calling this
+ * function to avoid unintended interrupt requests. Note that the interrupt
+ * type is port wide, and therefore will trigger for any enabled pin on the
+ * port.
+ *
+ * \funcusage
+ * \snippet LED_SUT.c usage_LED_SetInterruptMode
+ *******************************************************************************/
+ void LED_SetInterruptMode(uint16 position, uint16 mode)
+ {
+ if((position & LED_0_INTR) != 0u)
+ {
+ LED_0_INTTYPE_REG = (uint8)mode;
+ }
+ if((position & LED_1_INTR) != 0u)
+ {
+ LED_1_INTTYPE_REG = (uint8)mode;
+ }
+ }
+
+
/*******************************************************************************
* Function Name: LED_ClearInterrupt
- ********************************************************************************
- * Summary:
- * Clears any active interrupts attached to port and returns the value of the
- * interrupt status register.
+ ****************************************************************************//**
*
- * Parameters:
- * None
+ * \brief Clears any active interrupts attached with the component and returns
+ * the value of the interrupt status register allowing determination of which
+ * pins generated an interrupt event.
*
- * Return:
- * Returns the value of the interrupt status register
+ * \return
+ * The right-shifted current value of the interrupt status register. Each pin
+ * has one bit set if it generated an interrupt event. For example, bit 0 is
+ * for pin 0 and bit 1 is for pin 1 of the Pins component.
*
+ * \sideeffect
+ * Clears all bits of the physical port's interrupt status register, not just
+ * those associated with the Pins component.
+ *
+ * \funcusage
+ * \snippet LED_SUT.c usage_LED_ClearInterrupt
*******************************************************************************/
- uint8 LED_ClearInterrupt(void)
+ uint8 LED_ClearInterrupt(void)
{
return (LED_INTSTAT & LED_MASK) >> LED_SHIFT;
}
/*******************************************************************************
* File Name: LED.h
-* Version 2.10
+* Version 2.20
*
* Description:
-* This file containts Control Register function prototypes and register defines
+* This file contains Pin function prototypes and register defines
*
* Note:
*
********************************************************************************
-* Copyright 2008-2014, Cypress Semiconductor Corporation. All rights reserved.
+* Copyright 2008-2015, Cypress Semiconductor Corporation. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
#include "cypins.h"
#include "LED_aliases.h"
-/* Check to see if required defines such as CY_PSOC5A are available */
-/* They are defined starting with cy_boot v3.0 */
-#if !defined (CY_PSOC5A)
- #error Component cy_pins_v2_10 requires cy_boot v3.0 or later
-#endif /* (CY_PSOC5A) */
-
/* APIs are not generated for P15[7:6] */
#if !(CY_PSOC5A &&\
LED__PORT == 15 && ((LED__MASK & 0xC0) != 0))
* Function Prototypes
***************************************/
-void LED_Write(uint8 value) ;
-void LED_SetDriveMode(uint8 mode) ;
-uint8 LED_ReadDataReg(void) ;
-uint8 LED_Read(void) ;
-uint8 LED_ClearInterrupt(void) ;
-
+/**
+* \addtogroup group_general
+* @{
+*/
+void LED_Write(uint8 value);
+void LED_SetDriveMode(uint8 mode);
+uint8 LED_ReadDataReg(void);
+uint8 LED_Read(void);
+void LED_SetInterruptMode(uint16 position, uint16 mode);
+uint8 LED_ClearInterrupt(void);
+/** @} general */
/***************************************
* API Constants
***************************************/
-
-/* Drive Modes */
-#define LED_DM_ALG_HIZ PIN_DM_ALG_HIZ
-#define LED_DM_DIG_HIZ PIN_DM_DIG_HIZ
-#define LED_DM_RES_UP PIN_DM_RES_UP
-#define LED_DM_RES_DWN PIN_DM_RES_DWN
-#define LED_DM_OD_LO PIN_DM_OD_LO
-#define LED_DM_OD_HI PIN_DM_OD_HI
-#define LED_DM_STRONG PIN_DM_STRONG
-#define LED_DM_RES_UPDWN PIN_DM_RES_UPDWN
-
+/**
+* \addtogroup group_constants
+* @{
+*/
+ /** \addtogroup driveMode Drive mode constants
+ * \brief Constants to be passed as "mode" parameter in the LED_SetDriveMode() function.
+ * @{
+ */
+ #define LED_DM_ALG_HIZ PIN_DM_ALG_HIZ
+ #define LED_DM_DIG_HIZ PIN_DM_DIG_HIZ
+ #define LED_DM_RES_UP PIN_DM_RES_UP
+ #define LED_DM_RES_DWN PIN_DM_RES_DWN
+ #define LED_DM_OD_LO PIN_DM_OD_LO
+ #define LED_DM_OD_HI PIN_DM_OD_HI
+ #define LED_DM_STRONG PIN_DM_STRONG
+ #define LED_DM_RES_UPDWN PIN_DM_RES_UPDWN
+ /** @} driveMode */
+/** @} group_constants */
+
/* Digital Port Constants */
#define LED_MASK LED__MASK
#define LED_SHIFT LED__SHIFT
#define LED_WIDTH 2u
+/* Interrupt constants */
+#if defined(LED__INTSTAT)
+/**
+* \addtogroup group_constants
+* @{
+*/
+ /** \addtogroup intrMode Interrupt constants
+ * \brief Constants to be passed as "mode" parameter in LED_SetInterruptMode() function.
+ * @{
+ */
+ #define LED_INTR_NONE (uint16)(0x0000u)
+ #define LED_INTR_RISING (uint16)(0x0001u)
+ #define LED_INTR_FALLING (uint16)(0x0002u)
+ #define LED_INTR_BOTH (uint16)(0x0003u)
+ /** @} intrMode */
+/** @} group_constants */
+
+ #define LED_INTR_MASK (0x01u)
+#endif /* (LED__INTSTAT) */
+
/***************************************
* Registers
/* Sync Output Enable Registers */
#define LED_PRTDSI__SYNC_OUT (* (reg8 *) LED__PRTDSI__SYNC_OUT)
-
-#if defined(LED__INTSTAT) /* Interrupt Registers */
-
- #define LED_INTSTAT (* (reg8 *) LED__INTSTAT)
- #define LED_SNAP (* (reg8 *) LED__SNAP)
-
-#endif /* Interrupt Registers */
+/* SIO registers */
+#if defined(LED__SIO_CFG)
+ #define LED_SIO_HYST_EN (* (reg8 *) LED__SIO_HYST_EN)
+ #define LED_SIO_REG_HIFREQ (* (reg8 *) LED__SIO_REG_HIFREQ)
+ #define LED_SIO_CFG (* (reg8 *) LED__SIO_CFG)
+ #define LED_SIO_DIFF (* (reg8 *) LED__SIO_DIFF)
+#endif /* (LED__SIO_CFG) */
+
+/* Interrupt Registers */
+#if defined(LED__INTSTAT)
+ #define LED_INTSTAT (* (reg8 *) LED__INTSTAT)
+ #define LED_SNAP (* (reg8 *) LED__SNAP)
+
+ #define LED_0_INTTYPE_REG (* (reg8 *) LED__0__INTTYPE)
+ #define LED_1_INTTYPE_REG (* (reg8 *) LED__1__INTTYPE)
+#endif /* (LED__INTSTAT) */
#endif /* CY_PSOC5A... */
/*******************************************************************************
* File Name: LED.h
-* Version 2.10
+* Version 2.20
*
* Description:
-* This file containts Control Register function prototypes and register defines
+* This file contains the Alias definitions for Per-Pin APIs in cypins.h.
+* Information on using these APIs can be found in the System Reference Guide.
*
* Note:
*
********************************************************************************
-* Copyright 2008-2014, Cypress Semiconductor Corporation. All rights reserved.
+* Copyright 2008-2015, Cypress Semiconductor Corporation. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
#include "cyfitter.h"
-
/***************************************
* Constants
***************************************/
-#define LED_0 (LED__0__PC)
-#define LED_1 (LED__1__PC)
+#define LED_0 (LED__0__PC)
+#define LED_0_INTR ((uint16)((uint16)0x0001u << LED__0__SHIFT))
+
+#define LED_1 (LED__1__PC)
+#define LED_1_INTR ((uint16)((uint16)0x0001u << LED__1__SHIFT))
+
+#define LED_INTR_ALL ((uint16)(LED_0_INTR| LED_1_INTR))
#endif /* End Pins LED_ALIASES_H */
+
/* [] END OF FILE */
/*******************************************************************************
* File Name: SCSI_Out_DBx.h
-* Version 2.10
+* Version 2.20
*
* Description:
-* This file containts Control Register function prototypes and register defines
+* This file contains the Alias definitions for Per-Pin APIs in cypins.h.
+* Information on using these APIs can be found in the System Reference Guide.
*
* Note:
*
********************************************************************************
-* Copyright 2008-2014, Cypress Semiconductor Corporation. All rights reserved.
+* Copyright 2008-2015, Cypress Semiconductor Corporation. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
#include "cyfitter.h"
-
/***************************************
* Constants
***************************************/
-#define SCSI_Out_DBx_0 (SCSI_Out_DBx__0__PC)
-#define SCSI_Out_DBx_1 (SCSI_Out_DBx__1__PC)
-#define SCSI_Out_DBx_2 (SCSI_Out_DBx__2__PC)
-#define SCSI_Out_DBx_3 (SCSI_Out_DBx__3__PC)
-#define SCSI_Out_DBx_4 (SCSI_Out_DBx__4__PC)
-#define SCSI_Out_DBx_5 (SCSI_Out_DBx__5__PC)
-#define SCSI_Out_DBx_6 (SCSI_Out_DBx__6__PC)
-#define SCSI_Out_DBx_7 (SCSI_Out_DBx__7__PC)
-
-#define SCSI_Out_DBx_DB0 (SCSI_Out_DBx__DB0__PC)
-#define SCSI_Out_DBx_DB1 (SCSI_Out_DBx__DB1__PC)
-#define SCSI_Out_DBx_DB2 (SCSI_Out_DBx__DB2__PC)
-#define SCSI_Out_DBx_DB3 (SCSI_Out_DBx__DB3__PC)
-#define SCSI_Out_DBx_DB4 (SCSI_Out_DBx__DB4__PC)
-#define SCSI_Out_DBx_DB5 (SCSI_Out_DBx__DB5__PC)
-#define SCSI_Out_DBx_DB6 (SCSI_Out_DBx__DB6__PC)
-#define SCSI_Out_DBx_DB7 (SCSI_Out_DBx__DB7__PC)
+#define SCSI_Out_DBx_0 (SCSI_Out_DBx__0__PC)
+#define SCSI_Out_DBx_0_INTR ((uint16)((uint16)0x0001u << SCSI_Out_DBx__0__SHIFT))
+
+#define SCSI_Out_DBx_1 (SCSI_Out_DBx__1__PC)
+#define SCSI_Out_DBx_1_INTR ((uint16)((uint16)0x0001u << SCSI_Out_DBx__1__SHIFT))
+
+#define SCSI_Out_DBx_2 (SCSI_Out_DBx__2__PC)
+#define SCSI_Out_DBx_2_INTR ((uint16)((uint16)0x0001u << SCSI_Out_DBx__2__SHIFT))
+
+#define SCSI_Out_DBx_3 (SCSI_Out_DBx__3__PC)
+#define SCSI_Out_DBx_3_INTR ((uint16)((uint16)0x0001u << SCSI_Out_DBx__3__SHIFT))
+
+#define SCSI_Out_DBx_4 (SCSI_Out_DBx__4__PC)
+#define SCSI_Out_DBx_4_INTR ((uint16)((uint16)0x0001u << SCSI_Out_DBx__4__SHIFT))
+
+#define SCSI_Out_DBx_5 (SCSI_Out_DBx__5__PC)
+#define SCSI_Out_DBx_5_INTR ((uint16)((uint16)0x0001u << SCSI_Out_DBx__5__SHIFT))
+
+#define SCSI_Out_DBx_6 (SCSI_Out_DBx__6__PC)
+#define SCSI_Out_DBx_6_INTR ((uint16)((uint16)0x0001u << SCSI_Out_DBx__6__SHIFT))
+
+#define SCSI_Out_DBx_7 (SCSI_Out_DBx__7__PC)
+#define SCSI_Out_DBx_7_INTR ((uint16)((uint16)0x0001u << SCSI_Out_DBx__7__SHIFT))
+
+#define SCSI_Out_DBx_INTR_ALL ((uint16)(SCSI_Out_DBx_0_INTR| SCSI_Out_DBx_1_INTR| SCSI_Out_DBx_2_INTR| SCSI_Out_DBx_3_INTR| SCSI_Out_DBx_4_INTR| SCSI_Out_DBx_5_INTR| SCSI_Out_DBx_6_INTR| SCSI_Out_DBx_7_INTR))
+#define SCSI_Out_DBx_DB0 (SCSI_Out_DBx__DB0__PC)
+#define SCSI_Out_DBx_DB0_INTR ((uint16)((uint16)0x0001u << SCSI_Out_DBx__0__SHIFT))
+
+#define SCSI_Out_DBx_DB1 (SCSI_Out_DBx__DB1__PC)
+#define SCSI_Out_DBx_DB1_INTR ((uint16)((uint16)0x0001u << SCSI_Out_DBx__1__SHIFT))
+
+#define SCSI_Out_DBx_DB2 (SCSI_Out_DBx__DB2__PC)
+#define SCSI_Out_DBx_DB2_INTR ((uint16)((uint16)0x0001u << SCSI_Out_DBx__2__SHIFT))
+
+#define SCSI_Out_DBx_DB3 (SCSI_Out_DBx__DB3__PC)
+#define SCSI_Out_DBx_DB3_INTR ((uint16)((uint16)0x0001u << SCSI_Out_DBx__3__SHIFT))
+
+#define SCSI_Out_DBx_DB4 (SCSI_Out_DBx__DB4__PC)
+#define SCSI_Out_DBx_DB4_INTR ((uint16)((uint16)0x0001u << SCSI_Out_DBx__4__SHIFT))
+
+#define SCSI_Out_DBx_DB5 (SCSI_Out_DBx__DB5__PC)
+#define SCSI_Out_DBx_DB5_INTR ((uint16)((uint16)0x0001u << SCSI_Out_DBx__5__SHIFT))
+
+#define SCSI_Out_DBx_DB6 (SCSI_Out_DBx__DB6__PC)
+#define SCSI_Out_DBx_DB6_INTR ((uint16)((uint16)0x0001u << SCSI_Out_DBx__6__SHIFT))
+
+#define SCSI_Out_DBx_DB7 (SCSI_Out_DBx__DB7__PC)
+#define SCSI_Out_DBx_DB7_INTR ((uint16)((uint16)0x0001u << SCSI_Out_DBx__7__SHIFT))
#endif /* End Pins SCSI_Out_DBx_ALIASES_H */
+
/* [] END OF FILE */
/*******************************************************************************
* File Name: SCSI_Out.h
-* Version 2.10
+* Version 2.20
*
* Description:
-* This file containts Control Register function prototypes and register defines
+* This file contains the Alias definitions for Per-Pin APIs in cypins.h.
+* Information on using these APIs can be found in the System Reference Guide.
*
* Note:
*
********************************************************************************
-* Copyright 2008-2014, Cypress Semiconductor Corporation. All rights reserved.
+* Copyright 2008-2015, Cypress Semiconductor Corporation. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
#include "cyfitter.h"
-
/***************************************
* Constants
***************************************/
-#define SCSI_Out_0 (SCSI_Out__0__PC)
-#define SCSI_Out_1 (SCSI_Out__1__PC)
-#define SCSI_Out_2 (SCSI_Out__2__PC)
-#define SCSI_Out_3 (SCSI_Out__3__PC)
-#define SCSI_Out_4 (SCSI_Out__4__PC)
-#define SCSI_Out_5 (SCSI_Out__5__PC)
-#define SCSI_Out_6 (SCSI_Out__6__PC)
-#define SCSI_Out_7 (SCSI_Out__7__PC)
-
-#define SCSI_Out_DBP_raw (SCSI_Out__DBP_raw__PC)
-#define SCSI_Out_BSY (SCSI_Out__BSY__PC)
-#define SCSI_Out_RST (SCSI_Out__RST__PC)
-#define SCSI_Out_MSG (SCSI_Out__MSG__PC)
-#define SCSI_Out_SEL (SCSI_Out__SEL__PC)
-#define SCSI_Out_CD (SCSI_Out__CD__PC)
-#define SCSI_Out_REQ (SCSI_Out__REQ__PC)
-#define SCSI_Out_IO_raw (SCSI_Out__IO_raw__PC)
+#define SCSI_Out_0 (SCSI_Out__0__PC)
+#define SCSI_Out_0_INTR ((uint16)((uint16)0x0001u << SCSI_Out__0__SHIFT))
+
+#define SCSI_Out_1 (SCSI_Out__1__PC)
+#define SCSI_Out_1_INTR ((uint16)((uint16)0x0001u << SCSI_Out__1__SHIFT))
+
+#define SCSI_Out_2 (SCSI_Out__2__PC)
+#define SCSI_Out_2_INTR ((uint16)((uint16)0x0001u << SCSI_Out__2__SHIFT))
+
+#define SCSI_Out_3 (SCSI_Out__3__PC)
+#define SCSI_Out_3_INTR ((uint16)((uint16)0x0001u << SCSI_Out__3__SHIFT))
+
+#define SCSI_Out_4 (SCSI_Out__4__PC)
+#define SCSI_Out_4_INTR ((uint16)((uint16)0x0001u << SCSI_Out__4__SHIFT))
+
+#define SCSI_Out_5 (SCSI_Out__5__PC)
+#define SCSI_Out_5_INTR ((uint16)((uint16)0x0001u << SCSI_Out__5__SHIFT))
+
+#define SCSI_Out_6 (SCSI_Out__6__PC)
+#define SCSI_Out_6_INTR ((uint16)((uint16)0x0001u << SCSI_Out__6__SHIFT))
+
+#define SCSI_Out_7 (SCSI_Out__7__PC)
+#define SCSI_Out_7_INTR ((uint16)((uint16)0x0001u << SCSI_Out__7__SHIFT))
+
+#define SCSI_Out_INTR_ALL ((uint16)(SCSI_Out_0_INTR| SCSI_Out_1_INTR| SCSI_Out_2_INTR| SCSI_Out_3_INTR| SCSI_Out_4_INTR| SCSI_Out_5_INTR| SCSI_Out_6_INTR| SCSI_Out_7_INTR))
+#define SCSI_Out_DBP_raw (SCSI_Out__DBP_raw__PC)
+#define SCSI_Out_DBP_raw_INTR ((uint16)((uint16)0x0001u << SCSI_Out__0__SHIFT))
+
+#define SCSI_Out_BSY (SCSI_Out__BSY__PC)
+#define SCSI_Out_BSY_INTR ((uint16)((uint16)0x0001u << SCSI_Out__1__SHIFT))
+
+#define SCSI_Out_RST (SCSI_Out__RST__PC)
+#define SCSI_Out_RST_INTR ((uint16)((uint16)0x0001u << SCSI_Out__2__SHIFT))
+
+#define SCSI_Out_MSG (SCSI_Out__MSG__PC)
+#define SCSI_Out_MSG_INTR ((uint16)((uint16)0x0001u << SCSI_Out__3__SHIFT))
+
+#define SCSI_Out_SEL (SCSI_Out__SEL__PC)
+#define SCSI_Out_SEL_INTR ((uint16)((uint16)0x0001u << SCSI_Out__4__SHIFT))
+
+#define SCSI_Out_CD (SCSI_Out__CD__PC)
+#define SCSI_Out_CD_INTR ((uint16)((uint16)0x0001u << SCSI_Out__5__SHIFT))
+
+#define SCSI_Out_REQ (SCSI_Out__REQ__PC)
+#define SCSI_Out_REQ_INTR ((uint16)((uint16)0x0001u << SCSI_Out__6__SHIFT))
+
+#define SCSI_Out_IO_raw (SCSI_Out__IO_raw__PC)
+#define SCSI_Out_IO_raw_INTR ((uint16)((uint16)0x0001u << SCSI_Out__7__SHIFT))
#endif /* End Pins SCSI_Out_ALIASES_H */
+
/* [] END OF FILE */
/*******************************************************************************
* File Name: SD_PULLUP.c
-* Version 2.10
+* Version 2.20
*
* Description:
* This file contains API to enable firmware control of a Pins component.
* Note:
*
********************************************************************************
-* Copyright 2008-2014, Cypress Semiconductor Corporation. All rights reserved.
+* Copyright 2008-2015, Cypress Semiconductor Corporation. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
/*******************************************************************************
* Function Name: SD_PULLUP_Write
-********************************************************************************
+****************************************************************************//**
*
-* Summary:
-* Assign a new value to the digital port's data output register.
+* \brief Writes the value to the physical port (data output register), masking
+* and shifting the bits appropriately.
*
-* Parameters:
-* prtValue: The value to be assigned to the Digital Port.
+* The data output register controls the signal applied to the physical pin in
+* conjunction with the drive mode parameter. This function avoids changing
+* other bits in the port by using the appropriate method (read-modify-write or
+* bit banding).
*
-* Return:
-* None
-*
+* <b>Note</b> This function should not be used on a hardware digital output pin
+* as it is driven by the hardware signal attached to it.
+*
+* \param value
+* Value to write to the component instance.
+*
+* \return
+* None
+*
+* \sideeffect
+* If you use read-modify-write operations that are not atomic; the Interrupt
+* Service Routines (ISR) can cause corruption of this function. An ISR that
+* interrupts this function and performs writes to the Pins component data
+* register can cause corrupted port data. To avoid this issue, you should
+* either use the Per-Pin APIs (primary method) or disable interrupts around
+* this function.
+*
+* \funcusage
+* \snippet SD_PULLUP_SUT.c usage_SD_PULLUP_Write
*******************************************************************************/
-void SD_PULLUP_Write(uint8 value)
+void SD_PULLUP_Write(uint8 value)
{
uint8 staticBits = (SD_PULLUP_DR & (uint8)(~SD_PULLUP_MASK));
SD_PULLUP_DR = staticBits | ((uint8)(value << SD_PULLUP_SHIFT) & SD_PULLUP_MASK);
/*******************************************************************************
* Function Name: SD_PULLUP_SetDriveMode
-********************************************************************************
+****************************************************************************//**
*
-* Summary:
-* Change the drive mode on the pins of the port.
+* \brief Sets the drive mode for each of the Pins component's pins.
*
-* Parameters:
-* mode: Change the pins to one of the following drive modes.
-*
-* SD_PULLUP_DM_STRONG Strong Drive
-* SD_PULLUP_DM_OD_HI Open Drain, Drives High
-* SD_PULLUP_DM_OD_LO Open Drain, Drives Low
-* SD_PULLUP_DM_RES_UP Resistive Pull Up
-* SD_PULLUP_DM_RES_DWN Resistive Pull Down
-* SD_PULLUP_DM_RES_UPDWN Resistive Pull Up/Down
-* SD_PULLUP_DM_DIG_HIZ High Impedance Digital
-* SD_PULLUP_DM_ALG_HIZ High Impedance Analog
-*
-* Return:
+* <b>Note</b> This affects all pins in the Pins component instance. Use the
+* Per-Pin APIs if you wish to control individual pin's drive modes.
+*
+* \param mode
+* Mode for the selected signals. Valid options are documented in
+* \ref driveMode.
+*
+* \return
* None
*
+* \sideeffect
+* If you use read-modify-write operations that are not atomic, the ISR can
+* cause corruption of this function. An ISR that interrupts this function
+* and performs writes to the Pins component Drive Mode registers can cause
+* corrupted port data. To avoid this issue, you should either use the Per-Pin
+* APIs (primary method) or disable interrupts around this function.
+*
+* \funcusage
+* \snippet SD_PULLUP_SUT.c usage_SD_PULLUP_SetDriveMode
*******************************************************************************/
-void SD_PULLUP_SetDriveMode(uint8 mode)
+void SD_PULLUP_SetDriveMode(uint8 mode)
{
CyPins_SetPinDriveMode(SD_PULLUP_0, mode);
CyPins_SetPinDriveMode(SD_PULLUP_1, mode);
/*******************************************************************************
* Function Name: SD_PULLUP_Read
-********************************************************************************
+****************************************************************************//**
*
-* Summary:
-* Read the current value on the pins of the Digital Port in right justified
-* form.
+* \brief Reads the associated physical port (pin status register) and masks
+* the required bits according to the width and bit position of the component
+* instance.
*
-* Parameters:
-* None
+* The pin's status register returns the current logic level present on the
+* physical pin.
*
-* Return:
-* Returns the current value of the Digital Port as a right justified number
-*
-* Note:
-* Macro SD_PULLUP_ReadPS calls this function.
-*
+* \return
+* The current value for the pins in the component as a right justified number.
+*
+* \funcusage
+* \snippet SD_PULLUP_SUT.c usage_SD_PULLUP_Read
*******************************************************************************/
-uint8 SD_PULLUP_Read(void)
+uint8 SD_PULLUP_Read(void)
{
return (SD_PULLUP_PS & SD_PULLUP_MASK) >> SD_PULLUP_SHIFT;
}
/*******************************************************************************
* Function Name: SD_PULLUP_ReadDataReg
-********************************************************************************
+****************************************************************************//**
*
-* Summary:
-* Read the current value assigned to a Digital Port's data output register
+* \brief Reads the associated physical port's data output register and masks
+* the correct bits according to the width and bit position of the component
+* instance.
*
-* Parameters:
-* None
+* The data output register controls the signal applied to the physical pin in
+* conjunction with the drive mode parameter. This is not the same as the
+* preferred SD_PULLUP_Read() API because the
+* SD_PULLUP_ReadDataReg() reads the data register instead of the status
+* register. For output pins this is a useful function to determine the value
+* just written to the pin.
+*
+* \return
+* The current value of the data register masked and shifted into a right
+* justified number for the component instance.
*
-* Return:
-* Returns the current value assigned to the Digital Port's data output register
-*
+* \funcusage
+* \snippet SD_PULLUP_SUT.c usage_SD_PULLUP_ReadDataReg
*******************************************************************************/
-uint8 SD_PULLUP_ReadDataReg(void)
+uint8 SD_PULLUP_ReadDataReg(void)
{
return (SD_PULLUP_DR & SD_PULLUP_MASK) >> SD_PULLUP_SHIFT;
}
-/* If Interrupts Are Enabled for this Pins component */
+/* If interrupt is connected for this Pins component */
#if defined(SD_PULLUP_INTSTAT)
+ /*******************************************************************************
+ * Function Name: SD_PULLUP_SetInterruptMode
+ ****************************************************************************//**
+ *
+ * \brief Configures the interrupt mode for each of the Pins component's
+ * pins. Alternatively you may set the interrupt mode for all the pins
+ * specified in the Pins component.
+ *
+ * <b>Note</b> The interrupt is port-wide and therefore any enabled pin
+ * interrupt may trigger it.
+ *
+ * \param position
+ * The pin position as listed in the Pins component. You may OR these to be
+ * able to configure the interrupt mode of multiple pins within a Pins
+ * component. Or you may use SD_PULLUP_INTR_ALL to configure the
+ * interrupt mode of all the pins in the Pins component.
+ * - SD_PULLUP_0_INTR (First pin in the list)
+ * - SD_PULLUP_1_INTR (Second pin in the list)
+ * - ...
+ * - SD_PULLUP_INTR_ALL (All pins in Pins component)
+ *
+ * \param mode
+ * Interrupt mode for the selected pins. Valid options are documented in
+ * \ref intrMode.
+ *
+ * \return
+ * None
+ *
+ * \sideeffect
+ * It is recommended that the interrupt be disabled before calling this
+ * function to avoid unintended interrupt requests. Note that the interrupt
+ * type is port wide, and therefore will trigger for any enabled pin on the
+ * port.
+ *
+ * \funcusage
+ * \snippet SD_PULLUP_SUT.c usage_SD_PULLUP_SetInterruptMode
+ *******************************************************************************/
+ void SD_PULLUP_SetInterruptMode(uint16 position, uint16 mode)
+ {
+ if((position & SD_PULLUP_0_INTR) != 0u)
+ {
+ SD_PULLUP_0_INTTYPE_REG = (uint8)mode;
+ }
+ if((position & SD_PULLUP_1_INTR) != 0u)
+ {
+ SD_PULLUP_1_INTTYPE_REG = (uint8)mode;
+ }
+ if((position & SD_PULLUP_2_INTR) != 0u)
+ {
+ SD_PULLUP_2_INTTYPE_REG = (uint8)mode;
+ }
+ if((position & SD_PULLUP_3_INTR) != 0u)
+ {
+ SD_PULLUP_3_INTTYPE_REG = (uint8)mode;
+ }
+ }
+
+
/*******************************************************************************
* Function Name: SD_PULLUP_ClearInterrupt
- ********************************************************************************
- * Summary:
- * Clears any active interrupts attached to port and returns the value of the
- * interrupt status register.
+ ****************************************************************************//**
*
- * Parameters:
- * None
+ * \brief Clears any active interrupts attached with the component and returns
+ * the value of the interrupt status register allowing determination of which
+ * pins generated an interrupt event.
*
- * Return:
- * Returns the value of the interrupt status register
+ * \return
+ * The right-shifted current value of the interrupt status register. Each pin
+ * has one bit set if it generated an interrupt event. For example, bit 0 is
+ * for pin 0 and bit 1 is for pin 1 of the Pins component.
*
+ * \sideeffect
+ * Clears all bits of the physical port's interrupt status register, not just
+ * those associated with the Pins component.
+ *
+ * \funcusage
+ * \snippet SD_PULLUP_SUT.c usage_SD_PULLUP_ClearInterrupt
*******************************************************************************/
- uint8 SD_PULLUP_ClearInterrupt(void)
+ uint8 SD_PULLUP_ClearInterrupt(void)
{
return (SD_PULLUP_INTSTAT & SD_PULLUP_MASK) >> SD_PULLUP_SHIFT;
}
/*******************************************************************************
* File Name: SD_PULLUP.h
-* Version 2.10
+* Version 2.20
*
* Description:
-* This file containts Control Register function prototypes and register defines
+* This file contains Pin function prototypes and register defines
*
* Note:
*
********************************************************************************
-* Copyright 2008-2014, Cypress Semiconductor Corporation. All rights reserved.
+* Copyright 2008-2015, Cypress Semiconductor Corporation. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
#include "cypins.h"
#include "SD_PULLUP_aliases.h"
-/* Check to see if required defines such as CY_PSOC5A are available */
-/* They are defined starting with cy_boot v3.0 */
-#if !defined (CY_PSOC5A)
- #error Component cy_pins_v2_10 requires cy_boot v3.0 or later
-#endif /* (CY_PSOC5A) */
-
/* APIs are not generated for P15[7:6] */
#if !(CY_PSOC5A &&\
SD_PULLUP__PORT == 15 && ((SD_PULLUP__MASK & 0xC0) != 0))
* Function Prototypes
***************************************/
-void SD_PULLUP_Write(uint8 value) ;
-void SD_PULLUP_SetDriveMode(uint8 mode) ;
-uint8 SD_PULLUP_ReadDataReg(void) ;
-uint8 SD_PULLUP_Read(void) ;
-uint8 SD_PULLUP_ClearInterrupt(void) ;
-
+/**
+* \addtogroup group_general
+* @{
+*/
+void SD_PULLUP_Write(uint8 value);
+void SD_PULLUP_SetDriveMode(uint8 mode);
+uint8 SD_PULLUP_ReadDataReg(void);
+uint8 SD_PULLUP_Read(void);
+void SD_PULLUP_SetInterruptMode(uint16 position, uint16 mode);
+uint8 SD_PULLUP_ClearInterrupt(void);
+/** @} general */
/***************************************
* API Constants
***************************************/
-
-/* Drive Modes */
-#define SD_PULLUP_DM_ALG_HIZ PIN_DM_ALG_HIZ
-#define SD_PULLUP_DM_DIG_HIZ PIN_DM_DIG_HIZ
-#define SD_PULLUP_DM_RES_UP PIN_DM_RES_UP
-#define SD_PULLUP_DM_RES_DWN PIN_DM_RES_DWN
-#define SD_PULLUP_DM_OD_LO PIN_DM_OD_LO
-#define SD_PULLUP_DM_OD_HI PIN_DM_OD_HI
-#define SD_PULLUP_DM_STRONG PIN_DM_STRONG
-#define SD_PULLUP_DM_RES_UPDWN PIN_DM_RES_UPDWN
-
+/**
+* \addtogroup group_constants
+* @{
+*/
+ /** \addtogroup driveMode Drive mode constants
+ * \brief Constants to be passed as "mode" parameter in the SD_PULLUP_SetDriveMode() function.
+ * @{
+ */
+ #define SD_PULLUP_DM_ALG_HIZ PIN_DM_ALG_HIZ
+ #define SD_PULLUP_DM_DIG_HIZ PIN_DM_DIG_HIZ
+ #define SD_PULLUP_DM_RES_UP PIN_DM_RES_UP
+ #define SD_PULLUP_DM_RES_DWN PIN_DM_RES_DWN
+ #define SD_PULLUP_DM_OD_LO PIN_DM_OD_LO
+ #define SD_PULLUP_DM_OD_HI PIN_DM_OD_HI
+ #define SD_PULLUP_DM_STRONG PIN_DM_STRONG
+ #define SD_PULLUP_DM_RES_UPDWN PIN_DM_RES_UPDWN
+ /** @} driveMode */
+/** @} group_constants */
+
/* Digital Port Constants */
#define SD_PULLUP_MASK SD_PULLUP__MASK
#define SD_PULLUP_SHIFT SD_PULLUP__SHIFT
#define SD_PULLUP_WIDTH 4u
+/* Interrupt constants */
+#if defined(SD_PULLUP__INTSTAT)
+/**
+* \addtogroup group_constants
+* @{
+*/
+ /** \addtogroup intrMode Interrupt constants
+ * \brief Constants to be passed as "mode" parameter in SD_PULLUP_SetInterruptMode() function.
+ * @{
+ */
+ #define SD_PULLUP_INTR_NONE (uint16)(0x0000u)
+ #define SD_PULLUP_INTR_RISING (uint16)(0x0001u)
+ #define SD_PULLUP_INTR_FALLING (uint16)(0x0002u)
+ #define SD_PULLUP_INTR_BOTH (uint16)(0x0003u)
+ /** @} intrMode */
+/** @} group_constants */
+
+ #define SD_PULLUP_INTR_MASK (0x01u)
+#endif /* (SD_PULLUP__INTSTAT) */
+
/***************************************
* Registers
/* Sync Output Enable Registers */
#define SD_PULLUP_PRTDSI__SYNC_OUT (* (reg8 *) SD_PULLUP__PRTDSI__SYNC_OUT)
-
-#if defined(SD_PULLUP__INTSTAT) /* Interrupt Registers */
-
- #define SD_PULLUP_INTSTAT (* (reg8 *) SD_PULLUP__INTSTAT)
- #define SD_PULLUP_SNAP (* (reg8 *) SD_PULLUP__SNAP)
-
-#endif /* Interrupt Registers */
+/* SIO registers */
+#if defined(SD_PULLUP__SIO_CFG)
+ #define SD_PULLUP_SIO_HYST_EN (* (reg8 *) SD_PULLUP__SIO_HYST_EN)
+ #define SD_PULLUP_SIO_REG_HIFREQ (* (reg8 *) SD_PULLUP__SIO_REG_HIFREQ)
+ #define SD_PULLUP_SIO_CFG (* (reg8 *) SD_PULLUP__SIO_CFG)
+ #define SD_PULLUP_SIO_DIFF (* (reg8 *) SD_PULLUP__SIO_DIFF)
+#endif /* (SD_PULLUP__SIO_CFG) */
+
+/* Interrupt Registers */
+#if defined(SD_PULLUP__INTSTAT)
+ #define SD_PULLUP_INTSTAT (* (reg8 *) SD_PULLUP__INTSTAT)
+ #define SD_PULLUP_SNAP (* (reg8 *) SD_PULLUP__SNAP)
+
+ #define SD_PULLUP_0_INTTYPE_REG (* (reg8 *) SD_PULLUP__0__INTTYPE)
+ #define SD_PULLUP_1_INTTYPE_REG (* (reg8 *) SD_PULLUP__1__INTTYPE)
+ #define SD_PULLUP_2_INTTYPE_REG (* (reg8 *) SD_PULLUP__2__INTTYPE)
+ #define SD_PULLUP_3_INTTYPE_REG (* (reg8 *) SD_PULLUP__3__INTTYPE)
+#endif /* (SD_PULLUP__INTSTAT) */
#endif /* CY_PSOC5A... */
/*******************************************************************************
* File Name: SD_PULLUP.h
-* Version 2.10
+* Version 2.20
*
* Description:
-* This file containts Control Register function prototypes and register defines
+* This file contains the Alias definitions for Per-Pin APIs in cypins.h.
+* Information on using these APIs can be found in the System Reference Guide.
*
* Note:
*
********************************************************************************
-* Copyright 2008-2014, Cypress Semiconductor Corporation. All rights reserved.
+* Copyright 2008-2015, Cypress Semiconductor Corporation. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
#include "cyfitter.h"
-
/***************************************
* Constants
***************************************/
-#define SD_PULLUP_0 (SD_PULLUP__0__PC)
-#define SD_PULLUP_1 (SD_PULLUP__1__PC)
-#define SD_PULLUP_2 (SD_PULLUP__2__PC)
-#define SD_PULLUP_3 (SD_PULLUP__3__PC)
+#define SD_PULLUP_0 (SD_PULLUP__0__PC)
+#define SD_PULLUP_0_INTR ((uint16)((uint16)0x0001u << SD_PULLUP__0__SHIFT))
+
+#define SD_PULLUP_1 (SD_PULLUP__1__PC)
+#define SD_PULLUP_1_INTR ((uint16)((uint16)0x0001u << SD_PULLUP__1__SHIFT))
+
+#define SD_PULLUP_2 (SD_PULLUP__2__PC)
+#define SD_PULLUP_2_INTR ((uint16)((uint16)0x0001u << SD_PULLUP__2__SHIFT))
+
+#define SD_PULLUP_3 (SD_PULLUP__3__PC)
+#define SD_PULLUP_3_INTR ((uint16)((uint16)0x0001u << SD_PULLUP__3__SHIFT))
+
+#define SD_PULLUP_INTR_ALL ((uint16)(SD_PULLUP_0_INTR| SD_PULLUP_1_INTR| SD_PULLUP_2_INTR| SD_PULLUP_3_INTR))
#endif /* End Pins SD_PULLUP_ALIASES_H */
+
/* [] END OF FILE */
/*******************************************************************************
* File Name: SPI_PULLUP.c
-* Version 2.10
+* Version 2.20
*
* Description:
* This file contains API to enable firmware control of a Pins component.
* Note:
*
********************************************************************************
-* Copyright 2008-2014, Cypress Semiconductor Corporation. All rights reserved.
+* Copyright 2008-2015, Cypress Semiconductor Corporation. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
/*******************************************************************************
* Function Name: SPI_PULLUP_Write
-********************************************************************************
+****************************************************************************//**
*
-* Summary:
-* Assign a new value to the digital port's data output register.
+* \brief Writes the value to the physical port (data output register), masking
+* and shifting the bits appropriately.
*
-* Parameters:
-* prtValue: The value to be assigned to the Digital Port.
+* The data output register controls the signal applied to the physical pin in
+* conjunction with the drive mode parameter. This function avoids changing
+* other bits in the port by using the appropriate method (read-modify-write or
+* bit banding).
*
-* Return:
-* None
-*
+* <b>Note</b> This function should not be used on a hardware digital output pin
+* as it is driven by the hardware signal attached to it.
+*
+* \param value
+* Value to write to the component instance.
+*
+* \return
+* None
+*
+* \sideeffect
+* If you use read-modify-write operations that are not atomic; the Interrupt
+* Service Routines (ISR) can cause corruption of this function. An ISR that
+* interrupts this function and performs writes to the Pins component data
+* register can cause corrupted port data. To avoid this issue, you should
+* either use the Per-Pin APIs (primary method) or disable interrupts around
+* this function.
+*
+* \funcusage
+* \snippet SPI_PULLUP_SUT.c usage_SPI_PULLUP_Write
*******************************************************************************/
-void SPI_PULLUP_Write(uint8 value)
+void SPI_PULLUP_Write(uint8 value)
{
uint8 staticBits = (SPI_PULLUP_DR & (uint8)(~SPI_PULLUP_MASK));
SPI_PULLUP_DR = staticBits | ((uint8)(value << SPI_PULLUP_SHIFT) & SPI_PULLUP_MASK);
/*******************************************************************************
* Function Name: SPI_PULLUP_SetDriveMode
-********************************************************************************
+****************************************************************************//**
*
-* Summary:
-* Change the drive mode on the pins of the port.
+* \brief Sets the drive mode for each of the Pins component's pins.
*
-* Parameters:
-* mode: Change the pins to one of the following drive modes.
-*
-* SPI_PULLUP_DM_STRONG Strong Drive
-* SPI_PULLUP_DM_OD_HI Open Drain, Drives High
-* SPI_PULLUP_DM_OD_LO Open Drain, Drives Low
-* SPI_PULLUP_DM_RES_UP Resistive Pull Up
-* SPI_PULLUP_DM_RES_DWN Resistive Pull Down
-* SPI_PULLUP_DM_RES_UPDWN Resistive Pull Up/Down
-* SPI_PULLUP_DM_DIG_HIZ High Impedance Digital
-* SPI_PULLUP_DM_ALG_HIZ High Impedance Analog
-*
-* Return:
+* <b>Note</b> This affects all pins in the Pins component instance. Use the
+* Per-Pin APIs if you wish to control individual pin's drive modes.
+*
+* \param mode
+* Mode for the selected signals. Valid options are documented in
+* \ref driveMode.
+*
+* \return
* None
*
+* \sideeffect
+* If you use read-modify-write operations that are not atomic, the ISR can
+* cause corruption of this function. An ISR that interrupts this function
+* and performs writes to the Pins component Drive Mode registers can cause
+* corrupted port data. To avoid this issue, you should either use the Per-Pin
+* APIs (primary method) or disable interrupts around this function.
+*
+* \funcusage
+* \snippet SPI_PULLUP_SUT.c usage_SPI_PULLUP_SetDriveMode
*******************************************************************************/
-void SPI_PULLUP_SetDriveMode(uint8 mode)
+void SPI_PULLUP_SetDriveMode(uint8 mode)
{
CyPins_SetPinDriveMode(SPI_PULLUP_0, mode);
CyPins_SetPinDriveMode(SPI_PULLUP_1, mode);
/*******************************************************************************
* Function Name: SPI_PULLUP_Read
-********************************************************************************
+****************************************************************************//**
*
-* Summary:
-* Read the current value on the pins of the Digital Port in right justified
-* form.
+* \brief Reads the associated physical port (pin status register) and masks
+* the required bits according to the width and bit position of the component
+* instance.
*
-* Parameters:
-* None
+* The pin's status register returns the current logic level present on the
+* physical pin.
*
-* Return:
-* Returns the current value of the Digital Port as a right justified number
-*
-* Note:
-* Macro SPI_PULLUP_ReadPS calls this function.
-*
+* \return
+* The current value for the pins in the component as a right justified number.
+*
+* \funcusage
+* \snippet SPI_PULLUP_SUT.c usage_SPI_PULLUP_Read
*******************************************************************************/
-uint8 SPI_PULLUP_Read(void)
+uint8 SPI_PULLUP_Read(void)
{
return (SPI_PULLUP_PS & SPI_PULLUP_MASK) >> SPI_PULLUP_SHIFT;
}
/*******************************************************************************
* Function Name: SPI_PULLUP_ReadDataReg
-********************************************************************************
+****************************************************************************//**
*
-* Summary:
-* Read the current value assigned to a Digital Port's data output register
+* \brief Reads the associated physical port's data output register and masks
+* the correct bits according to the width and bit position of the component
+* instance.
*
-* Parameters:
-* None
+* The data output register controls the signal applied to the physical pin in
+* conjunction with the drive mode parameter. This is not the same as the
+* preferred SPI_PULLUP_Read() API because the
+* SPI_PULLUP_ReadDataReg() reads the data register instead of the status
+* register. For output pins this is a useful function to determine the value
+* just written to the pin.
+*
+* \return
+* The current value of the data register masked and shifted into a right
+* justified number for the component instance.
*
-* Return:
-* Returns the current value assigned to the Digital Port's data output register
-*
+* \funcusage
+* \snippet SPI_PULLUP_SUT.c usage_SPI_PULLUP_ReadDataReg
*******************************************************************************/
-uint8 SPI_PULLUP_ReadDataReg(void)
+uint8 SPI_PULLUP_ReadDataReg(void)
{
return (SPI_PULLUP_DR & SPI_PULLUP_MASK) >> SPI_PULLUP_SHIFT;
}
-/* If Interrupts Are Enabled for this Pins component */
+/* If interrupt is connected for this Pins component */
#if defined(SPI_PULLUP_INTSTAT)
+ /*******************************************************************************
+ * Function Name: SPI_PULLUP_SetInterruptMode
+ ****************************************************************************//**
+ *
+ * \brief Configures the interrupt mode for each of the Pins component's
+ * pins. Alternatively you may set the interrupt mode for all the pins
+ * specified in the Pins component.
+ *
+ * <b>Note</b> The interrupt is port-wide and therefore any enabled pin
+ * interrupt may trigger it.
+ *
+ * \param position
+ * The pin position as listed in the Pins component. You may OR these to be
+ * able to configure the interrupt mode of multiple pins within a Pins
+ * component. Or you may use SPI_PULLUP_INTR_ALL to configure the
+ * interrupt mode of all the pins in the Pins component.
+ * - SPI_PULLUP_0_INTR (First pin in the list)
+ * - SPI_PULLUP_1_INTR (Second pin in the list)
+ * - ...
+ * - SPI_PULLUP_INTR_ALL (All pins in Pins component)
+ *
+ * \param mode
+ * Interrupt mode for the selected pins. Valid options are documented in
+ * \ref intrMode.
+ *
+ * \return
+ * None
+ *
+ * \sideeffect
+ * It is recommended that the interrupt be disabled before calling this
+ * function to avoid unintended interrupt requests. Note that the interrupt
+ * type is port wide, and therefore will trigger for any enabled pin on the
+ * port.
+ *
+ * \funcusage
+ * \snippet SPI_PULLUP_SUT.c usage_SPI_PULLUP_SetInterruptMode
+ *******************************************************************************/
+ void SPI_PULLUP_SetInterruptMode(uint16 position, uint16 mode)
+ {
+ if((position & SPI_PULLUP_0_INTR) != 0u)
+ {
+ SPI_PULLUP_0_INTTYPE_REG = (uint8)mode;
+ }
+ if((position & SPI_PULLUP_1_INTR) != 0u)
+ {
+ SPI_PULLUP_1_INTTYPE_REG = (uint8)mode;
+ }
+ if((position & SPI_PULLUP_2_INTR) != 0u)
+ {
+ SPI_PULLUP_2_INTTYPE_REG = (uint8)mode;
+ }
+ if((position & SPI_PULLUP_3_INTR) != 0u)
+ {
+ SPI_PULLUP_3_INTTYPE_REG = (uint8)mode;
+ }
+ }
+
+
/*******************************************************************************
* Function Name: SPI_PULLUP_ClearInterrupt
- ********************************************************************************
- * Summary:
- * Clears any active interrupts attached to port and returns the value of the
- * interrupt status register.
+ ****************************************************************************//**
*
- * Parameters:
- * None
+ * \brief Clears any active interrupts attached with the component and returns
+ * the value of the interrupt status register allowing determination of which
+ * pins generated an interrupt event.
*
- * Return:
- * Returns the value of the interrupt status register
+ * \return
+ * The right-shifted current value of the interrupt status register. Each pin
+ * has one bit set if it generated an interrupt event. For example, bit 0 is
+ * for pin 0 and bit 1 is for pin 1 of the Pins component.
*
+ * \sideeffect
+ * Clears all bits of the physical port's interrupt status register, not just
+ * those associated with the Pins component.
+ *
+ * \funcusage
+ * \snippet SPI_PULLUP_SUT.c usage_SPI_PULLUP_ClearInterrupt
*******************************************************************************/
- uint8 SPI_PULLUP_ClearInterrupt(void)
+ uint8 SPI_PULLUP_ClearInterrupt(void)
{
return (SPI_PULLUP_INTSTAT & SPI_PULLUP_MASK) >> SPI_PULLUP_SHIFT;
}
/*******************************************************************************
* File Name: SPI_PULLUP.h
-* Version 2.10
+* Version 2.20
*
* Description:
-* This file containts Control Register function prototypes and register defines
+* This file contains Pin function prototypes and register defines
*
* Note:
*
********************************************************************************
-* Copyright 2008-2014, Cypress Semiconductor Corporation. All rights reserved.
+* Copyright 2008-2015, Cypress Semiconductor Corporation. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
#include "cypins.h"
#include "SPI_PULLUP_aliases.h"
-/* Check to see if required defines such as CY_PSOC5A are available */
-/* They are defined starting with cy_boot v3.0 */
-#if !defined (CY_PSOC5A)
- #error Component cy_pins_v2_10 requires cy_boot v3.0 or later
-#endif /* (CY_PSOC5A) */
-
/* APIs are not generated for P15[7:6] */
#if !(CY_PSOC5A &&\
SPI_PULLUP__PORT == 15 && ((SPI_PULLUP__MASK & 0xC0) != 0))
* Function Prototypes
***************************************/
-void SPI_PULLUP_Write(uint8 value) ;
-void SPI_PULLUP_SetDriveMode(uint8 mode) ;
-uint8 SPI_PULLUP_ReadDataReg(void) ;
-uint8 SPI_PULLUP_Read(void) ;
-uint8 SPI_PULLUP_ClearInterrupt(void) ;
-
+/**
+* \addtogroup group_general
+* @{
+*/
+void SPI_PULLUP_Write(uint8 value);
+void SPI_PULLUP_SetDriveMode(uint8 mode);
+uint8 SPI_PULLUP_ReadDataReg(void);
+uint8 SPI_PULLUP_Read(void);
+void SPI_PULLUP_SetInterruptMode(uint16 position, uint16 mode);
+uint8 SPI_PULLUP_ClearInterrupt(void);
+/** @} general */
/***************************************
* API Constants
***************************************/
-
-/* Drive Modes */
-#define SPI_PULLUP_DM_ALG_HIZ PIN_DM_ALG_HIZ
-#define SPI_PULLUP_DM_DIG_HIZ PIN_DM_DIG_HIZ
-#define SPI_PULLUP_DM_RES_UP PIN_DM_RES_UP
-#define SPI_PULLUP_DM_RES_DWN PIN_DM_RES_DWN
-#define SPI_PULLUP_DM_OD_LO PIN_DM_OD_LO
-#define SPI_PULLUP_DM_OD_HI PIN_DM_OD_HI
-#define SPI_PULLUP_DM_STRONG PIN_DM_STRONG
-#define SPI_PULLUP_DM_RES_UPDWN PIN_DM_RES_UPDWN
-
+/**
+* \addtogroup group_constants
+* @{
+*/
+ /** \addtogroup driveMode Drive mode constants
+ * \brief Constants to be passed as "mode" parameter in the SPI_PULLUP_SetDriveMode() function.
+ * @{
+ */
+ #define SPI_PULLUP_DM_ALG_HIZ PIN_DM_ALG_HIZ
+ #define SPI_PULLUP_DM_DIG_HIZ PIN_DM_DIG_HIZ
+ #define SPI_PULLUP_DM_RES_UP PIN_DM_RES_UP
+ #define SPI_PULLUP_DM_RES_DWN PIN_DM_RES_DWN
+ #define SPI_PULLUP_DM_OD_LO PIN_DM_OD_LO
+ #define SPI_PULLUP_DM_OD_HI PIN_DM_OD_HI
+ #define SPI_PULLUP_DM_STRONG PIN_DM_STRONG
+ #define SPI_PULLUP_DM_RES_UPDWN PIN_DM_RES_UPDWN
+ /** @} driveMode */
+/** @} group_constants */
+
/* Digital Port Constants */
#define SPI_PULLUP_MASK SPI_PULLUP__MASK
#define SPI_PULLUP_SHIFT SPI_PULLUP__SHIFT
#define SPI_PULLUP_WIDTH 4u
+/* Interrupt constants */
+#if defined(SPI_PULLUP__INTSTAT)
+/**
+* \addtogroup group_constants
+* @{
+*/
+ /** \addtogroup intrMode Interrupt constants
+ * \brief Constants to be passed as "mode" parameter in SPI_PULLUP_SetInterruptMode() function.
+ * @{
+ */
+ #define SPI_PULLUP_INTR_NONE (uint16)(0x0000u)
+ #define SPI_PULLUP_INTR_RISING (uint16)(0x0001u)
+ #define SPI_PULLUP_INTR_FALLING (uint16)(0x0002u)
+ #define SPI_PULLUP_INTR_BOTH (uint16)(0x0003u)
+ /** @} intrMode */
+/** @} group_constants */
+
+ #define SPI_PULLUP_INTR_MASK (0x01u)
+#endif /* (SPI_PULLUP__INTSTAT) */
+
/***************************************
* Registers
/* Sync Output Enable Registers */
#define SPI_PULLUP_PRTDSI__SYNC_OUT (* (reg8 *) SPI_PULLUP__PRTDSI__SYNC_OUT)
-
-#if defined(SPI_PULLUP__INTSTAT) /* Interrupt Registers */
-
- #define SPI_PULLUP_INTSTAT (* (reg8 *) SPI_PULLUP__INTSTAT)
- #define SPI_PULLUP_SNAP (* (reg8 *) SPI_PULLUP__SNAP)
-
-#endif /* Interrupt Registers */
+/* SIO registers */
+#if defined(SPI_PULLUP__SIO_CFG)
+ #define SPI_PULLUP_SIO_HYST_EN (* (reg8 *) SPI_PULLUP__SIO_HYST_EN)
+ #define SPI_PULLUP_SIO_REG_HIFREQ (* (reg8 *) SPI_PULLUP__SIO_REG_HIFREQ)
+ #define SPI_PULLUP_SIO_CFG (* (reg8 *) SPI_PULLUP__SIO_CFG)
+ #define SPI_PULLUP_SIO_DIFF (* (reg8 *) SPI_PULLUP__SIO_DIFF)
+#endif /* (SPI_PULLUP__SIO_CFG) */
+
+/* Interrupt Registers */
+#if defined(SPI_PULLUP__INTSTAT)
+ #define SPI_PULLUP_INTSTAT (* (reg8 *) SPI_PULLUP__INTSTAT)
+ #define SPI_PULLUP_SNAP (* (reg8 *) SPI_PULLUP__SNAP)
+
+ #define SPI_PULLUP_0_INTTYPE_REG (* (reg8 *) SPI_PULLUP__0__INTTYPE)
+ #define SPI_PULLUP_1_INTTYPE_REG (* (reg8 *) SPI_PULLUP__1__INTTYPE)
+ #define SPI_PULLUP_2_INTTYPE_REG (* (reg8 *) SPI_PULLUP__2__INTTYPE)
+ #define SPI_PULLUP_3_INTTYPE_REG (* (reg8 *) SPI_PULLUP__3__INTTYPE)
+#endif /* (SPI_PULLUP__INTSTAT) */
#endif /* CY_PSOC5A... */
/*******************************************************************************
* File Name: SPI_PULLUP_1.c
-* Version 2.10
+* Version 2.20
*
* Description:
* This file contains API to enable firmware control of a Pins component.
* Note:
*
********************************************************************************
-* Copyright 2008-2014, Cypress Semiconductor Corporation. All rights reserved.
+* Copyright 2008-2015, Cypress Semiconductor Corporation. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
/*******************************************************************************
* Function Name: SPI_PULLUP_1_Write
-********************************************************************************
+****************************************************************************//**
*
-* Summary:
-* Assign a new value to the digital port's data output register.
+* \brief Writes the value to the physical port (data output register), masking
+* and shifting the bits appropriately.
*
-* Parameters:
-* prtValue: The value to be assigned to the Digital Port.
+* The data output register controls the signal applied to the physical pin in
+* conjunction with the drive mode parameter. This function avoids changing
+* other bits in the port by using the appropriate method (read-modify-write or
+* bit banding).
*
-* Return:
-* None
-*
+* <b>Note</b> This function should not be used on a hardware digital output pin
+* as it is driven by the hardware signal attached to it.
+*
+* \param value
+* Value to write to the component instance.
+*
+* \return
+* None
+*
+* \sideeffect
+* If you use read-modify-write operations that are not atomic; the Interrupt
+* Service Routines (ISR) can cause corruption of this function. An ISR that
+* interrupts this function and performs writes to the Pins component data
+* register can cause corrupted port data. To avoid this issue, you should
+* either use the Per-Pin APIs (primary method) or disable interrupts around
+* this function.
+*
+* \funcusage
+* \snippet SPI_PULLUP_1_SUT.c usage_SPI_PULLUP_1_Write
*******************************************************************************/
-void SPI_PULLUP_1_Write(uint8 value)
+void SPI_PULLUP_1_Write(uint8 value)
{
uint8 staticBits = (SPI_PULLUP_1_DR & (uint8)(~SPI_PULLUP_1_MASK));
SPI_PULLUP_1_DR = staticBits | ((uint8)(value << SPI_PULLUP_1_SHIFT) & SPI_PULLUP_1_MASK);
/*******************************************************************************
* Function Name: SPI_PULLUP_1_SetDriveMode
-********************************************************************************
+****************************************************************************//**
*
-* Summary:
-* Change the drive mode on the pins of the port.
+* \brief Sets the drive mode for each of the Pins component's pins.
*
-* Parameters:
-* mode: Change the pins to one of the following drive modes.
-*
-* SPI_PULLUP_1_DM_STRONG Strong Drive
-* SPI_PULLUP_1_DM_OD_HI Open Drain, Drives High
-* SPI_PULLUP_1_DM_OD_LO Open Drain, Drives Low
-* SPI_PULLUP_1_DM_RES_UP Resistive Pull Up
-* SPI_PULLUP_1_DM_RES_DWN Resistive Pull Down
-* SPI_PULLUP_1_DM_RES_UPDWN Resistive Pull Up/Down
-* SPI_PULLUP_1_DM_DIG_HIZ High Impedance Digital
-* SPI_PULLUP_1_DM_ALG_HIZ High Impedance Analog
-*
-* Return:
+* <b>Note</b> This affects all pins in the Pins component instance. Use the
+* Per-Pin APIs if you wish to control individual pin's drive modes.
+*
+* \param mode
+* Mode for the selected signals. Valid options are documented in
+* \ref driveMode.
+*
+* \return
* None
*
+* \sideeffect
+* If you use read-modify-write operations that are not atomic, the ISR can
+* cause corruption of this function. An ISR that interrupts this function
+* and performs writes to the Pins component Drive Mode registers can cause
+* corrupted port data. To avoid this issue, you should either use the Per-Pin
+* APIs (primary method) or disable interrupts around this function.
+*
+* \funcusage
+* \snippet SPI_PULLUP_1_SUT.c usage_SPI_PULLUP_1_SetDriveMode
*******************************************************************************/
-void SPI_PULLUP_1_SetDriveMode(uint8 mode)
+void SPI_PULLUP_1_SetDriveMode(uint8 mode)
{
CyPins_SetPinDriveMode(SPI_PULLUP_1_0, mode);
CyPins_SetPinDriveMode(SPI_PULLUP_1_1, mode);
/*******************************************************************************
* Function Name: SPI_PULLUP_1_Read
-********************************************************************************
+****************************************************************************//**
*
-* Summary:
-* Read the current value on the pins of the Digital Port in right justified
-* form.
+* \brief Reads the associated physical port (pin status register) and masks
+* the required bits according to the width and bit position of the component
+* instance.
*
-* Parameters:
-* None
+* The pin's status register returns the current logic level present on the
+* physical pin.
*
-* Return:
-* Returns the current value of the Digital Port as a right justified number
-*
-* Note:
-* Macro SPI_PULLUP_1_ReadPS calls this function.
-*
+* \return
+* The current value for the pins in the component as a right justified number.
+*
+* \funcusage
+* \snippet SPI_PULLUP_1_SUT.c usage_SPI_PULLUP_1_Read
*******************************************************************************/
-uint8 SPI_PULLUP_1_Read(void)
+uint8 SPI_PULLUP_1_Read(void)
{
return (SPI_PULLUP_1_PS & SPI_PULLUP_1_MASK) >> SPI_PULLUP_1_SHIFT;
}
/*******************************************************************************
* Function Name: SPI_PULLUP_1_ReadDataReg
-********************************************************************************
+****************************************************************************//**
*
-* Summary:
-* Read the current value assigned to a Digital Port's data output register
+* \brief Reads the associated physical port's data output register and masks
+* the correct bits according to the width and bit position of the component
+* instance.
*
-* Parameters:
-* None
+* The data output register controls the signal applied to the physical pin in
+* conjunction with the drive mode parameter. This is not the same as the
+* preferred SPI_PULLUP_1_Read() API because the
+* SPI_PULLUP_1_ReadDataReg() reads the data register instead of the status
+* register. For output pins this is a useful function to determine the value
+* just written to the pin.
+*
+* \return
+* The current value of the data register masked and shifted into a right
+* justified number for the component instance.
*
-* Return:
-* Returns the current value assigned to the Digital Port's data output register
-*
+* \funcusage
+* \snippet SPI_PULLUP_1_SUT.c usage_SPI_PULLUP_1_ReadDataReg
*******************************************************************************/
-uint8 SPI_PULLUP_1_ReadDataReg(void)
+uint8 SPI_PULLUP_1_ReadDataReg(void)
{
return (SPI_PULLUP_1_DR & SPI_PULLUP_1_MASK) >> SPI_PULLUP_1_SHIFT;
}
-/* If Interrupts Are Enabled for this Pins component */
+/* If interrupt is connected for this Pins component */
#if defined(SPI_PULLUP_1_INTSTAT)
+ /*******************************************************************************
+ * Function Name: SPI_PULLUP_1_SetInterruptMode
+ ****************************************************************************//**
+ *
+ * \brief Configures the interrupt mode for each of the Pins component's
+ * pins. Alternatively you may set the interrupt mode for all the pins
+ * specified in the Pins component.
+ *
+ * <b>Note</b> The interrupt is port-wide and therefore any enabled pin
+ * interrupt may trigger it.
+ *
+ * \param position
+ * The pin position as listed in the Pins component. You may OR these to be
+ * able to configure the interrupt mode of multiple pins within a Pins
+ * component. Or you may use SPI_PULLUP_1_INTR_ALL to configure the
+ * interrupt mode of all the pins in the Pins component.
+ * - SPI_PULLUP_1_0_INTR (First pin in the list)
+ * - SPI_PULLUP_1_1_INTR (Second pin in the list)
+ * - ...
+ * - SPI_PULLUP_1_INTR_ALL (All pins in Pins component)
+ *
+ * \param mode
+ * Interrupt mode for the selected pins. Valid options are documented in
+ * \ref intrMode.
+ *
+ * \return
+ * None
+ *
+ * \sideeffect
+ * It is recommended that the interrupt be disabled before calling this
+ * function to avoid unintended interrupt requests. Note that the interrupt
+ * type is port wide, and therefore will trigger for any enabled pin on the
+ * port.
+ *
+ * \funcusage
+ * \snippet SPI_PULLUP_1_SUT.c usage_SPI_PULLUP_1_SetInterruptMode
+ *******************************************************************************/
+ void SPI_PULLUP_1_SetInterruptMode(uint16 position, uint16 mode)
+ {
+ if((position & SPI_PULLUP_1_0_INTR) != 0u)
+ {
+ SPI_PULLUP_1_0_INTTYPE_REG = (uint8)mode;
+ }
+ if((position & SPI_PULLUP_1_1_INTR) != 0u)
+ {
+ SPI_PULLUP_1_1_INTTYPE_REG = (uint8)mode;
+ }
+ }
+
+
/*******************************************************************************
* Function Name: SPI_PULLUP_1_ClearInterrupt
- ********************************************************************************
- * Summary:
- * Clears any active interrupts attached to port and returns the value of the
- * interrupt status register.
+ ****************************************************************************//**
*
- * Parameters:
- * None
+ * \brief Clears any active interrupts attached with the component and returns
+ * the value of the interrupt status register allowing determination of which
+ * pins generated an interrupt event.
*
- * Return:
- * Returns the value of the interrupt status register
+ * \return
+ * The right-shifted current value of the interrupt status register. Each pin
+ * has one bit set if it generated an interrupt event. For example, bit 0 is
+ * for pin 0 and bit 1 is for pin 1 of the Pins component.
*
+ * \sideeffect
+ * Clears all bits of the physical port's interrupt status register, not just
+ * those associated with the Pins component.
+ *
+ * \funcusage
+ * \snippet SPI_PULLUP_1_SUT.c usage_SPI_PULLUP_1_ClearInterrupt
*******************************************************************************/
- uint8 SPI_PULLUP_1_ClearInterrupt(void)
+ uint8 SPI_PULLUP_1_ClearInterrupt(void)
{
return (SPI_PULLUP_1_INTSTAT & SPI_PULLUP_1_MASK) >> SPI_PULLUP_1_SHIFT;
}
/*******************************************************************************
* File Name: SPI_PULLUP_1.h
-* Version 2.10
+* Version 2.20
*
* Description:
-* This file containts Control Register function prototypes and register defines
+* This file contains Pin function prototypes and register defines
*
* Note:
*
********************************************************************************
-* Copyright 2008-2014, Cypress Semiconductor Corporation. All rights reserved.
+* Copyright 2008-2015, Cypress Semiconductor Corporation. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
#include "cypins.h"
#include "SPI_PULLUP_1_aliases.h"
-/* Check to see if required defines such as CY_PSOC5A are available */
-/* They are defined starting with cy_boot v3.0 */
-#if !defined (CY_PSOC5A)
- #error Component cy_pins_v2_10 requires cy_boot v3.0 or later
-#endif /* (CY_PSOC5A) */
-
/* APIs are not generated for P15[7:6] */
#if !(CY_PSOC5A &&\
SPI_PULLUP_1__PORT == 15 && ((SPI_PULLUP_1__MASK & 0xC0) != 0))
* Function Prototypes
***************************************/
-void SPI_PULLUP_1_Write(uint8 value) ;
-void SPI_PULLUP_1_SetDriveMode(uint8 mode) ;
-uint8 SPI_PULLUP_1_ReadDataReg(void) ;
-uint8 SPI_PULLUP_1_Read(void) ;
-uint8 SPI_PULLUP_1_ClearInterrupt(void) ;
-
+/**
+* \addtogroup group_general
+* @{
+*/
+void SPI_PULLUP_1_Write(uint8 value);
+void SPI_PULLUP_1_SetDriveMode(uint8 mode);
+uint8 SPI_PULLUP_1_ReadDataReg(void);
+uint8 SPI_PULLUP_1_Read(void);
+void SPI_PULLUP_1_SetInterruptMode(uint16 position, uint16 mode);
+uint8 SPI_PULLUP_1_ClearInterrupt(void);
+/** @} general */
/***************************************
* API Constants
***************************************/
-
-/* Drive Modes */
-#define SPI_PULLUP_1_DM_ALG_HIZ PIN_DM_ALG_HIZ
-#define SPI_PULLUP_1_DM_DIG_HIZ PIN_DM_DIG_HIZ
-#define SPI_PULLUP_1_DM_RES_UP PIN_DM_RES_UP
-#define SPI_PULLUP_1_DM_RES_DWN PIN_DM_RES_DWN
-#define SPI_PULLUP_1_DM_OD_LO PIN_DM_OD_LO
-#define SPI_PULLUP_1_DM_OD_HI PIN_DM_OD_HI
-#define SPI_PULLUP_1_DM_STRONG PIN_DM_STRONG
-#define SPI_PULLUP_1_DM_RES_UPDWN PIN_DM_RES_UPDWN
-
+/**
+* \addtogroup group_constants
+* @{
+*/
+ /** \addtogroup driveMode Drive mode constants
+ * \brief Constants to be passed as "mode" parameter in the SPI_PULLUP_1_SetDriveMode() function.
+ * @{
+ */
+ #define SPI_PULLUP_1_DM_ALG_HIZ PIN_DM_ALG_HIZ
+ #define SPI_PULLUP_1_DM_DIG_HIZ PIN_DM_DIG_HIZ
+ #define SPI_PULLUP_1_DM_RES_UP PIN_DM_RES_UP
+ #define SPI_PULLUP_1_DM_RES_DWN PIN_DM_RES_DWN
+ #define SPI_PULLUP_1_DM_OD_LO PIN_DM_OD_LO
+ #define SPI_PULLUP_1_DM_OD_HI PIN_DM_OD_HI
+ #define SPI_PULLUP_1_DM_STRONG PIN_DM_STRONG
+ #define SPI_PULLUP_1_DM_RES_UPDWN PIN_DM_RES_UPDWN
+ /** @} driveMode */
+/** @} group_constants */
+
/* Digital Port Constants */
#define SPI_PULLUP_1_MASK SPI_PULLUP_1__MASK
#define SPI_PULLUP_1_SHIFT SPI_PULLUP_1__SHIFT
#define SPI_PULLUP_1_WIDTH 2u
+/* Interrupt constants */
+#if defined(SPI_PULLUP_1__INTSTAT)
+/**
+* \addtogroup group_constants
+* @{
+*/
+ /** \addtogroup intrMode Interrupt constants
+ * \brief Constants to be passed as "mode" parameter in SPI_PULLUP_1_SetInterruptMode() function.
+ * @{
+ */
+ #define SPI_PULLUP_1_INTR_NONE (uint16)(0x0000u)
+ #define SPI_PULLUP_1_INTR_RISING (uint16)(0x0001u)
+ #define SPI_PULLUP_1_INTR_FALLING (uint16)(0x0002u)
+ #define SPI_PULLUP_1_INTR_BOTH (uint16)(0x0003u)
+ /** @} intrMode */
+/** @} group_constants */
+
+ #define SPI_PULLUP_1_INTR_MASK (0x01u)
+#endif /* (SPI_PULLUP_1__INTSTAT) */
+
/***************************************
* Registers
/* Sync Output Enable Registers */
#define SPI_PULLUP_1_PRTDSI__SYNC_OUT (* (reg8 *) SPI_PULLUP_1__PRTDSI__SYNC_OUT)
-
-#if defined(SPI_PULLUP_1__INTSTAT) /* Interrupt Registers */
-
- #define SPI_PULLUP_1_INTSTAT (* (reg8 *) SPI_PULLUP_1__INTSTAT)
- #define SPI_PULLUP_1_SNAP (* (reg8 *) SPI_PULLUP_1__SNAP)
-
-#endif /* Interrupt Registers */
+/* SIO registers */
+#if defined(SPI_PULLUP_1__SIO_CFG)
+ #define SPI_PULLUP_1_SIO_HYST_EN (* (reg8 *) SPI_PULLUP_1__SIO_HYST_EN)
+ #define SPI_PULLUP_1_SIO_REG_HIFREQ (* (reg8 *) SPI_PULLUP_1__SIO_REG_HIFREQ)
+ #define SPI_PULLUP_1_SIO_CFG (* (reg8 *) SPI_PULLUP_1__SIO_CFG)
+ #define SPI_PULLUP_1_SIO_DIFF (* (reg8 *) SPI_PULLUP_1__SIO_DIFF)
+#endif /* (SPI_PULLUP_1__SIO_CFG) */
+
+/* Interrupt Registers */
+#if defined(SPI_PULLUP_1__INTSTAT)
+ #define SPI_PULLUP_1_INTSTAT (* (reg8 *) SPI_PULLUP_1__INTSTAT)
+ #define SPI_PULLUP_1_SNAP (* (reg8 *) SPI_PULLUP_1__SNAP)
+
+ #define SPI_PULLUP_1_0_INTTYPE_REG (* (reg8 *) SPI_PULLUP_1__0__INTTYPE)
+ #define SPI_PULLUP_1_1_INTTYPE_REG (* (reg8 *) SPI_PULLUP_1__1__INTTYPE)
+#endif /* (SPI_PULLUP_1__INTSTAT) */
#endif /* CY_PSOC5A... */
/*******************************************************************************
* File Name: SPI_PULLUP_1.h
-* Version 2.10
+* Version 2.20
*
* Description:
-* This file containts Control Register function prototypes and register defines
+* This file contains the Alias definitions for Per-Pin APIs in cypins.h.
+* Information on using these APIs can be found in the System Reference Guide.
*
* Note:
*
********************************************************************************
-* Copyright 2008-2014, Cypress Semiconductor Corporation. All rights reserved.
+* Copyright 2008-2015, Cypress Semiconductor Corporation. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
#include "cyfitter.h"
-
/***************************************
* Constants
***************************************/
-#define SPI_PULLUP_1_0 (SPI_PULLUP_1__0__PC)
-#define SPI_PULLUP_1_1 (SPI_PULLUP_1__1__PC)
+#define SPI_PULLUP_1_0 (SPI_PULLUP_1__0__PC)
+#define SPI_PULLUP_1_0_INTR ((uint16)((uint16)0x0001u << SPI_PULLUP_1__0__SHIFT))
+
+#define SPI_PULLUP_1_1 (SPI_PULLUP_1__1__PC)
+#define SPI_PULLUP_1_1_INTR ((uint16)((uint16)0x0001u << SPI_PULLUP_1__1__SHIFT))
+
+#define SPI_PULLUP_1_INTR_ALL ((uint16)(SPI_PULLUP_1_0_INTR| SPI_PULLUP_1_1_INTR))
#endif /* End Pins SPI_PULLUP_1_ALIASES_H */
+
/* [] END OF FILE */
/*******************************************************************************
* File Name: SPI_PULLUP.h
-* Version 2.10
+* Version 2.20
*
* Description:
-* This file containts Control Register function prototypes and register defines
+* This file contains the Alias definitions for Per-Pin APIs in cypins.h.
+* Information on using these APIs can be found in the System Reference Guide.
*
* Note:
*
********************************************************************************
-* Copyright 2008-2014, Cypress Semiconductor Corporation. All rights reserved.
+* Copyright 2008-2015, Cypress Semiconductor Corporation. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
#include "cyfitter.h"
-
/***************************************
* Constants
***************************************/
-#define SPI_PULLUP_0 (SPI_PULLUP__0__PC)
-#define SPI_PULLUP_1 (SPI_PULLUP__1__PC)
-#define SPI_PULLUP_2 (SPI_PULLUP__2__PC)
-#define SPI_PULLUP_3 (SPI_PULLUP__3__PC)
+#define SPI_PULLUP_0 (SPI_PULLUP__0__PC)
+#define SPI_PULLUP_0_INTR ((uint16)((uint16)0x0001u << SPI_PULLUP__0__SHIFT))
+
+#define SPI_PULLUP_1 (SPI_PULLUP__1__PC)
+#define SPI_PULLUP_1_INTR ((uint16)((uint16)0x0001u << SPI_PULLUP__1__SHIFT))
+
+#define SPI_PULLUP_2 (SPI_PULLUP__2__PC)
+#define SPI_PULLUP_2_INTR ((uint16)((uint16)0x0001u << SPI_PULLUP__2__SHIFT))
+
+#define SPI_PULLUP_3 (SPI_PULLUP__3__PC)
+#define SPI_PULLUP_3_INTR ((uint16)((uint16)0x0001u << SPI_PULLUP__3__SHIFT))
+
+#define SPI_PULLUP_INTR_ALL ((uint16)(SPI_PULLUP_0_INTR| SPI_PULLUP_1_INTR| SPI_PULLUP_2_INTR| SPI_PULLUP_3_INTR))
#endif /* End Pins SPI_PULLUP_ALIASES_H */
+
/* [] END OF FILE */
/*******************************************************************************
* File Name: cydevice.h
* OBSOLETE: Do not use this file. Use the _trm version instead.
-* PSoC Creator 4.2
+* PSoC Creator 4.4
*
* Description:
* This file provides all of the address values for the entire PSoC device.
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
-* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
+* Copyright (c) 2007-2020 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
/*******************************************************************************
* File Name: cydevice_trm.h
*
-* PSoC Creator 4.2
+* PSoC Creator 4.4
*
* Description:
* This file provides all of the address values for the entire PSoC device.
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
-* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
+* Copyright (c) 2007-2020 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
/*******************************************************************************
* File Name: cydevicegnu.inc
* OBSOLETE: Do not use this file. Use the _trm version instead.
-* PSoC Creator 4.2
+* PSoC Creator 4.4
*
* Description:
* This file provides all of the address values for the entire PSoC device.
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
-* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
+* Copyright (c) 2007-2020 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
/*******************************************************************************
* File Name: cydevicegnu_trm.inc
*
-* PSoC Creator 4.2
+* PSoC Creator 4.4
*
* Description:
* This file provides all of the address values for the entire PSoC device.
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
-* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
+* Copyright (c) 2007-2020 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
;
; File Name: cydeviceiar.inc
; OBSOLETE: Do not use this file. Use the _trm version instead.
-; PSoC Creator 4.2
+; PSoC Creator 4.4
;
; Description:
; This file provides all of the address values for the entire PSoC device.
;
;-------------------------------------------------------------------------------
-; Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
+; Copyright (c) 2007-2020 Cypress Semiconductor. All rights reserved.
; You may use this file only in accordance with the license, terms, conditions,
; disclaimers, and limitations in the end user license agreement accompanying
; the software package with which this file was provided.
;
; File Name: cydeviceiar_trm.inc
;
-; PSoC Creator 4.2
+; PSoC Creator 4.4
;
; Description:
; This file provides all of the address values for the entire PSoC device.
;
;-------------------------------------------------------------------------------
-; Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
+; Copyright (c) 2007-2020 Cypress Semiconductor. All rights reserved.
; You may use this file only in accordance with the license, terms, conditions,
; disclaimers, and limitations in the end user license agreement accompanying
; the software package with which this file was provided.
;
; File Name: cydevicerv.inc
; OBSOLETE: Do not use this file. Use the _trm version instead.
-; PSoC Creator 4.2
+; PSoC Creator 4.4
;
; Description:
; This file provides all of the address values for the entire PSoC device.
;
;-------------------------------------------------------------------------------
-; Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
+; Copyright (c) 2007-2020 Cypress Semiconductor. All rights reserved.
; You may use this file only in accordance with the license, terms, conditions,
; disclaimers, and limitations in the end user license agreement accompanying
; the software package with which this file was provided.
;
; File Name: cydevicerv_trm.inc
;
-; PSoC Creator 4.2
+; PSoC Creator 4.4
;
; Description:
; This file provides all of the address values for the entire PSoC device.
;
;-------------------------------------------------------------------------------
-; Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
+; Copyright (c) 2007-2020 Cypress Semiconductor. All rights reserved.
; You may use this file only in accordance with the license, terms, conditions,
; disclaimers, and limitations in the end user license agreement accompanying
; the software package with which this file was provided.
/*******************************************************************************
* File Name: cyfitter.h
*
-* PSoC Creator 4.2
+* PSoC Creator 4.4
*
* Description:
*
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
-* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
+* Copyright (c) 2007-2020 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
#define BCLK__BUS_CLK__KHZ 64000U
#define BCLK__BUS_CLK__MHZ 64U
#define CY_PROJECT_NAME "USB_Bootloader"
-#define CY_VERSION "PSoC Creator 4.2"
+#define CY_VERSION "PSoC Creator 4.4"
#define CYDEV_BOOTLOADER_APPLICATIONS 1u
#define CYDEV_BOOTLOADER_CHECKSUM_BASIC 0
#define CYDEV_BOOTLOADER_CHECKSUM_CRC 1
#define CyBtldr_USBFS CYDEV_BOOTLOADER_IO_COMP_USBFS
#define CYDEV_BOOTLOADER_IO_COMP CYDEV_BOOTLOADER_IO_COMP_USBFS
#define CYDEV_CHIP_DIE_LEOPARD 1u
-#define CYDEV_CHIP_DIE_PSOC4A 18u
+#define CYDEV_CHIP_DIE_PSOC4A 26u
#define CYDEV_CHIP_DIE_PSOC5LP 2u
#define CYDEV_CHIP_DIE_PSOC5TM 3u
#define CYDEV_CHIP_DIE_TMA4 4u
#define CYDEV_CHIP_FAMILY_USED CYDEV_CHIP_FAMILY_PSOC5
#define CYDEV_CHIP_JTAG_ID 0x2E133069u
#define CYDEV_CHIP_MEMBER_3A 1u
-#define CYDEV_CHIP_MEMBER_4A 18u
-#define CYDEV_CHIP_MEMBER_4D 13u
+#define CYDEV_CHIP_MEMBER_4A 26u
+#define CYDEV_CHIP_MEMBER_4AA 25u
+#define CYDEV_CHIP_MEMBER_4AB 30u
+#define CYDEV_CHIP_MEMBER_4AC 14u
+#define CYDEV_CHIP_MEMBER_4AD 15u
+#define CYDEV_CHIP_MEMBER_4AE 16u
+#define CYDEV_CHIP_MEMBER_4D 20u
#define CYDEV_CHIP_MEMBER_4E 6u
-#define CYDEV_CHIP_MEMBER_4F 19u
+#define CYDEV_CHIP_MEMBER_4F 27u
#define CYDEV_CHIP_MEMBER_4G 4u
-#define CYDEV_CHIP_MEMBER_4H 17u
-#define CYDEV_CHIP_MEMBER_4I 23u
-#define CYDEV_CHIP_MEMBER_4J 14u
-#define CYDEV_CHIP_MEMBER_4K 15u
-#define CYDEV_CHIP_MEMBER_4L 22u
-#define CYDEV_CHIP_MEMBER_4M 21u
-#define CYDEV_CHIP_MEMBER_4N 10u
-#define CYDEV_CHIP_MEMBER_4O 7u
-#define CYDEV_CHIP_MEMBER_4P 20u
-#define CYDEV_CHIP_MEMBER_4Q 12u
-#define CYDEV_CHIP_MEMBER_4R 8u
-#define CYDEV_CHIP_MEMBER_4S 11u
-#define CYDEV_CHIP_MEMBER_4T 9u
+#define CYDEV_CHIP_MEMBER_4H 24u
+#define CYDEV_CHIP_MEMBER_4I 32u
+#define CYDEV_CHIP_MEMBER_4J 21u
+#define CYDEV_CHIP_MEMBER_4K 22u
+#define CYDEV_CHIP_MEMBER_4L 31u
+#define CYDEV_CHIP_MEMBER_4M 29u
+#define CYDEV_CHIP_MEMBER_4N 11u
+#define CYDEV_CHIP_MEMBER_4O 8u
+#define CYDEV_CHIP_MEMBER_4P 28u
+#define CYDEV_CHIP_MEMBER_4Q 17u
+#define CYDEV_CHIP_MEMBER_4R 9u
+#define CYDEV_CHIP_MEMBER_4S 12u
+#define CYDEV_CHIP_MEMBER_4T 10u
#define CYDEV_CHIP_MEMBER_4U 5u
-#define CYDEV_CHIP_MEMBER_4V 16u
+#define CYDEV_CHIP_MEMBER_4V 23u
+#define CYDEV_CHIP_MEMBER_4W 13u
+#define CYDEV_CHIP_MEMBER_4X 7u
+#define CYDEV_CHIP_MEMBER_4Y 18u
+#define CYDEV_CHIP_MEMBER_4Z 19u
#define CYDEV_CHIP_MEMBER_5A 3u
#define CYDEV_CHIP_MEMBER_5B 2u
-#define CYDEV_CHIP_MEMBER_6A 24u
-#define CYDEV_CHIP_MEMBER_FM3 28u
-#define CYDEV_CHIP_MEMBER_FM4 29u
-#define CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE1 25u
-#define CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE2 26u
-#define CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE3 27u
+#define CYDEV_CHIP_MEMBER_6A 33u
+#define CYDEV_CHIP_MEMBER_FM3 37u
+#define CYDEV_CHIP_MEMBER_FM4 38u
+#define CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE1 34u
+#define CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE2 35u
+#define CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE3 36u
#define CYDEV_CHIP_MEMBER_UNKNOWN 0u
#define CYDEV_CHIP_MEMBER_USED CYDEV_CHIP_MEMBER_5B
#define CYDEV_CHIP_DIE_EXPECT CYDEV_CHIP_MEMBER_USED
#define CYDEV_CHIP_REVISION_3A_PRODUCTION 3u
#define CYDEV_CHIP_REVISION_4A_ES0 17u
#define CYDEV_CHIP_REVISION_4A_PRODUCTION 17u
+#define CYDEV_CHIP_REVISION_4AA_PRODUCTION 0u
+#define CYDEV_CHIP_REVISION_4AB_PRODUCTION 0u
+#define CYDEV_CHIP_REVISION_4AC_PRODUCTION 0u
+#define CYDEV_CHIP_REVISION_4AD_PRODUCTION 0u
+#define CYDEV_CHIP_REVISION_4AE_PRODUCTION 0u
#define CYDEV_CHIP_REVISION_4D_PRODUCTION 0u
#define CYDEV_CHIP_REVISION_4E_CCG2_NO_USBPD 0u
#define CYDEV_CHIP_REVISION_4E_PRODUCTION 0u
#define CYDEV_CHIP_REVISION_4T_PRODUCTION 0u
#define CYDEV_CHIP_REVISION_4U_PRODUCTION 0u
#define CYDEV_CHIP_REVISION_4V_PRODUCTION 0u
+#define CYDEV_CHIP_REVISION_4W_PRODUCTION 0u
+#define CYDEV_CHIP_REVISION_4X_PRODUCTION 0u
+#define CYDEV_CHIP_REVISION_4Y_PRODUCTION 0u
+#define CYDEV_CHIP_REVISION_4Z_PRODUCTION 0u
#define CYDEV_CHIP_REVISION_5A_ES0 0u
#define CYDEV_CHIP_REVISION_5A_ES1 1u
#define CYDEV_CHIP_REVISION_5A_PRODUCTION 1u
/*******************************************************************************
* File Name: cyfitter_cfg.c
*
-* PSoC Creator 4.2
+* PSoC Creator 4.4
*
* Description:
* This file contains device initialization code.
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
-* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
+* Copyright (c) 2007-2020 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
/*******************************************************************************
* File Name: cyfitter_cfg.h
*
-* PSoC Creator 4.2
+* PSoC Creator 4.4
*
* Description:
* This file provides basic startup and mux configuration settings
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
-* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
+* Copyright (c) 2007-2020 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
/*******************************************************************************
* File Name: cyfittergnu.inc
*
-* PSoC Creator 4.2
+* PSoC Creator 4.4
*
* Description:
*
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
-* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
+* Copyright (c) 2007-2020 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
.set CyBtldr_USBFS, CYDEV_BOOTLOADER_IO_COMP_USBFS
.set CYDEV_BOOTLOADER_IO_COMP, CYDEV_BOOTLOADER_IO_COMP_USBFS
.set CYDEV_CHIP_DIE_LEOPARD, 1
-.set CYDEV_CHIP_DIE_PSOC4A, 18
+.set CYDEV_CHIP_DIE_PSOC4A, 26
.set CYDEV_CHIP_DIE_PSOC5LP, 2
.set CYDEV_CHIP_DIE_PSOC5TM, 3
.set CYDEV_CHIP_DIE_TMA4, 4
.set CYDEV_CHIP_FAMILY_USED, CYDEV_CHIP_FAMILY_PSOC5
.set CYDEV_CHIP_JTAG_ID, 0x2E133069
.set CYDEV_CHIP_MEMBER_3A, 1
-.set CYDEV_CHIP_MEMBER_4A, 18
-.set CYDEV_CHIP_MEMBER_4D, 13
+.set CYDEV_CHIP_MEMBER_4A, 26
+.set CYDEV_CHIP_MEMBER_4AA, 25
+.set CYDEV_CHIP_MEMBER_4AB, 30
+.set CYDEV_CHIP_MEMBER_4AC, 14
+.set CYDEV_CHIP_MEMBER_4AD, 15
+.set CYDEV_CHIP_MEMBER_4AE, 16
+.set CYDEV_CHIP_MEMBER_4D, 20
.set CYDEV_CHIP_MEMBER_4E, 6
-.set CYDEV_CHIP_MEMBER_4F, 19
+.set CYDEV_CHIP_MEMBER_4F, 27
.set CYDEV_CHIP_MEMBER_4G, 4
-.set CYDEV_CHIP_MEMBER_4H, 17
-.set CYDEV_CHIP_MEMBER_4I, 23
-.set CYDEV_CHIP_MEMBER_4J, 14
-.set CYDEV_CHIP_MEMBER_4K, 15
-.set CYDEV_CHIP_MEMBER_4L, 22
-.set CYDEV_CHIP_MEMBER_4M, 21
-.set CYDEV_CHIP_MEMBER_4N, 10
-.set CYDEV_CHIP_MEMBER_4O, 7
-.set CYDEV_CHIP_MEMBER_4P, 20
-.set CYDEV_CHIP_MEMBER_4Q, 12
-.set CYDEV_CHIP_MEMBER_4R, 8
-.set CYDEV_CHIP_MEMBER_4S, 11
-.set CYDEV_CHIP_MEMBER_4T, 9
+.set CYDEV_CHIP_MEMBER_4H, 24
+.set CYDEV_CHIP_MEMBER_4I, 32
+.set CYDEV_CHIP_MEMBER_4J, 21
+.set CYDEV_CHIP_MEMBER_4K, 22
+.set CYDEV_CHIP_MEMBER_4L, 31
+.set CYDEV_CHIP_MEMBER_4M, 29
+.set CYDEV_CHIP_MEMBER_4N, 11
+.set CYDEV_CHIP_MEMBER_4O, 8
+.set CYDEV_CHIP_MEMBER_4P, 28
+.set CYDEV_CHIP_MEMBER_4Q, 17
+.set CYDEV_CHIP_MEMBER_4R, 9
+.set CYDEV_CHIP_MEMBER_4S, 12
+.set CYDEV_CHIP_MEMBER_4T, 10
.set CYDEV_CHIP_MEMBER_4U, 5
-.set CYDEV_CHIP_MEMBER_4V, 16
+.set CYDEV_CHIP_MEMBER_4V, 23
+.set CYDEV_CHIP_MEMBER_4W, 13
+.set CYDEV_CHIP_MEMBER_4X, 7
+.set CYDEV_CHIP_MEMBER_4Y, 18
+.set CYDEV_CHIP_MEMBER_4Z, 19
.set CYDEV_CHIP_MEMBER_5A, 3
.set CYDEV_CHIP_MEMBER_5B, 2
-.set CYDEV_CHIP_MEMBER_6A, 24
-.set CYDEV_CHIP_MEMBER_FM3, 28
-.set CYDEV_CHIP_MEMBER_FM4, 29
-.set CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE1, 25
-.set CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE2, 26
-.set CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE3, 27
+.set CYDEV_CHIP_MEMBER_6A, 33
+.set CYDEV_CHIP_MEMBER_FM3, 37
+.set CYDEV_CHIP_MEMBER_FM4, 38
+.set CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE1, 34
+.set CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE2, 35
+.set CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE3, 36
.set CYDEV_CHIP_MEMBER_UNKNOWN, 0
.set CYDEV_CHIP_MEMBER_USED, CYDEV_CHIP_MEMBER_5B
.set CYDEV_CHIP_DIE_EXPECT, CYDEV_CHIP_MEMBER_USED
.set CYDEV_CHIP_REVISION_3A_PRODUCTION, 3
.set CYDEV_CHIP_REVISION_4A_ES0, 17
.set CYDEV_CHIP_REVISION_4A_PRODUCTION, 17
+.set CYDEV_CHIP_REVISION_4AA_PRODUCTION, 0
+.set CYDEV_CHIP_REVISION_4AB_PRODUCTION, 0
+.set CYDEV_CHIP_REVISION_4AC_PRODUCTION, 0
+.set CYDEV_CHIP_REVISION_4AD_PRODUCTION, 0
+.set CYDEV_CHIP_REVISION_4AE_PRODUCTION, 0
.set CYDEV_CHIP_REVISION_4D_PRODUCTION, 0
.set CYDEV_CHIP_REVISION_4E_CCG2_NO_USBPD, 0
.set CYDEV_CHIP_REVISION_4E_PRODUCTION, 0
.set CYDEV_CHIP_REVISION_4T_PRODUCTION, 0
.set CYDEV_CHIP_REVISION_4U_PRODUCTION, 0
.set CYDEV_CHIP_REVISION_4V_PRODUCTION, 0
+.set CYDEV_CHIP_REVISION_4W_PRODUCTION, 0
+.set CYDEV_CHIP_REVISION_4X_PRODUCTION, 0
+.set CYDEV_CHIP_REVISION_4Y_PRODUCTION, 0
+.set CYDEV_CHIP_REVISION_4Z_PRODUCTION, 0
.set CYDEV_CHIP_REVISION_5A_ES0, 0
.set CYDEV_CHIP_REVISION_5A_ES1, 1
.set CYDEV_CHIP_REVISION_5A_PRODUCTION, 1
;
; File Name: cyfitteriar.inc
;
-; PSoC Creator 4.2
+; PSoC Creator 4.4
;
; Description:
;
;
;-------------------------------------------------------------------------------
-; Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
+; Copyright (c) 2007-2020 Cypress Semiconductor. All rights reserved.
; You may use this file only in accordance with the license, terms, conditions,
; disclaimers, and limitations in the end user license agreement accompanying
; the software package with which this file was provided.
CyBtldr_USBFS EQU CYDEV_BOOTLOADER_IO_COMP_USBFS
CYDEV_BOOTLOADER_IO_COMP EQU CYDEV_BOOTLOADER_IO_COMP_USBFS
CYDEV_CHIP_DIE_LEOPARD EQU 1
-CYDEV_CHIP_DIE_PSOC4A EQU 18
+CYDEV_CHIP_DIE_PSOC4A EQU 26
CYDEV_CHIP_DIE_PSOC5LP EQU 2
CYDEV_CHIP_DIE_PSOC5TM EQU 3
CYDEV_CHIP_DIE_TMA4 EQU 4
CYDEV_CHIP_FAMILY_USED EQU CYDEV_CHIP_FAMILY_PSOC5
CYDEV_CHIP_JTAG_ID EQU 0x2E133069
CYDEV_CHIP_MEMBER_3A EQU 1
-CYDEV_CHIP_MEMBER_4A EQU 18
-CYDEV_CHIP_MEMBER_4D EQU 13
+CYDEV_CHIP_MEMBER_4A EQU 26
+CYDEV_CHIP_MEMBER_4AA EQU 25
+CYDEV_CHIP_MEMBER_4AB EQU 30
+CYDEV_CHIP_MEMBER_4AC EQU 14
+CYDEV_CHIP_MEMBER_4AD EQU 15
+CYDEV_CHIP_MEMBER_4AE EQU 16
+CYDEV_CHIP_MEMBER_4D EQU 20
CYDEV_CHIP_MEMBER_4E EQU 6
-CYDEV_CHIP_MEMBER_4F EQU 19
+CYDEV_CHIP_MEMBER_4F EQU 27
CYDEV_CHIP_MEMBER_4G EQU 4
-CYDEV_CHIP_MEMBER_4H EQU 17
-CYDEV_CHIP_MEMBER_4I EQU 23
-CYDEV_CHIP_MEMBER_4J EQU 14
-CYDEV_CHIP_MEMBER_4K EQU 15
-CYDEV_CHIP_MEMBER_4L EQU 22
-CYDEV_CHIP_MEMBER_4M EQU 21
-CYDEV_CHIP_MEMBER_4N EQU 10
-CYDEV_CHIP_MEMBER_4O EQU 7
-CYDEV_CHIP_MEMBER_4P EQU 20
-CYDEV_CHIP_MEMBER_4Q EQU 12
-CYDEV_CHIP_MEMBER_4R EQU 8
-CYDEV_CHIP_MEMBER_4S EQU 11
-CYDEV_CHIP_MEMBER_4T EQU 9
+CYDEV_CHIP_MEMBER_4H EQU 24
+CYDEV_CHIP_MEMBER_4I EQU 32
+CYDEV_CHIP_MEMBER_4J EQU 21
+CYDEV_CHIP_MEMBER_4K EQU 22
+CYDEV_CHIP_MEMBER_4L EQU 31
+CYDEV_CHIP_MEMBER_4M EQU 29
+CYDEV_CHIP_MEMBER_4N EQU 11
+CYDEV_CHIP_MEMBER_4O EQU 8
+CYDEV_CHIP_MEMBER_4P EQU 28
+CYDEV_CHIP_MEMBER_4Q EQU 17
+CYDEV_CHIP_MEMBER_4R EQU 9
+CYDEV_CHIP_MEMBER_4S EQU 12
+CYDEV_CHIP_MEMBER_4T EQU 10
CYDEV_CHIP_MEMBER_4U EQU 5
-CYDEV_CHIP_MEMBER_4V EQU 16
+CYDEV_CHIP_MEMBER_4V EQU 23
+CYDEV_CHIP_MEMBER_4W EQU 13
+CYDEV_CHIP_MEMBER_4X EQU 7
+CYDEV_CHIP_MEMBER_4Y EQU 18
+CYDEV_CHIP_MEMBER_4Z EQU 19
CYDEV_CHIP_MEMBER_5A EQU 3
CYDEV_CHIP_MEMBER_5B EQU 2
-CYDEV_CHIP_MEMBER_6A EQU 24
-CYDEV_CHIP_MEMBER_FM3 EQU 28
-CYDEV_CHIP_MEMBER_FM4 EQU 29
-CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE1 EQU 25
-CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE2 EQU 26
-CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE3 EQU 27
+CYDEV_CHIP_MEMBER_6A EQU 33
+CYDEV_CHIP_MEMBER_FM3 EQU 37
+CYDEV_CHIP_MEMBER_FM4 EQU 38
+CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE1 EQU 34
+CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE2 EQU 35
+CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE3 EQU 36
CYDEV_CHIP_MEMBER_UNKNOWN EQU 0
CYDEV_CHIP_MEMBER_USED EQU CYDEV_CHIP_MEMBER_5B
CYDEV_CHIP_DIE_EXPECT EQU CYDEV_CHIP_MEMBER_USED
CYDEV_CHIP_REVISION_3A_PRODUCTION EQU 3
CYDEV_CHIP_REVISION_4A_ES0 EQU 17
CYDEV_CHIP_REVISION_4A_PRODUCTION EQU 17
+CYDEV_CHIP_REVISION_4AA_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_4AB_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_4AC_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_4AD_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_4AE_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4D_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4E_CCG2_NO_USBPD EQU 0
CYDEV_CHIP_REVISION_4E_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4T_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4U_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4V_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_4W_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_4X_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_4Y_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_4Z_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_5A_ES0 EQU 0
CYDEV_CHIP_REVISION_5A_ES1 EQU 1
CYDEV_CHIP_REVISION_5A_PRODUCTION EQU 1
;
; File Name: cyfitterrv.inc
;
-; PSoC Creator 4.2
+; PSoC Creator 4.4
;
; Description:
;
;
;-------------------------------------------------------------------------------
-; Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
+; Copyright (c) 2007-2020 Cypress Semiconductor. All rights reserved.
; You may use this file only in accordance with the license, terms, conditions,
; disclaimers, and limitations in the end user license agreement accompanying
; the software package with which this file was provided.
CyBtldr_USBFS EQU CYDEV_BOOTLOADER_IO_COMP_USBFS
CYDEV_BOOTLOADER_IO_COMP EQU CYDEV_BOOTLOADER_IO_COMP_USBFS
CYDEV_CHIP_DIE_LEOPARD EQU 1
-CYDEV_CHIP_DIE_PSOC4A EQU 18
+CYDEV_CHIP_DIE_PSOC4A EQU 26
CYDEV_CHIP_DIE_PSOC5LP EQU 2
CYDEV_CHIP_DIE_PSOC5TM EQU 3
CYDEV_CHIP_DIE_TMA4 EQU 4
CYDEV_CHIP_FAMILY_USED EQU CYDEV_CHIP_FAMILY_PSOC5
CYDEV_CHIP_JTAG_ID EQU 0x2E133069
CYDEV_CHIP_MEMBER_3A EQU 1
-CYDEV_CHIP_MEMBER_4A EQU 18
-CYDEV_CHIP_MEMBER_4D EQU 13
+CYDEV_CHIP_MEMBER_4A EQU 26
+CYDEV_CHIP_MEMBER_4AA EQU 25
+CYDEV_CHIP_MEMBER_4AB EQU 30
+CYDEV_CHIP_MEMBER_4AC EQU 14
+CYDEV_CHIP_MEMBER_4AD EQU 15
+CYDEV_CHIP_MEMBER_4AE EQU 16
+CYDEV_CHIP_MEMBER_4D EQU 20
CYDEV_CHIP_MEMBER_4E EQU 6
-CYDEV_CHIP_MEMBER_4F EQU 19
+CYDEV_CHIP_MEMBER_4F EQU 27
CYDEV_CHIP_MEMBER_4G EQU 4
-CYDEV_CHIP_MEMBER_4H EQU 17
-CYDEV_CHIP_MEMBER_4I EQU 23
-CYDEV_CHIP_MEMBER_4J EQU 14
-CYDEV_CHIP_MEMBER_4K EQU 15
-CYDEV_CHIP_MEMBER_4L EQU 22
-CYDEV_CHIP_MEMBER_4M EQU 21
-CYDEV_CHIP_MEMBER_4N EQU 10
-CYDEV_CHIP_MEMBER_4O EQU 7
-CYDEV_CHIP_MEMBER_4P EQU 20
-CYDEV_CHIP_MEMBER_4Q EQU 12
-CYDEV_CHIP_MEMBER_4R EQU 8
-CYDEV_CHIP_MEMBER_4S EQU 11
-CYDEV_CHIP_MEMBER_4T EQU 9
+CYDEV_CHIP_MEMBER_4H EQU 24
+CYDEV_CHIP_MEMBER_4I EQU 32
+CYDEV_CHIP_MEMBER_4J EQU 21
+CYDEV_CHIP_MEMBER_4K EQU 22
+CYDEV_CHIP_MEMBER_4L EQU 31
+CYDEV_CHIP_MEMBER_4M EQU 29
+CYDEV_CHIP_MEMBER_4N EQU 11
+CYDEV_CHIP_MEMBER_4O EQU 8
+CYDEV_CHIP_MEMBER_4P EQU 28
+CYDEV_CHIP_MEMBER_4Q EQU 17
+CYDEV_CHIP_MEMBER_4R EQU 9
+CYDEV_CHIP_MEMBER_4S EQU 12
+CYDEV_CHIP_MEMBER_4T EQU 10
CYDEV_CHIP_MEMBER_4U EQU 5
-CYDEV_CHIP_MEMBER_4V EQU 16
+CYDEV_CHIP_MEMBER_4V EQU 23
+CYDEV_CHIP_MEMBER_4W EQU 13
+CYDEV_CHIP_MEMBER_4X EQU 7
+CYDEV_CHIP_MEMBER_4Y EQU 18
+CYDEV_CHIP_MEMBER_4Z EQU 19
CYDEV_CHIP_MEMBER_5A EQU 3
CYDEV_CHIP_MEMBER_5B EQU 2
-CYDEV_CHIP_MEMBER_6A EQU 24
-CYDEV_CHIP_MEMBER_FM3 EQU 28
-CYDEV_CHIP_MEMBER_FM4 EQU 29
-CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE1 EQU 25
-CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE2 EQU 26
-CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE3 EQU 27
+CYDEV_CHIP_MEMBER_6A EQU 33
+CYDEV_CHIP_MEMBER_FM3 EQU 37
+CYDEV_CHIP_MEMBER_FM4 EQU 38
+CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE1 EQU 34
+CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE2 EQU 35
+CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE3 EQU 36
CYDEV_CHIP_MEMBER_UNKNOWN EQU 0
CYDEV_CHIP_MEMBER_USED EQU CYDEV_CHIP_MEMBER_5B
CYDEV_CHIP_DIE_EXPECT EQU CYDEV_CHIP_MEMBER_USED
CYDEV_CHIP_REVISION_3A_PRODUCTION EQU 3
CYDEV_CHIP_REVISION_4A_ES0 EQU 17
CYDEV_CHIP_REVISION_4A_PRODUCTION EQU 17
+CYDEV_CHIP_REVISION_4AA_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_4AB_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_4AC_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_4AD_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_4AE_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4D_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4E_CCG2_NO_USBPD EQU 0
CYDEV_CHIP_REVISION_4E_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4T_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4U_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4V_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_4W_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_4X_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_4Y_PRODUCTION EQU 0
+CYDEV_CHIP_REVISION_4Z_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_5A_ES0 EQU 0
CYDEV_CHIP_REVISION_5A_ES1 EQU 1
CYDEV_CHIP_REVISION_5A_PRODUCTION EQU 1
/*******************************************************************************
* File Name: cymetadata.c
*
-* PSoC Creator 4.2
+* PSoC Creator 4.4
*
* Description:
* This file defines all extra memory spaces that need to be included.
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
-* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
+* Copyright (c) 2007-2020 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
/*******************************************************************************
* File Name: project.h
*
-* PSoC Creator 4.2
+* PSoC Creator 4.4
*
* Description:
* It contains references to all generated header files and should not be modified.
* This file is automatically generated by PSoC Creator.
*
********************************************************************************
-* Copyright (c) 2007-2018 Cypress Semiconductor. All rights reserved.
+* Copyright (c) 2007-2020 Cypress Semiconductor. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
</platforms>
<project_current_platform v="c9323d49-d323-40b8-9b59-cc008d68a989" />
<last_selected_tab v="Cypress" />
-<WriteAppVersionLastSavedWith v="4.2.0.641" />
-<WriteAppMarketingVersionLastSavedWith v=" 4.2" />
+<WriteAppVersionLastSavedWith v="4.4.0.80" />
+<WriteAppMarketingVersionLastSavedWith v=" 4.4" />
<project_id v="61ede17a-ffe1-47e5-a8cd-0424bf996857" />
<GenerateDescriptionFiles v="False" />
</CyGuid_49cfd574-032a-4a64-b7be-d4eeeaf25e43>
-Loading plugins phase: Elapsed time ==> 0s.109ms
+Loading plugins phase: Elapsed time ==> 1s.308ms
<CYPRESSTAG name="CyDsfit arguments...">
-cydsfit arguments: -.fdsnotice -.fdswarpdepfile=warp_dependencies.txt -.fdselabdepfile=elab_dependencies.txt -.fdsbldfile=generated_files.txt -.fdsreffile=referenced_files.txt -p C:\Users\Michael\projects\SCSI2SD\software\SCSI2SD\v5.2\USB_Bootloader.cydsn\USB_Bootloader.cyprj -d CY8C5267AXI-LP051 -s C:\Users\Michael\projects\SCSI2SD\software\SCSI2SD\v5.2\USB_Bootloader.cydsn\Generated_Source\PSoC5 -- -yv2 -q10 -ygs -o2 -v3 -.fftcfgtype=LE
+cydsfit arguments: -.fdsnotice -.fdswarpdepfile=warp_dependencies.txt -.fdselabdepfile=elab_dependencies.txt -.fdsbldfile=generated_files.txt -.fdsreffile=referenced_files.txt -p C:\Users\micha\Documents\projects\SCSI2SD\software\SCSI2SD\v5.2\USB_Bootloader.cydsn\USB_Bootloader.cyprj -d CY8C5267AXI-LP051 -s C:\Users\micha\Documents\projects\SCSI2SD\software\SCSI2SD\v5.2\USB_Bootloader.cydsn\Generated_Source\PSoC5 -- -yv2 -q10 -ygs -o2 -v3 -.fftcfgtype=LE
</CYPRESSTAG>
<CYPRESSTAG name="Design elaboration results...">
</CYPRESSTAG>
-Elaboration phase: Elapsed time ==> 1s.465ms
+Elaboration phase: Elapsed time ==> 5s.313ms
<CYPRESSTAG name="HDL generation results...">
</CYPRESSTAG>
-HDL generation phase: Elapsed time ==> 0s.041ms
+HDL generation phase: Elapsed time ==> 0s.065ms
<CYPRESSTAG name="Synthesis results...">
| | | | | | |
======================================================================
Compiling: USB_Bootloader.v
-Program : C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\bin\warp.exe
-Options : -yv2 -q10 -ygs -o2 -v3 -.fftcfgtype=LE -ya -.fftprj=C:\Users\Michael\projects\SCSI2SD\software\SCSI2SD\v5.2\USB_Bootloader.cydsn\USB_Bootloader.cyprj -dcpsoc3 USB_Bootloader.v -verilog
+Program : C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\warp\bin\warp.exe
+Options : -yv2 -q10 -ygs -o2 -v3 -.fftcfgtype=LE -ya -.fftprj=C:\Users\micha\Documents\projects\SCSI2SD\software\SCSI2SD\v5.2\USB_Bootloader.cydsn\USB_Bootloader.cyprj -dcpsoc3 USB_Bootloader.v -verilog
======================================================================
======================================================================
Compiling: USB_Bootloader.v
-Program : C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\bin\warp.exe
-Options : -yv2 -q10 -ygs -o2 -v3 -.fftcfgtype=LE -ya -.fftprj=C:\Users\Michael\projects\SCSI2SD\software\SCSI2SD\v5.2\USB_Bootloader.cydsn\USB_Bootloader.cyprj -dcpsoc3 USB_Bootloader.v -verilog
+Program : C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\warp\bin\warp.exe
+Options : -yv2 -q10 -ygs -o2 -v3 -.fftcfgtype=LE -ya -.fftprj=C:\Users\micha\Documents\projects\SCSI2SD\software\SCSI2SD\v5.2\USB_Bootloader.cydsn\USB_Bootloader.cyprj -dcpsoc3 USB_Bootloader.v -verilog
======================================================================
======================================================================
Compiling: USB_Bootloader.v
Program : vlogfe
-Options : -yv2 -q10 -ygs -o2 -v3 -.fftcfgtype=LE -ya -.fftprj=C:\Users\Michael\projects\SCSI2SD\software\SCSI2SD\v5.2\USB_Bootloader.cydsn\USB_Bootloader.cyprj -dcpsoc3 -verilog USB_Bootloader.v
+Options : -yv2 -q10 -ygs -o2 -v3 -.fftcfgtype=LE -ya -.fftprj=C:\Users\micha\Documents\projects\SCSI2SD\software\SCSI2SD\v5.2\USB_Bootloader.cydsn\USB_Bootloader.cyprj -dcpsoc3 -verilog USB_Bootloader.v
======================================================================
vlogfe V6.3 IR 41: Verilog parser
-Mon Oct 12 10:51:56 2020
+Thu Jan 21 22:31:48 2021
======================================================================
======================================================================
vpp V6.3 IR 41: Verilog Pre-Processor
-Mon Oct 12 10:51:56 2020
+Thu Jan 21 22:31:48 2021
-Flattening file 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\cy_virtualmux_v1_0\cy_virtualmux_v1_0.v'
-Flattening file 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\ZeroTerminal\ZeroTerminal.v'
+Flattening file 'C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\cy_virtualmux_v1_0\cy_virtualmux_v1_0.v'
+Flattening file 'C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\ZeroTerminal\ZeroTerminal.v'
vpp: No errors.
Library 'work' => directory 'lcpsoc3'
General_symbol_table
General_symbol_table
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\std.vhd'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\cypress.vhd'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\work\cypress.vif'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\ieee\work\stdlogic.vif'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\stdlogic\lpmpkg.vif'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\stdlogic\rtlpkg.vif'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\stdlogic\mod_cnst.vif'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\stdlogic\mod_mthv.vif'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\stdlogic\mod_genv.vif'.
+Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\warp\lib\common\std.vhd'.
+Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\warp\lib\common\cypress.vhd'.
+Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\warp\lib\common\work\cypress.vif'.
+Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\warp\lib\ieee\work\stdlogic.vif'.
+Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\warp\lib\common\stdlogic\lpmpkg.vif'.
+Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\warp\lib\common\stdlogic\rtlpkg.vif'.
+Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\warp\lib\common\stdlogic\mod_cnst.vif'.
+Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\warp\lib\common\stdlogic\mod_mthv.vif'.
+Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\warp\lib\common\stdlogic\mod_genv.vif'.
Using control file 'USB_Bootloader.ctl'.
vlogfe: No errors.
======================================================================
Compiling: USB_Bootloader.v
Program : tovif
-Options : -yv2 -q10 -ygs -o2 -v3 -.fftcfgtype=LE -ya -.fftprj=C:\Users\Michael\projects\SCSI2SD\software\SCSI2SD\v5.2\USB_Bootloader.cydsn\USB_Bootloader.cyprj -dcpsoc3 -verilog USB_Bootloader.v
+Options : -yv2 -q10 -ygs -o2 -v3 -.fftcfgtype=LE -ya -.fftprj=C:\Users\micha\Documents\projects\SCSI2SD\software\SCSI2SD\v5.2\USB_Bootloader.cydsn\USB_Bootloader.cyprj -dcpsoc3 -verilog USB_Bootloader.v
======================================================================
tovif V6.3 IR 41: High-level synthesis
-Mon Oct 12 10:51:56 2020
-
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\std.vhd'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\cypress.vhd'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\work\cypress.vif'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\ieee\work\stdlogic.vif'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\stdlogic\lpmpkg.vif'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\stdlogic\rtlpkg.vif'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\stdlogic\mod_cnst.vif'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\stdlogic\mod_mthv.vif'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\stdlogic\mod_genv.vif'.
-Linking 'C:\Users\Michael\projects\SCSI2SD\software\SCSI2SD\v5.2\USB_Bootloader.cydsn\codegentemp\USB_Bootloader.ctl'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\cy_virtualmux_v1_0\cy_virtualmux_v1_0.v'.
-Linking 'C:\Users\Michael\projects\SCSI2SD\software\SCSI2SD\v5.2\USB_Bootloader.cydsn\codegentemp\USB_Bootloader.v'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\ZeroTerminal\ZeroTerminal.v'.
+Thu Jan 21 22:31:49 2021
+
+Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\warp\lib\common\std.vhd'.
+Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\warp\lib\common\cypress.vhd'.
+Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\warp\lib\common\work\cypress.vif'.
+Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\warp\lib\ieee\work\stdlogic.vif'.
+Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\warp\lib\common\stdlogic\lpmpkg.vif'.
+Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\warp\lib\common\stdlogic\rtlpkg.vif'.
+Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\warp\lib\common\stdlogic\mod_cnst.vif'.
+Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\warp\lib\common\stdlogic\mod_mthv.vif'.
+Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\warp\lib\common\stdlogic\mod_genv.vif'.
+Linking 'C:\Users\micha\Documents\projects\SCSI2SD\software\SCSI2SD\v5.2\USB_Bootloader.cydsn\codegentemp\USB_Bootloader.ctl'.
+Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\cy_virtualmux_v1_0\cy_virtualmux_v1_0.v'.
+Linking 'C:\Users\micha\Documents\projects\SCSI2SD\software\SCSI2SD\v5.2\USB_Bootloader.cydsn\codegentemp\USB_Bootloader.v'.
+Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\ZeroTerminal\ZeroTerminal.v'.
tovif: No errors.
======================================================================
Compiling: USB_Bootloader.v
Program : topld
-Options : -yv2 -q10 -ygs -o2 -v3 -.fftcfgtype=LE -ya -.fftprj=C:\Users\Michael\projects\SCSI2SD\software\SCSI2SD\v5.2\USB_Bootloader.cydsn\USB_Bootloader.cyprj -dcpsoc3 -verilog USB_Bootloader.v
+Options : -yv2 -q10 -ygs -o2 -v3 -.fftcfgtype=LE -ya -.fftprj=C:\Users\micha\Documents\projects\SCSI2SD\software\SCSI2SD\v5.2\USB_Bootloader.cydsn\USB_Bootloader.cyprj -dcpsoc3 -verilog USB_Bootloader.v
======================================================================
topld V6.3 IR 41: Synthesis and optimization
-Mon Oct 12 10:51:56 2020
-
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\std.vhd'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\cypress.vhd'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\work\cypress.vif'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\ieee\work\stdlogic.vif'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\stdlogic\lpmpkg.vif'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\stdlogic\rtlpkg.vif'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\stdlogic\mod_cnst.vif'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\stdlogic\mod_mthv.vif'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\common\stdlogic\mod_genv.vif'.
-Linking 'C:\Users\Michael\projects\SCSI2SD\software\SCSI2SD\v5.2\USB_Bootloader.cydsn\codegentemp\USB_Bootloader.ctl'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\cy_virtualmux_v1_0\cy_virtualmux_v1_0.v'.
-Linking 'C:\Users\Michael\projects\SCSI2SD\software\SCSI2SD\v5.2\USB_Bootloader.cydsn\codegentemp\USB_Bootloader.v'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\ZeroTerminal\ZeroTerminal.v'.
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\lib\lcpsoc3\stdlogic\cpsoc3.vif'.
+Thu Jan 21 22:31:49 2021
+
+Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\warp\lib\common\std.vhd'.
+Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\warp\lib\common\cypress.vhd'.
+Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\warp\lib\common\work\cypress.vif'.
+Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\warp\lib\ieee\work\stdlogic.vif'.
+Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\warp\lib\common\stdlogic\lpmpkg.vif'.
+Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\warp\lib\common\stdlogic\rtlpkg.vif'.
+Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\warp\lib\common\stdlogic\mod_cnst.vif'.
+Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\warp\lib\common\stdlogic\mod_mthv.vif'.
+Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\warp\lib\common\stdlogic\mod_genv.vif'.
+Linking 'C:\Users\micha\Documents\projects\SCSI2SD\software\SCSI2SD\v5.2\USB_Bootloader.cydsn\codegentemp\USB_Bootloader.ctl'.
+Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\cy_virtualmux_v1_0\cy_virtualmux_v1_0.v'.
+Linking 'C:\Users\micha\Documents\projects\SCSI2SD\software\SCSI2SD\v5.2\USB_Bootloader.cydsn\codegentemp\USB_Bootloader.v'.
+Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\ZeroTerminal\ZeroTerminal.v'.
+Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\warp\lib\lcpsoc3\stdlogic\cpsoc3.vif'.
----------------------------------------------------------
Detecting unused logic.
topld: No errors.
-CYPRESS_DIR : C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp
-Warp Program : C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\warp\bin\warp.exe
-Warp Arguments : -yv2 -q10 -ygs -o2 -v3 -.fftcfgtype=LE -ya -.fftprj=C:\Users\Michael\projects\SCSI2SD\software\SCSI2SD\v5.2\USB_Bootloader.cydsn\USB_Bootloader.cyprj -dcpsoc3 USB_Bootloader.v -verilog
+CYPRESS_DIR : C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\warp
+Warp Program : C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\warp\bin\warp.exe
+Warp Arguments : -yv2 -q10 -ygs -o2 -v3 -.fftcfgtype=LE -ya -.fftprj=C:\Users\micha\Documents\projects\SCSI2SD\software\SCSI2SD\v5.2\USB_Bootloader.cydsn\USB_Bootloader.cyprj -dcpsoc3 USB_Bootloader.v -verilog
</CYPRESSTAG>
-Warp synthesis phase: Elapsed time ==> 0s.471ms
+Warp synthesis phase: Elapsed time ==> 2s.599ms
<CYPRESSTAG name="Fitter results...">
<CYPRESSTAG name="Fitter startup details...">
-cyp3fit: V4.2.0.641, Family: PSoC3, Started at: Monday, 12 October 2020 10:51:56
-Options: -yv2 -q10 -ygs -o2 -v3 -.fftcfgtype=LE -ya -.fftprj=C:\Users\Michael\projects\SCSI2SD\software\SCSI2SD\v5.2\USB_Bootloader.cydsn\USB_Bootloader.cyprj -d CY8C5267AXI-LP051 USB_Bootloader.v -verilog
+cyp3fit: V4.4.0.80, Family: PSoC3, Started at: Thursday, 21 January 2021 22:31:50
+Options: -yv2 -q10 -ygs -o2 -v3 -.fftcfgtype=LE -ya -.fftprj=C:\Users\micha\Documents\projects\SCSI2SD\software\SCSI2SD\v5.2\USB_Bootloader.cydsn\USB_Bootloader.cyprj -d CY8C5267AXI-LP051 USB_Bootloader.v -verilog
</CYPRESSTAG>
<CYPRESSTAG name="Design parsing">
-Design parsing phase: Elapsed time ==> 0s.009ms
+Design parsing phase: Elapsed time ==> 0s.007ms
</CYPRESSTAG>
<CYPRESSTAG name="Tech Mapping">
<CYPRESSTAG name="Initial Mapping" icon="FILE_RPT_TECHM">
interrupt: Name =\USBFS:sof_int\
PORT MAP (
- interrupt => Net_40 );
+ interrupt => Net_122 );
Properties:
{
int_type = "10"
DAC : : : :
VIDAC : 0 : 1 : 1 : 0.00 %
</CYPRESSTAG>
-Technology Mapping: Elapsed time ==> 0s.073ms
-Tech Mapping phase: Elapsed time ==> 0s.130ms
+Technology Mapping: Elapsed time ==> 0s.065ms
+Tech Mapping phase: Elapsed time ==> 0s.122ms
</CYPRESSTAG>
<CYPRESSTAG name="Analog Placement">
Initial Analog Placement Results:
IO_7@[IOP=(15)][IoId=(7)] : \USBFS:Dm(0)\ (fixed)
IO_6@[IOP=(15)][IoId=(6)] : \USBFS:Dp(0)\ (fixed)
USB[0]@[FFB(USB,0)] : \USBFS:USB\
-Analog Placement phase: Elapsed time ==> 0s.053ms
+Analog Placement phase: Elapsed time ==> 0s.008ms
</CYPRESSTAG>
<CYPRESSTAG name="Analog Routing">
Analog Routing phase: Elapsed time ==> 0s.000ms
IsVddaHalfUsedForComp = False
IsVddaHalfUsedForSar0 = False
IsVddaHalfUsedForSar1 = False
-Analog Code Generation phase: Elapsed time ==> 0s.328ms
+Analog Code Generation phase: Elapsed time ==> 0s.212ms
</CYPRESSTAG>
<CYPRESSTAG name="Digital Placement">
<CYPRESSTAG name="Detailed placement messages">
I2659: No Constrained paths were found. The placer will run in non-timing driven mode.
-I2076: Total run-time: 0.6 sec.
+I2076: Total run-time: 0.5 sec.
</CYPRESSTAG>
<CYPRESSTAG name="PLD Packing">
Initial Partitioning Summary not displayed at this verbose level.</CYPRESSTAG>
<CYPRESSTAG name="Final Partitioning Summary">
Final Partitioning Summary not displayed at this verbose level.</CYPRESSTAG>
-Partitioning: Elapsed time ==> 0s.028ms
+Partitioning: Elapsed time ==> 0s.016ms
</CYPRESSTAG>
<CYPRESSTAG name="Final Placement Summary">
Intr@ [IntrContainer=(0)][IntrId=(21)]
interrupt: Name =\USBFS:sof_int\
PORT MAP (
- interrupt => Net_40 );
+ interrupt => Net_122 );
Properties:
{
int_type = "10"
PORT MAP (
dp => \USBFS:Net_1000\ ,
dm => \USBFS:Net_597\ ,
- sof_int => Net_40 ,
+ sof_int => Net_122 ,
arb_int => \USBFS:Net_79\ ,
usb_int => \USBFS:Net_81\ ,
ept_int_8 => \USBFS:ept_int_8\ ,
</CYPRESSTAG>
</CYPRESSTAG>
</CYPRESSTAG>
-Digital component placer commit/Report: Elapsed time ==> 0s.048ms
-Digital Placement phase: Elapsed time ==> 0s.964ms
+Digital component placer commit/Report: Elapsed time ==> 0s.031ms
+Digital Placement phase: Elapsed time ==> 0s.947ms
</CYPRESSTAG>
<CYPRESSTAG name="Digital Routing">
-"C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\bin/sjrouter.exe" --xml-path "C:\Program Files (x86)\Cypress\PSoC Creator\4.2\PSoC Creator\dev\psoc5/psoc5lp/route_arch-rrg.cydata" --vh2-path "USB_Bootloader_r.vh2" --pcf-path "USB_Bootloader.pco" --des-name "USB_Bootloader" --dsf-path "USB_Bootloader.dsf" --sdc-path "USB_Bootloader.sdc" --lib-path "USB_Bootloader_r.lib"
+"C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\bin/sjrouter.exe" --xml-path "C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\dev\psoc5/psoc5lp/route_arch-rrg.cydata" --vh2-path "USB_Bootloader_r.vh2" --pcf-path "USB_Bootloader.pco" --des-name "USB_Bootloader" --dsf-path "USB_Bootloader.dsf" --sdc-path "USB_Bootloader.sdc" --lib-path "USB_Bootloader_r.lib"
Routing successful.
-Digital Routing phase: Elapsed time ==> 1s.346ms
+Digital Routing phase: Elapsed time ==> 0s.910ms
</CYPRESSTAG>
<CYPRESSTAG name="Bitstream Generation">
-Bitstream Generation phase: Elapsed time ==> 0s.136ms
+Bitstream Generation phase: Elapsed time ==> 0s.220ms
</CYPRESSTAG>
<CYPRESSTAG name="Bitstream Verification">
-Bitstream Verification phase: Elapsed time ==> 0s.030ms
+Bitstream Verification phase: Elapsed time ==> 0s.028ms
</CYPRESSTAG>
<CYPRESSTAG name="Static timing analysis">
Timing report is in USB_Bootloader_timing.html.
-Static timing analysis phase: Elapsed time ==> 0s.229ms
+Static timing analysis phase: Elapsed time ==> 0s.315ms
</CYPRESSTAG>
<CYPRESSTAG name="Data reporting">
Data reporting phase: Elapsed time ==> 0s.000ms
</CYPRESSTAG>
<CYPRESSTAG name="Database update...">
-Design database save phase: Elapsed time ==> 0s.159ms
+Design database save phase: Elapsed time ==> 0s.147ms
</CYPRESSTAG>
-cydsfit: Elapsed time ==> 3s.406ms
+cydsfit: Elapsed time ==> 2s.990ms
</CYPRESSTAG>
-Fitter phase: Elapsed time ==> 3s.407ms
-API generation phase: Elapsed time ==> 1s.335ms
-Dependency generation phase: Elapsed time ==> 0s.009ms
+Fitter phase: Elapsed time ==> 2s.990ms
+API generation phase: Elapsed time ==> 3s.949ms
+Dependency generation phase: Elapsed time ==> 0s.045ms
Cleanup phase: Elapsed time ==> 0s.000ms
<tr> <td class="prop"> Project :</td>
<td class="proptext"> USB_Bootloader</td></tr>
<tr> <td class="prop"> Build Time :</td>
-<td class="proptext"> 10/12/20 10:51:59</td></tr>
+<td class="proptext"> 01/21/21 22:31:52</td></tr>
<tr> <td class="prop"> Device :</td>
<td class="proptext"> CY8C5267AXI-LP051</td></tr>
<tr> <td class="prop"> Temperature :</td>
projects / SCSI2SD.git / commitdiff