From: Michael McMaster Date: Wed, 26 Feb 2020 20:23:29 +0000 (+1000) Subject: More updates for V6 2020c hardware X-Git-Tag: v6.3.0-2020 X-Git-Url: http://git.codesrc.com/gitweb.cgi?a=commitdiff_plain;h=02d02752e74b7f03a67ead90bbbabe7a5fb63df7;p=SCSI2SD-V6.git More updates for V6 2020c hardware --- diff --git a/rtl/fpga_bitmap.o b/rtl/fpga_bitmap.o index 1f5749df..ccfcd0dd 100644 Binary files a/rtl/fpga_bitmap.o and b/rtl/fpga_bitmap.o differ diff --git a/src/firmware/scsiPhy.c b/src/firmware/scsiPhy.c index 2f27b1fd..8da0a098 100755 --- a/src/firmware/scsiPhy.c +++ b/src/firmware/scsiPhy.c @@ -943,25 +943,6 @@ int scsiSelfTest() result = 1; } - // TEST DBx - int i; - for (i = 0; i < 8; ++i) - { - uint8_t data = 1 << i; - *SCSI_CTRL_DBX = 0; - busSettleDelay(); - *SCSI_CTRL_DBX = data; - busSettleDelay(); - // STS_DBX is 16 bit! - if ((*SCSI_STS_DBX & 0xff) != data) - { - result = i + 2; - } - } - - // TODO Test DBP - *SCSI_CTRL_DBX = 0; - *SCSI_CTRL_BSY = 0; return result; diff --git a/src/firmware/scsiPhy.h b/src/firmware/scsiPhy.h index 360d594c..8b54f161 100755 --- a/src/firmware/scsiPhy.h +++ b/src/firmware/scsiPhy.h @@ -56,9 +56,6 @@ // Replaced with method due to delays // #define scsiFifoReady() (HAL_GPIO_ReadPin(GPIOE, FPGA_GPIO3_Pin) != 0) -#define scsiPhyFifoFull() ((*SCSI_STS_FIFO & 0x01) != 0) -#define scsiPhyFifoEmpty() ((*SCSI_STS_FIFO & 0x02) != 0) - #define scsiPhyTx(val) *SCSI_FIFO_DATA = (val) // little endian specific !. Also relies on the fsmc outputting the lower