From: Michael McMaster Date: Sun, 18 May 2014 03:42:51 +0000 (+1000) Subject: More compatibility and bug fixes. X-Git-Tag: 3.4^0 X-Git-Url: http://git.codesrc.com/gitweb.cgi?a=commitdiff_plain;h=db9c316019df5d7245bc3fd47c08f8dace051b2e;p=SCSI2SD.git More compatibility and bug fixes. - Maximum sector size increased to 8192 - Fix for REQUEST SENSE to support Ensoniq ASR-10 - Fix to configurable sector sizes --- diff --git a/CHANGELOG b/CHANGELOG index 7c694e0..9f3b3f0 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -1,9 +1,11 @@ -201404?? 3.4 +20140418 3.4 + - Critical fix for writes when using non-standard block sizes. - Fix to ensure SCSI phase bits are set atomically. - Always return the requested number of bytes for a REQUEST SENSE command This is required to support the Ensoniq ASR-10. - Decreased (unused) heap and stack sizes to prepare for a memory write cache + - Increased the maximum sector size to 8192 bytes. 20140416 3.3 - Fix to SCSI Reset handling to avoid lockups diff --git a/parts.ods b/parts.ods index abfdf77..eda6fa4 100644 Binary files a/parts.ods and b/parts.ods differ diff --git a/readme.txt b/readme.txt index daaea7c..b93b087 100644 --- a/readme.txt +++ b/readme.txt @@ -68,3 +68,5 @@ Users have reported success on these systems: EMU Emulator E4X with EOS 3.00b and E6400 (classic) with Eos 4.01 Ensoniq ASR-X, ASR-10 (from v3.4, 2GB size limit) HP 16601A logic analyzer + Apple IIgs using Apple II High Speed SCSI controller card (from v3.3) + Symbolics List Machine XL1200, using 1280 byte sectors (from v3.4) diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/Bootloadable_1.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/Bootloadable_1.c old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/Bootloadable_1.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/Bootloadable_1.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/CFG_EEPROM.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/CFG_EEPROM.c old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/CFG_EEPROM.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/CFG_EEPROM.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/Cm3Iar.icf b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/Cm3Iar.icf index cbb21ba..124d837 100755 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/Cm3Iar.icf +++ b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/Cm3Iar.icf @@ -10,7 +10,7 @@ define symbol __ICFEDIT_region_RAM_start__ = 0x20000000 - (32768 / 2); define symbol __ICFEDIT_region_RAM_end__ = 0x20000000 + (32768 / 2) - 1; /*-Sizes-*/ define symbol __ICFEDIT_size_cstack__ = 0x2000; -define symbol __ICFEDIT_size_heap__ = 0x0256; +define symbol __ICFEDIT_size_heap__ = 0x0400; /**** End of ICF editor section. ###ICF###*/ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/Cm3RealView.scat b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/Cm3RealView.scat index fd2a0c7..c44d04e 100755 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/Cm3RealView.scat +++ b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/Cm3RealView.scat @@ -112,7 +112,7 @@ APPLICATION APPL_START (CY_FLASH_SIZE - APPL_START) .ANY (+RW, +ZI) } - ARM_LIB_HEAP (0x20000000 + (32768 / 2) - 0x0256 - 0x2000) EMPTY 0x0256 + ARM_LIB_HEAP (0x20000000 + (32768 / 2) - 0x0400 - 0x2000) EMPTY 0x0400 { } diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/Cm3Start.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/Cm3Start.c old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/CyBootAsmGnu.s b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/CyBootAsmGnu.s old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/CyBootAsmIar.s b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/CyBootAsmIar.s old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/CyBootAsmRv.s b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/CyBootAsmRv.s old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/CyDmac.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/CyDmac.c old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/CyDmac.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/CyDmac.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/CyFlash.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/CyFlash.c old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/CyFlash.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/CyFlash.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/CyLib.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/CyLib.c old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/CyLib.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/CyLib.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/CySpc.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/CySpc.c old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/CySpc.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/CySpc.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_CMD_TIMER.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/Debug_Timer.c similarity index 63% rename from software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_CMD_TIMER.c rename to software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/Debug_Timer.c index 34c3e24..2d99114 100755 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_CMD_TIMER.c +++ b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/Debug_Timer.c @@ -1,5 +1,5 @@ /******************************************************************************* -* File Name: SCSI_CMD_TIMER.c +* File Name: Debug_Timer.c * Version 2.50 * * Description: @@ -21,13 +21,13 @@ * the software package with which this file was provided. ********************************************************************************/ -#include "SCSI_CMD_TIMER.h" +#include "Debug_Timer.h" -uint8 SCSI_CMD_TIMER_initVar = 0u; +uint8 Debug_Timer_initVar = 0u; /******************************************************************************* -* Function Name: SCSI_CMD_TIMER_Init +* Function Name: Debug_Timer_Init ******************************************************************************** * * Summary: @@ -40,130 +40,130 @@ uint8 SCSI_CMD_TIMER_initVar = 0u; * void * *******************************************************************************/ -void SCSI_CMD_TIMER_Init(void) +void Debug_Timer_Init(void) { - #if(!SCSI_CMD_TIMER_UsingFixedFunction) + #if(!Debug_Timer_UsingFixedFunction) /* Interrupt State Backup for Critical Region*/ - uint8 SCSI_CMD_TIMER_interruptState; + uint8 Debug_Timer_interruptState; #endif /* Interrupt state back up for Fixed Function only */ - #if (SCSI_CMD_TIMER_UsingFixedFunction) + #if (Debug_Timer_UsingFixedFunction) /* Clear all bits but the enable bit (if it's already set) for Timer operation */ - SCSI_CMD_TIMER_CONTROL &= SCSI_CMD_TIMER_CTRL_ENABLE; + Debug_Timer_CONTROL &= Debug_Timer_CTRL_ENABLE; /* Clear the mode bits for continuous run mode */ #if (CY_PSOC5A) - SCSI_CMD_TIMER_CONTROL2 &= ((uint8)(~SCSI_CMD_TIMER_CTRL_MODE_MASK)); + Debug_Timer_CONTROL2 &= ((uint8)(~Debug_Timer_CTRL_MODE_MASK)); #endif /* Clear bits in CONTROL2 only in PSOC5A */ #if (CY_PSOC3 || CY_PSOC5LP) - SCSI_CMD_TIMER_CONTROL3 &= ((uint8)(~SCSI_CMD_TIMER_CTRL_MODE_MASK)); + Debug_Timer_CONTROL3 &= ((uint8)(~Debug_Timer_CTRL_MODE_MASK)); #endif /* CONTROL3 register exists only in PSoC3 OR PSoC5LP */ /* Check if One Shot mode is enabled i.e. RunMode !=0*/ - #if (SCSI_CMD_TIMER_RunModeUsed != 0x0u) + #if (Debug_Timer_RunModeUsed != 0x0u) /* Set 3rd bit of Control register to enable one shot mode */ - SCSI_CMD_TIMER_CONTROL |= 0x04u; + Debug_Timer_CONTROL |= 0x04u; #endif /* One Shot enabled only when RunModeUsed is not Continuous*/ - #if (SCSI_CMD_TIMER_RunModeUsed == 2) + #if (Debug_Timer_RunModeUsed == 2) #if (CY_PSOC5A) /* Set last 2 bits of control2 register if one shot(halt on interrupt) is enabled*/ - SCSI_CMD_TIMER_CONTROL2 |= 0x03u; + Debug_Timer_CONTROL2 |= 0x03u; #endif /* Set One-Shot Halt on Interrupt bit in CONTROL2 for PSoC5A */ #if (CY_PSOC3 || CY_PSOC5LP) /* Set last 2 bits of control3 register if one shot(halt on interrupt) is enabled*/ - SCSI_CMD_TIMER_CONTROL3 |= 0x03u; + Debug_Timer_CONTROL3 |= 0x03u; #endif /* Set One-Shot Halt on Interrupt bit in CONTROL3 for PSoC3 or PSoC5LP */ #endif /* Remove section if One Shot Halt on Interrupt is not enabled */ - #if (SCSI_CMD_TIMER_UsingHWEnable != 0) + #if (Debug_Timer_UsingHWEnable != 0) #if (CY_PSOC5A) /* Set the default Run Mode of the Timer to Continuous */ - SCSI_CMD_TIMER_CONTROL2 |= SCSI_CMD_TIMER_CTRL_MODE_PULSEWIDTH; + Debug_Timer_CONTROL2 |= Debug_Timer_CTRL_MODE_PULSEWIDTH; #endif /* Set Continuous Run Mode in CONTROL2 for PSoC5A */ #if (CY_PSOC3 || CY_PSOC5LP) /* Clear and Set ROD and COD bits of CFG2 register */ - SCSI_CMD_TIMER_CONTROL3 &= ((uint8)(~SCSI_CMD_TIMER_CTRL_RCOD_MASK)); - SCSI_CMD_TIMER_CONTROL3 |= SCSI_CMD_TIMER_CTRL_RCOD; + Debug_Timer_CONTROL3 &= ((uint8)(~Debug_Timer_CTRL_RCOD_MASK)); + Debug_Timer_CONTROL3 |= Debug_Timer_CTRL_RCOD; /* Clear and Enable the HW enable bit in CFG2 register */ - SCSI_CMD_TIMER_CONTROL3 &= ((uint8)(~SCSI_CMD_TIMER_CTRL_ENBL_MASK)); - SCSI_CMD_TIMER_CONTROL3 |= SCSI_CMD_TIMER_CTRL_ENBL; + Debug_Timer_CONTROL3 &= ((uint8)(~Debug_Timer_CTRL_ENBL_MASK)); + Debug_Timer_CONTROL3 |= Debug_Timer_CTRL_ENBL; /* Set the default Run Mode of the Timer to Continuous */ - SCSI_CMD_TIMER_CONTROL3 |= SCSI_CMD_TIMER_CTRL_MODE_CONTINUOUS; + Debug_Timer_CONTROL3 |= Debug_Timer_CTRL_MODE_CONTINUOUS; #endif /* Set Continuous Run Mode in CONTROL3 for PSoC3ES3 or PSoC5A */ #endif /* Configure Run Mode with hardware enable */ /* Clear and Set SYNCTC and SYNCCMP bits of RT1 register */ - SCSI_CMD_TIMER_RT1 &= ((uint8)(~SCSI_CMD_TIMER_RT1_MASK)); - SCSI_CMD_TIMER_RT1 |= SCSI_CMD_TIMER_SYNC; + Debug_Timer_RT1 &= ((uint8)(~Debug_Timer_RT1_MASK)); + Debug_Timer_RT1 |= Debug_Timer_SYNC; /*Enable DSI Sync all all inputs of the Timer*/ - SCSI_CMD_TIMER_RT1 &= ((uint8)(~SCSI_CMD_TIMER_SYNCDSI_MASK)); - SCSI_CMD_TIMER_RT1 |= SCSI_CMD_TIMER_SYNCDSI_EN; + Debug_Timer_RT1 &= ((uint8)(~Debug_Timer_SYNCDSI_MASK)); + Debug_Timer_RT1 |= Debug_Timer_SYNCDSI_EN; /* Set the IRQ to use the status register interrupts */ - SCSI_CMD_TIMER_CONTROL2 |= SCSI_CMD_TIMER_CTRL2_IRQ_SEL; + Debug_Timer_CONTROL2 |= Debug_Timer_CTRL2_IRQ_SEL; #endif /* Configuring registers of fixed function implementation */ /* Set Initial values from Configuration */ - SCSI_CMD_TIMER_WritePeriod(SCSI_CMD_TIMER_INIT_PERIOD); - SCSI_CMD_TIMER_WriteCounter(SCSI_CMD_TIMER_INIT_PERIOD); + Debug_Timer_WritePeriod(Debug_Timer_INIT_PERIOD); + Debug_Timer_WriteCounter(Debug_Timer_INIT_PERIOD); - #if (SCSI_CMD_TIMER_UsingHWCaptureCounter)/* Capture counter is enabled */ - SCSI_CMD_TIMER_CAPTURE_COUNT_CTRL |= SCSI_CMD_TIMER_CNTR_ENABLE; - SCSI_CMD_TIMER_SetCaptureCount(SCSI_CMD_TIMER_INIT_CAPTURE_COUNT); + #if (Debug_Timer_UsingHWCaptureCounter)/* Capture counter is enabled */ + Debug_Timer_CAPTURE_COUNT_CTRL |= Debug_Timer_CNTR_ENABLE; + Debug_Timer_SetCaptureCount(Debug_Timer_INIT_CAPTURE_COUNT); #endif /* Configure capture counter value */ - #if (!SCSI_CMD_TIMER_UsingFixedFunction) - #if (SCSI_CMD_TIMER_SoftwareCaptureMode) - SCSI_CMD_TIMER_SetCaptureMode(SCSI_CMD_TIMER_INIT_CAPTURE_MODE); + #if (!Debug_Timer_UsingFixedFunction) + #if (Debug_Timer_SoftwareCaptureMode) + Debug_Timer_SetCaptureMode(Debug_Timer_INIT_CAPTURE_MODE); #endif /* Set Capture Mode for UDB implementation if capture mode is software controlled */ - #if (SCSI_CMD_TIMER_SoftwareTriggerMode) - if (0u == (SCSI_CMD_TIMER_CONTROL & SCSI_CMD_TIMER__B_TIMER__TM_SOFTWARE)) + #if (Debug_Timer_SoftwareTriggerMode) + if (0u == (Debug_Timer_CONTROL & Debug_Timer__B_TIMER__TM_SOFTWARE)) { - SCSI_CMD_TIMER_SetTriggerMode(SCSI_CMD_TIMER_INIT_TRIGGER_MODE); + Debug_Timer_SetTriggerMode(Debug_Timer_INIT_TRIGGER_MODE); } #endif /* Set trigger mode for UDB Implementation if trigger mode is software controlled */ /* CyEnterCriticalRegion and CyExitCriticalRegion are used to mark following region critical*/ /* Enter Critical Region*/ - SCSI_CMD_TIMER_interruptState = CyEnterCriticalSection(); + Debug_Timer_interruptState = CyEnterCriticalSection(); /* Use the interrupt output of the status register for IRQ output */ - SCSI_CMD_TIMER_STATUS_AUX_CTRL |= SCSI_CMD_TIMER_STATUS_ACTL_INT_EN_MASK; + Debug_Timer_STATUS_AUX_CTRL |= Debug_Timer_STATUS_ACTL_INT_EN_MASK; /* Exit Critical Region*/ - CyExitCriticalSection(SCSI_CMD_TIMER_interruptState); + CyExitCriticalSection(Debug_Timer_interruptState); - #if (SCSI_CMD_TIMER_EnableTriggerMode) - SCSI_CMD_TIMER_EnableTrigger(); + #if (Debug_Timer_EnableTriggerMode) + Debug_Timer_EnableTrigger(); #endif /* Set Trigger enable bit for UDB implementation in the control register*/ - #if (SCSI_CMD_TIMER_InterruptOnCaptureCount) - #if (!SCSI_CMD_TIMER_ControlRegRemoved) - SCSI_CMD_TIMER_SetInterruptCount(SCSI_CMD_TIMER_INIT_INT_CAPTURE_COUNT); + #if (Debug_Timer_InterruptOnCaptureCount) + #if (!Debug_Timer_ControlRegRemoved) + Debug_Timer_SetInterruptCount(Debug_Timer_INIT_INT_CAPTURE_COUNT); #endif /* Set interrupt count in control register if control register is not removed */ #endif /*Set interrupt count in UDB implementation if interrupt count feature is checked.*/ - SCSI_CMD_TIMER_ClearFIFO(); + Debug_Timer_ClearFIFO(); #endif /* Configure additional features of UDB implementation */ - SCSI_CMD_TIMER_SetInterruptMode(SCSI_CMD_TIMER_INIT_INTERRUPT_MODE); + Debug_Timer_SetInterruptMode(Debug_Timer_INIT_INTERRUPT_MODE); } /******************************************************************************* -* Function Name: SCSI_CMD_TIMER_Enable +* Function Name: Debug_Timer_Enable ******************************************************************************** * * Summary: @@ -176,23 +176,23 @@ void SCSI_CMD_TIMER_Init(void) * void * *******************************************************************************/ -void SCSI_CMD_TIMER_Enable(void) +void Debug_Timer_Enable(void) { /* Globally Enable the Fixed Function Block chosen */ - #if (SCSI_CMD_TIMER_UsingFixedFunction) - SCSI_CMD_TIMER_GLOBAL_ENABLE |= SCSI_CMD_TIMER_BLOCK_EN_MASK; - SCSI_CMD_TIMER_GLOBAL_STBY_ENABLE |= SCSI_CMD_TIMER_BLOCK_STBY_EN_MASK; + #if (Debug_Timer_UsingFixedFunction) + Debug_Timer_GLOBAL_ENABLE |= Debug_Timer_BLOCK_EN_MASK; + Debug_Timer_GLOBAL_STBY_ENABLE |= Debug_Timer_BLOCK_STBY_EN_MASK; #endif /* Set Enable bit for enabling Fixed function timer*/ /* Remove assignment if control register is removed */ - #if (!SCSI_CMD_TIMER_ControlRegRemoved || SCSI_CMD_TIMER_UsingFixedFunction) - SCSI_CMD_TIMER_CONTROL |= SCSI_CMD_TIMER_CTRL_ENABLE; + #if (!Debug_Timer_ControlRegRemoved || Debug_Timer_UsingFixedFunction) + Debug_Timer_CONTROL |= Debug_Timer_CTRL_ENABLE; #endif /* Remove assignment if control register is removed */ } /******************************************************************************* -* Function Name: SCSI_CMD_TIMER_Start +* Function Name: Debug_Timer_Start ******************************************************************************** * * Summary: @@ -207,26 +207,26 @@ void SCSI_CMD_TIMER_Enable(void) * void * * Global variables: -* SCSI_CMD_TIMER_initVar: Is modified when this function is called for the +* Debug_Timer_initVar: Is modified when this function is called for the * first time. Is used to ensure that initialization happens only once. * *******************************************************************************/ -void SCSI_CMD_TIMER_Start(void) +void Debug_Timer_Start(void) { - if(SCSI_CMD_TIMER_initVar == 0u) + if(Debug_Timer_initVar == 0u) { - SCSI_CMD_TIMER_Init(); + Debug_Timer_Init(); - SCSI_CMD_TIMER_initVar = 1u; /* Clear this bit for Initialization */ + Debug_Timer_initVar = 1u; /* Clear this bit for Initialization */ } /* Enable the Timer */ - SCSI_CMD_TIMER_Enable(); + Debug_Timer_Enable(); } /******************************************************************************* -* Function Name: SCSI_CMD_TIMER_Stop +* Function Name: Debug_Timer_Stop ******************************************************************************** * * Summary: @@ -243,23 +243,23 @@ void SCSI_CMD_TIMER_Start(void) * has no effect on the operation of the timer. * *******************************************************************************/ -void SCSI_CMD_TIMER_Stop(void) +void Debug_Timer_Stop(void) { /* Disable Timer */ - #if(!SCSI_CMD_TIMER_ControlRegRemoved || SCSI_CMD_TIMER_UsingFixedFunction) - SCSI_CMD_TIMER_CONTROL &= ((uint8)(~SCSI_CMD_TIMER_CTRL_ENABLE)); + #if(!Debug_Timer_ControlRegRemoved || Debug_Timer_UsingFixedFunction) + Debug_Timer_CONTROL &= ((uint8)(~Debug_Timer_CTRL_ENABLE)); #endif /* Remove assignment if control register is removed */ /* Globally disable the Fixed Function Block chosen */ - #if (SCSI_CMD_TIMER_UsingFixedFunction) - SCSI_CMD_TIMER_GLOBAL_ENABLE &= ((uint8)(~SCSI_CMD_TIMER_BLOCK_EN_MASK)); - SCSI_CMD_TIMER_GLOBAL_STBY_ENABLE &= ((uint8)(~SCSI_CMD_TIMER_BLOCK_STBY_EN_MASK)); + #if (Debug_Timer_UsingFixedFunction) + Debug_Timer_GLOBAL_ENABLE &= ((uint8)(~Debug_Timer_BLOCK_EN_MASK)); + Debug_Timer_GLOBAL_STBY_ENABLE &= ((uint8)(~Debug_Timer_BLOCK_STBY_EN_MASK)); #endif /* Disable global enable for the Timer Fixed function block to stop the Timer*/ } /******************************************************************************* -* Function Name: SCSI_CMD_TIMER_SetInterruptMode +* Function Name: Debug_Timer_SetInterruptMode ******************************************************************************** * * Summary: @@ -275,14 +275,14 @@ void SCSI_CMD_TIMER_Stop(void) * void * *******************************************************************************/ -void SCSI_CMD_TIMER_SetInterruptMode(uint8 interruptMode) +void Debug_Timer_SetInterruptMode(uint8 interruptMode) { - SCSI_CMD_TIMER_STATUS_MASK = interruptMode; + Debug_Timer_STATUS_MASK = interruptMode; } /******************************************************************************* -* Function Name: SCSI_CMD_TIMER_SoftwareCapture +* Function Name: Debug_Timer_SoftwareCapture ******************************************************************************** * * Summary: @@ -298,16 +298,16 @@ void SCSI_CMD_TIMER_SetInterruptMode(uint8 interruptMode) * An existing hardware capture could be overwritten. * *******************************************************************************/ -void SCSI_CMD_TIMER_SoftwareCapture(void) +void Debug_Timer_SoftwareCapture(void) { /* Generate a software capture by reading the counter register */ - (void)SCSI_CMD_TIMER_COUNTER_LSB; + (void)Debug_Timer_COUNTER_LSB; /* Capture Data is now in the FIFO */ } /******************************************************************************* -* Function Name: SCSI_CMD_TIMER_ReadStatusRegister +* Function Name: Debug_Timer_ReadStatusRegister ******************************************************************************** * * Summary: @@ -325,17 +325,17 @@ void SCSI_CMD_TIMER_SoftwareCapture(void) * Status register bits may be clear on read. * *******************************************************************************/ -uint8 SCSI_CMD_TIMER_ReadStatusRegister(void) +uint8 Debug_Timer_ReadStatusRegister(void) { - return (SCSI_CMD_TIMER_STATUS); + return (Debug_Timer_STATUS); } -#if (!SCSI_CMD_TIMER_ControlRegRemoved) /* Remove API if control register is removed */ +#if (!Debug_Timer_ControlRegRemoved) /* Remove API if control register is removed */ /******************************************************************************* -* Function Name: SCSI_CMD_TIMER_ReadControlRegister +* Function Name: Debug_Timer_ReadControlRegister ******************************************************************************** * * Summary: @@ -348,14 +348,14 @@ uint8 SCSI_CMD_TIMER_ReadStatusRegister(void) * The contents of the control register * *******************************************************************************/ -uint8 SCSI_CMD_TIMER_ReadControlRegister(void) +uint8 Debug_Timer_ReadControlRegister(void) { - return ((uint8)SCSI_CMD_TIMER_CONTROL); + return ((uint8)Debug_Timer_CONTROL); } /******************************************************************************* -* Function Name: SCSI_CMD_TIMER_WriteControlRegister +* Function Name: Debug_Timer_WriteControlRegister ******************************************************************************** * * Summary: @@ -367,15 +367,15 @@ uint8 SCSI_CMD_TIMER_ReadControlRegister(void) * Return: * *******************************************************************************/ -void SCSI_CMD_TIMER_WriteControlRegister(uint8 control) +void Debug_Timer_WriteControlRegister(uint8 control) { - SCSI_CMD_TIMER_CONTROL = control; + Debug_Timer_CONTROL = control; } #endif /* Remove API if control register is removed */ /******************************************************************************* -* Function Name: SCSI_CMD_TIMER_ReadPeriod +* Function Name: Debug_Timer_ReadPeriod ******************************************************************************** * * Summary: @@ -388,18 +388,18 @@ void SCSI_CMD_TIMER_WriteControlRegister(uint8 control) * The present value of the counter. * *******************************************************************************/ -uint16 SCSI_CMD_TIMER_ReadPeriod(void) +uint16 Debug_Timer_ReadPeriod(void) { - #if(SCSI_CMD_TIMER_UsingFixedFunction) - return ((uint16)CY_GET_REG16(SCSI_CMD_TIMER_PERIOD_LSB_PTR)); + #if(Debug_Timer_UsingFixedFunction) + return ((uint16)CY_GET_REG16(Debug_Timer_PERIOD_LSB_PTR)); #else - return (CY_GET_REG16(SCSI_CMD_TIMER_PERIOD_LSB_PTR)); - #endif /* (SCSI_CMD_TIMER_UsingFixedFunction) */ + return (CY_GET_REG16(Debug_Timer_PERIOD_LSB_PTR)); + #endif /* (Debug_Timer_UsingFixedFunction) */ } /******************************************************************************* -* Function Name: SCSI_CMD_TIMER_WritePeriod +* Function Name: Debug_Timer_WritePeriod ******************************************************************************** * * Summary: @@ -414,19 +414,19 @@ uint16 SCSI_CMD_TIMER_ReadPeriod(void) * void * *******************************************************************************/ -void SCSI_CMD_TIMER_WritePeriod(uint16 period) +void Debug_Timer_WritePeriod(uint16 period) { - #if(SCSI_CMD_TIMER_UsingFixedFunction) + #if(Debug_Timer_UsingFixedFunction) uint16 period_temp = (uint16)period; - CY_SET_REG16(SCSI_CMD_TIMER_PERIOD_LSB_PTR, period_temp); + CY_SET_REG16(Debug_Timer_PERIOD_LSB_PTR, period_temp); #else - CY_SET_REG16(SCSI_CMD_TIMER_PERIOD_LSB_PTR, period); + CY_SET_REG16(Debug_Timer_PERIOD_LSB_PTR, period); #endif /*Write Period value with appropriate resolution suffix depending on UDB or fixed function implementation */ } /******************************************************************************* -* Function Name: SCSI_CMD_TIMER_ReadCapture +* Function Name: Debug_Timer_ReadCapture ******************************************************************************** * * Summary: @@ -439,18 +439,18 @@ void SCSI_CMD_TIMER_WritePeriod(uint16 period) * Present Capture value. * *******************************************************************************/ -uint16 SCSI_CMD_TIMER_ReadCapture(void) +uint16 Debug_Timer_ReadCapture(void) { - #if(SCSI_CMD_TIMER_UsingFixedFunction) - return ((uint16)CY_GET_REG16(SCSI_CMD_TIMER_CAPTURE_LSB_PTR)); + #if(Debug_Timer_UsingFixedFunction) + return ((uint16)CY_GET_REG16(Debug_Timer_CAPTURE_LSB_PTR)); #else - return (CY_GET_REG16(SCSI_CMD_TIMER_CAPTURE_LSB_PTR)); - #endif /* (SCSI_CMD_TIMER_UsingFixedFunction) */ + return (CY_GET_REG16(Debug_Timer_CAPTURE_LSB_PTR)); + #endif /* (Debug_Timer_UsingFixedFunction) */ } /******************************************************************************* -* Function Name: SCSI_CMD_TIMER_WriteCounter +* Function Name: Debug_Timer_WriteCounter ******************************************************************************** * * Summary: @@ -463,23 +463,23 @@ uint16 SCSI_CMD_TIMER_ReadCapture(void) * void * *******************************************************************************/ -void SCSI_CMD_TIMER_WriteCounter(uint16 counter) \ +void Debug_Timer_WriteCounter(uint16 counter) \ { - #if(SCSI_CMD_TIMER_UsingFixedFunction) + #if(Debug_Timer_UsingFixedFunction) /* This functionality is removed until a FixedFunction HW update to * allow this register to be written */ - CY_SET_REG16(SCSI_CMD_TIMER_COUNTER_LSB_PTR, (uint16)counter); + CY_SET_REG16(Debug_Timer_COUNTER_LSB_PTR, (uint16)counter); #else - CY_SET_REG16(SCSI_CMD_TIMER_COUNTER_LSB_PTR, counter); + CY_SET_REG16(Debug_Timer_COUNTER_LSB_PTR, counter); #endif /* Set Write Counter only for the UDB implementation (Write Counter not available in fixed function Timer */ } /******************************************************************************* -* Function Name: SCSI_CMD_TIMER_ReadCounter +* Function Name: Debug_Timer_ReadCounter ******************************************************************************** * * Summary: @@ -492,24 +492,24 @@ void SCSI_CMD_TIMER_WriteCounter(uint16 counter) \ * Present compare value. * *******************************************************************************/ -uint16 SCSI_CMD_TIMER_ReadCounter(void) +uint16 Debug_Timer_ReadCounter(void) { /* Force capture by reading Accumulator */ /* Must first do a software capture to be able to read the counter */ /* It is up to the user code to make sure there isn't already captured data in the FIFO */ - (void)SCSI_CMD_TIMER_COUNTER_LSB; + (void)Debug_Timer_COUNTER_LSB; /* Read the data from the FIFO (or capture register for Fixed Function)*/ - #if(SCSI_CMD_TIMER_UsingFixedFunction) - return ((uint16)CY_GET_REG16(SCSI_CMD_TIMER_CAPTURE_LSB_PTR)); + #if(Debug_Timer_UsingFixedFunction) + return ((uint16)CY_GET_REG16(Debug_Timer_CAPTURE_LSB_PTR)); #else - return (CY_GET_REG16(SCSI_CMD_TIMER_CAPTURE_LSB_PTR)); - #endif /* (SCSI_CMD_TIMER_UsingFixedFunction) */ + return (CY_GET_REG16(Debug_Timer_CAPTURE_LSB_PTR)); + #endif /* (Debug_Timer_UsingFixedFunction) */ } -#if(!SCSI_CMD_TIMER_UsingFixedFunction) /* UDB Specific Functions */ +#if(!Debug_Timer_UsingFixedFunction) /* UDB Specific Functions */ /******************************************************************************* * The functions below this point are only available using the UDB @@ -517,11 +517,11 @@ uint16 SCSI_CMD_TIMER_ReadCounter(void) ******************************************************************************/ -#if (SCSI_CMD_TIMER_SoftwareCaptureMode) +#if (Debug_Timer_SoftwareCaptureMode) /******************************************************************************* -* Function Name: SCSI_CMD_TIMER_SetCaptureMode +* Function Name: Debug_Timer_SetCaptureMode ******************************************************************************** * * Summary: @@ -530,42 +530,42 @@ uint16 SCSI_CMD_TIMER_ReadCounter(void) * Parameters: * captureMode: This parameter sets the capture mode of the UDB capture feature * The parameter values are defined using the -* #define SCSI_CMD_TIMER__B_TIMER__CM_NONE 0 -#define SCSI_CMD_TIMER__B_TIMER__CM_RISINGEDGE 1 -#define SCSI_CMD_TIMER__B_TIMER__CM_FALLINGEDGE 2 -#define SCSI_CMD_TIMER__B_TIMER__CM_EITHEREDGE 3 -#define SCSI_CMD_TIMER__B_TIMER__CM_SOFTWARE 4 +* #define Debug_Timer__B_TIMER__CM_NONE 0 +#define Debug_Timer__B_TIMER__CM_RISINGEDGE 1 +#define Debug_Timer__B_TIMER__CM_FALLINGEDGE 2 +#define Debug_Timer__B_TIMER__CM_EITHEREDGE 3 +#define Debug_Timer__B_TIMER__CM_SOFTWARE 4 identifiers * The following are the possible values of the parameter -* SCSI_CMD_TIMER__B_TIMER__CM_NONE - Set Capture mode to None -* SCSI_CMD_TIMER__B_TIMER__CM_RISINGEDGE - Rising edge of Capture input -* SCSI_CMD_TIMER__B_TIMER__CM_FALLINGEDGE - Falling edge of Capture input -* SCSI_CMD_TIMER__B_TIMER__CM_EITHEREDGE - Either edge of Capture input +* Debug_Timer__B_TIMER__CM_NONE - Set Capture mode to None +* Debug_Timer__B_TIMER__CM_RISINGEDGE - Rising edge of Capture input +* Debug_Timer__B_TIMER__CM_FALLINGEDGE - Falling edge of Capture input +* Debug_Timer__B_TIMER__CM_EITHEREDGE - Either edge of Capture input * * Return: * void * *******************************************************************************/ -void SCSI_CMD_TIMER_SetCaptureMode(uint8 captureMode) +void Debug_Timer_SetCaptureMode(uint8 captureMode) { /* This must only set to two bits of the control register associated */ - captureMode = ((uint8)((uint8)captureMode << SCSI_CMD_TIMER_CTRL_CAP_MODE_SHIFT)); - captureMode &= (SCSI_CMD_TIMER_CTRL_CAP_MODE_MASK); + captureMode = ((uint8)((uint8)captureMode << Debug_Timer_CTRL_CAP_MODE_SHIFT)); + captureMode &= (Debug_Timer_CTRL_CAP_MODE_MASK); /* Clear the Current Setting */ - SCSI_CMD_TIMER_CONTROL &= ((uint8)(~SCSI_CMD_TIMER_CTRL_CAP_MODE_MASK)); + Debug_Timer_CONTROL &= ((uint8)(~Debug_Timer_CTRL_CAP_MODE_MASK)); /* Write The New Setting */ - SCSI_CMD_TIMER_CONTROL |= captureMode; + Debug_Timer_CONTROL |= captureMode; } #endif /* Remove API if Capture Mode is not Software Controlled */ -#if (SCSI_CMD_TIMER_SoftwareTriggerMode) +#if (Debug_Timer_SoftwareTriggerMode) /******************************************************************************* -* Function Name: SCSI_CMD_TIMER_SetTriggerMode +* Function Name: Debug_Timer_SetTriggerMode ******************************************************************************** * * Summary: @@ -573,35 +573,35 @@ void SCSI_CMD_TIMER_SetCaptureMode(uint8 captureMode) * * Parameters: * triggerMode: Pass one of the pre-defined Trigger Modes (except Software) - #define SCSI_CMD_TIMER__B_TIMER__TM_NONE 0x00u - #define SCSI_CMD_TIMER__B_TIMER__TM_RISINGEDGE 0x04u - #define SCSI_CMD_TIMER__B_TIMER__TM_FALLINGEDGE 0x08u - #define SCSI_CMD_TIMER__B_TIMER__TM_EITHEREDGE 0x0Cu - #define SCSI_CMD_TIMER__B_TIMER__TM_SOFTWARE 0x10u + #define Debug_Timer__B_TIMER__TM_NONE 0x00u + #define Debug_Timer__B_TIMER__TM_RISINGEDGE 0x04u + #define Debug_Timer__B_TIMER__TM_FALLINGEDGE 0x08u + #define Debug_Timer__B_TIMER__TM_EITHEREDGE 0x0Cu + #define Debug_Timer__B_TIMER__TM_SOFTWARE 0x10u * * Return: * void * *******************************************************************************/ -void SCSI_CMD_TIMER_SetTriggerMode(uint8 triggerMode) +void Debug_Timer_SetTriggerMode(uint8 triggerMode) { /* This must only set to two bits of the control register associated */ - triggerMode &= SCSI_CMD_TIMER_CTRL_TRIG_MODE_MASK; + triggerMode &= Debug_Timer_CTRL_TRIG_MODE_MASK; /* Clear the Current Setting */ - SCSI_CMD_TIMER_CONTROL &= ((uint8)(~SCSI_CMD_TIMER_CTRL_TRIG_MODE_MASK)); + Debug_Timer_CONTROL &= ((uint8)(~Debug_Timer_CTRL_TRIG_MODE_MASK)); /* Write The New Setting */ - SCSI_CMD_TIMER_CONTROL |= (triggerMode | SCSI_CMD_TIMER__B_TIMER__TM_SOFTWARE); + Debug_Timer_CONTROL |= (triggerMode | Debug_Timer__B_TIMER__TM_SOFTWARE); } #endif /* Remove API if Trigger Mode is not Software Controlled */ -#if (SCSI_CMD_TIMER_EnableTriggerMode) +#if (Debug_Timer_EnableTriggerMode) /******************************************************************************* -* Function Name: SCSI_CMD_TIMER_EnableTrigger +* Function Name: Debug_Timer_EnableTrigger ******************************************************************************** * * Summary: @@ -614,16 +614,16 @@ void SCSI_CMD_TIMER_SetTriggerMode(uint8 triggerMode) * void * *******************************************************************************/ -void SCSI_CMD_TIMER_EnableTrigger(void) +void Debug_Timer_EnableTrigger(void) { - #if (!SCSI_CMD_TIMER_ControlRegRemoved) /* Remove assignment if control register is removed */ - SCSI_CMD_TIMER_CONTROL |= SCSI_CMD_TIMER_CTRL_TRIG_EN; + #if (!Debug_Timer_ControlRegRemoved) /* Remove assignment if control register is removed */ + Debug_Timer_CONTROL |= Debug_Timer_CTRL_TRIG_EN; #endif /* Remove code section if control register is not used */ } /******************************************************************************* -* Function Name: SCSI_CMD_TIMER_DisableTrigger +* Function Name: Debug_Timer_DisableTrigger ******************************************************************************** * * Summary: @@ -636,21 +636,21 @@ void SCSI_CMD_TIMER_EnableTrigger(void) * void * *******************************************************************************/ -void SCSI_CMD_TIMER_DisableTrigger(void) +void Debug_Timer_DisableTrigger(void) { - #if (!SCSI_CMD_TIMER_ControlRegRemoved) /* Remove assignment if control register is removed */ - SCSI_CMD_TIMER_CONTROL &= ((uint8)(~SCSI_CMD_TIMER_CTRL_TRIG_EN)); + #if (!Debug_Timer_ControlRegRemoved) /* Remove assignment if control register is removed */ + Debug_Timer_CONTROL &= ((uint8)(~Debug_Timer_CTRL_TRIG_EN)); #endif /* Remove code section if control register is not used */ } #endif /* Remove API is Trigger Mode is set to None */ -#if(SCSI_CMD_TIMER_InterruptOnCaptureCount) -#if (!SCSI_CMD_TIMER_ControlRegRemoved) /* Remove API if control register is removed */ +#if(Debug_Timer_InterruptOnCaptureCount) +#if (!Debug_Timer_ControlRegRemoved) /* Remove API if control register is removed */ /******************************************************************************* -* Function Name: SCSI_CMD_TIMER_SetInterruptCount +* Function Name: Debug_Timer_SetInterruptCount ******************************************************************************** * * Summary: @@ -666,25 +666,25 @@ void SCSI_CMD_TIMER_DisableTrigger(void) * void * *******************************************************************************/ -void SCSI_CMD_TIMER_SetInterruptCount(uint8 interruptCount) +void Debug_Timer_SetInterruptCount(uint8 interruptCount) { /* This must only set to two bits of the control register associated */ - interruptCount &= SCSI_CMD_TIMER_CTRL_INTCNT_MASK; + interruptCount &= Debug_Timer_CTRL_INTCNT_MASK; /* Clear the Current Setting */ - SCSI_CMD_TIMER_CONTROL &= ((uint8)(~SCSI_CMD_TIMER_CTRL_INTCNT_MASK)); + Debug_Timer_CONTROL &= ((uint8)(~Debug_Timer_CTRL_INTCNT_MASK)); /* Write The New Setting */ - SCSI_CMD_TIMER_CONTROL |= interruptCount; + Debug_Timer_CONTROL |= interruptCount; } #endif /* Remove API if control register is removed */ -#endif /* SCSI_CMD_TIMER_InterruptOnCaptureCount */ +#endif /* Debug_Timer_InterruptOnCaptureCount */ -#if (SCSI_CMD_TIMER_UsingHWCaptureCounter) +#if (Debug_Timer_UsingHWCaptureCounter) /******************************************************************************* -* Function Name: SCSI_CMD_TIMER_SetCaptureCount +* Function Name: Debug_Timer_SetCaptureCount ******************************************************************************** * * Summary: @@ -699,14 +699,14 @@ void SCSI_CMD_TIMER_SetInterruptCount(uint8 interruptCount) * void * *******************************************************************************/ -void SCSI_CMD_TIMER_SetCaptureCount(uint8 captureCount) +void Debug_Timer_SetCaptureCount(uint8 captureCount) { - SCSI_CMD_TIMER_CAP_COUNT = captureCount; + Debug_Timer_CAP_COUNT = captureCount; } /******************************************************************************* -* Function Name: SCSI_CMD_TIMER_ReadCaptureCount +* Function Name: Debug_Timer_ReadCaptureCount ******************************************************************************** * * Summary: @@ -719,15 +719,15 @@ void SCSI_CMD_TIMER_SetCaptureCount(uint8 captureCount) * Returns the Capture Count Setting * *******************************************************************************/ -uint8 SCSI_CMD_TIMER_ReadCaptureCount(void) +uint8 Debug_Timer_ReadCaptureCount(void) { - return ((uint8)SCSI_CMD_TIMER_CAP_COUNT); + return ((uint8)Debug_Timer_CAP_COUNT); } -#endif /* SCSI_CMD_TIMER_UsingHWCaptureCounter */ +#endif /* Debug_Timer_UsingHWCaptureCounter */ /******************************************************************************* -* Function Name: SCSI_CMD_TIMER_ClearFIFO +* Function Name: Debug_Timer_ClearFIFO ******************************************************************************** * * Summary: @@ -740,11 +740,11 @@ uint8 SCSI_CMD_TIMER_ReadCaptureCount(void) * void * *******************************************************************************/ -void SCSI_CMD_TIMER_ClearFIFO(void) +void Debug_Timer_ClearFIFO(void) { - while(0u != (SCSI_CMD_TIMER_ReadStatusRegister() & SCSI_CMD_TIMER_STATUS_FIFONEMP)) + while(0u != (Debug_Timer_ReadStatusRegister() & Debug_Timer_STATUS_FIFONEMP)) { - (void)SCSI_CMD_TIMER_ReadCapture(); + (void)Debug_Timer_ReadCapture(); } } diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/Debug_Timer.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/Debug_Timer.h new file mode 100755 index 0000000..2170009 --- /dev/null +++ b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/Debug_Timer.h @@ -0,0 +1,439 @@ +/******************************************************************************* +* File Name: Debug_Timer.h +* Version 2.50 +* +* Description: +* Contains the function prototypes and constants available to the timer +* user module. +* +* Note: +* None +* +******************************************************************************** +* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved. +* You may use this file only in accordance with the license, terms, conditions, +* disclaimers, and limitations in the end user license agreement accompanying +* the software package with which this file was provided. +********************************************************************************/ + +#if !defined(CY_Timer_v2_30_Debug_Timer_H) +#define CY_Timer_v2_30_Debug_Timer_H + +#include "cytypes.h" +#include "cyfitter.h" +#include "CyLib.h" /* For CyEnterCriticalSection() and CyExitCriticalSection() functions */ + +extern uint8 Debug_Timer_initVar; + +/* Check to see if required defines such as CY_PSOC5LP are available */ +/* They are defined starting with cy_boot v3.0 */ +#if !defined (CY_PSOC5LP) + #error Component Timer_v2_50 requires cy_boot v3.0 or later +#endif /* (CY_ PSOC5LP) */ + + +/************************************** +* Parameter Defaults +**************************************/ + +#define Debug_Timer_Resolution 16u +#define Debug_Timer_UsingFixedFunction 1u +#define Debug_Timer_UsingHWCaptureCounter 0u +#define Debug_Timer_SoftwareCaptureMode 0u +#define Debug_Timer_SoftwareTriggerMode 0u +#define Debug_Timer_UsingHWEnable 0u +#define Debug_Timer_EnableTriggerMode 0u +#define Debug_Timer_InterruptOnCaptureCount 0u +#define Debug_Timer_RunModeUsed 0u +#define Debug_Timer_ControlRegRemoved 0u + + +/*************************************** +* Type defines +***************************************/ + + +/************************************************************************** + * Sleep Wakeup Backup structure for Timer Component + *************************************************************************/ +typedef struct +{ + uint8 TimerEnableState; + #if(!Debug_Timer_UsingFixedFunction) + #if (CY_UDB_V0) + uint16 TimerUdb; /* Timer internal counter value */ + uint16 TimerPeriod; /* Timer Period value */ + uint8 InterruptMaskValue; /* Timer Compare Value */ + #if (Debug_Timer_UsingHWCaptureCounter) + uint8 TimerCaptureCounter; /* Timer Capture Counter Value */ + #endif /* variable declaration for backing up Capture Counter value*/ + #endif /* variables for non retention registers in CY_UDB_V0 */ + + #if (CY_UDB_V1) + uint16 TimerUdb; + uint8 InterruptMaskValue; + #if (Debug_Timer_UsingHWCaptureCounter) + uint8 TimerCaptureCounter; + #endif /* variable declarations for backing up non retention registers in CY_UDB_V1 */ + #endif /* (CY_UDB_V1) */ + + #if (!Debug_Timer_ControlRegRemoved) + uint8 TimerControlRegister; + #endif /* variable declaration for backing up enable state of the Timer */ + #endif /* define backup variables only for UDB implementation. Fixed function registers are all retention */ +}Debug_Timer_backupStruct; + + +/*************************************** +* Function Prototypes +***************************************/ + +void Debug_Timer_Start(void) ; +void Debug_Timer_Stop(void) ; + +void Debug_Timer_SetInterruptMode(uint8 interruptMode) ; +uint8 Debug_Timer_ReadStatusRegister(void) ; +/* Deprecated function. Do not use this in future. Retained for backward compatibility */ +#define Debug_Timer_GetInterruptSource() Debug_Timer_ReadStatusRegister() + +#if(!Debug_Timer_ControlRegRemoved) + uint8 Debug_Timer_ReadControlRegister(void) ; + void Debug_Timer_WriteControlRegister(uint8 control) \ + ; +#endif /* (!Debug_Timer_ControlRegRemoved) */ + +uint16 Debug_Timer_ReadPeriod(void) ; +void Debug_Timer_WritePeriod(uint16 period) \ + ; +uint16 Debug_Timer_ReadCounter(void) ; +void Debug_Timer_WriteCounter(uint16 counter) \ + ; +uint16 Debug_Timer_ReadCapture(void) ; +void Debug_Timer_SoftwareCapture(void) ; + + +#if(!Debug_Timer_UsingFixedFunction) /* UDB Prototypes */ + #if (Debug_Timer_SoftwareCaptureMode) + void Debug_Timer_SetCaptureMode(uint8 captureMode) ; + #endif /* (!Debug_Timer_UsingFixedFunction) */ + + #if (Debug_Timer_SoftwareTriggerMode) + void Debug_Timer_SetTriggerMode(uint8 triggerMode) ; + #endif /* (Debug_Timer_SoftwareTriggerMode) */ + #if (Debug_Timer_EnableTriggerMode) + void Debug_Timer_EnableTrigger(void) ; + void Debug_Timer_DisableTrigger(void) ; + #endif /* (Debug_Timer_EnableTriggerMode) */ + + #if(Debug_Timer_InterruptOnCaptureCount) + #if(!Debug_Timer_ControlRegRemoved) + void Debug_Timer_SetInterruptCount(uint8 interruptCount) \ + ; + #endif /* (!Debug_Timer_ControlRegRemoved) */ + #endif /* (Debug_Timer_InterruptOnCaptureCount) */ + + #if (Debug_Timer_UsingHWCaptureCounter) + void Debug_Timer_SetCaptureCount(uint8 captureCount) \ + ; + uint8 Debug_Timer_ReadCaptureCount(void) ; + #endif /* (Debug_Timer_UsingHWCaptureCounter) */ + + void Debug_Timer_ClearFIFO(void) ; +#endif /* UDB Prototypes */ + +/* Sleep Retention APIs */ +void Debug_Timer_Init(void) ; +void Debug_Timer_Enable(void) ; +void Debug_Timer_SaveConfig(void) ; +void Debug_Timer_RestoreConfig(void) ; +void Debug_Timer_Sleep(void) ; +void Debug_Timer_Wakeup(void) ; + + +/*************************************** +* Enumerated Types and Parameters +***************************************/ + +/* Enumerated Type B_Timer__CaptureModes, Used in Capture Mode */ +#define Debug_Timer__B_TIMER__CM_NONE 0 +#define Debug_Timer__B_TIMER__CM_RISINGEDGE 1 +#define Debug_Timer__B_TIMER__CM_FALLINGEDGE 2 +#define Debug_Timer__B_TIMER__CM_EITHEREDGE 3 +#define Debug_Timer__B_TIMER__CM_SOFTWARE 4 + + + +/* Enumerated Type B_Timer__TriggerModes, Used in Trigger Mode */ +#define Debug_Timer__B_TIMER__TM_NONE 0x00u +#define Debug_Timer__B_TIMER__TM_RISINGEDGE 0x04u +#define Debug_Timer__B_TIMER__TM_FALLINGEDGE 0x08u +#define Debug_Timer__B_TIMER__TM_EITHEREDGE 0x0Cu +#define Debug_Timer__B_TIMER__TM_SOFTWARE 0x10u + + +/*************************************** +* Initialial Parameter Constants +***************************************/ + +#define Debug_Timer_INIT_PERIOD 31999u +#define Debug_Timer_INIT_CAPTURE_MODE ((uint8)((uint8)0u << Debug_Timer_CTRL_CAP_MODE_SHIFT)) +#define Debug_Timer_INIT_TRIGGER_MODE ((uint8)((uint8)0u << Debug_Timer_CTRL_TRIG_MODE_SHIFT)) +#if (Debug_Timer_UsingFixedFunction) + #define Debug_Timer_INIT_INTERRUPT_MODE (((uint8)((uint8)0u << Debug_Timer_STATUS_TC_INT_MASK_SHIFT)) | \ + ((uint8)((uint8)0 << Debug_Timer_STATUS_CAPTURE_INT_MASK_SHIFT))) +#else + #define Debug_Timer_INIT_INTERRUPT_MODE (((uint8)((uint8)0u << Debug_Timer_STATUS_TC_INT_MASK_SHIFT)) | \ + ((uint8)((uint8)0 << Debug_Timer_STATUS_CAPTURE_INT_MASK_SHIFT)) | \ + ((uint8)((uint8)0 << Debug_Timer_STATUS_FIFOFULL_INT_MASK_SHIFT))) +#endif /* (Debug_Timer_UsingFixedFunction) */ +#define Debug_Timer_INIT_CAPTURE_COUNT (2u) +#define Debug_Timer_INIT_INT_CAPTURE_COUNT ((uint8)((uint8)(1u - 1u) << Debug_Timer_CTRL_INTCNT_SHIFT)) + + +/*************************************** +* Registers +***************************************/ + +#if (Debug_Timer_UsingFixedFunction) /* Implementation Specific Registers and Register Constants */ + + + /*************************************** + * Fixed Function Registers + ***************************************/ + + #define Debug_Timer_STATUS (*(reg8 *) Debug_Timer_TimerHW__SR0 ) + /* In Fixed Function Block Status and Mask are the same register */ + #define Debug_Timer_STATUS_MASK (*(reg8 *) Debug_Timer_TimerHW__SR0 ) + #define Debug_Timer_CONTROL (*(reg8 *) Debug_Timer_TimerHW__CFG0) + #define Debug_Timer_CONTROL2 (*(reg8 *) Debug_Timer_TimerHW__CFG1) + #define Debug_Timer_CONTROL2_PTR ( (reg8 *) Debug_Timer_TimerHW__CFG1) + #define Debug_Timer_RT1 (*(reg8 *) Debug_Timer_TimerHW__RT1) + #define Debug_Timer_RT1_PTR ( (reg8 *) Debug_Timer_TimerHW__RT1) + + #if (CY_PSOC3 || CY_PSOC5LP) + #define Debug_Timer_CONTROL3 (*(reg8 *) Debug_Timer_TimerHW__CFG2) + #define Debug_Timer_CONTROL3_PTR ( (reg8 *) Debug_Timer_TimerHW__CFG2) + #endif /* (CY_PSOC3 || CY_PSOC5LP) */ + #define Debug_Timer_GLOBAL_ENABLE (*(reg8 *) Debug_Timer_TimerHW__PM_ACT_CFG) + #define Debug_Timer_GLOBAL_STBY_ENABLE (*(reg8 *) Debug_Timer_TimerHW__PM_STBY_CFG) + + #define Debug_Timer_CAPTURE_LSB (* (reg16 *) Debug_Timer_TimerHW__CAP0 ) + #define Debug_Timer_CAPTURE_LSB_PTR ((reg16 *) Debug_Timer_TimerHW__CAP0 ) + #define Debug_Timer_PERIOD_LSB (* (reg16 *) Debug_Timer_TimerHW__PER0 ) + #define Debug_Timer_PERIOD_LSB_PTR ((reg16 *) Debug_Timer_TimerHW__PER0 ) + #define Debug_Timer_COUNTER_LSB (* (reg16 *) Debug_Timer_TimerHW__CNT_CMP0 ) + #define Debug_Timer_COUNTER_LSB_PTR ((reg16 *) Debug_Timer_TimerHW__CNT_CMP0 ) + + + /*************************************** + * Register Constants + ***************************************/ + + /* Fixed Function Block Chosen */ + #define Debug_Timer_BLOCK_EN_MASK Debug_Timer_TimerHW__PM_ACT_MSK + #define Debug_Timer_BLOCK_STBY_EN_MASK Debug_Timer_TimerHW__PM_STBY_MSK + + /* Control Register Bit Locations */ + /* Interrupt Count - Not valid for Fixed Function Block */ + #define Debug_Timer_CTRL_INTCNT_SHIFT 0x00u + /* Trigger Polarity - Not valid for Fixed Function Block */ + #define Debug_Timer_CTRL_TRIG_MODE_SHIFT 0x00u + /* Trigger Enable - Not valid for Fixed Function Block */ + #define Debug_Timer_CTRL_TRIG_EN_SHIFT 0x00u + /* Capture Polarity - Not valid for Fixed Function Block */ + #define Debug_Timer_CTRL_CAP_MODE_SHIFT 0x00u + /* Timer Enable - As defined in Register Map, part of TMRX_CFG0 register */ + #define Debug_Timer_CTRL_ENABLE_SHIFT 0x00u + + /* Control Register Bit Masks */ + #define Debug_Timer_CTRL_ENABLE ((uint8)((uint8)0x01u << Debug_Timer_CTRL_ENABLE_SHIFT)) + + /* Control2 Register Bit Masks */ + /* As defined in Register Map, Part of the TMRX_CFG1 register */ + #define Debug_Timer_CTRL2_IRQ_SEL_SHIFT 0x00u + #define Debug_Timer_CTRL2_IRQ_SEL ((uint8)((uint8)0x01u << Debug_Timer_CTRL2_IRQ_SEL_SHIFT)) + + #if (CY_PSOC5A) + /* Use CFG1 Mode bits to set run mode */ + /* As defined by Verilog Implementation */ + #define Debug_Timer_CTRL_MODE_SHIFT 0x01u + #define Debug_Timer_CTRL_MODE_MASK ((uint8)((uint8)0x07u << Debug_Timer_CTRL_MODE_SHIFT)) + #endif /* (CY_PSOC5A) */ + #if (CY_PSOC3 || CY_PSOC5LP) + /* Control3 Register Bit Locations */ + #define Debug_Timer_CTRL_RCOD_SHIFT 0x02u + #define Debug_Timer_CTRL_ENBL_SHIFT 0x00u + #define Debug_Timer_CTRL_MODE_SHIFT 0x00u + + /* Control3 Register Bit Masks */ + #define Debug_Timer_CTRL_RCOD_MASK ((uint8)((uint8)0x03u << Debug_Timer_CTRL_RCOD_SHIFT)) /* ROD and COD bit masks */ + #define Debug_Timer_CTRL_ENBL_MASK ((uint8)((uint8)0x80u << Debug_Timer_CTRL_ENBL_SHIFT)) /* HW_EN bit mask */ + #define Debug_Timer_CTRL_MODE_MASK ((uint8)((uint8)0x03u << Debug_Timer_CTRL_MODE_SHIFT)) /* Run mode bit mask */ + + #define Debug_Timer_CTRL_RCOD ((uint8)((uint8)0x03u << Debug_Timer_CTRL_RCOD_SHIFT)) + #define Debug_Timer_CTRL_ENBL ((uint8)((uint8)0x80u << Debug_Timer_CTRL_ENBL_SHIFT)) + #endif /* (CY_PSOC3 || CY_PSOC5LP) */ + + /*RT1 Synch Constants: Applicable for PSoC3 and PSoC5LP */ + #define Debug_Timer_RT1_SHIFT 0x04u + /* Sync TC and CMP bit masks */ + #define Debug_Timer_RT1_MASK ((uint8)((uint8)0x03u << Debug_Timer_RT1_SHIFT)) + #define Debug_Timer_SYNC ((uint8)((uint8)0x03u << Debug_Timer_RT1_SHIFT)) + #define Debug_Timer_SYNCDSI_SHIFT 0x00u + /* Sync all DSI inputs with Mask */ + #define Debug_Timer_SYNCDSI_MASK ((uint8)((uint8)0x0Fu << Debug_Timer_SYNCDSI_SHIFT)) + /* Sync all DSI inputs */ + #define Debug_Timer_SYNCDSI_EN ((uint8)((uint8)0x0Fu << Debug_Timer_SYNCDSI_SHIFT)) + + #define Debug_Timer_CTRL_MODE_PULSEWIDTH ((uint8)((uint8)0x01u << Debug_Timer_CTRL_MODE_SHIFT)) + #define Debug_Timer_CTRL_MODE_PERIOD ((uint8)((uint8)0x02u << Debug_Timer_CTRL_MODE_SHIFT)) + #define Debug_Timer_CTRL_MODE_CONTINUOUS ((uint8)((uint8)0x00u << Debug_Timer_CTRL_MODE_SHIFT)) + + /* Status Register Bit Locations */ + /* As defined in Register Map, part of TMRX_SR0 register */ + #define Debug_Timer_STATUS_TC_SHIFT 0x07u + /* As defined in Register Map, part of TMRX_SR0 register, Shared with Compare Status */ + #define Debug_Timer_STATUS_CAPTURE_SHIFT 0x06u + /* As defined in Register Map, part of TMRX_SR0 register */ + #define Debug_Timer_STATUS_TC_INT_MASK_SHIFT (Debug_Timer_STATUS_TC_SHIFT - 0x04u) + /* As defined in Register Map, part of TMRX_SR0 register, Shared with Compare Status */ + #define Debug_Timer_STATUS_CAPTURE_INT_MASK_SHIFT (Debug_Timer_STATUS_CAPTURE_SHIFT - 0x04u) + + /* Status Register Bit Masks */ + #define Debug_Timer_STATUS_TC ((uint8)((uint8)0x01u << Debug_Timer_STATUS_TC_SHIFT)) + #define Debug_Timer_STATUS_CAPTURE ((uint8)((uint8)0x01u << Debug_Timer_STATUS_CAPTURE_SHIFT)) + /* Interrupt Enable Bit-Mask for interrupt on TC */ + #define Debug_Timer_STATUS_TC_INT_MASK ((uint8)((uint8)0x01u << Debug_Timer_STATUS_TC_INT_MASK_SHIFT)) + /* Interrupt Enable Bit-Mask for interrupt on Capture */ + #define Debug_Timer_STATUS_CAPTURE_INT_MASK ((uint8)((uint8)0x01u << Debug_Timer_STATUS_CAPTURE_INT_MASK_SHIFT)) + +#else /* UDB Registers and Register Constants */ + + + /*************************************** + * UDB Registers + ***************************************/ + + #define Debug_Timer_STATUS (* (reg8 *) Debug_Timer_TimerUDB_rstSts_stsreg__STATUS_REG ) + #define Debug_Timer_STATUS_MASK (* (reg8 *) Debug_Timer_TimerUDB_rstSts_stsreg__MASK_REG) + #define Debug_Timer_STATUS_AUX_CTRL (* (reg8 *) Debug_Timer_TimerUDB_rstSts_stsreg__STATUS_AUX_CTL_REG) + #define Debug_Timer_CONTROL (* (reg8 *) Debug_Timer_TimerUDB_sCTRLReg_SyncCtl_ctrlreg__CONTROL_REG ) + + #if(Debug_Timer_Resolution <= 8u) /* 8-bit Timer */ + #define Debug_Timer_CAPTURE_LSB (* (reg8 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__F0_REG ) + #define Debug_Timer_CAPTURE_LSB_PTR ((reg8 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__F0_REG ) + #define Debug_Timer_PERIOD_LSB (* (reg8 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__D0_REG ) + #define Debug_Timer_PERIOD_LSB_PTR ((reg8 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__D0_REG ) + #define Debug_Timer_COUNTER_LSB (* (reg8 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__A0_REG ) + #define Debug_Timer_COUNTER_LSB_PTR ((reg8 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__A0_REG ) + #elif(Debug_Timer_Resolution <= 16u) /* 8-bit Timer */ + #if(CY_PSOC3) /* 8-bit addres space */ + #define Debug_Timer_CAPTURE_LSB (* (reg16 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__F0_REG ) + #define Debug_Timer_CAPTURE_LSB_PTR ((reg16 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__F0_REG ) + #define Debug_Timer_PERIOD_LSB (* (reg16 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__D0_REG ) + #define Debug_Timer_PERIOD_LSB_PTR ((reg16 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__D0_REG ) + #define Debug_Timer_COUNTER_LSB (* (reg16 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__A0_REG ) + #define Debug_Timer_COUNTER_LSB_PTR ((reg16 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__A0_REG ) + #else /* 16-bit address space */ + #define Debug_Timer_CAPTURE_LSB (* (reg16 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__16BIT_F0_REG ) + #define Debug_Timer_CAPTURE_LSB_PTR ((reg16 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__16BIT_F0_REG ) + #define Debug_Timer_PERIOD_LSB (* (reg16 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__16BIT_D0_REG ) + #define Debug_Timer_PERIOD_LSB_PTR ((reg16 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__16BIT_D0_REG ) + #define Debug_Timer_COUNTER_LSB (* (reg16 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__16BIT_A0_REG ) + #define Debug_Timer_COUNTER_LSB_PTR ((reg16 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__16BIT_A0_REG ) + #endif /* CY_PSOC3 */ + #elif(Debug_Timer_Resolution <= 24u)/* 24-bit Timer */ + #define Debug_Timer_CAPTURE_LSB (* (reg32 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__F0_REG ) + #define Debug_Timer_CAPTURE_LSB_PTR ((reg32 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__F0_REG ) + #define Debug_Timer_PERIOD_LSB (* (reg32 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__D0_REG ) + #define Debug_Timer_PERIOD_LSB_PTR ((reg32 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__D0_REG ) + #define Debug_Timer_COUNTER_LSB (* (reg32 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__A0_REG ) + #define Debug_Timer_COUNTER_LSB_PTR ((reg32 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__A0_REG ) + #else /* 32-bit Timer */ + #if(CY_PSOC3 || CY_PSOC5) /* 8-bit address space */ + #define Debug_Timer_CAPTURE_LSB (* (reg32 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__F0_REG ) + #define Debug_Timer_CAPTURE_LSB_PTR ((reg32 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__F0_REG ) + #define Debug_Timer_PERIOD_LSB (* (reg32 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__D0_REG ) + #define Debug_Timer_PERIOD_LSB_PTR ((reg32 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__D0_REG ) + #define Debug_Timer_COUNTER_LSB (* (reg32 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__A0_REG ) + #define Debug_Timer_COUNTER_LSB_PTR ((reg32 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__A0_REG ) + #else /* 32-bit address space */ + #define Debug_Timer_CAPTURE_LSB (* (reg32 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__32BIT_F0_REG ) + #define Debug_Timer_CAPTURE_LSB_PTR ((reg32 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__32BIT_F0_REG ) + #define Debug_Timer_PERIOD_LSB (* (reg32 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__32BIT_D0_REG ) + #define Debug_Timer_PERIOD_LSB_PTR ((reg32 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__32BIT_D0_REG ) + #define Debug_Timer_COUNTER_LSB (* (reg32 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__32BIT_A0_REG ) + #define Debug_Timer_COUNTER_LSB_PTR ((reg32 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__32BIT_A0_REG ) + #endif /* CY_PSOC3 || CY_PSOC5 */ + #endif + + #if (Debug_Timer_UsingHWCaptureCounter) + #define Debug_Timer_CAP_COUNT (*(reg8 *) Debug_Timer_TimerUDB_sCapCount_counter__PERIOD_REG ) + #define Debug_Timer_CAP_COUNT_PTR ( (reg8 *) Debug_Timer_TimerUDB_sCapCount_counter__PERIOD_REG ) + #define Debug_Timer_CAPTURE_COUNT_CTRL (*(reg8 *) Debug_Timer_TimerUDB_sCapCount_counter__CONTROL_AUX_CTL_REG ) + #define Debug_Timer_CAPTURE_COUNT_CTRL_PTR ( (reg8 *) Debug_Timer_TimerUDB_sCapCount_counter__CONTROL_AUX_CTL_REG ) + #endif /* (Debug_Timer_UsingHWCaptureCounter) */ + + + /*************************************** + * Register Constants + ***************************************/ + + /* Control Register Bit Locations */ + #define Debug_Timer_CTRL_INTCNT_SHIFT 0x00u /* As defined by Verilog Implementation */ + #define Debug_Timer_CTRL_TRIG_MODE_SHIFT 0x02u /* As defined by Verilog Implementation */ + #define Debug_Timer_CTRL_TRIG_EN_SHIFT 0x04u /* As defined by Verilog Implementation */ + #define Debug_Timer_CTRL_CAP_MODE_SHIFT 0x05u /* As defined by Verilog Implementation */ + #define Debug_Timer_CTRL_ENABLE_SHIFT 0x07u /* As defined by Verilog Implementation */ + + /* Control Register Bit Masks */ + #define Debug_Timer_CTRL_INTCNT_MASK ((uint8)((uint8)0x03u << Debug_Timer_CTRL_INTCNT_SHIFT)) + #define Debug_Timer_CTRL_TRIG_MODE_MASK ((uint8)((uint8)0x03u << Debug_Timer_CTRL_TRIG_MODE_SHIFT)) + #define Debug_Timer_CTRL_TRIG_EN ((uint8)((uint8)0x01u << Debug_Timer_CTRL_TRIG_EN_SHIFT)) + #define Debug_Timer_CTRL_CAP_MODE_MASK ((uint8)((uint8)0x03u << Debug_Timer_CTRL_CAP_MODE_SHIFT)) + #define Debug_Timer_CTRL_ENABLE ((uint8)((uint8)0x01u << Debug_Timer_CTRL_ENABLE_SHIFT)) + + /* Bit Counter (7-bit) Control Register Bit Definitions */ + /* As defined by the Register map for the AUX Control Register */ + #define Debug_Timer_CNTR_ENABLE 0x20u + + /* Status Register Bit Locations */ + #define Debug_Timer_STATUS_TC_SHIFT 0x00u /* As defined by Verilog Implementation */ + #define Debug_Timer_STATUS_CAPTURE_SHIFT 0x01u /* As defined by Verilog Implementation */ + #define Debug_Timer_STATUS_TC_INT_MASK_SHIFT Debug_Timer_STATUS_TC_SHIFT + #define Debug_Timer_STATUS_CAPTURE_INT_MASK_SHIFT Debug_Timer_STATUS_CAPTURE_SHIFT + #define Debug_Timer_STATUS_FIFOFULL_SHIFT 0x02u /* As defined by Verilog Implementation */ + #define Debug_Timer_STATUS_FIFONEMP_SHIFT 0x03u /* As defined by Verilog Implementation */ + #define Debug_Timer_STATUS_FIFOFULL_INT_MASK_SHIFT Debug_Timer_STATUS_FIFOFULL_SHIFT + + /* Status Register Bit Masks */ + /* Sticky TC Event Bit-Mask */ + #define Debug_Timer_STATUS_TC ((uint8)((uint8)0x01u << Debug_Timer_STATUS_TC_SHIFT)) + /* Sticky Capture Event Bit-Mask */ + #define Debug_Timer_STATUS_CAPTURE ((uint8)((uint8)0x01u << Debug_Timer_STATUS_CAPTURE_SHIFT)) + /* Interrupt Enable Bit-Mask */ + #define Debug_Timer_STATUS_TC_INT_MASK ((uint8)((uint8)0x01u << Debug_Timer_STATUS_TC_SHIFT)) + /* Interrupt Enable Bit-Mask */ + #define Debug_Timer_STATUS_CAPTURE_INT_MASK ((uint8)((uint8)0x01u << Debug_Timer_STATUS_CAPTURE_SHIFT)) + /* NOT-Sticky FIFO Full Bit-Mask */ + #define Debug_Timer_STATUS_FIFOFULL ((uint8)((uint8)0x01u << Debug_Timer_STATUS_FIFOFULL_SHIFT)) + /* NOT-Sticky FIFO Not Empty Bit-Mask */ + #define Debug_Timer_STATUS_FIFONEMP ((uint8)((uint8)0x01u << Debug_Timer_STATUS_FIFONEMP_SHIFT)) + /* Interrupt Enable Bit-Mask */ + #define Debug_Timer_STATUS_FIFOFULL_INT_MASK ((uint8)((uint8)0x01u << Debug_Timer_STATUS_FIFOFULL_SHIFT)) + + #define Debug_Timer_STATUS_ACTL_INT_EN 0x10u /* As defined for the ACTL Register */ + + /* Datapath Auxillary Control Register definitions */ + #define Debug_Timer_AUX_CTRL_FIFO0_CLR 0x01u /* As defined by Register map */ + #define Debug_Timer_AUX_CTRL_FIFO1_CLR 0x02u /* As defined by Register map */ + #define Debug_Timer_AUX_CTRL_FIFO0_LVL 0x04u /* As defined by Register map */ + #define Debug_Timer_AUX_CTRL_FIFO1_LVL 0x08u /* As defined by Register map */ + #define Debug_Timer_STATUS_ACTL_INT_EN_MASK 0x10u /* As defined for the ACTL Register */ + +#endif /* Implementation Specific Registers and Register Constants */ + +#endif /* CY_Timer_v2_30_Debug_Timer_H */ + + +/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_ATN_ISR.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/Debug_Timer_Interrupt.c old mode 100644 new mode 100755 similarity index 68% rename from software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_ATN_ISR.c rename to software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/Debug_Timer_Interrupt.c index 6d75a52..4b0c4a0 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_ATN_ISR.c +++ b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/Debug_Timer_Interrupt.c @@ -1,356 +1,356 @@ -/******************************************************************************* -* File Name: SCSI_ATN_ISR.c -* Version 1.70 -* -* Description: -* API for controlling the state of an interrupt. -* -* -* Note: -* -******************************************************************************** -* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - - -#include -#include -#include - -#if !defined(SCSI_ATN_ISR__REMOVED) /* Check for removal by optimization */ - -/******************************************************************************* -* Place your includes, defines and code here -********************************************************************************/ -/* `#START SCSI_ATN_ISR_intc` */ - -/* `#END` */ - -#ifndef CYINT_IRQ_BASE -#define CYINT_IRQ_BASE 16 -#endif /* CYINT_IRQ_BASE */ -#ifndef CYINT_VECT_TABLE -#define CYINT_VECT_TABLE ((cyisraddress **) CYREG_NVIC_VECT_OFFSET) -#endif /* CYINT_VECT_TABLE */ - -/* Declared in startup, used to set unused interrupts to. */ -CY_ISR_PROTO(IntDefaultHandler); - - -/******************************************************************************* -* Function Name: SCSI_ATN_ISR_Start -******************************************************************************** -* -* Summary: -* Set up the interrupt and enable it. -* -* Parameters: -* None -* -* Return: -* None -* -*******************************************************************************/ -void SCSI_ATN_ISR_Start(void) -{ - /* For all we know the interrupt is active. */ - SCSI_ATN_ISR_Disable(); - - /* Set the ISR to point to the SCSI_ATN_ISR Interrupt. */ - SCSI_ATN_ISR_SetVector(&SCSI_ATN_ISR_Interrupt); - - /* Set the priority. */ - SCSI_ATN_ISR_SetPriority((uint8)SCSI_ATN_ISR_INTC_PRIOR_NUMBER); - - /* Enable it. */ - SCSI_ATN_ISR_Enable(); -} - - -/******************************************************************************* -* Function Name: SCSI_ATN_ISR_StartEx -******************************************************************************** -* -* Summary: -* Set up the interrupt and enable it. -* -* Parameters: -* address: Address of the ISR to set in the interrupt vector table. -* -* Return: -* None -* -*******************************************************************************/ -void SCSI_ATN_ISR_StartEx(cyisraddress address) -{ - /* For all we know the interrupt is active. */ - SCSI_ATN_ISR_Disable(); - - /* Set the ISR to point to the SCSI_ATN_ISR Interrupt. */ - SCSI_ATN_ISR_SetVector(address); - - /* Set the priority. */ - SCSI_ATN_ISR_SetPriority((uint8)SCSI_ATN_ISR_INTC_PRIOR_NUMBER); - - /* Enable it. */ - SCSI_ATN_ISR_Enable(); -} - - -/******************************************************************************* -* Function Name: SCSI_ATN_ISR_Stop -******************************************************************************** -* -* Summary: -* Disables and removes the interrupt. -* -* Parameters: -* -* Return: -* None -* -*******************************************************************************/ -void SCSI_ATN_ISR_Stop(void) -{ - /* Disable this interrupt. */ - SCSI_ATN_ISR_Disable(); - - /* Set the ISR to point to the passive one. */ - SCSI_ATN_ISR_SetVector(&IntDefaultHandler); -} - - -/******************************************************************************* -* Function Name: SCSI_ATN_ISR_Interrupt -******************************************************************************** -* -* Summary: -* The default Interrupt Service Routine for SCSI_ATN_ISR. -* -* Add custom code between the coments to keep the next version of this file -* from over writting your code. -* -* Parameters: -* -* Return: -* None -* -*******************************************************************************/ -CY_ISR(SCSI_ATN_ISR_Interrupt) -{ - /* Place your Interrupt code here. */ - /* `#START SCSI_ATN_ISR_Interrupt` */ - - /* `#END` */ -} - - -/******************************************************************************* -* Function Name: SCSI_ATN_ISR_SetVector -******************************************************************************** -* -* Summary: -* Change the ISR vector for the Interrupt. Note calling SCSI_ATN_ISR_Start -* will override any effect this method would have had. To set the vector -* before the component has been started use SCSI_ATN_ISR_StartEx instead. -* -* Parameters: -* address: Address of the ISR to set in the interrupt vector table. -* -* Return: -* None -* -*******************************************************************************/ -void SCSI_ATN_ISR_SetVector(cyisraddress address) -{ - cyisraddress * ramVectorTable; - - ramVectorTable = (cyisraddress *) *CYINT_VECT_TABLE; - - ramVectorTable[CYINT_IRQ_BASE + (uint32)SCSI_ATN_ISR__INTC_NUMBER] = address; -} - - -/******************************************************************************* -* Function Name: SCSI_ATN_ISR_GetVector -******************************************************************************** -* -* Summary: -* Gets the "address" of the current ISR vector for the Interrupt. -* -* Parameters: -* None -* -* Return: -* Address of the ISR in the interrupt vector table. -* -*******************************************************************************/ -cyisraddress SCSI_ATN_ISR_GetVector(void) -{ - cyisraddress * ramVectorTable; - - ramVectorTable = (cyisraddress *) *CYINT_VECT_TABLE; - - return ramVectorTable[CYINT_IRQ_BASE + (uint32)SCSI_ATN_ISR__INTC_NUMBER]; -} - - -/******************************************************************************* -* Function Name: SCSI_ATN_ISR_SetPriority -******************************************************************************** -* -* Summary: -* Sets the Priority of the Interrupt. Note calling SCSI_ATN_ISR_Start -* or SCSI_ATN_ISR_StartEx will override any effect this method -* would have had. This method should only be called after -* SCSI_ATN_ISR_Start or SCSI_ATN_ISR_StartEx has been called. To set -* the initial priority for the component use the cydwr file in the tool. -* -* Parameters: -* priority: Priority of the interrupt. 0 - 7, 0 being the highest. -* -* Return: -* None -* -*******************************************************************************/ -void SCSI_ATN_ISR_SetPriority(uint8 priority) -{ - *SCSI_ATN_ISR_INTC_PRIOR = priority << 5; -} - - -/******************************************************************************* -* Function Name: SCSI_ATN_ISR_GetPriority -******************************************************************************** -* -* Summary: -* Gets the Priority of the Interrupt. -* -* Parameters: -* None -* -* Return: -* Priority of the interrupt. 0 - 7, 0 being the highest. -* -*******************************************************************************/ -uint8 SCSI_ATN_ISR_GetPriority(void) -{ - uint8 priority; - - - priority = *SCSI_ATN_ISR_INTC_PRIOR >> 5; - - return priority; -} - - -/******************************************************************************* -* Function Name: SCSI_ATN_ISR_Enable -******************************************************************************** -* -* Summary: -* Enables the interrupt. -* -* Parameters: -* None -* -* Return: -* None -* -*******************************************************************************/ -void SCSI_ATN_ISR_Enable(void) -{ - /* Enable the general interrupt. */ - *SCSI_ATN_ISR_INTC_SET_EN = SCSI_ATN_ISR__INTC_MASK; -} - - -/******************************************************************************* -* Function Name: SCSI_ATN_ISR_GetState -******************************************************************************** -* -* Summary: -* Gets the state (enabled, disabled) of the Interrupt. -* -* Parameters: -* None -* -* Return: -* 1 if enabled, 0 if disabled. -* -*******************************************************************************/ -uint8 SCSI_ATN_ISR_GetState(void) -{ - /* Get the state of the general interrupt. */ - return ((*SCSI_ATN_ISR_INTC_SET_EN & (uint32)SCSI_ATN_ISR__INTC_MASK) != 0u) ? 1u:0u; -} - - -/******************************************************************************* -* Function Name: SCSI_ATN_ISR_Disable -******************************************************************************** -* -* Summary: -* Disables the Interrupt. -* -* Parameters: -* None -* -* Return: -* None -* -*******************************************************************************/ -void SCSI_ATN_ISR_Disable(void) -{ - /* Disable the general interrupt. */ - *SCSI_ATN_ISR_INTC_CLR_EN = SCSI_ATN_ISR__INTC_MASK; -} - - -/******************************************************************************* -* Function Name: SCSI_ATN_ISR_SetPending -******************************************************************************** -* -* Summary: -* Causes the Interrupt to enter the pending state, a software method of -* generating the interrupt. -* -* Parameters: -* None -* -* Return: -* None -* -*******************************************************************************/ -void SCSI_ATN_ISR_SetPending(void) -{ - *SCSI_ATN_ISR_INTC_SET_PD = SCSI_ATN_ISR__INTC_MASK; -} - - -/******************************************************************************* -* Function Name: SCSI_ATN_ISR_ClearPending -******************************************************************************** -* -* Summary: -* Clears a pending interrupt. -* -* Parameters: -* None -* -* Return: -* None -* -*******************************************************************************/ -void SCSI_ATN_ISR_ClearPending(void) -{ - *SCSI_ATN_ISR_INTC_CLR_PD = SCSI_ATN_ISR__INTC_MASK; -} - -#endif /* End check for removal by optimization */ - - -/* [] END OF FILE */ +/******************************************************************************* +* File Name: Debug_Timer_Interrupt.c +* Version 1.70 +* +* Description: +* API for controlling the state of an interrupt. +* +* +* Note: +* +******************************************************************************** +* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved. +* You may use this file only in accordance with the license, terms, conditions, +* disclaimers, and limitations in the end user license agreement accompanying +* the software package with which this file was provided. +*******************************************************************************/ + + +#include +#include +#include + +#if !defined(Debug_Timer_Interrupt__REMOVED) /* Check for removal by optimization */ + +/******************************************************************************* +* Place your includes, defines and code here +********************************************************************************/ +/* `#START Debug_Timer_Interrupt_intc` */ + +/* `#END` */ + +#ifndef CYINT_IRQ_BASE +#define CYINT_IRQ_BASE 16 +#endif /* CYINT_IRQ_BASE */ +#ifndef CYINT_VECT_TABLE +#define CYINT_VECT_TABLE ((cyisraddress **) CYREG_NVIC_VECT_OFFSET) +#endif /* CYINT_VECT_TABLE */ + +/* Declared in startup, used to set unused interrupts to. */ +CY_ISR_PROTO(IntDefaultHandler); + + +/******************************************************************************* +* Function Name: Debug_Timer_Interrupt_Start +******************************************************************************** +* +* Summary: +* Set up the interrupt and enable it. +* +* Parameters: +* None +* +* Return: +* None +* +*******************************************************************************/ +void Debug_Timer_Interrupt_Start(void) +{ + /* For all we know the interrupt is active. */ + Debug_Timer_Interrupt_Disable(); + + /* Set the ISR to point to the Debug_Timer_Interrupt Interrupt. */ + Debug_Timer_Interrupt_SetVector(&Debug_Timer_Interrupt_Interrupt); + + /* Set the priority. */ + Debug_Timer_Interrupt_SetPriority((uint8)Debug_Timer_Interrupt_INTC_PRIOR_NUMBER); + + /* Enable it. */ + Debug_Timer_Interrupt_Enable(); +} + + +/******************************************************************************* +* Function Name: Debug_Timer_Interrupt_StartEx +******************************************************************************** +* +* Summary: +* Set up the interrupt and enable it. +* +* Parameters: +* address: Address of the ISR to set in the interrupt vector table. +* +* Return: +* None +* +*******************************************************************************/ +void Debug_Timer_Interrupt_StartEx(cyisraddress address) +{ + /* For all we know the interrupt is active. */ + Debug_Timer_Interrupt_Disable(); + + /* Set the ISR to point to the Debug_Timer_Interrupt Interrupt. */ + Debug_Timer_Interrupt_SetVector(address); + + /* Set the priority. */ + Debug_Timer_Interrupt_SetPriority((uint8)Debug_Timer_Interrupt_INTC_PRIOR_NUMBER); + + /* Enable it. */ + Debug_Timer_Interrupt_Enable(); +} + + +/******************************************************************************* +* Function Name: Debug_Timer_Interrupt_Stop +******************************************************************************** +* +* Summary: +* Disables and removes the interrupt. +* +* Parameters: +* +* Return: +* None +* +*******************************************************************************/ +void Debug_Timer_Interrupt_Stop(void) +{ + /* Disable this interrupt. */ + Debug_Timer_Interrupt_Disable(); + + /* Set the ISR to point to the passive one. */ + Debug_Timer_Interrupt_SetVector(&IntDefaultHandler); +} + + +/******************************************************************************* +* Function Name: Debug_Timer_Interrupt_Interrupt +******************************************************************************** +* +* Summary: +* The default Interrupt Service Routine for Debug_Timer_Interrupt. +* +* Add custom code between the coments to keep the next version of this file +* from over writting your code. +* +* Parameters: +* +* Return: +* None +* +*******************************************************************************/ +CY_ISR(Debug_Timer_Interrupt_Interrupt) +{ + /* Place your Interrupt code here. */ + /* `#START Debug_Timer_Interrupt_Interrupt` */ + + /* `#END` */ +} + + +/******************************************************************************* +* Function Name: Debug_Timer_Interrupt_SetVector +******************************************************************************** +* +* Summary: +* Change the ISR vector for the Interrupt. Note calling Debug_Timer_Interrupt_Start +* will override any effect this method would have had. To set the vector +* before the component has been started use Debug_Timer_Interrupt_StartEx instead. +* +* Parameters: +* address: Address of the ISR to set in the interrupt vector table. +* +* Return: +* None +* +*******************************************************************************/ +void Debug_Timer_Interrupt_SetVector(cyisraddress address) +{ + cyisraddress * ramVectorTable; + + ramVectorTable = (cyisraddress *) *CYINT_VECT_TABLE; + + ramVectorTable[CYINT_IRQ_BASE + (uint32)Debug_Timer_Interrupt__INTC_NUMBER] = address; +} + + +/******************************************************************************* +* Function Name: Debug_Timer_Interrupt_GetVector +******************************************************************************** +* +* Summary: +* Gets the "address" of the current ISR vector for the Interrupt. +* +* Parameters: +* None +* +* Return: +* Address of the ISR in the interrupt vector table. +* +*******************************************************************************/ +cyisraddress Debug_Timer_Interrupt_GetVector(void) +{ + cyisraddress * ramVectorTable; + + ramVectorTable = (cyisraddress *) *CYINT_VECT_TABLE; + + return ramVectorTable[CYINT_IRQ_BASE + (uint32)Debug_Timer_Interrupt__INTC_NUMBER]; +} + + +/******************************************************************************* +* Function Name: Debug_Timer_Interrupt_SetPriority +******************************************************************************** +* +* Summary: +* Sets the Priority of the Interrupt. Note calling Debug_Timer_Interrupt_Start +* or Debug_Timer_Interrupt_StartEx will override any effect this method +* would have had. This method should only be called after +* Debug_Timer_Interrupt_Start or Debug_Timer_Interrupt_StartEx has been called. To set +* the initial priority for the component use the cydwr file in the tool. +* +* Parameters: +* priority: Priority of the interrupt. 0 - 7, 0 being the highest. +* +* Return: +* None +* +*******************************************************************************/ +void Debug_Timer_Interrupt_SetPriority(uint8 priority) +{ + *Debug_Timer_Interrupt_INTC_PRIOR = priority << 5; +} + + +/******************************************************************************* +* Function Name: Debug_Timer_Interrupt_GetPriority +******************************************************************************** +* +* Summary: +* Gets the Priority of the Interrupt. +* +* Parameters: +* None +* +* Return: +* Priority of the interrupt. 0 - 7, 0 being the highest. +* +*******************************************************************************/ +uint8 Debug_Timer_Interrupt_GetPriority(void) +{ + uint8 priority; + + + priority = *Debug_Timer_Interrupt_INTC_PRIOR >> 5; + + return priority; +} + + +/******************************************************************************* +* Function Name: Debug_Timer_Interrupt_Enable +******************************************************************************** +* +* Summary: +* Enables the interrupt. +* +* Parameters: +* None +* +* Return: +* None +* +*******************************************************************************/ +void Debug_Timer_Interrupt_Enable(void) +{ + /* Enable the general interrupt. */ + *Debug_Timer_Interrupt_INTC_SET_EN = Debug_Timer_Interrupt__INTC_MASK; +} + + +/******************************************************************************* +* Function Name: Debug_Timer_Interrupt_GetState +******************************************************************************** +* +* Summary: +* Gets the state (enabled, disabled) of the Interrupt. +* +* Parameters: +* None +* +* Return: +* 1 if enabled, 0 if disabled. +* +*******************************************************************************/ +uint8 Debug_Timer_Interrupt_GetState(void) +{ + /* Get the state of the general interrupt. */ + return ((*Debug_Timer_Interrupt_INTC_SET_EN & (uint32)Debug_Timer_Interrupt__INTC_MASK) != 0u) ? 1u:0u; +} + + +/******************************************************************************* +* Function Name: Debug_Timer_Interrupt_Disable +******************************************************************************** +* +* Summary: +* Disables the Interrupt. +* +* Parameters: +* None +* +* Return: +* None +* +*******************************************************************************/ +void Debug_Timer_Interrupt_Disable(void) +{ + /* Disable the general interrupt. */ + *Debug_Timer_Interrupt_INTC_CLR_EN = Debug_Timer_Interrupt__INTC_MASK; +} + + +/******************************************************************************* +* Function Name: Debug_Timer_Interrupt_SetPending +******************************************************************************** +* +* Summary: +* Causes the Interrupt to enter the pending state, a software method of +* generating the interrupt. +* +* Parameters: +* None +* +* Return: +* None +* +*******************************************************************************/ +void Debug_Timer_Interrupt_SetPending(void) +{ + *Debug_Timer_Interrupt_INTC_SET_PD = Debug_Timer_Interrupt__INTC_MASK; +} + + +/******************************************************************************* +* Function Name: Debug_Timer_Interrupt_ClearPending +******************************************************************************** +* +* Summary: +* Clears a pending interrupt. +* +* Parameters: +* None +* +* Return: +* None +* +*******************************************************************************/ +void Debug_Timer_Interrupt_ClearPending(void) +{ + *Debug_Timer_Interrupt_INTC_CLR_PD = Debug_Timer_Interrupt__INTC_MASK; +} + +#endif /* End check for removal by optimization */ + + +/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/Debug_Timer_Interrupt.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/Debug_Timer_Interrupt.h new file mode 100755 index 0000000..df33d25 --- /dev/null +++ b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/Debug_Timer_Interrupt.h @@ -0,0 +1,70 @@ +/******************************************************************************* +* File Name: Debug_Timer_Interrupt.h +* Version 1.70 +* +* Description: +* Provides the function definitions for the Interrupt Controller. +* +* +******************************************************************************** +* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved. +* You may use this file only in accordance with the license, terms, conditions, +* disclaimers, and limitations in the end user license agreement accompanying +* the software package with which this file was provided. +*******************************************************************************/ +#if !defined(CY_ISR_Debug_Timer_Interrupt_H) +#define CY_ISR_Debug_Timer_Interrupt_H + + +#include +#include + +/* Interrupt Controller API. */ +void Debug_Timer_Interrupt_Start(void); +void Debug_Timer_Interrupt_StartEx(cyisraddress address); +void Debug_Timer_Interrupt_Stop(void); + +CY_ISR_PROTO(Debug_Timer_Interrupt_Interrupt); + +void Debug_Timer_Interrupt_SetVector(cyisraddress address); +cyisraddress Debug_Timer_Interrupt_GetVector(void); + +void Debug_Timer_Interrupt_SetPriority(uint8 priority); +uint8 Debug_Timer_Interrupt_GetPriority(void); + +void Debug_Timer_Interrupt_Enable(void); +uint8 Debug_Timer_Interrupt_GetState(void); +void Debug_Timer_Interrupt_Disable(void); + +void Debug_Timer_Interrupt_SetPending(void); +void Debug_Timer_Interrupt_ClearPending(void); + + +/* Interrupt Controller Constants */ + +/* Address of the INTC.VECT[x] register that contains the Address of the Debug_Timer_Interrupt ISR. */ +#define Debug_Timer_Interrupt_INTC_VECTOR ((reg32 *) Debug_Timer_Interrupt__INTC_VECT) + +/* Address of the Debug_Timer_Interrupt ISR priority. */ +#define Debug_Timer_Interrupt_INTC_PRIOR ((reg8 *) Debug_Timer_Interrupt__INTC_PRIOR_REG) + +/* Priority of the Debug_Timer_Interrupt interrupt. */ +#define Debug_Timer_Interrupt_INTC_PRIOR_NUMBER Debug_Timer_Interrupt__INTC_PRIOR_NUM + +/* Address of the INTC.SET_EN[x] byte to bit enable Debug_Timer_Interrupt interrupt. */ +#define Debug_Timer_Interrupt_INTC_SET_EN ((reg32 *) Debug_Timer_Interrupt__INTC_SET_EN_REG) + +/* Address of the INTC.CLR_EN[x] register to bit clear the Debug_Timer_Interrupt interrupt. */ +#define Debug_Timer_Interrupt_INTC_CLR_EN ((reg32 *) Debug_Timer_Interrupt__INTC_CLR_EN_REG) + +/* Address of the INTC.SET_PD[x] register to set the Debug_Timer_Interrupt interrupt state to pending. */ +#define Debug_Timer_Interrupt_INTC_SET_PD ((reg32 *) Debug_Timer_Interrupt__INTC_SET_PD_REG) + +/* Address of the INTC.CLR_PD[x] register to clear the Debug_Timer_Interrupt interrupt. */ +#define Debug_Timer_Interrupt_INTC_CLR_PD ((reg32 *) Debug_Timer_Interrupt__INTC_CLR_PD_REG) + + +#endif /* CY_ISR_Debug_Timer_Interrupt_H */ + + +/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_CMD_TIMER_PM.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/Debug_Timer_PM.c similarity index 57% rename from software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_CMD_TIMER_PM.c rename to software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/Debug_Timer_PM.c index f9556fa..97f2d96 100755 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_CMD_TIMER_PM.c +++ b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/Debug_Timer_PM.c @@ -1,5 +1,5 @@ /******************************************************************************* -* File Name: SCSI_CMD_TIMER_PM.c +* File Name: Debug_Timer_PM.c * Version 2.50 * * Description: @@ -16,12 +16,12 @@ * the software package with which this file was provided. ********************************************************************************/ -#include "SCSI_CMD_TIMER.h" -static SCSI_CMD_TIMER_backupStruct SCSI_CMD_TIMER_backup; +#include "Debug_Timer.h" +static Debug_Timer_backupStruct Debug_Timer_backup; /******************************************************************************* -* Function Name: SCSI_CMD_TIMER_SaveConfig +* Function Name: Debug_Timer_SaveConfig ******************************************************************************** * * Summary: @@ -34,41 +34,41 @@ static SCSI_CMD_TIMER_backupStruct SCSI_CMD_TIMER_backup; * void * * Global variables: -* SCSI_CMD_TIMER_backup: Variables of this global structure are modified to +* Debug_Timer_backup: Variables of this global structure are modified to * store the values of non retention configuration registers when Sleep() API is * called. * *******************************************************************************/ -void SCSI_CMD_TIMER_SaveConfig(void) +void Debug_Timer_SaveConfig(void) { - #if (!SCSI_CMD_TIMER_UsingFixedFunction) + #if (!Debug_Timer_UsingFixedFunction) /* Backup the UDB non-rentention registers for CY_UDB_V0 */ #if (CY_UDB_V0) - SCSI_CMD_TIMER_backup.TimerUdb = SCSI_CMD_TIMER_ReadCounter(); - SCSI_CMD_TIMER_backup.TimerPeriod = SCSI_CMD_TIMER_ReadPeriod(); - SCSI_CMD_TIMER_backup.InterruptMaskValue = SCSI_CMD_TIMER_STATUS_MASK; - #if (SCSI_CMD_TIMER_UsingHWCaptureCounter) - SCSI_CMD_TIMER_backup.TimerCaptureCounter = SCSI_CMD_TIMER_ReadCaptureCount(); + Debug_Timer_backup.TimerUdb = Debug_Timer_ReadCounter(); + Debug_Timer_backup.TimerPeriod = Debug_Timer_ReadPeriod(); + Debug_Timer_backup.InterruptMaskValue = Debug_Timer_STATUS_MASK; + #if (Debug_Timer_UsingHWCaptureCounter) + Debug_Timer_backup.TimerCaptureCounter = Debug_Timer_ReadCaptureCount(); #endif /* Backup the UDB non-rentention register capture counter for CY_UDB_V0 */ #endif /* Backup the UDB non-rentention registers for CY_UDB_V0 */ #if (CY_UDB_V1) - SCSI_CMD_TIMER_backup.TimerUdb = SCSI_CMD_TIMER_ReadCounter(); - SCSI_CMD_TIMER_backup.InterruptMaskValue = SCSI_CMD_TIMER_STATUS_MASK; - #if (SCSI_CMD_TIMER_UsingHWCaptureCounter) - SCSI_CMD_TIMER_backup.TimerCaptureCounter = SCSI_CMD_TIMER_ReadCaptureCount(); + Debug_Timer_backup.TimerUdb = Debug_Timer_ReadCounter(); + Debug_Timer_backup.InterruptMaskValue = Debug_Timer_STATUS_MASK; + #if (Debug_Timer_UsingHWCaptureCounter) + Debug_Timer_backup.TimerCaptureCounter = Debug_Timer_ReadCaptureCount(); #endif /* Back Up capture counter register */ #endif /* Backup non retention registers, interrupt mask and capture counter for CY_UDB_V1 */ - #if(!SCSI_CMD_TIMER_ControlRegRemoved) - SCSI_CMD_TIMER_backup.TimerControlRegister = SCSI_CMD_TIMER_ReadControlRegister(); + #if(!Debug_Timer_ControlRegRemoved) + Debug_Timer_backup.TimerControlRegister = Debug_Timer_ReadControlRegister(); #endif /* Backup the enable state of the Timer component */ #endif /* Backup non retention registers in UDB implementation. All fixed function registers are retention */ } /******************************************************************************* -* Function Name: SCSI_CMD_TIMER_RestoreConfig +* Function Name: Debug_Timer_RestoreConfig ******************************************************************************** * * Summary: @@ -81,50 +81,50 @@ void SCSI_CMD_TIMER_SaveConfig(void) * void * * Global variables: -* SCSI_CMD_TIMER_backup: Variables of this global structure are used to +* Debug_Timer_backup: Variables of this global structure are used to * restore the values of non retention registers on wakeup from sleep mode. * *******************************************************************************/ -void SCSI_CMD_TIMER_RestoreConfig(void) +void Debug_Timer_RestoreConfig(void) { - #if (!SCSI_CMD_TIMER_UsingFixedFunction) + #if (!Debug_Timer_UsingFixedFunction) /* Restore the UDB non-rentention registers for CY_UDB_V0 */ #if (CY_UDB_V0) /* Interrupt State Backup for Critical Region*/ - uint8 SCSI_CMD_TIMER_interruptState; + uint8 Debug_Timer_interruptState; - SCSI_CMD_TIMER_WriteCounter(SCSI_CMD_TIMER_backup.TimerUdb); - SCSI_CMD_TIMER_WritePeriod(SCSI_CMD_TIMER_backup.TimerPeriod); + Debug_Timer_WriteCounter(Debug_Timer_backup.TimerUdb); + Debug_Timer_WritePeriod(Debug_Timer_backup.TimerPeriod); /* CyEnterCriticalRegion and CyExitCriticalRegion are used to mark following region critical*/ /* Enter Critical Region*/ - SCSI_CMD_TIMER_interruptState = CyEnterCriticalSection(); + Debug_Timer_interruptState = CyEnterCriticalSection(); /* Use the interrupt output of the status register for IRQ output */ - SCSI_CMD_TIMER_STATUS_AUX_CTRL |= SCSI_CMD_TIMER_STATUS_ACTL_INT_EN_MASK; + Debug_Timer_STATUS_AUX_CTRL |= Debug_Timer_STATUS_ACTL_INT_EN_MASK; /* Exit Critical Region*/ - CyExitCriticalSection(SCSI_CMD_TIMER_interruptState); - SCSI_CMD_TIMER_STATUS_MASK =SCSI_CMD_TIMER_backup.InterruptMaskValue; - #if (SCSI_CMD_TIMER_UsingHWCaptureCounter) - SCSI_CMD_TIMER_SetCaptureCount(SCSI_CMD_TIMER_backup.TimerCaptureCounter); + CyExitCriticalSection(Debug_Timer_interruptState); + Debug_Timer_STATUS_MASK =Debug_Timer_backup.InterruptMaskValue; + #if (Debug_Timer_UsingHWCaptureCounter) + Debug_Timer_SetCaptureCount(Debug_Timer_backup.TimerCaptureCounter); #endif /* Restore the UDB non-rentention register capture counter for CY_UDB_V0 */ #endif /* Restore the UDB non-rentention registers for CY_UDB_V0 */ #if (CY_UDB_V1) - SCSI_CMD_TIMER_WriteCounter(SCSI_CMD_TIMER_backup.TimerUdb); - SCSI_CMD_TIMER_STATUS_MASK =SCSI_CMD_TIMER_backup.InterruptMaskValue; - #if (SCSI_CMD_TIMER_UsingHWCaptureCounter) - SCSI_CMD_TIMER_SetCaptureCount(SCSI_CMD_TIMER_backup.TimerCaptureCounter); + Debug_Timer_WriteCounter(Debug_Timer_backup.TimerUdb); + Debug_Timer_STATUS_MASK =Debug_Timer_backup.InterruptMaskValue; + #if (Debug_Timer_UsingHWCaptureCounter) + Debug_Timer_SetCaptureCount(Debug_Timer_backup.TimerCaptureCounter); #endif /* Restore Capture counter register*/ #endif /* Restore up non retention registers, interrupt mask and capture counter for CY_UDB_V1 */ - #if(!SCSI_CMD_TIMER_ControlRegRemoved) - SCSI_CMD_TIMER_WriteControlRegister(SCSI_CMD_TIMER_backup.TimerControlRegister); + #if(!Debug_Timer_ControlRegRemoved) + Debug_Timer_WriteControlRegister(Debug_Timer_backup.TimerControlRegister); #endif /* Restore the enable state of the Timer component */ #endif /* Restore non retention registers in the UDB implementation only */ } /******************************************************************************* -* Function Name: SCSI_CMD_TIMER_Sleep +* Function Name: Debug_Timer_Sleep ******************************************************************************** * * Summary: @@ -137,32 +137,32 @@ void SCSI_CMD_TIMER_RestoreConfig(void) * void * * Global variables: -* SCSI_CMD_TIMER_backup.TimerEnableState: Is modified depending on the +* Debug_Timer_backup.TimerEnableState: Is modified depending on the * enable state of the block before entering sleep mode. * *******************************************************************************/ -void SCSI_CMD_TIMER_Sleep(void) +void Debug_Timer_Sleep(void) { - #if(!SCSI_CMD_TIMER_ControlRegRemoved) + #if(!Debug_Timer_ControlRegRemoved) /* Save Counter's enable state */ - if(SCSI_CMD_TIMER_CTRL_ENABLE == (SCSI_CMD_TIMER_CONTROL & SCSI_CMD_TIMER_CTRL_ENABLE)) + if(Debug_Timer_CTRL_ENABLE == (Debug_Timer_CONTROL & Debug_Timer_CTRL_ENABLE)) { /* Timer is enabled */ - SCSI_CMD_TIMER_backup.TimerEnableState = 1u; + Debug_Timer_backup.TimerEnableState = 1u; } else { /* Timer is disabled */ - SCSI_CMD_TIMER_backup.TimerEnableState = 0u; + Debug_Timer_backup.TimerEnableState = 0u; } #endif /* Back up enable state from the Timer control register */ - SCSI_CMD_TIMER_Stop(); - SCSI_CMD_TIMER_SaveConfig(); + Debug_Timer_Stop(); + Debug_Timer_SaveConfig(); } /******************************************************************************* -* Function Name: SCSI_CMD_TIMER_Wakeup +* Function Name: Debug_Timer_Wakeup ******************************************************************************** * * Summary: @@ -175,17 +175,17 @@ void SCSI_CMD_TIMER_Sleep(void) * void * * Global variables: -* SCSI_CMD_TIMER_backup.enableState: Is used to restore the enable state of +* Debug_Timer_backup.enableState: Is used to restore the enable state of * block on wakeup from sleep mode. * *******************************************************************************/ -void SCSI_CMD_TIMER_Wakeup(void) +void Debug_Timer_Wakeup(void) { - SCSI_CMD_TIMER_RestoreConfig(); - #if(!SCSI_CMD_TIMER_ControlRegRemoved) - if(SCSI_CMD_TIMER_backup.TimerEnableState == 1u) + Debug_Timer_RestoreConfig(); + #if(!Debug_Timer_ControlRegRemoved) + if(Debug_Timer_backup.TimerEnableState == 1u) { /* Enable Timer's operation */ - SCSI_CMD_TIMER_Enable(); + Debug_Timer_Enable(); } /* Do nothing if Timer was disabled before */ #endif /* Remove this code section if Control register is removed */ } diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/LED1.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/LED1.c old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/LED1.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/LED1.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/LED1_aliases.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/LED1_aliases.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_ATN.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_ATN.c old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_ATN.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_ATN.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_ATN_ISR.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_ATN_ISR.h deleted file mode 100644 index 151381f..0000000 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_ATN_ISR.h +++ /dev/null @@ -1,70 +0,0 @@ -/******************************************************************************* -* File Name: SCSI_ATN_ISR.h -* Version 1.70 -* -* Description: -* Provides the function definitions for the Interrupt Controller. -* -* -******************************************************************************** -* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ -#if !defined(CY_ISR_SCSI_ATN_ISR_H) -#define CY_ISR_SCSI_ATN_ISR_H - - -#include -#include - -/* Interrupt Controller API. */ -void SCSI_ATN_ISR_Start(void); -void SCSI_ATN_ISR_StartEx(cyisraddress address); -void SCSI_ATN_ISR_Stop(void); - -CY_ISR_PROTO(SCSI_ATN_ISR_Interrupt); - -void SCSI_ATN_ISR_SetVector(cyisraddress address); -cyisraddress SCSI_ATN_ISR_GetVector(void); - -void SCSI_ATN_ISR_SetPriority(uint8 priority); -uint8 SCSI_ATN_ISR_GetPriority(void); - -void SCSI_ATN_ISR_Enable(void); -uint8 SCSI_ATN_ISR_GetState(void); -void SCSI_ATN_ISR_Disable(void); - -void SCSI_ATN_ISR_SetPending(void); -void SCSI_ATN_ISR_ClearPending(void); - - -/* Interrupt Controller Constants */ - -/* Address of the INTC.VECT[x] register that contains the Address of the SCSI_ATN_ISR ISR. */ -#define SCSI_ATN_ISR_INTC_VECTOR ((reg32 *) SCSI_ATN_ISR__INTC_VECT) - -/* Address of the SCSI_ATN_ISR ISR priority. */ -#define SCSI_ATN_ISR_INTC_PRIOR ((reg8 *) SCSI_ATN_ISR__INTC_PRIOR_REG) - -/* Priority of the SCSI_ATN_ISR interrupt. */ -#define SCSI_ATN_ISR_INTC_PRIOR_NUMBER SCSI_ATN_ISR__INTC_PRIOR_NUM - -/* Address of the INTC.SET_EN[x] byte to bit enable SCSI_ATN_ISR interrupt. */ -#define SCSI_ATN_ISR_INTC_SET_EN ((reg32 *) SCSI_ATN_ISR__INTC_SET_EN_REG) - -/* Address of the INTC.CLR_EN[x] register to bit clear the SCSI_ATN_ISR interrupt. */ -#define SCSI_ATN_ISR_INTC_CLR_EN ((reg32 *) SCSI_ATN_ISR__INTC_CLR_EN_REG) - -/* Address of the INTC.SET_PD[x] register to set the SCSI_ATN_ISR interrupt state to pending. */ -#define SCSI_ATN_ISR_INTC_SET_PD ((reg32 *) SCSI_ATN_ISR__INTC_SET_PD_REG) - -/* Address of the INTC.CLR_PD[x] register to clear the SCSI_ATN_ISR interrupt. */ -#define SCSI_ATN_ISR_INTC_CLR_PD ((reg32 *) SCSI_ATN_ISR__INTC_CLR_PD_REG) - - -#endif /* CY_ISR_SCSI_ATN_ISR_H */ - - -/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_ATN_aliases.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_ATN_aliases.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_CMD_TIMER_ISR.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_CMD_TIMER_ISR.c deleted file mode 100755 index 1093726..0000000 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_CMD_TIMER_ISR.c +++ /dev/null @@ -1,356 +0,0 @@ -/******************************************************************************* -* File Name: SCSI_CMD_TIMER_ISR.c -* Version 1.70 -* -* Description: -* API for controlling the state of an interrupt. -* -* -* Note: -* -******************************************************************************** -* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - - -#include -#include -#include - -#if !defined(SCSI_CMD_TIMER_ISR__REMOVED) /* Check for removal by optimization */ - -/******************************************************************************* -* Place your includes, defines and code here -********************************************************************************/ -/* `#START SCSI_CMD_TIMER_ISR_intc` */ - -/* `#END` */ - -#ifndef CYINT_IRQ_BASE -#define CYINT_IRQ_BASE 16 -#endif /* CYINT_IRQ_BASE */ -#ifndef CYINT_VECT_TABLE -#define CYINT_VECT_TABLE ((cyisraddress **) CYREG_NVIC_VECT_OFFSET) -#endif /* CYINT_VECT_TABLE */ - -/* Declared in startup, used to set unused interrupts to. */ -CY_ISR_PROTO(IntDefaultHandler); - - -/******************************************************************************* -* Function Name: SCSI_CMD_TIMER_ISR_Start -******************************************************************************** -* -* Summary: -* Set up the interrupt and enable it. -* -* Parameters: -* None -* -* Return: -* None -* -*******************************************************************************/ -void SCSI_CMD_TIMER_ISR_Start(void) -{ - /* For all we know the interrupt is active. */ - SCSI_CMD_TIMER_ISR_Disable(); - - /* Set the ISR to point to the SCSI_CMD_TIMER_ISR Interrupt. */ - SCSI_CMD_TIMER_ISR_SetVector(&SCSI_CMD_TIMER_ISR_Interrupt); - - /* Set the priority. */ - SCSI_CMD_TIMER_ISR_SetPriority((uint8)SCSI_CMD_TIMER_ISR_INTC_PRIOR_NUMBER); - - /* Enable it. */ - SCSI_CMD_TIMER_ISR_Enable(); -} - - -/******************************************************************************* -* Function Name: SCSI_CMD_TIMER_ISR_StartEx -******************************************************************************** -* -* Summary: -* Set up the interrupt and enable it. -* -* Parameters: -* address: Address of the ISR to set in the interrupt vector table. -* -* Return: -* None -* -*******************************************************************************/ -void SCSI_CMD_TIMER_ISR_StartEx(cyisraddress address) -{ - /* For all we know the interrupt is active. */ - SCSI_CMD_TIMER_ISR_Disable(); - - /* Set the ISR to point to the SCSI_CMD_TIMER_ISR Interrupt. */ - SCSI_CMD_TIMER_ISR_SetVector(address); - - /* Set the priority. */ - SCSI_CMD_TIMER_ISR_SetPriority((uint8)SCSI_CMD_TIMER_ISR_INTC_PRIOR_NUMBER); - - /* Enable it. */ - SCSI_CMD_TIMER_ISR_Enable(); -} - - -/******************************************************************************* -* Function Name: SCSI_CMD_TIMER_ISR_Stop -******************************************************************************** -* -* Summary: -* Disables and removes the interrupt. -* -* Parameters: -* -* Return: -* None -* -*******************************************************************************/ -void SCSI_CMD_TIMER_ISR_Stop(void) -{ - /* Disable this interrupt. */ - SCSI_CMD_TIMER_ISR_Disable(); - - /* Set the ISR to point to the passive one. */ - SCSI_CMD_TIMER_ISR_SetVector(&IntDefaultHandler); -} - - -/******************************************************************************* -* Function Name: SCSI_CMD_TIMER_ISR_Interrupt -******************************************************************************** -* -* Summary: -* The default Interrupt Service Routine for SCSI_CMD_TIMER_ISR. -* -* Add custom code between the coments to keep the next version of this file -* from over writting your code. -* -* Parameters: -* -* Return: -* None -* -*******************************************************************************/ -CY_ISR(SCSI_CMD_TIMER_ISR_Interrupt) -{ - /* Place your Interrupt code here. */ - /* `#START SCSI_CMD_TIMER_ISR_Interrupt` */ - - /* `#END` */ -} - - -/******************************************************************************* -* Function Name: SCSI_CMD_TIMER_ISR_SetVector -******************************************************************************** -* -* Summary: -* Change the ISR vector for the Interrupt. Note calling SCSI_CMD_TIMER_ISR_Start -* will override any effect this method would have had. To set the vector -* before the component has been started use SCSI_CMD_TIMER_ISR_StartEx instead. -* -* Parameters: -* address: Address of the ISR to set in the interrupt vector table. -* -* Return: -* None -* -*******************************************************************************/ -void SCSI_CMD_TIMER_ISR_SetVector(cyisraddress address) -{ - cyisraddress * ramVectorTable; - - ramVectorTable = (cyisraddress *) *CYINT_VECT_TABLE; - - ramVectorTable[CYINT_IRQ_BASE + (uint32)SCSI_CMD_TIMER_ISR__INTC_NUMBER] = address; -} - - -/******************************************************************************* -* Function Name: SCSI_CMD_TIMER_ISR_GetVector -******************************************************************************** -* -* Summary: -* Gets the "address" of the current ISR vector for the Interrupt. -* -* Parameters: -* None -* -* Return: -* Address of the ISR in the interrupt vector table. -* -*******************************************************************************/ -cyisraddress SCSI_CMD_TIMER_ISR_GetVector(void) -{ - cyisraddress * ramVectorTable; - - ramVectorTable = (cyisraddress *) *CYINT_VECT_TABLE; - - return ramVectorTable[CYINT_IRQ_BASE + (uint32)SCSI_CMD_TIMER_ISR__INTC_NUMBER]; -} - - -/******************************************************************************* -* Function Name: SCSI_CMD_TIMER_ISR_SetPriority -******************************************************************************** -* -* Summary: -* Sets the Priority of the Interrupt. Note calling SCSI_CMD_TIMER_ISR_Start -* or SCSI_CMD_TIMER_ISR_StartEx will override any effect this method -* would have had. This method should only be called after -* SCSI_CMD_TIMER_ISR_Start or SCSI_CMD_TIMER_ISR_StartEx has been called. To set -* the initial priority for the component use the cydwr file in the tool. -* -* Parameters: -* priority: Priority of the interrupt. 0 - 7, 0 being the highest. -* -* Return: -* None -* -*******************************************************************************/ -void SCSI_CMD_TIMER_ISR_SetPriority(uint8 priority) -{ - *SCSI_CMD_TIMER_ISR_INTC_PRIOR = priority << 5; -} - - -/******************************************************************************* -* Function Name: SCSI_CMD_TIMER_ISR_GetPriority -******************************************************************************** -* -* Summary: -* Gets the Priority of the Interrupt. -* -* Parameters: -* None -* -* Return: -* Priority of the interrupt. 0 - 7, 0 being the highest. -* -*******************************************************************************/ -uint8 SCSI_CMD_TIMER_ISR_GetPriority(void) -{ - uint8 priority; - - - priority = *SCSI_CMD_TIMER_ISR_INTC_PRIOR >> 5; - - return priority; -} - - -/******************************************************************************* -* Function Name: SCSI_CMD_TIMER_ISR_Enable -******************************************************************************** -* -* Summary: -* Enables the interrupt. -* -* Parameters: -* None -* -* Return: -* None -* -*******************************************************************************/ -void SCSI_CMD_TIMER_ISR_Enable(void) -{ - /* Enable the general interrupt. */ - *SCSI_CMD_TIMER_ISR_INTC_SET_EN = SCSI_CMD_TIMER_ISR__INTC_MASK; -} - - -/******************************************************************************* -* Function Name: SCSI_CMD_TIMER_ISR_GetState -******************************************************************************** -* -* Summary: -* Gets the state (enabled, disabled) of the Interrupt. -* -* Parameters: -* None -* -* Return: -* 1 if enabled, 0 if disabled. -* -*******************************************************************************/ -uint8 SCSI_CMD_TIMER_ISR_GetState(void) -{ - /* Get the state of the general interrupt. */ - return ((*SCSI_CMD_TIMER_ISR_INTC_SET_EN & (uint32)SCSI_CMD_TIMER_ISR__INTC_MASK) != 0u) ? 1u:0u; -} - - -/******************************************************************************* -* Function Name: SCSI_CMD_TIMER_ISR_Disable -******************************************************************************** -* -* Summary: -* Disables the Interrupt. -* -* Parameters: -* None -* -* Return: -* None -* -*******************************************************************************/ -void SCSI_CMD_TIMER_ISR_Disable(void) -{ - /* Disable the general interrupt. */ - *SCSI_CMD_TIMER_ISR_INTC_CLR_EN = SCSI_CMD_TIMER_ISR__INTC_MASK; -} - - -/******************************************************************************* -* Function Name: SCSI_CMD_TIMER_ISR_SetPending -******************************************************************************** -* -* Summary: -* Causes the Interrupt to enter the pending state, a software method of -* generating the interrupt. -* -* Parameters: -* None -* -* Return: -* None -* -*******************************************************************************/ -void SCSI_CMD_TIMER_ISR_SetPending(void) -{ - *SCSI_CMD_TIMER_ISR_INTC_SET_PD = SCSI_CMD_TIMER_ISR__INTC_MASK; -} - - -/******************************************************************************* -* Function Name: SCSI_CMD_TIMER_ISR_ClearPending -******************************************************************************** -* -* Summary: -* Clears a pending interrupt. -* -* Parameters: -* None -* -* Return: -* None -* -*******************************************************************************/ -void SCSI_CMD_TIMER_ISR_ClearPending(void) -{ - *SCSI_CMD_TIMER_ISR_INTC_CLR_PD = SCSI_CMD_TIMER_ISR__INTC_MASK; -} - -#endif /* End check for removal by optimization */ - - -/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_CMD_TIMER_ISR.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_CMD_TIMER_ISR.h deleted file mode 100755 index 0454ab4..0000000 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_CMD_TIMER_ISR.h +++ /dev/null @@ -1,70 +0,0 @@ -/******************************************************************************* -* File Name: SCSI_CMD_TIMER_ISR.h -* Version 1.70 -* -* Description: -* Provides the function definitions for the Interrupt Controller. -* -* -******************************************************************************** -* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ -#if !defined(CY_ISR_SCSI_CMD_TIMER_ISR_H) -#define CY_ISR_SCSI_CMD_TIMER_ISR_H - - -#include -#include - -/* Interrupt Controller API. */ -void SCSI_CMD_TIMER_ISR_Start(void); -void SCSI_CMD_TIMER_ISR_StartEx(cyisraddress address); -void SCSI_CMD_TIMER_ISR_Stop(void); - -CY_ISR_PROTO(SCSI_CMD_TIMER_ISR_Interrupt); - -void SCSI_CMD_TIMER_ISR_SetVector(cyisraddress address); -cyisraddress SCSI_CMD_TIMER_ISR_GetVector(void); - -void SCSI_CMD_TIMER_ISR_SetPriority(uint8 priority); -uint8 SCSI_CMD_TIMER_ISR_GetPriority(void); - -void SCSI_CMD_TIMER_ISR_Enable(void); -uint8 SCSI_CMD_TIMER_ISR_GetState(void); -void SCSI_CMD_TIMER_ISR_Disable(void); - -void SCSI_CMD_TIMER_ISR_SetPending(void); -void SCSI_CMD_TIMER_ISR_ClearPending(void); - - -/* Interrupt Controller Constants */ - -/* Address of the INTC.VECT[x] register that contains the Address of the SCSI_CMD_TIMER_ISR ISR. */ -#define SCSI_CMD_TIMER_ISR_INTC_VECTOR ((reg32 *) SCSI_CMD_TIMER_ISR__INTC_VECT) - -/* Address of the SCSI_CMD_TIMER_ISR ISR priority. */ -#define SCSI_CMD_TIMER_ISR_INTC_PRIOR ((reg8 *) SCSI_CMD_TIMER_ISR__INTC_PRIOR_REG) - -/* Priority of the SCSI_CMD_TIMER_ISR interrupt. */ -#define SCSI_CMD_TIMER_ISR_INTC_PRIOR_NUMBER SCSI_CMD_TIMER_ISR__INTC_PRIOR_NUM - -/* Address of the INTC.SET_EN[x] byte to bit enable SCSI_CMD_TIMER_ISR interrupt. */ -#define SCSI_CMD_TIMER_ISR_INTC_SET_EN ((reg32 *) SCSI_CMD_TIMER_ISR__INTC_SET_EN_REG) - -/* Address of the INTC.CLR_EN[x] register to bit clear the SCSI_CMD_TIMER_ISR interrupt. */ -#define SCSI_CMD_TIMER_ISR_INTC_CLR_EN ((reg32 *) SCSI_CMD_TIMER_ISR__INTC_CLR_EN_REG) - -/* Address of the INTC.SET_PD[x] register to set the SCSI_CMD_TIMER_ISR interrupt state to pending. */ -#define SCSI_CMD_TIMER_ISR_INTC_SET_PD ((reg32 *) SCSI_CMD_TIMER_ISR__INTC_SET_PD_REG) - -/* Address of the INTC.CLR_PD[x] register to clear the SCSI_CMD_TIMER_ISR interrupt. */ -#define SCSI_CMD_TIMER_ISR_INTC_CLR_PD ((reg32 *) SCSI_CMD_TIMER_ISR__INTC_CLR_PD_REG) - - -#endif /* CY_ISR_SCSI_CMD_TIMER_ISR_H */ - - -/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_In_DBx.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_In_DBx.c deleted file mode 100644 index 5d14607..0000000 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_In_DBx.c +++ /dev/null @@ -1,144 +0,0 @@ -/******************************************************************************* -* File Name: SCSI_In_DBx.c -* Version 1.90 -* -* Description: -* This file contains API to enable firmware control of a Pins component. -* -* Note: -* -******************************************************************************** -* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - -#include "cytypes.h" -#include "SCSI_In_DBx.h" - -/* APIs are not generated for P15[7:6] on PSoC 5 */ -#if !(CY_PSOC5A &&\ - SCSI_In_DBx__PORT == 15 && ((SCSI_In_DBx__MASK & 0xC0) != 0)) - - -/******************************************************************************* -* Function Name: SCSI_In_DBx_Write -******************************************************************************** -* -* Summary: -* Assign a new value to the digital port's data output register. -* -* Parameters: -* prtValue: The value to be assigned to the Digital Port. -* -* Return: -* None -* -*******************************************************************************/ -void SCSI_In_DBx_Write(uint8 value) -{ - uint8 staticBits = (SCSI_In_DBx_DR & (uint8)(~SCSI_In_DBx_MASK)); - SCSI_In_DBx_DR = staticBits | ((uint8)(value << SCSI_In_DBx_SHIFT) & SCSI_In_DBx_MASK); -} - - -/******************************************************************************* -* Function Name: SCSI_In_DBx_SetDriveMode -******************************************************************************** -* -* Summary: -* Change the drive mode on the pins of the port. -* -* Parameters: -* mode: Change the pins to this drive mode. -* -* Return: -* None -* -*******************************************************************************/ -void SCSI_In_DBx_SetDriveMode(uint8 mode) -{ - CyPins_SetPinDriveMode(SCSI_In_DBx_0, mode); - CyPins_SetPinDriveMode(SCSI_In_DBx_1, mode); - CyPins_SetPinDriveMode(SCSI_In_DBx_2, mode); - CyPins_SetPinDriveMode(SCSI_In_DBx_3, mode); - CyPins_SetPinDriveMode(SCSI_In_DBx_4, mode); - CyPins_SetPinDriveMode(SCSI_In_DBx_5, mode); - CyPins_SetPinDriveMode(SCSI_In_DBx_6, mode); - CyPins_SetPinDriveMode(SCSI_In_DBx_7, mode); -} - - -/******************************************************************************* -* Function Name: SCSI_In_DBx_Read -******************************************************************************** -* -* Summary: -* Read the current value on the pins of the Digital Port in right justified -* form. -* -* Parameters: -* None -* -* Return: -* Returns the current value of the Digital Port as a right justified number -* -* Note: -* Macro SCSI_In_DBx_ReadPS calls this function. -* -*******************************************************************************/ -uint8 SCSI_In_DBx_Read(void) -{ - return (SCSI_In_DBx_PS & SCSI_In_DBx_MASK) >> SCSI_In_DBx_SHIFT; -} - - -/******************************************************************************* -* Function Name: SCSI_In_DBx_ReadDataReg -******************************************************************************** -* -* Summary: -* Read the current value assigned to a Digital Port's data output register -* -* Parameters: -* None -* -* Return: -* Returns the current value assigned to the Digital Port's data output register -* -*******************************************************************************/ -uint8 SCSI_In_DBx_ReadDataReg(void) -{ - return (SCSI_In_DBx_DR & SCSI_In_DBx_MASK) >> SCSI_In_DBx_SHIFT; -} - - -/* If Interrupts Are Enabled for this Pins component */ -#if defined(SCSI_In_DBx_INTSTAT) - - /******************************************************************************* - * Function Name: SCSI_In_DBx_ClearInterrupt - ******************************************************************************** - * Summary: - * Clears any active interrupts attached to port and returns the value of the - * interrupt status register. - * - * Parameters: - * None - * - * Return: - * Returns the value of the interrupt status register - * - *******************************************************************************/ - uint8 SCSI_In_DBx_ClearInterrupt(void) - { - return (SCSI_In_DBx_INTSTAT & SCSI_In_DBx_MASK) >> SCSI_In_DBx_SHIFT; - } - -#endif /* If Interrupts Are Enabled for this Pins component */ - -#endif /* CY_PSOC5A... */ - - -/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_In_DBx.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_In_DBx.h deleted file mode 100644 index 23ee284..0000000 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_In_DBx.h +++ /dev/null @@ -1,130 +0,0 @@ -/******************************************************************************* -* File Name: SCSI_In_DBx.h -* Version 1.90 -* -* Description: -* This file containts Control Register function prototypes and register defines -* -* Note: -* -******************************************************************************** -* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - -#if !defined(CY_PINS_SCSI_In_DBx_H) /* Pins SCSI_In_DBx_H */ -#define CY_PINS_SCSI_In_DBx_H - -#include "cytypes.h" -#include "cyfitter.h" -#include "cypins.h" -#include "SCSI_In_DBx_aliases.h" - -/* Check to see if required defines such as CY_PSOC5A are available */ -/* They are defined starting with cy_boot v3.0 */ -#if !defined (CY_PSOC5A) - #error Component cy_pins_v1_90 requires cy_boot v3.0 or later -#endif /* (CY_PSOC5A) */ - -/* APIs are not generated for P15[7:6] */ -#if !(CY_PSOC5A &&\ - SCSI_In_DBx__PORT == 15 && ((SCSI_In_DBx__MASK & 0xC0) != 0)) - - -/*************************************** -* Function Prototypes -***************************************/ - -void SCSI_In_DBx_Write(uint8 value) ; -void SCSI_In_DBx_SetDriveMode(uint8 mode) ; -uint8 SCSI_In_DBx_ReadDataReg(void) ; -uint8 SCSI_In_DBx_Read(void) ; -uint8 SCSI_In_DBx_ClearInterrupt(void) ; - - -/*************************************** -* API Constants -***************************************/ - -/* Drive Modes */ -#define SCSI_In_DBx_DM_ALG_HIZ PIN_DM_ALG_HIZ -#define SCSI_In_DBx_DM_DIG_HIZ PIN_DM_DIG_HIZ -#define SCSI_In_DBx_DM_RES_UP PIN_DM_RES_UP -#define SCSI_In_DBx_DM_RES_DWN PIN_DM_RES_DWN -#define SCSI_In_DBx_DM_OD_LO PIN_DM_OD_LO -#define SCSI_In_DBx_DM_OD_HI PIN_DM_OD_HI -#define SCSI_In_DBx_DM_STRONG PIN_DM_STRONG -#define SCSI_In_DBx_DM_RES_UPDWN PIN_DM_RES_UPDWN - -/* Digital Port Constants */ -#define SCSI_In_DBx_MASK SCSI_In_DBx__MASK -#define SCSI_In_DBx_SHIFT SCSI_In_DBx__SHIFT -#define SCSI_In_DBx_WIDTH 8u - - -/*************************************** -* Registers -***************************************/ - -/* Main Port Registers */ -/* Pin State */ -#define SCSI_In_DBx_PS (* (reg8 *) SCSI_In_DBx__PS) -/* Data Register */ -#define SCSI_In_DBx_DR (* (reg8 *) SCSI_In_DBx__DR) -/* Port Number */ -#define SCSI_In_DBx_PRT_NUM (* (reg8 *) SCSI_In_DBx__PRT) -/* Connect to Analog Globals */ -#define SCSI_In_DBx_AG (* (reg8 *) SCSI_In_DBx__AG) -/* Analog MUX bux enable */ -#define SCSI_In_DBx_AMUX (* (reg8 *) SCSI_In_DBx__AMUX) -/* Bidirectional Enable */ -#define SCSI_In_DBx_BIE (* (reg8 *) SCSI_In_DBx__BIE) -/* Bit-mask for Aliased Register Access */ -#define SCSI_In_DBx_BIT_MASK (* (reg8 *) SCSI_In_DBx__BIT_MASK) -/* Bypass Enable */ -#define SCSI_In_DBx_BYP (* (reg8 *) SCSI_In_DBx__BYP) -/* Port wide control signals */ -#define SCSI_In_DBx_CTL (* (reg8 *) SCSI_In_DBx__CTL) -/* Drive Modes */ -#define SCSI_In_DBx_DM0 (* (reg8 *) SCSI_In_DBx__DM0) -#define SCSI_In_DBx_DM1 (* (reg8 *) SCSI_In_DBx__DM1) -#define SCSI_In_DBx_DM2 (* (reg8 *) SCSI_In_DBx__DM2) -/* Input Buffer Disable Override */ -#define SCSI_In_DBx_INP_DIS (* (reg8 *) SCSI_In_DBx__INP_DIS) -/* LCD Common or Segment Drive */ -#define SCSI_In_DBx_LCD_COM_SEG (* (reg8 *) SCSI_In_DBx__LCD_COM_SEG) -/* Enable Segment LCD */ -#define SCSI_In_DBx_LCD_EN (* (reg8 *) SCSI_In_DBx__LCD_EN) -/* Slew Rate Control */ -#define SCSI_In_DBx_SLW (* (reg8 *) SCSI_In_DBx__SLW) - -/* DSI Port Registers */ -/* Global DSI Select Register */ -#define SCSI_In_DBx_PRTDSI__CAPS_SEL (* (reg8 *) SCSI_In_DBx__PRTDSI__CAPS_SEL) -/* Double Sync Enable */ -#define SCSI_In_DBx_PRTDSI__DBL_SYNC_IN (* (reg8 *) SCSI_In_DBx__PRTDSI__DBL_SYNC_IN) -/* Output Enable Select Drive Strength */ -#define SCSI_In_DBx_PRTDSI__OE_SEL0 (* (reg8 *) SCSI_In_DBx__PRTDSI__OE_SEL0) -#define SCSI_In_DBx_PRTDSI__OE_SEL1 (* (reg8 *) SCSI_In_DBx__PRTDSI__OE_SEL1) -/* Port Pin Output Select Registers */ -#define SCSI_In_DBx_PRTDSI__OUT_SEL0 (* (reg8 *) SCSI_In_DBx__PRTDSI__OUT_SEL0) -#define SCSI_In_DBx_PRTDSI__OUT_SEL1 (* (reg8 *) SCSI_In_DBx__PRTDSI__OUT_SEL1) -/* Sync Output Enable Registers */ -#define SCSI_In_DBx_PRTDSI__SYNC_OUT (* (reg8 *) SCSI_In_DBx__PRTDSI__SYNC_OUT) - - -#if defined(SCSI_In_DBx__INTSTAT) /* Interrupt Registers */ - - #define SCSI_In_DBx_INTSTAT (* (reg8 *) SCSI_In_DBx__INTSTAT) - #define SCSI_In_DBx_SNAP (* (reg8 *) SCSI_In_DBx__SNAP) - -#endif /* Interrupt Registers */ - -#endif /* CY_PSOC5A... */ - -#endif /* CY_PINS_SCSI_In_DBx_H */ - - -/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_In_DBx_aliases.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_In_DBx_aliases.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_In_aliases.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_In_aliases.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_Out_Bits.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_Out_Bits.c new file mode 100755 index 0000000..2fa26a4 --- /dev/null +++ b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_Out_Bits.c @@ -0,0 +1,63 @@ +/******************************************************************************* +* File Name: SCSI_Out_Bits.c +* Version 1.70 +* +* Description: +* This file contains API to enable firmware control of a Control Register. +* +* Note: +* +******************************************************************************** +* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved. +* You may use this file only in accordance with the license, terms, conditions, +* disclaimers, and limitations in the end user license agreement accompanying +* the software package with which this file was provided. +*******************************************************************************/ + +#include "SCSI_Out_Bits.h" + +#if !defined(SCSI_Out_Bits_Sync_ctrl_reg__REMOVED) /* Check for removal by optimization */ + +/******************************************************************************* +* Function Name: SCSI_Out_Bits_Write +******************************************************************************** +* +* Summary: +* Write a byte to the Control Register. +* +* Parameters: +* control: The value to be assigned to the Control Register. +* +* Return: +* None. +* +*******************************************************************************/ +void SCSI_Out_Bits_Write(uint8 control) +{ + SCSI_Out_Bits_Control = control; +} + + +/******************************************************************************* +* Function Name: SCSI_Out_Bits_Read +******************************************************************************** +* +* Summary: +* Reads the current value assigned to the Control Register. +* +* Parameters: +* None. +* +* Return: +* Returns the current value in the Control Register. +* +*******************************************************************************/ +uint8 SCSI_Out_Bits_Read(void) +{ + return SCSI_Out_Bits_Control; +} + +#endif /* End check for removal by optimization */ + + +/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_Dp_aliases.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_Out_Bits.h old mode 100644 new mode 100755 similarity index 54% rename from software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_Dp_aliases.h rename to software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_Out_Bits.h index bd02d71..13df446 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_Dp_aliases.h +++ b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_Out_Bits.h @@ -1,32 +1,42 @@ -/******************************************************************************* -* File Name: USBFS_1_Dp.h -* Version 1.90 -* -* Description: -* This file containts Control Register function prototypes and register defines -* -* Note: -* -******************************************************************************** -* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - -#if !defined(CY_PINS_USBFS_1_Dp_ALIASES_H) /* Pins USBFS_1_Dp_ALIASES_H */ -#define CY_PINS_USBFS_1_Dp_ALIASES_H - -#include "cytypes.h" -#include "cyfitter.h" - - - -/*************************************** -* Constants -***************************************/ -#define USBFS_1_Dp_0 USBFS_1_Dp__0__PC - -#endif /* End Pins USBFS_1_Dp_ALIASES_H */ - -/* [] END OF FILE */ +/******************************************************************************* +* File Name: SCSI_Out_Bits.h +* Version 1.70 +* +* Description: +* This file containts Control Register function prototypes and register defines +* +* Note: +* +******************************************************************************** +* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved. +* You may use this file only in accordance with the license, terms, conditions, +* disclaimers, and limitations in the end user license agreement accompanying +* the software package with which this file was provided. +*******************************************************************************/ + +#if !defined(CY_CONTROL_REG_SCSI_Out_Bits_H) /* CY_CONTROL_REG_SCSI_Out_Bits_H */ +#define CY_CONTROL_REG_SCSI_Out_Bits_H + +#include "cytypes.h" + + +/*************************************** +* Function Prototypes +***************************************/ + +void SCSI_Out_Bits_Write(uint8 control) ; +uint8 SCSI_Out_Bits_Read(void) ; + + +/*************************************** +* Registers +***************************************/ + +/* Control Register */ +#define SCSI_Out_Bits_Control (* (reg8 *) SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_REG ) +#define SCSI_Out_Bits_Control_PTR ( (reg8 *) SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_REG ) + +#endif /* End CY_CONTROL_REG_SCSI_Out_Bits_H */ + + +/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_Out_Ctl.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_Out_Ctl.c new file mode 100755 index 0000000..6191598 --- /dev/null +++ b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_Out_Ctl.c @@ -0,0 +1,63 @@ +/******************************************************************************* +* File Name: SCSI_Out_Ctl.c +* Version 1.70 +* +* Description: +* This file contains API to enable firmware control of a Control Register. +* +* Note: +* +******************************************************************************** +* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved. +* You may use this file only in accordance with the license, terms, conditions, +* disclaimers, and limitations in the end user license agreement accompanying +* the software package with which this file was provided. +*******************************************************************************/ + +#include "SCSI_Out_Ctl.h" + +#if !defined(SCSI_Out_Ctl_Sync_ctrl_reg__REMOVED) /* Check for removal by optimization */ + +/******************************************************************************* +* Function Name: SCSI_Out_Ctl_Write +******************************************************************************** +* +* Summary: +* Write a byte to the Control Register. +* +* Parameters: +* control: The value to be assigned to the Control Register. +* +* Return: +* None. +* +*******************************************************************************/ +void SCSI_Out_Ctl_Write(uint8 control) +{ + SCSI_Out_Ctl_Control = control; +} + + +/******************************************************************************* +* Function Name: SCSI_Out_Ctl_Read +******************************************************************************** +* +* Summary: +* Reads the current value assigned to the Control Register. +* +* Parameters: +* None. +* +* Return: +* Returns the current value in the Control Register. +* +*******************************************************************************/ +uint8 SCSI_Out_Ctl_Read(void) +{ + return SCSI_Out_Ctl_Control; +} + +#endif /* End check for removal by optimization */ + + +/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_WP_aliases.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_Out_Ctl.h old mode 100644 new mode 100755 similarity index 55% rename from software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_WP_aliases.h rename to software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_Out_Ctl.h index 9a14d37..669ebf5 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_WP_aliases.h +++ b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_Out_Ctl.h @@ -1,32 +1,42 @@ -/******************************************************************************* -* File Name: SD_WP.h -* Version 1.90 -* -* Description: -* This file containts Control Register function prototypes and register defines -* -* Note: -* -******************************************************************************** -* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - -#if !defined(CY_PINS_SD_WP_ALIASES_H) /* Pins SD_WP_ALIASES_H */ -#define CY_PINS_SD_WP_ALIASES_H - -#include "cytypes.h" -#include "cyfitter.h" - - - -/*************************************** -* Constants -***************************************/ -#define SD_WP_0 SD_WP__0__PC - -#endif /* End Pins SD_WP_ALIASES_H */ - -/* [] END OF FILE */ +/******************************************************************************* +* File Name: SCSI_Out_Ctl.h +* Version 1.70 +* +* Description: +* This file containts Control Register function prototypes and register defines +* +* Note: +* +******************************************************************************** +* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved. +* You may use this file only in accordance with the license, terms, conditions, +* disclaimers, and limitations in the end user license agreement accompanying +* the software package with which this file was provided. +*******************************************************************************/ + +#if !defined(CY_CONTROL_REG_SCSI_Out_Ctl_H) /* CY_CONTROL_REG_SCSI_Out_Ctl_H */ +#define CY_CONTROL_REG_SCSI_Out_Ctl_H + +#include "cytypes.h" + + +/*************************************** +* Function Prototypes +***************************************/ + +void SCSI_Out_Ctl_Write(uint8 control) ; +uint8 SCSI_Out_Ctl_Read(void) ; + + +/*************************************** +* Registers +***************************************/ + +/* Control Register */ +#define SCSI_Out_Ctl_Control (* (reg8 *) SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_REG ) +#define SCSI_Out_Ctl_Control_PTR ( (reg8 *) SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_REG ) + +#endif /* End CY_CONTROL_REG_SCSI_Out_Ctl_H */ + + +/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_Out_DBx.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_Out_DBx.c deleted file mode 100644 index e673f31..0000000 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_Out_DBx.c +++ /dev/null @@ -1,144 +0,0 @@ -/******************************************************************************* -* File Name: SCSI_Out_DBx.c -* Version 1.90 -* -* Description: -* This file contains API to enable firmware control of a Pins component. -* -* Note: -* -******************************************************************************** -* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - -#include "cytypes.h" -#include "SCSI_Out_DBx.h" - -/* APIs are not generated for P15[7:6] on PSoC 5 */ -#if !(CY_PSOC5A &&\ - SCSI_Out_DBx__PORT == 15 && ((SCSI_Out_DBx__MASK & 0xC0) != 0)) - - -/******************************************************************************* -* Function Name: SCSI_Out_DBx_Write -******************************************************************************** -* -* Summary: -* Assign a new value to the digital port's data output register. -* -* Parameters: -* prtValue: The value to be assigned to the Digital Port. -* -* Return: -* None -* -*******************************************************************************/ -void SCSI_Out_DBx_Write(uint8 value) -{ - uint8 staticBits = (SCSI_Out_DBx_DR & (uint8)(~SCSI_Out_DBx_MASK)); - SCSI_Out_DBx_DR = staticBits | ((uint8)(value << SCSI_Out_DBx_SHIFT) & SCSI_Out_DBx_MASK); -} - - -/******************************************************************************* -* Function Name: SCSI_Out_DBx_SetDriveMode -******************************************************************************** -* -* Summary: -* Change the drive mode on the pins of the port. -* -* Parameters: -* mode: Change the pins to this drive mode. -* -* Return: -* None -* -*******************************************************************************/ -void SCSI_Out_DBx_SetDriveMode(uint8 mode) -{ - CyPins_SetPinDriveMode(SCSI_Out_DBx_0, mode); - CyPins_SetPinDriveMode(SCSI_Out_DBx_1, mode); - CyPins_SetPinDriveMode(SCSI_Out_DBx_2, mode); - CyPins_SetPinDriveMode(SCSI_Out_DBx_3, mode); - CyPins_SetPinDriveMode(SCSI_Out_DBx_4, mode); - CyPins_SetPinDriveMode(SCSI_Out_DBx_5, mode); - CyPins_SetPinDriveMode(SCSI_Out_DBx_6, mode); - CyPins_SetPinDriveMode(SCSI_Out_DBx_7, mode); -} - - -/******************************************************************************* -* Function Name: SCSI_Out_DBx_Read -******************************************************************************** -* -* Summary: -* Read the current value on the pins of the Digital Port in right justified -* form. -* -* Parameters: -* None -* -* Return: -* Returns the current value of the Digital Port as a right justified number -* -* Note: -* Macro SCSI_Out_DBx_ReadPS calls this function. -* -*******************************************************************************/ -uint8 SCSI_Out_DBx_Read(void) -{ - return (SCSI_Out_DBx_PS & SCSI_Out_DBx_MASK) >> SCSI_Out_DBx_SHIFT; -} - - -/******************************************************************************* -* Function Name: SCSI_Out_DBx_ReadDataReg -******************************************************************************** -* -* Summary: -* Read the current value assigned to a Digital Port's data output register -* -* Parameters: -* None -* -* Return: -* Returns the current value assigned to the Digital Port's data output register -* -*******************************************************************************/ -uint8 SCSI_Out_DBx_ReadDataReg(void) -{ - return (SCSI_Out_DBx_DR & SCSI_Out_DBx_MASK) >> SCSI_Out_DBx_SHIFT; -} - - -/* If Interrupts Are Enabled for this Pins component */ -#if defined(SCSI_Out_DBx_INTSTAT) - - /******************************************************************************* - * Function Name: SCSI_Out_DBx_ClearInterrupt - ******************************************************************************** - * Summary: - * Clears any active interrupts attached to port and returns the value of the - * interrupt status register. - * - * Parameters: - * None - * - * Return: - * Returns the value of the interrupt status register - * - *******************************************************************************/ - uint8 SCSI_Out_DBx_ClearInterrupt(void) - { - return (SCSI_Out_DBx_INTSTAT & SCSI_Out_DBx_MASK) >> SCSI_Out_DBx_SHIFT; - } - -#endif /* If Interrupts Are Enabled for this Pins component */ - -#endif /* CY_PSOC5A... */ - - -/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_Out_DBx.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_Out_DBx.h deleted file mode 100644 index 41bd7a9..0000000 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_Out_DBx.h +++ /dev/null @@ -1,130 +0,0 @@ -/******************************************************************************* -* File Name: SCSI_Out_DBx.h -* Version 1.90 -* -* Description: -* This file containts Control Register function prototypes and register defines -* -* Note: -* -******************************************************************************** -* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - -#if !defined(CY_PINS_SCSI_Out_DBx_H) /* Pins SCSI_Out_DBx_H */ -#define CY_PINS_SCSI_Out_DBx_H - -#include "cytypes.h" -#include "cyfitter.h" -#include "cypins.h" -#include "SCSI_Out_DBx_aliases.h" - -/* Check to see if required defines such as CY_PSOC5A are available */ -/* They are defined starting with cy_boot v3.0 */ -#if !defined (CY_PSOC5A) - #error Component cy_pins_v1_90 requires cy_boot v3.0 or later -#endif /* (CY_PSOC5A) */ - -/* APIs are not generated for P15[7:6] */ -#if !(CY_PSOC5A &&\ - SCSI_Out_DBx__PORT == 15 && ((SCSI_Out_DBx__MASK & 0xC0) != 0)) - - -/*************************************** -* Function Prototypes -***************************************/ - -void SCSI_Out_DBx_Write(uint8 value) ; -void SCSI_Out_DBx_SetDriveMode(uint8 mode) ; -uint8 SCSI_Out_DBx_ReadDataReg(void) ; -uint8 SCSI_Out_DBx_Read(void) ; -uint8 SCSI_Out_DBx_ClearInterrupt(void) ; - - -/*************************************** -* API Constants -***************************************/ - -/* Drive Modes */ -#define SCSI_Out_DBx_DM_ALG_HIZ PIN_DM_ALG_HIZ -#define SCSI_Out_DBx_DM_DIG_HIZ PIN_DM_DIG_HIZ -#define SCSI_Out_DBx_DM_RES_UP PIN_DM_RES_UP -#define SCSI_Out_DBx_DM_RES_DWN PIN_DM_RES_DWN -#define SCSI_Out_DBx_DM_OD_LO PIN_DM_OD_LO -#define SCSI_Out_DBx_DM_OD_HI PIN_DM_OD_HI -#define SCSI_Out_DBx_DM_STRONG PIN_DM_STRONG -#define SCSI_Out_DBx_DM_RES_UPDWN PIN_DM_RES_UPDWN - -/* Digital Port Constants */ -#define SCSI_Out_DBx_MASK SCSI_Out_DBx__MASK -#define SCSI_Out_DBx_SHIFT SCSI_Out_DBx__SHIFT -#define SCSI_Out_DBx_WIDTH 8u - - -/*************************************** -* Registers -***************************************/ - -/* Main Port Registers */ -/* Pin State */ -#define SCSI_Out_DBx_PS (* (reg8 *) SCSI_Out_DBx__PS) -/* Data Register */ -#define SCSI_Out_DBx_DR (* (reg8 *) SCSI_Out_DBx__DR) -/* Port Number */ -#define SCSI_Out_DBx_PRT_NUM (* (reg8 *) SCSI_Out_DBx__PRT) -/* Connect to Analog Globals */ -#define SCSI_Out_DBx_AG (* (reg8 *) SCSI_Out_DBx__AG) -/* Analog MUX bux enable */ -#define SCSI_Out_DBx_AMUX (* (reg8 *) SCSI_Out_DBx__AMUX) -/* Bidirectional Enable */ -#define SCSI_Out_DBx_BIE (* (reg8 *) SCSI_Out_DBx__BIE) -/* Bit-mask for Aliased Register Access */ -#define SCSI_Out_DBx_BIT_MASK (* (reg8 *) SCSI_Out_DBx__BIT_MASK) -/* Bypass Enable */ -#define SCSI_Out_DBx_BYP (* (reg8 *) SCSI_Out_DBx__BYP) -/* Port wide control signals */ -#define SCSI_Out_DBx_CTL (* (reg8 *) SCSI_Out_DBx__CTL) -/* Drive Modes */ -#define SCSI_Out_DBx_DM0 (* (reg8 *) SCSI_Out_DBx__DM0) -#define SCSI_Out_DBx_DM1 (* (reg8 *) SCSI_Out_DBx__DM1) -#define SCSI_Out_DBx_DM2 (* (reg8 *) SCSI_Out_DBx__DM2) -/* Input Buffer Disable Override */ -#define SCSI_Out_DBx_INP_DIS (* (reg8 *) SCSI_Out_DBx__INP_DIS) -/* LCD Common or Segment Drive */ -#define SCSI_Out_DBx_LCD_COM_SEG (* (reg8 *) SCSI_Out_DBx__LCD_COM_SEG) -/* Enable Segment LCD */ -#define SCSI_Out_DBx_LCD_EN (* (reg8 *) SCSI_Out_DBx__LCD_EN) -/* Slew Rate Control */ -#define SCSI_Out_DBx_SLW (* (reg8 *) SCSI_Out_DBx__SLW) - -/* DSI Port Registers */ -/* Global DSI Select Register */ -#define SCSI_Out_DBx_PRTDSI__CAPS_SEL (* (reg8 *) SCSI_Out_DBx__PRTDSI__CAPS_SEL) -/* Double Sync Enable */ -#define SCSI_Out_DBx_PRTDSI__DBL_SYNC_IN (* (reg8 *) SCSI_Out_DBx__PRTDSI__DBL_SYNC_IN) -/* Output Enable Select Drive Strength */ -#define SCSI_Out_DBx_PRTDSI__OE_SEL0 (* (reg8 *) SCSI_Out_DBx__PRTDSI__OE_SEL0) -#define SCSI_Out_DBx_PRTDSI__OE_SEL1 (* (reg8 *) SCSI_Out_DBx__PRTDSI__OE_SEL1) -/* Port Pin Output Select Registers */ -#define SCSI_Out_DBx_PRTDSI__OUT_SEL0 (* (reg8 *) SCSI_Out_DBx__PRTDSI__OUT_SEL0) -#define SCSI_Out_DBx_PRTDSI__OUT_SEL1 (* (reg8 *) SCSI_Out_DBx__PRTDSI__OUT_SEL1) -/* Sync Output Enable Registers */ -#define SCSI_Out_DBx_PRTDSI__SYNC_OUT (* (reg8 *) SCSI_Out_DBx__PRTDSI__SYNC_OUT) - - -#if defined(SCSI_Out_DBx__INTSTAT) /* Interrupt Registers */ - - #define SCSI_Out_DBx_INTSTAT (* (reg8 *) SCSI_Out_DBx__INTSTAT) - #define SCSI_Out_DBx_SNAP (* (reg8 *) SCSI_Out_DBx__SNAP) - -#endif /* Interrupt Registers */ - -#endif /* CY_PSOC5A... */ - -#endif /* CY_PINS_SCSI_Out_DBx_H */ - - -/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_Out_DBx_aliases.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_Out_DBx_aliases.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_RST.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_RST.c old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_RST.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_RST.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_RST_ISR.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_RST_ISR.c old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_RST_ISR.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_RST_ISR.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_RST_aliases.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_RST_aliases.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SDCard.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SDCard.c old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SDCard.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SDCard.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SDCard_INT.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SDCard_INT.c old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SDCard_PM.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SDCard_PM.c old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SDCard_PVT.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SDCard_PVT.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_CD.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_CD.c old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_CD.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_CD.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_CD_aliases.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_CD_aliases.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_CS.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_CS.c old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_CS.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_CS.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_CS_aliases.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_CS_aliases.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_Clk_Ctl.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_Clk_Ctl.c old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_Clk_Ctl.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_Clk_Ctl.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_DAT1.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_DAT1.c old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_DAT1.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_DAT1.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_DAT1_aliases.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_DAT1_aliases.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_DAT2.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_DAT2.c old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_DAT2.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_DAT2.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_DAT2_aliases.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_DAT2_aliases.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_Data_Clk.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_Data_Clk.c old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_Data_Clk.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_Data_Clk.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_Init_Clk.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_Init_Clk.c old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_Init_Clk.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_Init_Clk.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_MISO.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_MISO.c old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_MISO.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_MISO.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_MISO_aliases.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_MISO_aliases.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_MOSI.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_MOSI.c old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_MOSI.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_MOSI.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_MOSI_aliases.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_MOSI_aliases.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_SCK.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_SCK.c old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_SCK.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_SCK.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_SCK_aliases.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_SCK_aliases.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_WP.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_WP.c deleted file mode 100644 index 136473c..0000000 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_WP.c +++ /dev/null @@ -1,137 +0,0 @@ -/******************************************************************************* -* File Name: SD_WP.c -* Version 1.90 -* -* Description: -* This file contains API to enable firmware control of a Pins component. -* -* Note: -* -******************************************************************************** -* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - -#include "cytypes.h" -#include "SD_WP.h" - -/* APIs are not generated for P15[7:6] on PSoC 5 */ -#if !(CY_PSOC5A &&\ - SD_WP__PORT == 15 && ((SD_WP__MASK & 0xC0) != 0)) - - -/******************************************************************************* -* Function Name: SD_WP_Write -******************************************************************************** -* -* Summary: -* Assign a new value to the digital port's data output register. -* -* Parameters: -* prtValue: The value to be assigned to the Digital Port. -* -* Return: -* None -* -*******************************************************************************/ -void SD_WP_Write(uint8 value) -{ - uint8 staticBits = (SD_WP_DR & (uint8)(~SD_WP_MASK)); - SD_WP_DR = staticBits | ((uint8)(value << SD_WP_SHIFT) & SD_WP_MASK); -} - - -/******************************************************************************* -* Function Name: SD_WP_SetDriveMode -******************************************************************************** -* -* Summary: -* Change the drive mode on the pins of the port. -* -* Parameters: -* mode: Change the pins to this drive mode. -* -* Return: -* None -* -*******************************************************************************/ -void SD_WP_SetDriveMode(uint8 mode) -{ - CyPins_SetPinDriveMode(SD_WP_0, mode); -} - - -/******************************************************************************* -* Function Name: SD_WP_Read -******************************************************************************** -* -* Summary: -* Read the current value on the pins of the Digital Port in right justified -* form. -* -* Parameters: -* None -* -* Return: -* Returns the current value of the Digital Port as a right justified number -* -* Note: -* Macro SD_WP_ReadPS calls this function. -* -*******************************************************************************/ -uint8 SD_WP_Read(void) -{ - return (SD_WP_PS & SD_WP_MASK) >> SD_WP_SHIFT; -} - - -/******************************************************************************* -* Function Name: SD_WP_ReadDataReg -******************************************************************************** -* -* Summary: -* Read the current value assigned to a Digital Port's data output register -* -* Parameters: -* None -* -* Return: -* Returns the current value assigned to the Digital Port's data output register -* -*******************************************************************************/ -uint8 SD_WP_ReadDataReg(void) -{ - return (SD_WP_DR & SD_WP_MASK) >> SD_WP_SHIFT; -} - - -/* If Interrupts Are Enabled for this Pins component */ -#if defined(SD_WP_INTSTAT) - - /******************************************************************************* - * Function Name: SD_WP_ClearInterrupt - ******************************************************************************** - * Summary: - * Clears any active interrupts attached to port and returns the value of the - * interrupt status register. - * - * Parameters: - * None - * - * Return: - * Returns the value of the interrupt status register - * - *******************************************************************************/ - uint8 SD_WP_ClearInterrupt(void) - { - return (SD_WP_INTSTAT & SD_WP_MASK) >> SD_WP_SHIFT; - } - -#endif /* If Interrupts Are Enabled for this Pins component */ - -#endif /* CY_PSOC5A... */ - - -/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_WP.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_WP.h deleted file mode 100644 index 368e2f6..0000000 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_WP.h +++ /dev/null @@ -1,130 +0,0 @@ -/******************************************************************************* -* File Name: SD_WP.h -* Version 1.90 -* -* Description: -* This file containts Control Register function prototypes and register defines -* -* Note: -* -******************************************************************************** -* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - -#if !defined(CY_PINS_SD_WP_H) /* Pins SD_WP_H */ -#define CY_PINS_SD_WP_H - -#include "cytypes.h" -#include "cyfitter.h" -#include "cypins.h" -#include "SD_WP_aliases.h" - -/* Check to see if required defines such as CY_PSOC5A are available */ -/* They are defined starting with cy_boot v3.0 */ -#if !defined (CY_PSOC5A) - #error Component cy_pins_v1_90 requires cy_boot v3.0 or later -#endif /* (CY_PSOC5A) */ - -/* APIs are not generated for P15[7:6] */ -#if !(CY_PSOC5A &&\ - SD_WP__PORT == 15 && ((SD_WP__MASK & 0xC0) != 0)) - - -/*************************************** -* Function Prototypes -***************************************/ - -void SD_WP_Write(uint8 value) ; -void SD_WP_SetDriveMode(uint8 mode) ; -uint8 SD_WP_ReadDataReg(void) ; -uint8 SD_WP_Read(void) ; -uint8 SD_WP_ClearInterrupt(void) ; - - -/*************************************** -* API Constants -***************************************/ - -/* Drive Modes */ -#define SD_WP_DM_ALG_HIZ PIN_DM_ALG_HIZ -#define SD_WP_DM_DIG_HIZ PIN_DM_DIG_HIZ -#define SD_WP_DM_RES_UP PIN_DM_RES_UP -#define SD_WP_DM_RES_DWN PIN_DM_RES_DWN -#define SD_WP_DM_OD_LO PIN_DM_OD_LO -#define SD_WP_DM_OD_HI PIN_DM_OD_HI -#define SD_WP_DM_STRONG PIN_DM_STRONG -#define SD_WP_DM_RES_UPDWN PIN_DM_RES_UPDWN - -/* Digital Port Constants */ -#define SD_WP_MASK SD_WP__MASK -#define SD_WP_SHIFT SD_WP__SHIFT -#define SD_WP_WIDTH 1u - - -/*************************************** -* Registers -***************************************/ - -/* Main Port Registers */ -/* Pin State */ -#define SD_WP_PS (* (reg8 *) SD_WP__PS) -/* Data Register */ -#define SD_WP_DR (* (reg8 *) SD_WP__DR) -/* Port Number */ -#define SD_WP_PRT_NUM (* (reg8 *) SD_WP__PRT) -/* Connect to Analog Globals */ -#define SD_WP_AG (* (reg8 *) SD_WP__AG) -/* Analog MUX bux enable */ -#define SD_WP_AMUX (* (reg8 *) SD_WP__AMUX) -/* Bidirectional Enable */ -#define SD_WP_BIE (* (reg8 *) SD_WP__BIE) -/* Bit-mask for Aliased Register Access */ -#define SD_WP_BIT_MASK (* (reg8 *) SD_WP__BIT_MASK) -/* Bypass Enable */ -#define SD_WP_BYP (* (reg8 *) SD_WP__BYP) -/* Port wide control signals */ -#define SD_WP_CTL (* (reg8 *) SD_WP__CTL) -/* Drive Modes */ -#define SD_WP_DM0 (* (reg8 *) SD_WP__DM0) -#define SD_WP_DM1 (* (reg8 *) SD_WP__DM1) -#define SD_WP_DM2 (* (reg8 *) SD_WP__DM2) -/* Input Buffer Disable Override */ -#define SD_WP_INP_DIS (* (reg8 *) SD_WP__INP_DIS) -/* LCD Common or Segment Drive */ -#define SD_WP_LCD_COM_SEG (* (reg8 *) SD_WP__LCD_COM_SEG) -/* Enable Segment LCD */ -#define SD_WP_LCD_EN (* (reg8 *) SD_WP__LCD_EN) -/* Slew Rate Control */ -#define SD_WP_SLW (* (reg8 *) SD_WP__SLW) - -/* DSI Port Registers */ -/* Global DSI Select Register */ -#define SD_WP_PRTDSI__CAPS_SEL (* (reg8 *) SD_WP__PRTDSI__CAPS_SEL) -/* Double Sync Enable */ -#define SD_WP_PRTDSI__DBL_SYNC_IN (* (reg8 *) SD_WP__PRTDSI__DBL_SYNC_IN) -/* Output Enable Select Drive Strength */ -#define SD_WP_PRTDSI__OE_SEL0 (* (reg8 *) SD_WP__PRTDSI__OE_SEL0) -#define SD_WP_PRTDSI__OE_SEL1 (* (reg8 *) SD_WP__PRTDSI__OE_SEL1) -/* Port Pin Output Select Registers */ -#define SD_WP_PRTDSI__OUT_SEL0 (* (reg8 *) SD_WP__PRTDSI__OUT_SEL0) -#define SD_WP_PRTDSI__OUT_SEL1 (* (reg8 *) SD_WP__PRTDSI__OUT_SEL1) -/* Sync Output Enable Registers */ -#define SD_WP_PRTDSI__SYNC_OUT (* (reg8 *) SD_WP__PRTDSI__SYNC_OUT) - - -#if defined(SD_WP__INTSTAT) /* Interrupt Registers */ - - #define SD_WP_INTSTAT (* (reg8 *) SD_WP__INTSTAT) - #define SD_WP_SNAP (* (reg8 *) SD_WP__SNAP) - -#endif /* Interrupt Registers */ - -#endif /* CY_PSOC5A... */ - -#endif /* CY_PINS_SD_WP_H */ - - -/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS.h index e7fd899..8858b47 100755 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS.h +++ b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS.h @@ -77,6 +77,11 @@ #define USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_OUT_BUF_SIZE (65u) #define USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_NUM_OUT_RPTS (1u) #define USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_COUNT (1u) +#define USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_IN_BUF_SIZE (65u) +#define USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_NUM_IN_RPTS (1u) +#define USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_OUT_BUF_SIZE (65u) +#define USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_NUM_OUT_RPTS (1u) +#define USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_COUNT (1u) #define USBFS_ENABLE_HID_CLASS #define USBFS_HID_RPT_1_SIZE_LSB (0x24u) #define USBFS_HID_RPT_1_SIZE_MSB (0x00u) @@ -86,12 +91,12 @@ #define USBFS_EXTERN_VBUS (0u) #define USBFS_EXTERN_VND (0u) #define USBFS_EXTERN_CLS (0u) -#define USBFS_MAX_INTERFACES_NUMBER (1u) +#define USBFS_MAX_INTERFACES_NUMBER (2u) #define USBFS_EP0_ISR_REMOVE (0u) #define USBFS_EP1_ISR_REMOVE (0u) #define USBFS_EP2_ISR_REMOVE (0u) -#define USBFS_EP3_ISR_REMOVE (1u) -#define USBFS_EP4_ISR_REMOVE (1u) +#define USBFS_EP3_ISR_REMOVE (0u) +#define USBFS_EP4_ISR_REMOVE (0u) #define USBFS_EP5_ISR_REMOVE (1u) #define USBFS_EP6_ISR_REMOVE (1u) #define USBFS_EP7_ISR_REMOVE (1u) diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1.c deleted file mode 100644 index 61d6b01..0000000 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1.c +++ /dev/null @@ -1,1335 +0,0 @@ -/******************************************************************************* -* File Name: USBFS_1.c -* Version 2.60 -* -* Description: -* API for USBFS Component. -* -* Note: -* Many of the functions use endpoint number. RAM arrays are sized with 9 -* elements so they are indexed directly by epNumber. The SIE and ARB -* registers are indexed by variations of epNumber - 1. -* -******************************************************************************** -* Copyright 2008-2013, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - -#include -#include "USBFS_1.h" -#include "USBFS_1_pvt.h" -#include "USBFS_1_hid.h" -#if(USBFS_1_DMA1_REMOVE == 0u) - #include "USBFS_1_ep1_dma.h" -#endif /* End USBFS_1_DMA1_REMOVE */ -#if(USBFS_1_DMA2_REMOVE == 0u) - #include "USBFS_1_ep2_dma.h" -#endif /* End USBFS_1_DMA2_REMOVE */ -#if(USBFS_1_DMA3_REMOVE == 0u) - #include "USBFS_1_ep3_dma.h" -#endif /* End USBFS_1_DMA3_REMOVE */ -#if(USBFS_1_DMA4_REMOVE == 0u) - #include "USBFS_1_ep4_dma.h" -#endif /* End USBFS_1_DMA4_REMOVE */ -#if(USBFS_1_DMA5_REMOVE == 0u) - #include "USBFS_1_ep5_dma.h" -#endif /* End USBFS_1_DMA5_REMOVE */ -#if(USBFS_1_DMA6_REMOVE == 0u) - #include "USBFS_1_ep6_dma.h" -#endif /* End USBFS_1_DMA6_REMOVE */ -#if(USBFS_1_DMA7_REMOVE == 0u) - #include "USBFS_1_ep7_dma.h" -#endif /* End USBFS_1_DMA7_REMOVE */ -#if(USBFS_1_DMA8_REMOVE == 0u) - #include "USBFS_1_ep8_dma.h" -#endif /* End USBFS_1_DMA8_REMOVE */ - - -/*************************************** -* Global data allocation -***************************************/ - -uint8 USBFS_1_initVar = 0u; -#if(USBFS_1_EP_MM != USBFS_1__EP_MANUAL) - uint8 USBFS_1_DmaChan[USBFS_1_MAX_EP]; - uint8 USBFS_1_DmaTd[USBFS_1_MAX_EP]; -#endif /* End USBFS_1_EP_MM */ - - -/******************************************************************************* -* Function Name: USBFS_1_Start -******************************************************************************** -* -* Summary: -* This function initialize the USB SIE, arbiter and the -* endpoint APIs, including setting the D+ Pullup -* -* Parameters: -* device: Contains the device number of the desired device descriptor. -* The device number can be found in the Device Descriptor Tab of -* "Configure" dialog, under the settings of desired Device Descriptor, -* in the "Device Number" field. -* mode: The operating voltage. This determines whether the voltage regulator -* is enabled for 5V operation or if pass through mode is used for 3.3V -* operation. Symbolic names and their associated values are given in the -* following table. -* USBFS_1_3V_OPERATION - Disable voltage regulator and pass-thru -* Vcc for pull-up -* USBFS_1_5V_OPERATION - Enable voltage regulator and use -* regulator for pull-up -* USBFS_1_DWR_VDDD_OPERATION - Enable or Disable voltage -* regulator depend on Vddd Voltage configuration in DWR. -* -* Return: -* None. -* -* Global variables: -* The USBFS_1_intiVar variable is used to indicate initial -* configuration of this component. The variable is initialized to zero (0u) -* and set to one (1u) the first time USBFS_1_Start() is called. -* This allows for component Re-Start without unnecessary re-initialization -* in all subsequent calls to the USBFS_1_Start() routine. -* If re-initialization of the component is required the variable should be set -* to zero before call of UART_Start() routine, or the user may call -* USBFS_1_Init() and USBFS_1_InitComponent() as done -* in the USBFS_1_Start() routine. -* -* Side Effects: -* This function will reset all communication states to default. -* -* Reentrant: -* No. -* -*******************************************************************************/ -void USBFS_1_Start(uint8 device, uint8 mode) -{ - /* If not Initialized then initialize all required hardware and software */ - if(USBFS_1_initVar == 0u) - { - USBFS_1_Init(); - USBFS_1_initVar = 1u; - } - USBFS_1_InitComponent(device, mode); -} - - -/******************************************************************************* -* Function Name: USBFS_1_Init -******************************************************************************** -* -* Summary: -* Initialize component's hardware. Usually called in USBFS_1_Start(). -* -* Parameters: -* None. -* -* Return: -* None. -* -* Reentrant: -* No. -* -*******************************************************************************/ -void USBFS_1_Init(void) -{ - uint8 enableInterrupts; - #if(USBFS_1_EP_MM != USBFS_1__EP_MANUAL) - uint16 i; - #endif /* End USBFS_1_EP_MM != USBFS_1__EP_MANUAL */ - - enableInterrupts = CyEnterCriticalSection(); - - /* Enable USB block */ - USBFS_1_PM_ACT_CFG_REG |= USBFS_1_PM_ACT_EN_FSUSB; - /* Enable USB block for Standby Power Mode */ - USBFS_1_PM_STBY_CFG_REG |= USBFS_1_PM_STBY_EN_FSUSB; - - /* Enable core clock */ - USBFS_1_USB_CLK_EN_REG = USBFS_1_USB_CLK_ENABLE; - - USBFS_1_CR1_REG = USBFS_1_CR1_ENABLE_LOCK; - - /* ENABLING USBIO PADS IN USB MODE FROM I/O MODE */ - /* Ensure USB transmit enable is low (USB_USBIO_CR0.ten). - Manual Transmission - Disabled */ - USBFS_1_USBIO_CR0_REG &= ((uint8)(~USBFS_1_USBIO_CR0_TEN)); - CyDelayUs(0u); /*~50ns delay */ - /* Disable the USBIO by asserting PM.USB_CR0.fsusbio_pd_n(Inverted) - * high. This will have been set low by the power manger out of reset. - * Also confirm USBIO pull-up disabled - */ - USBFS_1_PM_USB_CR0_REG &= ((uint8)(~(USBFS_1_PM_USB_CR0_PD_N | - USBFS_1_PM_USB_CR0_PD_PULLUP_N))); - - /* Select iomode to USB mode*/ - USBFS_1_USBIO_CR1_REG &= ((uint8)(~USBFS_1_USBIO_CR1_IOMODE)); - - /* Enable the USBIO reference by setting PM.USB_CR0.fsusbio_ref_en.*/ - USBFS_1_PM_USB_CR0_REG |= USBFS_1_PM_USB_CR0_REF_EN; - /* The reference will be available 1 us after the regulator is enabled */ - CyDelayUs(1u); - /* OR 40us after power restored */ - CyDelayUs(40u); - /* Ensure the single ended disable bits are low (PRT15.INP_DIS[7:6])(input receiver enabled). */ - USBFS_1_DM_INP_DIS_REG &= ((uint8)(~USBFS_1_DM_MASK)); - USBFS_1_DP_INP_DIS_REG &= ((uint8)(~USBFS_1_DP_MASK)); - - /* Enable USBIO */ - USBFS_1_PM_USB_CR0_REG |= USBFS_1_PM_USB_CR0_PD_N; - CyDelayUs(2u); - /* Set the USBIO pull-up enable */ - USBFS_1_PM_USB_CR0_REG |= USBFS_1_PM_USB_CR0_PD_PULLUP_N; - - /* Write WAx */ - CY_SET_REG8(USBFS_1_ARB_RW1_WA_PTR, 0u); - CY_SET_REG8(USBFS_1_ARB_RW1_WA_MSB_PTR, 0u); - - #if(USBFS_1_EP_MM != USBFS_1__EP_MANUAL) - /* Init transfer descriptor. This will be used to detect the DMA state - initialized or not. */ - for (i = 0u; i < USBFS_1_MAX_EP; i++) - { - USBFS_1_DmaTd[i] = DMA_INVALID_TD; - } - #endif /* End USBFS_1_EP_MM != USBFS_1__EP_MANUAL */ - - CyExitCriticalSection(enableInterrupts); - - - /* Set the bus reset Interrupt. */ - (void) CyIntSetVector(USBFS_1_BUS_RESET_VECT_NUM, &USBFS_1_BUS_RESET_ISR); - CyIntSetPriority(USBFS_1_BUS_RESET_VECT_NUM, USBFS_1_BUS_RESET_PRIOR); - - /* Set the SOF Interrupt. */ - #if(USBFS_1_SOF_ISR_REMOVE == 0u) - (void) CyIntSetVector(USBFS_1_SOF_VECT_NUM, &USBFS_1_SOF_ISR); - CyIntSetPriority(USBFS_1_SOF_VECT_NUM, USBFS_1_SOF_PRIOR); - #endif /* End USBFS_1_SOF_ISR_REMOVE */ - - /* Set the Control Endpoint Interrupt. */ - (void) CyIntSetVector(USBFS_1_EP_0_VECT_NUM, &USBFS_1_EP_0_ISR); - CyIntSetPriority(USBFS_1_EP_0_VECT_NUM, USBFS_1_EP_0_PRIOR); - - /* Set the Data Endpoint 1 Interrupt. */ - #if(USBFS_1_EP1_ISR_REMOVE == 0u) - (void) CyIntSetVector(USBFS_1_EP_1_VECT_NUM, &USBFS_1_EP_1_ISR); - CyIntSetPriority(USBFS_1_EP_1_VECT_NUM, USBFS_1_EP_1_PRIOR); - #endif /* End USBFS_1_EP1_ISR_REMOVE */ - - /* Set the Data Endpoint 2 Interrupt. */ - #if(USBFS_1_EP2_ISR_REMOVE == 0u) - (void) CyIntSetVector(USBFS_1_EP_2_VECT_NUM, &USBFS_1_EP_2_ISR); - CyIntSetPriority(USBFS_1_EP_2_VECT_NUM, USBFS_1_EP_2_PRIOR); - #endif /* End USBFS_1_EP2_ISR_REMOVE */ - - /* Set the Data Endpoint 3 Interrupt. */ - #if(USBFS_1_EP3_ISR_REMOVE == 0u) - (void) CyIntSetVector(USBFS_1_EP_3_VECT_NUM, &USBFS_1_EP_3_ISR); - CyIntSetPriority(USBFS_1_EP_3_VECT_NUM, USBFS_1_EP_3_PRIOR); - #endif /* End USBFS_1_EP3_ISR_REMOVE */ - - /* Set the Data Endpoint 4 Interrupt. */ - #if(USBFS_1_EP4_ISR_REMOVE == 0u) - (void) CyIntSetVector(USBFS_1_EP_4_VECT_NUM, &USBFS_1_EP_4_ISR); - CyIntSetPriority(USBFS_1_EP_4_VECT_NUM, USBFS_1_EP_4_PRIOR); - #endif /* End USBFS_1_EP4_ISR_REMOVE */ - - /* Set the Data Endpoint 5 Interrupt. */ - #if(USBFS_1_EP5_ISR_REMOVE == 0u) - (void) CyIntSetVector(USBFS_1_EP_5_VECT_NUM, &USBFS_1_EP_5_ISR); - CyIntSetPriority(USBFS_1_EP_5_VECT_NUM, USBFS_1_EP_5_PRIOR); - #endif /* End USBFS_1_EP5_ISR_REMOVE */ - - /* Set the Data Endpoint 6 Interrupt. */ - #if(USBFS_1_EP6_ISR_REMOVE == 0u) - (void) CyIntSetVector(USBFS_1_EP_6_VECT_NUM, &USBFS_1_EP_6_ISR); - CyIntSetPriority(USBFS_1_EP_6_VECT_NUM, USBFS_1_EP_6_PRIOR); - #endif /* End USBFS_1_EP6_ISR_REMOVE */ - - /* Set the Data Endpoint 7 Interrupt. */ - #if(USBFS_1_EP7_ISR_REMOVE == 0u) - (void) CyIntSetVector(USBFS_1_EP_7_VECT_NUM, &USBFS_1_EP_7_ISR); - CyIntSetPriority(USBFS_1_EP_7_VECT_NUM, USBFS_1_EP_7_PRIOR); - #endif /* End USBFS_1_EP7_ISR_REMOVE */ - - /* Set the Data Endpoint 8 Interrupt. */ - #if(USBFS_1_EP8_ISR_REMOVE == 0u) - (void) CyIntSetVector(USBFS_1_EP_8_VECT_NUM, &USBFS_1_EP_8_ISR); - CyIntSetPriority(USBFS_1_EP_8_VECT_NUM, USBFS_1_EP_8_PRIOR); - #endif /* End USBFS_1_EP8_ISR_REMOVE */ - - #if((USBFS_1_EP_MM != USBFS_1__EP_MANUAL) && (USBFS_1_ARB_ISR_REMOVE == 0u)) - /* Set the ARB Interrupt. */ - (void) CyIntSetVector(USBFS_1_ARB_VECT_NUM, &USBFS_1_ARB_ISR); - CyIntSetPriority(USBFS_1_ARB_VECT_NUM, USBFS_1_ARB_PRIOR); - #endif /* End USBFS_1_EP_MM != USBFS_1__EP_MANUAL */ - -} - - -/******************************************************************************* -* Function Name: USBFS_1_InitComponent -******************************************************************************** -* -* Summary: -* Initialize the component, except for the HW which is done one time in -* the Start function. This function pulls up D+. -* -* Parameters: -* device: Contains the device number of the desired device descriptor. -* The device number can be found in the Device Descriptor Tab of -* "Configure" dialog, under the settings of desired Device Descriptor, -* in the "Device Number" field. -* mode: The operating voltage. This determines whether the voltage regulator -* is enabled for 5V operation or if pass through mode is used for 3.3V -* operation. Symbolic names and their associated values are given in the -* following table. -* USBFS_1_3V_OPERATION - Disable voltage regulator and pass-thru -* Vcc for pull-up -* USBFS_1_5V_OPERATION - Enable voltage regulator and use -* regulator for pull-up -* USBFS_1_DWR_VDDD_OPERATION - Enable or Disable voltage -* regulator depend on Vddd Voltage configuration in DWR. -* -* Return: -* None. -* -* Global variables: -* USBFS_1_device: Contains the device number of the desired device -* descriptor. The device number can be found in the Device Descriptor Tab -* of "Configure" dialog, under the settings of desired Device Descriptor, -* in the "Device Number" field. -* USBFS_1_transferState: This variable used by the communication -* functions to handle current transfer state. Initialized to -* TRANS_STATE_IDLE in this API. -* USBFS_1_configuration: Contains current configuration number -* which is set by the Host using SET_CONFIGURATION request. -* Initialized to zero in this API. -* USBFS_1_deviceAddress: Contains current device address. This -* variable is initialized to zero in this API. Host starts to communicate -* to device with address 0 and then set it to whatever value using -* SET_ADDRESS request. -* USBFS_1_deviceStatus: initialized to 0. -* This is two bit variable which contain power status in first bit -* (DEVICE_STATUS_BUS_POWERED or DEVICE_STATUS_SELF_POWERED) and remote -* wakeup status (DEVICE_STATUS_REMOTE_WAKEUP) in second bit. -* USBFS_1_lastPacketSize initialized to 0; -* -* Reentrant: -* No. -* -*******************************************************************************/ -void USBFS_1_InitComponent(uint8 device, uint8 mode) -{ - /* Initialize _hidProtocol variable to comply with - * HID 7.2.6 Set_Protocol Request: - * "When initialized, all devices default to report protocol." - */ - #if defined(USBFS_1_ENABLE_HID_CLASS) - uint8 i; - - for (i = 0u; i < USBFS_1_MAX_INTERFACES_NUMBER; i++) - { - USBFS_1_hidProtocol[i] = USBFS_1_PROTOCOL_REPORT; - } - #endif /* USBFS_1_ENABLE_HID_CLASS */ - - /* Enable Interrupts. */ - CyIntEnable(USBFS_1_BUS_RESET_VECT_NUM); - CyIntEnable(USBFS_1_EP_0_VECT_NUM); - #if(USBFS_1_EP1_ISR_REMOVE == 0u) - CyIntEnable(USBFS_1_EP_1_VECT_NUM); - #endif /* End USBFS_1_EP1_ISR_REMOVE */ - #if(USBFS_1_EP2_ISR_REMOVE == 0u) - CyIntEnable(USBFS_1_EP_2_VECT_NUM); - #endif /* End USBFS_1_EP2_ISR_REMOVE */ - #if(USBFS_1_EP3_ISR_REMOVE == 0u) - CyIntEnable(USBFS_1_EP_3_VECT_NUM); - #endif /* End USBFS_1_EP3_ISR_REMOVE */ - #if(USBFS_1_EP4_ISR_REMOVE == 0u) - CyIntEnable(USBFS_1_EP_4_VECT_NUM); - #endif /* End USBFS_1_EP4_ISR_REMOVE */ - #if(USBFS_1_EP5_ISR_REMOVE == 0u) - CyIntEnable(USBFS_1_EP_5_VECT_NUM); - #endif /* End USBFS_1_EP5_ISR_REMOVE */ - #if(USBFS_1_EP6_ISR_REMOVE == 0u) - CyIntEnable(USBFS_1_EP_6_VECT_NUM); - #endif /* End USBFS_1_EP6_ISR_REMOVE */ - #if(USBFS_1_EP7_ISR_REMOVE == 0u) - CyIntEnable(USBFS_1_EP_7_VECT_NUM); - #endif /* End USBFS_1_EP7_ISR_REMOVE */ - #if(USBFS_1_EP8_ISR_REMOVE == 0u) - CyIntEnable(USBFS_1_EP_8_VECT_NUM); - #endif /* End USBFS_1_EP8_ISR_REMOVE */ - #if((USBFS_1_EP_MM != USBFS_1__EP_MANUAL) && (USBFS_1_ARB_ISR_REMOVE == 0u)) - /* usb arb interrupt enable */ - USBFS_1_ARB_INT_EN_REG = USBFS_1_ARB_INT_MASK; - CyIntEnable(USBFS_1_ARB_VECT_NUM); - #endif /* End USBFS_1_EP_MM != USBFS_1__EP_MANUAL */ - - /* Arbiter configuration for DMA transfers */ - #if(USBFS_1_EP_MM != USBFS_1__EP_MANUAL) - - #if(USBFS_1_EP_MM == USBFS_1__EP_DMAMANUAL) - USBFS_1_ARB_CFG_REG = USBFS_1_ARB_CFG_MANUAL_DMA; - #endif /* End USBFS_1_EP_MM == USBFS_1__EP_DMAMANUAL */ - #if(USBFS_1_EP_MM == USBFS_1__EP_DMAAUTO) - /*Set cfg cmplt this rises DMA request when the full configuration is done */ - USBFS_1_ARB_CFG_REG = USBFS_1_ARB_CFG_AUTO_DMA | USBFS_1_ARB_CFG_AUTO_MEM; - #endif /* End USBFS_1_EP_MM == USBFS_1__EP_DMAAUTO */ - #endif /* End USBFS_1_EP_MM != USBFS_1__EP_MANUAL */ - - USBFS_1_transferState = USBFS_1_TRANS_STATE_IDLE; - - /* USB Locking: Enabled, VRegulator: depend on mode or DWR Voltage configuration*/ - switch(mode) - { - case USBFS_1_3V_OPERATION: - USBFS_1_CR1_REG = USBFS_1_CR1_ENABLE_LOCK; - break; - case USBFS_1_5V_OPERATION: - USBFS_1_CR1_REG = USBFS_1_CR1_ENABLE_LOCK | USBFS_1_CR1_REG_ENABLE; - break; - default: /*USBFS_1_DWR_VDDD_OPERATION */ - #if(USBFS_1_VDDD_MV < USBFS_1_3500MV) - USBFS_1_CR1_REG = USBFS_1_CR1_ENABLE_LOCK; - #else - USBFS_1_CR1_REG = USBFS_1_CR1_ENABLE_LOCK | USBFS_1_CR1_REG_ENABLE; - #endif /* End USBFS_1_VDDD_MV < USBFS_1_3500MV */ - break; - } - - /* Record the descriptor selection */ - USBFS_1_device = device; - - /* Clear all of the component data */ - USBFS_1_configuration = 0u; - USBFS_1_interfaceNumber = 0u; - USBFS_1_configurationChanged = 0u; - USBFS_1_deviceAddress = 0u; - USBFS_1_deviceStatus = 0u; - - USBFS_1_lastPacketSize = 0u; - - /* ACK Setup, Stall IN/OUT */ - CY_SET_REG8(USBFS_1_EP0_CR_PTR, USBFS_1_MODE_STALL_IN_OUT); - - /* Enable the SIE with an address 0 */ - CY_SET_REG8(USBFS_1_CR0_PTR, USBFS_1_CR0_ENABLE); - - /* Workaround for PSOC5LP */ - CyDelayCycles(1u); - - /* Finally, Enable d+ pullup and select iomode to USB mode*/ - CY_SET_REG8(USBFS_1_USBIO_CR1_PTR, USBFS_1_USBIO_CR1_USBPUEN); -} - - -/******************************************************************************* -* Function Name: USBFS_1_ReInitComponent -******************************************************************************** -* -* Summary: -* This function reinitialize the component configuration and is -* intend to be called from the Reset interrupt. -* -* Parameters: -* None. -* -* Return: -* None. -* -* Global variables: -* USBFS_1_device: Contains the device number of the desired device -* descriptor. The device number can be found in the Device Descriptor Tab -* of "Configure" dialog, under the settings of desired Device Descriptor, -* in the "Device Number" field. -* USBFS_1_transferState: This variable used by the communication -* functions to handle current transfer state. Initialized to -* TRANS_STATE_IDLE in this API. -* USBFS_1_configuration: Contains current configuration number -* which is set by the Host using SET_CONFIGURATION request. -* Initialized to zero in this API. -* USBFS_1_deviceAddress: Contains current device address. This -* variable is initialized to zero in this API. Host starts to communicate -* to device with address 0 and then set it to whatever value using -* SET_ADDRESS request. -* USBFS_1_deviceStatus: initialized to 0. -* This is two bit variable which contain power status in first bit -* (DEVICE_STATUS_BUS_POWERED or DEVICE_STATUS_SELF_POWERED) and remote -* wakeup status (DEVICE_STATUS_REMOTE_WAKEUP) in second bit. -* USBFS_1_lastPacketSize initialized to 0; -* -* Reentrant: -* No. -* -*******************************************************************************/ -void USBFS_1_ReInitComponent(void) -{ - /* Initialize _hidProtocol variable to comply with HID 7.2.6 Set_Protocol - * Request: "When initialized, all devices default to report protocol." - */ - #if defined(USBFS_1_ENABLE_HID_CLASS) - uint8 i; - - for (i = 0u; i < USBFS_1_MAX_INTERFACES_NUMBER; i++) - { - USBFS_1_hidProtocol[i] = USBFS_1_PROTOCOL_REPORT; - } - #endif /* USBFS_1_ENABLE_HID_CLASS */ - - USBFS_1_transferState = USBFS_1_TRANS_STATE_IDLE; - - /* Clear all of the component data */ - USBFS_1_configuration = 0u; - USBFS_1_interfaceNumber = 0u; - USBFS_1_configurationChanged = 0u; - USBFS_1_deviceAddress = 0u; - USBFS_1_deviceStatus = 0u; - - USBFS_1_lastPacketSize = 0u; - - - /* ACK Setup, Stall IN/OUT */ - CY_SET_REG8(USBFS_1_EP0_CR_PTR, USBFS_1_MODE_STALL_IN_OUT); - - /* Enable the SIE with an address 0 */ - CY_SET_REG8(USBFS_1_CR0_PTR, USBFS_1_CR0_ENABLE); - -} - - -/******************************************************************************* -* Function Name: USBFS_1_Stop -******************************************************************************** -* -* Summary: -* This function shuts down the USB function including to release -* the D+ Pullup and disabling the SIE. -* -* Parameters: -* None. -* -* Return: -* None. -* -* Global variables: -* USBFS_1_configuration: Contains current configuration number -* which is set by the Host using SET_CONFIGURATION request. -* Initialized to zero in this API. -* USBFS_1_deviceAddress: Contains current device address. This -* variable is initialized to zero in this API. Host starts to communicate -* to device with address 0 and then set it to whatever value using -* SET_ADDRESS request. -* USBFS_1_deviceStatus: initialized to 0. -* This is two bit variable which contain power status in first bit -* (DEVICE_STATUS_BUS_POWERED or DEVICE_STATUS_SELF_POWERED) and remote -* wakeup status (DEVICE_STATUS_REMOTE_WAKEUP) in second bit. -* USBFS_1_configurationChanged: This variable is set to one after -* SET_CONFIGURATION request and cleared in this function. -* USBFS_1_intiVar variable is set to zero -* -*******************************************************************************/ -void USBFS_1_Stop(void) -{ - - #if(USBFS_1_EP_MM != USBFS_1__EP_MANUAL) - USBFS_1_Stop_DMA(USBFS_1_MAX_EP); /* Stop all DMAs */ - #endif /* End USBFS_1_EP_MM != USBFS_1__EP_MANUAL */ - - /* Disable the SIE */ - USBFS_1_CR0_REG &= (uint8)(~USBFS_1_CR0_ENABLE); - /* Disable the d+ pullup */ - USBFS_1_USBIO_CR1_REG &= (uint8)(~USBFS_1_USBIO_CR1_USBPUEN); - /* Disable USB in ACT PM */ - USBFS_1_PM_ACT_CFG_REG &= (uint8)(~USBFS_1_PM_ACT_EN_FSUSB); - /* Disable USB block for Standby Power Mode */ - USBFS_1_PM_STBY_CFG_REG &= (uint8)(~USBFS_1_PM_STBY_EN_FSUSB); - - /* Disable the reset and EP interrupts */ - CyIntDisable(USBFS_1_BUS_RESET_VECT_NUM); - CyIntDisable(USBFS_1_EP_0_VECT_NUM); - #if(USBFS_1_EP1_ISR_REMOVE == 0u) - CyIntDisable(USBFS_1_EP_1_VECT_NUM); - #endif /* End USBFS_1_EP1_ISR_REMOVE */ - #if(USBFS_1_EP2_ISR_REMOVE == 0u) - CyIntDisable(USBFS_1_EP_2_VECT_NUM); - #endif /* End USBFS_1_EP2_ISR_REMOVE */ - #if(USBFS_1_EP3_ISR_REMOVE == 0u) - CyIntDisable(USBFS_1_EP_3_VECT_NUM); - #endif /* End USBFS_1_EP3_ISR_REMOVE */ - #if(USBFS_1_EP4_ISR_REMOVE == 0u) - CyIntDisable(USBFS_1_EP_4_VECT_NUM); - #endif /* End USBFS_1_EP4_ISR_REMOVE */ - #if(USBFS_1_EP5_ISR_REMOVE == 0u) - CyIntDisable(USBFS_1_EP_5_VECT_NUM); - #endif /* End USBFS_1_EP5_ISR_REMOVE */ - #if(USBFS_1_EP6_ISR_REMOVE == 0u) - CyIntDisable(USBFS_1_EP_6_VECT_NUM); - #endif /* End USBFS_1_EP6_ISR_REMOVE */ - #if(USBFS_1_EP7_ISR_REMOVE == 0u) - CyIntDisable(USBFS_1_EP_7_VECT_NUM); - #endif /* End USBFS_1_EP7_ISR_REMOVE */ - #if(USBFS_1_EP8_ISR_REMOVE == 0u) - CyIntDisable(USBFS_1_EP_8_VECT_NUM); - #endif /* End USBFS_1_EP8_ISR_REMOVE */ - - /* Clear all of the component data */ - USBFS_1_configuration = 0u; - USBFS_1_interfaceNumber = 0u; - USBFS_1_configurationChanged = 0u; - USBFS_1_deviceAddress = 0u; - USBFS_1_deviceStatus = 0u; - USBFS_1_initVar = 0u; - -} - - -/******************************************************************************* -* Function Name: USBFS_1_CheckActivity -******************************************************************************** -* -* Summary: -* Returns the activity status of the bus. Clears the status hardware to -* provide fresh activity status on the next call of this routine. -* -* Parameters: -* None. -* -* Return: -* 1 - If bus activity was detected since the last call to this function -* 0 - If bus activity not was detected since the last call to this function -* -*******************************************************************************/ -uint8 USBFS_1_CheckActivity(void) -{ - uint8 r; - - r = CY_GET_REG8(USBFS_1_CR1_PTR); - CY_SET_REG8(USBFS_1_CR1_PTR, (r & ((uint8)(~USBFS_1_CR1_BUS_ACTIVITY)))); - - return((r & USBFS_1_CR1_BUS_ACTIVITY) >> USBFS_1_CR1_BUS_ACTIVITY_SHIFT); -} - - -/******************************************************************************* -* Function Name: USBFS_1_GetConfiguration -******************************************************************************** -* -* Summary: -* Returns the current configuration setting -* -* Parameters: -* None. -* -* Return: -* configuration. -* -*******************************************************************************/ -uint8 USBFS_1_GetConfiguration(void) -{ - return(USBFS_1_configuration); -} - - -/******************************************************************************* -* Function Name: USBFS_1_IsConfigurationChanged -******************************************************************************** -* -* Summary: -* Returns the clear on read configuration state. It is usefull when PC send -* double SET_CONFIGURATION request with same configuration number. -* -* Parameters: -* None. -* -* Return: -* Not zero value when new configuration has been changed, otherwise zero is -* returned. -* -* Global variables: -* USBFS_1_configurationChanged: This variable is set to one after -* SET_CONFIGURATION request and cleared in this function. -* -*******************************************************************************/ -uint8 USBFS_1_IsConfigurationChanged(void) -{ - uint8 res = 0u; - - if(USBFS_1_configurationChanged != 0u) - { - res = USBFS_1_configurationChanged; - USBFS_1_configurationChanged = 0u; - } - - return(res); -} - - -/******************************************************************************* -* Function Name: USBFS_1_GetInterfaceSetting -******************************************************************************** -* -* Summary: -* Returns the alternate setting from current interface -* -* Parameters: -* uint8 interfaceNumber, interface number -* -* Return: -* Alternate setting. -* -*******************************************************************************/ -uint8 USBFS_1_GetInterfaceSetting(uint8 interfaceNumber) - -{ - return(USBFS_1_interfaceSetting[interfaceNumber]); -} - - -/******************************************************************************* -* Function Name: USBFS_1_GetEPState -******************************************************************************** -* -* Summary: -* Returned the state of the requested endpoint. -* -* Parameters: -* epNumber: Endpoint Number -* -* Return: -* State of the requested endpoint. -* -*******************************************************************************/ -uint8 USBFS_1_GetEPState(uint8 epNumber) -{ - return(USBFS_1_EP[epNumber].apiEpState); -} - - -/******************************************************************************* -* Function Name: USBFS_1_GetEPCount -******************************************************************************** -* -* Summary: -* This function supports Data Endpoints only(EP1-EP8). -* Returns the transfer count for the requested endpoint. The value from -* the count registers includes 2 counts for the two byte checksum of the -* packet. This function subtracts the two counts. -* -* Parameters: -* epNumber: Data Endpoint Number. -* Valid values are between 1 and 8. -* -* Return: -* Returns the current byte count from the specified endpoint or 0 for an -* invalid endpoint. -* -*******************************************************************************/ -uint16 USBFS_1_GetEPCount(uint8 epNumber) -{ - uint8 ri; - uint16 result = 0u; - - if((epNumber > USBFS_1_EP0) && (epNumber < USBFS_1_MAX_EP)) - { - ri = ((epNumber - USBFS_1_EP1) << USBFS_1_EPX_CNTX_ADDR_SHIFT); - - result = (uint8)(CY_GET_REG8((reg8 *)(USBFS_1_SIE_EP1_CNT0_IND + ri)) & - USBFS_1_EPX_CNT0_MASK); - result = (result << 8u) | CY_GET_REG8((reg8 *)(USBFS_1_SIE_EP1_CNT1_IND + ri)); - result -= USBFS_1_EPX_CNTX_CRC_COUNT; - } - return(result); -} - - -#if(USBFS_1_EP_MM != USBFS_1__EP_MANUAL) - - - /******************************************************************************* - * Function Name: USBFS_1_InitEP_DMA - ******************************************************************************** - * - * Summary: - * This function allocates and initializes a DMA channel to be used by the - * USBFS_1_LoadInEP() or USBFS_1_ReadOutEP() APIs for data - * transfer. - * - * Parameters: - * epNumber: Contains the data endpoint number. - * Valid values are between 1 and 8. - * *pData: Pointer to a data array that is related to the EP transfers. - * - * Return: - * None. - * - * Reentrant: - * No. - * - *******************************************************************************/ - void USBFS_1_InitEP_DMA(uint8 epNumber, const uint8 *pData) - - { - uint16 src; - uint16 dst; - #if (CY_PSOC3) /* PSoC 3 */ - src = HI16(CYDEV_SRAM_BASE); - dst = HI16(CYDEV_PERIPH_BASE); - pData = pData; - #else /* PSoC 5 */ - if((USBFS_1_EP[epNumber].addr & USBFS_1_DIR_IN) != 0u ) - { /* for the IN EP source is the SRAM memory buffer */ - src = HI16(pData); - dst = HI16(CYDEV_PERIPH_BASE); - } - else - { /* for the OUT EP source is the SIE register */ - src = HI16(CYDEV_PERIPH_BASE); - dst = HI16(pData); - } - #endif /* End C51 */ - switch(epNumber) - { - case USBFS_1_EP1: - #if(USBFS_1_DMA1_REMOVE == 0u) - USBFS_1_DmaChan[epNumber] = USBFS_1_ep1_DmaInitialize( - USBFS_1_DMA_BYTES_PER_BURST, USBFS_1_DMA_REQUEST_PER_BURST, src, dst); - #endif /* End USBFS_1_DMA1_REMOVE */ - break; - case USBFS_1_EP2: - #if(USBFS_1_DMA2_REMOVE == 0u) - USBFS_1_DmaChan[epNumber] = USBFS_1_ep2_DmaInitialize( - USBFS_1_DMA_BYTES_PER_BURST, USBFS_1_DMA_REQUEST_PER_BURST, src, dst); - #endif /* End USBFS_1_DMA2_REMOVE */ - break; - case USBFS_1_EP3: - #if(USBFS_1_DMA3_REMOVE == 0u) - USBFS_1_DmaChan[epNumber] = USBFS_1_ep3_DmaInitialize( - USBFS_1_DMA_BYTES_PER_BURST, USBFS_1_DMA_REQUEST_PER_BURST, src, dst); - #endif /* End USBFS_1_DMA3_REMOVE */ - break; - case USBFS_1_EP4: - #if(USBFS_1_DMA4_REMOVE == 0u) - USBFS_1_DmaChan[epNumber] = USBFS_1_ep4_DmaInitialize( - USBFS_1_DMA_BYTES_PER_BURST, USBFS_1_DMA_REQUEST_PER_BURST, src, dst); - #endif /* End USBFS_1_DMA4_REMOVE */ - break; - case USBFS_1_EP5: - #if(USBFS_1_DMA5_REMOVE == 0u) - USBFS_1_DmaChan[epNumber] = USBFS_1_ep5_DmaInitialize( - USBFS_1_DMA_BYTES_PER_BURST, USBFS_1_DMA_REQUEST_PER_BURST, src, dst); - #endif /* End USBFS_1_DMA5_REMOVE */ - break; - case USBFS_1_EP6: - #if(USBFS_1_DMA6_REMOVE == 0u) - USBFS_1_DmaChan[epNumber] = USBFS_1_ep6_DmaInitialize( - USBFS_1_DMA_BYTES_PER_BURST, USBFS_1_DMA_REQUEST_PER_BURST, src, dst); - #endif /* End USBFS_1_DMA6_REMOVE */ - break; - case USBFS_1_EP7: - #if(USBFS_1_DMA7_REMOVE == 0u) - USBFS_1_DmaChan[epNumber] = USBFS_1_ep7_DmaInitialize( - USBFS_1_DMA_BYTES_PER_BURST, USBFS_1_DMA_REQUEST_PER_BURST, src, dst); - #endif /* End USBFS_1_DMA7_REMOVE */ - break; - case USBFS_1_EP8: - #if(USBFS_1_DMA8_REMOVE == 0u) - USBFS_1_DmaChan[epNumber] = USBFS_1_ep8_DmaInitialize( - USBFS_1_DMA_BYTES_PER_BURST, USBFS_1_DMA_REQUEST_PER_BURST, src, dst); - #endif /* End USBFS_1_DMA8_REMOVE */ - break; - default: - /* Do not support EP0 DMA transfers */ - break; - } - if((epNumber > USBFS_1_EP0) && (epNumber < USBFS_1_MAX_EP)) - { - USBFS_1_DmaTd[epNumber] = CyDmaTdAllocate(); - } - } - - - /******************************************************************************* - * Function Name: USBFS_1_Stop_DMA - ******************************************************************************** - * - * Summary: Stops and free DMA - * - * Parameters: - * epNumber: Contains the data endpoint number or - * USBFS_1_MAX_EP to stop all DMAs - * - * Return: - * None. - * - * Reentrant: - * No. - * - *******************************************************************************/ - void USBFS_1_Stop_DMA(uint8 epNumber) - { - uint8 i; - i = (epNumber < USBFS_1_MAX_EP) ? epNumber : USBFS_1_EP1; - do - { - if(USBFS_1_DmaTd[i] != DMA_INVALID_TD) - { - (void) CyDmaChDisable(USBFS_1_DmaChan[i]); - CyDmaTdFree(USBFS_1_DmaTd[i]); - USBFS_1_DmaTd[i] = DMA_INVALID_TD; - } - i++; - }while((i < USBFS_1_MAX_EP) && (epNumber == USBFS_1_MAX_EP)); - } - -#endif /* End USBFS_1_EP_MM != USBFS_1__EP_MANUAL */ - - -/******************************************************************************* -* Function Name: USBFS_1_LoadInEP -******************************************************************************** -* -* Summary: -* Loads and enables the specified USB data endpoint for an IN interrupt or bulk -* transfer. -* -* Parameters: -* epNumber: Contains the data endpoint number. -* Valid values are between 1 and 8. -* *pData: A pointer to a data array from which the data for the endpoint space -* is loaded. -* length: The number of bytes to transfer from the array and then send as a -* result of an IN request. Valid values are between 0 and 512. -* -* Return: -* None. -* -* Reentrant: -* No. -* -*******************************************************************************/ -void USBFS_1_LoadInEP(uint8 epNumber, const uint8 pData[], uint16 length) - -{ - uint8 ri; - reg8 *p; - #if(USBFS_1_EP_MM == USBFS_1__EP_MANUAL) - uint16 i; - #endif /* End USBFS_1_EP_MM == USBFS_1__EP_MANUAL */ - - if((epNumber > USBFS_1_EP0) && (epNumber < USBFS_1_MAX_EP)) - { - ri = ((epNumber - USBFS_1_EP1) << USBFS_1_EPX_CNTX_ADDR_SHIFT); - p = (reg8 *)(USBFS_1_ARB_RW1_DR_IND + ri); - - #if(USBFS_1_EP_MM != USBFS_1__EP_DMAAUTO) - /* Limits length to available buffer space, auto MM could send packets up to 1024 bytes */ - if(length > (USBFS_1_EPX_DATA_BUF_MAX - USBFS_1_EP[epNumber].buffOffset)) - { - length = USBFS_1_EPX_DATA_BUF_MAX - USBFS_1_EP[epNumber].buffOffset; - } - #endif /* End USBFS_1_EP_MM != USBFS_1__EP_DMAAUTO */ - - /* Set the count and data toggle */ - CY_SET_REG8((reg8 *)(USBFS_1_SIE_EP1_CNT0_IND + ri), - (length >> 8u) | (USBFS_1_EP[epNumber].epToggle)); - CY_SET_REG8((reg8 *)(USBFS_1_SIE_EP1_CNT1_IND + ri), length & 0xFFu); - - #if(USBFS_1_EP_MM == USBFS_1__EP_MANUAL) - if(pData != NULL) - { - /* Copy the data using the arbiter data register */ - for (i = 0u; i < length; i++) - { - CY_SET_REG8(p, pData[i]); - } - } - USBFS_1_EP[epNumber].apiEpState = USBFS_1_NO_EVENT_PENDING; - /* Write the Mode register */ - CY_SET_REG8((reg8 *)(USBFS_1_SIE_EP1_CR0_IND + ri), USBFS_1_EP[epNumber].epMode); - #else - /* Init DMA if it was not initialized */ - if(USBFS_1_DmaTd[epNumber] == DMA_INVALID_TD) - { - USBFS_1_InitEP_DMA(epNumber, pData); - } - #endif /* End USBFS_1_EP_MM == USBFS_1__EP_MANUAL */ - - #if(USBFS_1_EP_MM == USBFS_1__EP_DMAMANUAL) - USBFS_1_EP[epNumber].apiEpState = USBFS_1_NO_EVENT_PENDING; - if((pData != NULL) && (length > 0u)) - { - /* Enable DMA in mode2 for transferring data */ - (void) CyDmaChDisable(USBFS_1_DmaChan[epNumber]); - (void) CyDmaTdSetConfiguration(USBFS_1_DmaTd[epNumber], length, CY_DMA_DISABLE_TD, - TD_TERMIN_EN | TD_INC_SRC_ADR); - (void) CyDmaTdSetAddress(USBFS_1_DmaTd[epNumber], LO16((uint32)pData), LO16((uint32)p)); - /* Enable the DMA */ - (void) CyDmaChSetInitialTd(USBFS_1_DmaChan[epNumber], USBFS_1_DmaTd[epNumber]); - (void) CyDmaChEnable(USBFS_1_DmaChan[epNumber], 1u); - /* Generate DMA request */ - * (reg8 *)(USBFS_1_ARB_EP1_CFG_IND + ri) |= USBFS_1_ARB_EPX_CFG_DMA_REQ; - * (reg8 *)(USBFS_1_ARB_EP1_CFG_IND + ri) &= ((uint8)(~USBFS_1_ARB_EPX_CFG_DMA_REQ)); - /* Mode register will be written in arb ISR after DMA transfer complete */ - } - else - { - /* When zero-length packet - write the Mode register directly */ - CY_SET_REG8((reg8 *)(USBFS_1_SIE_EP1_CR0_IND + ri), USBFS_1_EP[epNumber].epMode); - } - #endif /* End USBFS_1_EP_MM == USBFS_1__EP_DMAMANUAL */ - - #if(USBFS_1_EP_MM == USBFS_1__EP_DMAAUTO) - if(pData != NULL) - { - /* Enable DMA in mode3 for transferring data */ - (void) CyDmaChDisable(USBFS_1_DmaChan[epNumber]); - (void) CyDmaTdSetConfiguration(USBFS_1_DmaTd[epNumber], length, - USBFS_1_DmaTd[epNumber], TD_TERMIN_EN | TD_INC_SRC_ADR); - (void) CyDmaTdSetAddress(USBFS_1_DmaTd[epNumber], LO16((uint32)pData), LO16((uint32)p)); - /* Clear Any potential pending DMA requests before starting the DMA channel to transfer data */ - (void) CyDmaClearPendingDrq(USBFS_1_DmaChan[epNumber]); - /* Enable the DMA */ - (void) CyDmaChSetInitialTd(USBFS_1_DmaChan[epNumber], USBFS_1_DmaTd[epNumber]); - (void) CyDmaChEnable(USBFS_1_DmaChan[epNumber], 1u); - } - else - { - USBFS_1_EP[epNumber].apiEpState = USBFS_1_NO_EVENT_PENDING; - if(length > 0u) - { - /* Set Data ready status, This will generate DMA request */ - * (reg8 *)(USBFS_1_ARB_EP1_CFG_IND + ri) |= USBFS_1_ARB_EPX_CFG_IN_DATA_RDY; - /* Mode register will be written in arb ISR(In Buffer Full) after first DMA transfer complete */ - } - else - { - /* When zero-length packet - write the Mode register directly */ - CY_SET_REG8((reg8 *)(USBFS_1_SIE_EP1_CR0_IND + ri), USBFS_1_EP[epNumber].epMode); - } - } - #endif /* End USBFS_1_EP_MM == USBFS_1__EP_DMAAUTO */ - - } -} - - -/******************************************************************************* -* Function Name: USBFS_1_ReadOutEP -******************************************************************************** -* -* Summary: -* Read data from an endpoint. The application must call -* USBFS_1_GetEPState to see if an event is pending. -* -* Parameters: -* epNumber: Contains the data endpoint number. -* Valid values are between 1 and 8. -* pData: A pointer to a data array from which the data for the endpoint space -* is loaded. -* length: The number of bytes to transfer from the USB Out endpoint and loads -* it into data array. Valid values are between 0 and 1023. The function -* moves fewer than the requested number of bytes if the host sends -* fewer bytes than requested. -* -* Returns: -* Number of bytes received, 0 for an invalid endpoint. -* -* Reentrant: -* No. -* -*******************************************************************************/ -uint16 USBFS_1_ReadOutEP(uint8 epNumber, uint8 pData[], uint16 length) - -{ - uint8 ri; - reg8 *p; - #if(USBFS_1_EP_MM == USBFS_1__EP_MANUAL) - uint16 i; - #endif /* End USBFS_1_EP_MM == USBFS_1__EP_MANUAL */ - #if(USBFS_1_EP_MM != USBFS_1__EP_DMAAUTO) - uint16 xferCount; - #endif /* End USBFS_1_EP_MM != USBFS_1__EP_DMAAUTO */ - - if((epNumber > USBFS_1_EP0) && (epNumber < USBFS_1_MAX_EP) && (pData != NULL)) - { - ri = ((epNumber - USBFS_1_EP1) << USBFS_1_EPX_CNTX_ADDR_SHIFT); - p = (reg8 *)(USBFS_1_ARB_RW1_DR_IND + ri); - - #if(USBFS_1_EP_MM != USBFS_1__EP_DMAAUTO) - /* Determine which is smaller the requested data or the available data */ - xferCount = USBFS_1_GetEPCount(epNumber); - if (length > xferCount) - { - length = xferCount; - } - #endif /* End USBFS_1_EP_MM != USBFS_1__EP_DMAAUTO */ - - #if(USBFS_1_EP_MM == USBFS_1__EP_MANUAL) - /* Copy the data using the arbiter data register */ - for (i = 0u; i < length; i++) - { - pData[i] = CY_GET_REG8(p); - } - - /* (re)arming of OUT endpoint */ - USBFS_1_EnableOutEP(epNumber); - #else - /*Init DMA if it was not initialized */ - if(USBFS_1_DmaTd[epNumber] == DMA_INVALID_TD) - { - USBFS_1_InitEP_DMA(epNumber, pData); - } - #endif /* End USBFS_1_EP_MM == USBFS_1__EP_MANUAL */ - - #if(USBFS_1_EP_MM == USBFS_1__EP_DMAMANUAL) - /* Enable DMA in mode2 for transferring data */ - (void) CyDmaChDisable(USBFS_1_DmaChan[epNumber]); - (void) CyDmaTdSetConfiguration(USBFS_1_DmaTd[epNumber], length, CY_DMA_DISABLE_TD, - TD_TERMIN_EN | TD_INC_DST_ADR); - (void) CyDmaTdSetAddress(USBFS_1_DmaTd[epNumber], LO16((uint32)p), LO16((uint32)pData)); - /* Enable the DMA */ - (void) CyDmaChSetInitialTd(USBFS_1_DmaChan[epNumber], USBFS_1_DmaTd[epNumber]); - (void) CyDmaChEnable(USBFS_1_DmaChan[epNumber], 1u); - - /* Generate DMA request */ - * (reg8 *)(USBFS_1_ARB_EP1_CFG_IND + ri) |= USBFS_1_ARB_EPX_CFG_DMA_REQ; - * (reg8 *)(USBFS_1_ARB_EP1_CFG_IND + ri) &= ((uint8)(~USBFS_1_ARB_EPX_CFG_DMA_REQ)); - /* Out EP will be (re)armed in arb ISR after transfer complete */ - #endif /* End USBFS_1_EP_MM == USBFS_1__EP_DMAMANUAL */ - - #if(USBFS_1_EP_MM == USBFS_1__EP_DMAAUTO) - /* Enable DMA in mode3 for transferring data */ - (void) CyDmaChDisable(USBFS_1_DmaChan[epNumber]); - (void) CyDmaTdSetConfiguration(USBFS_1_DmaTd[epNumber], length, USBFS_1_DmaTd[epNumber], - TD_TERMIN_EN | TD_INC_DST_ADR); - (void) CyDmaTdSetAddress(USBFS_1_DmaTd[epNumber], LO16((uint32)p), LO16((uint32)pData)); - - /* Clear Any potential pending DMA requests before starting the DMA channel to transfer data */ - (void) CyDmaClearPendingDrq(USBFS_1_DmaChan[epNumber]); - /* Enable the DMA */ - (void) CyDmaChSetInitialTd(USBFS_1_DmaChan[epNumber], USBFS_1_DmaTd[epNumber]); - (void) CyDmaChEnable(USBFS_1_DmaChan[epNumber], 1u); - /* Out EP will be (re)armed in arb ISR after transfer complete */ - #endif /* End USBFS_1_EP_MM == USBFS_1__EP_DMAAUTO */ - - } - else - { - length = 0u; - } - - return(length); -} - - -/******************************************************************************* -* Function Name: USBFS_1_EnableOutEP -******************************************************************************** -* -* Summary: -* This function enables an OUT endpoint. It should not be -* called for an IN endpoint. -* -* Parameters: -* epNumber: Endpoint Number -* Valid values are between 1 and 8. -* -* Return: -* None. -* -* Global variables: -* USBFS_1_EP[epNumber].apiEpState - set to NO_EVENT_PENDING -* -* Reentrant: -* No. -* -*******************************************************************************/ -void USBFS_1_EnableOutEP(uint8 epNumber) -{ - uint8 ri; - - if((epNumber > USBFS_1_EP0) && (epNumber < USBFS_1_MAX_EP)) - { - ri = ((epNumber - USBFS_1_EP1) << USBFS_1_EPX_CNTX_ADDR_SHIFT); - USBFS_1_EP[epNumber].apiEpState = USBFS_1_NO_EVENT_PENDING; - /* Write the Mode register */ - CY_SET_REG8((reg8 *)(USBFS_1_SIE_EP1_CR0_IND + ri), USBFS_1_EP[epNumber].epMode); - } -} - - -/******************************************************************************* -* Function Name: USBFS_1_DisableOutEP -******************************************************************************** -* -* Summary: -* This function disables an OUT endpoint. It should not be -* called for an IN endpoint. -* -* Parameters: -* epNumber: Endpoint Number -* Valid values are between 1 and 8. -* -* Return: -* None. -* -*******************************************************************************/ -void USBFS_1_DisableOutEP(uint8 epNumber) -{ - uint8 ri ; - - if((epNumber > USBFS_1_EP0) && (epNumber < USBFS_1_MAX_EP)) - { - ri = ((epNumber - USBFS_1_EP1) << USBFS_1_EPX_CNTX_ADDR_SHIFT); - /* Write the Mode register */ - CY_SET_REG8((reg8 *)(USBFS_1_SIE_EP1_CR0_IND + ri), USBFS_1_MODE_NAK_OUT); - } -} - - -/******************************************************************************* -* Function Name: USBFS_1_Force -******************************************************************************** -* -* Summary: -* Forces the bus state -* -* Parameters: -* bState -* USBFS_1_FORCE_J -* USBFS_1_FORCE_K -* USBFS_1_FORCE_SE0 -* USBFS_1_FORCE_NONE -* -* Return: -* None. -* -*******************************************************************************/ -void USBFS_1_Force(uint8 bState) -{ - CY_SET_REG8(USBFS_1_USBIO_CR0_PTR, bState); -} - - -/******************************************************************************* -* Function Name: USBFS_1_GetEPAckState -******************************************************************************** -* -* Summary: -* Returns the ACK of the CR0 Register (ACKD) -* -* Parameters: -* epNumber: Endpoint Number -* Valid values are between 1 and 8. -* -* Returns -* 0 if nothing has been ACKD, non-=zero something has been ACKD -* -*******************************************************************************/ -uint8 USBFS_1_GetEPAckState(uint8 epNumber) -{ - uint8 ri; - uint8 cr = 0u; - - if((epNumber > USBFS_1_EP0) && (epNumber < USBFS_1_MAX_EP)) - { - ri = ((epNumber - USBFS_1_EP1) << USBFS_1_EPX_CNTX_ADDR_SHIFT); - cr = CY_GET_REG8((reg8 *)(USBFS_1_SIE_EP1_CR0_IND + ri)) & USBFS_1_MODE_ACKD; - } - - return(cr); -} - - -/******************************************************************************* -* Function Name: USBFS_1_SetPowerStatus -******************************************************************************** -* -* Summary: -* Sets the device power status for reporting in the Get Device Status -* request -* -* Parameters: -* powerStatus: USBFS_1_DEVICE_STATUS_BUS_POWERED(0) - Bus Powered, -* USBFS_1_DEVICE_STATUS_SELF_POWERED(1) - Self Powered -* -* Return: -* None. -* -* Global variables: -* USBFS_1_deviceStatus - set power status -* -* Reentrant: -* No. -* -*******************************************************************************/ -void USBFS_1_SetPowerStatus(uint8 powerStatus) -{ - if (powerStatus != USBFS_1_DEVICE_STATUS_BUS_POWERED) - { - USBFS_1_deviceStatus |= USBFS_1_DEVICE_STATUS_SELF_POWERED; - } - else - { - USBFS_1_deviceStatus &= ((uint8)(~USBFS_1_DEVICE_STATUS_SELF_POWERED)); - } -} - - -#if (USBFS_1_MON_VBUS == 1u) - - /******************************************************************************* - * Function Name: USBFS_1_VBusPresent - ******************************************************************************** - * - * Summary: - * Determines VBUS presence for Self Powered Devices. - * - * Parameters: - * None. - * - * Return: - * 1 if VBUS is present, otherwise 0. - * - *******************************************************************************/ - uint8 USBFS_1_VBusPresent(void) - { - return((0u != (CY_GET_REG8(USBFS_1_VBUS_PS_PTR) & USBFS_1_VBUS_MASK)) ? 1u : 0u); - } - -#endif /* USBFS_1_MON_VBUS */ - - -/******************************************************************************* -* Function Name: USBFS_1_RWUEnabled -******************************************************************************** -* -* Summary: -* Returns TRUE if Remote Wake Up is enabled, otherwise FALSE -* -* Parameters: -* None. -* -* Return: -* TRUE - Remote Wake Up Enabled -* FALSE - Remote Wake Up Disabled -* -* Global variables: -* USBFS_1_deviceStatus - checked to determine remote status -* -*******************************************************************************/ -uint8 USBFS_1_RWUEnabled(void) -{ - uint8 result = USBFS_1_FALSE; - if((USBFS_1_deviceStatus & USBFS_1_DEVICE_STATUS_REMOTE_WAKEUP) != 0u) - { - result = USBFS_1_TRUE; - } - - return(result); -} - - -/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1.h deleted file mode 100644 index c9dc6cd..0000000 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1.h +++ /dev/null @@ -1,1178 +0,0 @@ -/******************************************************************************* -* File Name: USBFS_1.h -* Version 2.60 -* -* Description: -* Header File for the USFS component. Contains prototypes and constant values. -* -******************************************************************************** -* Copyright 2008-2013, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - -#if !defined(CY_USBFS_USBFS_1_H) -#define CY_USBFS_USBFS_1_H - -#include "cytypes.h" -#include "cydevice_trm.h" -#include "cyfitter.h" -#include "CyLib.h" - - -/*************************************** -* Conditional Compilation Parameters -***************************************/ - -/* Check to see if required defines such as CY_PSOC5LP are available */ -/* They are defined starting with cy_boot v3.0 */ -#if !defined (CY_PSOC5LP) - #error Component USBFS_v2_60 requires cy_boot v3.0 or later -#endif /* (CY_PSOC5LP) */ - - -/*************************************** -* Memory Type Definitions -***************************************/ - -/* Renamed Type Definitions for backward compatibility. -* Should not be used in new designs. -*/ -#define USBFS_1_CODE CYCODE -#define USBFS_1_FAR CYFAR -#if defined(__C51__) || defined(__CX51__) - #define USBFS_1_DATA data - #define USBFS_1_XDATA xdata -#else - #define USBFS_1_DATA - #define USBFS_1_XDATA -#endif /* End __C51__ */ -#define USBFS_1_NULL NULL - - -/*************************************** -* Enumerated Types and Parameters -***************************************/ - -#define USBFS_1__EP_MANUAL 0 -#define USBFS_1__EP_DMAMANUAL 1 -#define USBFS_1__EP_DMAAUTO 2 - -#define USBFS_1__MA_STATIC 0 -#define USBFS_1__MA_DYNAMIC 1 - - - -/*************************************** -* Initial Parameter Constants -***************************************/ - -#define USBFS_1_NUM_DEVICES (1u) -#define USBFS_1_MAX_REPORTID_NUMBER (0u) - -#define USBFS_1_MON_VBUS (0u) -#define USBFS_1_EXTERN_VBUS (0u) -#define USBFS_1_EXTERN_VND (0u) -#define USBFS_1_EXTERN_CLS (0u) -#define USBFS_1_MAX_INTERFACES_NUMBER (1u) -#define USBFS_1_EP0_ISR_REMOVE (0u) -#define USBFS_1_EP1_ISR_REMOVE (0u) -#define USBFS_1_EP2_ISR_REMOVE (1u) -#define USBFS_1_EP3_ISR_REMOVE (1u) -#define USBFS_1_EP4_ISR_REMOVE (1u) -#define USBFS_1_EP5_ISR_REMOVE (1u) -#define USBFS_1_EP6_ISR_REMOVE (1u) -#define USBFS_1_EP7_ISR_REMOVE (1u) -#define USBFS_1_EP8_ISR_REMOVE (1u) -#define USBFS_1_EP_MM (0u) -#define USBFS_1_EP_MA (0u) -#define USBFS_1_DMA1_REMOVE (1u) -#define USBFS_1_DMA2_REMOVE (1u) -#define USBFS_1_DMA3_REMOVE (1u) -#define USBFS_1_DMA4_REMOVE (1u) -#define USBFS_1_DMA5_REMOVE (1u) -#define USBFS_1_DMA6_REMOVE (1u) -#define USBFS_1_DMA7_REMOVE (1u) -#define USBFS_1_DMA8_REMOVE (1u) -#define USBFS_1_SOF_ISR_REMOVE (0u) -#define USBFS_1_ARB_ISR_REMOVE (0u) -#define USBFS_1_DP_ISR_REMOVE (0u) -#define USBFS_1_ENABLE_CDC_CLASS_API (1u) -#define USBFS_1_ENABLE_MIDI_API (1u) -#define USBFS_1_MIDI_EXT_MODE (0u) - - -/*************************************** -* Data Struct Definition -***************************************/ - -typedef struct -{ - uint8 attrib; - uint8 apiEpState; - uint8 hwEpState; - uint8 epToggle; - uint8 addr; - uint8 epMode; - uint16 buffOffset; - uint16 bufferSize; - uint8 interface; -} T_USBFS_1_EP_CTL_BLOCK; - -typedef struct -{ - uint8 interface; - uint8 altSetting; - uint8 addr; - uint8 attributes; - uint16 bufferSize; - uint8 bMisc; -} T_USBFS_1_EP_SETTINGS_BLOCK; - -typedef struct -{ - uint8 status; - uint16 length; -} T_USBFS_1_XFER_STATUS_BLOCK; - -typedef struct -{ - uint16 count; - volatile uint8 *pData; - T_USBFS_1_XFER_STATUS_BLOCK *pStatusBlock; -} T_USBFS_1_TD; - - -typedef struct -{ - uint8 c; - const void *p_list; -} T_USBFS_1_LUT; - -/* Resume/Suspend API Support */ -typedef struct -{ - uint8 enableState; - uint8 mode; -} USBFS_1_BACKUP_STRUCT; - - -/* Renamed structure fields for backward compatibility. -* Should not be used in new designs. -*/ -#define wBuffOffset buffOffset -#define wBufferSize bufferSize -#define bStatus status -#define wLength length -#define wCount count - -/* Renamed global variable for backward compatibility. -* Should not be used in new designs. -*/ -#define CurrentTD USBFS_1_currentTD - - -/*************************************** -* Function Prototypes -***************************************/ - -void USBFS_1_Start(uint8 device, uint8 mode) ; -void USBFS_1_Init(void) ; -void USBFS_1_InitComponent(uint8 device, uint8 mode) ; -void USBFS_1_Stop(void) ; -uint8 USBFS_1_CheckActivity(void) ; -uint8 USBFS_1_GetConfiguration(void) ; -uint8 USBFS_1_IsConfigurationChanged(void) ; -uint8 USBFS_1_GetInterfaceSetting(uint8 interfaceNumber) - ; -uint8 USBFS_1_GetEPState(uint8 epNumber) ; -uint16 USBFS_1_GetEPCount(uint8 epNumber) ; -void USBFS_1_LoadInEP(uint8 epNumber, const uint8 pData[], uint16 length) - ; -uint16 USBFS_1_ReadOutEP(uint8 epNumber, uint8 pData[], uint16 length) - ; -void USBFS_1_EnableOutEP(uint8 epNumber) ; -void USBFS_1_DisableOutEP(uint8 epNumber) ; -void USBFS_1_Force(uint8 bState) ; -uint8 USBFS_1_GetEPAckState(uint8 epNumber) ; -void USBFS_1_SetPowerStatus(uint8 powerStatus) ; -uint8 USBFS_1_RWUEnabled(void) ; -void USBFS_1_TerminateEP(uint8 ep) ; - -void USBFS_1_Suspend(void) ; -void USBFS_1_Resume(void) ; - -#if defined(USBFS_1_ENABLE_FWSN_STRING) - void USBFS_1_SerialNumString(uint8 snString[]) ; -#endif /* USBFS_1_ENABLE_FWSN_STRING */ -#if (USBFS_1_MON_VBUS == 1u) - uint8 USBFS_1_VBusPresent(void) ; -#endif /* End USBFS_1_MON_VBUS */ - -#if defined(CYDEV_BOOTLOADER_IO_COMP) && ((CYDEV_BOOTLOADER_IO_COMP == CyBtldr_USBFS_1) || \ - (CYDEV_BOOTLOADER_IO_COMP == CyBtldr_Custom_Interface)) - - void USBFS_1_CyBtldrCommStart(void) ; - void USBFS_1_CyBtldrCommStop(void) ; - void USBFS_1_CyBtldrCommReset(void) ; - cystatus USBFS_1_CyBtldrCommWrite(uint8 *pData, uint16 size, uint16 *count, uint8 timeOut) CYSMALL - ; - cystatus USBFS_1_CyBtldrCommRead( uint8 *pData, uint16 size, uint16 *count, uint8 timeOut) CYSMALL - ; - - #define USBFS_1_BTLDR_SIZEOF_WRITE_BUFFER (64u) /* EP 1 OUT */ - #define USBFS_1_BTLDR_SIZEOF_READ_BUFFER (64u) /* EP 2 IN */ - #define USBFS_1_BTLDR_MAX_PACKET_SIZE USBFS_1_BTLDR_SIZEOF_WRITE_BUFFER - - /* These defines active if used USBFS interface as an - * IO Component for bootloading. When Custom_Interface selected - * in Bootloder configuration as the IO Component, user must - * provide these functions - */ - #if (CYDEV_BOOTLOADER_IO_COMP == CyBtldr_USBFS_1) - #define CyBtldrCommStart USBFS_1_CyBtldrCommStart - #define CyBtldrCommStop USBFS_1_CyBtldrCommStop - #define CyBtldrCommReset USBFS_1_CyBtldrCommReset - #define CyBtldrCommWrite USBFS_1_CyBtldrCommWrite - #define CyBtldrCommRead USBFS_1_CyBtldrCommRead - #endif /*End CYDEV_BOOTLOADER_IO_COMP == CyBtldr_USBFS_1 */ - -#endif /* End CYDEV_BOOTLOADER_IO_COMP */ - -#if(USBFS_1_EP_MM != USBFS_1__EP_MANUAL) - void USBFS_1_InitEP_DMA(uint8 epNumber, const uint8 *pData) - ; - void USBFS_1_Stop_DMA(uint8 epNumber) ; -#endif /* End USBFS_1_EP_MM != USBFS_1__EP_MANUAL) */ - -#if defined(USBFS_1_ENABLE_MIDI_STREAMING) && (USBFS_1_ENABLE_MIDI_API != 0u) - void USBFS_1_MIDI_EP_Init(void) ; - - #if (USBFS_1_MIDI_IN_BUFF_SIZE > 0) - void USBFS_1_MIDI_IN_Service(void) ; - uint8 USBFS_1_PutUsbMidiIn(uint8 ic, const uint8 midiMsg[], uint8 cable) - ; - #endif /* USBFS_1_MIDI_IN_BUFF_SIZE > 0 */ - - #if (USBFS_1_MIDI_OUT_BUFF_SIZE > 0) - void USBFS_1_MIDI_OUT_EP_Service(void) ; - #endif /* USBFS_1_MIDI_OUT_BUFF_SIZE > 0 */ - -#endif /* End USBFS_1_ENABLE_MIDI_API != 0u */ - -/* Renamed Functions for backward compatibility. -* Should not be used in new designs. -*/ - -#define USBFS_1_bCheckActivity USBFS_1_CheckActivity -#define USBFS_1_bGetConfiguration USBFS_1_GetConfiguration -#define USBFS_1_bGetInterfaceSetting USBFS_1_GetInterfaceSetting -#define USBFS_1_bGetEPState USBFS_1_GetEPState -#define USBFS_1_wGetEPCount USBFS_1_GetEPCount -#define USBFS_1_bGetEPAckState USBFS_1_GetEPAckState -#define USBFS_1_bRWUEnabled USBFS_1_RWUEnabled -#define USBFS_1_bVBusPresent USBFS_1_VBusPresent - -#define USBFS_1_bConfiguration USBFS_1_configuration -#define USBFS_1_bInterfaceSetting USBFS_1_interfaceSetting -#define USBFS_1_bDeviceAddress USBFS_1_deviceAddress -#define USBFS_1_bDeviceStatus USBFS_1_deviceStatus -#define USBFS_1_bDevice USBFS_1_device -#define USBFS_1_bTransferState USBFS_1_transferState -#define USBFS_1_bLastPacketSize USBFS_1_lastPacketSize - -#define USBFS_1_LoadEP USBFS_1_LoadInEP -#define USBFS_1_LoadInISOCEP USBFS_1_LoadInEP -#define USBFS_1_EnableOutISOCEP USBFS_1_EnableOutEP - -#define USBFS_1_SetVector CyIntSetVector -#define USBFS_1_SetPriority CyIntSetPriority -#define USBFS_1_EnableInt CyIntEnable - - -/*************************************** -* API Constants -***************************************/ - -#define USBFS_1_EP0 (0u) -#define USBFS_1_EP1 (1u) -#define USBFS_1_EP2 (2u) -#define USBFS_1_EP3 (3u) -#define USBFS_1_EP4 (4u) -#define USBFS_1_EP5 (5u) -#define USBFS_1_EP6 (6u) -#define USBFS_1_EP7 (7u) -#define USBFS_1_EP8 (8u) -#define USBFS_1_MAX_EP (9u) - -#define USBFS_1_TRUE (1u) -#define USBFS_1_FALSE (0u) - -#define USBFS_1_NO_EVENT_ALLOWED (2u) -#define USBFS_1_EVENT_PENDING (1u) -#define USBFS_1_NO_EVENT_PENDING (0u) - -#define USBFS_1_IN_BUFFER_FULL USBFS_1_NO_EVENT_PENDING -#define USBFS_1_IN_BUFFER_EMPTY USBFS_1_EVENT_PENDING -#define USBFS_1_OUT_BUFFER_FULL USBFS_1_EVENT_PENDING -#define USBFS_1_OUT_BUFFER_EMPTY USBFS_1_NO_EVENT_PENDING - -#define USBFS_1_FORCE_J (0xA0u) -#define USBFS_1_FORCE_K (0x80u) -#define USBFS_1_FORCE_SE0 (0xC0u) -#define USBFS_1_FORCE_NONE (0x00u) - -#define USBFS_1_IDLE_TIMER_RUNNING (0x02u) -#define USBFS_1_IDLE_TIMER_EXPIRED (0x01u) -#define USBFS_1_IDLE_TIMER_INDEFINITE (0x00u) - -#define USBFS_1_DEVICE_STATUS_BUS_POWERED (0x00u) -#define USBFS_1_DEVICE_STATUS_SELF_POWERED (0x01u) - -#define USBFS_1_3V_OPERATION (0x00u) -#define USBFS_1_5V_OPERATION (0x01u) -#define USBFS_1_DWR_VDDD_OPERATION (0x02u) - -#define USBFS_1_MODE_DISABLE (0x00u) -#define USBFS_1_MODE_NAK_IN_OUT (0x01u) -#define USBFS_1_MODE_STATUS_OUT_ONLY (0x02u) -#define USBFS_1_MODE_STALL_IN_OUT (0x03u) -#define USBFS_1_MODE_RESERVED_0100 (0x04u) -#define USBFS_1_MODE_ISO_OUT (0x05u) -#define USBFS_1_MODE_STATUS_IN_ONLY (0x06u) -#define USBFS_1_MODE_ISO_IN (0x07u) -#define USBFS_1_MODE_NAK_OUT (0x08u) -#define USBFS_1_MODE_ACK_OUT (0x09u) -#define USBFS_1_MODE_RESERVED_1010 (0x0Au) -#define USBFS_1_MODE_ACK_OUT_STATUS_IN (0x0Bu) -#define USBFS_1_MODE_NAK_IN (0x0Cu) -#define USBFS_1_MODE_ACK_IN (0x0Du) -#define USBFS_1_MODE_RESERVED_1110 (0x0Eu) -#define USBFS_1_MODE_ACK_IN_STATUS_OUT (0x0Fu) -#define USBFS_1_MODE_MASK (0x0Fu) -#define USBFS_1_MODE_STALL_DATA_EP (0x80u) - -#define USBFS_1_MODE_ACKD (0x10u) -#define USBFS_1_MODE_OUT_RCVD (0x20u) -#define USBFS_1_MODE_IN_RCVD (0x40u) -#define USBFS_1_MODE_SETUP_RCVD (0x80u) - -#define USBFS_1_RQST_TYPE_MASK (0x60u) -#define USBFS_1_RQST_TYPE_STD (0x00u) -#define USBFS_1_RQST_TYPE_CLS (0x20u) -#define USBFS_1_RQST_TYPE_VND (0x40u) -#define USBFS_1_RQST_DIR_MASK (0x80u) -#define USBFS_1_RQST_DIR_D2H (0x80u) -#define USBFS_1_RQST_DIR_H2D (0x00u) -#define USBFS_1_RQST_RCPT_MASK (0x03u) -#define USBFS_1_RQST_RCPT_DEV (0x00u) -#define USBFS_1_RQST_RCPT_IFC (0x01u) -#define USBFS_1_RQST_RCPT_EP (0x02u) -#define USBFS_1_RQST_RCPT_OTHER (0x03u) - -/* USB Class Codes */ -#define USBFS_1_CLASS_DEVICE (0x00u) /* Use class code info from Interface Descriptors */ -#define USBFS_1_CLASS_AUDIO (0x01u) /* Audio device */ -#define USBFS_1_CLASS_CDC (0x02u) /* Communication device class */ -#define USBFS_1_CLASS_HID (0x03u) /* Human Interface Device */ -#define USBFS_1_CLASS_PDC (0x05u) /* Physical device class */ -#define USBFS_1_CLASS_IMAGE (0x06u) /* Still Imaging device */ -#define USBFS_1_CLASS_PRINTER (0x07u) /* Printer device */ -#define USBFS_1_CLASS_MSD (0x08u) /* Mass Storage device */ -#define USBFS_1_CLASS_HUB (0x09u) /* Full/Hi speed Hub */ -#define USBFS_1_CLASS_CDC_DATA (0x0Au) /* CDC data device */ -#define USBFS_1_CLASS_SMART_CARD (0x0Bu) /* Smart Card device */ -#define USBFS_1_CLASS_CSD (0x0Du) /* Content Security device */ -#define USBFS_1_CLASS_VIDEO (0x0Eu) /* Video device */ -#define USBFS_1_CLASS_PHD (0x0Fu) /* Personal Healthcare device */ -#define USBFS_1_CLASS_WIRELESSD (0xDCu) /* Wireless Controller */ -#define USBFS_1_CLASS_MIS (0xE0u) /* Miscellaneous */ -#define USBFS_1_CLASS_APP (0xEFu) /* Application Specific */ -#define USBFS_1_CLASS_VENDOR (0xFFu) /* Vendor specific */ - - -/* Standard Request Types (Table 9-4) */ -#define USBFS_1_GET_STATUS (0x00u) -#define USBFS_1_CLEAR_FEATURE (0x01u) -#define USBFS_1_SET_FEATURE (0x03u) -#define USBFS_1_SET_ADDRESS (0x05u) -#define USBFS_1_GET_DESCRIPTOR (0x06u) -#define USBFS_1_SET_DESCRIPTOR (0x07u) -#define USBFS_1_GET_CONFIGURATION (0x08u) -#define USBFS_1_SET_CONFIGURATION (0x09u) -#define USBFS_1_GET_INTERFACE (0x0Au) -#define USBFS_1_SET_INTERFACE (0x0Bu) -#define USBFS_1_SYNCH_FRAME (0x0Cu) - -/* Vendor Specific Request Types */ -/* Request for Microsoft OS String Descriptor */ -#define USBFS_1_GET_EXTENDED_CONFIG_DESCRIPTOR (0x01u) - -/* Descriptor Types (Table 9-5) */ -#define USBFS_1_DESCR_DEVICE (1u) -#define USBFS_1_DESCR_CONFIG (2u) -#define USBFS_1_DESCR_STRING (3u) -#define USBFS_1_DESCR_INTERFACE (4u) -#define USBFS_1_DESCR_ENDPOINT (5u) -#define USBFS_1_DESCR_DEVICE_QUALIFIER (6u) -#define USBFS_1_DESCR_OTHER_SPEED (7u) -#define USBFS_1_DESCR_INTERFACE_POWER (8u) - -/* Device Descriptor Defines */ -#define USBFS_1_DEVICE_DESCR_LENGTH (18u) -#define USBFS_1_DEVICE_DESCR_SN_SHIFT (16u) - -/* Config Descriptor Shifts and Masks */ -#define USBFS_1_CONFIG_DESCR_LENGTH (0u) -#define USBFS_1_CONFIG_DESCR_TYPE (1u) -#define USBFS_1_CONFIG_DESCR_TOTAL_LENGTH_LOW (2u) -#define USBFS_1_CONFIG_DESCR_TOTAL_LENGTH_HI (3u) -#define USBFS_1_CONFIG_DESCR_NUM_INTERFACES (4u) -#define USBFS_1_CONFIG_DESCR_CONFIG_VALUE (5u) -#define USBFS_1_CONFIG_DESCR_CONFIGURATION (6u) -#define USBFS_1_CONFIG_DESCR_ATTRIB (7u) -#define USBFS_1_CONFIG_DESCR_ATTRIB_SELF_POWERED (0x40u) -#define USBFS_1_CONFIG_DESCR_ATTRIB_RWU_EN (0x20u) - -/* Feature Selectors (Table 9-6) */ -#define USBFS_1_DEVICE_REMOTE_WAKEUP (0x01u) -#define USBFS_1_ENDPOINT_HALT (0x00u) -#define USBFS_1_TEST_MODE (0x02u) - -/* USB Device Status (Figure 9-4) */ -#define USBFS_1_DEVICE_STATUS_BUS_POWERED (0x00u) -#define USBFS_1_DEVICE_STATUS_SELF_POWERED (0x01u) -#define USBFS_1_DEVICE_STATUS_REMOTE_WAKEUP (0x02u) - -/* USB Endpoint Status (Figure 9-4) */ -#define USBFS_1_ENDPOINT_STATUS_HALT (0x01u) - -/* USB Endpoint Directions */ -#define USBFS_1_DIR_IN (0x80u) -#define USBFS_1_DIR_OUT (0x00u) -#define USBFS_1_DIR_UNUSED (0x7Fu) - -/* USB Endpoint Attributes */ -#define USBFS_1_EP_TYPE_CTRL (0x00u) -#define USBFS_1_EP_TYPE_ISOC (0x01u) -#define USBFS_1_EP_TYPE_BULK (0x02u) -#define USBFS_1_EP_TYPE_INT (0x03u) -#define USBFS_1_EP_TYPE_MASK (0x03u) - -#define USBFS_1_EP_SYNC_TYPE_NO_SYNC (0x00u) -#define USBFS_1_EP_SYNC_TYPE_ASYNC (0x04u) -#define USBFS_1_EP_SYNC_TYPE_ADAPTIVE (0x08u) -#define USBFS_1_EP_SYNC_TYPE_SYNCHRONOUS (0x0Cu) -#define USBFS_1_EP_SYNC_TYPE_MASK (0x0Cu) - -#define USBFS_1_EP_USAGE_TYPE_DATA (0x00u) -#define USBFS_1_EP_USAGE_TYPE_FEEDBACK (0x10u) -#define USBFS_1_EP_USAGE_TYPE_IMPLICIT (0x20u) -#define USBFS_1_EP_USAGE_TYPE_RESERVED (0x30u) -#define USBFS_1_EP_USAGE_TYPE_MASK (0x30u) - -/* Endpoint Status defines */ -#define USBFS_1_EP_STATUS_LENGTH (0x02u) - -/* Endpoint Device defines */ -#define USBFS_1_DEVICE_STATUS_LENGTH (0x02u) - -#define USBFS_1_STATUS_LENGTH_MAX \ - ( (USBFS_1_EP_STATUS_LENGTH > USBFS_1_DEVICE_STATUS_LENGTH) ? \ - USBFS_1_EP_STATUS_LENGTH : USBFS_1_DEVICE_STATUS_LENGTH ) -/* Transfer Completion Notification */ -#define USBFS_1_XFER_IDLE (0x00u) -#define USBFS_1_XFER_STATUS_ACK (0x01u) -#define USBFS_1_XFER_PREMATURE (0x02u) -#define USBFS_1_XFER_ERROR (0x03u) - -/* Driver State defines */ -#define USBFS_1_TRANS_STATE_IDLE (0x00u) -#define USBFS_1_TRANS_STATE_CONTROL_READ (0x02u) -#define USBFS_1_TRANS_STATE_CONTROL_WRITE (0x04u) -#define USBFS_1_TRANS_STATE_NO_DATA_CONTROL (0x06u) - -/* String Descriptor defines */ -#define USBFS_1_STRING_MSOS (0xEEu) -#define USBFS_1_MSOS_DESCRIPTOR_LENGTH (18u) -#define USBFS_1_MSOS_CONF_DESCR_LENGTH (40u) - -#if(USBFS_1_EP_MM == USBFS_1__EP_DMAMANUAL) - /* DMA manual mode defines */ - #define USBFS_1_DMA_BYTES_PER_BURST (0u) - #define USBFS_1_DMA_REQUEST_PER_BURST (0u) -#endif /* End USBFS_1_EP_MM == USBFS_1__EP_DMAMANUAL */ -#if(USBFS_1_EP_MM == USBFS_1__EP_DMAAUTO) - /* DMA automatic mode defines */ - #define USBFS_1_DMA_BYTES_PER_BURST (32u) - /* BUF_SIZE-BYTES_PER_BURST examples: 55-32 bytes 44-16 bytes 33-8 bytes 22-4 bytes 11-2 bytes */ - #define USBFS_1_DMA_BUF_SIZE (0x55u) - #define USBFS_1_DMA_REQUEST_PER_BURST (1u) -#endif /* End USBFS_1_EP_MM == USBFS_1__EP_DMAAUTO */ - -/* DIE ID string descriptor defines */ -#if defined(USBFS_1_ENABLE_IDSN_STRING) - #define USBFS_1_IDSN_DESCR_LENGTH (0x22u) -#endif /* USBFS_1_ENABLE_IDSN_STRING */ - - -/*************************************** -* External data references -***************************************/ - -extern uint8 USBFS_1_initVar; -extern volatile uint8 USBFS_1_device; -extern volatile uint8 USBFS_1_transferState; -extern volatile uint8 USBFS_1_configuration; -extern volatile uint8 USBFS_1_configurationChanged; -extern volatile uint8 USBFS_1_deviceStatus; - -/* HID Variables */ -#if defined(USBFS_1_ENABLE_HID_CLASS) - extern volatile uint8 USBFS_1_hidProtocol[USBFS_1_MAX_INTERFACES_NUMBER]; - extern volatile uint8 USBFS_1_hidIdleRate[USBFS_1_MAX_INTERFACES_NUMBER]; - extern volatile uint8 USBFS_1_hidIdleTimer[USBFS_1_MAX_INTERFACES_NUMBER]; -#endif /* USBFS_1_ENABLE_HID_CLASS */ - - -/*************************************** -* Registers -***************************************/ - -#define USBFS_1_ARB_CFG_PTR ( (reg8 *) USBFS_1_USB__ARB_CFG) -#define USBFS_1_ARB_CFG_REG (* (reg8 *) USBFS_1_USB__ARB_CFG) - -#define USBFS_1_ARB_EP1_CFG_PTR ( (reg8 *) USBFS_1_USB__ARB_EP1_CFG) -#define USBFS_1_ARB_EP1_CFG_REG (* (reg8 *) USBFS_1_USB__ARB_EP1_CFG) -#define USBFS_1_ARB_EP1_CFG_IND USBFS_1_USB__ARB_EP1_CFG -#define USBFS_1_ARB_EP1_INT_EN_PTR ( (reg8 *) USBFS_1_USB__ARB_EP1_INT_EN) -#define USBFS_1_ARB_EP1_INT_EN_REG (* (reg8 *) USBFS_1_USB__ARB_EP1_INT_EN) -#define USBFS_1_ARB_EP1_INT_EN_IND USBFS_1_USB__ARB_EP1_INT_EN -#define USBFS_1_ARB_EP1_SR_PTR ( (reg8 *) USBFS_1_USB__ARB_EP1_SR) -#define USBFS_1_ARB_EP1_SR_REG (* (reg8 *) USBFS_1_USB__ARB_EP1_SR) -#define USBFS_1_ARB_EP1_SR_IND USBFS_1_USB__ARB_EP1_SR - -#define USBFS_1_ARB_EP2_CFG_PTR ( (reg8 *) USBFS_1_USB__ARB_EP2_CFG) -#define USBFS_1_ARB_EP2_CFG_REG (* (reg8 *) USBFS_1_USB__ARB_EP2_CFG) -#define USBFS_1_ARB_EP2_INT_EN_PTR ( (reg8 *) USBFS_1_USB__ARB_EP2_INT_EN) -#define USBFS_1_ARB_EP2_INT_EN_REG (* (reg8 *) USBFS_1_USB__ARB_EP2_INT_EN) -#define USBFS_1_ARB_EP2_SR_PTR ( (reg8 *) USBFS_1_USB__ARB_EP2_SR) -#define USBFS_1_ARB_EP2_SR_REG (* (reg8 *) USBFS_1_USB__ARB_EP2_SR) - -#define USBFS_1_ARB_EP3_CFG_PTR ( (reg8 *) USBFS_1_USB__ARB_EP3_CFG) -#define USBFS_1_ARB_EP3_CFG_REG (* (reg8 *) USBFS_1_USB__ARB_EP3_CFG) -#define USBFS_1_ARB_EP3_INT_EN_PTR ( (reg8 *) USBFS_1_USB__ARB_EP3_INT_EN) -#define USBFS_1_ARB_EP3_INT_EN_REG (* (reg8 *) USBFS_1_USB__ARB_EP3_INT_EN) -#define USBFS_1_ARB_EP3_SR_PTR ( (reg8 *) USBFS_1_USB__ARB_EP3_SR) -#define USBFS_1_ARB_EP3_SR_REG (* (reg8 *) USBFS_1_USB__ARB_EP3_SR) - -#define USBFS_1_ARB_EP4_CFG_PTR ( (reg8 *) USBFS_1_USB__ARB_EP4_CFG) -#define USBFS_1_ARB_EP4_CFG_REG (* (reg8 *) USBFS_1_USB__ARB_EP4_CFG) -#define USBFS_1_ARB_EP4_INT_EN_PTR ( (reg8 *) USBFS_1_USB__ARB_EP4_INT_EN) -#define USBFS_1_ARB_EP4_INT_EN_REG (* (reg8 *) USBFS_1_USB__ARB_EP4_INT_EN) -#define USBFS_1_ARB_EP4_SR_PTR ( (reg8 *) USBFS_1_USB__ARB_EP4_SR) -#define USBFS_1_ARB_EP4_SR_REG (* (reg8 *) USBFS_1_USB__ARB_EP4_SR) - -#define USBFS_1_ARB_EP5_CFG_PTR ( (reg8 *) USBFS_1_USB__ARB_EP5_CFG) -#define USBFS_1_ARB_EP5_CFG_REG (* (reg8 *) USBFS_1_USB__ARB_EP5_CFG) -#define USBFS_1_ARB_EP5_INT_EN_PTR ( (reg8 *) USBFS_1_USB__ARB_EP5_INT_EN) -#define USBFS_1_ARB_EP5_INT_EN_REG (* (reg8 *) USBFS_1_USB__ARB_EP5_INT_EN) -#define USBFS_1_ARB_EP5_SR_PTR ( (reg8 *) USBFS_1_USB__ARB_EP5_SR) -#define USBFS_1_ARB_EP5_SR_REG (* (reg8 *) USBFS_1_USB__ARB_EP5_SR) - -#define USBFS_1_ARB_EP6_CFG_PTR ( (reg8 *) USBFS_1_USB__ARB_EP6_CFG) -#define USBFS_1_ARB_EP6_CFG_REG (* (reg8 *) USBFS_1_USB__ARB_EP6_CFG) -#define USBFS_1_ARB_EP6_INT_EN_PTR ( (reg8 *) USBFS_1_USB__ARB_EP6_INT_EN) -#define USBFS_1_ARB_EP6_INT_EN_REG (* (reg8 *) USBFS_1_USB__ARB_EP6_INT_EN) -#define USBFS_1_ARB_EP6_SR_PTR ( (reg8 *) USBFS_1_USB__ARB_EP6_SR) -#define USBFS_1_ARB_EP6_SR_REG (* (reg8 *) USBFS_1_USB__ARB_EP6_SR) - -#define USBFS_1_ARB_EP7_CFG_PTR ( (reg8 *) USBFS_1_USB__ARB_EP7_CFG) -#define USBFS_1_ARB_EP7_CFG_REG (* (reg8 *) USBFS_1_USB__ARB_EP7_CFG) -#define USBFS_1_ARB_EP7_INT_EN_PTR ( (reg8 *) USBFS_1_USB__ARB_EP7_INT_EN) -#define USBFS_1_ARB_EP7_INT_EN_REG (* (reg8 *) USBFS_1_USB__ARB_EP7_INT_EN) -#define USBFS_1_ARB_EP7_SR_PTR ( (reg8 *) USBFS_1_USB__ARB_EP7_SR) -#define USBFS_1_ARB_EP7_SR_REG (* (reg8 *) USBFS_1_USB__ARB_EP7_SR) - -#define USBFS_1_ARB_EP8_CFG_PTR ( (reg8 *) USBFS_1_USB__ARB_EP8_CFG) -#define USBFS_1_ARB_EP8_CFG_REG (* (reg8 *) USBFS_1_USB__ARB_EP8_CFG) -#define USBFS_1_ARB_EP8_INT_EN_PTR ( (reg8 *) USBFS_1_USB__ARB_EP8_INT_EN) -#define USBFS_1_ARB_EP8_INT_EN_REG (* (reg8 *) USBFS_1_USB__ARB_EP8_INT_EN) -#define USBFS_1_ARB_EP8_SR_PTR ( (reg8 *) USBFS_1_USB__ARB_EP8_SR) -#define USBFS_1_ARB_EP8_SR_REG (* (reg8 *) USBFS_1_USB__ARB_EP8_SR) - -#define USBFS_1_ARB_INT_EN_PTR ( (reg8 *) USBFS_1_USB__ARB_INT_EN) -#define USBFS_1_ARB_INT_EN_REG (* (reg8 *) USBFS_1_USB__ARB_INT_EN) -#define USBFS_1_ARB_INT_SR_PTR ( (reg8 *) USBFS_1_USB__ARB_INT_SR) -#define USBFS_1_ARB_INT_SR_REG (* (reg8 *) USBFS_1_USB__ARB_INT_SR) - -#define USBFS_1_ARB_RW1_DR_PTR ((reg8 *) USBFS_1_USB__ARB_RW1_DR) -#define USBFS_1_ARB_RW1_DR_IND USBFS_1_USB__ARB_RW1_DR -#define USBFS_1_ARB_RW1_RA_PTR ((reg8 *) USBFS_1_USB__ARB_RW1_RA) -#define USBFS_1_ARB_RW1_RA_IND USBFS_1_USB__ARB_RW1_RA -#define USBFS_1_ARB_RW1_RA_MSB_PTR ((reg8 *) USBFS_1_USB__ARB_RW1_RA_MSB) -#define USBFS_1_ARB_RW1_RA_MSB_IND USBFS_1_USB__ARB_RW1_RA_MSB -#define USBFS_1_ARB_RW1_WA_PTR ((reg8 *) USBFS_1_USB__ARB_RW1_WA) -#define USBFS_1_ARB_RW1_WA_IND USBFS_1_USB__ARB_RW1_WA -#define USBFS_1_ARB_RW1_WA_MSB_PTR ((reg8 *) USBFS_1_USB__ARB_RW1_WA_MSB) -#define USBFS_1_ARB_RW1_WA_MSB_IND USBFS_1_USB__ARB_RW1_WA_MSB - -#define USBFS_1_ARB_RW2_DR_PTR ((reg8 *) USBFS_1_USB__ARB_RW2_DR) -#define USBFS_1_ARB_RW2_RA_PTR ((reg8 *) USBFS_1_USB__ARB_RW2_RA) -#define USBFS_1_ARB_RW2_RA_MSB_PTR ((reg8 *) USBFS_1_USB__ARB_RW2_RA_MSB) -#define USBFS_1_ARB_RW2_WA_PTR ((reg8 *) USBFS_1_USB__ARB_RW2_WA) -#define USBFS_1_ARB_RW2_WA_MSB_PTR ((reg8 *) USBFS_1_USB__ARB_RW2_WA_MSB) - -#define USBFS_1_ARB_RW3_DR_PTR ((reg8 *) USBFS_1_USB__ARB_RW3_DR) -#define USBFS_1_ARB_RW3_RA_PTR ((reg8 *) USBFS_1_USB__ARB_RW3_RA) -#define USBFS_1_ARB_RW3_RA_MSB_PTR ((reg8 *) USBFS_1_USB__ARB_RW3_RA_MSB) -#define USBFS_1_ARB_RW3_WA_PTR ((reg8 *) USBFS_1_USB__ARB_RW3_WA) -#define USBFS_1_ARB_RW3_WA_MSB_PTR ((reg8 *) USBFS_1_USB__ARB_RW3_WA_MSB) - -#define USBFS_1_ARB_RW4_DR_PTR ((reg8 *) USBFS_1_USB__ARB_RW4_DR) -#define USBFS_1_ARB_RW4_RA_PTR ((reg8 *) USBFS_1_USB__ARB_RW4_RA) -#define USBFS_1_ARB_RW4_RA_MSB_PTR ((reg8 *) USBFS_1_USB__ARB_RW4_RA_MSB) -#define USBFS_1_ARB_RW4_WA_PTR ((reg8 *) USBFS_1_USB__ARB_RW4_WA) -#define USBFS_1_ARB_RW4_WA_MSB_PTR ((reg8 *) USBFS_1_USB__ARB_RW4_WA_MSB) - -#define USBFS_1_ARB_RW5_DR_PTR ((reg8 *) USBFS_1_USB__ARB_RW5_DR) -#define USBFS_1_ARB_RW5_RA_PTR ((reg8 *) USBFS_1_USB__ARB_RW5_RA) -#define USBFS_1_ARB_RW5_RA_MSB_PTR ((reg8 *) USBFS_1_USB__ARB_RW5_RA_MSB) -#define USBFS_1_ARB_RW5_WA_PTR ((reg8 *) USBFS_1_USB__ARB_RW5_WA) -#define USBFS_1_ARB_RW5_WA_MSB_PTR ((reg8 *) USBFS_1_USB__ARB_RW5_WA_MSB) - -#define USBFS_1_ARB_RW6_DR_PTR ((reg8 *) USBFS_1_USB__ARB_RW6_DR) -#define USBFS_1_ARB_RW6_RA_PTR ((reg8 *) USBFS_1_USB__ARB_RW6_RA) -#define USBFS_1_ARB_RW6_RA_MSB_PTR ((reg8 *) USBFS_1_USB__ARB_RW6_RA_MSB) -#define USBFS_1_ARB_RW6_WA_PTR ((reg8 *) USBFS_1_USB__ARB_RW6_WA) -#define USBFS_1_ARB_RW6_WA_MSB_PTR ((reg8 *) USBFS_1_USB__ARB_RW6_WA_MSB) - -#define USBFS_1_ARB_RW7_DR_PTR ((reg8 *) USBFS_1_USB__ARB_RW7_DR) -#define USBFS_1_ARB_RW7_RA_PTR ((reg8 *) USBFS_1_USB__ARB_RW7_RA) -#define USBFS_1_ARB_RW7_RA_MSB_PTR ((reg8 *) USBFS_1_USB__ARB_RW7_RA_MSB) -#define USBFS_1_ARB_RW7_WA_PTR ((reg8 *) USBFS_1_USB__ARB_RW7_WA) -#define USBFS_1_ARB_RW7_WA_MSB_PTR ((reg8 *) USBFS_1_USB__ARB_RW7_WA_MSB) - -#define USBFS_1_ARB_RW8_DR_PTR ((reg8 *) USBFS_1_USB__ARB_RW8_DR) -#define USBFS_1_ARB_RW8_RA_PTR ((reg8 *) USBFS_1_USB__ARB_RW8_RA) -#define USBFS_1_ARB_RW8_RA_MSB_PTR ((reg8 *) USBFS_1_USB__ARB_RW8_RA_MSB) -#define USBFS_1_ARB_RW8_WA_PTR ((reg8 *) USBFS_1_USB__ARB_RW8_WA) -#define USBFS_1_ARB_RW8_WA_MSB_PTR ((reg8 *) USBFS_1_USB__ARB_RW8_WA_MSB) - -#define USBFS_1_BUF_SIZE_PTR ( (reg8 *) USBFS_1_USB__BUF_SIZE) -#define USBFS_1_BUF_SIZE_REG (* (reg8 *) USBFS_1_USB__BUF_SIZE) -#define USBFS_1_BUS_RST_CNT_PTR ( (reg8 *) USBFS_1_USB__BUS_RST_CNT) -#define USBFS_1_BUS_RST_CNT_REG (* (reg8 *) USBFS_1_USB__BUS_RST_CNT) -#define USBFS_1_CWA_PTR ( (reg8 *) USBFS_1_USB__CWA) -#define USBFS_1_CWA_REG (* (reg8 *) USBFS_1_USB__CWA) -#define USBFS_1_CWA_MSB_PTR ( (reg8 *) USBFS_1_USB__CWA_MSB) -#define USBFS_1_CWA_MSB_REG (* (reg8 *) USBFS_1_USB__CWA_MSB) -#define USBFS_1_CR0_PTR ( (reg8 *) USBFS_1_USB__CR0) -#define USBFS_1_CR0_REG (* (reg8 *) USBFS_1_USB__CR0) -#define USBFS_1_CR1_PTR ( (reg8 *) USBFS_1_USB__CR1) -#define USBFS_1_CR1_REG (* (reg8 *) USBFS_1_USB__CR1) - -#define USBFS_1_DMA_THRES_PTR ( (reg8 *) USBFS_1_USB__DMA_THRES) -#define USBFS_1_DMA_THRES_REG (* (reg8 *) USBFS_1_USB__DMA_THRES) -#define USBFS_1_DMA_THRES_MSB_PTR ( (reg8 *) USBFS_1_USB__DMA_THRES_MSB) -#define USBFS_1_DMA_THRES_MSB_REG (* (reg8 *) USBFS_1_USB__DMA_THRES_MSB) - -#define USBFS_1_EP_ACTIVE_PTR ( (reg8 *) USBFS_1_USB__EP_ACTIVE) -#define USBFS_1_EP_ACTIVE_REG (* (reg8 *) USBFS_1_USB__EP_ACTIVE) -#define USBFS_1_EP_TYPE_PTR ( (reg8 *) USBFS_1_USB__EP_TYPE) -#define USBFS_1_EP_TYPE_REG (* (reg8 *) USBFS_1_USB__EP_TYPE) - -#define USBFS_1_EP0_CNT_PTR ( (reg8 *) USBFS_1_USB__EP0_CNT) -#define USBFS_1_EP0_CNT_REG (* (reg8 *) USBFS_1_USB__EP0_CNT) -#define USBFS_1_EP0_CR_PTR ( (reg8 *) USBFS_1_USB__EP0_CR) -#define USBFS_1_EP0_CR_REG (* (reg8 *) USBFS_1_USB__EP0_CR) -#define USBFS_1_EP0_DR0_PTR ( (reg8 *) USBFS_1_USB__EP0_DR0) -#define USBFS_1_EP0_DR0_REG (* (reg8 *) USBFS_1_USB__EP0_DR0) -#define USBFS_1_EP0_DR0_IND USBFS_1_USB__EP0_DR0 -#define USBFS_1_EP0_DR1_PTR ( (reg8 *) USBFS_1_USB__EP0_DR1) -#define USBFS_1_EP0_DR1_REG (* (reg8 *) USBFS_1_USB__EP0_DR1) -#define USBFS_1_EP0_DR2_PTR ( (reg8 *) USBFS_1_USB__EP0_DR2) -#define USBFS_1_EP0_DR2_REG (* (reg8 *) USBFS_1_USB__EP0_DR2) -#define USBFS_1_EP0_DR3_PTR ( (reg8 *) USBFS_1_USB__EP0_DR3) -#define USBFS_1_EP0_DR3_REG (* (reg8 *) USBFS_1_USB__EP0_DR3) -#define USBFS_1_EP0_DR4_PTR ( (reg8 *) USBFS_1_USB__EP0_DR4) -#define USBFS_1_EP0_DR4_REG (* (reg8 *) USBFS_1_USB__EP0_DR4) -#define USBFS_1_EP0_DR5_PTR ( (reg8 *) USBFS_1_USB__EP0_DR5) -#define USBFS_1_EP0_DR5_REG (* (reg8 *) USBFS_1_USB__EP0_DR5) -#define USBFS_1_EP0_DR6_PTR ( (reg8 *) USBFS_1_USB__EP0_DR6) -#define USBFS_1_EP0_DR6_REG (* (reg8 *) USBFS_1_USB__EP0_DR6) -#define USBFS_1_EP0_DR7_PTR ( (reg8 *) USBFS_1_USB__EP0_DR7) -#define USBFS_1_EP0_DR7_REG (* (reg8 *) USBFS_1_USB__EP0_DR7) - -#define USBFS_1_OSCLK_DR0_PTR ( (reg8 *) USBFS_1_USB__OSCLK_DR0) -#define USBFS_1_OSCLK_DR0_REG (* (reg8 *) USBFS_1_USB__OSCLK_DR0) -#define USBFS_1_OSCLK_DR1_PTR ( (reg8 *) USBFS_1_USB__OSCLK_DR1) -#define USBFS_1_OSCLK_DR1_REG (* (reg8 *) USBFS_1_USB__OSCLK_DR1) - -#define USBFS_1_PM_ACT_CFG_PTR ( (reg8 *) USBFS_1_USB__PM_ACT_CFG) -#define USBFS_1_PM_ACT_CFG_REG (* (reg8 *) USBFS_1_USB__PM_ACT_CFG) -#define USBFS_1_PM_STBY_CFG_PTR ( (reg8 *) USBFS_1_USB__PM_STBY_CFG) -#define USBFS_1_PM_STBY_CFG_REG (* (reg8 *) USBFS_1_USB__PM_STBY_CFG) - -#define USBFS_1_SIE_EP_INT_EN_PTR ( (reg8 *) USBFS_1_USB__SIE_EP_INT_EN) -#define USBFS_1_SIE_EP_INT_EN_REG (* (reg8 *) USBFS_1_USB__SIE_EP_INT_EN) -#define USBFS_1_SIE_EP_INT_SR_PTR ( (reg8 *) USBFS_1_USB__SIE_EP_INT_SR) -#define USBFS_1_SIE_EP_INT_SR_REG (* (reg8 *) USBFS_1_USB__SIE_EP_INT_SR) - -#define USBFS_1_SIE_EP1_CNT0_PTR ( (reg8 *) USBFS_1_USB__SIE_EP1_CNT0) -#define USBFS_1_SIE_EP1_CNT0_REG (* (reg8 *) USBFS_1_USB__SIE_EP1_CNT0) -#define USBFS_1_SIE_EP1_CNT0_IND USBFS_1_USB__SIE_EP1_CNT0 -#define USBFS_1_SIE_EP1_CNT1_PTR ( (reg8 *) USBFS_1_USB__SIE_EP1_CNT1) -#define USBFS_1_SIE_EP1_CNT1_REG (* (reg8 *) USBFS_1_USB__SIE_EP1_CNT1) -#define USBFS_1_SIE_EP1_CNT1_IND USBFS_1_USB__SIE_EP1_CNT1 -#define USBFS_1_SIE_EP1_CR0_PTR ( (reg8 *) USBFS_1_USB__SIE_EP1_CR0) -#define USBFS_1_SIE_EP1_CR0_REG (* (reg8 *) USBFS_1_USB__SIE_EP1_CR0) -#define USBFS_1_SIE_EP1_CR0_IND USBFS_1_USB__SIE_EP1_CR0 - -#define USBFS_1_SIE_EP2_CNT0_PTR ( (reg8 *) USBFS_1_USB__SIE_EP2_CNT0) -#define USBFS_1_SIE_EP2_CNT0_REG (* (reg8 *) USBFS_1_USB__SIE_EP2_CNT0) -#define USBFS_1_SIE_EP2_CNT1_PTR ( (reg8 *) USBFS_1_USB__SIE_EP2_CNT1) -#define USBFS_1_SIE_EP2_CNT1_REG (* (reg8 *) USBFS_1_USB__SIE_EP2_CNT1) -#define USBFS_1_SIE_EP2_CR0_PTR ( (reg8 *) USBFS_1_USB__SIE_EP2_CR0) -#define USBFS_1_SIE_EP2_CR0_REG (* (reg8 *) USBFS_1_USB__SIE_EP2_CR0) - -#define USBFS_1_SIE_EP3_CNT0_PTR ( (reg8 *) USBFS_1_USB__SIE_EP3_CNT0) -#define USBFS_1_SIE_EP3_CNT0_REG (* (reg8 *) USBFS_1_USB__SIE_EP3_CNT0) -#define USBFS_1_SIE_EP3_CNT1_PTR ( (reg8 *) USBFS_1_USB__SIE_EP3_CNT1) -#define USBFS_1_SIE_EP3_CNT1_REG (* (reg8 *) USBFS_1_USB__SIE_EP3_CNT1) -#define USBFS_1_SIE_EP3_CR0_PTR ( (reg8 *) USBFS_1_USB__SIE_EP3_CR0) -#define USBFS_1_SIE_EP3_CR0_REG (* (reg8 *) USBFS_1_USB__SIE_EP3_CR0) - -#define USBFS_1_SIE_EP4_CNT0_PTR ( (reg8 *) USBFS_1_USB__SIE_EP4_CNT0) -#define USBFS_1_SIE_EP4_CNT0_REG (* (reg8 *) USBFS_1_USB__SIE_EP4_CNT0) -#define USBFS_1_SIE_EP4_CNT1_PTR ( (reg8 *) USBFS_1_USB__SIE_EP4_CNT1) -#define USBFS_1_SIE_EP4_CNT1_REG (* (reg8 *) USBFS_1_USB__SIE_EP4_CNT1) -#define USBFS_1_SIE_EP4_CR0_PTR ( (reg8 *) USBFS_1_USB__SIE_EP4_CR0) -#define USBFS_1_SIE_EP4_CR0_REG (* (reg8 *) USBFS_1_USB__SIE_EP4_CR0) - -#define USBFS_1_SIE_EP5_CNT0_PTR ( (reg8 *) USBFS_1_USB__SIE_EP5_CNT0) -#define USBFS_1_SIE_EP5_CNT0_REG (* (reg8 *) USBFS_1_USB__SIE_EP5_CNT0) -#define USBFS_1_SIE_EP5_CNT1_PTR ( (reg8 *) USBFS_1_USB__SIE_EP5_CNT1) -#define USBFS_1_SIE_EP5_CNT1_REG (* (reg8 *) USBFS_1_USB__SIE_EP5_CNT1) -#define USBFS_1_SIE_EP5_CR0_PTR ( (reg8 *) USBFS_1_USB__SIE_EP5_CR0) -#define USBFS_1_SIE_EP5_CR0_REG (* (reg8 *) USBFS_1_USB__SIE_EP5_CR0) - -#define USBFS_1_SIE_EP6_CNT0_PTR ( (reg8 *) USBFS_1_USB__SIE_EP6_CNT0) -#define USBFS_1_SIE_EP6_CNT0_REG (* (reg8 *) USBFS_1_USB__SIE_EP6_CNT0) -#define USBFS_1_SIE_EP6_CNT1_PTR ( (reg8 *) USBFS_1_USB__SIE_EP6_CNT1) -#define USBFS_1_SIE_EP6_CNT1_REG (* (reg8 *) USBFS_1_USB__SIE_EP6_CNT1) -#define USBFS_1_SIE_EP6_CR0_PTR ( (reg8 *) USBFS_1_USB__SIE_EP6_CR0) -#define USBFS_1_SIE_EP6_CR0_REG (* (reg8 *) USBFS_1_USB__SIE_EP6_CR0) - -#define USBFS_1_SIE_EP7_CNT0_PTR ( (reg8 *) USBFS_1_USB__SIE_EP7_CNT0) -#define USBFS_1_SIE_EP7_CNT0_REG (* (reg8 *) USBFS_1_USB__SIE_EP7_CNT0) -#define USBFS_1_SIE_EP7_CNT1_PTR ( (reg8 *) USBFS_1_USB__SIE_EP7_CNT1) -#define USBFS_1_SIE_EP7_CNT1_REG (* (reg8 *) USBFS_1_USB__SIE_EP7_CNT1) -#define USBFS_1_SIE_EP7_CR0_PTR ( (reg8 *) USBFS_1_USB__SIE_EP7_CR0) -#define USBFS_1_SIE_EP7_CR0_REG (* (reg8 *) USBFS_1_USB__SIE_EP7_CR0) - -#define USBFS_1_SIE_EP8_CNT0_PTR ( (reg8 *) USBFS_1_USB__SIE_EP8_CNT0) -#define USBFS_1_SIE_EP8_CNT0_REG (* (reg8 *) USBFS_1_USB__SIE_EP8_CNT0) -#define USBFS_1_SIE_EP8_CNT1_PTR ( (reg8 *) USBFS_1_USB__SIE_EP8_CNT1) -#define USBFS_1_SIE_EP8_CNT1_REG (* (reg8 *) USBFS_1_USB__SIE_EP8_CNT1) -#define USBFS_1_SIE_EP8_CR0_PTR ( (reg8 *) USBFS_1_USB__SIE_EP8_CR0) -#define USBFS_1_SIE_EP8_CR0_REG (* (reg8 *) USBFS_1_USB__SIE_EP8_CR0) - -#define USBFS_1_SOF0_PTR ( (reg8 *) USBFS_1_USB__SOF0) -#define USBFS_1_SOF0_REG (* (reg8 *) USBFS_1_USB__SOF0) -#define USBFS_1_SOF1_PTR ( (reg8 *) USBFS_1_USB__SOF1) -#define USBFS_1_SOF1_REG (* (reg8 *) USBFS_1_USB__SOF1) - -#define USBFS_1_USB_CLK_EN_PTR ( (reg8 *) USBFS_1_USB__USB_CLK_EN) -#define USBFS_1_USB_CLK_EN_REG (* (reg8 *) USBFS_1_USB__USB_CLK_EN) - -#define USBFS_1_USBIO_CR0_PTR ( (reg8 *) USBFS_1_USB__USBIO_CR0) -#define USBFS_1_USBIO_CR0_REG (* (reg8 *) USBFS_1_USB__USBIO_CR0) -#define USBFS_1_USBIO_CR1_PTR ( (reg8 *) USBFS_1_USB__USBIO_CR1) -#define USBFS_1_USBIO_CR1_REG (* (reg8 *) USBFS_1_USB__USBIO_CR1) -#if(!CY_PSOC5LP) - #define USBFS_1_USBIO_CR2_PTR ( (reg8 *) USBFS_1_USB__USBIO_CR2) - #define USBFS_1_USBIO_CR2_REG (* (reg8 *) USBFS_1_USB__USBIO_CR2) -#endif /* End CY_PSOC5LP */ - -#define USBFS_1_DIE_ID CYDEV_FLSHID_CUST_TABLES_BASE - -#define USBFS_1_PM_USB_CR0_PTR ( (reg8 *) CYREG_PM_USB_CR0) -#define USBFS_1_PM_USB_CR0_REG (* (reg8 *) CYREG_PM_USB_CR0) -#define USBFS_1_DYN_RECONFIG_PTR ( (reg8 *) USBFS_1_USB__DYN_RECONFIG) -#define USBFS_1_DYN_RECONFIG_REG (* (reg8 *) USBFS_1_USB__DYN_RECONFIG) - -#define USBFS_1_DM_INP_DIS_PTR ( (reg8 *) USBFS_1_Dm__INP_DIS) -#define USBFS_1_DM_INP_DIS_REG (* (reg8 *) USBFS_1_Dm__INP_DIS) -#define USBFS_1_DP_INP_DIS_PTR ( (reg8 *) USBFS_1_Dp__INP_DIS) -#define USBFS_1_DP_INP_DIS_REG (* (reg8 *) USBFS_1_Dp__INP_DIS) -#define USBFS_1_DP_INTSTAT_PTR ( (reg8 *) USBFS_1_Dp__INTSTAT) -#define USBFS_1_DP_INTSTAT_REG (* (reg8 *) USBFS_1_Dp__INTSTAT) - -#if (USBFS_1_MON_VBUS == 1u) - #if (USBFS_1_EXTERN_VBUS == 0u) - #define USBFS_1_VBUS_DR_PTR ( (reg8 *) USBFS_1_VBUS__DR) - #define USBFS_1_VBUS_DR_REG (* (reg8 *) USBFS_1_VBUS__DR) - #define USBFS_1_VBUS_PS_PTR ( (reg8 *) USBFS_1_VBUS__PS) - #define USBFS_1_VBUS_PS_REG (* (reg8 *) USBFS_1_VBUS__PS) - #define USBFS_1_VBUS_MASK USBFS_1_VBUS__MASK - #else - #define USBFS_1_VBUS_PS_PTR ( (reg8 *) USBFS_1_Vbus_ps_sts_sts_reg__STATUS_REG ) - #define USBFS_1_VBUS_MASK (0x01u) - #endif /* End USBFS_1_EXTERN_VBUS == 0u */ -#endif /* End USBFS_1_MON_VBUS */ - -/* Renamed Registers for backward compatibility. -* Should not be used in new designs. -*/ -#define USBFS_1_ARB_CFG USBFS_1_ARB_CFG_PTR - -#define USBFS_1_ARB_EP1_CFG USBFS_1_ARB_EP1_CFG_PTR -#define USBFS_1_ARB_EP1_INT_EN USBFS_1_ARB_EP1_INT_EN_PTR -#define USBFS_1_ARB_EP1_SR USBFS_1_ARB_EP1_SR_PTR - -#define USBFS_1_ARB_EP2_CFG USBFS_1_ARB_EP2_CFG_PTR -#define USBFS_1_ARB_EP2_INT_EN USBFS_1_ARB_EP2_INT_EN_PTR -#define USBFS_1_ARB_EP2_SR USBFS_1_ARB_EP2_SR_PTR - -#define USBFS_1_ARB_EP3_CFG USBFS_1_ARB_EP3_CFG_PTR -#define USBFS_1_ARB_EP3_INT_EN USBFS_1_ARB_EP3_INT_EN_PTR -#define USBFS_1_ARB_EP3_SR USBFS_1_ARB_EP3_SR_PTR - -#define USBFS_1_ARB_EP4_CFG USBFS_1_ARB_EP4_CFG_PTR -#define USBFS_1_ARB_EP4_INT_EN USBFS_1_ARB_EP4_INT_EN_PTR -#define USBFS_1_ARB_EP4_SR USBFS_1_ARB_EP4_SR_PTR - -#define USBFS_1_ARB_EP5_CFG USBFS_1_ARB_EP5_CFG_PTR -#define USBFS_1_ARB_EP5_INT_EN USBFS_1_ARB_EP5_INT_EN_PTR -#define USBFS_1_ARB_EP5_SR USBFS_1_ARB_EP5_SR_PTR - -#define USBFS_1_ARB_EP6_CFG USBFS_1_ARB_EP6_CFG_PTR -#define USBFS_1_ARB_EP6_INT_EN USBFS_1_ARB_EP6_INT_EN_PTR -#define USBFS_1_ARB_EP6_SR USBFS_1_ARB_EP6_SR_PTR - -#define USBFS_1_ARB_EP7_CFG USBFS_1_ARB_EP7_CFG_PTR -#define USBFS_1_ARB_EP7_INT_EN USBFS_1_ARB_EP7_INT_EN_PTR -#define USBFS_1_ARB_EP7_SR USBFS_1_ARB_EP7_SR_PTR - -#define USBFS_1_ARB_EP8_CFG USBFS_1_ARB_EP8_CFG_PTR -#define USBFS_1_ARB_EP8_INT_EN USBFS_1_ARB_EP8_INT_EN_PTR -#define USBFS_1_ARB_EP8_SR USBFS_1_ARB_EP8_SR_PTR - -#define USBFS_1_ARB_INT_EN USBFS_1_ARB_INT_EN_PTR -#define USBFS_1_ARB_INT_SR USBFS_1_ARB_INT_SR_PTR - -#define USBFS_1_ARB_RW1_DR USBFS_1_ARB_RW1_DR_PTR -#define USBFS_1_ARB_RW1_RA USBFS_1_ARB_RW1_RA_PTR -#define USBFS_1_ARB_RW1_RA_MSB USBFS_1_ARB_RW1_RA_MSB_PTR -#define USBFS_1_ARB_RW1_WA USBFS_1_ARB_RW1_WA_PTR -#define USBFS_1_ARB_RW1_WA_MSB USBFS_1_ARB_RW1_WA_MSB_PTR - -#define USBFS_1_ARB_RW2_DR USBFS_1_ARB_RW2_DR_PTR -#define USBFS_1_ARB_RW2_RA USBFS_1_ARB_RW2_RA_PTR -#define USBFS_1_ARB_RW2_RA_MSB USBFS_1_ARB_RW2_RA_MSB_PTR -#define USBFS_1_ARB_RW2_WA USBFS_1_ARB_RW2_WA_PTR -#define USBFS_1_ARB_RW2_WA_MSB USBFS_1_ARB_RW2_WA_MSB_PTR - -#define USBFS_1_ARB_RW3_DR USBFS_1_ARB_RW3_DR_PTR -#define USBFS_1_ARB_RW3_RA USBFS_1_ARB_RW3_RA_PTR -#define USBFS_1_ARB_RW3_RA_MSB USBFS_1_ARB_RW3_RA_MSB_PTR -#define USBFS_1_ARB_RW3_WA USBFS_1_ARB_RW3_WA_PTR -#define USBFS_1_ARB_RW3_WA_MSB USBFS_1_ARB_RW3_WA_MSB_PTR - -#define USBFS_1_ARB_RW4_DR USBFS_1_ARB_RW4_DR_PTR -#define USBFS_1_ARB_RW4_RA USBFS_1_ARB_RW4_RA_PTR -#define USBFS_1_ARB_RW4_RA_MSB USBFS_1_ARB_RW4_RA_MSB_PTR -#define USBFS_1_ARB_RW4_WA USBFS_1_ARB_RW4_WA_PTR -#define USBFS_1_ARB_RW4_WA_MSB USBFS_1_ARB_RW4_WA_MSB_PTR - -#define USBFS_1_ARB_RW5_DR USBFS_1_ARB_RW5_DR_PTR -#define USBFS_1_ARB_RW5_RA USBFS_1_ARB_RW5_RA_PTR -#define USBFS_1_ARB_RW5_RA_MSB USBFS_1_ARB_RW5_RA_MSB_PTR -#define USBFS_1_ARB_RW5_WA USBFS_1_ARB_RW5_WA_PTR -#define USBFS_1_ARB_RW5_WA_MSB USBFS_1_ARB_RW5_WA_MSB_PTR - -#define USBFS_1_ARB_RW6_DR USBFS_1_ARB_RW6_DR_PTR -#define USBFS_1_ARB_RW6_RA USBFS_1_ARB_RW6_RA_PTR -#define USBFS_1_ARB_RW6_RA_MSB USBFS_1_ARB_RW6_RA_MSB_PTR -#define USBFS_1_ARB_RW6_WA USBFS_1_ARB_RW6_WA_PTR -#define USBFS_1_ARB_RW6_WA_MSB USBFS_1_ARB_RW6_WA_MSB_PTR - -#define USBFS_1_ARB_RW7_DR USBFS_1_ARB_RW7_DR_PTR -#define USBFS_1_ARB_RW7_RA USBFS_1_ARB_RW7_RA_PTR -#define USBFS_1_ARB_RW7_RA_MSB USBFS_1_ARB_RW7_RA_MSB_PTR -#define USBFS_1_ARB_RW7_WA USBFS_1_ARB_RW7_WA_PTR -#define USBFS_1_ARB_RW7_WA_MSB USBFS_1_ARB_RW7_WA_MSB_PTR - -#define USBFS_1_ARB_RW8_DR USBFS_1_ARB_RW8_DR_PTR -#define USBFS_1_ARB_RW8_RA USBFS_1_ARB_RW8_RA_PTR -#define USBFS_1_ARB_RW8_RA_MSB USBFS_1_ARB_RW8_RA_MSB_PTR -#define USBFS_1_ARB_RW8_WA USBFS_1_ARB_RW8_WA_PTR -#define USBFS_1_ARB_RW8_WA_MSB USBFS_1_ARB_RW8_WA_MSB_PTR - -#define USBFS_1_BUF_SIZE USBFS_1_BUF_SIZE_PTR -#define USBFS_1_BUS_RST_CNT USBFS_1_BUS_RST_CNT_PTR -#define USBFS_1_CR0 USBFS_1_CR0_PTR -#define USBFS_1_CR1 USBFS_1_CR1_PTR -#define USBFS_1_CWA USBFS_1_CWA_PTR -#define USBFS_1_CWA_MSB USBFS_1_CWA_MSB_PTR - -#define USBFS_1_DMA_THRES USBFS_1_DMA_THRES_PTR -#define USBFS_1_DMA_THRES_MSB USBFS_1_DMA_THRES_MSB_PTR - -#define USBFS_1_EP_ACTIVE USBFS_1_EP_ACTIVE_PTR -#define USBFS_1_EP_TYPE USBFS_1_EP_TYPE_PTR - -#define USBFS_1_EP0_CNT USBFS_1_EP0_CNT_PTR -#define USBFS_1_EP0_CR USBFS_1_EP0_CR_PTR -#define USBFS_1_EP0_DR0 USBFS_1_EP0_DR0_PTR -#define USBFS_1_EP0_DR1 USBFS_1_EP0_DR1_PTR -#define USBFS_1_EP0_DR2 USBFS_1_EP0_DR2_PTR -#define USBFS_1_EP0_DR3 USBFS_1_EP0_DR3_PTR -#define USBFS_1_EP0_DR4 USBFS_1_EP0_DR4_PTR -#define USBFS_1_EP0_DR5 USBFS_1_EP0_DR5_PTR -#define USBFS_1_EP0_DR6 USBFS_1_EP0_DR6_PTR -#define USBFS_1_EP0_DR7 USBFS_1_EP0_DR7_PTR - -#define USBFS_1_OSCLK_DR0 USBFS_1_OSCLK_DR0_PTR -#define USBFS_1_OSCLK_DR1 USBFS_1_OSCLK_DR1_PTR - -#define USBFS_1_PM_ACT_CFG USBFS_1_PM_ACT_CFG_PTR -#define USBFS_1_PM_STBY_CFG USBFS_1_PM_STBY_CFG_PTR - -#define USBFS_1_SIE_EP_INT_EN USBFS_1_SIE_EP_INT_EN_PTR -#define USBFS_1_SIE_EP_INT_SR USBFS_1_SIE_EP_INT_SR_PTR - -#define USBFS_1_SIE_EP1_CNT0 USBFS_1_SIE_EP1_CNT0_PTR -#define USBFS_1_SIE_EP1_CNT1 USBFS_1_SIE_EP1_CNT1_PTR -#define USBFS_1_SIE_EP1_CR0 USBFS_1_SIE_EP1_CR0_PTR - -#define USBFS_1_SIE_EP2_CNT0 USBFS_1_SIE_EP2_CNT0_PTR -#define USBFS_1_SIE_EP2_CNT1 USBFS_1_SIE_EP2_CNT1_PTR -#define USBFS_1_SIE_EP2_CR0 USBFS_1_SIE_EP2_CR0_PTR - -#define USBFS_1_SIE_EP3_CNT0 USBFS_1_SIE_EP3_CNT0_PTR -#define USBFS_1_SIE_EP3_CNT1 USBFS_1_SIE_EP3_CNT1_PTR -#define USBFS_1_SIE_EP3_CR0 USBFS_1_SIE_EP3_CR0_PTR - -#define USBFS_1_SIE_EP4_CNT0 USBFS_1_SIE_EP4_CNT0_PTR -#define USBFS_1_SIE_EP4_CNT1 USBFS_1_SIE_EP4_CNT1_PTR -#define USBFS_1_SIE_EP4_CR0 USBFS_1_SIE_EP4_CR0_PTR - -#define USBFS_1_SIE_EP5_CNT0 USBFS_1_SIE_EP5_CNT0_PTR -#define USBFS_1_SIE_EP5_CNT1 USBFS_1_SIE_EP5_CNT1_PTR -#define USBFS_1_SIE_EP5_CR0 USBFS_1_SIE_EP5_CR0_PTR - -#define USBFS_1_SIE_EP6_CNT0 USBFS_1_SIE_EP6_CNT0_PTR -#define USBFS_1_SIE_EP6_CNT1 USBFS_1_SIE_EP6_CNT1_PTR -#define USBFS_1_SIE_EP6_CR0 USBFS_1_SIE_EP6_CR0_PTR - -#define USBFS_1_SIE_EP7_CNT0 USBFS_1_SIE_EP7_CNT0_PTR -#define USBFS_1_SIE_EP7_CNT1 USBFS_1_SIE_EP7_CNT1_PTR -#define USBFS_1_SIE_EP7_CR0 USBFS_1_SIE_EP7_CR0_PTR - -#define USBFS_1_SIE_EP8_CNT0 USBFS_1_SIE_EP8_CNT0_PTR -#define USBFS_1_SIE_EP8_CNT1 USBFS_1_SIE_EP8_CNT1_PTR -#define USBFS_1_SIE_EP8_CR0 USBFS_1_SIE_EP8_CR0_PTR - -#define USBFS_1_SOF0 USBFS_1_SOF0_PTR -#define USBFS_1_SOF1 USBFS_1_SOF1_PTR - -#define USBFS_1_USB_CLK_EN USBFS_1_USB_CLK_EN_PTR - -#define USBFS_1_USBIO_CR0 USBFS_1_USBIO_CR0_PTR -#define USBFS_1_USBIO_CR1 USBFS_1_USBIO_CR1_PTR -#define USBFS_1_USBIO_CR2 USBFS_1_USBIO_CR2_PTR - -#define USBFS_1_USB_MEM ((reg8 *) CYDEV_USB_MEM_BASE) - -#if(CYDEV_CHIP_DIE_EXPECT == CYDEV_CHIP_DIE_LEOPARD) - /* PSoC3 interrupt registers*/ - #define USBFS_1_USB_ISR_PRIOR ((reg8 *) CYDEV_INTC_PRIOR0) - #define USBFS_1_USB_ISR_SET_EN ((reg8 *) CYDEV_INTC_SET_EN0) - #define USBFS_1_USB_ISR_CLR_EN ((reg8 *) CYDEV_INTC_CLR_EN0) - #define USBFS_1_USB_ISR_VECT ((cyisraddress *) CYDEV_INTC_VECT_MBASE) -#elif(CYDEV_CHIP_DIE_EXPECT == CYDEV_CHIP_DIE_PANTHER) - /* PSoC5 interrupt registers*/ - #define USBFS_1_USB_ISR_PRIOR ((reg8 *) CYDEV_NVIC_PRI_0) - #define USBFS_1_USB_ISR_SET_EN ((reg8 *) CYDEV_NVIC_SETENA0) - #define USBFS_1_USB_ISR_CLR_EN ((reg8 *) CYDEV_NVIC_CLRENA0) - #define USBFS_1_USB_ISR_VECT ((cyisraddress *) CYDEV_NVIC_VECT_OFFSET) -#endif /* End CYDEV_CHIP_DIE_EXPECT */ - - -/*************************************** -* Interrupt vectors, masks and priorities -***************************************/ - -#define USBFS_1_BUS_RESET_PRIOR USBFS_1_bus_reset__INTC_PRIOR_NUM -#define USBFS_1_BUS_RESET_MASK USBFS_1_bus_reset__INTC_MASK -#define USBFS_1_BUS_RESET_VECT_NUM USBFS_1_bus_reset__INTC_NUMBER - -#define USBFS_1_SOF_PRIOR USBFS_1_sof_int__INTC_PRIOR_NUM -#define USBFS_1_SOF_MASK USBFS_1_sof_int__INTC_MASK -#define USBFS_1_SOF_VECT_NUM USBFS_1_sof_int__INTC_NUMBER - -#define USBFS_1_EP_0_PRIOR USBFS_1_ep_0__INTC_PRIOR_NUM -#define USBFS_1_EP_0_MASK USBFS_1_ep_0__INTC_MASK -#define USBFS_1_EP_0_VECT_NUM USBFS_1_ep_0__INTC_NUMBER - -#define USBFS_1_EP_1_PRIOR USBFS_1_ep_1__INTC_PRIOR_NUM -#define USBFS_1_EP_1_MASK USBFS_1_ep_1__INTC_MASK -#define USBFS_1_EP_1_VECT_NUM USBFS_1_ep_1__INTC_NUMBER - -#define USBFS_1_EP_2_PRIOR USBFS_1_ep_2__INTC_PRIOR_NUM -#define USBFS_1_EP_2_MASK USBFS_1_ep_2__INTC_MASK -#define USBFS_1_EP_2_VECT_NUM USBFS_1_ep_2__INTC_NUMBER - -#define USBFS_1_EP_3_PRIOR USBFS_1_ep_3__INTC_PRIOR_NUM -#define USBFS_1_EP_3_MASK USBFS_1_ep_3__INTC_MASK -#define USBFS_1_EP_3_VECT_NUM USBFS_1_ep_3__INTC_NUMBER - -#define USBFS_1_EP_4_PRIOR USBFS_1_ep_4__INTC_PRIOR_NUM -#define USBFS_1_EP_4_MASK USBFS_1_ep_4__INTC_MASK -#define USBFS_1_EP_4_VECT_NUM USBFS_1_ep_4__INTC_NUMBER - -#define USBFS_1_EP_5_PRIOR USBFS_1_ep_5__INTC_PRIOR_NUM -#define USBFS_1_EP_5_MASK USBFS_1_ep_5__INTC_MASK -#define USBFS_1_EP_5_VECT_NUM USBFS_1_ep_5__INTC_NUMBER - -#define USBFS_1_EP_6_PRIOR USBFS_1_ep_6__INTC_PRIOR_NUM -#define USBFS_1_EP_6_MASK USBFS_1_ep_6__INTC_MASK -#define USBFS_1_EP_6_VECT_NUM USBFS_1_ep_6__INTC_NUMBER - -#define USBFS_1_EP_7_PRIOR USBFS_1_ep_7__INTC_PRIOR_NUM -#define USBFS_1_EP_7_MASK USBFS_1_ep_7__INTC_MASK -#define USBFS_1_EP_7_VECT_NUM USBFS_1_ep_7__INTC_NUMBER - -#define USBFS_1_EP_8_PRIOR USBFS_1_ep_8__INTC_PRIOR_NUM -#define USBFS_1_EP_8_MASK USBFS_1_ep_8__INTC_MASK -#define USBFS_1_EP_8_VECT_NUM USBFS_1_ep_8__INTC_NUMBER - -#define USBFS_1_DP_INTC_PRIOR USBFS_1_dp_int__INTC_PRIOR_NUM -#define USBFS_1_DP_INTC_MASK USBFS_1_dp_int__INTC_MASK -#define USBFS_1_DP_INTC_VECT_NUM USBFS_1_dp_int__INTC_NUMBER - -/* ARB ISR should have higher priority from EP_X ISR, therefore it is defined to highest (0) */ -#define USBFS_1_ARB_PRIOR (0u) -#define USBFS_1_ARB_MASK USBFS_1_arb_int__INTC_MASK -#define USBFS_1_ARB_VECT_NUM USBFS_1_arb_int__INTC_NUMBER - -/*************************************** - * Endpoint 0 offsets (Table 9-2) - **************************************/ - -#define USBFS_1_bmRequestType USBFS_1_EP0_DR0_PTR -#define USBFS_1_bRequest USBFS_1_EP0_DR1_PTR -#define USBFS_1_wValue USBFS_1_EP0_DR2_PTR -#define USBFS_1_wValueHi USBFS_1_EP0_DR3_PTR -#define USBFS_1_wValueLo USBFS_1_EP0_DR2_PTR -#define USBFS_1_wIndex USBFS_1_EP0_DR4_PTR -#define USBFS_1_wIndexHi USBFS_1_EP0_DR5_PTR -#define USBFS_1_wIndexLo USBFS_1_EP0_DR4_PTR -#define USBFS_1_length USBFS_1_EP0_DR6_PTR -#define USBFS_1_lengthHi USBFS_1_EP0_DR7_PTR -#define USBFS_1_lengthLo USBFS_1_EP0_DR6_PTR - - -/*************************************** -* Register Constants -***************************************/ -#define USBFS_1_VDDD_MV CYDEV_VDDD_MV -#define USBFS_1_3500MV (3500u) - -#define USBFS_1_CR1_REG_ENABLE (0x01u) -#define USBFS_1_CR1_ENABLE_LOCK (0x02u) -#define USBFS_1_CR1_BUS_ACTIVITY_SHIFT (0x02u) -#define USBFS_1_CR1_BUS_ACTIVITY ((uint8)(0x01u << USBFS_1_CR1_BUS_ACTIVITY_SHIFT)) -#define USBFS_1_CR1_TRIM_MSB_EN (0x08u) - -#define USBFS_1_EP0_CNT_DATA_TOGGLE (0x80u) -#define USBFS_1_EPX_CNT_DATA_TOGGLE (0x80u) -#define USBFS_1_EPX_CNT0_MASK (0x0Fu) -#define USBFS_1_EPX_CNTX_MSB_MASK (0x07u) -#define USBFS_1_EPX_CNTX_ADDR_SHIFT (0x04u) -#define USBFS_1_EPX_CNTX_ADDR_OFFSET (0x10u) -#define USBFS_1_EPX_CNTX_CRC_COUNT (0x02u) -#define USBFS_1_EPX_DATA_BUF_MAX (512u) - -#define USBFS_1_CR0_ENABLE (0x80u) - -/* A 100 KHz clock is used for BUS reset count. Recommended is to count 10 pulses */ -#define USBFS_1_BUS_RST_COUNT (0x0au) - -#define USBFS_1_USBIO_CR1_IOMODE (0x20u) -#define USBFS_1_USBIO_CR1_USBPUEN (0x04u) -#define USBFS_1_USBIO_CR1_DP0 (0x02u) -#define USBFS_1_USBIO_CR1_DM0 (0x01u) - -#define USBFS_1_USBIO_CR0_TEN (0x80u) -#define USBFS_1_USBIO_CR0_TSE0 (0x40u) -#define USBFS_1_USBIO_CR0_TD (0x20u) -#define USBFS_1_USBIO_CR0_RD (0x01u) - -#define USBFS_1_FASTCLK_IMO_CR_USBCLK_ON (0x40u) -#define USBFS_1_FASTCLK_IMO_CR_XCLKEN (0x20u) -#define USBFS_1_FASTCLK_IMO_CR_FX2ON (0x10u) - -#define USBFS_1_ARB_EPX_CFG_RESET (0x08u) -#define USBFS_1_ARB_EPX_CFG_CRC_BYPASS (0x04u) -#define USBFS_1_ARB_EPX_CFG_DMA_REQ (0x02u) -#define USBFS_1_ARB_EPX_CFG_IN_DATA_RDY (0x01u) - -#define USBFS_1_ARB_EPX_SR_IN_BUF_FULL (0x01u) -#define USBFS_1_ARB_EPX_SR_DMA_GNT (0x02u) -#define USBFS_1_ARB_EPX_SR_BUF_OVER (0x04u) -#define USBFS_1_ARB_EPX_SR_BUF_UNDER (0x08u) - -#define USBFS_1_ARB_CFG_AUTO_MEM (0x10u) -#define USBFS_1_ARB_CFG_MANUAL_DMA (0x20u) -#define USBFS_1_ARB_CFG_AUTO_DMA (0x40u) -#define USBFS_1_ARB_CFG_CFG_CPM (0x80u) - -#if(USBFS_1_EP_MM == USBFS_1__EP_DMAAUTO) - #define USBFS_1_ARB_EPX_INT_MASK (0x1Du) -#else - #define USBFS_1_ARB_EPX_INT_MASK (0x1Fu) -#endif /* End USBFS_1_EP_MM == USBFS_1__EP_DMAAUTO */ -#define USBFS_1_ARB_INT_MASK (uint8)((USBFS_1_DMA1_REMOVE ^ 1u) | \ - (uint8)((USBFS_1_DMA2_REMOVE ^ 1u) << 1u) | \ - (uint8)((USBFS_1_DMA3_REMOVE ^ 1u) << 2u) | \ - (uint8)((USBFS_1_DMA4_REMOVE ^ 1u) << 3u) | \ - (uint8)((USBFS_1_DMA5_REMOVE ^ 1u) << 4u) | \ - (uint8)((USBFS_1_DMA6_REMOVE ^ 1u) << 5u) | \ - (uint8)((USBFS_1_DMA7_REMOVE ^ 1u) << 6u) | \ - (uint8)((USBFS_1_DMA8_REMOVE ^ 1u) << 7u) ) - -#define USBFS_1_SIE_EP_INT_EP1_MASK (0x01u) -#define USBFS_1_SIE_EP_INT_EP2_MASK (0x02u) -#define USBFS_1_SIE_EP_INT_EP3_MASK (0x04u) -#define USBFS_1_SIE_EP_INT_EP4_MASK (0x08u) -#define USBFS_1_SIE_EP_INT_EP5_MASK (0x10u) -#define USBFS_1_SIE_EP_INT_EP6_MASK (0x20u) -#define USBFS_1_SIE_EP_INT_EP7_MASK (0x40u) -#define USBFS_1_SIE_EP_INT_EP8_MASK (0x80u) - -#define USBFS_1_PM_ACT_EN_FSUSB USBFS_1_USB__PM_ACT_MSK -#define USBFS_1_PM_STBY_EN_FSUSB USBFS_1_USB__PM_STBY_MSK -#define USBFS_1_PM_AVAIL_EN_FSUSBIO (0x10u) - -#define USBFS_1_PM_USB_CR0_REF_EN (0x01u) -#define USBFS_1_PM_USB_CR0_PD_N (0x02u) -#define USBFS_1_PM_USB_CR0_PD_PULLUP_N (0x04u) - -#define USBFS_1_USB_CLK_ENABLE (0x01u) - -#define USBFS_1_DM_MASK USBFS_1_Dm__0__MASK -#define USBFS_1_DP_MASK USBFS_1_Dp__0__MASK - -#define USBFS_1_DYN_RECONFIG_ENABLE (0x01u) -#define USBFS_1_DYN_RECONFIG_EP_SHIFT (0x01u) -#define USBFS_1_DYN_RECONFIG_RDY_STS (0x10u) - - -#endif /* End CY_USBFS_USBFS_1_H */ - - -/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_Dm.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_Dm.c deleted file mode 100644 index 06f9327..0000000 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_Dm.c +++ /dev/null @@ -1,137 +0,0 @@ -/******************************************************************************* -* File Name: USBFS_1_Dm.c -* Version 1.90 -* -* Description: -* This file contains API to enable firmware control of a Pins component. -* -* Note: -* -******************************************************************************** -* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - -#include "cytypes.h" -#include "USBFS_1_Dm.h" - -/* APIs are not generated for P15[7:6] on PSoC 5 */ -#if !(CY_PSOC5A &&\ - USBFS_1_Dm__PORT == 15 && ((USBFS_1_Dm__MASK & 0xC0) != 0)) - - -/******************************************************************************* -* Function Name: USBFS_1_Dm_Write -******************************************************************************** -* -* Summary: -* Assign a new value to the digital port's data output register. -* -* Parameters: -* prtValue: The value to be assigned to the Digital Port. -* -* Return: -* None -* -*******************************************************************************/ -void USBFS_1_Dm_Write(uint8 value) -{ - uint8 staticBits = (USBFS_1_Dm_DR & (uint8)(~USBFS_1_Dm_MASK)); - USBFS_1_Dm_DR = staticBits | ((uint8)(value << USBFS_1_Dm_SHIFT) & USBFS_1_Dm_MASK); -} - - -/******************************************************************************* -* Function Name: USBFS_1_Dm_SetDriveMode -******************************************************************************** -* -* Summary: -* Change the drive mode on the pins of the port. -* -* Parameters: -* mode: Change the pins to this drive mode. -* -* Return: -* None -* -*******************************************************************************/ -void USBFS_1_Dm_SetDriveMode(uint8 mode) -{ - CyPins_SetPinDriveMode(USBFS_1_Dm_0, mode); -} - - -/******************************************************************************* -* Function Name: USBFS_1_Dm_Read -******************************************************************************** -* -* Summary: -* Read the current value on the pins of the Digital Port in right justified -* form. -* -* Parameters: -* None -* -* Return: -* Returns the current value of the Digital Port as a right justified number -* -* Note: -* Macro USBFS_1_Dm_ReadPS calls this function. -* -*******************************************************************************/ -uint8 USBFS_1_Dm_Read(void) -{ - return (USBFS_1_Dm_PS & USBFS_1_Dm_MASK) >> USBFS_1_Dm_SHIFT; -} - - -/******************************************************************************* -* Function Name: USBFS_1_Dm_ReadDataReg -******************************************************************************** -* -* Summary: -* Read the current value assigned to a Digital Port's data output register -* -* Parameters: -* None -* -* Return: -* Returns the current value assigned to the Digital Port's data output register -* -*******************************************************************************/ -uint8 USBFS_1_Dm_ReadDataReg(void) -{ - return (USBFS_1_Dm_DR & USBFS_1_Dm_MASK) >> USBFS_1_Dm_SHIFT; -} - - -/* If Interrupts Are Enabled for this Pins component */ -#if defined(USBFS_1_Dm_INTSTAT) - - /******************************************************************************* - * Function Name: USBFS_1_Dm_ClearInterrupt - ******************************************************************************** - * Summary: - * Clears any active interrupts attached to port and returns the value of the - * interrupt status register. - * - * Parameters: - * None - * - * Return: - * Returns the value of the interrupt status register - * - *******************************************************************************/ - uint8 USBFS_1_Dm_ClearInterrupt(void) - { - return (USBFS_1_Dm_INTSTAT & USBFS_1_Dm_MASK) >> USBFS_1_Dm_SHIFT; - } - -#endif /* If Interrupts Are Enabled for this Pins component */ - -#endif /* CY_PSOC5A... */ - - -/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_Dm.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_Dm.h deleted file mode 100644 index b331e92..0000000 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_Dm.h +++ /dev/null @@ -1,130 +0,0 @@ -/******************************************************************************* -* File Name: USBFS_1_Dm.h -* Version 1.90 -* -* Description: -* This file containts Control Register function prototypes and register defines -* -* Note: -* -******************************************************************************** -* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - -#if !defined(CY_PINS_USBFS_1_Dm_H) /* Pins USBFS_1_Dm_H */ -#define CY_PINS_USBFS_1_Dm_H - -#include "cytypes.h" -#include "cyfitter.h" -#include "cypins.h" -#include "USBFS_1_Dm_aliases.h" - -/* Check to see if required defines such as CY_PSOC5A are available */ -/* They are defined starting with cy_boot v3.0 */ -#if !defined (CY_PSOC5A) - #error Component cy_pins_v1_90 requires cy_boot v3.0 or later -#endif /* (CY_PSOC5A) */ - -/* APIs are not generated for P15[7:6] */ -#if !(CY_PSOC5A &&\ - USBFS_1_Dm__PORT == 15 && ((USBFS_1_Dm__MASK & 0xC0) != 0)) - - -/*************************************** -* Function Prototypes -***************************************/ - -void USBFS_1_Dm_Write(uint8 value) ; -void USBFS_1_Dm_SetDriveMode(uint8 mode) ; -uint8 USBFS_1_Dm_ReadDataReg(void) ; -uint8 USBFS_1_Dm_Read(void) ; -uint8 USBFS_1_Dm_ClearInterrupt(void) ; - - -/*************************************** -* API Constants -***************************************/ - -/* Drive Modes */ -#define USBFS_1_Dm_DM_ALG_HIZ PIN_DM_ALG_HIZ -#define USBFS_1_Dm_DM_DIG_HIZ PIN_DM_DIG_HIZ -#define USBFS_1_Dm_DM_RES_UP PIN_DM_RES_UP -#define USBFS_1_Dm_DM_RES_DWN PIN_DM_RES_DWN -#define USBFS_1_Dm_DM_OD_LO PIN_DM_OD_LO -#define USBFS_1_Dm_DM_OD_HI PIN_DM_OD_HI -#define USBFS_1_Dm_DM_STRONG PIN_DM_STRONG -#define USBFS_1_Dm_DM_RES_UPDWN PIN_DM_RES_UPDWN - -/* Digital Port Constants */ -#define USBFS_1_Dm_MASK USBFS_1_Dm__MASK -#define USBFS_1_Dm_SHIFT USBFS_1_Dm__SHIFT -#define USBFS_1_Dm_WIDTH 1u - - -/*************************************** -* Registers -***************************************/ - -/* Main Port Registers */ -/* Pin State */ -#define USBFS_1_Dm_PS (* (reg8 *) USBFS_1_Dm__PS) -/* Data Register */ -#define USBFS_1_Dm_DR (* (reg8 *) USBFS_1_Dm__DR) -/* Port Number */ -#define USBFS_1_Dm_PRT_NUM (* (reg8 *) USBFS_1_Dm__PRT) -/* Connect to Analog Globals */ -#define USBFS_1_Dm_AG (* (reg8 *) USBFS_1_Dm__AG) -/* Analog MUX bux enable */ -#define USBFS_1_Dm_AMUX (* (reg8 *) USBFS_1_Dm__AMUX) -/* Bidirectional Enable */ -#define USBFS_1_Dm_BIE (* (reg8 *) USBFS_1_Dm__BIE) -/* Bit-mask for Aliased Register Access */ -#define USBFS_1_Dm_BIT_MASK (* (reg8 *) USBFS_1_Dm__BIT_MASK) -/* Bypass Enable */ -#define USBFS_1_Dm_BYP (* (reg8 *) USBFS_1_Dm__BYP) -/* Port wide control signals */ -#define USBFS_1_Dm_CTL (* (reg8 *) USBFS_1_Dm__CTL) -/* Drive Modes */ -#define USBFS_1_Dm_DM0 (* (reg8 *) USBFS_1_Dm__DM0) -#define USBFS_1_Dm_DM1 (* (reg8 *) USBFS_1_Dm__DM1) -#define USBFS_1_Dm_DM2 (* (reg8 *) USBFS_1_Dm__DM2) -/* Input Buffer Disable Override */ -#define USBFS_1_Dm_INP_DIS (* (reg8 *) USBFS_1_Dm__INP_DIS) -/* LCD Common or Segment Drive */ -#define USBFS_1_Dm_LCD_COM_SEG (* (reg8 *) USBFS_1_Dm__LCD_COM_SEG) -/* Enable Segment LCD */ -#define USBFS_1_Dm_LCD_EN (* (reg8 *) USBFS_1_Dm__LCD_EN) -/* Slew Rate Control */ -#define USBFS_1_Dm_SLW (* (reg8 *) USBFS_1_Dm__SLW) - -/* DSI Port Registers */ -/* Global DSI Select Register */ -#define USBFS_1_Dm_PRTDSI__CAPS_SEL (* (reg8 *) USBFS_1_Dm__PRTDSI__CAPS_SEL) -/* Double Sync Enable */ -#define USBFS_1_Dm_PRTDSI__DBL_SYNC_IN (* (reg8 *) USBFS_1_Dm__PRTDSI__DBL_SYNC_IN) -/* Output Enable Select Drive Strength */ -#define USBFS_1_Dm_PRTDSI__OE_SEL0 (* (reg8 *) USBFS_1_Dm__PRTDSI__OE_SEL0) -#define USBFS_1_Dm_PRTDSI__OE_SEL1 (* (reg8 *) USBFS_1_Dm__PRTDSI__OE_SEL1) -/* Port Pin Output Select Registers */ -#define USBFS_1_Dm_PRTDSI__OUT_SEL0 (* (reg8 *) USBFS_1_Dm__PRTDSI__OUT_SEL0) -#define USBFS_1_Dm_PRTDSI__OUT_SEL1 (* (reg8 *) USBFS_1_Dm__PRTDSI__OUT_SEL1) -/* Sync Output Enable Registers */ -#define USBFS_1_Dm_PRTDSI__SYNC_OUT (* (reg8 *) USBFS_1_Dm__PRTDSI__SYNC_OUT) - - -#if defined(USBFS_1_Dm__INTSTAT) /* Interrupt Registers */ - - #define USBFS_1_Dm_INTSTAT (* (reg8 *) USBFS_1_Dm__INTSTAT) - #define USBFS_1_Dm_SNAP (* (reg8 *) USBFS_1_Dm__SNAP) - -#endif /* Interrupt Registers */ - -#endif /* CY_PSOC5A... */ - -#endif /* CY_PINS_USBFS_1_Dm_H */ - - -/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_Dm_aliases.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_Dm_aliases.h deleted file mode 100644 index c1e6145..0000000 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_Dm_aliases.h +++ /dev/null @@ -1,32 +0,0 @@ -/******************************************************************************* -* File Name: USBFS_1_Dm.h -* Version 1.90 -* -* Description: -* This file containts Control Register function prototypes and register defines -* -* Note: -* -******************************************************************************** -* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - -#if !defined(CY_PINS_USBFS_1_Dm_ALIASES_H) /* Pins USBFS_1_Dm_ALIASES_H */ -#define CY_PINS_USBFS_1_Dm_ALIASES_H - -#include "cytypes.h" -#include "cyfitter.h" - - - -/*************************************** -* Constants -***************************************/ -#define USBFS_1_Dm_0 USBFS_1_Dm__0__PC - -#endif /* End Pins USBFS_1_Dm_ALIASES_H */ - -/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_Dp.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_Dp.c deleted file mode 100644 index e805597..0000000 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_Dp.c +++ /dev/null @@ -1,137 +0,0 @@ -/******************************************************************************* -* File Name: USBFS_1_Dp.c -* Version 1.90 -* -* Description: -* This file contains API to enable firmware control of a Pins component. -* -* Note: -* -******************************************************************************** -* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - -#include "cytypes.h" -#include "USBFS_1_Dp.h" - -/* APIs are not generated for P15[7:6] on PSoC 5 */ -#if !(CY_PSOC5A &&\ - USBFS_1_Dp__PORT == 15 && ((USBFS_1_Dp__MASK & 0xC0) != 0)) - - -/******************************************************************************* -* Function Name: USBFS_1_Dp_Write -******************************************************************************** -* -* Summary: -* Assign a new value to the digital port's data output register. -* -* Parameters: -* prtValue: The value to be assigned to the Digital Port. -* -* Return: -* None -* -*******************************************************************************/ -void USBFS_1_Dp_Write(uint8 value) -{ - uint8 staticBits = (USBFS_1_Dp_DR & (uint8)(~USBFS_1_Dp_MASK)); - USBFS_1_Dp_DR = staticBits | ((uint8)(value << USBFS_1_Dp_SHIFT) & USBFS_1_Dp_MASK); -} - - -/******************************************************************************* -* Function Name: USBFS_1_Dp_SetDriveMode -******************************************************************************** -* -* Summary: -* Change the drive mode on the pins of the port. -* -* Parameters: -* mode: Change the pins to this drive mode. -* -* Return: -* None -* -*******************************************************************************/ -void USBFS_1_Dp_SetDriveMode(uint8 mode) -{ - CyPins_SetPinDriveMode(USBFS_1_Dp_0, mode); -} - - -/******************************************************************************* -* Function Name: USBFS_1_Dp_Read -******************************************************************************** -* -* Summary: -* Read the current value on the pins of the Digital Port in right justified -* form. -* -* Parameters: -* None -* -* Return: -* Returns the current value of the Digital Port as a right justified number -* -* Note: -* Macro USBFS_1_Dp_ReadPS calls this function. -* -*******************************************************************************/ -uint8 USBFS_1_Dp_Read(void) -{ - return (USBFS_1_Dp_PS & USBFS_1_Dp_MASK) >> USBFS_1_Dp_SHIFT; -} - - -/******************************************************************************* -* Function Name: USBFS_1_Dp_ReadDataReg -******************************************************************************** -* -* Summary: -* Read the current value assigned to a Digital Port's data output register -* -* Parameters: -* None -* -* Return: -* Returns the current value assigned to the Digital Port's data output register -* -*******************************************************************************/ -uint8 USBFS_1_Dp_ReadDataReg(void) -{ - return (USBFS_1_Dp_DR & USBFS_1_Dp_MASK) >> USBFS_1_Dp_SHIFT; -} - - -/* If Interrupts Are Enabled for this Pins component */ -#if defined(USBFS_1_Dp_INTSTAT) - - /******************************************************************************* - * Function Name: USBFS_1_Dp_ClearInterrupt - ******************************************************************************** - * Summary: - * Clears any active interrupts attached to port and returns the value of the - * interrupt status register. - * - * Parameters: - * None - * - * Return: - * Returns the value of the interrupt status register - * - *******************************************************************************/ - uint8 USBFS_1_Dp_ClearInterrupt(void) - { - return (USBFS_1_Dp_INTSTAT & USBFS_1_Dp_MASK) >> USBFS_1_Dp_SHIFT; - } - -#endif /* If Interrupts Are Enabled for this Pins component */ - -#endif /* CY_PSOC5A... */ - - -/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_Dp.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_Dp.h deleted file mode 100644 index bbda80a..0000000 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_Dp.h +++ /dev/null @@ -1,130 +0,0 @@ -/******************************************************************************* -* File Name: USBFS_1_Dp.h -* Version 1.90 -* -* Description: -* This file containts Control Register function prototypes and register defines -* -* Note: -* -******************************************************************************** -* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - -#if !defined(CY_PINS_USBFS_1_Dp_H) /* Pins USBFS_1_Dp_H */ -#define CY_PINS_USBFS_1_Dp_H - -#include "cytypes.h" -#include "cyfitter.h" -#include "cypins.h" -#include "USBFS_1_Dp_aliases.h" - -/* Check to see if required defines such as CY_PSOC5A are available */ -/* They are defined starting with cy_boot v3.0 */ -#if !defined (CY_PSOC5A) - #error Component cy_pins_v1_90 requires cy_boot v3.0 or later -#endif /* (CY_PSOC5A) */ - -/* APIs are not generated for P15[7:6] */ -#if !(CY_PSOC5A &&\ - USBFS_1_Dp__PORT == 15 && ((USBFS_1_Dp__MASK & 0xC0) != 0)) - - -/*************************************** -* Function Prototypes -***************************************/ - -void USBFS_1_Dp_Write(uint8 value) ; -void USBFS_1_Dp_SetDriveMode(uint8 mode) ; -uint8 USBFS_1_Dp_ReadDataReg(void) ; -uint8 USBFS_1_Dp_Read(void) ; -uint8 USBFS_1_Dp_ClearInterrupt(void) ; - - -/*************************************** -* API Constants -***************************************/ - -/* Drive Modes */ -#define USBFS_1_Dp_DM_ALG_HIZ PIN_DM_ALG_HIZ -#define USBFS_1_Dp_DM_DIG_HIZ PIN_DM_DIG_HIZ -#define USBFS_1_Dp_DM_RES_UP PIN_DM_RES_UP -#define USBFS_1_Dp_DM_RES_DWN PIN_DM_RES_DWN -#define USBFS_1_Dp_DM_OD_LO PIN_DM_OD_LO -#define USBFS_1_Dp_DM_OD_HI PIN_DM_OD_HI -#define USBFS_1_Dp_DM_STRONG PIN_DM_STRONG -#define USBFS_1_Dp_DM_RES_UPDWN PIN_DM_RES_UPDWN - -/* Digital Port Constants */ -#define USBFS_1_Dp_MASK USBFS_1_Dp__MASK -#define USBFS_1_Dp_SHIFT USBFS_1_Dp__SHIFT -#define USBFS_1_Dp_WIDTH 1u - - -/*************************************** -* Registers -***************************************/ - -/* Main Port Registers */ -/* Pin State */ -#define USBFS_1_Dp_PS (* (reg8 *) USBFS_1_Dp__PS) -/* Data Register */ -#define USBFS_1_Dp_DR (* (reg8 *) USBFS_1_Dp__DR) -/* Port Number */ -#define USBFS_1_Dp_PRT_NUM (* (reg8 *) USBFS_1_Dp__PRT) -/* Connect to Analog Globals */ -#define USBFS_1_Dp_AG (* (reg8 *) USBFS_1_Dp__AG) -/* Analog MUX bux enable */ -#define USBFS_1_Dp_AMUX (* (reg8 *) USBFS_1_Dp__AMUX) -/* Bidirectional Enable */ -#define USBFS_1_Dp_BIE (* (reg8 *) USBFS_1_Dp__BIE) -/* Bit-mask for Aliased Register Access */ -#define USBFS_1_Dp_BIT_MASK (* (reg8 *) USBFS_1_Dp__BIT_MASK) -/* Bypass Enable */ -#define USBFS_1_Dp_BYP (* (reg8 *) USBFS_1_Dp__BYP) -/* Port wide control signals */ -#define USBFS_1_Dp_CTL (* (reg8 *) USBFS_1_Dp__CTL) -/* Drive Modes */ -#define USBFS_1_Dp_DM0 (* (reg8 *) USBFS_1_Dp__DM0) -#define USBFS_1_Dp_DM1 (* (reg8 *) USBFS_1_Dp__DM1) -#define USBFS_1_Dp_DM2 (* (reg8 *) USBFS_1_Dp__DM2) -/* Input Buffer Disable Override */ -#define USBFS_1_Dp_INP_DIS (* (reg8 *) USBFS_1_Dp__INP_DIS) -/* LCD Common or Segment Drive */ -#define USBFS_1_Dp_LCD_COM_SEG (* (reg8 *) USBFS_1_Dp__LCD_COM_SEG) -/* Enable Segment LCD */ -#define USBFS_1_Dp_LCD_EN (* (reg8 *) USBFS_1_Dp__LCD_EN) -/* Slew Rate Control */ -#define USBFS_1_Dp_SLW (* (reg8 *) USBFS_1_Dp__SLW) - -/* DSI Port Registers */ -/* Global DSI Select Register */ -#define USBFS_1_Dp_PRTDSI__CAPS_SEL (* (reg8 *) USBFS_1_Dp__PRTDSI__CAPS_SEL) -/* Double Sync Enable */ -#define USBFS_1_Dp_PRTDSI__DBL_SYNC_IN (* (reg8 *) USBFS_1_Dp__PRTDSI__DBL_SYNC_IN) -/* Output Enable Select Drive Strength */ -#define USBFS_1_Dp_PRTDSI__OE_SEL0 (* (reg8 *) USBFS_1_Dp__PRTDSI__OE_SEL0) -#define USBFS_1_Dp_PRTDSI__OE_SEL1 (* (reg8 *) USBFS_1_Dp__PRTDSI__OE_SEL1) -/* Port Pin Output Select Registers */ -#define USBFS_1_Dp_PRTDSI__OUT_SEL0 (* (reg8 *) USBFS_1_Dp__PRTDSI__OUT_SEL0) -#define USBFS_1_Dp_PRTDSI__OUT_SEL1 (* (reg8 *) USBFS_1_Dp__PRTDSI__OUT_SEL1) -/* Sync Output Enable Registers */ -#define USBFS_1_Dp_PRTDSI__SYNC_OUT (* (reg8 *) USBFS_1_Dp__PRTDSI__SYNC_OUT) - - -#if defined(USBFS_1_Dp__INTSTAT) /* Interrupt Registers */ - - #define USBFS_1_Dp_INTSTAT (* (reg8 *) USBFS_1_Dp__INTSTAT) - #define USBFS_1_Dp_SNAP (* (reg8 *) USBFS_1_Dp__SNAP) - -#endif /* Interrupt Registers */ - -#endif /* CY_PSOC5A... */ - -#endif /* CY_PINS_USBFS_1_Dp_H */ - - -/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_audio.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_audio.c deleted file mode 100644 index 03db53e..0000000 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_audio.c +++ /dev/null @@ -1,318 +0,0 @@ -/******************************************************************************* -* File Name: USBFS_1_audio.c -* Version 2.60 -* -* Description: -* USB AUDIO Class request handler. -* -* Note: -* -******************************************************************************** -* Copyright 2008-2013, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - -#include "USBFS_1.h" - -#if defined(USBFS_1_ENABLE_AUDIO_CLASS) - -#include "USBFS_1_audio.h" -#include "USBFS_1_pvt.h" -#if defined(USBFS_1_ENABLE_MIDI_STREAMING) - #include "USBFS_1_midi.h" -#endif /* End USBFS_1_ENABLE_MIDI_STREAMING*/ - - -/*************************************** -* Custom Declarations -***************************************/ - -/* `#START CUSTOM_DECLARATIONS` Place your declaration here */ - -/* `#END` */ - - -#if !defined(USER_SUPPLIED_AUDIO_HANDLER) - - -/*************************************** -* AUDIO Variables -***************************************/ - -#if defined(USBFS_1_ENABLE_AUDIO_STREAMING) - volatile uint8 USBFS_1_currentSampleFrequency[USBFS_1_MAX_EP][USBFS_1_SAMPLE_FREQ_LEN]; - volatile uint8 USBFS_1_frequencyChanged; - volatile uint8 USBFS_1_currentMute; - volatile uint8 USBFS_1_currentVolume[USBFS_1_VOLUME_LEN]; - volatile uint8 USBFS_1_minimumVolume[USBFS_1_VOLUME_LEN] = {USBFS_1_VOL_MIN_LSB, - USBFS_1_VOL_MIN_MSB}; - volatile uint8 USBFS_1_maximumVolume[USBFS_1_VOLUME_LEN] = {USBFS_1_VOL_MAX_LSB, - USBFS_1_VOL_MAX_MSB}; - volatile uint8 USBFS_1_resolutionVolume[USBFS_1_VOLUME_LEN] = {USBFS_1_VOL_RES_LSB, - USBFS_1_VOL_RES_MSB}; -#endif /* End USBFS_1_ENABLE_AUDIO_STREAMING */ - - -/******************************************************************************* -* Function Name: USBFS_1_DispatchAUDIOClassRqst -******************************************************************************** -* -* Summary: -* This routine dispatches class requests -* -* Parameters: -* None. -* -* Return: -* requestHandled -* -* Global variables: -* USBFS_1_currentSampleFrequency: Contains the current audio Sample -* Frequency. It is set by the Host using SET_CUR request to the endpoint. -* USBFS_1_frequencyChanged: This variable is used as a flag for the -* user code, to be aware that Host has been sent request for changing -* Sample Frequency. Sample frequency will be sent on the next OUT -* transaction. It is contains endpoint address when set. The following -* code is recommended for detecting new Sample Frequency in main code: -* if((USBFS_1_frequencyChanged != 0) && -* (USBFS_1_transferState == USBFS_1_TRANS_STATE_IDLE)) -* { -* USBFS_1_frequencyChanged = 0; -* } -* USBFS_1_transferState variable is checked to be sure that -* transfer completes. -* USBFS_1_currentMute: Contains mute configuration set by Host. -* USBFS_1_currentVolume: Contains volume level set by Host. -* -* Reentrant: -* No. -* -*******************************************************************************/ -uint8 USBFS_1_DispatchAUDIOClassRqst(void) -{ - uint8 requestHandled = USBFS_1_FALSE; - - #if defined(USBFS_1_ENABLE_AUDIO_STREAMING) - uint8 epNumber; - epNumber = CY_GET_REG8(USBFS_1_wIndexLo) & USBFS_1_DIR_UNUSED; - #endif /* End USBFS_1_ENABLE_AUDIO_STREAMING */ - - if ((CY_GET_REG8(USBFS_1_bmRequestType) & USBFS_1_RQST_DIR_MASK) == USBFS_1_RQST_DIR_D2H) - { - /* Control Read */ - if((CY_GET_REG8(USBFS_1_bmRequestType) & USBFS_1_RQST_RCPT_MASK) == \ - USBFS_1_RQST_RCPT_EP) - { - /* Endpoint */ - switch (CY_GET_REG8(USBFS_1_bRequest)) - { - case USBFS_1_GET_CUR: - #if defined(USBFS_1_ENABLE_AUDIO_STREAMING) - if(CY_GET_REG8(USBFS_1_wValueHi) == USBFS_1_SAMPLING_FREQ_CONTROL) - { - /* Endpoint Control Selector is Sampling Frequency */ - USBFS_1_currentTD.wCount = USBFS_1_SAMPLE_FREQ_LEN; - USBFS_1_currentTD.pData = USBFS_1_currentSampleFrequency[epNumber]; - requestHandled = USBFS_1_InitControlRead(); - } - #endif /* End USBFS_1_ENABLE_AUDIO_STREAMING */ - - /* `#START AUDIO_READ_REQUESTS` Place other request handler here */ - - /* `#END` */ - break; - default: - break; - } - } - else if((CY_GET_REG8(USBFS_1_bmRequestType) & USBFS_1_RQST_RCPT_MASK) == \ - USBFS_1_RQST_RCPT_IFC) - { - /* Interface or Entity ID */ - switch (CY_GET_REG8(USBFS_1_bRequest)) - { - case USBFS_1_GET_CUR: - #if defined(USBFS_1_ENABLE_AUDIO_STREAMING) - if(CY_GET_REG8(USBFS_1_wValueHi) == USBFS_1_MUTE_CONTROL) - { - /* `#START MUTE_CONTROL_GET_REQUEST` Place multi-channel handler here */ - - /* `#END` */ - - /* Entity ID Control Selector is MUTE */ - USBFS_1_currentTD.wCount = 1u; - USBFS_1_currentTD.pData = &USBFS_1_currentMute; - requestHandled = USBFS_1_InitControlRead(); - } - else if(CY_GET_REG8(USBFS_1_wValueHi) == USBFS_1_VOLUME_CONTROL) - { - /* `#START VOLUME_CONTROL_GET_REQUEST` Place multi-channel handler here */ - - /* `#END` */ - - /* Entity ID Control Selector is VOLUME, */ - USBFS_1_currentTD.wCount = USBFS_1_VOLUME_LEN; - USBFS_1_currentTD.pData = USBFS_1_currentVolume; - requestHandled = USBFS_1_InitControlRead(); - } - else - { - /* `#START OTHER_GET_CUR_REQUESTS` Place other request handler here */ - - /* `#END` */ - } - break; - case USBFS_1_GET_MIN: /* GET_MIN */ - if(CY_GET_REG8(USBFS_1_wValueHi) == USBFS_1_VOLUME_CONTROL) - { - /* Entity ID Control Selector is VOLUME, */ - USBFS_1_currentTD.wCount = USBFS_1_VOLUME_LEN; - USBFS_1_currentTD.pData = &USBFS_1_minimumVolume[0]; - requestHandled = USBFS_1_InitControlRead(); - } - break; - case USBFS_1_GET_MAX: /* GET_MAX */ - if(CY_GET_REG8(USBFS_1_wValueHi) == USBFS_1_VOLUME_CONTROL) - { - /* Entity ID Control Selector is VOLUME, */ - USBFS_1_currentTD.wCount = USBFS_1_VOLUME_LEN; - USBFS_1_currentTD.pData = &USBFS_1_maximumVolume[0]; - requestHandled = USBFS_1_InitControlRead(); - } - break; - case USBFS_1_GET_RES: /* GET_RES */ - if(CY_GET_REG8(USBFS_1_wValueHi) == USBFS_1_VOLUME_CONTROL) - { - /* Entity ID Control Selector is VOLUME, */ - USBFS_1_currentTD.wCount = USBFS_1_VOLUME_LEN; - USBFS_1_currentTD.pData = &USBFS_1_resolutionVolume[0]; - requestHandled = USBFS_1_InitControlRead(); - } - break; - /* The contents of the status message is reserved for future use. - * For the time being, a null packet should be returned in the data stage of the - * control transfer, and the received null packet should be ACKed. - */ - case USBFS_1_GET_STAT: - USBFS_1_currentTD.wCount = 0u; - requestHandled = USBFS_1_InitControlWrite(); - - #endif /* End USBFS_1_ENABLE_AUDIO_STREAMING */ - - /* `#START AUDIO_WRITE_REQUESTS` Place other request handler here */ - - /* `#END` */ - break; - default: - break; - } - } - else - { /* USBFS_1_RQST_RCPT_OTHER */ - } - } - else if ((CY_GET_REG8(USBFS_1_bmRequestType) & USBFS_1_RQST_DIR_MASK) == \ - USBFS_1_RQST_DIR_H2D) - { - /* Control Write */ - if((CY_GET_REG8(USBFS_1_bmRequestType) & USBFS_1_RQST_RCPT_MASK) == \ - USBFS_1_RQST_RCPT_EP) - { - /* Endpoint */ - switch (CY_GET_REG8(USBFS_1_bRequest)) - { - case USBFS_1_SET_CUR: - #if defined(USBFS_1_ENABLE_AUDIO_STREAMING) - if(CY_GET_REG8(USBFS_1_wValueHi) == USBFS_1_SAMPLING_FREQ_CONTROL) - { - /* Endpoint Control Selector is Sampling Frequency */ - USBFS_1_currentTD.wCount = USBFS_1_SAMPLE_FREQ_LEN; - USBFS_1_currentTD.pData = USBFS_1_currentSampleFrequency[epNumber]; - requestHandled = USBFS_1_InitControlWrite(); - USBFS_1_frequencyChanged = epNumber; - } - #endif /* End USBFS_1_ENABLE_AUDIO_STREAMING */ - - /* `#START AUDIO_SAMPLING_FREQ_REQUESTS` Place other request handler here */ - - /* `#END` */ - break; - default: - break; - } - } - else if((CY_GET_REG8(USBFS_1_bmRequestType) & USBFS_1_RQST_RCPT_MASK) == \ - USBFS_1_RQST_RCPT_IFC) - { - /* Interface or Entity ID */ - switch (CY_GET_REG8(USBFS_1_bRequest)) - { - case USBFS_1_SET_CUR: - #if defined(USBFS_1_ENABLE_AUDIO_STREAMING) - if(CY_GET_REG8(USBFS_1_wValueHi) == USBFS_1_MUTE_CONTROL) - { - /* `#START MUTE_SET_REQUEST` Place multi-channel handler here */ - - /* `#END` */ - - /* Entity ID Control Selector is MUTE */ - USBFS_1_currentTD.wCount = 1u; - USBFS_1_currentTD.pData = &USBFS_1_currentMute; - requestHandled = USBFS_1_InitControlWrite(); - } - else if(CY_GET_REG8(USBFS_1_wValueHi) == USBFS_1_VOLUME_CONTROL) - { - /* `#START VOLUME_CONTROL_SET_REQUEST` Place multi-channel handler here */ - - /* `#END` */ - - /* Entity ID Control Selector is VOLUME */ - USBFS_1_currentTD.wCount = USBFS_1_VOLUME_LEN; - USBFS_1_currentTD.pData = USBFS_1_currentVolume; - requestHandled = USBFS_1_InitControlWrite(); - } - else - { - /* `#START OTHER_SET_CUR_REQUESTS` Place other request handler here */ - - /* `#END` */ - } - #endif /* End USBFS_1_ENABLE_AUDIO_STREAMING */ - - /* `#START AUDIO_CONTROL_SEL_REQUESTS` Place other request handler here */ - - /* `#END` */ - break; - default: - break; - } - } - else - { /* USBFS_1_RQST_RCPT_OTHER */ - } - } - else - { /* requestHandled is initialized as FALSE by default */ - } - - return(requestHandled); -} - - -#endif /* USER_SUPPLIED_AUDIO_HANDLER */ - - -/******************************************************************************* -* Additional user functions supporting AUDIO Requests -********************************************************************************/ - -/* `#START AUDIO_FUNCTIONS` Place any additional functions here */ - -/* `#END` */ - -#endif /* End USBFS_1_ENABLE_AUDIO_CLASS*/ - - -/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_audio.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_audio.h deleted file mode 100644 index 613d8c1..0000000 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_audio.h +++ /dev/null @@ -1,95 +0,0 @@ -/******************************************************************************* -* File Name: USBFS_1_audio.h -* Version 2.60 -* -* Description: -* Header File for the USFS component. Contains prototypes and constant values. -* -******************************************************************************** -* Copyright 2008-2013, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - -#if !defined(CY_USBFS_USBFS_1_audio_H) -#define CY_USBFS_USBFS_1_audio_H - -#include "cytypes.h" - - -/*************************************** -* Custom Declarations -***************************************/ - -/* `#START CUSTOM_CONSTANTS` Place your declaration here */ - -/* `#END` */ - - -/*************************************** -* Constants for USBFS_1_audio API. -***************************************/ - -/* Audio Class-Specific Request Codes (AUDIO Table A-9) */ -#define USBFS_1_REQUEST_CODE_UNDEFINED (0x00u) -#define USBFS_1_SET_CUR (0x01u) -#define USBFS_1_GET_CUR (0x81u) -#define USBFS_1_SET_MIN (0x02u) -#define USBFS_1_GET_MIN (0x82u) -#define USBFS_1_SET_MAX (0x03u) -#define USBFS_1_GET_MAX (0x83u) -#define USBFS_1_SET_RES (0x04u) -#define USBFS_1_GET_RES (0x84u) -#define USBFS_1_SET_MEM (0x05u) -#define USBFS_1_GET_MEM (0x85u) -#define USBFS_1_GET_STAT (0xFFu) - -/* Endpoint Control Selectors (AUDIO Table A-19) */ -#define USBFS_1_EP_CONTROL_UNDEFINED (0x00u) -#define USBFS_1_SAMPLING_FREQ_CONTROL (0x01u) -#define USBFS_1_PITCH_CONTROL (0x02u) - -/* Feature Unit Control Selectors (AUDIO Table A-11) */ -#define USBFS_1_FU_CONTROL_UNDEFINED (0x00u) -#define USBFS_1_MUTE_CONTROL (0x01u) -#define USBFS_1_VOLUME_CONTROL (0x02u) -#define USBFS_1_BASS_CONTROL (0x03u) -#define USBFS_1_MID_CONTROL (0x04u) -#define USBFS_1_TREBLE_CONTROL (0x05u) -#define USBFS_1_GRAPHIC_EQUALIZER_CONTROL (0x06u) -#define USBFS_1_AUTOMATIC_GAIN_CONTROL (0x07u) -#define USBFS_1_DELAY_CONTROL (0x08u) -#define USBFS_1_BASS_BOOST_CONTROL (0x09u) -#define USBFS_1_LOUDNESS_CONTROL (0x0Au) - -#define USBFS_1_SAMPLE_FREQ_LEN (3u) -#define USBFS_1_VOLUME_LEN (2u) - -#if !defined(USER_SUPPLIED_DEFAULT_VOLUME_VALUE) - #define USBFS_1_VOL_MIN_MSB (0x80u) - #define USBFS_1_VOL_MIN_LSB (0x01u) - #define USBFS_1_VOL_MAX_MSB (0x7Fu) - #define USBFS_1_VOL_MAX_LSB (0xFFu) - #define USBFS_1_VOL_RES_MSB (0x00u) - #define USBFS_1_VOL_RES_LSB (0x01u) -#endif /* USER_SUPPLIED_DEFAULT_VOLUME_VALUE */ - - -/*************************************** -* External data references -***************************************/ - -extern volatile uint8 USBFS_1_currentSampleFrequency[USBFS_1_MAX_EP] - [USBFS_1_SAMPLE_FREQ_LEN]; -extern volatile uint8 USBFS_1_frequencyChanged; -extern volatile uint8 USBFS_1_currentMute; -extern volatile uint8 USBFS_1_currentVolume[USBFS_1_VOLUME_LEN]; -extern volatile uint8 USBFS_1_minimumVolume[USBFS_1_VOLUME_LEN]; -extern volatile uint8 USBFS_1_maximumVolume[USBFS_1_VOLUME_LEN]; -extern volatile uint8 USBFS_1_resolutionVolume[USBFS_1_VOLUME_LEN]; - -#endif /* End CY_USBFS_USBFS_1_audio_H */ - - -/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_boot.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_boot.c deleted file mode 100644 index 75eea55..0000000 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_boot.c +++ /dev/null @@ -1,262 +0,0 @@ -/******************************************************************************* -* File Name: USBFS_1_boot.c -* Version 2.60 -* -* Description: -* Boot loader API for USBFS Component. -* -* Note: -* -******************************************************************************** -* Copyright 2008-2013, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - -#include "USBFS_1.h" - -#if defined(CYDEV_BOOTLOADER_IO_COMP) && ((CYDEV_BOOTLOADER_IO_COMP == CyBtldr_USBFS_1) || \ - (CYDEV_BOOTLOADER_IO_COMP == CyBtldr_Custom_Interface)) - - -/*************************************** -* Bootloader defines -***************************************/ - -#define USBFS_1_CyBtLdrStarttimer(X, T) {USBFS_1_universalTime = T * 10; X = 0u;} -#define USBFS_1_CyBtLdrChecktimer(X) ((X++ < USBFS_1_universalTime) ? 1u : 0u) - -#define USBFS_1_BTLDR_OUT_EP (0x01u) -#define USBFS_1_BTLDR_IN_EP (0x02u) - - -/*************************************** -* Bootloader Variables -***************************************/ - -static uint16 USBFS_1_universalTime; -static uint8 USBFS_1_started = 0u; - - -/******************************************************************************* -* Function Name: USBFS_1_CyBtldrCommStart -******************************************************************************** -* -* Summary: -* Starts the component and enables the interrupt. -* -* Parameters: -* None. -* -* Return: -* None. -* -* Side Effects: -* This function starts the USB with 3V or 5V operation. -* -* Reentrant: -* No. -* -*******************************************************************************/ -void USBFS_1_CyBtldrCommStart(void) -{ - CyGlobalIntEnable; /* Enable Global Interrupts */ - - /*Start USBFS Operation/device 0 and with 5V or 3V operation depend on Voltage Configuration in DWR */ - USBFS_1_Start(0u, USBFS_1_DWR_VDDD_OPERATION); - - /* USB component started, the correct enumeration will be checked in first Read operation */ - USBFS_1_started = 1u; - -} - - -/******************************************************************************* -* Function Name: USBFS_1_CyBtldrCommStop. -******************************************************************************** -* -* Summary: -* Disable the component and disable the interrupt. -* -* Parameters: -* None. -* -* Return: -* None. -* -*******************************************************************************/ -void USBFS_1_CyBtldrCommStop(void) -{ - USBFS_1_Stop(); -} - - -/******************************************************************************* -* Function Name: USBFS_1_CyBtldrCommReset. -******************************************************************************** -* -* Summary: -* Resets the receive and transmit communication Buffers. -* -* Parameters: -* None. -* -* Return: -* None. -* -* Reentrant: -* No. -* -*******************************************************************************/ -void USBFS_1_CyBtldrCommReset(void) -{ - USBFS_1_EnableOutEP(USBFS_1_BTLDR_OUT_EP); /* Enable the OUT endpoint */ -} - - -/******************************************************************************* -* Function Name: USBFS_1_CyBtldrCommWrite. -******************************************************************************** -* -* Summary: -* Allows the caller to write data to the boot loader host. The function will -* handle polling to allow a block of data to be completely sent to the host -* device. -* -* Parameters: -* pData: A pointer to the block of data to send to the device -* size: The number of bytes to write. -* count: Pointer to an unsigned short variable to write the number of -* bytes actually written. -* timeOut: Number of units to wait before returning because of a timeout. -* -* Return: -* Returns the value that best describes the problem. -* -* Reentrant: -* No. -* -*******************************************************************************/ -cystatus USBFS_1_CyBtldrCommWrite(uint8 *pData, uint16 size, uint16 *count, uint8 timeOut) CYSMALL - -{ - uint16 time; - cystatus status; - - /* Enable IN transfer */ - USBFS_1_LoadInEP(USBFS_1_BTLDR_IN_EP, pData, USBFS_1_BTLDR_SIZEOF_READ_BUFFER); - - /* Start a timer to wait on. */ - USBFS_1_CyBtLdrStarttimer(time, timeOut); - - /* Wait for the master to read it. */ - while((USBFS_1_GetEPState(USBFS_1_BTLDR_IN_EP) == USBFS_1_IN_BUFFER_FULL) && \ - USBFS_1_CyBtLdrChecktimer(time)) - { - CyDelay(1u); /* 1ms delay */ - } - - if (USBFS_1_GetEPState(USBFS_1_BTLDR_IN_EP) == USBFS_1_IN_BUFFER_FULL) - { - status = CYRET_TIMEOUT; - } - else - { - *count = size; - status = CYRET_SUCCESS; - } - - return(status); -} - - -/******************************************************************************* -* Function Name: USBFS_1_CyBtldrCommRead. -******************************************************************************** -* -* Summary: -* Allows the caller to read data from the boot loader host. The function will -* handle polling to allow a block of data to be completely received from the -* host device. -* -* Parameters: -* pData: A pointer to the area to store the block of data received -* from the device. -* size: The number of bytes to read. -* count: Pointer to an unsigned short variable to write the number -* of bytes actually read. -* timeOut: Number of units to wait before returning because of a timeOut. -* Timeout is measured in 10s of ms. -* -* Return: -* Returns the value that best describes the problem. -* -* Reentrant: -* No. -* -*******************************************************************************/ -cystatus USBFS_1_CyBtldrCommRead(uint8 *pData, uint16 size, uint16 *count, uint8 timeOut) CYSMALL - -{ - cystatus status; - uint16 time; - - if(size > USBFS_1_BTLDR_SIZEOF_WRITE_BUFFER) - { - size = USBFS_1_BTLDR_SIZEOF_WRITE_BUFFER; - } - /* Start a timer to wait on. */ - USBFS_1_CyBtLdrStarttimer(time, timeOut); - - /* Wait on enumeration in first time */ - if(USBFS_1_started) - { - /* Wait for Device to enumerate */ - while(!USBFS_1_GetConfiguration() && USBFS_1_CyBtLdrChecktimer(time)) - { - CyDelay(1u); /* 1ms delay */ - } - /* Enable first OUT, if enumeration complete */ - if(USBFS_1_GetConfiguration()) - { - USBFS_1_IsConfigurationChanged(); /* Clear configuration changes state status */ - USBFS_1_CyBtldrCommReset(); - USBFS_1_started = 0u; - } - } - else /* Check for configuration changes, has been done by Host */ - { - if(USBFS_1_IsConfigurationChanged() != 0u) /* Host could send double SET_INTERFACE request or RESET */ - { - if(USBFS_1_GetConfiguration() != 0u) /* Init OUT endpoints when device reconfigured */ - { - USBFS_1_CyBtldrCommReset(); - } - } - } - /* Wait on next packet */ - while((USBFS_1_GetEPState(USBFS_1_BTLDR_OUT_EP) != USBFS_1_OUT_BUFFER_FULL) && \ - USBFS_1_CyBtLdrChecktimer(time)) - { - CyDelay(1u); /* 1ms delay */ - } - - /* OUT EP has completed */ - if (USBFS_1_GetEPState(USBFS_1_BTLDR_OUT_EP) == USBFS_1_OUT_BUFFER_FULL) - { - *count = USBFS_1_ReadOutEP(USBFS_1_BTLDR_OUT_EP, pData, size); - status = CYRET_SUCCESS; - } - else - { - *count = 0u; - status = CYRET_TIMEOUT; - } - return(status); -} - -#endif /* End CYDEV_BOOTLOADER_IO_COMP == CyBtldr_USBFS_1 */ - - -/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_cdc.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_cdc.c deleted file mode 100644 index b498c2c..0000000 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_cdc.c +++ /dev/null @@ -1,706 +0,0 @@ -/******************************************************************************* -* File Name: USBFS_1_cdc.c -* Version 2.60 -* -* Description: -* USB HID Class request handler. -* -* Note: -* -******************************************************************************** -* Copyright 2012-2013, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - -#include "USBFS_1.h" - -#if defined(USBFS_1_ENABLE_CDC_CLASS) - -#include "USBFS_1_cdc.h" -#include "USBFS_1_pvt.h" - - -/*************************************** -* CDC Variables -***************************************/ - -volatile uint8 USBFS_1_lineCoding[USBFS_1_LINE_CODING_SIZE]; -volatile uint8 USBFS_1_lineChanged; -volatile uint16 USBFS_1_lineControlBitmap; -volatile uint8 USBFS_1_cdc_data_in_ep; -volatile uint8 USBFS_1_cdc_data_out_ep; - - -/*************************************** -* Static Function Prototypes -***************************************/ -static uint16 USBFS_1_StrLen(const char8 string[]) ; - - -/*************************************** -* Custom Declarations -***************************************/ - -/* `#START CDC_CUSTOM_DECLARATIONS` Place your declaration here */ - -/* `#END` */ - - -/******************************************************************************* -* Function Name: USBFS_1_DispatchCDCClassRqst -******************************************************************************** -* -* Summary: -* This routine dispatches CDC class requests. -* -* Parameters: -* None. -* -* Return: -* requestHandled -* -* Global variables: -* USBFS_1_lineCoding: Contains the current line coding structure. -* It is set by the Host using SET_LINE_CODING request and returned to the -* user code by the USBFS_GetDTERate(), USBFS_GetCharFormat(), -* USBFS_GetParityType(), USBFS_GetDataBits() APIs. -* USBFS_1_lineControlBitmap: Contains the current control signal -* bitmap. It is set by the Host using SET_CONTROL_LINE request and returned -* to the user code by the USBFS_GetLineControl() API. -* USBFS_1_lineChanged: This variable is used as a flag for the -* USBFS_IsLineChanged() API, to be aware that Host has been sent request -* for changing Line Coding or Control Bitmap. -* -* Reentrant: -* No. -* -*******************************************************************************/ -uint8 USBFS_1_DispatchCDCClassRqst(void) -{ - uint8 requestHandled = USBFS_1_FALSE; - - if ((CY_GET_REG8(USBFS_1_bmRequestType) & USBFS_1_RQST_DIR_MASK) == USBFS_1_RQST_DIR_D2H) - { /* Control Read */ - switch (CY_GET_REG8(USBFS_1_bRequest)) - { - case USBFS_1_CDC_GET_LINE_CODING: - USBFS_1_currentTD.count = USBFS_1_LINE_CODING_SIZE; - USBFS_1_currentTD.pData = USBFS_1_lineCoding; - requestHandled = USBFS_1_InitControlRead(); - break; - - /* `#START CDC_READ_REQUESTS` Place other request handler here */ - - /* `#END` */ - - default: /* requestHandled is initialized as FALSE by default */ - break; - } - } - else if ((CY_GET_REG8(USBFS_1_bmRequestType) & USBFS_1_RQST_DIR_MASK) == \ - USBFS_1_RQST_DIR_H2D) - { /* Control Write */ - switch (CY_GET_REG8(USBFS_1_bRequest)) - { - case USBFS_1_CDC_SET_LINE_CODING: - USBFS_1_currentTD.count = USBFS_1_LINE_CODING_SIZE; - USBFS_1_currentTD.pData = USBFS_1_lineCoding; - USBFS_1_lineChanged |= USBFS_1_LINE_CODING_CHANGED; - requestHandled = USBFS_1_InitControlWrite(); - break; - - case USBFS_1_CDC_SET_CONTROL_LINE_STATE: - USBFS_1_lineControlBitmap = CY_GET_REG8(USBFS_1_wValueLo); - USBFS_1_lineChanged |= USBFS_1_LINE_CONTROL_CHANGED; - requestHandled = USBFS_1_InitNoDataControlTransfer(); - break; - - /* `#START CDC_WRITE_REQUESTS` Place other request handler here */ - - /* `#END` */ - - default: /* requestHandled is initialized as FALSE by default */ - break; - } - } - else - { /* requestHandled is initialized as FALSE by default */ - } - - return(requestHandled); -} - - -/*************************************** -* Optional CDC APIs -***************************************/ -#if (USBFS_1_ENABLE_CDC_CLASS_API != 0u) - - - /******************************************************************************* - * Function Name: USBFS_1_CDC_Init - ******************************************************************************** - * - * Summary: - * This function initialize the CDC interface to be ready for the receive data - * from the PC. - * - * Parameters: - * None. - * - * Return: - * None. - * - * Global variables: - * USBFS_1_lineChanged: Initialized to zero. - * USBFS_1_cdc_data_out_ep: Used as an OUT endpoint number. - * - * Reentrant: - * No. - * - *******************************************************************************/ - void USBFS_1_CDC_Init(void) - { - USBFS_1_lineChanged = 0u; - USBFS_1_EnableOutEP(USBFS_1_cdc_data_out_ep); - } - - - /******************************************************************************* - * Function Name: USBFS_1_PutData - ******************************************************************************** - * - * Summary: - * Sends a specified number of bytes from the location specified by a - * pointer to the PC. - * - * Parameters: - * pData: pointer to the buffer containing data to be sent. - * length: Specifies the number of bytes to send from the pData - * buffer. Maximum length will be limited by the maximum packet - * size for the endpoint. - * - * Return: - * None. - * - * Global variables: - * USBFS_1_cdc_data_in_ep: CDC IN endpoint number used for sending - * data. - * - * Reentrant: - * No. - * - *******************************************************************************/ - void USBFS_1_PutData(const uint8* pData, uint16 length) - { - /* Limits length to maximum packet size for the EP */ - if(length > USBFS_1_EP[USBFS_1_cdc_data_in_ep].bufferSize) - { - /* Caution: Data will be lost if length is greater than Max Packet Length */ - length = USBFS_1_EP[USBFS_1_cdc_data_in_ep].bufferSize; - /* Halt CPU in debug mode */ - CYASSERT(0u != 0u); - } - USBFS_1_LoadInEP(USBFS_1_cdc_data_in_ep, pData, length); - } - - - /******************************************************************************* - * Function Name: USBFS_1_StrLen - ******************************************************************************** - * - * Summary: - * Calculates length of a null terminated string. - * - * Parameters: - * string: pointer to the string. - * - * Return: - * Length of the string - * - *******************************************************************************/ - static uint16 USBFS_1_StrLen(const char8 string[]) - { - uint16 len = 0u; - - while (string[len] != (char8)0) - { - len++; - } - - return (len); - } - - - /******************************************************************************* - * Function Name: USBFS_1_PutString - ******************************************************************************** - * - * Summary: - * Sends a null terminated string to the PC. - * - * Parameters: - * string: pointer to the string to be sent to the PC - * - * Return: - * None. - * - * Global variables: - * USBFS_1_cdc_data_in_ep: CDC IN endpoint number used for sending - * data. - * - * Reentrant: - * No. - * - * Theory: - * This function will block if there is not enough memory to place the whole - * string, it will block until the entire string has been written to the - * transmit buffer. - * - *******************************************************************************/ - void USBFS_1_PutString(const char8 string[]) - { - uint16 str_length; - uint16 send_length; - uint16 buf_index = 0u; - - /* Get length of the null terminated string */ - str_length = USBFS_1_StrLen(string); - do - { - /* Limits length to maximum packet size for the EP */ - send_length = (str_length > USBFS_1_EP[USBFS_1_cdc_data_in_ep].bufferSize) ? - USBFS_1_EP[USBFS_1_cdc_data_in_ep].bufferSize : str_length; - /* Enable IN transfer */ - USBFS_1_LoadInEP(USBFS_1_cdc_data_in_ep, (const uint8 *)&string[buf_index], send_length); - str_length -= send_length; - - /* If more data are present to send */ - if(str_length > 0u) - { - buf_index += send_length; - /* Wait for the Host to read it. */ - while(USBFS_1_EP[USBFS_1_cdc_data_in_ep].apiEpState == - USBFS_1_IN_BUFFER_FULL) - { - ; - } - } - }while(str_length > 0u); - } - - - /******************************************************************************* - * Function Name: USBFS_1_PutChar - ******************************************************************************** - * - * Summary: - * Writes a single character to the PC. - * - * Parameters: - * txDataByte: Character to be sent to the PC. - * - * Return: - * None. - * - * Global variables: - * USBFS_1_cdc_data_in_ep: CDC IN endpoint number used for sending - * data. - * - * Reentrant: - * No. - * - *******************************************************************************/ - void USBFS_1_PutChar(char8 txDataByte) - { - uint8 dataByte; - dataByte = (uint8)txDataByte; - - USBFS_1_LoadInEP(USBFS_1_cdc_data_in_ep, &dataByte, 1u); - } - - - /******************************************************************************* - * Function Name: USBFS_1_PutCRLF - ******************************************************************************** - * - * Summary: - * Sends a carriage return (0x0D) and line feed (0x0A) to the PC - * - * Parameters: - * None. - * - * Return: - * None. - * - * Global variables: - * USBFS_1_cdc_data_in_ep: CDC IN endpoint number used for sending - * data. - * - * Reentrant: - * No. - * - *******************************************************************************/ - void USBFS_1_PutCRLF(void) - { - const uint8 CYCODE txData[] = {0x0Du, 0x0Au}; - - USBFS_1_LoadInEP(USBFS_1_cdc_data_in_ep, (const uint8 *)txData, 2u); - } - - - /******************************************************************************* - * Function Name: USBFS_1_GetCount - ******************************************************************************** - * - * Summary: - * This function returns the number of bytes that were received from the PC. - * - * Parameters: - * None. - * - * Return: - * Returns the number of received bytes. - * - * Global variables: - * USBFS_1_cdc_data_out_ep: CDC OUT endpoint number used. - * - *******************************************************************************/ - uint16 USBFS_1_GetCount(void) - { - uint16 bytesCount = 0u; - - if (USBFS_1_EP[USBFS_1_cdc_data_out_ep].apiEpState == USBFS_1_OUT_BUFFER_FULL) - { - bytesCount = USBFS_1_GetEPCount(USBFS_1_cdc_data_out_ep); - } - - return(bytesCount); - } - - - /******************************************************************************* - * Function Name: USBFS_1_DataIsReady - ******************************************************************************** - * - * Summary: - * Returns a nonzero value if the component received data or received - * zero-length packet. The GetAll() or GetData() API should be called to read - * data from the buffer and re-init OUT endpoint even when zero-length packet - * received. - * - * Parameters: - * None. - * - * Return: - * If the OUT packet received this function returns a nonzero value. - * Otherwise zero is returned. - * - * Global variables: - * USBFS_1_cdc_data_out_ep: CDC OUT endpoint number used. - * - *******************************************************************************/ - uint8 USBFS_1_DataIsReady(void) - { - return(USBFS_1_EP[USBFS_1_cdc_data_out_ep].apiEpState); - } - - - /******************************************************************************* - * Function Name: USBFS_1_CDCIsReady - ******************************************************************************** - * - * Summary: - * Returns a nonzero value if the component is ready to send more data to the - * PC. Otherwise returns zero. Should be called before sending new data to - * ensure the previous data has finished sending.This function returns the - * number of bytes that were received from the PC. - * - * Parameters: - * None. - * - * Return: - * If the buffer can accept new data then this function returns a nonzero value. - * Otherwise zero is returned. - * - * Global variables: - * USBFS_1_cdc_data_in_ep: CDC IN endpoint number used. - * - *******************************************************************************/ - uint8 USBFS_1_CDCIsReady(void) - { - return(USBFS_1_EP[USBFS_1_cdc_data_in_ep].apiEpState); - } - - - /******************************************************************************* - * Function Name: USBFS_1_GetData - ******************************************************************************** - * - * Summary: - * Gets a specified number of bytes from the input buffer and places it in a - * data array specified by the passed pointer. - * USBFS_1_DataIsReady() API should be called before, to be sure - * that data is received from the Host. - * - * Parameters: - * pData: Pointer to the data array where data will be placed. - * Length: Number of bytes to read into the data array from the RX buffer. - * Maximum length is limited by the the number of received bytes. - * - * Return: - * Number of bytes received. - * - * Global variables: - * USBFS_1_cdc_data_out_ep: CDC OUT endpoint number used. - * - * Reentrant: - * No. - * - *******************************************************************************/ - uint16 USBFS_1_GetData(uint8* pData, uint16 length) - { - return(USBFS_1_ReadOutEP(USBFS_1_cdc_data_out_ep, pData, length)); - } - - - /******************************************************************************* - * Function Name: USBFS_1_GetAll - ******************************************************************************** - * - * Summary: - * Gets all bytes of received data from the input buffer and places it into a - * specified data array. USBFS_1_DataIsReady() API should be called - * before, to be sure that data is received from the Host. - * - * Parameters: - * pData: Pointer to the data array where data will be placed. - * - * Return: - * Number of bytes received. - * - * Global variables: - * USBFS_1_cdc_data_out_ep: CDC OUT endpoint number used. - * USBFS_1_EP[].bufferSize: EP max packet size is used as a length - * to read all data from the EP buffer. - * - * Reentrant: - * No. - * - *******************************************************************************/ - uint16 USBFS_1_GetAll(uint8* pData) - { - return (USBFS_1_ReadOutEP(USBFS_1_cdc_data_out_ep, pData, - USBFS_1_EP[USBFS_1_cdc_data_out_ep].bufferSize)); - } - - - /******************************************************************************* - * Function Name: USBFS_1_GetChar - ******************************************************************************** - * - * Summary: - * Reads one byte of received data from the buffer. - * - * Parameters: - * None. - * - * Return: - * Received one character. - * - * Global variables: - * USBFS_1_cdc_data_out_ep: CDC OUT endpoint number used. - * - * Reentrant: - * No. - * - *******************************************************************************/ - uint8 USBFS_1_GetChar(void) - { - uint8 rxData; - - (void) USBFS_1_ReadOutEP(USBFS_1_cdc_data_out_ep, &rxData, 1u); - - return(rxData); - } - - /******************************************************************************* - * Function Name: USBFS_1_IsLineChanged - ******************************************************************************** - * - * Summary: - * This function returns clear on read status of the line. - * - * Parameters: - * None. - * - * Return: - * If SET_LINE_CODING or CDC_SET_CONTROL_LINE_STATE request received then not - * zero value returned. Otherwise zero is returned. - * - * Global variables: - * USBFS_1_transferState - it is checked to be sure then OUT data - * phase has been complete, and data written to the lineCoding or Control - * Bitmap buffer. - * USBFS_1_lineChanged: used as a flag to be aware that Host has been - * sent request for changing Line Coding or Control Bitmap. - * - *******************************************************************************/ - uint8 USBFS_1_IsLineChanged(void) - { - uint8 state = 0u; - - /* transferState is checked to be sure then OUT data phase has been complete */ - if(USBFS_1_transferState == USBFS_1_TRANS_STATE_IDLE) - { - if(USBFS_1_lineChanged != 0u) - { - state = USBFS_1_lineChanged; - USBFS_1_lineChanged = 0u; - } - } - - return(state); - } - - - /******************************************************************************* - * Function Name: USBFS_1_GetDTERate - ******************************************************************************** - * - * Summary: - * Returns the data terminal rate set for this port in bits per second. - * - * Parameters: - * None. - * - * Return: - * Returns a uint32 value of the data rate in bits per second. - * - * Global variables: - * USBFS_1_lineCoding: First four bytes converted to uint32 - * depend on compiler, and returned as a data rate. - * - *******************************************************************************/ - uint32 USBFS_1_GetDTERate(void) - { - uint32 rate; - - rate = USBFS_1_lineCoding[USBFS_1_LINE_CODING_RATE + 3u]; - rate = (rate << 8u) | USBFS_1_lineCoding[USBFS_1_LINE_CODING_RATE + 2u]; - rate = (rate << 8u) | USBFS_1_lineCoding[USBFS_1_LINE_CODING_RATE + 1u]; - rate = (rate << 8u) | USBFS_1_lineCoding[USBFS_1_LINE_CODING_RATE]; - - return(rate); - } - - - /******************************************************************************* - * Function Name: USBFS_1_GetCharFormat - ******************************************************************************** - * - * Summary: - * Returns the number of stop bits. - * - * Parameters: - * None. - * - * Return: - * Returns the number of stop bits. - * - * Global variables: - * USBFS_1_lineCoding: used to get a parameter. - * - *******************************************************************************/ - uint8 USBFS_1_GetCharFormat(void) - { - return(USBFS_1_lineCoding[USBFS_1_LINE_CODING_STOP_BITS]); - } - - - /******************************************************************************* - * Function Name: USBFS_1_GetParityType - ******************************************************************************** - * - * Summary: - * Returns the parity type for the CDC port. - * - * Parameters: - * None. - * - * Return: - * Returns the parity type. - * - * Global variables: - * USBFS_1_lineCoding: used to get a parameter. - * - *******************************************************************************/ - uint8 USBFS_1_GetParityType(void) - { - return(USBFS_1_lineCoding[USBFS_1_LINE_CODING_PARITY]); - } - - - /******************************************************************************* - * Function Name: USBFS_1_GetDataBits - ******************************************************************************** - * - * Summary: - * Returns the number of data bits for the CDC port. - * - * Parameters: - * None. - * - * Return: - * Returns the number of data bits. - * The number of data bits can be 5, 6, 7, 8 or 16. - * - * Global variables: - * USBFS_1_lineCoding: used to get a parameter. - * - *******************************************************************************/ - uint8 USBFS_1_GetDataBits(void) - { - return(USBFS_1_lineCoding[USBFS_1_LINE_CODING_DATA_BITS]); - } - - - /******************************************************************************* - * Function Name: USBFS_1_GetLineControl - ******************************************************************************** - * - * Summary: - * Returns Line control bitmap. - * - * Parameters: - * None. - * - * Return: - * Returns Line control bitmap. - * - * Global variables: - * USBFS_1_lineControlBitmap: used to get a parameter. - * - *******************************************************************************/ - uint16 USBFS_1_GetLineControl(void) - { - return(USBFS_1_lineControlBitmap); - } - -#endif /* End USBFS_1_ENABLE_CDC_CLASS_API*/ - - -/******************************************************************************* -* Additional user functions supporting CDC Requests -********************************************************************************/ - -/* `#START CDC_FUNCTIONS` Place any additional functions here */ - -/* `#END` */ - -#endif /* End USBFS_1_ENABLE_CDC_CLASS*/ - - -/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_cdc.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_cdc.h deleted file mode 100644 index 93bbc15..0000000 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_cdc.h +++ /dev/null @@ -1,92 +0,0 @@ -/******************************************************************************* -* File Name: USBFS_1_cdc.h -* Version 2.60 -* -* Description: -* Header File for the USFS component. -* Contains CDC class prototypes and constant values. -* -******************************************************************************** -* Copyright 2012-2013, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - -#if !defined(CY_USBFS_USBFS_1_cdc_H) -#define CY_USBFS_USBFS_1_cdc_H - -#include "cytypes.h" - - -/*************************************** -* Prototypes of the USBFS_1_cdc API. -***************************************/ - -#if (USBFS_1_ENABLE_CDC_CLASS_API != 0u) - void USBFS_1_CDC_Init(void) ; - void USBFS_1_PutData(const uint8* pData, uint16 length) ; - void USBFS_1_PutString(const char8 string[]) ; - void USBFS_1_PutChar(char8 txDataByte) ; - void USBFS_1_PutCRLF(void) ; - uint16 USBFS_1_GetCount(void) ; - uint8 USBFS_1_CDCIsReady(void) ; - uint8 USBFS_1_DataIsReady(void) ; - uint16 USBFS_1_GetData(uint8* pData, uint16 length) ; - uint16 USBFS_1_GetAll(uint8* pData) ; - uint8 USBFS_1_GetChar(void) ; - uint8 USBFS_1_IsLineChanged(void) ; - uint32 USBFS_1_GetDTERate(void) ; - uint8 USBFS_1_GetCharFormat(void) ; - uint8 USBFS_1_GetParityType(void) ; - uint8 USBFS_1_GetDataBits(void) ; - uint16 USBFS_1_GetLineControl(void) ; -#endif /* End USBFS_1_ENABLE_CDC_CLASS_API*/ - - -/*************************************** -* Constants for USBFS_1_cdc API. -***************************************/ - -/* CDC Class-Specific Request Codes (CDC ver 1.2 Table 19) */ -#define USBFS_1_CDC_SET_LINE_CODING (0x20u) -#define USBFS_1_CDC_GET_LINE_CODING (0x21u) -#define USBFS_1_CDC_SET_CONTROL_LINE_STATE (0x22u) - -#define USBFS_1_LINE_CODING_CHANGED (0x01u) -#define USBFS_1_LINE_CONTROL_CHANGED (0x02u) - -#define USBFS_1_1_STOPBIT (0x00u) -#define USBFS_1_1_5_STOPBITS (0x01u) -#define USBFS_1_2_STOPBITS (0x02u) - -#define USBFS_1_PARITY_NONE (0x00u) -#define USBFS_1_PARITY_ODD (0x01u) -#define USBFS_1_PARITY_EVEN (0x02u) -#define USBFS_1_PARITY_MARK (0x03u) -#define USBFS_1_PARITY_SPACE (0x04u) - -#define USBFS_1_LINE_CODING_SIZE (0x07u) -#define USBFS_1_LINE_CODING_RATE (0x00u) -#define USBFS_1_LINE_CODING_STOP_BITS (0x04u) -#define USBFS_1_LINE_CODING_PARITY (0x05u) -#define USBFS_1_LINE_CODING_DATA_BITS (0x06u) - -#define USBFS_1_LINE_CONTROL_DTR (0x01u) -#define USBFS_1_LINE_CONTROL_RTS (0x02u) - - -/*************************************** -* External data references -***************************************/ - -extern volatile uint8 USBFS_1_lineCoding[USBFS_1_LINE_CODING_SIZE]; -extern volatile uint8 USBFS_1_lineChanged; -extern volatile uint16 USBFS_1_lineControlBitmap; -extern volatile uint8 USBFS_1_cdc_data_in_ep; -extern volatile uint8 USBFS_1_cdc_data_out_ep; - -#endif /* End CY_USBFS_USBFS_1_cdc_H */ - - -/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_cdc.inf b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_cdc.inf deleted file mode 100644 index 9515243..0000000 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_cdc.inf +++ /dev/null @@ -1,122 +0,0 @@ -;****************************************************************************** -; File Name: USBFS_1_cdc.inf -; Version 2.60 -; -; Description: -; Windows USB CDC setup file for USBUART Device. -; -;****************************************************************************** -; Copyright 2007-2013, Cypress Semiconductor Corporation. All rights reserved. -; You may use this file only in accordance with the license, terms, conditions, -; disclaimers, and limitations in the end user license agreement accompanying -; the software package with which this file was provided. -;****************************************************************************** - -[Version] -Signature="$Windows NT$" -Class=Ports -ClassGuid={4D36E978-E325-11CE-BFC1-08002BE10318} -Provider=%PROVIDER% -LayoutFile=layout.inf -DriverVer=03/05/2007,2.0.0000.0 - -[Manufacturer] -%MFGNAME%=DeviceList, NTx86, NTia64, NTamd64 - -[DestinationDirs] -DefaultDestDir=12 - -[SourceDisksFiles] - -[SourceDisksNames] - -[DeviceList.NTx86] -%DESCRIPTION%=DriverInstall, USB\VID_04B4&PID_F232 - -[DeviceList.NTia64] -%DESCRIPTION%=DriverInstall, USB\VID_04B4&PID_F232 - -[DeviceList.NTamd64] -%DESCRIPTION%=DriverInstall, USB\VID_04B4&PID_F232 - - -;------------------------------------------------------------------------------ -; 32 bit section for Windows 2000/2003/XP/Vista -;------------------------------------------------------------------------------ - -[DriverInstall.NTx86] -include=mdmcpq.inf -CopyFiles=DriverCopyFiles -AddReg=DriverInstall.NTx86.AddReg - -[DriverCopyFiles] -usbser.sys,,,0x20 - -[DriverInstall.NTx86.AddReg] -HKR,,DevLoader,,*ntkern -HKR,,NTMPDriver,,usbser.sys -HKR,,EnumPropPages32,,"MsPorts.dll,SerialPortPropPageProvider" - -[DriverInstall.NTx86.Services] -AddService=usbser, 0x00000002, DriverService - -;------------------------------------------------------------------------------ -; 64 bit section for Intel Itanium based systems -;------------------------------------------------------------------------------ - -[DriverInstall.NTia64] -include=mdmcpq.inf -CopyFiles=DriverCopyFiles -AddReg=DriverInstall.NTia64.AddReg - -[DriverCopyFiles] -usbser.sys,,,0x20 - -[DriverInstall.NTia64.AddReg] -HKR,,DevLoader,,*ntkern -HKR,,NTMPDriver,,usbser.sys -HKR,,EnumPropPages32,,"MsPorts.dll,SerialPortPropPageProvider" - -[DriverInstall.NTia64.Services] -AddService=usbser, 0x00000002, DriverService - -;------------------------------------------------------------------------------ -; 64 bit section for AMD64 and Intel EM64T based systems -;------------------------------------------------------------------------------ - -[DriverInstall.NTamd64] -include=mdmcpq.inf -CopyFiles=DriverCopyFiles -AddReg=DriverInstall.NTamd64.AddReg - -[DriverCopyFiles] -usbser.sys,,,0x20 - -[DriverInstall.NTamd64.AddReg] -HKR,,DevLoader,,*ntkern -HKR,,NTMPDriver,,usbser.sys -HKR,,EnumPropPages32,,"MsPorts.dll,SerialPortPropPageProvider" - -[DriverInstall.NTamd64.Services] -AddService=usbser, 0x00000002, DriverService - -;------------------------------------------------------------------------------ -; -;------------------------------------------------------------------------------ - -[DriverService] -DisplayName=%SERVICE% -ServiceType=1 -StartType=3 -ErrorControl=1 -ServiceBinary=%12%\usbser.sys - -;------------------------------------------------------------------------------ -; String Definitions -;------------------------------------------------------------------------------ - -[Strings] -PROVIDER="Cypress" -MFGNAME="Cypress Semiconductor Corporation" -DESCRIPTION="Cypress USB UART" -SERVICE="USB UART" diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_cls.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_cls.c deleted file mode 100644 index 26800c5..0000000 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_cls.c +++ /dev/null @@ -1,107 +0,0 @@ -/******************************************************************************* -* File Name: USBFS_1_cls.c -* Version 2.60 -* -* Description: -* USB Class request handler. -* -* Note: -* -******************************************************************************** -* Copyright 2008-2013, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - -#include "USBFS_1.h" - -#if(USBFS_1_EXTERN_CLS == USBFS_1_FALSE) - -#include "USBFS_1_pvt.h" - - -/*************************************** -* User Implemented Class Driver Declarations. -***************************************/ -/* `#START USER_DEFINED_CLASS_DECLARATIONS` Place your declaration here */ - -/* `#END` */ - - -/******************************************************************************* -* Function Name: USBFS_1_DispatchClassRqst -******************************************************************************** -* Summary: -* This routine dispatches class specific requests depend on interface class. -* -* Parameters: -* None. -* -* Return: -* requestHandled. -* -* Reentrant: -* No. -* -*******************************************************************************/ -uint8 USBFS_1_DispatchClassRqst(void) -{ - uint8 requestHandled = USBFS_1_FALSE; - uint8 interfaceNumber = 0u; - - switch(CY_GET_REG8(USBFS_1_bmRequestType) & USBFS_1_RQST_RCPT_MASK) - { - case USBFS_1_RQST_RCPT_IFC: /* Class-specific request directed to an interface */ - interfaceNumber = CY_GET_REG8(USBFS_1_wIndexLo); /* wIndexLo contain Interface number */ - break; - case USBFS_1_RQST_RCPT_EP: /* Class-specific request directed to the endpoint */ - /* Find related interface to the endpoint, wIndexLo contain EP number */ - interfaceNumber = - USBFS_1_EP[CY_GET_REG8(USBFS_1_wIndexLo) & USBFS_1_DIR_UNUSED].interface; - break; - default: /* RequestHandled is initialized as FALSE by default */ - break; - } - /* Handle Class request depend on interface type */ - switch(USBFS_1_interfaceClass[interfaceNumber]) - { - case USBFS_1_CLASS_HID: - #if defined(USBFS_1_ENABLE_HID_CLASS) - requestHandled = USBFS_1_DispatchHIDClassRqst(); - #endif /* USBFS_1_ENABLE_HID_CLASS */ - break; - case USBFS_1_CLASS_AUDIO: - #if defined(USBFS_1_ENABLE_AUDIO_CLASS) - requestHandled = USBFS_1_DispatchAUDIOClassRqst(); - #endif /* USBFS_1_ENABLE_HID_CLASS */ - break; - case USBFS_1_CLASS_CDC: - #if defined(USBFS_1_ENABLE_CDC_CLASS) - requestHandled = USBFS_1_DispatchCDCClassRqst(); - #endif /* USBFS_1_ENABLE_CDC_CLASS */ - break; - default: /* requestHandled is initialized as FALSE by default */ - break; - } - - /* `#START USER_DEFINED_CLASS_CODE` Place your Class request here */ - - /* `#END` */ - - return(requestHandled); -} - - -/******************************************************************************* -* Additional user functions supporting Class Specific Requests -********************************************************************************/ - -/* `#START CLASS_SPECIFIC_FUNCTIONS` Place any additional functions here */ - -/* `#END` */ - -#endif /* USBFS_1_EXTERN_CLS */ - - -/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_descr.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_descr.c deleted file mode 100644 index 2469573..0000000 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_descr.c +++ /dev/null @@ -1,180 +0,0 @@ -/******************************************************************************* -* File Name: USBFS_1_descr.c -* Version 2.60 -* -* Description: -* USB descriptors and storage. -* -* Note: -* -******************************************************************************** -* Copyright 2008-2013, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - -#include "USBFS_1.h" -#include "USBFS_1_pvt.h" - - -/***************************************************************************** -* User supplied descriptors. If you want to specify your own descriptors, -* remove the comments around the define USER_SUPPLIED_DESCRIPTORS below and -* add your descriptors. -*****************************************************************************/ -/* `#START USER_DESCRIPTORS_DECLARATIONS` Place your declaration here */ - -/* `#END` */ - - -/*************************************** -* USB Customizer Generated Descriptors -***************************************/ - -#if !defined(USER_SUPPLIED_DESCRIPTORS) -/********************************************************************* -* Device Descriptors -*********************************************************************/ -const uint8 CYCODE USBFS_1_DEVICE0_DESCR[18u] = { -/* Descriptor Length */ 0x12u, -/* DescriptorType: DEVICE */ 0x01u, -/* bcdUSB (ver 2.0) */ 0x00u, 0x02u, -/* bDeviceClass */ 0x00u, -/* bDeviceSubClass */ 0x00u, -/* bDeviceProtocol */ 0x00u, -/* bMaxPacketSize0 */ 0x08u, -/* idVendor */ 0xB4u, 0x04u, -/* idProduct */ 0x51u, 0x80u, -/* bcdDevice */ 0x00u, 0x00u, -/* iManufacturer */ 0x00u, -/* iProduct */ 0x00u, -/* iSerialNumber */ 0x00u, -/* bNumConfigurations */ 0x01u -}; -/********************************************************************* -* Config Descriptor -*********************************************************************/ -const uint8 CYCODE USBFS_1_DEVICE0_CONFIGURATION0_DESCR[25u] = { -/* Config Descriptor Length */ 0x09u, -/* DescriptorType: CONFIG */ 0x02u, -/* wTotalLength */ 0x19u, 0x00u, -/* bNumInterfaces */ 0x01u, -/* bConfigurationValue */ 0x01u, -/* iConfiguration */ 0x00u, -/* bmAttributes */ 0xC0u, -/* bMaxPower */ 0x00u, -/********************************************************************* -* Interface Descriptor -*********************************************************************/ -/* Interface Descriptor Length */ 0x09u, -/* DescriptorType: INTERFACE */ 0x04u, -/* bInterfaceNumber */ 0x00u, -/* bAlternateSetting */ 0x00u, -/* bNumEndpoints */ 0x01u, -/* bInterfaceClass */ 0x00u, -/* bInterfaceSubClass */ 0x00u, -/* bInterfaceProtocol */ 0x00u, -/* iInterface */ 0x00u, -/********************************************************************* -* Endpoint Descriptor -*********************************************************************/ -/* Endpoint Descriptor Length */ 0x07u, -/* DescriptorType: ENDPOINT */ 0x05u, -/* bEndpointAddress */ 0x01u, -/* bmAttributes */ 0x02u, -/* wMaxPacketSize */ 0x08u, 0x00u, -/* bInterval */ 0x0Au -}; - - - - - -/********************************************************************* -* Endpoint Setting Table -- This table contain the endpoint setting -* for each endpoint in the configuration. It -* contains the necessary information to -* configure the endpoint hardware for each -* interface and alternate setting. -*********************************************************************/ -const T_USBFS_1_EP_SETTINGS_BLOCK CYCODE USBFS_1_DEVICE0_CONFIGURATION0_EP_SETTINGS_TABLE[1u] = { -/* IFC ALT EPAddr bmAttr MaxPktSize Class ********************/ -{0x00u, 0x00u, 0x01u, 0x02u, 0x0008u, 0x00u} -}; -const uint8 CYCODE USBFS_1_DEVICE0_CONFIGURATION0_INTERFACE_CLASS[1u] = { -0x00u -}; -/********************************************************************* -* Config Dispatch Table -- Points to the Config Descriptor and each of -* and endpoint setup table and to each -* interface table if it specifies a USB Class -*********************************************************************/ -const T_USBFS_1_LUT CYCODE USBFS_1_DEVICE0_CONFIGURATION0_TABLE[4u] = { - {0x01u, &USBFS_1_DEVICE0_CONFIGURATION0_DESCR}, - {0x01u, &USBFS_1_DEVICE0_CONFIGURATION0_EP_SETTINGS_TABLE}, - {0x00u, NULL}, - {0x00u, &USBFS_1_DEVICE0_CONFIGURATION0_INTERFACE_CLASS} -}; -/********************************************************************* -* Device Dispatch Table -- Points to the Device Descriptor and each of -* and Configuration Tables for this Device -*********************************************************************/ -const T_USBFS_1_LUT CYCODE USBFS_1_DEVICE0_TABLE[2u] = { - {0x01u, &USBFS_1_DEVICE0_DESCR}, - {0x01u, &USBFS_1_DEVICE0_CONFIGURATION0_TABLE} -}; -/********************************************************************* -* Device Table -- Indexed by the device number. -*********************************************************************/ -const T_USBFS_1_LUT CYCODE USBFS_1_TABLE[1u] = { - {0x01u, &USBFS_1_DEVICE0_TABLE} -}; - -#endif /* USER_SUPPLIED_DESCRIPTORS */ - -#if defined(USBFS_1_ENABLE_MSOS_STRING) - - /****************************************************************************** - * USB Microsoft OS String Descriptor - * "MSFT" identifies a Microsoft host - * "100" specifies version 1.00 - * USBFS_1_GET_EXTENDED_CONFIG_DESCRIPTOR becomes the bRequest value - * in a host vendor device/class request - ******************************************************************************/ - - const uint8 CYCODE USBFS_1_MSOS_DESCRIPTOR[USBFS_1_MSOS_DESCRIPTOR_LENGTH] = { - /* Descriptor Length */ 0x12u, - /* DescriptorType: STRING */ 0x03u, - /* qwSignature - "MSFT100" */ (uint8)'M', 0u, (uint8)'S', 0u, (uint8)'F', 0u, (uint8)'T', 0u, - (uint8)'1', 0u, (uint8)'0', 0u, (uint8)'0', 0u, - /* bMS_VendorCode: */ USBFS_1_GET_EXTENDED_CONFIG_DESCRIPTOR, - /* bPad */ 0x00u - }; - - /* Extended Configuration Descriptor */ - - const uint8 CYCODE USBFS_1_MSOS_CONFIGURATION_DESCR[USBFS_1_MSOS_CONF_DESCR_LENGTH] = { - /* Length of the descriptor 4 bytes */ 0x28u, 0x00u, 0x00u, 0x00u, - /* Version of the descriptor 2 bytes */ 0x00u, 0x01u, - /* wIndex - Fixed:INDEX_CONFIG_DESCRIPTOR */ 0x04u, 0x00u, - /* bCount - Count of device functions. */ 0x01u, - /* Reserved : 7 bytes */ 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, - /* bFirstInterfaceNumber */ 0x00u, - /* Reserved */ 0x01u, - /* compatibleID - "CYUSB\0\0" */ (uint8)'C', (uint8)'Y', (uint8)'U', (uint8)'S', (uint8)'B', - 0x00u, 0x00u, 0x00u, - /* subcompatibleID - "00001\0\0" */ (uint8)'0', (uint8)'0', (uint8)'0', (uint8)'0', (uint8)'1', - 0x00u, 0x00u, 0x00u, - /* Reserved : 6 bytes */ 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u - }; - -#endif /* USBFS_1_ENABLE_MSOS_STRING */ - -/* DIE ID string descriptor for 8 bytes ID */ -#if defined(USBFS_1_ENABLE_IDSN_STRING) - uint8 USBFS_1_idSerialNumberStringDescriptor[USBFS_1_IDSN_DESCR_LENGTH]; -#endif /* USBFS_1_ENABLE_IDSN_STRING */ - - -/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_drv.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_drv.c deleted file mode 100644 index 282d1d1..0000000 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_drv.c +++ /dev/null @@ -1,781 +0,0 @@ -/******************************************************************************* -* File Name: USBFS_1_drv.c -* Version 2.60 -* -* Description: -* Endpoint 0 Driver for the USBFS Component. -* -* Note: -* -******************************************************************************** -* Copyright 2008-2013, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - -#include "USBFS_1.h" -#include "USBFS_1_pvt.h" - - -/*************************************** -* Global data allocation -***************************************/ - -volatile T_USBFS_1_EP_CTL_BLOCK USBFS_1_EP[USBFS_1_MAX_EP]; -volatile uint8 USBFS_1_configuration; -volatile uint8 USBFS_1_interfaceNumber; -volatile uint8 USBFS_1_configurationChanged; -volatile uint8 USBFS_1_deviceAddress; -volatile uint8 USBFS_1_deviceStatus; -volatile uint8 USBFS_1_interfaceSetting[USBFS_1_MAX_INTERFACES_NUMBER]; -volatile uint8 USBFS_1_interfaceSetting_last[USBFS_1_MAX_INTERFACES_NUMBER]; -volatile uint8 USBFS_1_interfaceStatus[USBFS_1_MAX_INTERFACES_NUMBER]; -volatile uint8 USBFS_1_device; -const uint8 CYCODE *USBFS_1_interfaceClass; - - -/*************************************** -* Local data allocation -***************************************/ - -volatile uint8 USBFS_1_ep0Toggle; -volatile uint8 USBFS_1_lastPacketSize; -volatile uint8 USBFS_1_transferState; -volatile T_USBFS_1_TD USBFS_1_currentTD; -volatile uint8 USBFS_1_ep0Mode; -volatile uint8 USBFS_1_ep0Count; -volatile uint16 USBFS_1_transferByteCount; - - -/******************************************************************************* -* Function Name: USBFS_1_ep_0_Interrupt -******************************************************************************** -* -* Summary: -* This Interrupt Service Routine handles Endpoint 0 (Control Pipe) traffic. -* It dispatches setup requests and handles the data and status stages. -* -* Parameters: -* None. -* -* Return: -* None. -* -*******************************************************************************/ -CY_ISR(USBFS_1_EP_0_ISR) -{ - uint8 bRegTemp; - uint8 modifyReg; - - - bRegTemp = CY_GET_REG8(USBFS_1_EP0_CR_PTR); - if ((bRegTemp & USBFS_1_MODE_ACKD) != 0u) - { - modifyReg = 1u; - if ((bRegTemp & USBFS_1_MODE_SETUP_RCVD) != 0u) - { - if((bRegTemp & USBFS_1_MODE_MASK) != USBFS_1_MODE_NAK_IN_OUT) - { - modifyReg = 0u; /* When mode not NAK_IN_OUT => invalid setup */ - } - else - { - USBFS_1_HandleSetup(); - if((USBFS_1_ep0Mode & USBFS_1_MODE_SETUP_RCVD) != 0u) - { - modifyReg = 0u; /* if SETUP bit set -> exit without modifying the mode */ - } - - } - } - else if ((bRegTemp & USBFS_1_MODE_IN_RCVD) != 0u) - { - USBFS_1_HandleIN(); - } - else if ((bRegTemp & USBFS_1_MODE_OUT_RCVD) != 0u) - { - USBFS_1_HandleOUT(); - } - else - { - modifyReg = 0u; - } - if(modifyReg != 0u) - { - bRegTemp = CY_GET_REG8(USBFS_1_EP0_CR_PTR); /* unlock registers */ - if((bRegTemp & USBFS_1_MODE_SETUP_RCVD) == 0u) /* Check if SETUP bit is not set, otherwise exit */ - { - /* Update the count register */ - bRegTemp = USBFS_1_ep0Toggle | USBFS_1_ep0Count; - CY_SET_REG8(USBFS_1_EP0_CNT_PTR, bRegTemp); - if(bRegTemp == CY_GET_REG8(USBFS_1_EP0_CNT_PTR)) /* continue if writing was successful */ - { - do - { - modifyReg = USBFS_1_ep0Mode; /* Init temporary variable */ - /* Unlock registers */ - bRegTemp = CY_GET_REG8(USBFS_1_EP0_CR_PTR) & USBFS_1_MODE_SETUP_RCVD; - if(bRegTemp == 0u) /* Check if SETUP bit is not set */ - { - /* Set the Mode Register */ - CY_SET_REG8(USBFS_1_EP0_CR_PTR, USBFS_1_ep0Mode); - /* Writing check */ - modifyReg = CY_GET_REG8(USBFS_1_EP0_CR_PTR) & USBFS_1_MODE_MASK; - } - }while(modifyReg != USBFS_1_ep0Mode); /* Repeat if writing was not successful */ - } - } - } - } -} - - -/******************************************************************************* -* Function Name: USBFS_1_HandleSetup -******************************************************************************** -* -* Summary: -* This Routine dispatches requests for the four USB request types -* -* Parameters: -* None. -* -* Return: -* None. -* -* Reentrant: -* No. -* -*******************************************************************************/ -void USBFS_1_HandleSetup(void) -{ - uint8 requestHandled; - - requestHandled = CY_GET_REG8(USBFS_1_EP0_CR_PTR); /* unlock registers */ - CY_SET_REG8(USBFS_1_EP0_CR_PTR, requestHandled); /* clear setup bit */ - requestHandled = CY_GET_REG8(USBFS_1_EP0_CR_PTR); /* reread register */ - if((requestHandled & USBFS_1_MODE_SETUP_RCVD) != 0u) - { - USBFS_1_ep0Mode = requestHandled; /* if SETUP bit set -> exit without modifying the mode */ - } - else - { - /* In case the previous transfer did not complete, close it out */ - USBFS_1_UpdateStatusBlock(USBFS_1_XFER_PREMATURE); - - switch (CY_GET_REG8(USBFS_1_bmRequestType) & USBFS_1_RQST_TYPE_MASK) - { - case USBFS_1_RQST_TYPE_STD: - requestHandled = USBFS_1_HandleStandardRqst(); - break; - case USBFS_1_RQST_TYPE_CLS: - requestHandled = USBFS_1_DispatchClassRqst(); - break; - case USBFS_1_RQST_TYPE_VND: - requestHandled = USBFS_1_HandleVendorRqst(); - break; - default: - requestHandled = USBFS_1_FALSE; - break; - } - if (requestHandled == USBFS_1_FALSE) - { - USBFS_1_ep0Mode = USBFS_1_MODE_STALL_IN_OUT; - } - } -} - - -/******************************************************************************* -* Function Name: USBFS_1_HandleIN -******************************************************************************** -* -* Summary: -* This routine handles EP0 IN transfers. -* -* Parameters: -* None. -* -* Return: -* None. -* -* Reentrant: -* No. -* -*******************************************************************************/ -void USBFS_1_HandleIN(void) -{ - switch (USBFS_1_transferState) - { - case USBFS_1_TRANS_STATE_IDLE: - break; - case USBFS_1_TRANS_STATE_CONTROL_READ: - USBFS_1_ControlReadDataStage(); - break; - case USBFS_1_TRANS_STATE_CONTROL_WRITE: - USBFS_1_ControlWriteStatusStage(); - break; - case USBFS_1_TRANS_STATE_NO_DATA_CONTROL: - USBFS_1_NoDataControlStatusStage(); - break; - default: /* there are no more states */ - break; - } -} - - -/******************************************************************************* -* Function Name: USBFS_1_HandleOUT -******************************************************************************** -* -* Summary: -* This routine handles EP0 OUT transfers. -* -* Parameters: -* None. -* -* Return: -* None. -* -* Reentrant: -* No. -* -*******************************************************************************/ -void USBFS_1_HandleOUT(void) -{ - switch (USBFS_1_transferState) - { - case USBFS_1_TRANS_STATE_IDLE: - break; - case USBFS_1_TRANS_STATE_CONTROL_READ: - USBFS_1_ControlReadStatusStage(); - break; - case USBFS_1_TRANS_STATE_CONTROL_WRITE: - USBFS_1_ControlWriteDataStage(); - break; - case USBFS_1_TRANS_STATE_NO_DATA_CONTROL: - /* Update the completion block */ - USBFS_1_UpdateStatusBlock(USBFS_1_XFER_ERROR); - /* We expect no more data, so stall INs and OUTs */ - USBFS_1_ep0Mode = USBFS_1_MODE_STALL_IN_OUT; - break; - default: /* There are no more states */ - break; - } -} - - -/******************************************************************************* -* Function Name: USBFS_1_LoadEP0 -******************************************************************************** -* -* Summary: -* This routine loads the EP0 data registers for OUT transfers. It uses the -* currentTD (previously initialized by the _InitControlWrite function and -* updated for each OUT transfer, and the bLastPacketSize) to determine how -* many uint8s to transfer on the current OUT. -* -* If the number of uint8s remaining is zero and the last transfer was full, -* we need to send a zero length packet. Otherwise we send the minimum -* of the control endpoint size (8) or remaining number of uint8s for the -* transaction. -* -* Parameters: -* None. -* -* Return: -* None. -* -* Global variables: -* USBFS_1_transferByteCount - Update the transfer byte count from the -* last transaction. -* USBFS_1_ep0Count - counts the data loaded to the SIE memory in -* current packet. -* USBFS_1_lastPacketSize - remembers the USBFS_ep0Count value for the -* next packet. -* USBFS_1_transferByteCount - sum of the previous bytes transferred -* on previous packets(sum of USBFS_lastPacketSize) -* USBFS_1_ep0Toggle - inverted -* USBFS_1_ep0Mode - prepare for mode register content. -* USBFS_1_transferState - set to TRANS_STATE_CONTROL_READ -* -* Reentrant: -* No. -* -*******************************************************************************/ -void USBFS_1_LoadEP0(void) -{ - uint8 ep0Count = 0u; - - /* Update the transfer byte count from the last transaction */ - USBFS_1_transferByteCount += USBFS_1_lastPacketSize; - /* Now load the next transaction */ - while ((USBFS_1_currentTD.count > 0u) && (ep0Count < 8u)) - { - CY_SET_REG8((reg8 *)(USBFS_1_EP0_DR0_IND + ep0Count), *USBFS_1_currentTD.pData); - USBFS_1_currentTD.pData = &USBFS_1_currentTD.pData[1u]; - ep0Count++; - USBFS_1_currentTD.count--; - } - /* Support zero-length packet*/ - if( (USBFS_1_lastPacketSize == 8u) || (ep0Count > 0u) ) - { - /* Update the data toggle */ - USBFS_1_ep0Toggle ^= USBFS_1_EP0_CNT_DATA_TOGGLE; - /* Set the Mode Register */ - USBFS_1_ep0Mode = USBFS_1_MODE_ACK_IN_STATUS_OUT; - /* Update the state (or stay the same) */ - USBFS_1_transferState = USBFS_1_TRANS_STATE_CONTROL_READ; - } - else - { - /* Expect Status Stage Out */ - USBFS_1_ep0Mode = USBFS_1_MODE_STATUS_OUT_ONLY; - /* Update the state (or stay the same) */ - USBFS_1_transferState = USBFS_1_TRANS_STATE_CONTROL_READ; - } - - /* Save the packet size for next time */ - USBFS_1_lastPacketSize = ep0Count; - USBFS_1_ep0Count = ep0Count; -} - - -/******************************************************************************* -* Function Name: USBFS_1_InitControlRead -******************************************************************************** -* -* Summary: -* Initialize a control read transaction, usable to send data to the host. -* The following global variables should be initialized before this function -* called. To send zero length packet use InitZeroLengthControlTransfer -* function. -* -* Parameters: -* None. -* -* Return: -* requestHandled state. -* -* Global variables: -* USBFS_1_currentTD.count - counts of data to be sent. -* USBFS_1_currentTD.pData - data pointer. -* -* Reentrant: -* No. -* -*******************************************************************************/ -uint8 USBFS_1_InitControlRead(void) -{ - uint16 xferCount; - if(USBFS_1_currentTD.count == 0u) - { - (void) USBFS_1_InitZeroLengthControlTransfer(); - } - else - { - /* Set up the state machine */ - USBFS_1_transferState = USBFS_1_TRANS_STATE_CONTROL_READ; - /* Set the toggle, it gets updated in LoadEP */ - USBFS_1_ep0Toggle = 0u; - /* Initialize the Status Block */ - USBFS_1_InitializeStatusBlock(); - xferCount = (((uint16)CY_GET_REG8(USBFS_1_lengthHi) << 8u) | (CY_GET_REG8(USBFS_1_lengthLo))); - - if (USBFS_1_currentTD.count > xferCount) - { - USBFS_1_currentTD.count = xferCount; - } - USBFS_1_LoadEP0(); - } - - return(USBFS_1_TRUE); -} - - -/******************************************************************************* -* Function Name: USBFS_1_InitZeroLengthControlTransfer -******************************************************************************** -* -* Summary: -* Initialize a zero length data IN transfer. -* -* Parameters: -* None. -* -* Return: -* requestHandled state. -* -* Global variables: -* USBFS_1_ep0Toggle - set to EP0_CNT_DATA_TOGGLE -* USBFS_1_ep0Mode - prepare for mode register content. -* USBFS_1_transferState - set to TRANS_STATE_CONTROL_READ -* USBFS_1_ep0Count - cleared, means the zero-length packet. -* USBFS_1_lastPacketSize - cleared. -* -* Reentrant: -* No. -* -*******************************************************************************/ -uint8 USBFS_1_InitZeroLengthControlTransfer(void) - -{ - /* Update the state */ - USBFS_1_transferState = USBFS_1_TRANS_STATE_CONTROL_READ; - /* Set the data toggle */ - USBFS_1_ep0Toggle = USBFS_1_EP0_CNT_DATA_TOGGLE; - /* Set the Mode Register */ - USBFS_1_ep0Mode = USBFS_1_MODE_ACK_IN_STATUS_OUT; - /* Save the packet size for next time */ - USBFS_1_lastPacketSize = 0u; - USBFS_1_ep0Count = 0u; - - return(USBFS_1_TRUE); -} - - -/******************************************************************************* -* Function Name: USBFS_1_ControlReadDataStage -******************************************************************************** -* -* Summary: -* Handle the Data Stage of a control read transfer. -* -* Parameters: -* None. -* -* Return: -* None. -* -* Reentrant: -* No. -* -*******************************************************************************/ -void USBFS_1_ControlReadDataStage(void) - -{ - USBFS_1_LoadEP0(); -} - - -/******************************************************************************* -* Function Name: USBFS_1_ControlReadStatusStage -******************************************************************************** -* -* Summary: -* Handle the Status Stage of a control read transfer. -* -* Parameters: -* None. -* -* Return: -* None. -* -* Global variables: -* USBFS_1_USBFS_transferByteCount - updated with last packet size. -* USBFS_1_transferState - set to TRANS_STATE_IDLE. -* USBFS_1_ep0Mode - set to MODE_STALL_IN_OUT. -* -* Reentrant: -* No. -* -*******************************************************************************/ -void USBFS_1_ControlReadStatusStage(void) -{ - /* Update the transfer byte count */ - USBFS_1_transferByteCount += USBFS_1_lastPacketSize; - /* Go Idle */ - USBFS_1_transferState = USBFS_1_TRANS_STATE_IDLE; - /* Update the completion block */ - USBFS_1_UpdateStatusBlock(USBFS_1_XFER_STATUS_ACK); - /* We expect no more data, so stall INs and OUTs */ - USBFS_1_ep0Mode = USBFS_1_MODE_STALL_IN_OUT; -} - - -/******************************************************************************* -* Function Name: USBFS_1_InitControlWrite -******************************************************************************** -* -* Summary: -* Initialize a control write transaction -* -* Parameters: -* None. -* -* Return: -* requestHandled state. -* -* Global variables: -* USBFS_1_USBFS_transferState - set to TRANS_STATE_CONTROL_WRITE -* USBFS_1_ep0Toggle - set to EP0_CNT_DATA_TOGGLE -* USBFS_1_ep0Mode - set to MODE_ACK_OUT_STATUS_IN -* -* Reentrant: -* No. -* -*******************************************************************************/ -uint8 USBFS_1_InitControlWrite(void) -{ - uint16 xferCount; - - /* Set up the state machine */ - USBFS_1_transferState = USBFS_1_TRANS_STATE_CONTROL_WRITE; - /* This might not be necessary */ - USBFS_1_ep0Toggle = USBFS_1_EP0_CNT_DATA_TOGGLE; - /* Initialize the Status Block */ - USBFS_1_InitializeStatusBlock(); - - xferCount = (((uint16)CY_GET_REG8(USBFS_1_lengthHi) << 8u) | (CY_GET_REG8(USBFS_1_lengthLo))); - - if (USBFS_1_currentTD.count > xferCount) - { - USBFS_1_currentTD.count = xferCount; - } - - /* Expect Data or Status Stage */ - USBFS_1_ep0Mode = USBFS_1_MODE_ACK_OUT_STATUS_IN; - - return(USBFS_1_TRUE); -} - - -/******************************************************************************* -* Function Name: USBFS_1_ControlWriteDataStage -******************************************************************************** -* -* Summary: -* Handle the Data Stage of a control write transfer -* 1. Get the data (We assume the destination was validated previously) -* 2. Update the count and data toggle -* 3. Update the mode register for the next transaction -* -* Parameters: -* None. -* -* Return: -* None. -* -* Global variables: -* USBFS_1_transferByteCount - Update the transfer byte count from the -* last transaction. -* USBFS_1_ep0Count - counts the data loaded from the SIE memory -* in current packet. -* USBFS_1_transferByteCount - sum of the previous bytes transferred -* on previous packets(sum of USBFS_lastPacketSize) -* USBFS_1_ep0Toggle - inverted -* USBFS_1_ep0Mode - set to MODE_ACK_OUT_STATUS_IN. -* -* Reentrant: -* No. -* -*******************************************************************************/ -void USBFS_1_ControlWriteDataStage(void) -{ - uint8 ep0Count; - uint8 regIndex = 0u; - - ep0Count = (CY_GET_REG8(USBFS_1_EP0_CNT_PTR) & USBFS_1_EPX_CNT0_MASK) - - USBFS_1_EPX_CNTX_CRC_COUNT; - - USBFS_1_transferByteCount += ep0Count; - - while ((USBFS_1_currentTD.count > 0u) && (ep0Count > 0u)) - { - *USBFS_1_currentTD.pData = CY_GET_REG8((reg8 *)(USBFS_1_EP0_DR0_IND + regIndex)); - USBFS_1_currentTD.pData = &USBFS_1_currentTD.pData[1u]; - regIndex++; - ep0Count--; - USBFS_1_currentTD.count--; - } - USBFS_1_ep0Count = ep0Count; - /* Update the data toggle */ - USBFS_1_ep0Toggle ^= USBFS_1_EP0_CNT_DATA_TOGGLE; - /* Expect Data or Status Stage */ - USBFS_1_ep0Mode = USBFS_1_MODE_ACK_OUT_STATUS_IN; -} - - -/******************************************************************************* -* Function Name: USBFS_1_ControlWriteStatusStage -******************************************************************************** -* -* Summary: -* Handle the Status Stage of a control write transfer -* -* Parameters: -* None. -* -* Return: -* None. -* -* Global variables: -* USBFS_1_transferState - set to TRANS_STATE_IDLE. -* USBFS_1_USBFS_ep0Mode - set to MODE_STALL_IN_OUT. -* -* Reentrant: -* No. -* -*******************************************************************************/ -void USBFS_1_ControlWriteStatusStage(void) -{ - /* Go Idle */ - USBFS_1_transferState = USBFS_1_TRANS_STATE_IDLE; - /* Update the completion block */ - USBFS_1_UpdateStatusBlock(USBFS_1_XFER_STATUS_ACK); - /* We expect no more data, so stall INs and OUTs */ - USBFS_1_ep0Mode = USBFS_1_MODE_STALL_IN_OUT; -} - - -/******************************************************************************* -* Function Name: USBFS_1_InitNoDataControlTransfer -******************************************************************************** -* -* Summary: -* Initialize a no data control transfer -* -* Parameters: -* None. -* -* Return: -* requestHandled state. -* -* Global variables: -* USBFS_1_transferState - set to TRANS_STATE_NO_DATA_CONTROL. -* USBFS_1_ep0Mode - set to MODE_STATUS_IN_ONLY. -* USBFS_1_ep0Count - cleared. -* USBFS_1_ep0Toggle - set to EP0_CNT_DATA_TOGGLE -* -* Reentrant: -* No. -* -*******************************************************************************/ -uint8 USBFS_1_InitNoDataControlTransfer(void) -{ - USBFS_1_transferState = USBFS_1_TRANS_STATE_NO_DATA_CONTROL; - USBFS_1_ep0Mode = USBFS_1_MODE_STATUS_IN_ONLY; - USBFS_1_ep0Toggle = USBFS_1_EP0_CNT_DATA_TOGGLE; - USBFS_1_ep0Count = 0u; - - return(USBFS_1_TRUE); -} - - -/******************************************************************************* -* Function Name: USBFS_1_NoDataControlStatusStage -******************************************************************************** -* Summary: -* Handle the Status Stage of a no data control transfer. -* -* SET_ADDRESS is special, since we need to receive the status stage with -* the old address. -* -* Parameters: -* None. -* -* Return: -* None. -* -* Global variables: -* USBFS_1_transferState - set to TRANS_STATE_IDLE. -* USBFS_1_ep0Mode - set to MODE_STALL_IN_OUT. -* USBFS_1_ep0Toggle - set to EP0_CNT_DATA_TOGGLE -* USBFS_1_deviceAddress - used to set new address and cleared -* -* Reentrant: -* No. -* -*******************************************************************************/ -void USBFS_1_NoDataControlStatusStage(void) -{ - /* Change the USB address register if we got a SET_ADDRESS. */ - if (USBFS_1_deviceAddress != 0u) - { - CY_SET_REG8(USBFS_1_CR0_PTR, USBFS_1_deviceAddress | USBFS_1_CR0_ENABLE); - USBFS_1_deviceAddress = 0u; - } - /* Go Idle */ - USBFS_1_transferState = USBFS_1_TRANS_STATE_IDLE; - /* Update the completion block */ - USBFS_1_UpdateStatusBlock(USBFS_1_XFER_STATUS_ACK); - /* We expect no more data, so stall INs and OUTs */ - USBFS_1_ep0Mode = USBFS_1_MODE_STALL_IN_OUT; -} - - -/******************************************************************************* -* Function Name: USBFS_1_UpdateStatusBlock -******************************************************************************** -* -* Summary: -* Update the Completion Status Block for a Request. The block is updated -* with the completion code the USBFS_1_transferByteCount. The -* StatusBlock Pointer is set to NULL. -* -* Parameters: -* completionCode - status. -* -* Return: -* None. -* -* Global variables: -* USBFS_1_currentTD.pStatusBlock->status - updated by the -* completionCode parameter. -* USBFS_1_currentTD.pStatusBlock->length - updated. -* USBFS_1_currentTD.pStatusBlock - cleared. -* -* Reentrant: -* No. -* -*******************************************************************************/ -void USBFS_1_UpdateStatusBlock(uint8 completionCode) -{ - if (USBFS_1_currentTD.pStatusBlock != NULL) - { - USBFS_1_currentTD.pStatusBlock->status = completionCode; - USBFS_1_currentTD.pStatusBlock->length = USBFS_1_transferByteCount; - USBFS_1_currentTD.pStatusBlock = NULL; - } -} - - -/******************************************************************************* -* Function Name: USBFS_1_InitializeStatusBlock -******************************************************************************** -* -* Summary: -* Initialize the Completion Status Block for a Request. The completion -* code is set to USB_XFER_IDLE. -* -* Also, initializes USBFS_1_transferByteCount. Save some space, -* this is the only consumer. -* -* Parameters: -* None. -* -* Return: -* None. -* -* Global variables: -* USBFS_1_currentTD.pStatusBlock->status - set to XFER_IDLE. -* USBFS_1_currentTD.pStatusBlock->length - cleared. -* USBFS_1_transferByteCount - cleared. -* -* Reentrant: -* No. -* -*******************************************************************************/ -void USBFS_1_InitializeStatusBlock(void) -{ - USBFS_1_transferByteCount = 0u; - if(USBFS_1_currentTD.pStatusBlock != NULL) - { - USBFS_1_currentTD.pStatusBlock->status = USBFS_1_XFER_IDLE; - USBFS_1_currentTD.pStatusBlock->length = 0u; - } -} - - -/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_episr.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_episr.c deleted file mode 100644 index d5edbb3..0000000 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_episr.c +++ /dev/null @@ -1,658 +0,0 @@ -/******************************************************************************* -* File Name: USBFS_1_episr.c -* Version 2.60 -* -* Description: -* Data endpoint Interrupt Service Routines -* -* Note: -* -******************************************************************************** -* Copyright 2008-2013, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - -#include "USBFS_1.h" -#include "USBFS_1_pvt.h" -#if defined(USBFS_1_ENABLE_MIDI_STREAMING) && (USBFS_1_ENABLE_MIDI_API != 0u) - #include "USBFS_1_midi.h" -#endif /* End USBFS_1_ENABLE_MIDI_STREAMING*/ - - -/*************************************** -* Custom Declarations -***************************************/ -/* `#START CUSTOM_DECLARATIONS` Place your declaration here */ - -/* `#END` */ - - -#if(USBFS_1_EP1_ISR_REMOVE == 0u) - - - /****************************************************************************** - * Function Name: USBFS_1_EP_1_ISR - ******************************************************************************* - * - * Summary: - * Endpoint 1 Interrupt Service Routine - * - * Parameters: - * None. - * - * Return: - * None. - * - ******************************************************************************/ - CY_ISR(USBFS_1_EP_1_ISR) - { - #if (defined(USBFS_1_ENABLE_MIDI_STREAMING) && USBFS_1_ISR_SERVICE_MIDI_OUT && CY_PSOC3) - uint8 int_en; - #endif /* USBFS_1_ISR_SERVICE_MIDI_OUT && CY_PSOC3 */ - - /* `#START EP1_USER_CODE` Place your code here */ - - /* `#END` */ - - #if (defined(USBFS_1_ENABLE_MIDI_STREAMING) && USBFS_1_ISR_SERVICE_MIDI_OUT && CY_PSOC3) - int_en = EA; - CyGlobalIntEnable; /* Make sure nested interrupt is enabled */ - #endif /* USBFS_1_ISR_SERVICE_MIDI_OUT && CY_PSOC3 */ - - CY_GET_REG8(USBFS_1_SIE_EP1_CR0_PTR); /* Must read the mode reg */ - /* Do not toggle ISOC endpoint */ - if((USBFS_1_EP[USBFS_1_EP1].attrib & USBFS_1_EP_TYPE_MASK) != - USBFS_1_EP_TYPE_ISOC) - { - USBFS_1_EP[USBFS_1_EP1].epToggle ^= USBFS_1_EPX_CNT_DATA_TOGGLE; - } - USBFS_1_EP[USBFS_1_EP1].apiEpState = USBFS_1_EVENT_PENDING; - CY_SET_REG8(USBFS_1_SIE_EP_INT_SR_PTR, CY_GET_REG8(USBFS_1_SIE_EP_INT_SR_PTR) & - (uint8)~USBFS_1_SIE_EP_INT_EP1_MASK); - - #if( defined(USBFS_1_ENABLE_MIDI_STREAMING) && USBFS_1_ISR_SERVICE_MIDI_OUT ) - if(USBFS_1_midi_out_ep == USBFS_1_EP1) - { - USBFS_1_MIDI_OUT_EP_Service(); - } - #endif /* End USBFS_1_ISR_SERVICE_MIDI_OUT */ - - /* `#START EP1_END_USER_CODE` Place your code here */ - - /* `#END` */ - - #if ( defined(USBFS_1_ENABLE_MIDI_STREAMING) && USBFS_1_ISR_SERVICE_MIDI_OUT && CY_PSOC3 ) - EA = int_en; - #endif /* USBFS_1_ISR_SERVICE_MIDI_OUT && CY_PSOC3 */ - } - -#endif /* End USBFS_1_EP1_ISR_REMOVE */ - - -#if(USBFS_1_EP2_ISR_REMOVE == 0u) - - /******************************************************************************* - * Function Name: USBFS_1_EP_2_ISR - ******************************************************************************** - * - * Summary: - * Endpoint 2 Interrupt Service Routine - * - * Parameters: - * None. - * - * Return: - * None. - * - *******************************************************************************/ - CY_ISR(USBFS_1_EP_2_ISR) - { - #if (defined(USBFS_1_ENABLE_MIDI_STREAMING) && USBFS_1_ISR_SERVICE_MIDI_OUT && CY_PSOC3) - uint8 int_en; - #endif /* USBFS_1_ISR_SERVICE_MIDI_OUT && CY_PSOC3 */ - - /* `#START EP2_USER_CODE` Place your code here */ - - /* `#END` */ - - #if (defined(USBFS_1_ENABLE_MIDI_STREAMING) && USBFS_1_ISR_SERVICE_MIDI_OUT && CY_PSOC3 ) - int_en = EA; - CyGlobalIntEnable; /* Make sure nested interrupt is enabled */ - #endif /* USBFS_1_ISR_SERVICE_MIDI_OUT && CY_PSOC3 */ - - CY_GET_REG8(USBFS_1_SIE_EP2_CR0_PTR); /* Must read the mode reg */ - /* Do not toggle ISOC endpoint */ - if((USBFS_1_EP[USBFS_1_EP2].attrib & USBFS_1_EP_TYPE_MASK) != - USBFS_1_EP_TYPE_ISOC) - { - USBFS_1_EP[USBFS_1_EP2].epToggle ^= USBFS_1_EPX_CNT_DATA_TOGGLE; - } - USBFS_1_EP[USBFS_1_EP2].apiEpState = USBFS_1_EVENT_PENDING; - CY_SET_REG8(USBFS_1_SIE_EP_INT_SR_PTR, CY_GET_REG8(USBFS_1_SIE_EP_INT_SR_PTR) - & (uint8)~USBFS_1_SIE_EP_INT_EP2_MASK); - - #if( defined(USBFS_1_ENABLE_MIDI_STREAMING) && USBFS_1_ISR_SERVICE_MIDI_OUT ) - if(USBFS_1_midi_out_ep == USBFS_1_EP2) - { - USBFS_1_MIDI_OUT_EP_Service(); - } - #endif /* End USBFS_1_ISR_SERVICE_MIDI_OUT */ - - /* `#START EP2_END_USER_CODE` Place your code here */ - - /* `#END` */ - - #if (defined(USBFS_1_ENABLE_MIDI_STREAMING) && USBFS_1_ISR_SERVICE_MIDI_OUT && CY_PSOC3) - EA = int_en; - #endif /* USBFS_1_ISR_SERVICE_MIDI_OUT && CY_PSOC3 */ - } - -#endif /* End USBFS_1_EP2_ISR_REMOVE */ - - -#if(USBFS_1_EP3_ISR_REMOVE == 0u) - - /******************************************************************************* - * Function Name: USBFS_1_EP_3_ISR - ******************************************************************************** - * - * Summary: - * Endpoint 3 Interrupt Service Routine - * - * Parameters: - * None. - * - * Return: - * None. - * - *******************************************************************************/ - CY_ISR(USBFS_1_EP_3_ISR) - { - #if (defined(USBFS_1_ENABLE_MIDI_STREAMING) && USBFS_1_ISR_SERVICE_MIDI_OUT && CY_PSOC3) - uint8 int_en; - #endif /* USBFS_1_ISR_SERVICE_MIDI_OUT && CY_PSOC3 */ - - /* `#START EP3_USER_CODE` Place your code here */ - - /* `#END` */ - - #if (defined(USBFS_1_ENABLE_MIDI_STREAMING) && USBFS_1_ISR_SERVICE_MIDI_OUT && CY_PSOC3) - int_en = EA; - CyGlobalIntEnable; /* Make sure nested interrupt is enabled */ - #endif /* CY_PSOC3 & USBFS_1_ISR_SERVICE_MIDI_OUT */ - - CY_GET_REG8(USBFS_1_SIE_EP3_CR0_PTR); /* Must read the mode reg */ - /* Do not toggle ISOC endpoint */ - if((USBFS_1_EP[USBFS_1_EP3].attrib & USBFS_1_EP_TYPE_MASK) != - USBFS_1_EP_TYPE_ISOC) - { - USBFS_1_EP[USBFS_1_EP3].epToggle ^= USBFS_1_EPX_CNT_DATA_TOGGLE; - } - USBFS_1_EP[USBFS_1_EP3].apiEpState = USBFS_1_EVENT_PENDING; - CY_SET_REG8(USBFS_1_SIE_EP_INT_SR_PTR, CY_GET_REG8(USBFS_1_SIE_EP_INT_SR_PTR) - & (uint8)~USBFS_1_SIE_EP_INT_EP3_MASK); - - #if (defined(USBFS_1_ENABLE_MIDI_STREAMING) && USBFS_1_ISR_SERVICE_MIDI_OUT) - if(USBFS_1_midi_out_ep == USBFS_1_EP3) - { - USBFS_1_MIDI_OUT_EP_Service(); - } - #endif /* End USBFS_1_ISR_SERVICE_MIDI_OUT */ - - /* `#START EP3_END_USER_CODE` Place your code here */ - - /* `#END` */ - - #if (defined(USBFS_1_ENABLE_MIDI_STREAMING) && USBFS_1_ISR_SERVICE_MIDI_OUT && CY_PSOC3) - EA = int_en; - #endif /* CY_PSOC3 & USBFS_1_ISR_SERVICE_MIDI_OUT */ - } - -#endif /* End USBFS_1_EP3_ISR_REMOVE */ - - -#if(USBFS_1_EP4_ISR_REMOVE == 0u) - - /******************************************************************************* - * Function Name: USBFS_1_EP_4_ISR - ******************************************************************************** - * - * Summary: - * Endpoint 4 Interrupt Service Routine - * - * Parameters: - * None. - * - * Return: - * None. - * - *******************************************************************************/ - CY_ISR(USBFS_1_EP_4_ISR) - { - #if (defined(USBFS_1_ENABLE_MIDI_STREAMING) && USBFS_1_ISR_SERVICE_MIDI_OUT && CY_PSOC3) - uint8 int_en; - #endif /* CY_PSOC3 & USBFS_1_ISR_SERVICE_MIDI_OUT */ - - /* `#START EP4_USER_CODE` Place your code here */ - - /* `#END` */ - - #if (defined(USBFS_1_ENABLE_MIDI_STREAMING) && USBFS_1_ISR_SERVICE_MIDI_OUT && CY_PSOC3) - int_en = EA; - CyGlobalIntEnable; /* Make sure nested interrupt is enabled */ - #endif /* CY_PSOC3 & USBFS_1_ISR_SERVICE_MIDI_OUT */ - - CY_GET_REG8(USBFS_1_SIE_EP4_CR0_PTR); /* Must read the mode reg */ - /* Do not toggle ISOC endpoint */ - if((USBFS_1_EP[USBFS_1_EP4].attrib & USBFS_1_EP_TYPE_MASK) != - USBFS_1_EP_TYPE_ISOC) - { - USBFS_1_EP[USBFS_1_EP4].epToggle ^= USBFS_1_EPX_CNT_DATA_TOGGLE; - } - USBFS_1_EP[USBFS_1_EP4].apiEpState = USBFS_1_EVENT_PENDING; - CY_SET_REG8(USBFS_1_SIE_EP_INT_SR_PTR, CY_GET_REG8(USBFS_1_SIE_EP_INT_SR_PTR) - & (uint8)~USBFS_1_SIE_EP_INT_EP4_MASK); - - #if (defined(USBFS_1_ENABLE_MIDI_STREAMING) && USBFS_1_ISR_SERVICE_MIDI_OUT) - if(USBFS_1_midi_out_ep == USBFS_1_EP4) - { - USBFS_1_MIDI_OUT_EP_Service(); - } - #endif /* End USBFS_1_ISR_SERVICE_MIDI_OUT */ - - /* `#START EP4_END_USER_CODE` Place your code here */ - - /* `#END` */ - - #if (defined(USBFS_1_ENABLE_MIDI_STREAMING) && USBFS_1_ISR_SERVICE_MIDI_OUT && CY_PSOC3) - EA = int_en; - #endif /* CY_PSOC3 & USBFS_1_ISR_SERVICE_MIDI_OUT */ - } - -#endif /* End USBFS_1_EP4_ISR_REMOVE */ - - -#if(USBFS_1_EP5_ISR_REMOVE == 0u) - - /******************************************************************************* - * Function Name: USBFS_1_EP_5_ISR - ******************************************************************************** - * - * Summary: - * Endpoint 5 Interrupt Service Routine - * - * Parameters: - * None. - * - * Return: - * None. - * - *******************************************************************************/ - CY_ISR(USBFS_1_EP_5_ISR) - { - #if (defined(USBFS_1_ENABLE_MIDI_STREAMING) && USBFS_1_ISR_SERVICE_MIDI_OUT && CY_PSOC3) - uint8 int_en; - #endif /* CY_PSOC3 & USBFS_1_ISR_SERVICE_MIDI_OUT */ - - /* `#START EP5_USER_CODE` Place your code here */ - - /* `#END` */ - - #if (defined(USBFS_1_ENABLE_MIDI_STREAMING) && USBFS_1_ISR_SERVICE_MIDI_OUT && CY_PSOC3) - int_en = EA; - CyGlobalIntEnable; /* Make sure nested interrupt is enabled */ - #endif /* CY_PSOC3 & USBFS_1_ISR_SERVICE_MIDI_OUT */ - - CY_GET_REG8(USBFS_1_SIE_EP5_CR0_PTR); /* Must read the mode reg */ - /* Do not toggle ISOC endpoint */ - if((USBFS_1_EP[USBFS_1_EP5].attrib & USBFS_1_EP_TYPE_MASK) != - USBFS_1_EP_TYPE_ISOC) - { - USBFS_1_EP[USBFS_1_EP5].epToggle ^= USBFS_1_EPX_CNT_DATA_TOGGLE; - } - USBFS_1_EP[USBFS_1_EP5].apiEpState = USBFS_1_EVENT_PENDING; - CY_SET_REG8(USBFS_1_SIE_EP_INT_SR_PTR, CY_GET_REG8(USBFS_1_SIE_EP_INT_SR_PTR) - & (uint8)~USBFS_1_SIE_EP_INT_EP5_MASK); - - #if (defined(USBFS_1_ENABLE_MIDI_STREAMING) && USBFS_1_ISR_SERVICE_MIDI_OUT) - if(USBFS_1_midi_out_ep == USBFS_1_EP5) - { - USBFS_1_MIDI_OUT_EP_Service(); - } - #endif /* End USBFS_1_ISR_SERVICE_MIDI_OUT */ - - /* `#START EP5_END_USER_CODE` Place your code here */ - - /* `#END` */ - - #if (defined(USBFS_1_ENABLE_MIDI_STREAMING) && USBFS_1_ISR_SERVICE_MIDI_OUT && CY_PSOC3) - EA = int_en; - #endif /* CY_PSOC3 & USBFS_1_ISR_SERVICE_MIDI_OUT */ - } -#endif /* End USBFS_1_EP5_ISR_REMOVE */ - - -#if(USBFS_1_EP6_ISR_REMOVE == 0u) - - /******************************************************************************* - * Function Name: USBFS_1_EP_6_ISR - ******************************************************************************** - * - * Summary: - * Endpoint 6 Interrupt Service Routine - * - * Parameters: - * None. - * - * Return: - * None. - * - *******************************************************************************/ - CY_ISR(USBFS_1_EP_6_ISR) - { - #if (defined(USBFS_1_ENABLE_MIDI_STREAMING) && USBFS_1_ISR_SERVICE_MIDI_OUT && CY_PSOC3) - uint8 int_en; - #endif /* CY_PSOC3 & USBFS_1_ISR_SERVICE_MIDI_OUT */ - - /* `#START EP6_USER_CODE` Place your code here */ - - /* `#END` */ - - #if (defined(USBFS_1_ENABLE_MIDI_STREAMING) && USBFS_1_ISR_SERVICE_MIDI_OUT && CY_PSOC3) - int_en = EA; - CyGlobalIntEnable; /* Make sure nested interrupt is enabled */ - #endif /* CY_PSOC3 & USBFS_1_ISR_SERVICE_MIDI_OUT */ - - CY_GET_REG8(USBFS_1_SIE_EP6_CR0_PTR); /* Must read the mode reg */ - /* Do not toggle ISOC endpoint */ - if((USBFS_1_EP[USBFS_1_EP6].attrib & USBFS_1_EP_TYPE_MASK) != - USBFS_1_EP_TYPE_ISOC) - { - USBFS_1_EP[USBFS_1_EP6].epToggle ^= USBFS_1_EPX_CNT_DATA_TOGGLE; - } - USBFS_1_EP[USBFS_1_EP6].apiEpState = USBFS_1_EVENT_PENDING; - CY_SET_REG8(USBFS_1_SIE_EP_INT_SR_PTR, CY_GET_REG8(USBFS_1_SIE_EP_INT_SR_PTR) - & (uint8)~USBFS_1_SIE_EP_INT_EP6_MASK); - - #if (defined(USBFS_1_ENABLE_MIDI_STREAMING) && USBFS_1_ISR_SERVICE_MIDI_OUT) - if(USBFS_1_midi_out_ep == USBFS_1_EP6) - { - USBFS_1_MIDI_OUT_EP_Service(); - } - #endif /* End USBFS_1_ISR_SERVICE_MIDI_OUT */ - - /* `#START EP6_END_USER_CODE` Place your code here */ - - /* `#END` */ - - #if (defined(USBFS_1_ENABLE_MIDI_STREAMING) && USBFS_1_ISR_SERVICE_MIDI_OUT && CY_PSOC3) - EA = int_en; - #endif /* CY_PSOC3 & USBFS_1_ISR_SERVICE_MIDI_OUT */ - } - -#endif /* End USBFS_1_EP6_ISR_REMOVE */ - - -#if(USBFS_1_EP7_ISR_REMOVE == 0u) - - /******************************************************************************* - * Function Name: USBFS_1_EP_7_ISR - ******************************************************************************** - * - * Summary: - * Endpoint 7 Interrupt Service Routine - * - * Parameters: - * None. - * - * Return: - * None. - * - *******************************************************************************/ - CY_ISR(USBFS_1_EP_7_ISR) - { - #if (defined(USBFS_1_ENABLE_MIDI_STREAMING) && USBFS_1_ISR_SERVICE_MIDI_OUT && CY_PSOC3) - uint8 int_en; - #endif /* CY_PSOC3 & USBFS_1_ISR_SERVICE_MIDI_OUT */ - - /* `#START EP7_USER_CODE` Place your code here */ - - /* `#END` */ - - #if (defined(USBFS_1_ENABLE_MIDI_STREAMING) && USBFS_1_ISR_SERVICE_MIDI_OUT && CY_PSOC3) - int_en = EA; - CyGlobalIntEnable; /* Make sure nested interrupt is enabled */ - #endif /* CY_PSOC3 & USBFS_1_ISR_SERVICE_MIDI_OUT */ - - CY_GET_REG8(USBFS_1_SIE_EP7_CR0_PTR); /* Must read the mode reg */ - /* Do not toggle ISOC endpoint */ - if((USBFS_1_EP[USBFS_1_EP7].attrib & USBFS_1_EP_TYPE_MASK) != - USBFS_1_EP_TYPE_ISOC) - { - USBFS_1_EP[USBFS_1_EP7].epToggle ^= USBFS_1_EPX_CNT_DATA_TOGGLE; - } - USBFS_1_EP[USBFS_1_EP7].apiEpState = USBFS_1_EVENT_PENDING; - CY_SET_REG8(USBFS_1_SIE_EP_INT_SR_PTR, CY_GET_REG8(USBFS_1_SIE_EP_INT_SR_PTR) - & (uint8)~USBFS_1_SIE_EP_INT_EP7_MASK); - - #if (defined(USBFS_1_ENABLE_MIDI_STREAMING) && USBFS_1_ISR_SERVICE_MIDI_OUT) - if(USBFS_1_midi_out_ep == USBFS_1_EP7) - { - USBFS_1_MIDI_OUT_EP_Service(); - } - #endif /* End USBFS_1_ISR_SERVICE_MIDI_OUT */ - - /* `#START EP7_END_USER_CODE` Place your code here */ - - /* `#END` */ - - #if (defined(USBFS_1_ENABLE_MIDI_STREAMING) && USBFS_1_ISR_SERVICE_MIDI_OUT && CY_PSOC3) - EA = int_en; - #endif /* CY_PSOC3 & USBFS_1_ISR_SERVICE_MIDI_OUT */ - } - -#endif /* End USBFS_1_EP7_ISR_REMOVE */ - - -#if(USBFS_1_EP8_ISR_REMOVE == 0u) - - /******************************************************************************* - * Function Name: USBFS_1_EP_8_ISR - ******************************************************************************** - * - * Summary: - * Endpoint 8 Interrupt Service Routine - * - * Parameters: - * None. - * - * Return: - * None. - * - *******************************************************************************/ - CY_ISR(USBFS_1_EP_8_ISR) - { - #if (defined(USBFS_1_ENABLE_MIDI_STREAMING) && USBFS_1_ISR_SERVICE_MIDI_OUT && CY_PSOC3) - uint8 int_en; - #endif /* CY_PSOC3 & USBFS_1_ISR_SERVICE_MIDI_OUT */ - - /* `#START EP8_USER_CODE` Place your code here */ - - /* `#END` */ - - #if (defined(USBFS_1_ENABLE_MIDI_STREAMING) && USBFS_1_ISR_SERVICE_MIDI_OUT && CY_PSOC3) - int_en = EA; - CyGlobalIntEnable; /* Make sure nested interrupt is enabled */ - #endif /* CY_PSOC3 & USBFS_1_ISR_SERVICE_MIDI_OUT */ - - CY_GET_REG8(USBFS_1_SIE_EP8_CR0_PTR); /* Must read the mode reg */ - /* Do not toggle ISOC endpoint */ - if((USBFS_1_EP[USBFS_1_EP8].attrib & USBFS_1_EP_TYPE_MASK) != - USBFS_1_EP_TYPE_ISOC) - { - USBFS_1_EP[USBFS_1_EP8].epToggle ^= USBFS_1_EPX_CNT_DATA_TOGGLE; - } - USBFS_1_EP[USBFS_1_EP8].apiEpState = USBFS_1_EVENT_PENDING; - CY_SET_REG8(USBFS_1_SIE_EP_INT_SR_PTR, CY_GET_REG8(USBFS_1_SIE_EP_INT_SR_PTR) - & (uint8)~USBFS_1_SIE_EP_INT_EP8_MASK); - - #if (defined(USBFS_1_ENABLE_MIDI_STREAMING) && USBFS_1_ISR_SERVICE_MIDI_OUT) - if(USBFS_1_midi_out_ep == USBFS_1_EP8) - { - USBFS_1_MIDI_OUT_EP_Service(); - } - #endif /* End USBFS_1_ISR_SERVICE_MIDI_OUT */ - - /* `#START EP8_END_USER_CODE` Place your code here */ - - /* `#END` */ - - #if (defined(USBFS_1_ENABLE_MIDI_STREAMING) && USBFS_1_ISR_SERVICE_MIDI_OUT && CY_PSOC3) - EA = int_en; - #endif /* CY_PSOC3 & USBFS_1_ISR_SERVICE_MIDI_OUT */ - } - -#endif /* End USBFS_1_EP8_ISR_REMOVE */ - - -/******************************************************************************* -* Function Name: USBFS_1_SOF_ISR -******************************************************************************** -* -* Summary: -* Start of Frame Interrupt Service Routine -* -* Parameters: -* None. -* -* Return: -* None. -* -*******************************************************************************/ -CY_ISR(USBFS_1_SOF_ISR) -{ - /* `#START SOF_USER_CODE` Place your code here */ - - /* `#END` */ -} - - -/******************************************************************************* -* Function Name: USBFS_1_BUS_RESET_ISR -******************************************************************************** -* -* Summary: -* USB Bus Reset Interrupt Service Routine. Calls _Start with the same -* parameters as the last USER call to _Start -* -* Parameters: -* None. -* -* Return: -* None. -* -*******************************************************************************/ -CY_ISR(USBFS_1_BUS_RESET_ISR) -{ - /* `#START BUS_RESET_USER_CODE` Place your code here */ - - /* `#END` */ - - USBFS_1_ReInitComponent(); -} - - -#if((USBFS_1_EP_MM != USBFS_1__EP_MANUAL) && (USBFS_1_ARB_ISR_REMOVE == 0u)) - - - /******************************************************************************* - * Function Name: USBFS_1_ARB_ISR - ******************************************************************************** - * - * Summary: - * Arbiter Interrupt Service Routine - * - * Parameters: - * None. - * - * Return: - * None. - * - * Side effect: - * Search for EP8 int_status will be much slower than search for EP1 int_status. - * - *******************************************************************************/ - CY_ISR(USBFS_1_ARB_ISR) - { - uint8 int_status; - uint8 ep_status; - uint8 ep = USBFS_1_EP1; - uint8 ptr = 0u; - - /* `#START ARB_BEGIN_USER_CODE` Place your code here */ - - /* `#END` */ - - int_status = USBFS_1_ARB_INT_SR_REG; /* read Arbiter Status Register */ - USBFS_1_ARB_INT_SR_REG = int_status; /* Clear Serviced Interrupts */ - - while(int_status != 0u) - { - if((int_status & 1u) != 0u) /* If EpX interrupt present */ - { /* read Endpoint Status Register */ - ep_status = CY_GET_REG8((reg8 *)(USBFS_1_ARB_EP1_SR_IND + ptr)); - /* If In Buffer Full */ - if((ep_status & USBFS_1_ARB_EPX_SR_IN_BUF_FULL) != 0u) - { - if((USBFS_1_EP[ep].addr & USBFS_1_DIR_IN) != 0u) - { - /* Clear Data ready status */ - *(reg8 *)(USBFS_1_ARB_EP1_CFG_IND + ptr) &= - (uint8)~USBFS_1_ARB_EPX_CFG_IN_DATA_RDY; - /* Write the Mode register */ - CY_SET_REG8((reg8 *)(USBFS_1_SIE_EP1_CR0_IND + ptr), USBFS_1_EP[ep].epMode); - #if (defined(USBFS_1_ENABLE_MIDI_STREAMING) && USBFS_1_ISR_SERVICE_MIDI_IN) - if(ep == USBFS_1_midi_in_ep) - { /* Clear MIDI input pointer */ - USBFS_1_midiInPointer = 0u; - } - #endif /* End USBFS_1_ENABLE_MIDI_STREAMING*/ - } - } - /* (re)arm Out EP only for mode2 */ - #if(USBFS_1_EP_MM != USBFS_1__EP_DMAAUTO) - /* If DMA Grant */ - if((ep_status & USBFS_1_ARB_EPX_SR_DMA_GNT) != 0u) - { - if((USBFS_1_EP[ep].addr & USBFS_1_DIR_IN) == 0u) - { - USBFS_1_EP[ep].apiEpState = USBFS_1_NO_EVENT_PENDING; - /* Write the Mode register */ - CY_SET_REG8((reg8 *)(USBFS_1_SIE_EP1_CR0_IND + ptr), - USBFS_1_EP[ep].epMode); - } - } - #endif /* End USBFS_1_EP_MM */ - - /* `#START ARB_USER_CODE` Place your code here for handle Buffer Underflow/Overflow */ - - /* `#END` */ - - CY_SET_REG8((reg8 *)(USBFS_1_ARB_EP1_SR_IND + ptr), ep_status); /* Clear Serviced events */ - } - ptr += USBFS_1_EPX_CNTX_ADDR_OFFSET; /* prepare pointer for next EP */ - ep++; - int_status >>= 1u; - } - - /* `#START ARB_END_USER_CODE` Place your code here */ - - /* `#END` */ - } - -#endif /* End USBFS_1_EP_MM */ - - -/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_hid.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_hid.c deleted file mode 100644 index 0bd70d9..0000000 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_hid.c +++ /dev/null @@ -1,422 +0,0 @@ -/******************************************************************************* -* File Name: USBFS_1_hid.c -* Version 2.60 -* -* Description: -* USB HID Class request handler. -* -* Note: -* -******************************************************************************** -* Copyright 2008-2013, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - -#include "USBFS_1.h" - -#if defined(USBFS_1_ENABLE_HID_CLASS) - -#include "USBFS_1_pvt.h" -#include "USBFS_1_hid.h" - - -/*************************************** -* HID Variables -***************************************/ - -volatile uint8 USBFS_1_hidProtocol[USBFS_1_MAX_INTERFACES_NUMBER]; /* HID device protocol status */ -volatile uint8 USBFS_1_hidIdleRate[USBFS_1_MAX_INTERFACES_NUMBER]; /* HID device idle reload value */ -volatile uint8 USBFS_1_hidIdleTimer[USBFS_1_MAX_INTERFACES_NUMBER]; /* HID device idle rate value */ - - -/*************************************** -* Custom Declarations -***************************************/ - -/* `#START HID_CUSTOM_DECLARATIONS` Place your declaration here */ - -/* `#END` */ - - -/******************************************************************************* -* Function Name: USBFS_1_UpdateHIDTimer -******************************************************************************** -* -* Summary: -* Updates the HID report timer and reloads it if expired -* -* Parameters: -* interface: Interface Number. -* -* Return: -* status. -* -* Reentrant: -* No. -* -*******************************************************************************/ -uint8 USBFS_1_UpdateHIDTimer(uint8 interface) -{ - uint8 stat = USBFS_1_IDLE_TIMER_INDEFINITE; - - if(USBFS_1_hidIdleRate[interface] != 0u) - { - if(USBFS_1_hidIdleTimer[interface] > 0u) - { - USBFS_1_hidIdleTimer[interface]--; - stat = USBFS_1_IDLE_TIMER_RUNNING; - } - else - { - USBFS_1_hidIdleTimer[interface] = USBFS_1_hidIdleRate[interface]; - stat = USBFS_1_IDLE_TIMER_EXPIRED; - } - } - - return(stat); -} - - -/******************************************************************************* -* Function Name: USBFS_1_GetProtocol -******************************************************************************** -* -* Summary: -* Returns the selected protocol value to the application -* -* Parameters: -* interface: Interface Number. -* -* Return: -* Interface protocol. -* -*******************************************************************************/ -uint8 USBFS_1_GetProtocol(uint8 interface) -{ - return(USBFS_1_hidProtocol[interface]); -} - - -/******************************************************************************* -* Function Name: USBFS_1_DispatchHIDClassRqst -******************************************************************************** -* -* Summary: -* This routine dispatches class requests -* -* Parameters: -* None. -* -* Return: -* requestHandled -* -* Reentrant: -* No. -* -*******************************************************************************/ -uint8 USBFS_1_DispatchHIDClassRqst(void) -{ - uint8 requestHandled = USBFS_1_FALSE; - uint8 interfaceNumber; - - interfaceNumber = CY_GET_REG8(USBFS_1_wIndexLo); - if ((CY_GET_REG8(USBFS_1_bmRequestType) & USBFS_1_RQST_DIR_MASK) == USBFS_1_RQST_DIR_D2H) - { /* Control Read */ - switch (CY_GET_REG8(USBFS_1_bRequest)) - { - case USBFS_1_GET_DESCRIPTOR: - if (CY_GET_REG8(USBFS_1_wValueHi) == USBFS_1_DESCR_HID_CLASS) - { - USBFS_1_FindHidClassDecriptor(); - if (USBFS_1_currentTD.count != 0u) - { - requestHandled = USBFS_1_InitControlRead(); - } - } - else if (CY_GET_REG8(USBFS_1_wValueHi) == USBFS_1_DESCR_HID_REPORT) - { - USBFS_1_FindReportDescriptor(); - if (USBFS_1_currentTD.count != 0u) - { - requestHandled = USBFS_1_InitControlRead(); - } - } - else - { /* requestHandled is initialezed as FALSE by default */ - } - break; - case USBFS_1_HID_GET_REPORT: - USBFS_1_FindReport(); - if (USBFS_1_currentTD.count != 0u) - { - requestHandled = USBFS_1_InitControlRead(); - } - break; - - case USBFS_1_HID_GET_IDLE: - /* This function does not support multiple reports per interface*/ - /* Validate interfaceNumber and Report ID (should be 0) */ - if( (interfaceNumber < USBFS_1_MAX_INTERFACES_NUMBER) && - (CY_GET_REG8(USBFS_1_wValueLo) == 0u ) ) /* Do not support Idle per Report ID */ - { - USBFS_1_currentTD.count = 1u; - USBFS_1_currentTD.pData = &USBFS_1_hidIdleRate[interfaceNumber]; - requestHandled = USBFS_1_InitControlRead(); - } - break; - case USBFS_1_HID_GET_PROTOCOL: - /* Validate interfaceNumber */ - if( interfaceNumber < USBFS_1_MAX_INTERFACES_NUMBER) - { - USBFS_1_currentTD.count = 1u; - USBFS_1_currentTD.pData = &USBFS_1_hidProtocol[interfaceNumber]; - requestHandled = USBFS_1_InitControlRead(); - } - break; - default: /* requestHandled is initialized as FALSE by default */ - break; - } - } - else if ((CY_GET_REG8(USBFS_1_bmRequestType) & USBFS_1_RQST_DIR_MASK) == - USBFS_1_RQST_DIR_H2D) - { /* Control Write */ - switch (CY_GET_REG8(USBFS_1_bRequest)) - { - case USBFS_1_HID_SET_REPORT: - USBFS_1_FindReport(); - if (USBFS_1_currentTD.count != 0u) - { - requestHandled = USBFS_1_InitControlWrite(); - } - break; - case USBFS_1_HID_SET_IDLE: - /* This function does not support multiple reports per interface */ - /* Validate interfaceNumber and Report ID (should be 0) */ - if( (interfaceNumber < USBFS_1_MAX_INTERFACES_NUMBER) && - (CY_GET_REG8(USBFS_1_wValueLo) == 0u ) ) /* Do not support Idle per Report ID */ - { - USBFS_1_hidIdleRate[interfaceNumber] = CY_GET_REG8(USBFS_1_wValueHi); - /* With regards to HID spec: "7.2.4 Set_Idle Request" - * Latency. If the current period has gone past the - * newly proscribed time duration, then a report - * will be generated immediately. - */ - if(USBFS_1_hidIdleRate[interfaceNumber] < - USBFS_1_hidIdleTimer[interfaceNumber]) - { - /* Set the timer to zero and let the UpdateHIDTimer() API return IDLE_TIMER_EXPIRED status*/ - USBFS_1_hidIdleTimer[interfaceNumber] = 0u; - } - /* If the new request is received within 4 milliseconds - * (1 count) of the end of the current period, then the - * new request will have no effect until after the report. - */ - else if(USBFS_1_hidIdleTimer[interfaceNumber] <= 1u) - { - /* Do nothing. - * Let the UpdateHIDTimer() API continue to work and - * return IDLE_TIMER_EXPIRED status - */ - } - else - { /* Reload the timer*/ - USBFS_1_hidIdleTimer[interfaceNumber] = - USBFS_1_hidIdleRate[interfaceNumber]; - } - requestHandled = USBFS_1_InitNoDataControlTransfer(); - } - break; - - case USBFS_1_HID_SET_PROTOCOL: - /* Validate interfaceNumber and protocol (must be 0 or 1) */ - if( (interfaceNumber < USBFS_1_MAX_INTERFACES_NUMBER) && - (CY_GET_REG8(USBFS_1_wValueLo) <= 1u) ) - { - USBFS_1_hidProtocol[interfaceNumber] = CY_GET_REG8(USBFS_1_wValueLo); - requestHandled = USBFS_1_InitNoDataControlTransfer(); - } - break; - default: /* requestHandled is initialized as FALSE by default */ - break; - } - } - else - { /* requestHandled is initialized as FALSE by default */ - } - - return(requestHandled); -} - - -/******************************************************************************* -* Function Name: USB_FindHidClassDescriptor -******************************************************************************** -* -* Summary: -* This routine find Hid Class Descriptor pointer based on the Interface number -* and Alternate setting then loads the currentTD structure with the address of -* the buffer and the size. -* The HID Class Descriptor resides inside the config descriptor. -* -* Parameters: -* None. -* -* Return: -* currentTD -* -* Reentrant: -* No. -* -*******************************************************************************/ -void USBFS_1_FindHidClassDecriptor(void) -{ - const T_USBFS_1_LUT CYCODE *pTmp; - volatile uint8 *pDescr; - uint8 interfaceN; - - pTmp = USBFS_1_GetConfigTablePtr(USBFS_1_configuration - 1u); - interfaceN = CY_GET_REG8(USBFS_1_wIndexLo); - /* Third entry in the LUT starts the Interface Table pointers */ - /* Now use the request interface number*/ - pTmp = &pTmp[interfaceN + 2u]; - /* USB_DEVICEx_CONFIGURATIONy_INTERFACEz_TABLE */ - pTmp = (const T_USBFS_1_LUT CYCODE *) pTmp->p_list; - /* Now use Alternate setting number */ - pTmp = &pTmp[USBFS_1_interfaceSetting[interfaceN]]; - /* USB_DEVICEx_CONFIGURATIONy_INTERFACEz_ALTERNATEi_HID_TABLE */ - pTmp = (const T_USBFS_1_LUT CYCODE *) pTmp->p_list; - /* Fifth entry in the LUT points to Hid Class Descriptor in Configuration Descriptor */ - pTmp = &pTmp[4u]; - pDescr = (volatile uint8 *)pTmp->p_list; - /* The first byte contains the descriptor length */ - USBFS_1_currentTD.count = *pDescr; - USBFS_1_currentTD.pData = pDescr; -} - - -/******************************************************************************* -* Function Name: USB_FindReportDescriptor -******************************************************************************** -* -* Summary: -* This routine find Hid Report Descriptor pointer based on the Interface -* number, then loads the currentTD structure with the address of the buffer -* and the size. -* Hid Report Descriptor is located after IN/OUT/FEATURE reports. -* -* Parameters: -* void -* -* Return: -* currentTD -* -* Reentrant: -* No. -* -*******************************************************************************/ -void USBFS_1_FindReportDescriptor(void) -{ - const T_USBFS_1_LUT CYCODE *pTmp; - volatile uint8 *pDescr; - uint8 interfaceN; - - pTmp = USBFS_1_GetConfigTablePtr(USBFS_1_configuration - 1u); - interfaceN = CY_GET_REG8(USBFS_1_wIndexLo); - /* Third entry in the LUT starts the Interface Table pointers */ - /* Now use the request interface number */ - pTmp = &pTmp[interfaceN + 2u]; - /* USB_DEVICEx_CONFIGURATIONy_INTERFACEz_TABLE */ - pTmp = (const T_USBFS_1_LUT CYCODE *) pTmp->p_list; - /* Now use Alternate setting number */ - pTmp = &pTmp[USBFS_1_interfaceSetting[interfaceN]]; - /* USB_DEVICEx_CONFIGURATIONy_INTERFACEz_ALTERNATEi_HID_TABLE */ - pTmp = (const T_USBFS_1_LUT CYCODE *) pTmp->p_list; - /* Fourth entry in the LUT starts the Hid Report Descriptor */ - pTmp = &pTmp[3u]; - pDescr = (volatile uint8 *)pTmp->p_list; - /* The 1st and 2nd bytes of descriptor contain its length. LSB is 1st. */ - USBFS_1_currentTD.count = (((uint16)pDescr[1u] << 8u) | pDescr[0u]); - USBFS_1_currentTD.pData = &pDescr[2u]; -} - - -/******************************************************************************* -* Function Name: USBFS_1_FindReport -******************************************************************************** -* -* Summary: -* This routine sets up a transfer based on the Interface number, Report Type -* and Report ID, then loads the currentTD structure with the address of the -* buffer and the size. The caller has to decide if it is a control read or -* control write. -* -* Parameters: -* None. -* -* Return: -* currentTD -* -* Reentrant: -* No. -* -*******************************************************************************/ -void USBFS_1_FindReport(void) -{ - const T_USBFS_1_LUT CYCODE *pTmp; - T_USBFS_1_TD *pTD; - uint8 interfaceN; - uint8 reportType; - - /* `#START HID_FINDREPORT` Place custom handling here */ - - /* `#END` */ - USBFS_1_currentTD.count = 0u; /* Init not supported condition */ - pTmp = USBFS_1_GetConfigTablePtr(USBFS_1_configuration - 1u); - reportType = CY_GET_REG8(USBFS_1_wValueHi); - interfaceN = CY_GET_REG8(USBFS_1_wIndexLo); - /* Third entry in the LUT COnfiguration Table starts the Interface Table pointers */ - /* Now use the request interface number */ - pTmp = &pTmp[interfaceN + 2u]; - /* USB_DEVICEx_CONFIGURATIONy_INTERFACEz_TABLE*/ - pTmp = (const T_USBFS_1_LUT CYCODE *) pTmp->p_list; - if(interfaceN < USBFS_1_MAX_INTERFACES_NUMBER) - { - /* Now use Alternate setting number */ - pTmp = &pTmp[USBFS_1_interfaceSetting[interfaceN]]; - /* USB_DEVICEx_CONFIGURATIONy_INTERFACEz_ALTERNATEi_HID_TABLE */ - pTmp = (const T_USBFS_1_LUT CYCODE *) pTmp->p_list; - /* Validate reportType to comply with "7.2.1 Get_Report Request" */ - if((reportType >= USBFS_1_HID_GET_REPORT_INPUT) && - (reportType <= USBFS_1_HID_GET_REPORT_FEATURE)) - { - /* Get the entry proper TD (IN, OUT or Feature Report Table)*/ - pTmp = &pTmp[reportType - 1u]; - reportType = CY_GET_REG8(USBFS_1_wValueLo); /* Get reportID */ - /* Validate table support by the HID descriptor, compare table count with reportID */ - if(pTmp->c >= reportType) - { - pTD = (T_USBFS_1_TD *) pTmp->p_list; - pTD = &pTD[reportType]; /* select entry depend on report ID*/ - USBFS_1_currentTD.pData = pTD->pData; /* Buffer pointer */ - USBFS_1_currentTD.count = pTD->count; /* Buffer Size */ - USBFS_1_currentTD.pStatusBlock = pTD->pStatusBlock; - } - } - } -} - - -/******************************************************************************* -* Additional user functions supporting HID Requests -********************************************************************************/ - -/* `#START HID_FUNCTIONS` Place any additional functions here */ - -/* `#END` */ - -#endif /* End USBFS_1_ENABLE_HID_CLASS */ - - -/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_hid.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_hid.h deleted file mode 100644 index 6217850..0000000 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_hid.h +++ /dev/null @@ -1,64 +0,0 @@ -/******************************************************************************* -* File Name: USBFS_1_hid.h -* Version 2.60 -* -* Description: -* Header File for the USFS component. Contains prototypes and constant values. -* -******************************************************************************** -* Copyright 2008-2013, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - -#if !defined(CY_USBFS_USBFS_1_hid_H) -#define CY_USBFS_USBFS_1_hid_H - -#include "cytypes.h" - - -/*************************************** -* Prototypes of the USBFS_1_hid API. -***************************************/ - -uint8 USBFS_1_UpdateHIDTimer(uint8 interface) ; -uint8 USBFS_1_GetProtocol(uint8 interface) ; - - -/*************************************** -*Renamed Functions for backward compatible -***************************************/ - -#define USBFS_1_bGetProtocol USBFS_1_GetProtocol - - -/*************************************** -* Constants for USBFS_1_hid API. -***************************************/ - -#define USBFS_1_PROTOCOL_BOOT (0x00u) -#define USBFS_1_PROTOCOL_REPORT (0x01u) - -/* Request Types (HID Chapter 7.2) */ -#define USBFS_1_HID_GET_REPORT (0x01u) -#define USBFS_1_HID_GET_IDLE (0x02u) -#define USBFS_1_HID_GET_PROTOCOL (0x03u) -#define USBFS_1_HID_SET_REPORT (0x09u) -#define USBFS_1_HID_SET_IDLE (0x0Au) -#define USBFS_1_HID_SET_PROTOCOL (0x0Bu) - -/* Descriptor Types (HID Chapter 7.1) */ -#define USBFS_1_DESCR_HID_CLASS (0x21u) -#define USBFS_1_DESCR_HID_REPORT (0x22u) -#define USBFS_1_DESCR_HID_PHYSICAL (0x23u) - -/* Report Request Types (HID Chapter 7.2.1) */ -#define USBFS_1_HID_GET_REPORT_INPUT (0x01u) -#define USBFS_1_HID_GET_REPORT_OUTPUT (0x02u) -#define USBFS_1_HID_GET_REPORT_FEATURE (0x03u) - -#endif /* End CY_USBFS_USBFS_1_hid_H */ - - -/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_midi.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_midi.c deleted file mode 100644 index 9b52541..0000000 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_midi.c +++ /dev/null @@ -1,1341 +0,0 @@ -/******************************************************************************* -* File Name: USBFS_1_midi.c -* Version 2.60 -* -* Description: -* MIDI Streaming request handler. -* This file contains routines for sending and receiving MIDI -* messages, and handles running status in both directions. -* -******************************************************************************** -* Copyright 2008-2013, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - -#include "USBFS_1.h" - -#if defined(USBFS_1_ENABLE_MIDI_STREAMING) - -#include "USBFS_1_midi.h" -#include "USBFS_1_pvt.h" - - -/*************************************** -* MIDI Constants -***************************************/ - -#if (USBFS_1_MIDI_EXT_MODE >= USBFS_1_ONE_EXT_INTRF) - /* The Size of the MIDI messages (MIDI Table 4-1) */ - static const uint8 CYCODE USBFS_1_MIDI_SIZE[] = { - /* Miscellaneous function codes(Reserved) */ 0x03u, - /* Cable events (Reserved) */ 0x03u, - /* Two-byte System Common messages */ 0x02u, - /* Three-byte System Common messages */ 0x03u, - /* SysEx starts or continues */ 0x03u, - /* Single-byte System Common Message or - SysEx ends with following single byte */ 0x01u, - /* SysEx ends with following two bytes */ 0x02u, - /* SysEx ends with following three bytes */ 0x03u, - /* Note-off */ 0x03u, - /* Note-on */ 0x03u, - /* Poly-KeyPress */ 0x03u, - /* Control Change */ 0x03u, - /* Program Change */ 0x02u, - /* Channel Pressure */ 0x02u, - /* PitchBend Change */ 0x03u, - /* Single Byte */ 0x01u - }; -#endif /* USBFS_1_MIDI_EXT_MODE >= USBFS_1_ONE_EXT_INTRF */ - - - -/*************************************** -* Global variables -***************************************/ - -#if (USBFS_1_MIDI_IN_BUFF_SIZE > 0) - #if (USBFS_1_MIDI_IN_BUFF_SIZE >= 256) - volatile uint16 USBFS_1_midiInPointer; /* Input endpoint buffer pointer */ - #else - volatile uint8 USBFS_1_midiInPointer; /* Input endpoint buffer pointer */ - #endif /* End USBFS_1_MIDI_IN_BUFF_SIZE >=256 */ - volatile uint8 USBFS_1_midi_in_ep; /* Input endpoint number */ - uint8 USBFS_1_midiInBuffer[USBFS_1_MIDI_IN_BUFF_SIZE]; /* Input endpoint buffer */ -#endif /* USBFS_1_MIDI_IN_BUFF_SIZE > 0 */ - -#if (USBFS_1_MIDI_OUT_BUFF_SIZE > 0) - volatile uint8 USBFS_1_midi_out_ep; /* Output endpoint number */ - uint8 USBFS_1_midiOutBuffer[USBFS_1_MIDI_OUT_BUFF_SIZE]; /* Output endpoint buffer */ -#endif /* USBFS_1_MIDI_OUT_BUFF_SIZE > 0 */ - -#if (USBFS_1_MIDI_EXT_MODE >= USBFS_1_ONE_EXT_INTRF) - static USBFS_1_MIDI_RX_STATUS USBFS_1_MIDI1_Event; /* MIDI RX status structure */ - static volatile uint8 USBFS_1_MIDI1_TxRunStat; /* MIDI Output running status */ - volatile uint8 USBFS_1_MIDI1_InqFlags; /* Device inquiry flag */ - - #if (USBFS_1_MIDI_EXT_MODE >= USBFS_1_TWO_EXT_INTRF) - static USBFS_1_MIDI_RX_STATUS USBFS_1_MIDI2_Event; /* MIDI RX status structure */ - static volatile uint8 USBFS_1_MIDI2_TxRunStat; /* MIDI Output running status */ - volatile uint8 USBFS_1_MIDI2_InqFlags; /* Device inquiry flag */ - #endif /* End USBFS_1_MIDI_EXT_MODE >= USBFS_1_TWO_EXT_INTRF */ -#endif /* End USBFS_1_MIDI_EXT_MODE >= USBFS_1_ONE_EXT_INTRF */ - - -/*************************************** -* Custom Declarations -***************************************/ - -/* `#START MIDI_CUSTOM_DECLARATIONS` Place your declaration here */ - -/* `#END` */ - - -/*************************************** -* Optional MIDI APIs -***************************************/ -#if (USBFS_1_ENABLE_MIDI_API != 0u) - - -/******************************************************************************* -* Function Name: USBFS_1_MIDI_EP_Init -******************************************************************************** -* -* Summary: -* This function initializes the MIDI interface and UART(s) to be ready to -* receive data from the PC and MIDI ports. -* -* Parameters: -* None -* -* Return: -* None -* -* Global variables: -* USBFS_1_midiInBuffer: This buffer is used for saving and combining -* the received data from UART(s) and(or) generated internally by -* PutUsbMidiIn() function messages. USBFS_1_MIDI_IN_EP_Service() -* function transfers the data from this buffer to the PC. -* USBFS_1_midiOutBuffer: This buffer is used by the -* USBFS_1_MIDI_OUT_EP_Service() function for saving the received -* from the PC data, then the data are parsed and transferred to UART(s) -* buffer and to the internal processing by the -* USBFS_1_callbackLocalMidiEvent function. -* USBFS_1_midi_out_ep: Used as an OUT endpoint number. -* USBFS_1_midi_in_ep: Used as an IN endpoint number. -* USBFS_1_midiInPointer: Initialized to zero. -* -* Reentrant: -* No -* -*******************************************************************************/ -void USBFS_1_MIDI_EP_Init(void) -{ - #if (USBFS_1_MIDI_IN_BUFF_SIZE > 0) - USBFS_1_midiInPointer = 0u; - #endif /* USBFS_1_MIDI_IN_BUFF_SIZE > 0 */ - - #if(USBFS_1_EP_MM == USBFS_1__EP_DMAAUTO) - #if (USBFS_1_MIDI_IN_BUFF_SIZE > 0) - /* Init DMA configurations for IN EP*/ - USBFS_1_LoadInEP(USBFS_1_midi_in_ep, USBFS_1_midiInBuffer, - USBFS_1_MIDI_IN_BUFF_SIZE); - - #endif /* USBFS_1_MIDI_IN_BUFF_SIZE > 0 */ - #if (USBFS_1_MIDI_OUT_BUFF_SIZE > 0) - /* Init DMA configurations for OUT EP*/ - (void)USBFS_1_ReadOutEP(USBFS_1_midi_out_ep, USBFS_1_midiOutBuffer, - USBFS_1_MIDI_OUT_BUFF_SIZE); - #endif /*USBFS_1_MIDI_OUT_BUFF_SIZE > 0 */ - #endif /* End USBFS_1__EP_DMAAUTO */ - - #if (USBFS_1_MIDI_OUT_BUFF_SIZE > 0) - USBFS_1_EnableOutEP(USBFS_1_midi_out_ep); - #endif /* USBFS_1_MIDI_OUT_BUFF_SIZE > 0 */ - - /* Initialize the MIDI port(s) */ - #if (USBFS_1_MIDI_EXT_MODE >= USBFS_1_ONE_EXT_INTRF) - USBFS_1_MIDI_Init(); - #endif /* USBFS_1_MIDI_EXT_MODE >= USBFS_1_ONE_EXT_INTRF */ -} - -#if (USBFS_1_MIDI_OUT_BUFF_SIZE > 0) - - - /******************************************************************************* - * Function Name: USBFS_1_MIDI_OUT_EP_Service - ******************************************************************************** - * - * Summary: - * Services the USB MIDI OUT endpoints. - * This function is called from OUT EP ISR. It transfers the received from PC - * data to the external MIDI port(UART TX buffer) and calls the - * USBFS_1_callbackLocalMidiEvent() function to internal process - * of the MIDI data. - * This function is blocked by UART, if not enough space is available in UART - * TX buffer. Therefore it is recommended to use large UART TX buffer size. - * - * Parameters: - * None - * - * Return: - * None - * - * Global variables: - * USBFS_1_midiOutBuffer: Used as temporary buffer between USB internal - * memory and UART TX buffer. - * USBFS_1_midi_out_ep: Used as an OUT endpoint number. - * - * Reentrant: - * No - * - *******************************************************************************/ - void USBFS_1_MIDI_OUT_EP_Service(void) - { - #if USBFS_1_MIDI_OUT_BUFF_SIZE >= 256 - uint16 outLength; - uint16 outPointer; - #else - uint8 outLength; - uint8 outPointer; - #endif /* End USBFS_1_MIDI_OUT_BUFF_SIZE >=256 */ - - uint8 dmaState = 0u; - - /* Service the USB MIDI output endpoint */ - if (USBFS_1_GetEPState(USBFS_1_midi_out_ep) == USBFS_1_OUT_BUFFER_FULL) - { - #if USBFS_1_MIDI_OUT_BUFF_SIZE >= 256 - outLength = USBFS_1_GetEPCount(USBFS_1_midi_out_ep); - #else - outLength = (uint8)USBFS_1_GetEPCount(USBFS_1_midi_out_ep); - #endif /* End USBFS_1_MIDI_OUT_BUFF_SIZE >= 256 */ - #if(USBFS_1_EP_MM != USBFS_1__EP_DMAAUTO) - #if USBFS_1_MIDI_OUT_BUFF_SIZE >= 256 - outLength = USBFS_1_ReadOutEP(USBFS_1_midi_out_ep, - USBFS_1_midiOutBuffer, outLength); - #else - outLength = (uint8)USBFS_1_ReadOutEP(USBFS_1_midi_out_ep, - USBFS_1_midiOutBuffer, (uint16)outLength); - #endif /* End USBFS_1_MIDI_OUT_BUFF_SIZE >= 256 */ - #if(USBFS_1_EP_MM == USBFS_1__EP_DMAMANUAL) - do /* wait for DMA transfer complete */ - { - (void)CyDmaChStatus(USBFS_1_DmaChan[USBFS_1_midi_out_ep], NULL, &dmaState); - }while((dmaState & (STATUS_TD_ACTIVE | STATUS_CHAIN_ACTIVE)) != 0u); - #endif /* End USBFS_EP_MM == USBFS__EP_DMAMANUAL */ - #endif /* End USBFS_1_EP_MM != USBFS_1__EP_DMAAUTO */ - if(dmaState != 0u) - { - /* Suppress compiler warning */ - } - if (outLength >= USBFS_1_EVENT_LENGTH) - { - outPointer = 0u; - while (outPointer < outLength) - { - /* In some OS OUT packet could be appended by nulls which could be skipped */ - if (USBFS_1_midiOutBuffer[outPointer] == 0u) - { - break; - } - /* Route USB MIDI to the External connection */ - #if (USBFS_1_MIDI_EXT_MODE >= USBFS_1_ONE_EXT_INTRF) - if ((USBFS_1_midiOutBuffer[outPointer] & USBFS_1_CABLE_MASK) == - USBFS_1_MIDI_CABLE_00) - { - USBFS_1_MIDI1_ProcessUsbOut(&USBFS_1_midiOutBuffer[outPointer]); - } - else if ((USBFS_1_midiOutBuffer[outPointer] & USBFS_1_CABLE_MASK) == - USBFS_1_MIDI_CABLE_01) - { - #if (USBFS_1_MIDI_EXT_MODE >= USBFS_1_TWO_EXT_INTRF) - USBFS_1_MIDI2_ProcessUsbOut(&USBFS_1_midiOutBuffer[outPointer]); - #endif /* End USBFS_1_MIDI_EXT_MODE >= USBFS_1_TWO_EXT_INTRF */ - } - else - { - /* `#START CUSTOM_MIDI_OUT_EP_SERV` Place your code here */ - - /* `#END` */ - } - #endif /* End USBFS_1_MIDI_EXT_MODE >= USBFS_1_ONE_EXT_INTRF */ - - /* Process any local MIDI output functions */ - USBFS_1_callbackLocalMidiEvent( - USBFS_1_midiOutBuffer[outPointer] & USBFS_1_CABLE_MASK, - &USBFS_1_midiOutBuffer[outPointer + USBFS_1_EVENT_BYTE1]); - outPointer += USBFS_1_EVENT_LENGTH; - } - } - #if(USBFS_1_EP_MM == USBFS_1__EP_DMAAUTO) - /* Enable Out EP*/ - USBFS_1_EnableOutEP(USBFS_1_midi_out_ep); - #endif /* End USBFS_1_EP_MM == USBFS_1__EP_DMAAUTO */ - } - } - -#endif /* #if (USBFS_1_MIDI_OUT_BUFF_SIZE > 0) */ - -#if (USBFS_1_MIDI_IN_BUFF_SIZE > 0) - - - /******************************************************************************* - * Function Name: USBFS_1_MIDI_IN_EP_Service - ******************************************************************************** - * - * Summary: - * Services the USB MIDI IN endpoint. Non-blocking. - * Checks that previous packet was processed by HOST, otherwise service the - * input endpoint on the subsequent call. It is called from the - * USBFS_1_MIDI_IN_Service() and from the - * USBFS_1_PutUsbMidiIn() function. - * - * Parameters: - * None - * - * Return: - * None - * - * Global variables: - * USBFS_1_midi_in_ep: Used as an IN endpoint number. - * USBFS_1_midiInBuffer: Function loads the data from this buffer to - * the USB IN endpoint. - * USBFS_1_midiInPointer: Cleared to zero when data are sent. - * - * Reentrant: - * No - * - *******************************************************************************/ - void USBFS_1_MIDI_IN_EP_Service(void) - { - /* Service the USB MIDI input endpoint */ - /* Check that previous packet was processed by HOST, otherwise service the USB later */ - if (USBFS_1_midiInPointer != 0u) - { - if(USBFS_1_GetEPState(USBFS_1_midi_in_ep) == USBFS_1_EVENT_PENDING) - { - #if(USBFS_1_EP_MM != USBFS_1__EP_DMAAUTO) - USBFS_1_LoadInEP(USBFS_1_midi_in_ep, USBFS_1_midiInBuffer, - (uint16)USBFS_1_midiInPointer); - #else /* USBFS_1_EP_MM != USBFS_1__EP_DMAAUTO */ - /* rearm IN EP */ - USBFS_1_LoadInEP(USBFS_1_midi_in_ep, NULL, (uint16)USBFS_1_midiInPointer); - #endif /* End USBFS_1_EP_MM != USBFS_1__EP_DMAAUTO*/ - - /* Clear the midiInPointer. For DMA mode, clear this pointer in the ARB ISR when data are moved by DMA */ - #if(USBFS_1_EP_MM == USBFS_1__EP_MANUAL) - USBFS_1_midiInPointer = 0u; - #endif /* USBFS_1_EP_MM == USBFS_1__EP_MANUAL */ - } - } - } - - - /******************************************************************************* - * Function Name: USBFS_1_MIDI_IN_Service - ******************************************************************************** - * - * Summary: - * Services the traffic from the MIDI input ports (RX UART) and prepare data - * in USB MIDI IN endpoint buffer. - * Calls the USBFS_1_MIDI_IN_EP_Service() function to sent the - * data from buffer to PC. Non-blocking. Should be called from main foreground - * task. - * This function is not protected from the reentrant calls. When it is required - * to use this function in UART RX ISR to guaranty low latency, care should be - * taken to protect from reentrant calls. - * - * Parameters: - * None - * - * Return: - * None - * - * Global variables: - * USBFS_1_midiInPointer: Cleared to zero when data are sent. - * - * Reentrant: - * No - * - *******************************************************************************/ - void USBFS_1_MIDI_IN_Service(void) - { - /* Service the MIDI UART inputs until either both receivers have no more - * events or until the input endpoint buffer fills up. - */ - #if (USBFS_1_MIDI_EXT_MODE >= USBFS_1_ONE_EXT_INTRF) - uint8 m1 = 0u; - uint8 m2 = 0u; - do - { - if (USBFS_1_midiInPointer <= (USBFS_1_MIDI_IN_BUFF_SIZE - USBFS_1_EVENT_LENGTH)) - { - /* Check MIDI1 input port for a complete event */ - m1 = USBFS_1_MIDI1_GetEvent(); - if (m1 != 0u) - { - USBFS_1_PrepareInBuffer(m1, (uint8 *)&USBFS_1_MIDI1_Event.msgBuff[0], - USBFS_1_MIDI1_Event.size, USBFS_1_MIDI_CABLE_00); - } - } - - #if (USBFS_1_MIDI_EXT_MODE >= USBFS_1_TWO_EXT_INTRF) - if (USBFS_1_midiInPointer <= (USBFS_1_MIDI_IN_BUFF_SIZE - USBFS_1_EVENT_LENGTH)) - { - /* Check MIDI2 input port for a complete event */ - m2 = USBFS_1_MIDI2_GetEvent(); - if (m2 != 0u) - { - USBFS_1_PrepareInBuffer(m2, (uint8 *)&USBFS_1_MIDI2_Event.msgBuff[0], - USBFS_1_MIDI2_Event.size, USBFS_1_MIDI_CABLE_01); - } - } - #endif /* End USBFS_1_MIDI_EXT_MODE >= USBFS_1_TWO_EXT_INTRF */ - - }while( (USBFS_1_midiInPointer <= (USBFS_1_MIDI_IN_BUFF_SIZE - USBFS_1_EVENT_LENGTH)) - && ((m1 != 0u) || (m2 != 0u)) ); - #endif /* End USBFS_1_MIDI_EXT_MODE >= USBFS_1_ONE_EXT_INTRF */ - - /* Service the USB MIDI input endpoint */ - USBFS_1_MIDI_IN_EP_Service(); - } - - - /******************************************************************************* - * Function Name: USBFS_1_PutUsbMidiIn - ******************************************************************************** - * - * Summary: - * Puts one MIDI messages into the USB MIDI In endpoint buffer. These are - * MIDI input messages to the host. This function is only used if the device - * has internal MIDI input functionality. USBMIDI_MIDI_IN_Service() function - * should additionally be called to send the message from local buffer to - * IN endpoint. - * - * Parameters: - * ic: 0 = No message (should never happen) - * 1 - 3 = Complete MIDI message in midiMsg - * 3 - IN EP LENGTH = Complete SySEx message(without EOSEX byte) in - * midiMsg. The length is limited by the max BULK EP size(64) - * MIDI_SYSEX = Start or continuation of SysEx message - * (put event bytes in midiMsg buffer) - * MIDI_EOSEX = End of SysEx message - * (put event bytes in midiMsg buffer) - * MIDI_TUNEREQ = Tune Request message (single byte system common msg) - * 0xf8 - 0xff = Single byte real-time message - * midiMsg: pointer to MIDI message. - * cable: cable number. - * - * Return: - * USBFS_1_TRUE if error. - * USBFS_1_FALSE if success. - * - * Global variables: - * USBFS_1_midi_in_ep: MIDI IN endpoint number used for sending data. - * USBFS_1_midiInPointer: Checked this variable to see if there is - * enough free space in the IN endpoint buffer. If buffer is full, initiate - * sending to PC. - * - * Reentrant: - * No - * - *******************************************************************************/ - uint8 USBFS_1_PutUsbMidiIn(uint8 ic, const uint8 midiMsg[], uint8 cable) - - { - uint8 retError = USBFS_1_FALSE; - uint8 msgIndex; - - /* Protect PrepareInBuffer() function from concurrent calls */ - #if (USBFS_1_MIDI_EXT_MODE >= USBFS_1_ONE_EXT_INTRF) - MIDI1_UART_DisableRxInt(); - #if (USBFS_1_MIDI_EXT_MODE >= USBFS_1_TWO_EXT_INTRF) - MIDI2_UART_DisableRxInt(); - #endif /* End USBFS_1_MIDI_EXT_MODE >= USBFS_1_TWO_EXT_INTRF */ - #endif /* End USBFS_1_MIDI_EXT_MODE >= USBFS_1_ONE_EXT_INTRF */ - - if (USBFS_1_midiInPointer > - (USBFS_1_EP[USBFS_1_midi_in_ep].bufferSize - USBFS_1_EVENT_LENGTH)) - { - USBFS_1_MIDI_IN_EP_Service(); - } - if (USBFS_1_midiInPointer <= - (USBFS_1_EP[USBFS_1_midi_in_ep].bufferSize - USBFS_1_EVENT_LENGTH)) - { - if((ic < USBFS_1_EVENT_LENGTH) || (ic >= USBFS_1_MIDI_STATUS_MASK)) - { - USBFS_1_PrepareInBuffer(ic, midiMsg, ic, cable); - } - else - { /* Only SysEx message is greater than 4 bytes */ - msgIndex = 0u; - do - { - USBFS_1_PrepareInBuffer(USBFS_1_MIDI_SYSEX, &midiMsg[msgIndex], - USBFS_1_EVENT_BYTE3, cable); - ic -= USBFS_1_EVENT_BYTE3; - msgIndex += USBFS_1_EVENT_BYTE3; - if (USBFS_1_midiInPointer > - (USBFS_1_EP[USBFS_1_midi_in_ep].bufferSize - USBFS_1_EVENT_LENGTH)) - { - USBFS_1_MIDI_IN_EP_Service(); - if (USBFS_1_midiInPointer > - (USBFS_1_EP[USBFS_1_midi_in_ep].bufferSize - USBFS_1_EVENT_LENGTH)) - { - /* Error condition. HOST is not ready to receive this packet. */ - retError = USBFS_1_TRUE; - break; - } - } - }while(ic > USBFS_1_EVENT_BYTE3); - - if(retError == USBFS_1_FALSE) - { - USBFS_1_PrepareInBuffer(USBFS_1_MIDI_EOSEX, midiMsg, ic, cable); - } - } - } - else - { - /* Error condition. HOST is not ready to receive this packet. */ - retError = USBFS_1_TRUE; - } - - #if (USBFS_1_MIDI_EXT_MODE >= USBFS_1_ONE_EXT_INTRF) - MIDI1_UART_EnableRxInt(); - #if (USBFS_1_MIDI_EXT_MODE >= USBFS_1_TWO_EXT_INTRF) - MIDI2_UART_EnableRxInt(); - #endif /* End USBFS_1_MIDI_EXT_MODE >= USBFS_1_TWO_EXT_INTRF */ - #endif /* End USBFS_1_MIDI_EXT_MODE >= USBFS_1_ONE_EXT_INTRF */ - - return (retError); - } - - - /******************************************************************************* - * Function Name: USBFS_1_PrepareInBuffer - ******************************************************************************** - * - * Summary: - * Builds a USB MIDI event in the input endpoint buffer at the current pointer. - * Puts one MIDI message into the USB MIDI In endpoint buffer. - * - * Parameters: - * ic: 0 = No message (should never happen) - * 1 - 3 = Complete MIDI message at pMdat[0] - * MIDI_SYSEX = Start or continuation of SysEx message - * (put eventLen bytes in buffer) - * MIDI_EOSEX = End of SysEx message - * (put eventLen bytes in buffer, - * and append MIDI_EOSEX) - * MIDI_TUNEREQ = Tune Request message (single byte system common msg) - * 0xf8 - 0xff = Single byte real-time message - * - * srcBuff: pointer to MIDI data - * eventLen: number of bytes in MIDI event - * cable: MIDI source port number - * - * Return: - * None - * - * Global variables: - * USBFS_1_midiInBuffer: This buffer is used for saving and combine the - * received from UART(s) and(or) generated internally by - * USBFS_1_PutUsbMidiIn() function messages. - * USBFS_1_midiInPointer: Used as an index for midiInBuffer to - * write data. - * - * Reentrant: - * No - * - *******************************************************************************/ - void USBFS_1_PrepareInBuffer(uint8 ic, const uint8 srcBuff[], uint8 eventLen, uint8 cable) - - { - uint8 srcBuffZero; - uint8 srcBuffOne; - - srcBuffZero = srcBuff[0u]; - srcBuffOne = srcBuff[1u]; - - if (ic >= (USBFS_1_MIDI_STATUS_MASK | USBFS_1_MIDI_SINGLE_BYTE_MASK)) - { - USBFS_1_midiInBuffer[USBFS_1_midiInPointer] = USBFS_1_SINGLE_BYTE | cable; - USBFS_1_midiInPointer++; - USBFS_1_midiInBuffer[USBFS_1_midiInPointer] = ic; - USBFS_1_midiInPointer++; - USBFS_1_midiInBuffer[USBFS_1_midiInPointer] = 0u; - USBFS_1_midiInPointer++; - USBFS_1_midiInBuffer[USBFS_1_midiInPointer] = 0u; - USBFS_1_midiInPointer++; - } - else if((ic < USBFS_1_EVENT_LENGTH) || (ic == USBFS_1_MIDI_SYSEX)) - { - if(ic == USBFS_1_MIDI_SYSEX) - { - USBFS_1_midiInBuffer[USBFS_1_midiInPointer] = USBFS_1_SYSEX | cable; - USBFS_1_midiInPointer++; - } - else if (srcBuffZero < USBFS_1_MIDI_SYSEX) - { - USBFS_1_midiInBuffer[USBFS_1_midiInPointer] = (srcBuffZero >> 4u) | cable; - USBFS_1_midiInPointer++; - } - else if (srcBuffZero == USBFS_1_MIDI_TUNEREQ) - { - USBFS_1_midiInBuffer[USBFS_1_midiInPointer] = USBFS_1_1BYTE_COMMON | cable; - USBFS_1_midiInPointer++; - } - else if ((srcBuffZero == USBFS_1_MIDI_QFM) || (srcBuffZero == USBFS_1_MIDI_SONGSEL)) - { - USBFS_1_midiInBuffer[USBFS_1_midiInPointer] = USBFS_1_2BYTE_COMMON | cable; - USBFS_1_midiInPointer++; - } - else if (srcBuffZero == USBFS_1_MIDI_SPP) - { - USBFS_1_midiInBuffer[USBFS_1_midiInPointer] = USBFS_1_3BYTE_COMMON | cable; - USBFS_1_midiInPointer++; - } - else - { - } - - USBFS_1_midiInBuffer[USBFS_1_midiInPointer] = srcBuffZero; - USBFS_1_midiInPointer++; - USBFS_1_midiInBuffer[USBFS_1_midiInPointer] = srcBuffOne; - USBFS_1_midiInPointer++; - USBFS_1_midiInBuffer[USBFS_1_midiInPointer] = srcBuff[2u]; - USBFS_1_midiInPointer++; - } - else if (ic == USBFS_1_MIDI_EOSEX) - { - switch (eventLen) - { - case 0u: - USBFS_1_midiInBuffer[USBFS_1_midiInPointer] = - USBFS_1_SYSEX_ENDS_WITH1 | cable; - USBFS_1_midiInPointer++; - USBFS_1_midiInBuffer[USBFS_1_midiInPointer] = USBFS_1_MIDI_EOSEX; - USBFS_1_midiInPointer++; - USBFS_1_midiInBuffer[USBFS_1_midiInPointer] = 0u; - USBFS_1_midiInPointer++; - USBFS_1_midiInBuffer[USBFS_1_midiInPointer] = 0u; - USBFS_1_midiInPointer++; - break; - case 1u: - USBFS_1_midiInBuffer[USBFS_1_midiInPointer] = - USBFS_1_SYSEX_ENDS_WITH2 | cable; - USBFS_1_midiInPointer++; - USBFS_1_midiInBuffer[USBFS_1_midiInPointer] = srcBuffZero; - USBFS_1_midiInPointer++; - USBFS_1_midiInBuffer[USBFS_1_midiInPointer] = USBFS_1_MIDI_EOSEX; - USBFS_1_midiInPointer++; - USBFS_1_midiInBuffer[USBFS_1_midiInPointer] = 0u; - USBFS_1_midiInPointer++; - break; - case 2u: - USBFS_1_midiInBuffer[USBFS_1_midiInPointer] = - USBFS_1_SYSEX_ENDS_WITH3 | cable; - USBFS_1_midiInPointer++; - USBFS_1_midiInBuffer[USBFS_1_midiInPointer] = srcBuffZero; - USBFS_1_midiInPointer++; - USBFS_1_midiInBuffer[USBFS_1_midiInPointer] = srcBuffOne; - USBFS_1_midiInPointer++; - USBFS_1_midiInBuffer[USBFS_1_midiInPointer] = USBFS_1_MIDI_EOSEX; - USBFS_1_midiInPointer++; - break; - default: - break; - } - } - else - { - } - } - -#endif /* #if (USBFS_1_MIDI_IN_BUFF_SIZE > 0) */ - - -/* The implementation for external serial input and output connections -* to route USB MIDI data to and from those connections. -*/ -#if (USBFS_1_MIDI_EXT_MODE >= USBFS_1_ONE_EXT_INTRF) - - - /******************************************************************************* - * Function Name: USBFS_1_MIDI_Init - ******************************************************************************** - * - * Summary: - * Initializes MIDI variables and starts the UART(s) hardware block(s). - * - * Parameters: - * None - * - * Return: - * None - * - * Side Effects: - * Change the priority of the UART(s) TX interrupts to be higher than the - * default EP ISR priority. - * - * Global variables: - * USBFS_1_MIDI_Event: initialized to zero. - * USBFS_1_MIDI_TxRunStat: initialized to zero. - * - *******************************************************************************/ - void USBFS_1_MIDI_Init(void) - { - USBFS_1_MIDI1_Event.length = 0u; - USBFS_1_MIDI1_Event.count = 0u; - USBFS_1_MIDI1_Event.size = 0u; - USBFS_1_MIDI1_Event.runstat = 0u; - USBFS_1_MIDI1_TxRunStat = 0u; - USBFS_1_MIDI1_InqFlags = 0u; - /* Start UART block */ - MIDI1_UART_Start(); - /* Change the priority of the UART TX and RX interrupt */ - CyIntSetPriority(MIDI1_UART_TX_VECT_NUM, USBFS_1_CUSTOM_UART_TX_PRIOR_NUM); - CyIntSetPriority(MIDI1_UART_RX_VECT_NUM, USBFS_1_CUSTOM_UART_RX_PRIOR_NUM); - - #if (USBFS_1_MIDI_EXT_MODE >= USBFS_1_TWO_EXT_INTRF) - USBFS_1_MIDI2_Event.length = 0u; - USBFS_1_MIDI2_Event.count = 0u; - USBFS_1_MIDI2_Event.size = 0u; - USBFS_1_MIDI2_Event.runstat = 0u; - USBFS_1_MIDI2_TxRunStat = 0u; - USBFS_1_MIDI2_InqFlags = 0u; - /* Start second UART block */ - MIDI2_UART_Start(); - /* Change the priority of the UART TX interrupt */ - CyIntSetPriority(MIDI2_UART_TX_VECT_NUM, USBFS_1_CUSTOM_UART_TX_PRIOR_NUM); - CyIntSetPriority(MIDI2_UART_RX_VECT_NUM, USBFS_1_CUSTOM_UART_RX_PRIOR_NUM); - #endif /* End USBFS_1_MIDI_EXT_MODE >= USBFS_1_TWO_EXT_INTRF*/ - - /* `#START MIDI_INIT_CUSTOM` Init other extended UARTs here */ - - /* `#END` */ - - } - - - /******************************************************************************* - * Function Name: USBFS_1_ProcessMidiIn - ******************************************************************************** - * - * Summary: - * Processes one byte of incoming MIDI data. - * - * Parameters: - * mData = current MIDI input data byte - * *rxStat = pointer to a MIDI_RX_STATUS structure - * - * Return: - * 0, if no complete message - * 1 - 4, if message complete - * MIDI_SYSEX, if start or continuation of system exclusive - * MIDI_EOSEX, if end of system exclusive - * 0xf8 - 0xff, if single byte real time message - * - *******************************************************************************/ - uint8 USBFS_1_ProcessMidiIn(uint8 mData, USBFS_1_MIDI_RX_STATUS *rxStat) - - { - uint8 midiReturn = 0u; - - /* Check for a MIDI status byte. All status bytes, except real time messages, - * which are a single byte, force the start of a new buffer cycle. - */ - if ((mData & USBFS_1_MIDI_STATUS_BYTE_MASK) != 0u) - { - if ((mData & USBFS_1_MIDI_STATUS_MASK) == USBFS_1_MIDI_STATUS_MASK) - { - if ((mData & USBFS_1_MIDI_SINGLE_BYTE_MASK) != 0u) /* System Real-Time Messages(single byte) */ - { - midiReturn = mData; - } - else /* System Common Messages */ - { - switch (mData) - { - case USBFS_1_MIDI_SYSEX: - rxStat->msgBuff[0u] = USBFS_1_MIDI_SYSEX; - rxStat->runstat = USBFS_1_MIDI_SYSEX; - rxStat->count = 1u; - rxStat->length = 3u; - break; - case USBFS_1_MIDI_EOSEX: - rxStat->runstat = 0u; - rxStat->size = rxStat->count; - rxStat->count = 0u; - midiReturn = USBFS_1_MIDI_EOSEX; - break; - case USBFS_1_MIDI_SPP: - rxStat->msgBuff[0u] = USBFS_1_MIDI_SPP; - rxStat->runstat = 0u; - rxStat->count = 1u; - rxStat->length = 3u; - break; - case USBFS_1_MIDI_SONGSEL: - rxStat->msgBuff[0u] = USBFS_1_MIDI_SONGSEL; - rxStat->runstat = 0u; - rxStat->count = 1u; - rxStat->length = 2u; - break; - case USBFS_1_MIDI_QFM: - rxStat->msgBuff[0u] = USBFS_1_MIDI_QFM; - rxStat->runstat = 0u; - rxStat->count = 1u; - rxStat->length = 2u; - break; - case USBFS_1_MIDI_TUNEREQ: - rxStat->msgBuff[0u] = USBFS_1_MIDI_TUNEREQ; - rxStat->runstat = 0u; - rxStat->size = 1u; - rxStat->count = 0u; - midiReturn = rxStat->size; - break; - default: - break; - } - } - } - else /* Channel Messages */ - { - rxStat->msgBuff[0u] = mData; - rxStat->runstat = mData; - rxStat->count = 1u; - switch (mData & USBFS_1_MIDI_STATUS_MASK) - { - case USBFS_1_MIDI_NOTE_OFF: - case USBFS_1_MIDI_NOTE_ON: - case USBFS_1_MIDI_POLY_KEY_PRESSURE: - case USBFS_1_MIDI_CONTROL_CHANGE: - case USBFS_1_MIDI_PITCH_BEND_CHANGE: - rxStat->length = 3u; - break; - case USBFS_1_MIDI_PROGRAM_CHANGE: - case USBFS_1_MIDI_CHANNEL_PRESSURE: - rxStat->length = 2u; - break; - default: - rxStat->runstat = 0u; - rxStat->count = 0u; - break; - } - } - } - - /* Otherwise, it's a data byte */ - else - { - if (rxStat->runstat == USBFS_1_MIDI_SYSEX) - { - rxStat->msgBuff[rxStat->count] = mData; - rxStat->count++; - if (rxStat->count >= rxStat->length) - { - rxStat->size = rxStat->count; - rxStat->count = 0u; - midiReturn = USBFS_1_MIDI_SYSEX; - } - } - else if (rxStat->count > 0u) - { - rxStat->msgBuff[rxStat->count] = mData; - rxStat->count++; - if (rxStat->count >= rxStat->length) - { - rxStat->size = rxStat->count; - rxStat->count = 0u; - midiReturn = rxStat->size; - } - } - else if (rxStat->runstat != 0u) - { - rxStat->msgBuff[0u] = rxStat->runstat; - rxStat->msgBuff[1u] = mData; - rxStat->count = 2u; - switch (rxStat->runstat & USBFS_1_MIDI_STATUS_MASK) - { - case USBFS_1_MIDI_NOTE_OFF: - case USBFS_1_MIDI_NOTE_ON: - case USBFS_1_MIDI_POLY_KEY_PRESSURE: - case USBFS_1_MIDI_CONTROL_CHANGE: - case USBFS_1_MIDI_PITCH_BEND_CHANGE: - rxStat->length = 3u; - break; - case USBFS_1_MIDI_PROGRAM_CHANGE: - case USBFS_1_MIDI_CHANNEL_PRESSURE: - rxStat->size =rxStat->count; - rxStat->count = 0u; - midiReturn = rxStat->size; - break; - default: - rxStat->count = 0u; - break; - } - } - else - { - } - } - return (midiReturn); - } - - - /******************************************************************************* - * Function Name: USBFS_1_MIDI1_GetEvent - ******************************************************************************** - * - * Summary: - * Checks for incoming MIDI data, calls the MIDI event builder if so. - * Returns either empty or with a complete event. - * - * Parameters: - * None - * - * Return: - * 0, if no complete message - * 1 - 4, if message complete - * MIDI_SYSEX, if start or continuation of system exclusive - * MIDI_EOSEX, if end of system exclusive - * 0xf8 - 0xff, if single byte real time message - * - * Global variables: - * USBFS_1_MIDI1_Event: RX status structure used to parse received - * data. - * - *******************************************************************************/ - uint8 USBFS_1_MIDI1_GetEvent(void) - { - uint8 msgRtn = 0u; - uint8 rxData; - #if (MIDI1_UART_RXBUFFERSIZE >= 256u) - uint16 rxBufferRead; - #if CY_PSOC3 /* This local variable is required only for PSOC3 and large buffer */ - uint16 rxBufferWrite; - #endif /* end CY_PSOC3 */ - #else - uint8 rxBufferRead; - #endif /* End MIDI1_UART_RXBUFFERSIZE >= 256 */ - uint8 rxBufferLoopDetect; - /* Read buffer loop condition to the local variable */ - rxBufferLoopDetect = MIDI1_UART_rxBufferLoopDetect; - - if ( (MIDI1_UART_rxBufferRead != MIDI1_UART_rxBufferWrite) || (rxBufferLoopDetect != 0u) ) - { - /* Protect variables that could change on interrupt by disabling Rx interrupt.*/ - #if ((MIDI1_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3)) - CyIntDisable(MIDI1_UART_RX_VECT_NUM); - #endif /* End MIDI1_UART_RXBUFFERSIZE >= 256 */ - rxBufferRead = MIDI1_UART_rxBufferRead; - #if ((MIDI1_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3)) - rxBufferWrite = MIDI1_UART_rxBufferWrite; - CyIntEnable(MIDI1_UART_RX_VECT_NUM); - #endif /* End MIDI1_UART_RXBUFFERSIZE >= 256 */ - - /* Stay here until either the buffer is empty or we have a complete message - * in the message buffer. Note that we must use a temporary buffer pointer - * since it takes two instructions to increment with a wrap, and we can't - * risk doing that with the real pointer and getting an interrupt in between - * instructions. - */ - - #if ((MIDI1_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3)) - while ( ((rxBufferRead != rxBufferWrite) || (rxBufferLoopDetect != 0u)) && (msgRtn == 0u) ) - #else - while ( ((rxBufferRead != MIDI1_UART_rxBufferWrite) || (rxBufferLoopDetect != 0u)) && (msgRtn == 0u) ) - #endif /* End MIDI1_UART_RXBUFFERSIZE >= 256 && CY_PSOC3 */ - { - rxData = MIDI1_UART_rxBuffer[rxBufferRead]; - /* Increment pointer with a wrap */ - rxBufferRead++; - if(rxBufferRead >= MIDI1_UART_RXBUFFERSIZE) - { - rxBufferRead = 0u; - } - /* If loop condition was set - update real read buffer pointer - * to avoid overflow status - */ - if(rxBufferLoopDetect != 0u ) - { - MIDI1_UART_rxBufferLoopDetect = 0u; - #if ((MIDI1_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3)) - CyIntDisable(MIDI1_UART_RX_VECT_NUM); - #endif /* End MIDI1_UART_RXBUFFERSIZE >= 256 */ - MIDI1_UART_rxBufferRead = rxBufferRead; - #if ((MIDI1_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3)) - CyIntEnable(MIDI1_UART_RX_VECT_NUM); - #endif /* End MIDI1_UART_RXBUFFERSIZE >= 256 */ - } - - msgRtn = USBFS_1_ProcessMidiIn(rxData, - (USBFS_1_MIDI_RX_STATUS *)&USBFS_1_MIDI1_Event); - - /* Read buffer loop condition to the local variable */ - rxBufferLoopDetect = MIDI1_UART_rxBufferLoopDetect; - } - - /* Finally, update the real output pointer, then return with - * an indication as to whether there's a complete message in the buffer. - */ - #if ((MIDI1_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3)) - CyIntDisable(MIDI1_UART_RX_VECT_NUM); - #endif /* End MIDI1_UART_RXBUFFERSIZE >= 256 */ - MIDI1_UART_rxBufferRead = rxBufferRead; - #if ((MIDI1_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3)) - CyIntEnable(MIDI1_UART_RX_VECT_NUM); - #endif /* End MIDI1_UART_RXBUFFERSIZE >= 256 */ - } - - return (msgRtn); - } - - - /******************************************************************************* - * Function Name: USBFS_1_MIDI1_ProcessUsbOut - ******************************************************************************** - * - * Summary: - * Process a USB MIDI output event. - * Puts data into the MIDI TX output buffer. - * - * Parameters: - * *epBuf: pointer on MIDI event. - * - * Return: - * None - * - * Global variables: - * USBFS_1_MIDI1_TxRunStat: This variable used to save the MIDI - * status byte and skip to send the repeated status byte in subsequent event. - * USBFS_1_MIDI1_InqFlags: The following flags are set when SysEx - * message comes. - * USBFS_1_INQ_SYSEX_FLAG: Non-Real Time SySEx message received. - * USBFS_1_INQ_IDENTITY_REQ_FLAG: Identity Request received. - * This bit should be cleared by user when Identity Reply message generated. - * - *******************************************************************************/ - void USBFS_1_MIDI1_ProcessUsbOut(const uint8 epBuf[]) - - { - uint8 cmd; - uint8 len; - uint8 i; - - /* User code is required at the beginning of the procedure */ - /* `#START MIDI1_PROCESS_OUT_BEGIN` */ - - /* `#END` */ - - cmd = epBuf[USBFS_1_EVENT_BYTE0] & USBFS_1_CIN_MASK; - if((cmd != USBFS_1_RESERVED0) && (cmd != USBFS_1_RESERVED1)) - { - len = USBFS_1_MIDI_SIZE[cmd]; - i = USBFS_1_EVENT_BYTE1; - /* Universal System Exclusive message parsing */ - if(cmd == USBFS_1_SYSEX) - { - if((epBuf[USBFS_1_EVENT_BYTE1] == USBFS_1_MIDI_SYSEX) && - (epBuf[USBFS_1_EVENT_BYTE2] == USBFS_1_MIDI_SYSEX_NON_REAL_TIME)) - { /* Non-Real Time SySEx starts */ - USBFS_1_MIDI1_InqFlags |= USBFS_1_INQ_SYSEX_FLAG; - } - else - { - USBFS_1_MIDI1_InqFlags &= (uint8)~USBFS_1_INQ_SYSEX_FLAG; - } - } - else if(cmd == USBFS_1_SYSEX_ENDS_WITH1) - { - USBFS_1_MIDI1_InqFlags &= (uint8)~USBFS_1_INQ_SYSEX_FLAG; - } - else if(cmd == USBFS_1_SYSEX_ENDS_WITH2) - { - USBFS_1_MIDI1_InqFlags &= (uint8)~USBFS_1_INQ_SYSEX_FLAG; - } - else if(cmd == USBFS_1_SYSEX_ENDS_WITH3) - { - /* Identify Request support */ - if((USBFS_1_MIDI1_InqFlags & USBFS_1_INQ_SYSEX_FLAG) != 0u) - { - USBFS_1_MIDI1_InqFlags &= (uint8)~USBFS_1_INQ_SYSEX_FLAG; - if((epBuf[USBFS_1_EVENT_BYTE1] == USBFS_1_MIDI_SYSEX_GEN_INFORMATION) && - (epBuf[USBFS_1_EVENT_BYTE2] == USBFS_1_MIDI_SYSEX_IDENTITY_REQ)) - { /* Set the flag about received the Identity Request. - * The Identity Reply message may be send by user code. - */ - USBFS_1_MIDI1_InqFlags |= USBFS_1_INQ_IDENTITY_REQ_FLAG; - } - } - } - else /* Do nothing for other command */ - { - } - /* Running Status for Voice and Mode messages only. */ - if((cmd >= USBFS_1_NOTE_OFF) && ( cmd <= USBFS_1_PITCH_BEND_CHANGE)) - { - if(USBFS_1_MIDI1_TxRunStat == epBuf[USBFS_1_EVENT_BYTE1]) - { /* Skip the repeated Status byte */ - i++; - } - else - { /* Save Status byte for next event */ - USBFS_1_MIDI1_TxRunStat = epBuf[USBFS_1_EVENT_BYTE1]; - } - } - else - { /* Clear Running Status */ - USBFS_1_MIDI1_TxRunStat = 0u; - } - /* Puts data into the MIDI TX output buffer.*/ - do - { - MIDI1_UART_PutChar(epBuf[i]); - i++; - } while (i <= len); - } - - /* User code is required at the end of the procedure */ - /* `#START MIDI1_PROCESS_OUT_END` */ - - /* `#END` */ - } - -#if (USBFS_1_MIDI_EXT_MODE >= USBFS_1_TWO_EXT_INTRF) - - - /******************************************************************************* - * Function Name: USBFS_1_MIDI2_GetEvent - ******************************************************************************** - * - * Summary: - * Checks for incoming MIDI data, calls the MIDI event builder if so. - * Returns either empty or with a complete event. - * - * Parameters: - * None - * - * Return: - * 0, if no complete message - * 1 - 4, if message complete - * MIDI_SYSEX, if start or continuation of system exclusive - * MIDI_EOSEX, if end of system exclusive - * 0xf8 - 0xff, if single byte real time message - * - * Global variables: - * USBFS_1_MIDI2_Event: RX status structure used to parse received - * data. - * - *******************************************************************************/ - uint8 USBFS_1_MIDI2_GetEvent(void) - { - uint8 msgRtn = 0u; - uint8 rxData; - #if (MIDI2_UART_RXBUFFERSIZE >= 256u) - uint16 rxBufferRead; - #if CY_PSOC3 /* This local variable required only for PSOC3 and large buffer */ - uint16 rxBufferWrite; - #endif /* end CY_PSOC3 */ - #else - uint8 rxBufferRead; - #endif /* End MIDI2_UART_RXBUFFERSIZE >= 256 */ - uint8 rxBufferLoopDetect; - /* Read buffer loop condition to the local variable */ - rxBufferLoopDetect = MIDI2_UART_rxBufferLoopDetect; - - if ( (MIDI2_UART_rxBufferRead != MIDI2_UART_rxBufferWrite) || (rxBufferLoopDetect != 0u) ) - { - /* Protect variables that could change on interrupt by disabling Rx interrupt.*/ - #if ((MIDI2_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3)) - CyIntDisable(MIDI2_UART_RX_VECT_NUM); - #endif /* End MIDI2_UART_RXBUFFERSIZE >= 256 */ - rxBufferRead = MIDI2_UART_rxBufferRead; - #if ((MIDI2_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3)) - rxBufferWrite = MIDI2_UART_rxBufferWrite; - CyIntEnable(MIDI2_UART_RX_VECT_NUM); - #endif /* End MIDI2_UART_RXBUFFERSIZE >= 256 */ - - /* Stay here until either the buffer is empty or we have a complete message - * in the message buffer. Note that we must use a temporary output pointer to - * since it takes two instructions to increment with a wrap, and we can't - * risk doing that with the real pointer and getting an interrupt in between - * instructions. - */ - - #if ((MIDI2_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3)) - while ( ((rxBufferRead != rxBufferWrite) || (rxBufferLoopDetect != 0u)) && (msgRtn == 0u) ) - #else - while ( ((rxBufferRead != MIDI2_UART_rxBufferWrite) || (rxBufferLoopDetect != 0u)) && (msgRtn == 0u) ) - #endif /* End MIDI2_UART_RXBUFFERSIZE >= 256 && CY_PSOC3 */ - { - rxData = MIDI2_UART_rxBuffer[rxBufferRead]; - rxBufferRead++; - if(rxBufferRead >= MIDI2_UART_RXBUFFERSIZE) - { - rxBufferRead = 0u; - } - /* If loop condition was set - update real read buffer pointer - * to avoid overflow status - */ - if(rxBufferLoopDetect != 0u ) - { - MIDI2_UART_rxBufferLoopDetect = 0u; - #if ((MIDI2_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3)) - CyIntDisable(MIDI2_UART_RX_VECT_NUM); - #endif /* End MIDI2_UART_RXBUFFERSIZE >= 256 */ - MIDI2_UART_rxBufferRead = rxBufferRead; - #if ((MIDI2_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3)) - CyIntEnable(MIDI2_UART_RX_VECT_NUM); - #endif /* End MIDI2_UART_RXBUFFERSIZE >= 256 */ - } - - msgRtn = USBFS_1_ProcessMidiIn(rxData, - (USBFS_1_MIDI_RX_STATUS *)&USBFS_1_MIDI2_Event); - - /* Read buffer loop condition to the local variable */ - rxBufferLoopDetect = MIDI2_UART_rxBufferLoopDetect; - } - - /* Finally, update the real output pointer, then return with - * an indication as to whether there's a complete message in the buffer. - */ - #if ((MIDI2_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3)) - CyIntDisable(MIDI2_UART_RX_VECT_NUM); - #endif /* End MIDI2_UART_RXBUFFERSIZE >= 256 */ - MIDI2_UART_rxBufferRead = rxBufferRead; - #if ((MIDI2_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3)) - CyIntEnable(MIDI2_UART_RX_VECT_NUM); - #endif /* End MIDI2_UART_RXBUFFERSIZE >= 256 */ - } - - return (msgRtn); - } - - - /******************************************************************************* - * Function Name: USBFS_1_MIDI2_ProcessUsbOut - ******************************************************************************** - * - * Summary: - * Process a USB MIDI output event. - * Puts data into the MIDI TX output buffer. - * - * Parameters: - * *epBuf: pointer on MIDI event. - * - * Return: - * None - * - * Global variables: - * USBFS_1_MIDI2_TxRunStat: This variable used to save the MIDI - * status byte and skip to send the repeated status byte in subsequent event. - * USBFS_1_MIDI2_InqFlags: The following flags are set when SysEx - * message comes. - * USBFS_1_INQ_SYSEX_FLAG: Non-Real Time SySEx message received. - * USBFS_1_INQ_IDENTITY_REQ_FLAG: Identity Request received. - * This bit should be cleared by user when Identity Reply message generated. - * - *******************************************************************************/ - void USBFS_1_MIDI2_ProcessUsbOut(const uint8 epBuf[]) - - { - uint8 cmd; - uint8 len; - uint8 i; - - /* User code is required at the beginning of the procedure */ - /* `#START MIDI2_PROCESS_OUT_START` */ - - /* `#END` */ - - cmd = epBuf[USBFS_1_EVENT_BYTE0] & USBFS_1_CIN_MASK; - if((cmd != USBFS_1_RESERVED0) && (cmd != USBFS_1_RESERVED1)) - { - len = USBFS_1_MIDI_SIZE[cmd]; - i = USBFS_1_EVENT_BYTE1; - /* Universal System Exclusive message parsing */ - if(cmd == USBFS_1_SYSEX) - { - if((epBuf[USBFS_1_EVENT_BYTE1] == USBFS_1_MIDI_SYSEX) && - (epBuf[USBFS_1_EVENT_BYTE2] == USBFS_1_MIDI_SYSEX_NON_REAL_TIME)) - { /* SySEx starts */ - USBFS_1_MIDI2_InqFlags |= USBFS_1_INQ_SYSEX_FLAG; - } - else - { - USBFS_1_MIDI2_InqFlags &= (uint8)~USBFS_1_INQ_SYSEX_FLAG; - } - } - else if(cmd == USBFS_1_SYSEX_ENDS_WITH1) - { - USBFS_1_MIDI2_InqFlags &= (uint8)~USBFS_1_INQ_SYSEX_FLAG; - } - else if(cmd == USBFS_1_SYSEX_ENDS_WITH2) - { - USBFS_1_MIDI2_InqFlags &= (uint8)~USBFS_1_INQ_SYSEX_FLAG; - } - else if(cmd == USBFS_1_SYSEX_ENDS_WITH3) - { - /* Identify Request support */ - if((USBFS_1_MIDI2_InqFlags & USBFS_1_INQ_SYSEX_FLAG) != 0u) - { - USBFS_1_MIDI2_InqFlags &= (uint8)~USBFS_1_INQ_SYSEX_FLAG; - if((epBuf[USBFS_1_EVENT_BYTE1] == USBFS_1_MIDI_SYSEX_GEN_INFORMATION) && - (epBuf[USBFS_1_EVENT_BYTE2] == USBFS_1_MIDI_SYSEX_IDENTITY_REQ)) - { /* Set the flag about received the Identity Request. - * The Identity Reply message may be send by user code. - */ - USBFS_1_MIDI2_InqFlags |= USBFS_1_INQ_IDENTITY_REQ_FLAG; - } - } - } - else /* Do nothing for other command */ - { - } - /* Running Status for Voice and Mode messages only. */ - if((cmd >= USBFS_1_NOTE_OFF) && ( cmd <= USBFS_1_PITCH_BEND_CHANGE)) - { - if(USBFS_1_MIDI2_TxRunStat == epBuf[USBFS_1_EVENT_BYTE1]) - { /* Skip the repeated Status byte */ - i++; - } - else - { /* Save Status byte for next event */ - USBFS_1_MIDI2_TxRunStat = epBuf[USBFS_1_EVENT_BYTE1]; - } - } - else - { /* Clear Running Status */ - USBFS_1_MIDI2_TxRunStat = 0u; - } - /* Puts data into the MIDI TX output buffer.*/ - do - { - MIDI2_UART_PutChar(epBuf[i]); - i++; - } while (i <= len); - } - - /* User code is required at the end of the procedure */ - /* `#START MIDI2_PROCESS_OUT_END` */ - - /* `#END` */ - } -#endif /* End USBFS_1_MIDI_EXT_MODE >= USBFS_1_TWO_EXT_INTRF */ -#endif /* End USBFS_1_MIDI_EXT_MODE >= USBFS_1_ONE_EXT_INTRF */ - -#endif /* End (USBFS_1_ENABLE_MIDI_API != 0u) */ - - -/* `#START MIDI_FUNCTIONS` Place any additional functions here */ - -/* `#END` */ - -#endif /* End defined(USBFS_1_ENABLE_MIDI_STREAMING) */ - - -/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_midi.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_midi.h deleted file mode 100644 index 6311650..0000000 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_midi.h +++ /dev/null @@ -1,200 +0,0 @@ -/******************************************************************************* -* File Name: USBFS_1_midi.h -* Version 2.60 -* -* Description: -* Header File for the USBFS MIDI module. -* Contains prototypes and constant values. -* -******************************************************************************** -* Copyright 2008-2013, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - -#if !defined(CY_USBFS_USBFS_1_midi_H) -#define CY_USBFS_USBFS_1_midi_H - -#include "cytypes.h" -#include "USBFS_1.h" - - -/*************************************** -* Data Struct Definition -***************************************/ - -/* The following structure is used to hold status information for - building and parsing incoming MIDI messages. */ -typedef struct -{ - uint8 length; /* expected length */ - uint8 count; /* current byte count */ - uint8 size; /* complete size */ - uint8 runstat; /* running status */ - uint8 msgBuff[4]; /* message buffer */ -} USBFS_1_MIDI_RX_STATUS; - - -/*************************************** -* MIDI Constants. -***************************************/ - -#define USBFS_1_ONE_EXT_INTRF (0x01u) -#define USBFS_1_TWO_EXT_INTRF (0x02u) - -/* Flag definitions for use with MIDI device inquiry */ -#define USBFS_1_INQ_SYSEX_FLAG (0x01u) -#define USBFS_1_INQ_IDENTITY_REQ_FLAG (0x02u) - -/* USB-MIDI Code Index Number Classifications (MIDI Table 4-1) */ -#define USBFS_1_CIN_MASK (0x0Fu) -#define USBFS_1_RESERVED0 (0x00u) -#define USBFS_1_RESERVED1 (0x01u) -#define USBFS_1_2BYTE_COMMON (0x02u) -#define USBFS_1_3BYTE_COMMON (0x03u) -#define USBFS_1_SYSEX (0x04u) -#define USBFS_1_1BYTE_COMMON (0x05u) -#define USBFS_1_SYSEX_ENDS_WITH1 (0x05u) -#define USBFS_1_SYSEX_ENDS_WITH2 (0x06u) -#define USBFS_1_SYSEX_ENDS_WITH3 (0x07u) -#define USBFS_1_NOTE_OFF (0x08u) -#define USBFS_1_NOTE_ON (0x09u) -#define USBFS_1_POLY_KEY_PRESSURE (0x0Au) -#define USBFS_1_CONTROL_CHANGE (0x0Bu) -#define USBFS_1_PROGRAM_CHANGE (0x0Cu) -#define USBFS_1_CHANNEL_PRESSURE (0x0Du) -#define USBFS_1_PITCH_BEND_CHANGE (0x0Eu) -#define USBFS_1_SINGLE_BYTE (0x0Fu) - -#define USBFS_1_CABLE_MASK (0xF0u) -#define USBFS_1_MIDI_CABLE_00 (0x00u) -#define USBFS_1_MIDI_CABLE_01 (0x10u) - -#define USBFS_1_EVENT_BYTE0 (0x00u) -#define USBFS_1_EVENT_BYTE1 (0x01u) -#define USBFS_1_EVENT_BYTE2 (0x02u) -#define USBFS_1_EVENT_BYTE3 (0x03u) -#define USBFS_1_EVENT_LENGTH (0x04u) - -#define USBFS_1_MIDI_STATUS_BYTE_MASK (0x80u) -#define USBFS_1_MIDI_STATUS_MASK (0xF0u) -#define USBFS_1_MIDI_SINGLE_BYTE_MASK (0x08u) -#define USBFS_1_MIDI_NOTE_OFF (0x80u) -#define USBFS_1_MIDI_NOTE_ON (0x90u) -#define USBFS_1_MIDI_POLY_KEY_PRESSURE (0xA0u) -#define USBFS_1_MIDI_CONTROL_CHANGE (0xB0u) -#define USBFS_1_MIDI_PROGRAM_CHANGE (0xC0u) -#define USBFS_1_MIDI_CHANNEL_PRESSURE (0xD0u) -#define USBFS_1_MIDI_PITCH_BEND_CHANGE (0xE0u) -#define USBFS_1_MIDI_SYSEX (0xF0u) -#define USBFS_1_MIDI_EOSEX (0xF7u) -#define USBFS_1_MIDI_QFM (0xF1u) -#define USBFS_1_MIDI_SPP (0xF2u) -#define USBFS_1_MIDI_SONGSEL (0xF3u) -#define USBFS_1_MIDI_TUNEREQ (0xF6u) -#define USBFS_1_MIDI_ACTIVESENSE (0xFEu) - -/* MIDI Universal System Exclusive defines */ -#define USBFS_1_MIDI_SYSEX_NON_REAL_TIME (0x7Eu) -#define USBFS_1_MIDI_SYSEX_REALTIME (0x7Fu) -/* ID of target device */ -#define USBFS_1_MIDI_SYSEX_ID_ALL (0x7Fu) -/* Sub-ID#1*/ -#define USBFS_1_MIDI_SYSEX_GEN_INFORMATION (0x06u) -#define USBFS_1_MIDI_SYSEX_GEN_MESSAGE (0x09u) -/* Sub-ID#2*/ -#define USBFS_1_MIDI_SYSEX_IDENTITY_REQ (0x01u) -#define USBFS_1_MIDI_SYSEX_IDENTITY_REPLY (0x02u) -#define USBFS_1_MIDI_SYSEX_SYSTEM_ON (0x01u) -#define USBFS_1_MIDI_SYSEX_SYSTEM_OFF (0x02u) - -#define USBFS_1_CUSTOM_UART_TX_PRIOR_NUM (0x04u) -#define USBFS_1_CUSTOM_UART_RX_PRIOR_NUM (0x02u) - -#define USBFS_1_ISR_SERVICE_MIDI_OUT \ - ( (USBFS_1_ENABLE_MIDI_API != 0u) && \ - (USBFS_1_MIDI_OUT_BUFF_SIZE > 0) && (USBFS_1_EP_MM == USBFS_1__EP_DMAAUTO) ) -#define USBFS_1_ISR_SERVICE_MIDI_IN \ - ( (USBFS_1_ENABLE_MIDI_API != 0u) && (USBFS_1_MIDI_IN_BUFF_SIZE > 0) ) - -/*************************************** -* External function references -***************************************/ - -void USBFS_1_callbackLocalMidiEvent(uint8 cable, uint8 *midiMsg) - ; - - -/*************************************** -* External references -***************************************/ - -#if (USBFS_1_MIDI_EXT_MODE >= USBFS_1_ONE_EXT_INTRF) - #include "MIDI1_UART.h" -#endif /* End USBFS_1_MIDI_EXT_MODE >= USBFS_1_ONE_EXT_INTRF */ -#if (USBFS_1_MIDI_EXT_MODE >= USBFS_1_TWO_EXT_INTRF) - #include "MIDI2_UART.h" -#endif /* End USBFS_1_MIDI_EXT_MODE >= USBFS_1_TWO_EXT_INTRF */ -#if(USBFS_1_EP_MM != USBFS_1__EP_MANUAL) - #include -#endif /* End USBFS_1_EP_MM */ - - -/*************************************** -* Private function prototypes -***************************************/ - -void USBFS_1_PrepareInBuffer(uint8 ic, const uint8 srcBuff[], uint8 eventLen, uint8 cable) - ; -#if (USBFS_1_MIDI_EXT_MODE >= USBFS_1_ONE_EXT_INTRF) - void USBFS_1_MIDI_Init(void) ; - uint8 USBFS_1_ProcessMidiIn(uint8 mData, USBFS_1_MIDI_RX_STATUS *rxStat) - ; - uint8 USBFS_1_MIDI1_GetEvent(void) ; - void USBFS_1_MIDI1_ProcessUsbOut(const uint8 epBuf[]) - ; - - #if (USBFS_1_MIDI_EXT_MODE >= USBFS_1_TWO_EXT_INTRF) - uint8 USBFS_1_MIDI2_GetEvent(void) ; - void USBFS_1_MIDI2_ProcessUsbOut(const uint8 epBuf[]) - ; - #endif /* End USBFS_1_MIDI_EXT_MODE >= USBFS_1_TWO_EXT_INTRF */ -#endif /* End USBFS_1_MIDI_EXT_MODE >= USBFS_1_ONE_EXT_INTRF */ - - -/*************************************** -* External data references -***************************************/ - -#if defined(USBFS_1_ENABLE_MIDI_STREAMING) - -#if (USBFS_1_MIDI_IN_BUFF_SIZE > 0) - #if (USBFS_1_MIDI_IN_BUFF_SIZE >= 256) - extern volatile uint16 USBFS_1_midiInPointer; /* Input endpoint buffer pointer */ - #else - extern volatile uint8 USBFS_1_midiInPointer; /* Input endpoint buffer pointer */ - #endif /* End USBFS_1_MIDI_IN_BUFF_SIZE >=256 */ - extern volatile uint8 USBFS_1_midi_in_ep; /* Input endpoint number */ - extern uint8 USBFS_1_midiInBuffer[USBFS_1_MIDI_IN_BUFF_SIZE]; /* Input endpoint buffer */ -#endif /* USBFS_1_MIDI_IN_BUFF_SIZE > 0 */ - -#if (USBFS_1_MIDI_OUT_BUFF_SIZE > 0) - extern volatile uint8 USBFS_1_midi_out_ep; /* Output endpoint number */ - extern uint8 USBFS_1_midiOutBuffer[USBFS_1_MIDI_OUT_BUFF_SIZE]; /* Output endpoint buffer */ -#endif /* USBFS_1_MIDI_OUT_BUFF_SIZE > 0 */ - -#if (USBFS_1_MIDI_EXT_MODE >= USBFS_1_ONE_EXT_INTRF) - extern volatile uint8 USBFS_1_MIDI1_InqFlags; /* Device inquiry flag */ - #if (USBFS_1_MIDI_EXT_MODE >= USBFS_1_TWO_EXT_INTRF) - extern volatile uint8 USBFS_1_MIDI2_InqFlags; /* Device inquiry flag */ - #endif /* End USBFS_1_MIDI_EXT_MODE >= USBFS_1_TWO_EXT_INTRF */ -#endif /* End USBFS_1_MIDI_EXT_MODE >= USBFS_1_ONE_EXT_INTRF */ - -#endif /* USBFS_1_ENABLE_MIDI_STREAMING */ - - -#endif /* End CY_USBFS_USBFS_1_midi_H */ - - -/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_pm.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_pm.c deleted file mode 100644 index d650542..0000000 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_pm.c +++ /dev/null @@ -1,277 +0,0 @@ -/******************************************************************************* -* File Name: USBFS_1_pm.c -* Version 2.60 -* -* Description: -* This file provides Suspend/Resume APIs functionality. -* -* Note: -* -******************************************************************************** -* Copyright 2008-2013, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - -#include "project.h" -#include "USBFS_1.h" -#include "USBFS_1_pvt.h" - - -/*************************************** -* Custom Declarations -***************************************/ -/* `#START PM_CUSTOM_DECLARATIONS` Place your declaration here */ - -/* `#END` */ - - -/*************************************** -* Local data allocation -***************************************/ - -static USBFS_1_BACKUP_STRUCT USBFS_1_backup; - - -#if(USBFS_1_DP_ISR_REMOVE == 0u) - - - /******************************************************************************* - * Function Name: USBFS_1_DP_Interrupt - ******************************************************************************** - * - * Summary: - * This Interrupt Service Routine handles DP pin changes for wake-up from - * the sleep mode. - * - * Parameters: - * None. - * - * Return: - * None. - * - *******************************************************************************/ - CY_ISR(USBFS_1_DP_ISR) - { - /* `#START DP_USER_CODE` Place your code here */ - - /* `#END` */ - - /* Clears active interrupt */ - CY_GET_REG8(USBFS_1_DP_INTSTAT_PTR); - } - -#endif /* (USBFS_1_DP_ISR_REMOVE == 0u) */ - - -/******************************************************************************* -* Function Name: USBFS_1_SaveConfig -******************************************************************************** -* -* Summary: -* Saves the current user configuration. -* -* Parameters: -* None. -* -* Return: -* None. -* -* Reentrant: -* No. -* -*******************************************************************************/ -void USBFS_1_SaveConfig(void) -{ - -} - - -/******************************************************************************* -* Function Name: USBFS_1_RestoreConfig -******************************************************************************** -* -* Summary: -* Restores the current user configuration. -* -* Parameters: -* None. -* -* Return: -* None. -* -* Reentrant: -* No. -* -*******************************************************************************/ -void USBFS_1_RestoreConfig(void) -{ - if(USBFS_1_configuration != 0u) - { - USBFS_1_ConfigReg(); - } -} - - -/******************************************************************************* -* Function Name: USBFS_1_Suspend -******************************************************************************** -* -* Summary: -* This function disables the USBFS block and prepares for power donwn mode. -* -* Parameters: -* None. -* -* Return: -* None. -* -* Global variables: -* USBFS_1_backup.enable: modified. -* -* Reentrant: -* No. -* -*******************************************************************************/ -void USBFS_1_Suspend(void) -{ - uint8 enableInterrupts; - enableInterrupts = CyEnterCriticalSection(); - - if((CY_GET_REG8(USBFS_1_CR0_PTR) & USBFS_1_CR0_ENABLE) != 0u) - { /* USB block is enabled */ - USBFS_1_backup.enableState = 1u; - - #if(USBFS_1_EP_MM != USBFS_1__EP_MANUAL) - USBFS_1_Stop_DMA(USBFS_1_MAX_EP); /* Stop all DMAs */ - #endif /* End USBFS_1_EP_MM != USBFS_1__EP_MANUAL */ - - /* Ensure USB transmit enable is low (USB_USBIO_CR0.ten). - Manual Transmission - Disabled */ - USBFS_1_USBIO_CR0_REG &= (uint8)~USBFS_1_USBIO_CR0_TEN; - CyDelayUs(0u); /*~50ns delay */ - - /* Disable the USBIO by asserting PM.USB_CR0.fsusbio_pd_n(Inverted) and pd_pullup_hv(Inverted) high. */ - USBFS_1_PM_USB_CR0_REG &= - (uint8)~(USBFS_1_PM_USB_CR0_PD_N | USBFS_1_PM_USB_CR0_PD_PULLUP_N); - - /* Disable the SIE */ - USBFS_1_CR0_REG &= (uint8)~USBFS_1_CR0_ENABLE; - - CyDelayUs(0u); /*~50ns delay */ - /* Store mode and Disable VRegulator*/ - USBFS_1_backup.mode = USBFS_1_CR1_REG & USBFS_1_CR1_REG_ENABLE; - USBFS_1_CR1_REG &= (uint8)~USBFS_1_CR1_REG_ENABLE; - - CyDelayUs(1u); /* 0.5 us min delay */ - /* Disable the USBIO reference by setting PM.USB_CR0.fsusbio_ref_en.*/ - USBFS_1_PM_USB_CR0_REG &= (uint8)~USBFS_1_PM_USB_CR0_REF_EN; - - /* Switch DP and DM terminals to GPIO mode and disconnect 1.5k pullup*/ - USBFS_1_USBIO_CR1_REG |= USBFS_1_USBIO_CR1_IOMODE; - - /* Disable USB in ACT PM */ - USBFS_1_PM_ACT_CFG_REG &= (uint8)~USBFS_1_PM_ACT_EN_FSUSB; - /* Disable USB block for Standby Power Mode */ - USBFS_1_PM_STBY_CFG_REG &= (uint8)~USBFS_1_PM_STBY_EN_FSUSB; - CyDelayUs(1u); /* min 0.5us delay required */ - - } - else - { - USBFS_1_backup.enableState = 0u; - } - CyExitCriticalSection(enableInterrupts); - - /* Set the DP Interrupt for wake-up from sleep mode. */ - #if(USBFS_1_DP_ISR_REMOVE == 0u) - (void) CyIntSetVector(USBFS_1_DP_INTC_VECT_NUM, &USBFS_1_DP_ISR); - CyIntSetPriority(USBFS_1_DP_INTC_VECT_NUM, USBFS_1_DP_INTC_PRIOR); - CyIntClearPending(USBFS_1_DP_INTC_VECT_NUM); - CyIntEnable(USBFS_1_DP_INTC_VECT_NUM); - #endif /* (USBFS_1_DP_ISR_REMOVE == 0u) */ - -} - - -/******************************************************************************* -* Function Name: USBFS_1_Resume -******************************************************************************** -* -* Summary: -* This function enables the USBFS block after power down mode. -* -* Parameters: -* None. -* -* Return: -* None. -* -* Global variables: -* USBFS_1_backup - checked. -* -* Reentrant: -* No. -* -*******************************************************************************/ -void USBFS_1_Resume(void) -{ - uint8 enableInterrupts; - enableInterrupts = CyEnterCriticalSection(); - - if(USBFS_1_backup.enableState != 0u) - { - #if(USBFS_1_DP_ISR_REMOVE == 0u) - CyIntDisable(USBFS_1_DP_INTC_VECT_NUM); - #endif /* End USBFS_1_DP_ISR_REMOVE */ - - /* Enable USB block */ - USBFS_1_PM_ACT_CFG_REG |= USBFS_1_PM_ACT_EN_FSUSB; - /* Enable USB block for Standby Power Mode */ - USBFS_1_PM_STBY_CFG_REG |= USBFS_1_PM_STBY_EN_FSUSB; - /* Enable core clock */ - USBFS_1_USB_CLK_EN_REG |= USBFS_1_USB_CLK_ENABLE; - - /* Enable the USBIO reference by setting PM.USB_CR0.fsusbio_ref_en.*/ - USBFS_1_PM_USB_CR0_REG |= USBFS_1_PM_USB_CR0_REF_EN; - /* The reference will be available ~40us after power restored */ - CyDelayUs(40u); - /* Return VRegulator*/ - USBFS_1_CR1_REG |= USBFS_1_backup.mode; - CyDelayUs(0u); /*~50ns delay */ - /* Enable USBIO */ - USBFS_1_PM_USB_CR0_REG |= USBFS_1_PM_USB_CR0_PD_N; - CyDelayUs(2u); - /* Set the USBIO pull-up enable */ - USBFS_1_PM_USB_CR0_REG |= USBFS_1_PM_USB_CR0_PD_PULLUP_N; - - /* Reinit Arbiter configuration for DMA transfers */ - #if(USBFS_1_EP_MM != USBFS_1__EP_MANUAL) - /* usb arb interrupt enable */ - USBFS_1_ARB_INT_EN_REG = USBFS_1_ARB_INT_MASK; - #if(USBFS_1_EP_MM == USBFS_1__EP_DMAMANUAL) - USBFS_1_ARB_CFG_REG = USBFS_1_ARB_CFG_MANUAL_DMA; - #endif /* End USBFS_1_EP_MM == USBFS_1__EP_DMAMANUAL */ - #if(USBFS_1_EP_MM == USBFS_1__EP_DMAAUTO) - /*Set cfg cmplt this rises DMA request when the full configuration is done */ - USBFS_1_ARB_CFG_REG = USBFS_1_ARB_CFG_AUTO_DMA | USBFS_1_ARB_CFG_AUTO_MEM; - #endif /* End USBFS_1_EP_MM == USBFS_1__EP_DMAAUTO */ - #endif /* End USBFS_1_EP_MM != USBFS_1__EP_MANUAL */ - - /* STALL_IN_OUT */ - CY_SET_REG8(USBFS_1_EP0_CR_PTR, USBFS_1_MODE_STALL_IN_OUT); - /* Enable the SIE with a last address */ - USBFS_1_CR0_REG |= USBFS_1_CR0_ENABLE; - CyDelayCycles(1u); - /* Finally, Enable d+ pullup and select iomode to USB mode*/ - CY_SET_REG8(USBFS_1_USBIO_CR1_PTR, USBFS_1_USBIO_CR1_USBPUEN); - - /* Restore USB register settings */ - USBFS_1_RestoreConfig(); - - } - CyExitCriticalSection(enableInterrupts); -} - - -/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_pvt.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_pvt.h deleted file mode 100644 index 1f11df0..0000000 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_pvt.h +++ /dev/null @@ -1,190 +0,0 @@ -/******************************************************************************* -* File Name: .h -* Version 2.60 -* -* Description: -* This private file provides constants and parameter values for the -* USBFS Component. -* Please do not use this file or its content in your project. -* -* Note: -* -******************************************************************************** -* Copyright 2013, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - -#if !defined(CY_USBFS_USBFS_1_pvt_H) -#define CY_USBFS_USBFS_1_pvt_H - - -/*************************************** -* Private Variables -***************************************/ - -/* Generated external references for descriptors*/ -extern const uint8 CYCODE USBFS_1_DEVICE0_DESCR[18u]; -extern const uint8 CYCODE USBFS_1_DEVICE0_CONFIGURATION0_DESCR[25u]; -extern const T_USBFS_1_EP_SETTINGS_BLOCK CYCODE USBFS_1_DEVICE0_CONFIGURATION0_EP_SETTINGS_TABLE[1u]; -extern const uint8 CYCODE USBFS_1_DEVICE0_CONFIGURATION0_INTERFACE_CLASS[1u]; -extern const T_USBFS_1_LUT CYCODE USBFS_1_DEVICE0_CONFIGURATION0_TABLE[4u]; -extern const T_USBFS_1_LUT CYCODE USBFS_1_DEVICE0_TABLE[2u]; -extern const T_USBFS_1_LUT CYCODE USBFS_1_TABLE[1u]; - - -extern const uint8 CYCODE USBFS_1_MSOS_DESCRIPTOR[USBFS_1_MSOS_DESCRIPTOR_LENGTH]; -extern const uint8 CYCODE USBFS_1_MSOS_CONFIGURATION_DESCR[USBFS_1_MSOS_CONF_DESCR_LENGTH]; -#if defined(USBFS_1_ENABLE_IDSN_STRING) - extern uint8 USBFS_1_idSerialNumberStringDescriptor[USBFS_1_IDSN_DESCR_LENGTH]; -#endif /* USBFS_1_ENABLE_IDSN_STRING */ - -extern volatile uint8 USBFS_1_interfaceNumber; -extern volatile uint8 USBFS_1_interfaceSetting[USBFS_1_MAX_INTERFACES_NUMBER]; -extern volatile uint8 USBFS_1_interfaceSetting_last[USBFS_1_MAX_INTERFACES_NUMBER]; -extern volatile uint8 USBFS_1_deviceAddress; -extern volatile uint8 USBFS_1_interfaceStatus[USBFS_1_MAX_INTERFACES_NUMBER]; -extern const uint8 CYCODE *USBFS_1_interfaceClass; - -extern volatile T_USBFS_1_EP_CTL_BLOCK USBFS_1_EP[USBFS_1_MAX_EP]; -extern volatile T_USBFS_1_TD USBFS_1_currentTD; - -#if(USBFS_1_EP_MM != USBFS_1__EP_MANUAL) - extern uint8 USBFS_1_DmaChan[USBFS_1_MAX_EP]; - extern uint8 USBFS_1_DmaTd[USBFS_1_MAX_EP]; -#endif /* End USBFS_1_EP_MM */ - -extern volatile uint8 USBFS_1_ep0Toggle; -extern volatile uint8 USBFS_1_lastPacketSize; -extern volatile uint8 USBFS_1_ep0Mode; -extern volatile uint8 USBFS_1_ep0Count; -extern volatile uint16 USBFS_1_transferByteCount; - - -/*************************************** -* Private Function Prototypes -***************************************/ -void USBFS_1_ReInitComponent(void) ; -void USBFS_1_HandleSetup(void) ; -void USBFS_1_HandleIN(void) ; -void USBFS_1_HandleOUT(void) ; -void USBFS_1_LoadEP0(void) ; -uint8 USBFS_1_InitControlRead(void) ; -uint8 USBFS_1_InitControlWrite(void) ; -void USBFS_1_ControlReadDataStage(void) ; -void USBFS_1_ControlReadStatusStage(void) ; -void USBFS_1_ControlReadPrematureStatus(void) - ; -uint8 USBFS_1_InitControlWrite(void) ; -uint8 USBFS_1_InitZeroLengthControlTransfer(void) - ; -void USBFS_1_ControlWriteDataStage(void) ; -void USBFS_1_ControlWriteStatusStage(void) ; -void USBFS_1_ControlWritePrematureStatus(void) - ; -uint8 USBFS_1_InitNoDataControlTransfer(void) ; -void USBFS_1_NoDataControlStatusStage(void) ; -void USBFS_1_InitializeStatusBlock(void) ; -void USBFS_1_UpdateStatusBlock(uint8 completionCode) ; -uint8 USBFS_1_DispatchClassRqst(void) ; - -void USBFS_1_Config(uint8 clearAltSetting) ; -void USBFS_1_ConfigAltChanged(void) ; -void USBFS_1_ConfigReg(void) ; - -const T_USBFS_1_LUT CYCODE *USBFS_1_GetConfigTablePtr(uint8 c) - ; -const T_USBFS_1_LUT CYCODE *USBFS_1_GetDeviceTablePtr(void) - ; -const uint8 CYCODE *USBFS_1_GetInterfaceClassTablePtr(void) - ; -uint8 USBFS_1_ClearEndpointHalt(void) ; -uint8 USBFS_1_SetEndpointHalt(void) ; -uint8 USBFS_1_ValidateAlternateSetting(void) ; - -void USBFS_1_SaveConfig(void) ; -void USBFS_1_RestoreConfig(void) ; - -#if defined(USBFS_1_ENABLE_IDSN_STRING) - void USBFS_1_ReadDieID(uint8 descr[]) ; -#endif /* USBFS_1_ENABLE_IDSN_STRING */ - -#if defined(USBFS_1_ENABLE_HID_CLASS) - uint8 USBFS_1_DispatchHIDClassRqst(void); -#endif /* End USBFS_1_ENABLE_HID_CLASS */ -#if defined(USBFS_1_ENABLE_AUDIO_CLASS) - uint8 USBFS_1_DispatchAUDIOClassRqst(void); -#endif /* End USBFS_1_ENABLE_HID_CLASS */ -#if defined(USBFS_1_ENABLE_CDC_CLASS) - uint8 USBFS_1_DispatchCDCClassRqst(void); -#endif /* End USBFS_1_ENABLE_CDC_CLASS */ - -CY_ISR_PROTO(USBFS_1_EP_0_ISR); -#if(USBFS_1_EP1_ISR_REMOVE == 0u) - CY_ISR_PROTO(USBFS_1_EP_1_ISR); -#endif /* End USBFS_1_EP1_ISR_REMOVE */ -#if(USBFS_1_EP2_ISR_REMOVE == 0u) - CY_ISR_PROTO(USBFS_1_EP_2_ISR); -#endif /* End USBFS_1_EP2_ISR_REMOVE */ -#if(USBFS_1_EP3_ISR_REMOVE == 0u) - CY_ISR_PROTO(USBFS_1_EP_3_ISR); -#endif /* End USBFS_1_EP3_ISR_REMOVE */ -#if(USBFS_1_EP4_ISR_REMOVE == 0u) - CY_ISR_PROTO(USBFS_1_EP_4_ISR); -#endif /* End USBFS_1_EP4_ISR_REMOVE */ -#if(USBFS_1_EP5_ISR_REMOVE == 0u) - CY_ISR_PROTO(USBFS_1_EP_5_ISR); -#endif /* End USBFS_1_EP5_ISR_REMOVE */ -#if(USBFS_1_EP6_ISR_REMOVE == 0u) - CY_ISR_PROTO(USBFS_1_EP_6_ISR); -#endif /* End USBFS_1_EP6_ISR_REMOVE */ -#if(USBFS_1_EP7_ISR_REMOVE == 0u) - CY_ISR_PROTO(USBFS_1_EP_7_ISR); -#endif /* End USBFS_1_EP7_ISR_REMOVE */ -#if(USBFS_1_EP8_ISR_REMOVE == 0u) - CY_ISR_PROTO(USBFS_1_EP_8_ISR); -#endif /* End USBFS_1_EP8_ISR_REMOVE */ -CY_ISR_PROTO(USBFS_1_BUS_RESET_ISR); -#if(USBFS_1_SOF_ISR_REMOVE == 0u) - CY_ISR_PROTO(USBFS_1_SOF_ISR); -#endif /* End USBFS_1_SOF_ISR_REMOVE */ -#if(USBFS_1_EP_MM != USBFS_1__EP_MANUAL) - CY_ISR_PROTO(USBFS_1_ARB_ISR); -#endif /* End USBFS_1_EP_MM */ -#if(USBFS_1_DP_ISR_REMOVE == 0u) - CY_ISR_PROTO(USBFS_1_DP_ISR); -#endif /* End USBFS_1_DP_ISR_REMOVE */ - - -/*************************************** -* Request Handlers -***************************************/ - -uint8 USBFS_1_HandleStandardRqst(void) ; -uint8 USBFS_1_DispatchClassRqst(void) ; -uint8 USBFS_1_HandleVendorRqst(void) ; - - -/*************************************** -* HID Internal references -***************************************/ -#if defined(USBFS_1_ENABLE_HID_CLASS) - void USBFS_1_FindReport(void) ; - void USBFS_1_FindReportDescriptor(void) ; - void USBFS_1_FindHidClassDecriptor(void) ; -#endif /* USBFS_1_ENABLE_HID_CLASS */ - - -/*************************************** -* MIDI Internal references -***************************************/ -#if defined(USBFS_1_ENABLE_MIDI_STREAMING) - void USBFS_1_MIDI_IN_EP_Service(void) ; -#endif /* USBFS_1_ENABLE_MIDI_STREAMING */ - - -#endif /* CY_USBFS_USBFS_1_pvt_H */ - - -/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_std.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_std.c deleted file mode 100644 index 0e3fcb3..0000000 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_std.c +++ /dev/null @@ -1,1134 +0,0 @@ -/******************************************************************************* -* File Name: USBFS_1_std.c -* Version 2.60 -* -* Description: -* USB Standard request handler. -* -* Note: -* -******************************************************************************** -* Copyright 2008-2013, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - -#include "USBFS_1.h" -#include "USBFS_1_cdc.h" -#include "USBFS_1_pvt.h" -#if defined(USBFS_1_ENABLE_MIDI_STREAMING) - #include "USBFS_1_midi.h" -#endif /* End USBFS_1_ENABLE_MIDI_STREAMING*/ - - -/*************************************** -* Static data allocation -***************************************/ - -#if defined(USBFS_1_ENABLE_FWSN_STRING) - static volatile uint8 *USBFS_1_fwSerialNumberStringDescriptor; - static volatile uint8 USBFS_1_snStringConfirm = USBFS_1_FALSE; -#endif /* USBFS_1_ENABLE_FWSN_STRING */ - -#if defined(USBFS_1_ENABLE_FWSN_STRING) - - - /******************************************************************************* - * Function Name: USBFS_1_SerialNumString - ******************************************************************************** - * - * Summary: - * Application firmware may supply the source of the USB device descriptors - * serial number string during runtime. - * - * Parameters: - * snString: pointer to string. - * - * Return: - * None. - * - * Reentrant: - * No. - * - *******************************************************************************/ - void USBFS_1_SerialNumString(uint8 snString[]) - { - USBFS_1_snStringConfirm = USBFS_1_FALSE; - if(snString != NULL) - { - USBFS_1_fwSerialNumberStringDescriptor = snString; - /* Check descriptor validation */ - if( (snString[0u] > 1u ) && (snString[1u] == USBFS_1_DESCR_STRING) ) - { - USBFS_1_snStringConfirm = USBFS_1_TRUE; - } - } - } - -#endif /* USBFS_1_ENABLE_FWSN_STRING */ - - -/******************************************************************************* -* Function Name: USBFS_1_HandleStandardRqst -******************************************************************************** -* -* Summary: -* This Routine dispatches standard requests -* -* Parameters: -* None. -* -* Return: -* TRUE if request handled. -* -* Reentrant: -* No. -* -*******************************************************************************/ -uint8 USBFS_1_HandleStandardRqst(void) -{ - uint8 requestHandled = USBFS_1_FALSE; - uint8 interfaceNumber; - #if defined(USBFS_1_ENABLE_STRINGS) - volatile uint8 *pStr = 0u; - #if defined(USBFS_1_ENABLE_DESCRIPTOR_STRINGS) - uint8 nStr; - uint8 descrLength; - #endif /* USBFS_1_ENABLE_DESCRIPTOR_STRINGS */ - #endif /* USBFS_1_ENABLE_STRINGS */ - static volatile uint8 USBFS_1_tBuffer[USBFS_1_STATUS_LENGTH_MAX]; - const T_USBFS_1_LUT CYCODE *pTmp; - USBFS_1_currentTD.count = 0u; - - if ((CY_GET_REG8(USBFS_1_bmRequestType) & USBFS_1_RQST_DIR_MASK) == USBFS_1_RQST_DIR_D2H) - { - /* Control Read */ - switch (CY_GET_REG8(USBFS_1_bRequest)) - { - case USBFS_1_GET_DESCRIPTOR: - if (CY_GET_REG8(USBFS_1_wValueHi) == USBFS_1_DESCR_DEVICE) - { - pTmp = USBFS_1_GetDeviceTablePtr(); - USBFS_1_currentTD.pData = (volatile uint8 *)pTmp->p_list; - USBFS_1_currentTD.count = USBFS_1_DEVICE_DESCR_LENGTH; - requestHandled = USBFS_1_InitControlRead(); - } - else if (CY_GET_REG8(USBFS_1_wValueHi) == USBFS_1_DESCR_CONFIG) - { - pTmp = USBFS_1_GetConfigTablePtr(CY_GET_REG8(USBFS_1_wValueLo)); - USBFS_1_currentTD.pData = (volatile uint8 *)pTmp->p_list; - USBFS_1_currentTD.count = ((uint16)(USBFS_1_currentTD.pData)[ \ - USBFS_1_CONFIG_DESCR_TOTAL_LENGTH_HI] << 8u) | \ - (USBFS_1_currentTD.pData)[USBFS_1_CONFIG_DESCR_TOTAL_LENGTH_LOW]; - requestHandled = USBFS_1_InitControlRead(); - } - #if defined(USBFS_1_ENABLE_STRINGS) - else if (CY_GET_REG8(USBFS_1_wValueHi) == USBFS_1_DESCR_STRING) - { - /* Descriptor Strings*/ - #if defined(USBFS_1_ENABLE_DESCRIPTOR_STRINGS) - nStr = 0u; - pStr = (volatile uint8 *)&USBFS_1_STRING_DESCRIPTORS[0u]; - while ( (CY_GET_REG8(USBFS_1_wValueLo) > nStr) && (*pStr != 0u) ) - { - /* Read descriptor length from 1st byte */ - descrLength = *pStr; - /* Move to next string descriptor */ - pStr = &pStr[descrLength]; - nStr++; - } - #endif /* End USBFS_1_ENABLE_DESCRIPTOR_STRINGS */ - /* Microsoft OS String*/ - #if defined(USBFS_1_ENABLE_MSOS_STRING) - if( CY_GET_REG8(USBFS_1_wValueLo) == USBFS_1_STRING_MSOS ) - { - pStr = (volatile uint8 *)&USBFS_1_MSOS_DESCRIPTOR[0u]; - } - #endif /* End USBFS_1_ENABLE_MSOS_STRING*/ - /* SN string */ - #if defined(USBFS_1_ENABLE_SN_STRING) - if( (CY_GET_REG8(USBFS_1_wValueLo) != 0u) && - (CY_GET_REG8(USBFS_1_wValueLo) == - USBFS_1_DEVICE0_DESCR[USBFS_1_DEVICE_DESCR_SN_SHIFT]) ) - { - pStr = (volatile uint8 *)&USBFS_1_SN_STRING_DESCRIPTOR[0u]; - #if defined(USBFS_1_ENABLE_FWSN_STRING) - if(USBFS_1_snStringConfirm != USBFS_1_FALSE) - { - pStr = USBFS_1_fwSerialNumberStringDescriptor; - } - #endif /* USBFS_1_ENABLE_FWSN_STRING */ - #if defined(USBFS_1_ENABLE_IDSN_STRING) - /* Read DIE ID and generate string descriptor in RAM */ - USBFS_1_ReadDieID(USBFS_1_idSerialNumberStringDescriptor); - pStr = USBFS_1_idSerialNumberStringDescriptor; - #endif /* End USBFS_1_ENABLE_IDSN_STRING */ - } - #endif /* End USBFS_1_ENABLE_SN_STRING */ - if (*pStr != 0u) - { - USBFS_1_currentTD.count = *pStr; - USBFS_1_currentTD.pData = pStr; - requestHandled = USBFS_1_InitControlRead(); - } - } - #endif /* End USBFS_1_ENABLE_STRINGS */ - else - { - requestHandled = USBFS_1_DispatchClassRqst(); - } - break; - case USBFS_1_GET_STATUS: - switch ((CY_GET_REG8(USBFS_1_bmRequestType) & USBFS_1_RQST_RCPT_MASK)) - { - case USBFS_1_RQST_RCPT_EP: - USBFS_1_currentTD.count = USBFS_1_EP_STATUS_LENGTH; - USBFS_1_tBuffer[0u] = USBFS_1_EP[ \ - CY_GET_REG8(USBFS_1_wIndexLo) & USBFS_1_DIR_UNUSED].hwEpState; - USBFS_1_tBuffer[1u] = 0u; - USBFS_1_currentTD.pData = &USBFS_1_tBuffer[0u]; - requestHandled = USBFS_1_InitControlRead(); - break; - case USBFS_1_RQST_RCPT_DEV: - USBFS_1_currentTD.count = USBFS_1_DEVICE_STATUS_LENGTH; - USBFS_1_tBuffer[0u] = USBFS_1_deviceStatus; - USBFS_1_tBuffer[1u] = 0u; - USBFS_1_currentTD.pData = &USBFS_1_tBuffer[0u]; - requestHandled = USBFS_1_InitControlRead(); - break; - default: /* requestHandled is initialized as FALSE by default */ - break; - } - break; - case USBFS_1_GET_CONFIGURATION: - USBFS_1_currentTD.count = 1u; - USBFS_1_currentTD.pData = (volatile uint8 *)&USBFS_1_configuration; - requestHandled = USBFS_1_InitControlRead(); - break; - case USBFS_1_GET_INTERFACE: - USBFS_1_currentTD.count = 1u; - USBFS_1_currentTD.pData = (volatile uint8 *)&USBFS_1_interfaceSetting[ \ - CY_GET_REG8(USBFS_1_wIndexLo)]; - requestHandled = USBFS_1_InitControlRead(); - break; - default: /* requestHandled is initialized as FALSE by default */ - break; - } - } - else { - /* Control Write */ - switch (CY_GET_REG8(USBFS_1_bRequest)) - { - case USBFS_1_SET_ADDRESS: - USBFS_1_deviceAddress = CY_GET_REG8(USBFS_1_wValueLo); - requestHandled = USBFS_1_InitNoDataControlTransfer(); - break; - case USBFS_1_SET_CONFIGURATION: - USBFS_1_configuration = CY_GET_REG8(USBFS_1_wValueLo); - USBFS_1_configurationChanged = USBFS_1_TRUE; - USBFS_1_Config(USBFS_1_TRUE); - requestHandled = USBFS_1_InitNoDataControlTransfer(); - break; - case USBFS_1_SET_INTERFACE: - if (USBFS_1_ValidateAlternateSetting() != 0u) - { - interfaceNumber = CY_GET_REG8(USBFS_1_wIndexLo); - USBFS_1_interfaceNumber = interfaceNumber; - USBFS_1_configurationChanged = USBFS_1_TRUE; - #if ((USBFS_1_EP_MA == USBFS_1__MA_DYNAMIC) && \ - (USBFS_1_EP_MM == USBFS_1__EP_MANUAL) ) - USBFS_1_Config(USBFS_1_FALSE); - #else - USBFS_1_ConfigAltChanged(); - #endif /* End (USBFS_1_EP_MA == USBFS_1__MA_DYNAMIC) */ - /* Update handled Alt setting changes status */ - USBFS_1_interfaceSetting_last[interfaceNumber] = - USBFS_1_interfaceSetting[interfaceNumber]; - requestHandled = USBFS_1_InitNoDataControlTransfer(); - } - break; - case USBFS_1_CLEAR_FEATURE: - switch (CY_GET_REG8(USBFS_1_bmRequestType) & USBFS_1_RQST_RCPT_MASK) - { - case USBFS_1_RQST_RCPT_EP: - if (CY_GET_REG8(USBFS_1_wValueLo) == USBFS_1_ENDPOINT_HALT) - { - requestHandled = USBFS_1_ClearEndpointHalt(); - } - break; - case USBFS_1_RQST_RCPT_DEV: - /* Clear device REMOTE_WAKEUP */ - if (CY_GET_REG8(USBFS_1_wValueLo) == USBFS_1_DEVICE_REMOTE_WAKEUP) - { - USBFS_1_deviceStatus &= (uint8)~USBFS_1_DEVICE_STATUS_REMOTE_WAKEUP; - requestHandled = USBFS_1_InitNoDataControlTransfer(); - } - break; - case USBFS_1_RQST_RCPT_IFC: - /* Validate interfaceNumber */ - if (CY_GET_REG8(USBFS_1_wIndexLo) < USBFS_1_MAX_INTERFACES_NUMBER) - { - USBFS_1_interfaceStatus[CY_GET_REG8(USBFS_1_wIndexLo)] &= - (uint8)~(CY_GET_REG8(USBFS_1_wValueLo)); - requestHandled = USBFS_1_InitNoDataControlTransfer(); - } - break; - default: /* requestHandled is initialized as FALSE by default */ - break; - } - break; - case USBFS_1_SET_FEATURE: - switch (CY_GET_REG8(USBFS_1_bmRequestType) & USBFS_1_RQST_RCPT_MASK) - { - case USBFS_1_RQST_RCPT_EP: - if (CY_GET_REG8(USBFS_1_wValueLo) == USBFS_1_ENDPOINT_HALT) - { - requestHandled = USBFS_1_SetEndpointHalt(); - } - break; - case USBFS_1_RQST_RCPT_DEV: - /* Set device REMOTE_WAKEUP */ - if (CY_GET_REG8(USBFS_1_wValueLo) == USBFS_1_DEVICE_REMOTE_WAKEUP) - { - USBFS_1_deviceStatus |= USBFS_1_DEVICE_STATUS_REMOTE_WAKEUP; - requestHandled = USBFS_1_InitNoDataControlTransfer(); - } - break; - case USBFS_1_RQST_RCPT_IFC: - /* Validate interfaceNumber */ - if (CY_GET_REG8(USBFS_1_wIndexLo) < USBFS_1_MAX_INTERFACES_NUMBER) - { - USBFS_1_interfaceStatus[CY_GET_REG8(USBFS_1_wIndexLo)] &= - (uint8)~(CY_GET_REG8(USBFS_1_wValueLo)); - requestHandled = USBFS_1_InitNoDataControlTransfer(); - } - break; - default: /* requestHandled is initialized as FALSE by default */ - break; - } - break; - default: /* requestHandled is initialized as FALSE by default */ - break; - } - } - return(requestHandled); -} - - -#if defined(USBFS_1_ENABLE_IDSN_STRING) - - /*************************************************************************** - * Function Name: USBFS_1_ReadDieID - **************************************************************************** - * - * Summary: - * This routine read Die ID and generate Serial Number string descriptor. - * - * Parameters: - * descr: pointer on string descriptor. - * - * Return: - * None. - * - * Reentrant: - * No. - * - ***************************************************************************/ - void USBFS_1_ReadDieID(uint8 descr[]) - { - uint8 i; - uint8 j = 0u; - uint8 value; - const char8 CYCODE hex[16u] = "0123456789ABCDEF"; - - - /* Check descriptor validation */ - if( descr != NULL) - { - descr[0u] = USBFS_1_IDSN_DESCR_LENGTH; - descr[1u] = USBFS_1_DESCR_STRING; - - /* fill descriptor */ - for(i = 2u; i < USBFS_1_IDSN_DESCR_LENGTH; i += 4u) - { - value = CY_GET_XTND_REG8((void CYFAR *)(USBFS_1_DIE_ID + j)); - j++; - descr[i] = (uint8)hex[value >> 4u]; - descr[i + 2u] = (uint8)hex[value & 0x0Fu]; - } - } - } - -#endif /* End USBFS_1_ENABLE_IDSN_STRING */ - - -/******************************************************************************* -* Function Name: USBFS_1_ConfigReg -******************************************************************************** -* -* Summary: -* This routine configures hardware registers from the variables. -* It is called from USBFS_1_Config() function and from RestoreConfig -* after Wakeup. -* -* Parameters: -* None. -* -* Return: -* None. -* -*******************************************************************************/ -void USBFS_1_ConfigReg(void) -{ - uint8 ep; - uint8 i; - #if(USBFS_1_EP_MM == USBFS_1__EP_DMAAUTO) - uint8 ep_type = 0u; - #endif /* End USBFS_1_EP_MM == USBFS_1__EP_DMAAUTO */ - - /* Set the endpoint buffer addresses */ - ep = USBFS_1_EP1; - for (i = 0u; i < 0x80u; i+= 0x10u) - { - CY_SET_REG8((reg8 *)(USBFS_1_ARB_EP1_CFG_IND + i), USBFS_1_ARB_EPX_CFG_CRC_BYPASS | - USBFS_1_ARB_EPX_CFG_RESET); - - #if(USBFS_1_EP_MM != USBFS_1__EP_MANUAL) - /* Enable all Arbiter EP Interrupts : err, buf under, buf over, dma gnt(mode2 only), in buf full */ - CY_SET_REG8((reg8 *)(USBFS_1_ARB_EP1_INT_EN_IND + i), USBFS_1_ARB_EPX_INT_MASK); - #endif /* End USBFS_1_EP_MM != USBFS_1__EP_MANUAL */ - - if(USBFS_1_EP[ep].epMode != USBFS_1_MODE_DISABLE) - { - if((USBFS_1_EP[ep].addr & USBFS_1_DIR_IN) != 0u ) - { - CY_SET_REG8((reg8 *)(USBFS_1_SIE_EP1_CR0_IND + i), USBFS_1_MODE_NAK_IN); - } - else - { - CY_SET_REG8((reg8 *)(USBFS_1_SIE_EP1_CR0_IND + i), USBFS_1_MODE_NAK_OUT); - /* Prepare EP type mask for automatic memory allocation */ - #if(USBFS_1_EP_MM == USBFS_1__EP_DMAAUTO) - ep_type |= (uint8)(0x01u << (ep - USBFS_1_EP1)); - #endif /* End USBFS_1_EP_MM == USBFS_1__EP_DMAAUTO */ - } - } - else - { - CY_SET_REG8((reg8 *)(USBFS_1_SIE_EP1_CR0_IND + i), USBFS_1_MODE_STALL_DATA_EP); - } - - #if(USBFS_1_EP_MM != USBFS_1__EP_DMAAUTO) - CY_SET_REG8((reg8 *)(USBFS_1_SIE_EP1_CNT0_IND + i), USBFS_1_EP[ep].bufferSize >> 8u); - CY_SET_REG8((reg8 *)(USBFS_1_SIE_EP1_CNT1_IND + i), USBFS_1_EP[ep].bufferSize & 0xFFu); - - CY_SET_REG8((reg8 *)(USBFS_1_ARB_RW1_RA_IND + i), USBFS_1_EP[ep].buffOffset & 0xFFu); - CY_SET_REG8((reg8 *)(USBFS_1_ARB_RW1_RA_MSB_IND + i), USBFS_1_EP[ep].buffOffset >> 8u); - CY_SET_REG8((reg8 *)(USBFS_1_ARB_RW1_WA_IND + i), USBFS_1_EP[ep].buffOffset & 0xFFu); - CY_SET_REG8((reg8 *)(USBFS_1_ARB_RW1_WA_MSB_IND + i), USBFS_1_EP[ep].buffOffset >> 8u); - #endif /* End USBFS_1_EP_MM != USBFS_1__EP_DMAAUTO */ - - ep++; - } - - #if(USBFS_1_EP_MM == USBFS_1__EP_DMAAUTO) - /* BUF_SIZE depend on DMA_THRESS value: 55-32 bytes 44-16 bytes 33-8 bytes 22-4 bytes 11-2 bytes */ - USBFS_1_BUF_SIZE_REG = USBFS_1_DMA_BUF_SIZE; - USBFS_1_DMA_THRES_REG = USBFS_1_DMA_BYTES_PER_BURST; /* DMA burst threshold */ - USBFS_1_DMA_THRES_MSB_REG = 0u; - USBFS_1_EP_ACTIVE_REG = USBFS_1_ARB_INT_MASK; - USBFS_1_EP_TYPE_REG = ep_type; - /* Cfg_cmp bit set to 1 once configuration is complete. */ - USBFS_1_ARB_CFG_REG = USBFS_1_ARB_CFG_AUTO_DMA | USBFS_1_ARB_CFG_AUTO_MEM | - USBFS_1_ARB_CFG_CFG_CPM; - /* Cfg_cmp bit set to 0 during configuration of PFSUSB Registers. */ - USBFS_1_ARB_CFG_REG = USBFS_1_ARB_CFG_AUTO_DMA | USBFS_1_ARB_CFG_AUTO_MEM; - #endif /* End USBFS_1_EP_MM == USBFS_1__EP_DMAAUTO */ - - CY_SET_REG8(USBFS_1_SIE_EP_INT_EN_PTR, 0xFFu); -} - - -/******************************************************************************* -* Function Name: USBFS_1_Config -******************************************************************************** -* -* Summary: -* This routine configures endpoints for the entire configuration by scanning -* the configuration descriptor. -* -* Parameters: -* clearAltSetting: It configures the bAlternateSetting 0 for each interface. -* -* Return: -* None. -* -* USBFS_1_interfaceClass - Initialized class array for each interface. -* It is used for handling Class specific requests depend on interface class. -* Different classes in multiple Alternate settings does not supported. -* -* Reentrant: -* No. -* -*******************************************************************************/ -void USBFS_1_Config(uint8 clearAltSetting) -{ - uint8 ep; - uint8 cur_ep; - uint8 i; - uint8 ep_type; - const uint8 *pDescr; - #if(USBFS_1_EP_MM != USBFS_1__EP_DMAAUTO) - uint16 buffCount = 0u; - #endif /* End USBFS_1_EP_MM != USBFS_1__EP_DMAAUTO */ - - const T_USBFS_1_LUT CYCODE *pTmp; - const T_USBFS_1_EP_SETTINGS_BLOCK CYCODE *pEP; - - /* Clear all of the endpoints */ - for (ep = 0u; ep < USBFS_1_MAX_EP; ep++) - { - USBFS_1_EP[ep].attrib = 0u; - USBFS_1_EP[ep].hwEpState = 0u; - USBFS_1_EP[ep].apiEpState = USBFS_1_NO_EVENT_PENDING; - USBFS_1_EP[ep].epToggle = 0u; - USBFS_1_EP[ep].epMode = USBFS_1_MODE_DISABLE; - USBFS_1_EP[ep].bufferSize = 0u; - USBFS_1_EP[ep].interface = 0u; - - } - - /* Clear Alternate settings for all interfaces */ - if(clearAltSetting != 0u) - { - for (i = 0u; i < USBFS_1_MAX_INTERFACES_NUMBER; i++) - { - USBFS_1_interfaceSetting[i] = 0x00u; - USBFS_1_interfaceSetting_last[i] = 0x00u; - } - } - - /* Init Endpoints and Device Status if configured */ - if(USBFS_1_configuration > 0u) - { - pTmp = USBFS_1_GetConfigTablePtr(USBFS_1_configuration - 1u); - /* Set Power status for current configuration */ - pDescr = (const uint8 *)pTmp->p_list; - if((pDescr[USBFS_1_CONFIG_DESCR_ATTRIB] & USBFS_1_CONFIG_DESCR_ATTRIB_SELF_POWERED) != 0u) - { - USBFS_1_deviceStatus |= USBFS_1_DEVICE_STATUS_SELF_POWERED; - } - else - { - USBFS_1_deviceStatus &= (uint8)~USBFS_1_DEVICE_STATUS_SELF_POWERED; - } - /* Move to next element */ - pTmp = &pTmp[1u]; - ep = pTmp->c; /* For this table, c is the number of endpoints configurations */ - - #if ((USBFS_1_EP_MA == USBFS_1__MA_DYNAMIC) && \ - (USBFS_1_EP_MM == USBFS_1__EP_MANUAL) ) - /* Configure for dynamic EP memory allocation */ - /* p_list points the endpoint setting table. */ - pEP = (T_USBFS_1_EP_SETTINGS_BLOCK *) pTmp->p_list; - for (i = 0u; i < ep; i++) - { - /* Compare current Alternate setting with EP Alt*/ - if(USBFS_1_interfaceSetting[pEP->interface] == pEP->altSetting) - { - cur_ep = pEP->addr & USBFS_1_DIR_UNUSED; - ep_type = pEP->attributes & USBFS_1_EP_TYPE_MASK; - if (pEP->addr & USBFS_1_DIR_IN) - { - /* IN Endpoint */ - USBFS_1_EP[cur_ep].apiEpState = USBFS_1_EVENT_PENDING; - USBFS_1_EP[cur_ep].epMode = (ep_type == USBFS_1_EP_TYPE_ISOC) ? - USBFS_1_MODE_ISO_IN : USBFS_1_MODE_ACK_IN; - #if defined(USBFS_1_ENABLE_CDC_CLASS) - if(((pEP->bMisc == USBFS_1_CLASS_CDC_DATA) || - (pEP->bMisc == USBFS_1_CLASS_CDC)) && - (ep_type != USBFS_1_EP_TYPE_INT)) - { - USBFS_1_cdc_data_in_ep = cur_ep; - } - #endif /* End USBFS_1_ENABLE_CDC_CLASS*/ - #if ( defined(USBFS_1_ENABLE_MIDI_STREAMING) && \ - (USBFS_1_MIDI_IN_BUFF_SIZE > 0) ) - if((pEP->bMisc == USBFS_1_CLASS_AUDIO) && - (ep_type == USBFS_1_EP_TYPE_BULK)) - { - USBFS_1_midi_in_ep = cur_ep; - } - #endif /* End USBFS_1_ENABLE_MIDI_STREAMING*/ - } - else - { - /* OUT Endpoint */ - USBFS_1_EP[cur_ep].apiEpState = USBFS_1_NO_EVENT_PENDING; - USBFS_1_EP[cur_ep].epMode = (ep_type == USBFS_1_EP_TYPE_ISOC) ? - USBFS_1_MODE_ISO_OUT : USBFS_1_MODE_ACK_OUT; - #if defined(USBFS_1_ENABLE_CDC_CLASS) - if(((pEP->bMisc == USBFS_1_CLASS_CDC_DATA) || - (pEP->bMisc == USBFS_1_CLASS_CDC)) && - (ep_type != USBFS_1_EP_TYPE_INT)) - { - USBFS_1_cdc_data_out_ep = cur_ep; - } - #endif /* End USBFS_1_ENABLE_CDC_CLASS*/ - #if ( defined(USBFS_1_ENABLE_MIDI_STREAMING) && \ - (USBFS_1_MIDI_OUT_BUFF_SIZE > 0) ) - if((pEP->bMisc == USBFS_1_CLASS_AUDIO) && - (ep_type == USBFS_1_EP_TYPE_BULK)) - { - USBFS_1_midi_out_ep = cur_ep; - } - #endif /* End USBFS_1_ENABLE_MIDI_STREAMING*/ - } - USBFS_1_EP[cur_ep].bufferSize = pEP->bufferSize; - USBFS_1_EP[cur_ep].addr = pEP->addr; - USBFS_1_EP[cur_ep].attrib = pEP->attributes; - } - pEP = &pEP[1u]; - } - #else /* Config for static EP memory allocation */ - for (i = USBFS_1_EP1; i < USBFS_1_MAX_EP; i++) - { - /* p_list points the endpoint setting table. */ - pEP = (const T_USBFS_1_EP_SETTINGS_BLOCK CYCODE *) pTmp->p_list; - /* Find max length for each EP and select it (length could be different in different Alt settings) */ - /* but other settings should be correct with regards to Interface alt Setting */ - for (cur_ep = 0u; cur_ep < ep; cur_ep++) - { - /* EP count is equal to EP # in table and we found larger EP length than have before*/ - if(i == (pEP->addr & USBFS_1_DIR_UNUSED)) - { - if(USBFS_1_EP[i].bufferSize < pEP->bufferSize) - { - USBFS_1_EP[i].bufferSize = pEP->bufferSize; - } - /* Compare current Alternate setting with EP Alt*/ - if(USBFS_1_interfaceSetting[pEP->interface] == pEP->altSetting) - { - ep_type = pEP->attributes & USBFS_1_EP_TYPE_MASK; - if ((pEP->addr & USBFS_1_DIR_IN) != 0u) - { - /* IN Endpoint */ - USBFS_1_EP[i].apiEpState = USBFS_1_EVENT_PENDING; - USBFS_1_EP[i].epMode = (ep_type == USBFS_1_EP_TYPE_ISOC) ? - USBFS_1_MODE_ISO_IN : USBFS_1_MODE_ACK_IN; - /* Find and init CDC IN endpoint number */ - #if defined(USBFS_1_ENABLE_CDC_CLASS) - if(((pEP->bMisc == USBFS_1_CLASS_CDC_DATA) || - (pEP->bMisc == USBFS_1_CLASS_CDC)) && - (ep_type != USBFS_1_EP_TYPE_INT)) - { - USBFS_1_cdc_data_in_ep = i; - } - #endif /* End USBFS_1_ENABLE_CDC_CLASS*/ - #if ( defined(USBFS_1_ENABLE_MIDI_STREAMING) && \ - (USBFS_1_MIDI_IN_BUFF_SIZE > 0) ) - if((pEP->bMisc == USBFS_1_CLASS_AUDIO) && - (ep_type == USBFS_1_EP_TYPE_BULK)) - { - USBFS_1_midi_in_ep = i; - } - #endif /* End USBFS_1_ENABLE_MIDI_STREAMING*/ - } - else - { - /* OUT Endpoint */ - USBFS_1_EP[i].apiEpState = USBFS_1_NO_EVENT_PENDING; - USBFS_1_EP[i].epMode = (ep_type == USBFS_1_EP_TYPE_ISOC) ? - USBFS_1_MODE_ISO_OUT : USBFS_1_MODE_ACK_OUT; - /* Find and init CDC IN endpoint number */ - #if defined(USBFS_1_ENABLE_CDC_CLASS) - if(((pEP->bMisc == USBFS_1_CLASS_CDC_DATA) || - (pEP->bMisc == USBFS_1_CLASS_CDC)) && - (ep_type != USBFS_1_EP_TYPE_INT)) - { - USBFS_1_cdc_data_out_ep = i; - } - #endif /* End USBFS_1_ENABLE_CDC_CLASS*/ - #if ( defined(USBFS_1_ENABLE_MIDI_STREAMING) && \ - (USBFS_1_MIDI_OUT_BUFF_SIZE > 0) ) - if((pEP->bMisc == USBFS_1_CLASS_AUDIO) && - (ep_type == USBFS_1_EP_TYPE_BULK)) - { - USBFS_1_midi_out_ep = i; - } - #endif /* End USBFS_1_ENABLE_MIDI_STREAMING*/ - } - USBFS_1_EP[i].addr = pEP->addr; - USBFS_1_EP[i].attrib = pEP->attributes; - - #if(USBFS_1_EP_MM == USBFS_1__EP_DMAAUTO) - break; /* use first EP setting in Auto memory managment */ - #endif /* End USBFS_1_EP_MM == USBFS_1__EP_DMAAUTO */ - } - } - pEP = &pEP[1u]; - } - } - #endif /* End (USBFS_1_EP_MA == USBFS_1__MA_DYNAMIC) */ - - /* Init class array for each interface and interface number for each EP. - * It is used for handling Class specific requests directed to either an - * interface or the endpoint. - */ - /* p_list points the endpoint setting table. */ - pEP = (const T_USBFS_1_EP_SETTINGS_BLOCK CYCODE *) pTmp->p_list; - for (i = 0u; i < ep; i++) - { - /* Configure interface number for each EP*/ - USBFS_1_EP[pEP->addr & USBFS_1_DIR_UNUSED].interface = pEP->interface; - pEP = &pEP[1u]; - } - /* Init pointer on interface class table*/ - USBFS_1_interfaceClass = USBFS_1_GetInterfaceClassTablePtr(); - /* Set the endpoint buffer addresses */ - - #if(USBFS_1_EP_MM != USBFS_1__EP_DMAAUTO) - for (ep = USBFS_1_EP1; ep < USBFS_1_MAX_EP; ep++) - { - USBFS_1_EP[ep].buffOffset = buffCount; - buffCount += USBFS_1_EP[ep].bufferSize; - } - #endif /* End USBFS_1_EP_MM != USBFS_1__EP_DMAAUTO */ - - /* Configure hardware registers */ - USBFS_1_ConfigReg(); - } /* USBFS_1_configuration > 0 */ -} - - -/******************************************************************************* -* Function Name: USBFS_1_ConfigAltChanged -******************************************************************************** -* -* Summary: -* This routine update configuration for the required endpoints only. -* It is called after SET_INTERFACE request when Static memory allocation used. -* -* Parameters: -* None. -* -* Return: -* None. -* -* Reentrant: -* No. -* -*******************************************************************************/ -void USBFS_1_ConfigAltChanged(void) -{ - uint8 ep; - uint8 cur_ep; - uint8 i; - uint8 ep_type; - uint8 ri; - - const T_USBFS_1_LUT CYCODE *pTmp; - const T_USBFS_1_EP_SETTINGS_BLOCK CYCODE *pEP; - - - /* Init Endpoints and Device Status if configured */ - if(USBFS_1_configuration > 0u) - { - pTmp = USBFS_1_GetConfigTablePtr(USBFS_1_configuration - 1u); - pTmp = &pTmp[1u]; - ep = pTmp->c; /* For this table, c is the number of endpoints configurations */ - - /* Do not touch EP which doesn't need reconfiguration */ - /* When Alt setting changed, the only required endpoints need to be reconfigured */ - /* p_list points the endpoint setting table. */ - pEP = (const T_USBFS_1_EP_SETTINGS_BLOCK CYCODE *) pTmp->p_list; - for (i = 0u; i < ep; i++) - { - /*If Alt setting changed and new is same with EP Alt */ - if((USBFS_1_interfaceSetting[pEP->interface] != - USBFS_1_interfaceSetting_last[pEP->interface] ) && - (USBFS_1_interfaceSetting[pEP->interface] == pEP->altSetting) && - (pEP->interface == CY_GET_REG8(USBFS_1_wIndexLo))) - { - cur_ep = pEP->addr & USBFS_1_DIR_UNUSED; - ri = ((cur_ep - USBFS_1_EP1) << USBFS_1_EPX_CNTX_ADDR_SHIFT); - ep_type = pEP->attributes & USBFS_1_EP_TYPE_MASK; - if ((pEP->addr & USBFS_1_DIR_IN) != 0u) - { - /* IN Endpoint */ - USBFS_1_EP[cur_ep].apiEpState = USBFS_1_EVENT_PENDING; - USBFS_1_EP[cur_ep].epMode = (ep_type == USBFS_1_EP_TYPE_ISOC) ? - USBFS_1_MODE_ISO_IN : USBFS_1_MODE_ACK_IN; - } - else - { - /* OUT Endpoint */ - USBFS_1_EP[cur_ep].apiEpState = USBFS_1_NO_EVENT_PENDING; - USBFS_1_EP[cur_ep].epMode = (ep_type == USBFS_1_EP_TYPE_ISOC) ? - USBFS_1_MODE_ISO_OUT : USBFS_1_MODE_ACK_OUT; - } - /* Change the SIE mode for the selected EP to NAK ALL */ - CY_SET_REG8((reg8 *)(USBFS_1_SIE_EP1_CR0_IND + ri), USBFS_1_MODE_NAK_IN_OUT); - USBFS_1_EP[cur_ep].bufferSize = pEP->bufferSize; - USBFS_1_EP[cur_ep].addr = pEP->addr; - USBFS_1_EP[cur_ep].attrib = pEP->attributes; - - /* Clear the data toggle */ - USBFS_1_EP[cur_ep].epToggle = 0u; - - /* Dynamic reconfiguration for mode 3 transfer */ - #if(USBFS_1_EP_MM == USBFS_1__EP_DMAAUTO) - /* In_data_rdy for selected EP should be set to 0 */ - * (reg8 *)(USBFS_1_ARB_EP1_CFG_IND + ri) &= (uint8)~USBFS_1_ARB_EPX_CFG_IN_DATA_RDY; - - /* write the EP number for which reconfiguration is required */ - USBFS_1_DYN_RECONFIG_REG = (cur_ep - USBFS_1_EP1) << - USBFS_1_DYN_RECONFIG_EP_SHIFT; - /* Set the dyn_config_en bit in dynamic reconfiguration register */ - USBFS_1_DYN_RECONFIG_REG |= USBFS_1_DYN_RECONFIG_ENABLE; - /* wait for the dyn_config_rdy bit to set by the block, - * this bit will be set to 1 when block is ready for reconfiguration. - */ - while((USBFS_1_DYN_RECONFIG_REG & USBFS_1_DYN_RECONFIG_RDY_STS) == 0u) - { - ; - } - /* Once dyn_config_rdy bit is set, FW can change the EP configuration. */ - /* Change EP Type with new direction */ - if((pEP->addr & USBFS_1_DIR_IN) == 0u) - { - USBFS_1_EP_TYPE_REG |= (uint8)(0x01u << (cur_ep - USBFS_1_EP1)); - } - else - { - USBFS_1_EP_TYPE_REG &= (uint8)~(uint8)(0x01u << (cur_ep - USBFS_1_EP1)); - } - /* dynamic reconfiguration enable bit cleared, pointers and control/status - * signals for the selected EP is cleared/re-initialized on negative edge - * of dynamic reconfiguration enable bit). - */ - USBFS_1_DYN_RECONFIG_REG &= (uint8)~USBFS_1_DYN_RECONFIG_ENABLE; - /* The main loop has to re-enable DMA and OUT endpoint*/ - #else - CY_SET_REG8((reg8 *)(USBFS_1_SIE_EP1_CNT0_IND + ri), - USBFS_1_EP[cur_ep].bufferSize >> 8u); - CY_SET_REG8((reg8 *)(USBFS_1_SIE_EP1_CNT1_IND + ri), - USBFS_1_EP[cur_ep].bufferSize & 0xFFu); - CY_SET_REG8((reg8 *)(USBFS_1_ARB_RW1_RA_IND + ri), - USBFS_1_EP[cur_ep].buffOffset & 0xFFu); - CY_SET_REG8((reg8 *)(USBFS_1_ARB_RW1_RA_MSB_IND + ri), - USBFS_1_EP[cur_ep].buffOffset >> 8u); - CY_SET_REG8((reg8 *)(USBFS_1_ARB_RW1_WA_IND + ri), - USBFS_1_EP[cur_ep].buffOffset & 0xFFu); - CY_SET_REG8((reg8 *)(USBFS_1_ARB_RW1_WA_MSB_IND + ri), - USBFS_1_EP[cur_ep].buffOffset >> 8u); - #endif /* End USBFS_1_EP_MM == USBFS_1__EP_DMAAUTO */ - } - /* Get next EP element */ - pEP = &pEP[1u]; - } - } /* USBFS_1_configuration > 0 */ -} - - -/******************************************************************************* -* Function Name: USBFS_1_GetConfigTablePtr -******************************************************************************** -* -* Summary: -* This routine returns a pointer a configuration table entry -* -* Parameters: -* c: Configuration Index -* -* Return: -* Device Descriptor pointer. -* -*******************************************************************************/ -const T_USBFS_1_LUT CYCODE *USBFS_1_GetConfigTablePtr(uint8 c) - -{ - /* Device Table */ - const T_USBFS_1_LUT CYCODE *pTmp; - - pTmp = (const T_USBFS_1_LUT CYCODE *) USBFS_1_TABLE[USBFS_1_device].p_list; - - /* The first entry points to the Device Descriptor, - * the rest configuration entries. - */ - return( (const T_USBFS_1_LUT CYCODE *) pTmp[c + 1u].p_list ); -} - - -/******************************************************************************* -* Function Name: USBFS_1_GetDeviceTablePtr -******************************************************************************** -* -* Summary: -* This routine returns a pointer to the Device table -* -* Parameters: -* None. -* -* Return: -* Device Table pointer -* -*******************************************************************************/ -const T_USBFS_1_LUT CYCODE *USBFS_1_GetDeviceTablePtr(void) - -{ - /* Device Table */ - return( (const T_USBFS_1_LUT CYCODE *) USBFS_1_TABLE[USBFS_1_device].p_list ); -} - - -/******************************************************************************* -* Function Name: USB_GetInterfaceClassTablePtr -******************************************************************************** -* -* Summary: -* This routine returns Interface Class table pointer, which contains -* the relation between interface number and interface class. -* -* Parameters: -* None. -* -* Return: -* Interface Class table pointer. -* -*******************************************************************************/ -const uint8 CYCODE *USBFS_1_GetInterfaceClassTablePtr(void) - -{ - const T_USBFS_1_LUT CYCODE *pTmp; - uint8 currentInterfacesNum; - - pTmp = USBFS_1_GetConfigTablePtr(USBFS_1_configuration - 1u); - currentInterfacesNum = ((const uint8 *) pTmp->p_list)[USBFS_1_CONFIG_DESCR_NUM_INTERFACES]; - /* Third entry in the LUT starts the Interface Table pointers */ - /* The INTERFACE_CLASS table is located after all interfaces */ - pTmp = &pTmp[currentInterfacesNum + 2u]; - return( (const uint8 CYCODE *) pTmp->p_list ); -} - - -/******************************************************************************* -* Function Name: USBFS_1_TerminateEP -******************************************************************************** -* -* Summary: -* This function terminates the specified USBFS endpoint. -* This function should be used before endpoint reconfiguration. -* -* Parameters: -* Endpoint number. -* -* Return: -* None. -* -* Reentrant: -* No. -* -*******************************************************************************/ -void USBFS_1_TerminateEP(uint8 ep) -{ - uint8 ri; - - ep &= USBFS_1_DIR_UNUSED; - ri = ((ep - USBFS_1_EP1) << USBFS_1_EPX_CNTX_ADDR_SHIFT); - - if ((ep > USBFS_1_EP0) && (ep < USBFS_1_MAX_EP)) - { - /* Set the endpoint Halt */ - USBFS_1_EP[ep].hwEpState |= (USBFS_1_ENDPOINT_STATUS_HALT); - - /* Clear the data toggle */ - USBFS_1_EP[ep].epToggle = 0u; - USBFS_1_EP[ep].apiEpState = USBFS_1_NO_EVENT_ALLOWED; - - if ((USBFS_1_EP[ep].addr & USBFS_1_DIR_IN) != 0u) - { - /* IN Endpoint */ - CY_SET_REG8((reg8 *)(USBFS_1_SIE_EP1_CR0_IND + ri), USBFS_1_MODE_NAK_IN); - } - else - { - /* OUT Endpoint */ - CY_SET_REG8((reg8 *)(USBFS_1_SIE_EP1_CR0_IND + ri), USBFS_1_MODE_NAK_OUT); - } - } -} - - -/******************************************************************************* -* Function Name: USBFS_1_SetEndpointHalt -******************************************************************************** -* -* Summary: -* This routine handles set endpoint halt. -* -* Parameters: -* None. -* -* Return: -* requestHandled. -* -* Reentrant: -* No. -* -*******************************************************************************/ -uint8 USBFS_1_SetEndpointHalt(void) -{ - uint8 ep; - uint8 ri; - uint8 requestHandled = USBFS_1_FALSE; - - /* Set endpoint halt */ - ep = CY_GET_REG8(USBFS_1_wIndexLo) & USBFS_1_DIR_UNUSED; - ri = ((ep - USBFS_1_EP1) << USBFS_1_EPX_CNTX_ADDR_SHIFT); - - if ((ep > USBFS_1_EP0) && (ep < USBFS_1_MAX_EP)) - { - /* Set the endpoint Halt */ - USBFS_1_EP[ep].hwEpState |= (USBFS_1_ENDPOINT_STATUS_HALT); - - /* Clear the data toggle */ - USBFS_1_EP[ep].epToggle = 0u; - USBFS_1_EP[ep].apiEpState |= USBFS_1_NO_EVENT_ALLOWED; - - if ((USBFS_1_EP[ep].addr & USBFS_1_DIR_IN) != 0u) - { - /* IN Endpoint */ - CY_SET_REG8((reg8 *)(USBFS_1_SIE_EP1_CR0_IND + ri), USBFS_1_MODE_STALL_DATA_EP | - USBFS_1_MODE_ACK_IN); - } - else - { - /* OUT Endpoint */ - CY_SET_REG8((reg8 *)(USBFS_1_SIE_EP1_CR0_IND + ri), USBFS_1_MODE_STALL_DATA_EP | - USBFS_1_MODE_ACK_OUT); - } - requestHandled = USBFS_1_InitNoDataControlTransfer(); - } - - return(requestHandled); -} - - -/******************************************************************************* -* Function Name: USBFS_1_ClearEndpointHalt -******************************************************************************** -* -* Summary: -* This routine handles clear endpoint halt. -* -* Parameters: -* None. -* -* Return: -* requestHandled. -* -* Reentrant: -* No. -* -*******************************************************************************/ -uint8 USBFS_1_ClearEndpointHalt(void) -{ - uint8 ep; - uint8 ri; - uint8 requestHandled = USBFS_1_FALSE; - - /* Clear endpoint halt */ - ep = CY_GET_REG8(USBFS_1_wIndexLo) & USBFS_1_DIR_UNUSED; - ri = ((ep - USBFS_1_EP1) << USBFS_1_EPX_CNTX_ADDR_SHIFT); - - if ((ep > USBFS_1_EP0) && (ep < USBFS_1_MAX_EP)) - { - /* Clear the endpoint Halt */ - USBFS_1_EP[ep].hwEpState &= (uint8)~(USBFS_1_ENDPOINT_STATUS_HALT); - - /* Clear the data toggle */ - USBFS_1_EP[ep].epToggle = 0u; - /* Clear toggle bit for already armed packet */ - CY_SET_REG8((reg8 *)(USBFS_1_SIE_EP1_CNT0_IND + ri), CY_GET_REG8( - (reg8 *)(USBFS_1_SIE_EP1_CNT0_IND + ri)) & (uint8)~USBFS_1_EPX_CNT_DATA_TOGGLE); - /* Return API State as it was defined before */ - USBFS_1_EP[ep].apiEpState &= (uint8)~USBFS_1_NO_EVENT_ALLOWED; - - if ((USBFS_1_EP[ep].addr & USBFS_1_DIR_IN) != 0u) - { - /* IN Endpoint */ - if(USBFS_1_EP[ep].apiEpState == USBFS_1_IN_BUFFER_EMPTY) - { /* Wait for next packet from application */ - CY_SET_REG8((reg8 *)(USBFS_1_SIE_EP1_CR0_IND + ri), USBFS_1_MODE_NAK_IN); - } - else /* Continue armed transfer */ - { - CY_SET_REG8((reg8 *)(USBFS_1_SIE_EP1_CR0_IND + ri), USBFS_1_MODE_ACK_IN); - } - } - else - { - /* OUT Endpoint */ - if(USBFS_1_EP[ep].apiEpState == USBFS_1_OUT_BUFFER_FULL) - { /* Allow application to read full buffer */ - CY_SET_REG8((reg8 *)(USBFS_1_SIE_EP1_CR0_IND + ri), USBFS_1_MODE_NAK_OUT); - } - else /* Mark endpoint as empty, so it will be reloaded */ - { - CY_SET_REG8((reg8 *)(USBFS_1_SIE_EP1_CR0_IND + ri), USBFS_1_MODE_ACK_OUT); - } - } - requestHandled = USBFS_1_InitNoDataControlTransfer(); - } - - return(requestHandled); -} - - -/******************************************************************************* -* Function Name: USBFS_1_ValidateAlternateSetting -******************************************************************************** -* -* Summary: -* Validates (and records) a SET INTERFACE request. -* -* Parameters: -* None. -* -* Return: -* requestHandled. -* -* Reentrant: -* No. -* -*******************************************************************************/ -uint8 USBFS_1_ValidateAlternateSetting(void) -{ - uint8 requestHandled = USBFS_1_TRUE; - uint8 interfaceNum; - const T_USBFS_1_LUT CYCODE *pTmp; - uint8 currentInterfacesNum; - - interfaceNum = CY_GET_REG8(USBFS_1_wIndexLo); - /* Validate interface setting, stall if invalid. */ - pTmp = USBFS_1_GetConfigTablePtr(USBFS_1_configuration - 1u); - currentInterfacesNum = ((const uint8 *) pTmp->p_list)[USBFS_1_CONFIG_DESCR_NUM_INTERFACES]; - - if((interfaceNum >= currentInterfacesNum) || (interfaceNum >= USBFS_1_MAX_INTERFACES_NUMBER)) - { /* Wrong interface number */ - requestHandled = USBFS_1_FALSE; - } - else - { - /* Save current Alt setting to find out the difference in Config() function */ - USBFS_1_interfaceSetting_last[interfaceNum] = USBFS_1_interfaceSetting[interfaceNum]; - USBFS_1_interfaceSetting[interfaceNum] = CY_GET_REG8(USBFS_1_wValueLo); - } - - return (requestHandled); -} - - -/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_vnd.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_vnd.c deleted file mode 100644 index d54879b..0000000 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_1_vnd.c +++ /dev/null @@ -1,96 +0,0 @@ -/******************************************************************************* -* File Name: USBFS_1_vnd.c -* Version 2.60 -* -* Description: -* USB vendor request handler. -* -* Note: -* -******************************************************************************** -* Copyright 2008-2013, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - -#include "USBFS_1.h" -#include "USBFS_1_pvt.h" - -#if(USBFS_1_EXTERN_VND == USBFS_1_FALSE) - - -/*************************************** -* Vendor Specific Declarations -***************************************/ - -/* `#START VENDOR_SPECIFIC_DECLARATIONS` Place your declaration here */ - -/* `#END` */ - - -/******************************************************************************* -* Function Name: USBFS_1_HandleVendorRqst -******************************************************************************** -* -* Summary: -* This routine provide users with a method to implement vendor specifc -* requests. -* -* To implement vendor specific requests, add your code in this function to -* decode and disposition the request. If the request is handled, your code -* must set the variable "requestHandled" to TRUE, indicating that the -* request has been handled. -* -* Parameters: -* None. -* -* Return: -* requestHandled. -* -* Reentrant: -* No. -* -*******************************************************************************/ -uint8 USBFS_1_HandleVendorRqst(void) -{ - uint8 requestHandled = USBFS_1_FALSE; - - if ((CY_GET_REG8(USBFS_1_bmRequestType) & USBFS_1_RQST_DIR_MASK) == USBFS_1_RQST_DIR_D2H) - { - /* Control Read */ - switch (CY_GET_REG8(USBFS_1_bRequest)) - { - case USBFS_1_GET_EXTENDED_CONFIG_DESCRIPTOR: - #if defined(USBFS_1_ENABLE_MSOS_STRING) - USBFS_1_currentTD.pData = (volatile uint8 *)&USBFS_1_MSOS_CONFIGURATION_DESCR[0u]; - USBFS_1_currentTD.count = USBFS_1_MSOS_CONFIGURATION_DESCR[0u]; - requestHandled = USBFS_1_InitControlRead(); - #endif /* End USBFS_1_ENABLE_MSOS_STRING */ - break; - default: - break; - } - } - - /* `#START VENDOR_SPECIFIC_CODE` Place your vendor specific request here */ - - /* `#END` */ - - return(requestHandled); -} - - -/******************************************************************************* -* Additional user functions supporting Vendor Specific Requests -********************************************************************************/ - -/* `#START VENDOR_SPECIFIC_FUNCTIONS` Place any additional functions here */ - -/* `#END` */ - - -#endif /* USBFS_1_EXTERN_VND */ - - -/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_descr.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_descr.c index 1442597..aa9c37c 100755 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_descr.c +++ b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_descr.c @@ -55,11 +55,11 @@ const uint8 CYCODE USBFS_DEVICE0_DESCR[18u] = { /********************************************************************* * Config Descriptor *********************************************************************/ -const uint8 CYCODE USBFS_DEVICE0_CONFIGURATION0_DESCR[41u] = { +const uint8 CYCODE USBFS_DEVICE0_CONFIGURATION0_DESCR[73u] = { /* Config Descriptor Length */ 0x09u, /* DescriptorType: CONFIG */ 0x02u, -/* wTotalLength */ 0x29u, 0x00u, -/* bNumInterfaces */ 0x01u, +/* wTotalLength */ 0x49u, 0x00u, +/* bNumInterfaces */ 0x02u, /* bConfigurationValue */ 0x01u, /* iConfiguration */ 0x00u, /* bmAttributes */ 0x80u, @@ -104,6 +104,47 @@ const uint8 CYCODE USBFS_DEVICE0_CONFIGURATION0_DESCR[41u] = { /* bEndpointAddress */ 0x82u, /* bmAttributes */ 0x03u, /* wMaxPacketSize */ 0x40u, 0x00u, +/* bInterval */ 0x40u, +/********************************************************************* +* Interface Descriptor +*********************************************************************/ +/* Interface Descriptor Length */ 0x09u, +/* DescriptorType: INTERFACE */ 0x04u, +/* bInterfaceNumber */ 0x01u, +/* bAlternateSetting */ 0x00u, +/* bNumEndpoints */ 0x02u, +/* bInterfaceClass */ 0x03u, +/* bInterfaceSubClass */ 0x00u, +/* bInterfaceProtocol */ 0x00u, +/* iInterface */ 0x00u, +/********************************************************************* +* HID Class Descriptor +*********************************************************************/ +/* HID Class Descriptor Length */ 0x09u, +/* DescriptorType: HID_CLASS */ 0x21u, +/* bcdHID */ 0x11u, 0x01u, +/* bCountryCode */ 0x00u, +/* bNumDescriptors */ 0x01u, +/* bDescriptorType */ 0x22u, +/* wDescriptorLength (LSB) */ USBFS_HID_RPT_1_SIZE_LSB, +/* wDescriptorLength (MSB) */ USBFS_HID_RPT_1_SIZE_MSB, +/********************************************************************* +* Endpoint Descriptor +*********************************************************************/ +/* Endpoint Descriptor Length */ 0x07u, +/* DescriptorType: ENDPOINT */ 0x05u, +/* bEndpointAddress */ 0x03u, +/* bmAttributes */ 0x03u, +/* wMaxPacketSize */ 0x40u, 0x00u, +/* bInterval */ 0x80u, +/********************************************************************* +* Endpoint Descriptor +*********************************************************************/ +/* Endpoint Descriptor Length */ 0x07u, +/* DescriptorType: ENDPOINT */ 0x05u, +/* bEndpointAddress */ 0x84u, +/* bmAttributes */ 0x03u, +/* wMaxPacketSize */ 0x40u, 0x00u, /* bInterval */ 0x40u }; @@ -221,6 +262,53 @@ const T_USBFS_LUT CYCODE USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_ {0x01u, (const void *)&USBFS_DEVICE0_CONFIGURATION0_DESCR[18]} }; #endif /* USER_DEFINE_USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_HID_RPT_STORAGE */ +#if !defined(USER_DEFINE_USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_HID_RPT_STORAGE) +/********************************************************************* +* HID Input Report Storage +*********************************************************************/ +T_USBFS_XFER_STATUS_BLOCK USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_IN_RPT_SCB; +uint8 USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_IN_BUF[ + USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_IN_BUF_SIZE]; + +/********************************************************************* +* HID Input Report TD Table +*********************************************************************/ +const T_USBFS_TD CYCODE USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_IN_RPT_TABLE[1u] = { + {USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_IN_BUF_SIZE, + &USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_IN_BUF[0u], + &USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_IN_RPT_SCB}, +}; +/********************************************************************* +* HID Output Report Storage +*********************************************************************/ +T_USBFS_XFER_STATUS_BLOCK USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_OUT_RPT_SCB; +uint8 USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_OUT_BUF[ + USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_OUT_BUF_SIZE]; + +/********************************************************************* +* HID Output Report TD Table +*********************************************************************/ +const T_USBFS_TD CYCODE USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_OUT_RPT_TABLE[1u] = { + {USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_OUT_BUF_SIZE, + &USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_OUT_BUF[0u], + &USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_OUT_RPT_SCB}, +}; +/********************************************************************* +* HID Report Look Up Table This table has four entries: +* IN Report Table +* OUT Report Table +* Feature Report Table +* HID Report Descriptor +* HID Class Descriptor +*********************************************************************/ +const T_USBFS_LUT CYCODE USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_TABLE[5u] = { + {0x00u, &USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_IN_RPT_TABLE}, + {0x00u, &USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_OUT_RPT_TABLE}, + {0x00u, NULL}, + {0x01u, (const void *)&USBFS_HIDREPORT_DESCRIPTOR1[0]}, + {0x01u, (const void *)&USBFS_DEVICE0_CONFIGURATION0_DESCR[50]} +}; +#endif /* USER_DEFINE_USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_HID_RPT_STORAGE */ /********************************************************************* * Interface Dispatch Table -- Points to the Class Dispatch Tables @@ -230,29 +318,39 @@ const T_USBFS_LUT CYCODE USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_TABLE[1u] = { &USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_TABLE} }; /********************************************************************* +* Interface Dispatch Table -- Points to the Class Dispatch Tables +*********************************************************************/ +const T_USBFS_LUT CYCODE USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_TABLE[1u] = { + {USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_COUNT, + &USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_TABLE} +}; +/********************************************************************* * Endpoint Setting Table -- This table contain the endpoint setting * for each endpoint in the configuration. It * contains the necessary information to * configure the endpoint hardware for each * interface and alternate setting. *********************************************************************/ -const T_USBFS_EP_SETTINGS_BLOCK CYCODE USBFS_DEVICE0_CONFIGURATION0_EP_SETTINGS_TABLE[2u] = { +const T_USBFS_EP_SETTINGS_BLOCK CYCODE USBFS_DEVICE0_CONFIGURATION0_EP_SETTINGS_TABLE[4u] = { /* IFC ALT EPAddr bmAttr MaxPktSize Class ********************/ {0x00u, 0x00u, 0x01u, 0x03u, 0x0040u, 0x03u}, -{0x00u, 0x00u, 0x82u, 0x03u, 0x0040u, 0x03u} +{0x00u, 0x00u, 0x82u, 0x03u, 0x0040u, 0x03u}, +{0x01u, 0x00u, 0x03u, 0x03u, 0x0040u, 0x03u}, +{0x01u, 0x00u, 0x84u, 0x03u, 0x0040u, 0x03u} }; -const uint8 CYCODE USBFS_DEVICE0_CONFIGURATION0_INTERFACE_CLASS[1u] = { -0x03u +const uint8 CYCODE USBFS_DEVICE0_CONFIGURATION0_INTERFACE_CLASS[2u] = { +0x03u, 0x03u }; /********************************************************************* * Config Dispatch Table -- Points to the Config Descriptor and each of * and endpoint setup table and to each * interface table if it specifies a USB Class *********************************************************************/ -const T_USBFS_LUT CYCODE USBFS_DEVICE0_CONFIGURATION0_TABLE[4u] = { +const T_USBFS_LUT CYCODE USBFS_DEVICE0_CONFIGURATION0_TABLE[5u] = { {0x01u, &USBFS_DEVICE0_CONFIGURATION0_DESCR}, - {0x02u, &USBFS_DEVICE0_CONFIGURATION0_EP_SETTINGS_TABLE}, + {0x04u, &USBFS_DEVICE0_CONFIGURATION0_EP_SETTINGS_TABLE}, {0x01u, &USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_TABLE}, + {0x01u, &USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_TABLE}, {0x00u, &USBFS_DEVICE0_CONFIGURATION0_INTERFACE_CLASS} }; /********************************************************************* diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_pvt.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_pvt.h index 3811937..d344831 100755 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_pvt.h +++ b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_pvt.h @@ -26,11 +26,12 @@ /* Generated external references for descriptors*/ extern const uint8 CYCODE USBFS_DEVICE0_DESCR[18u]; -extern const uint8 CYCODE USBFS_DEVICE0_CONFIGURATION0_DESCR[41u]; +extern const uint8 CYCODE USBFS_DEVICE0_CONFIGURATION0_DESCR[73u]; extern const T_USBFS_LUT CYCODE USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_TABLE[1u]; -extern const T_USBFS_EP_SETTINGS_BLOCK CYCODE USBFS_DEVICE0_CONFIGURATION0_EP_SETTINGS_TABLE[2u]; -extern const uint8 CYCODE USBFS_DEVICE0_CONFIGURATION0_INTERFACE_CLASS[1u]; -extern const T_USBFS_LUT CYCODE USBFS_DEVICE0_CONFIGURATION0_TABLE[4u]; +extern const T_USBFS_LUT CYCODE USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_TABLE[1u]; +extern const T_USBFS_EP_SETTINGS_BLOCK CYCODE USBFS_DEVICE0_CONFIGURATION0_EP_SETTINGS_TABLE[4u]; +extern const uint8 CYCODE USBFS_DEVICE0_CONFIGURATION0_INTERFACE_CLASS[2u]; +extern const T_USBFS_LUT CYCODE USBFS_DEVICE0_CONFIGURATION0_TABLE[5u]; extern const T_USBFS_LUT CYCODE USBFS_DEVICE0_TABLE[2u]; extern const T_USBFS_LUT CYCODE USBFS_TABLE[1u]; extern const uint8 CYCODE USBFS_SN_STRING_DESCRIPTOR[10]; @@ -41,10 +42,19 @@ extern uint8 USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_IN_BUF[ extern T_USBFS_XFER_STATUS_BLOCK USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_OUT_RPT_SCB; extern uint8 USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_OUT_BUF[ USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_OUT_BUF_SIZE]; +extern T_USBFS_XFER_STATUS_BLOCK USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_IN_RPT_SCB; +extern uint8 USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_IN_BUF[ + USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_IN_BUF_SIZE]; +extern T_USBFS_XFER_STATUS_BLOCK USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_OUT_RPT_SCB; +extern uint8 USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_OUT_BUF[ + USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_OUT_BUF_SIZE]; extern const uint8 CYCODE USBFS_HIDREPORT_DESCRIPTOR1[40u]; extern const T_USBFS_TD CYCODE USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_IN_RPT_TABLE[1u]; extern const T_USBFS_TD CYCODE USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_OUT_RPT_TABLE[1u]; extern const T_USBFS_LUT CYCODE USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_TABLE[5u]; +extern const T_USBFS_TD CYCODE USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_IN_RPT_TABLE[1u]; +extern const T_USBFS_TD CYCODE USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_OUT_RPT_TABLE[1u]; +extern const T_USBFS_LUT CYCODE USBFS_DEVICE0_CONFIGURATION0_INTERFACE1_ALTERNATE0_HID_TABLE[5u]; extern const uint8 CYCODE USBFS_MSOS_DESCRIPTOR[USBFS_MSOS_DESCRIPTOR_LENGTH]; diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cm3gcc.ld b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cm3gcc.ld index 08c8807..e959beb 100755 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cm3gcc.ld +++ b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cm3gcc.ld @@ -217,7 +217,7 @@ SECTIONS .heap (NOLOAD) : { . = _end; - . += 0x0256; + . += 0x0400; __cy_heap_limit = .; } >ram diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/config.hex b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/config.hex deleted file mode 100644 index b3a1c79..0000000 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/config.hex +++ /dev/null @@ -1,70 +0,0 @@ -:2000000003450040095200400264004044000140360101403E0201404E0301404B04014077 -:2000200057050140050601404A07014014090140370A0140380B01400F0D0140020F014032 -:2000400005150140421601404417014008190140041B01400E4001400E41014005420140A7 -:20006000054301400A440140164501400846014008470140084801400C490140014C0140F8 -:200080000650014001510140360265027E020101180419041C6120502198300531097C400B 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-:20024000388039284040411449064A8150405244530158505A085B016018638268066A0180 -:200260006B206D407121722281408340870188108B028D108E10924C9538962197C2991050 -:200280009B889C079D039EAA9F10A4B2A629A720AD40AF20B210C005C2E6C48DCA0BCC0830 -:2002A000CE0ED007D208D60FD80FE206E610EC08030406040730084009410E030F411024A4 -:2002C0001141120915121618170D19411A201C401D021F0120402141242425052612270A6C -:2002E00029232A242B0C2C402F08314032383440353C3607370338203B803E103F01580456 -:20030000590B5C995F0182FF849685698669879688FF8C0F8D338EF08FCC9033910F92CC13 -:2003200093F095FF99FF9D559FAAA6FFAC55AEAAAFFFB6FFB7FFBE40BF40D608D804D90428 -:20034000DB04DD90DF01000801800308040205500610070209200A110B800F801180126002 -:200360001310178819801A101B501E0120042243254028042A022B222D4030013248331080 -:200380003510378A380439903B413F845E406402668078028008821084408A808C018D406D -:2003A00091689240939095109630974099109A019BA89C4B9D809E189F02A004A120A22103 -:2003C000A308A4A0A608A731A810A908AB80AC04AE40B681B710C0F7C21FC4AFCA1FCCFFB9 -:2003E000CE5FD610D810DE01E001E60CE801EA10EC10EE012C0136013E4058045F01015093 -:20040000036008040AA80E010F02102212081302160119011E0120042204230128212911F9 -:2004200030223244380439403A023B10426043204401474049044A0A4B02500252145302EC -:200440006280686069D46B50708072027302780289029128928295909620970198029A01A7 -:200460009B209C059D409E0A9F10A283A4A0A608A723AD80B2D0B304B404C00FC20EC48FFB -:20048000CA0FCC0FCE0FD007D20CD808DE01E601E80880108801901097809C409D089E2071 -:2004A000A401A908AD01AF80B122B211B404B740E080E808EA83EC40EEA0003302CC0855EF -:2004C0000AAA0D011069129616FF1AFF1C0F1EF026FF29023301350236FF3E403F145804B5 -:2004E00059045F0180058138820A842089258B028C038E0C8F3894109509970699049B038C -:200500009C069D409E09A103A314AC40B00FB240B338B420B507B610B740BB20BE55BF4494 -:20052000D804D908DC90DF010101020404080542086809020D080F01130816011A011C0846 -:200540001D021F842208230424102610270229202F4035083610378038803C023E203F80F0 -:200560007E02838187048A028C0890809704982099429A059B089C409F02A404A608AA044B -:20058000AB02C0BAC2AFC484CA84CC70CEB8DE10E040E420E801EE408208844087048804DD -:2005A0008C6099429A019B08AD02B601E040E220E408E680EE208308854082209E20AE08E8 -:2005C000B208B51006040E03160418041A021C041E013607544058045B0B5C095D905F01AB -:2005E000803084108542860F870488408A0C8B468C4C8D46900494019539962E9706980105 -:2006000099019A129B5E9D429E40A04CA146A444A504A608A720A808A977AB08AC0CAD46D7 -:20062000AE40B031B108B240B30FB40FB570B701B802B908BB30BE04BF41D409D80BD90B12 -:20064000DB0BDC99DD90DF0100840112054007200A840B120D140E02102011401204130267 -:20066000191A1A041B201D402004212022982398281129102A06312032483954442047080A -:20068000581059045A025B80628065086610670278027C02812082408940917C9282930256 -:2006A00096609710980399049A169B229C209D529E28A060A201A608A720C0AFC2EFC40F7C -:2006C000CA0FCC0ECE0ED60FD878DE81E004EE088220884097809C409D089E20E080EE0807 -:2006E000B340B508E840EC8033805B40620163026680670882038704CC10D480D6C0D8C0DD -:20070000E220E6305210530183018E809A129E809F40A780AE10AF01D4A0E620EA40EE1099 -:2007200094019A02A780B401B740822094019A02A780E6800C041080538054105A105C4078 -:20074000C204C408D407D6040301048109040B040E020F40878088048C41944096109704D9 -:200760009804A410A780B304B480C007C20FE002E609EE06908093409B01A201A410AA102A -:20078000B504EE020808A840AC10AF01B340B601C208EA0C2340240194019A02A220AF8038 -:2007A000C860EE1007105220560283109A02A220AF40C020D420D620E020EC40AC080101A6 -:2007C00009010B010D0111011B010002C00102001F402000C00808219001400080100080B1 -:2007E0007F0480000001600000010000C0400100C02204080007FF1800019F00FF000040A8 -:20080000003F008000280000000001106402500003DEF0BC3BFFFFFF2200F0080400000047 -:2008200000000220040B0B0B909900010000C00040011011C00100114001400100000000D1 -:2008400000000000000000000000000000FFFF000300000008003000080000000000000057 -:2008600000000000100000000000000000000000C0000000FF000000000000011000631C19 -:200880001C000C000000000000FCFC00F80000000F00000000000001F00F0F000F00000112 -:00000001FF diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/core_cm3.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/core_cm3.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/core_cm3_psoc5.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/core_cm3_psoc5.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/core_cmFunc.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/core_cmFunc.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/core_cmInstr.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/core_cmInstr.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cyPm.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cyPm.c old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cyPm.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cyPm.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cydisabledsheets.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cydisabledsheets.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cyfitter.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cyfitter.h index 46fd82e..8fdbe98 100755 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cyfitter.h +++ b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cyfitter.h @@ -3,6 +3,34 @@ #include #include +/* Debug_Timer_Interrupt */ +#define Debug_Timer_Interrupt__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0 +#define Debug_Timer_Interrupt__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0 +#define Debug_Timer_Interrupt__INTC_MASK 0x01u +#define Debug_Timer_Interrupt__INTC_NUMBER 0u +#define Debug_Timer_Interrupt__INTC_PRIOR_NUM 7u +#define Debug_Timer_Interrupt__INTC_PRIOR_REG CYREG_NVIC_PRI_0 +#define Debug_Timer_Interrupt__INTC_SET_EN_REG CYREG_NVIC_SETENA0 +#define Debug_Timer_Interrupt__INTC_SET_PD_REG CYREG_NVIC_SETPEND0 + +/* Debug_Timer_TimerHW */ +#define Debug_Timer_TimerHW__CAP0 CYREG_TMR0_CAP0 +#define Debug_Timer_TimerHW__CAP1 CYREG_TMR0_CAP1 +#define Debug_Timer_TimerHW__CFG0 CYREG_TMR0_CFG0 +#define Debug_Timer_TimerHW__CFG1 CYREG_TMR0_CFG1 +#define Debug_Timer_TimerHW__CFG2 CYREG_TMR0_CFG2 +#define Debug_Timer_TimerHW__CNT_CMP0 CYREG_TMR0_CNT_CMP0 +#define Debug_Timer_TimerHW__CNT_CMP1 CYREG_TMR0_CNT_CMP1 +#define Debug_Timer_TimerHW__PER0 CYREG_TMR0_PER0 +#define Debug_Timer_TimerHW__PER1 CYREG_TMR0_PER1 +#define Debug_Timer_TimerHW__PM_ACT_CFG CYREG_PM_ACT_CFG3 +#define Debug_Timer_TimerHW__PM_ACT_MSK 0x01u +#define Debug_Timer_TimerHW__PM_STBY_CFG CYREG_PM_STBY_CFG3 +#define Debug_Timer_TimerHW__PM_STBY_MSK 0x01u +#define Debug_Timer_TimerHW__RT0 CYREG_TMR0_RT0 +#define Debug_Timer_TimerHW__RT1 CYREG_TMR0_RT1 +#define Debug_Timer_TimerHW__SR0 CYREG_TMR0_SR0 + /* USBFS_bus_reset */ #define USBFS_bus_reset__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0 #define USBFS_bus_reset__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0 @@ -16,28 +44,64 @@ /* SCSI_CTL_PHASE */ #define SCSI_CTL_PHASE_Sync_ctrl_reg__0__MASK 0x01u #define SCSI_CTL_PHASE_Sync_ctrl_reg__0__POS 0 -#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG CYREG_B0_UDB02_03_ACTL -#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG CYREG_B0_UDB02_03_CTL -#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG CYREG_B0_UDB02_03_CTL -#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG CYREG_B0_UDB02_03_CTL -#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG CYREG_B0_UDB02_03_CTL -#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_MASK_REG CYREG_B0_UDB02_03_MSK -#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG CYREG_B0_UDB02_03_MSK -#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG CYREG_B0_UDB02_03_MSK -#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG CYREG_B0_UDB02_03_MSK +#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG CYREG_B0_UDB05_06_ACTL +#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG CYREG_B0_UDB05_06_CTL +#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG CYREG_B0_UDB05_06_CTL +#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG CYREG_B0_UDB05_06_CTL +#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG CYREG_B0_UDB05_06_CTL +#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_MASK_REG CYREG_B0_UDB05_06_MSK +#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG CYREG_B0_UDB05_06_MSK +#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG CYREG_B0_UDB05_06_MSK +#define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG CYREG_B0_UDB05_06_MSK #define SCSI_CTL_PHASE_Sync_ctrl_reg__1__MASK 0x02u #define SCSI_CTL_PHASE_Sync_ctrl_reg__1__POS 1 #define SCSI_CTL_PHASE_Sync_ctrl_reg__2__MASK 0x04u #define SCSI_CTL_PHASE_Sync_ctrl_reg__2__POS 2 -#define SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_AUX_CTL_REG CYREG_B0_UDB02_ACTL -#define SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_REG CYREG_B0_UDB02_CTL -#define SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_ST_REG CYREG_B0_UDB02_ST_CTL -#define SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_REG CYREG_B0_UDB02_CTL -#define SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_ST_REG CYREG_B0_UDB02_ST_CTL +#define SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_AUX_CTL_REG CYREG_B0_UDB05_ACTL +#define SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_REG CYREG_B0_UDB05_CTL +#define SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_ST_REG CYREG_B0_UDB05_ST_CTL +#define SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_REG CYREG_B0_UDB05_CTL +#define SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_ST_REG CYREG_B0_UDB05_ST_CTL #define SCSI_CTL_PHASE_Sync_ctrl_reg__MASK 0x07u -#define SCSI_CTL_PHASE_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG CYREG_B0_UDB02_MSK_ACTL -#define SCSI_CTL_PHASE_Sync_ctrl_reg__PERIOD_REG CYREG_B0_UDB02_MSK -#define SCSI_CTL_PHASE_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG CYREG_B0_UDB02_MSK_ACTL +#define SCSI_CTL_PHASE_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG CYREG_B0_UDB05_MSK_ACTL +#define SCSI_CTL_PHASE_Sync_ctrl_reg__PERIOD_REG CYREG_B0_UDB05_MSK +#define SCSI_CTL_PHASE_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG CYREG_B0_UDB05_MSK_ACTL + +/* SCSI_Out_Bits */ +#define SCSI_Out_Bits_Sync_ctrl_reg__0__MASK 0x01u +#define SCSI_Out_Bits_Sync_ctrl_reg__0__POS 0 +#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG CYREG_B0_UDB00_01_ACTL +#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG CYREG_B0_UDB00_01_CTL +#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG CYREG_B0_UDB00_01_CTL +#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG CYREG_B0_UDB00_01_CTL +#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG CYREG_B0_UDB00_01_CTL +#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_MASK_REG CYREG_B0_UDB00_01_MSK +#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG CYREG_B0_UDB00_01_MSK +#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG CYREG_B0_UDB00_01_MSK +#define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG CYREG_B0_UDB00_01_MSK +#define SCSI_Out_Bits_Sync_ctrl_reg__1__MASK 0x02u +#define SCSI_Out_Bits_Sync_ctrl_reg__1__POS 1 +#define SCSI_Out_Bits_Sync_ctrl_reg__2__MASK 0x04u +#define SCSI_Out_Bits_Sync_ctrl_reg__2__POS 2 +#define SCSI_Out_Bits_Sync_ctrl_reg__3__MASK 0x08u +#define SCSI_Out_Bits_Sync_ctrl_reg__3__POS 3 +#define SCSI_Out_Bits_Sync_ctrl_reg__4__MASK 0x10u +#define SCSI_Out_Bits_Sync_ctrl_reg__4__POS 4 +#define SCSI_Out_Bits_Sync_ctrl_reg__5__MASK 0x20u +#define SCSI_Out_Bits_Sync_ctrl_reg__5__POS 5 +#define SCSI_Out_Bits_Sync_ctrl_reg__6__MASK 0x40u +#define SCSI_Out_Bits_Sync_ctrl_reg__6__POS 6 +#define SCSI_Out_Bits_Sync_ctrl_reg__7__MASK 0x80u +#define SCSI_Out_Bits_Sync_ctrl_reg__7__POS 7 +#define SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_AUX_CTL_REG CYREG_B0_UDB00_ACTL +#define SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_REG CYREG_B0_UDB00_CTL +#define SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_ST_REG CYREG_B0_UDB00_ST_CTL +#define SCSI_Out_Bits_Sync_ctrl_reg__COUNT_REG CYREG_B0_UDB00_CTL +#define SCSI_Out_Bits_Sync_ctrl_reg__COUNT_ST_REG CYREG_B0_UDB00_ST_CTL +#define SCSI_Out_Bits_Sync_ctrl_reg__MASK 0xFFu +#define SCSI_Out_Bits_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG CYREG_B0_UDB00_MSK_ACTL +#define SCSI_Out_Bits_Sync_ctrl_reg__PERIOD_REG CYREG_B0_UDB00_MSK +#define SCSI_Out_Bits_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG CYREG_B0_UDB00_MSK_ACTL /* USBFS_arb_int */ #define USBFS_arb_int__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0 @@ -59,6 +123,28 @@ #define USBFS_sof_int__INTC_SET_EN_REG CYREG_NVIC_SETENA0 #define USBFS_sof_int__INTC_SET_PD_REG CYREG_NVIC_SETPEND0 +/* SCSI_Out_Ctl */ +#define SCSI_Out_Ctl_Sync_ctrl_reg__0__MASK 0x01u +#define SCSI_Out_Ctl_Sync_ctrl_reg__0__POS 0 +#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG CYREG_B0_UDB03_04_ACTL +#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG CYREG_B0_UDB03_04_CTL +#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG CYREG_B0_UDB03_04_CTL +#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG CYREG_B0_UDB03_04_CTL +#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG CYREG_B0_UDB03_04_CTL +#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG CYREG_B0_UDB03_04_MSK +#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG CYREG_B0_UDB03_04_MSK +#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG CYREG_B0_UDB03_04_MSK +#define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG CYREG_B0_UDB03_04_MSK +#define SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG CYREG_B0_UDB03_ACTL +#define SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_REG CYREG_B0_UDB03_CTL +#define SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_ST_REG CYREG_B0_UDB03_ST_CTL +#define SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_REG CYREG_B0_UDB03_CTL +#define SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_ST_REG CYREG_B0_UDB03_ST_CTL +#define SCSI_Out_Ctl_Sync_ctrl_reg__MASK 0x01u +#define SCSI_Out_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG CYREG_B0_UDB03_MSK_ACTL +#define SCSI_Out_Ctl_Sync_ctrl_reg__PERIOD_REG CYREG_B0_UDB03_MSK +#define SCSI_Out_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG CYREG_B0_UDB03_MSK_ACTL + /* SCSI_Out_DBx */ #define SCSI_Out_DBx__0__AG CYREG_PRT6_AG #define SCSI_Out_DBx__0__AMUX CYREG_PRT6_AMUX @@ -504,34 +590,34 @@ #define SCSI_RST_ISR__INTC_SET_PD_REG CYREG_NVIC_SETPEND0 /* SDCard_BSPIM */ -#define SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_AUX_CTL_REG CYREG_B0_UDB07_08_ACTL -#define SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_REG CYREG_B0_UDB07_08_ST -#define SDCard_BSPIM_BitCounter_ST__MASK_REG CYREG_B0_UDB07_MSK -#define SDCard_BSPIM_BitCounter_ST__MASK_ST_AUX_CTL_REG CYREG_B0_UDB07_MSK_ACTL -#define SDCard_BSPIM_BitCounter_ST__PER_ST_AUX_CTL_REG CYREG_B0_UDB07_MSK_ACTL -#define SDCard_BSPIM_BitCounter_ST__STATUS_AUX_CTL_REG CYREG_B0_UDB07_ACTL -#define SDCard_BSPIM_BitCounter_ST__STATUS_CNT_REG CYREG_B0_UDB07_ST_CTL -#define SDCard_BSPIM_BitCounter_ST__STATUS_CONTROL_REG CYREG_B0_UDB07_ST_CTL -#define SDCard_BSPIM_BitCounter_ST__STATUS_REG CYREG_B0_UDB07_ST -#define SDCard_BSPIM_BitCounter__16BIT_CONTROL_AUX_CTL_REG CYREG_B0_UDB07_08_ACTL -#define SDCard_BSPIM_BitCounter__16BIT_CONTROL_CONTROL_REG CYREG_B0_UDB07_08_CTL -#define SDCard_BSPIM_BitCounter__16BIT_CONTROL_COUNT_REG CYREG_B0_UDB07_08_CTL -#define SDCard_BSPIM_BitCounter__16BIT_COUNT_CONTROL_REG CYREG_B0_UDB07_08_CTL -#define SDCard_BSPIM_BitCounter__16BIT_COUNT_COUNT_REG CYREG_B0_UDB07_08_CTL -#define SDCard_BSPIM_BitCounter__16BIT_MASK_MASK_REG CYREG_B0_UDB07_08_MSK -#define SDCard_BSPIM_BitCounter__16BIT_MASK_PERIOD_REG CYREG_B0_UDB07_08_MSK -#define SDCard_BSPIM_BitCounter__16BIT_PERIOD_MASK_REG CYREG_B0_UDB07_08_MSK -#define SDCard_BSPIM_BitCounter__16BIT_PERIOD_PERIOD_REG CYREG_B0_UDB07_08_MSK -#define SDCard_BSPIM_BitCounter__CONTROL_AUX_CTL_REG CYREG_B0_UDB07_ACTL -#define SDCard_BSPIM_BitCounter__CONTROL_REG CYREG_B0_UDB07_CTL -#define SDCard_BSPIM_BitCounter__CONTROL_ST_REG CYREG_B0_UDB07_ST_CTL -#define SDCard_BSPIM_BitCounter__COUNT_REG CYREG_B0_UDB07_CTL -#define SDCard_BSPIM_BitCounter__COUNT_ST_REG CYREG_B0_UDB07_ST_CTL -#define SDCard_BSPIM_BitCounter__MASK_CTL_AUX_CTL_REG CYREG_B0_UDB07_MSK_ACTL -#define SDCard_BSPIM_BitCounter__PERIOD_REG CYREG_B0_UDB07_MSK -#define SDCard_BSPIM_BitCounter__PER_CTL_AUX_CTL_REG CYREG_B0_UDB07_MSK_ACTL -#define SDCard_BSPIM_RxStsReg__16BIT_STATUS_AUX_CTL_REG CYREG_B0_UDB04_05_ACTL -#define SDCard_BSPIM_RxStsReg__16BIT_STATUS_REG CYREG_B0_UDB04_05_ST +#define SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_AUX_CTL_REG CYREG_B1_UDB06_07_ACTL +#define SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_REG CYREG_B1_UDB06_07_ST +#define SDCard_BSPIM_BitCounter_ST__MASK_REG CYREG_B1_UDB06_MSK +#define SDCard_BSPIM_BitCounter_ST__MASK_ST_AUX_CTL_REG CYREG_B1_UDB06_MSK_ACTL +#define SDCard_BSPIM_BitCounter_ST__PER_ST_AUX_CTL_REG CYREG_B1_UDB06_MSK_ACTL +#define SDCard_BSPIM_BitCounter_ST__STATUS_AUX_CTL_REG CYREG_B1_UDB06_ACTL +#define SDCard_BSPIM_BitCounter_ST__STATUS_CNT_REG CYREG_B1_UDB06_ST_CTL +#define SDCard_BSPIM_BitCounter_ST__STATUS_CONTROL_REG CYREG_B1_UDB06_ST_CTL +#define SDCard_BSPIM_BitCounter_ST__STATUS_REG CYREG_B1_UDB06_ST +#define SDCard_BSPIM_BitCounter__16BIT_CONTROL_AUX_CTL_REG CYREG_B1_UDB06_07_ACTL +#define SDCard_BSPIM_BitCounter__16BIT_CONTROL_CONTROL_REG CYREG_B1_UDB06_07_CTL +#define SDCard_BSPIM_BitCounter__16BIT_CONTROL_COUNT_REG CYREG_B1_UDB06_07_CTL +#define SDCard_BSPIM_BitCounter__16BIT_COUNT_CONTROL_REG CYREG_B1_UDB06_07_CTL +#define SDCard_BSPIM_BitCounter__16BIT_COUNT_COUNT_REG CYREG_B1_UDB06_07_CTL +#define SDCard_BSPIM_BitCounter__16BIT_MASK_MASK_REG CYREG_B1_UDB06_07_MSK +#define SDCard_BSPIM_BitCounter__16BIT_MASK_PERIOD_REG CYREG_B1_UDB06_07_MSK +#define SDCard_BSPIM_BitCounter__16BIT_PERIOD_MASK_REG CYREG_B1_UDB06_07_MSK +#define SDCard_BSPIM_BitCounter__16BIT_PERIOD_PERIOD_REG CYREG_B1_UDB06_07_MSK +#define SDCard_BSPIM_BitCounter__CONTROL_AUX_CTL_REG CYREG_B1_UDB06_ACTL +#define SDCard_BSPIM_BitCounter__CONTROL_REG CYREG_B1_UDB06_CTL +#define SDCard_BSPIM_BitCounter__CONTROL_ST_REG CYREG_B1_UDB06_ST_CTL +#define SDCard_BSPIM_BitCounter__COUNT_REG CYREG_B1_UDB06_CTL +#define SDCard_BSPIM_BitCounter__COUNT_ST_REG CYREG_B1_UDB06_ST_CTL +#define SDCard_BSPIM_BitCounter__MASK_CTL_AUX_CTL_REG CYREG_B1_UDB06_MSK_ACTL +#define SDCard_BSPIM_BitCounter__PERIOD_REG CYREG_B1_UDB06_MSK +#define SDCard_BSPIM_BitCounter__PER_CTL_AUX_CTL_REG CYREG_B1_UDB06_MSK_ACTL +#define SDCard_BSPIM_RxStsReg__16BIT_STATUS_AUX_CTL_REG CYREG_B0_UDB06_07_ACTL +#define SDCard_BSPIM_RxStsReg__16BIT_STATUS_REG CYREG_B0_UDB06_07_ST #define SDCard_BSPIM_RxStsReg__4__MASK 0x10u #define SDCard_BSPIM_RxStsReg__4__POS 4 #define SDCard_BSPIM_RxStsReg__5__MASK 0x20u @@ -539,13 +625,13 @@ #define SDCard_BSPIM_RxStsReg__6__MASK 0x40u #define SDCard_BSPIM_RxStsReg__6__POS 6 #define SDCard_BSPIM_RxStsReg__MASK 0x70u -#define SDCard_BSPIM_RxStsReg__MASK_REG CYREG_B0_UDB04_MSK -#define SDCard_BSPIM_RxStsReg__STATUS_AUX_CTL_REG CYREG_B0_UDB04_ACTL -#define SDCard_BSPIM_RxStsReg__STATUS_REG CYREG_B0_UDB04_ST +#define SDCard_BSPIM_RxStsReg__MASK_REG CYREG_B0_UDB06_MSK +#define SDCard_BSPIM_RxStsReg__STATUS_AUX_CTL_REG CYREG_B0_UDB06_ACTL +#define SDCard_BSPIM_RxStsReg__STATUS_REG CYREG_B0_UDB06_ST #define SDCard_BSPIM_TxStsReg__0__MASK 0x01u #define SDCard_BSPIM_TxStsReg__0__POS 0 -#define SDCard_BSPIM_TxStsReg__16BIT_STATUS_AUX_CTL_REG CYREG_B1_UDB07_08_ACTL -#define SDCard_BSPIM_TxStsReg__16BIT_STATUS_REG CYREG_B1_UDB07_08_ST +#define SDCard_BSPIM_TxStsReg__16BIT_STATUS_AUX_CTL_REG CYREG_B0_UDB04_05_ACTL +#define SDCard_BSPIM_TxStsReg__16BIT_STATUS_REG CYREG_B0_UDB04_05_ST #define SDCard_BSPIM_TxStsReg__1__MASK 0x02u #define SDCard_BSPIM_TxStsReg__1__POS 1 #define SDCard_BSPIM_TxStsReg__2__MASK 0x04u @@ -555,28 +641,26 @@ #define SDCard_BSPIM_TxStsReg__4__MASK 0x10u #define SDCard_BSPIM_TxStsReg__4__POS 4 #define SDCard_BSPIM_TxStsReg__MASK 0x1Fu -#define SDCard_BSPIM_TxStsReg__MASK_REG CYREG_B1_UDB07_MSK -#define SDCard_BSPIM_TxStsReg__STATUS_AUX_CTL_REG CYREG_B1_UDB07_ACTL -#define SDCard_BSPIM_TxStsReg__STATUS_REG CYREG_B1_UDB07_ST -#define SDCard_BSPIM_sR8_Dp_u0__16BIT_A0_REG CYREG_B0_UDB07_08_A0 -#define SDCard_BSPIM_sR8_Dp_u0__16BIT_A1_REG CYREG_B0_UDB07_08_A1 -#define SDCard_BSPIM_sR8_Dp_u0__16BIT_D0_REG CYREG_B0_UDB07_08_D0 -#define SDCard_BSPIM_sR8_Dp_u0__16BIT_D1_REG CYREG_B0_UDB07_08_D1 -#define SDCard_BSPIM_sR8_Dp_u0__16BIT_DP_AUX_CTL_REG CYREG_B0_UDB07_08_ACTL -#define SDCard_BSPIM_sR8_Dp_u0__16BIT_F0_REG CYREG_B0_UDB07_08_F0 -#define SDCard_BSPIM_sR8_Dp_u0__16BIT_F1_REG CYREG_B0_UDB07_08_F1 -#define SDCard_BSPIM_sR8_Dp_u0__A0_A1_REG CYREG_B0_UDB07_A0_A1 -#define SDCard_BSPIM_sR8_Dp_u0__A0_REG CYREG_B0_UDB07_A0 -#define SDCard_BSPIM_sR8_Dp_u0__A1_REG CYREG_B0_UDB07_A1 -#define SDCard_BSPIM_sR8_Dp_u0__D0_D1_REG CYREG_B0_UDB07_D0_D1 -#define SDCard_BSPIM_sR8_Dp_u0__D0_REG CYREG_B0_UDB07_D0 -#define SDCard_BSPIM_sR8_Dp_u0__D1_REG CYREG_B0_UDB07_D1 -#define SDCard_BSPIM_sR8_Dp_u0__DP_AUX_CTL_REG CYREG_B0_UDB07_ACTL -#define SDCard_BSPIM_sR8_Dp_u0__F0_F1_REG CYREG_B0_UDB07_F0_F1 -#define SDCard_BSPIM_sR8_Dp_u0__F0_REG CYREG_B0_UDB07_F0 -#define SDCard_BSPIM_sR8_Dp_u0__F1_REG CYREG_B0_UDB07_F1 -#define SDCard_BSPIM_sR8_Dp_u0__MSK_DP_AUX_CTL_REG CYREG_B0_UDB07_MSK_ACTL -#define SDCard_BSPIM_sR8_Dp_u0__PER_DP_AUX_CTL_REG CYREG_B0_UDB07_MSK_ACTL +#define SDCard_BSPIM_TxStsReg__MASK_REG CYREG_B0_UDB04_MSK +#define SDCard_BSPIM_TxStsReg__STATUS_AUX_CTL_REG CYREG_B0_UDB04_ACTL +#define SDCard_BSPIM_TxStsReg__STATUS_REG CYREG_B0_UDB04_ST +#define SDCard_BSPIM_sR8_Dp_u0__16BIT_A0_REG CYREG_B0_UDB06_07_A0 +#define SDCard_BSPIM_sR8_Dp_u0__16BIT_A1_REG CYREG_B0_UDB06_07_A1 +#define SDCard_BSPIM_sR8_Dp_u0__16BIT_D0_REG CYREG_B0_UDB06_07_D0 +#define SDCard_BSPIM_sR8_Dp_u0__16BIT_D1_REG CYREG_B0_UDB06_07_D1 +#define SDCard_BSPIM_sR8_Dp_u0__16BIT_DP_AUX_CTL_REG CYREG_B0_UDB06_07_ACTL +#define SDCard_BSPIM_sR8_Dp_u0__16BIT_F0_REG CYREG_B0_UDB06_07_F0 +#define SDCard_BSPIM_sR8_Dp_u0__16BIT_F1_REG CYREG_B0_UDB06_07_F1 +#define SDCard_BSPIM_sR8_Dp_u0__A0_A1_REG CYREG_B0_UDB06_A0_A1 +#define SDCard_BSPIM_sR8_Dp_u0__A0_REG CYREG_B0_UDB06_A0 +#define SDCard_BSPIM_sR8_Dp_u0__A1_REG CYREG_B0_UDB06_A1 +#define SDCard_BSPIM_sR8_Dp_u0__D0_D1_REG CYREG_B0_UDB06_D0_D1 +#define SDCard_BSPIM_sR8_Dp_u0__D0_REG CYREG_B0_UDB06_D0 +#define SDCard_BSPIM_sR8_Dp_u0__D1_REG CYREG_B0_UDB06_D1 +#define SDCard_BSPIM_sR8_Dp_u0__DP_AUX_CTL_REG CYREG_B0_UDB06_ACTL +#define SDCard_BSPIM_sR8_Dp_u0__F0_F1_REG CYREG_B0_UDB06_F0_F1 +#define SDCard_BSPIM_sR8_Dp_u0__F0_REG CYREG_B0_UDB06_F0 +#define SDCard_BSPIM_sR8_Dp_u0__F1_REG CYREG_B0_UDB06_F1 /* USBFS_dp_int */ #define USBFS_dp_int__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0 @@ -1032,21 +1116,32 @@ #define SD_Data_Clk__PM_STBY_MSK 0x01u /* SD_Init_Clk */ -#define SD_Init_Clk__CFG0 CYREG_CLKDIST_DCFG2_CFG0 -#define SD_Init_Clk__CFG1 CYREG_CLKDIST_DCFG2_CFG1 -#define SD_Init_Clk__CFG2 CYREG_CLKDIST_DCFG2_CFG2 +#define SD_Init_Clk__CFG0 CYREG_CLKDIST_DCFG3_CFG0 +#define SD_Init_Clk__CFG1 CYREG_CLKDIST_DCFG3_CFG1 +#define SD_Init_Clk__CFG2 CYREG_CLKDIST_DCFG3_CFG2 #define SD_Init_Clk__CFG2_SRC_SEL_MASK 0x07u -#define SD_Init_Clk__INDEX 0x02u +#define SD_Init_Clk__INDEX 0x03u #define SD_Init_Clk__PM_ACT_CFG CYREG_PM_ACT_CFG2 -#define SD_Init_Clk__PM_ACT_MSK 0x04u +#define SD_Init_Clk__PM_ACT_MSK 0x08u #define SD_Init_Clk__PM_STBY_CFG CYREG_PM_STBY_CFG2 -#define SD_Init_Clk__PM_STBY_MSK 0x04u +#define SD_Init_Clk__PM_STBY_MSK 0x08u + +/* timer_clock */ +#define timer_clock__CFG0 CYREG_CLKDIST_DCFG2_CFG0 +#define timer_clock__CFG1 CYREG_CLKDIST_DCFG2_CFG1 +#define timer_clock__CFG2 CYREG_CLKDIST_DCFG2_CFG2 +#define timer_clock__CFG2_SRC_SEL_MASK 0x07u +#define timer_clock__INDEX 0x02u +#define timer_clock__PM_ACT_CFG CYREG_PM_ACT_CFG2 +#define timer_clock__PM_ACT_MSK 0x04u +#define timer_clock__PM_STBY_CFG CYREG_PM_STBY_CFG2 +#define timer_clock__PM_STBY_MSK 0x04u /* scsiTarget */ #define scsiTarget_StatusReg__0__MASK 0x01u #define scsiTarget_StatusReg__0__POS 0 -#define scsiTarget_StatusReg__16BIT_STATUS_AUX_CTL_REG CYREG_B0_UDB12_13_ACTL -#define scsiTarget_StatusReg__16BIT_STATUS_REG CYREG_B0_UDB12_13_ST +#define scsiTarget_StatusReg__16BIT_STATUS_AUX_CTL_REG CYREG_B0_UDB13_14_ACTL +#define scsiTarget_StatusReg__16BIT_STATUS_REG CYREG_B0_UDB13_14_ST #define scsiTarget_StatusReg__1__MASK 0x02u #define scsiTarget_StatusReg__1__POS 1 #define scsiTarget_StatusReg__2__MASK 0x04u @@ -1054,76 +1149,76 @@ #define scsiTarget_StatusReg__3__MASK 0x08u #define scsiTarget_StatusReg__3__POS 3 #define scsiTarget_StatusReg__MASK 0x0Fu -#define scsiTarget_StatusReg__MASK_REG CYREG_B0_UDB12_MSK -#define scsiTarget_StatusReg__STATUS_AUX_CTL_REG CYREG_B0_UDB12_ACTL -#define scsiTarget_StatusReg__STATUS_REG CYREG_B0_UDB12_ST -#define scsiTarget_datapath_PI__16BIT_STATUS_AUX_CTL_REG CYREG_B0_UDB03_04_ACTL -#define scsiTarget_datapath_PI__16BIT_STATUS_REG CYREG_B0_UDB03_04_ST -#define scsiTarget_datapath_PI__MASK_REG CYREG_B0_UDB03_MSK -#define scsiTarget_datapath_PI__MASK_ST_AUX_CTL_REG CYREG_B0_UDB03_MSK_ACTL -#define scsiTarget_datapath_PI__PER_ST_AUX_CTL_REG CYREG_B0_UDB03_MSK_ACTL -#define scsiTarget_datapath_PI__STATUS_AUX_CTL_REG CYREG_B0_UDB03_ACTL -#define scsiTarget_datapath_PI__STATUS_CNT_REG CYREG_B0_UDB03_ST_CTL -#define scsiTarget_datapath_PI__STATUS_CONTROL_REG CYREG_B0_UDB03_ST_CTL -#define scsiTarget_datapath_PI__STATUS_REG CYREG_B0_UDB03_ST -#define scsiTarget_datapath_PO__16BIT_CONTROL_AUX_CTL_REG CYREG_B0_UDB03_04_ACTL -#define scsiTarget_datapath_PO__16BIT_CONTROL_CONTROL_REG CYREG_B0_UDB03_04_CTL -#define scsiTarget_datapath_PO__16BIT_CONTROL_COUNT_REG CYREG_B0_UDB03_04_CTL -#define scsiTarget_datapath_PO__16BIT_COUNT_CONTROL_REG CYREG_B0_UDB03_04_CTL -#define scsiTarget_datapath_PO__16BIT_COUNT_COUNT_REG CYREG_B0_UDB03_04_CTL -#define scsiTarget_datapath_PO__16BIT_MASK_MASK_REG CYREG_B0_UDB03_04_MSK -#define scsiTarget_datapath_PO__16BIT_MASK_PERIOD_REG CYREG_B0_UDB03_04_MSK -#define scsiTarget_datapath_PO__16BIT_PERIOD_MASK_REG CYREG_B0_UDB03_04_MSK -#define scsiTarget_datapath_PO__16BIT_PERIOD_PERIOD_REG CYREG_B0_UDB03_04_MSK -#define scsiTarget_datapath_PO__CONTROL_AUX_CTL_REG CYREG_B0_UDB03_ACTL -#define scsiTarget_datapath_PO__CONTROL_REG CYREG_B0_UDB03_CTL -#define scsiTarget_datapath_PO__CONTROL_ST_REG CYREG_B0_UDB03_ST_CTL -#define scsiTarget_datapath_PO__COUNT_REG CYREG_B0_UDB03_CTL -#define scsiTarget_datapath_PO__COUNT_ST_REG CYREG_B0_UDB03_ST_CTL -#define scsiTarget_datapath_PO__MASK_CTL_AUX_CTL_REG CYREG_B0_UDB03_MSK_ACTL -#define scsiTarget_datapath_PO__PERIOD_REG CYREG_B0_UDB03_MSK -#define scsiTarget_datapath_PO__PER_CTL_AUX_CTL_REG CYREG_B0_UDB03_MSK_ACTL -#define scsiTarget_datapath__16BIT_A0_REG CYREG_B0_UDB03_04_A0 -#define scsiTarget_datapath__16BIT_A1_REG CYREG_B0_UDB03_04_A1 -#define scsiTarget_datapath__16BIT_D0_REG CYREG_B0_UDB03_04_D0 -#define scsiTarget_datapath__16BIT_D1_REG CYREG_B0_UDB03_04_D1 -#define scsiTarget_datapath__16BIT_DP_AUX_CTL_REG CYREG_B0_UDB03_04_ACTL -#define scsiTarget_datapath__16BIT_F0_REG CYREG_B0_UDB03_04_F0 -#define scsiTarget_datapath__16BIT_F1_REG CYREG_B0_UDB03_04_F1 -#define scsiTarget_datapath__A0_A1_REG CYREG_B0_UDB03_A0_A1 -#define scsiTarget_datapath__A0_REG CYREG_B0_UDB03_A0 -#define scsiTarget_datapath__A1_REG CYREG_B0_UDB03_A1 -#define scsiTarget_datapath__D0_D1_REG CYREG_B0_UDB03_D0_D1 -#define scsiTarget_datapath__D0_REG CYREG_B0_UDB03_D0 -#define scsiTarget_datapath__D1_REG CYREG_B0_UDB03_D1 -#define scsiTarget_datapath__DP_AUX_CTL_REG CYREG_B0_UDB03_ACTL -#define scsiTarget_datapath__F0_F1_REG CYREG_B0_UDB03_F0_F1 -#define scsiTarget_datapath__F0_REG CYREG_B0_UDB03_F0 -#define scsiTarget_datapath__F1_REG CYREG_B0_UDB03_F1 -#define scsiTarget_datapath__MSK_DP_AUX_CTL_REG CYREG_B0_UDB03_MSK_ACTL -#define scsiTarget_datapath__PER_DP_AUX_CTL_REG CYREG_B0_UDB03_MSK_ACTL +#define scsiTarget_StatusReg__MASK_REG CYREG_B0_UDB13_MSK +#define scsiTarget_StatusReg__STATUS_AUX_CTL_REG CYREG_B0_UDB13_ACTL +#define scsiTarget_StatusReg__STATUS_REG CYREG_B0_UDB13_ST +#define scsiTarget_datapath_PI__16BIT_STATUS_AUX_CTL_REG CYREG_B0_UDB12_13_ACTL +#define scsiTarget_datapath_PI__16BIT_STATUS_REG CYREG_B0_UDB12_13_ST +#define scsiTarget_datapath_PI__MASK_REG CYREG_B0_UDB12_MSK +#define scsiTarget_datapath_PI__MASK_ST_AUX_CTL_REG CYREG_B0_UDB12_MSK_ACTL +#define scsiTarget_datapath_PI__PER_ST_AUX_CTL_REG CYREG_B0_UDB12_MSK_ACTL +#define scsiTarget_datapath_PI__STATUS_AUX_CTL_REG CYREG_B0_UDB12_ACTL +#define scsiTarget_datapath_PI__STATUS_CNT_REG CYREG_B0_UDB12_ST_CTL +#define scsiTarget_datapath_PI__STATUS_CONTROL_REG CYREG_B0_UDB12_ST_CTL +#define scsiTarget_datapath_PI__STATUS_REG CYREG_B0_UDB12_ST +#define scsiTarget_datapath_PO__16BIT_CONTROL_AUX_CTL_REG CYREG_B0_UDB12_13_ACTL +#define scsiTarget_datapath_PO__16BIT_CONTROL_CONTROL_REG CYREG_B0_UDB12_13_CTL +#define scsiTarget_datapath_PO__16BIT_CONTROL_COUNT_REG CYREG_B0_UDB12_13_CTL +#define scsiTarget_datapath_PO__16BIT_COUNT_CONTROL_REG CYREG_B0_UDB12_13_CTL +#define scsiTarget_datapath_PO__16BIT_COUNT_COUNT_REG CYREG_B0_UDB12_13_CTL +#define scsiTarget_datapath_PO__16BIT_MASK_MASK_REG CYREG_B0_UDB12_13_MSK +#define scsiTarget_datapath_PO__16BIT_MASK_PERIOD_REG CYREG_B0_UDB12_13_MSK +#define scsiTarget_datapath_PO__16BIT_PERIOD_MASK_REG CYREG_B0_UDB12_13_MSK +#define scsiTarget_datapath_PO__16BIT_PERIOD_PERIOD_REG CYREG_B0_UDB12_13_MSK +#define scsiTarget_datapath_PO__CONTROL_AUX_CTL_REG CYREG_B0_UDB12_ACTL +#define scsiTarget_datapath_PO__CONTROL_REG CYREG_B0_UDB12_CTL +#define scsiTarget_datapath_PO__CONTROL_ST_REG CYREG_B0_UDB12_ST_CTL +#define scsiTarget_datapath_PO__COUNT_REG CYREG_B0_UDB12_CTL +#define scsiTarget_datapath_PO__COUNT_ST_REG CYREG_B0_UDB12_ST_CTL +#define scsiTarget_datapath_PO__MASK_CTL_AUX_CTL_REG CYREG_B0_UDB12_MSK_ACTL +#define scsiTarget_datapath_PO__PERIOD_REG CYREG_B0_UDB12_MSK +#define scsiTarget_datapath_PO__PER_CTL_AUX_CTL_REG CYREG_B0_UDB12_MSK_ACTL +#define scsiTarget_datapath__16BIT_A0_REG CYREG_B0_UDB12_13_A0 +#define scsiTarget_datapath__16BIT_A1_REG CYREG_B0_UDB12_13_A1 +#define scsiTarget_datapath__16BIT_D0_REG CYREG_B0_UDB12_13_D0 +#define scsiTarget_datapath__16BIT_D1_REG CYREG_B0_UDB12_13_D1 +#define scsiTarget_datapath__16BIT_DP_AUX_CTL_REG CYREG_B0_UDB12_13_ACTL +#define scsiTarget_datapath__16BIT_F0_REG CYREG_B0_UDB12_13_F0 +#define scsiTarget_datapath__16BIT_F1_REG CYREG_B0_UDB12_13_F1 +#define scsiTarget_datapath__A0_A1_REG CYREG_B0_UDB12_A0_A1 +#define scsiTarget_datapath__A0_REG CYREG_B0_UDB12_A0 +#define scsiTarget_datapath__A1_REG CYREG_B0_UDB12_A1 +#define scsiTarget_datapath__D0_D1_REG CYREG_B0_UDB12_D0_D1 +#define scsiTarget_datapath__D0_REG CYREG_B0_UDB12_D0 +#define scsiTarget_datapath__D1_REG CYREG_B0_UDB12_D1 +#define scsiTarget_datapath__DP_AUX_CTL_REG CYREG_B0_UDB12_ACTL +#define scsiTarget_datapath__F0_F1_REG CYREG_B0_UDB12_F0_F1 +#define scsiTarget_datapath__F0_REG CYREG_B0_UDB12_F0 +#define scsiTarget_datapath__F1_REG CYREG_B0_UDB12_F1 +#define scsiTarget_datapath__MSK_DP_AUX_CTL_REG CYREG_B0_UDB12_MSK_ACTL +#define scsiTarget_datapath__PER_DP_AUX_CTL_REG CYREG_B0_UDB12_MSK_ACTL /* SD_Clk_Ctl */ #define SD_Clk_Ctl_Sync_ctrl_reg__0__MASK 0x01u #define SD_Clk_Ctl_Sync_ctrl_reg__0__POS 0 -#define SD_Clk_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG CYREG_B0_UDB01_02_ACTL -#define SD_Clk_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG CYREG_B0_UDB01_02_CTL -#define SD_Clk_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG CYREG_B0_UDB01_02_CTL -#define SD_Clk_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG CYREG_B0_UDB01_02_CTL -#define SD_Clk_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG CYREG_B0_UDB01_02_CTL -#define SD_Clk_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG CYREG_B0_UDB01_02_MSK -#define SD_Clk_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG CYREG_B0_UDB01_02_MSK -#define SD_Clk_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG CYREG_B0_UDB01_02_MSK -#define SD_Clk_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG CYREG_B0_UDB01_02_MSK -#define SD_Clk_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG CYREG_B0_UDB01_ACTL -#define SD_Clk_Ctl_Sync_ctrl_reg__CONTROL_REG CYREG_B0_UDB01_CTL -#define SD_Clk_Ctl_Sync_ctrl_reg__CONTROL_ST_REG CYREG_B0_UDB01_ST_CTL -#define SD_Clk_Ctl_Sync_ctrl_reg__COUNT_REG CYREG_B0_UDB01_CTL -#define SD_Clk_Ctl_Sync_ctrl_reg__COUNT_ST_REG CYREG_B0_UDB01_ST_CTL +#define SD_Clk_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG CYREG_B0_UDB02_03_ACTL +#define SD_Clk_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG CYREG_B0_UDB02_03_CTL +#define SD_Clk_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG CYREG_B0_UDB02_03_CTL +#define SD_Clk_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG CYREG_B0_UDB02_03_CTL +#define SD_Clk_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG CYREG_B0_UDB02_03_CTL +#define SD_Clk_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG CYREG_B0_UDB02_03_MSK +#define SD_Clk_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG CYREG_B0_UDB02_03_MSK +#define SD_Clk_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG CYREG_B0_UDB02_03_MSK +#define SD_Clk_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG CYREG_B0_UDB02_03_MSK +#define SD_Clk_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG CYREG_B0_UDB02_ACTL +#define SD_Clk_Ctl_Sync_ctrl_reg__CONTROL_REG CYREG_B0_UDB02_CTL +#define SD_Clk_Ctl_Sync_ctrl_reg__CONTROL_ST_REG CYREG_B0_UDB02_ST_CTL +#define SD_Clk_Ctl_Sync_ctrl_reg__COUNT_REG CYREG_B0_UDB02_CTL +#define SD_Clk_Ctl_Sync_ctrl_reg__COUNT_ST_REG CYREG_B0_UDB02_ST_CTL #define SD_Clk_Ctl_Sync_ctrl_reg__MASK 0x01u -#define SD_Clk_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG CYREG_B0_UDB01_MSK_ACTL -#define SD_Clk_Ctl_Sync_ctrl_reg__PERIOD_REG CYREG_B0_UDB01_MSK -#define SD_Clk_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG CYREG_B0_UDB01_MSK_ACTL +#define SD_Clk_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG CYREG_B0_UDB02_MSK_ACTL +#define SD_Clk_Ctl_Sync_ctrl_reg__PERIOD_REG CYREG_B0_UDB02_MSK +#define SD_Clk_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG CYREG_B0_UDB02_MSK_ACTL /* USBFS_ep_0 */ #define USBFS_ep_0__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0 @@ -1138,23 +1233,43 @@ /* USBFS_ep_1 */ #define USBFS_ep_1__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0 #define USBFS_ep_1__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0 -#define USBFS_ep_1__INTC_MASK 0x01u -#define USBFS_ep_1__INTC_NUMBER 0u +#define USBFS_ep_1__INTC_MASK 0x02u +#define USBFS_ep_1__INTC_NUMBER 1u #define USBFS_ep_1__INTC_PRIOR_NUM 7u -#define USBFS_ep_1__INTC_PRIOR_REG CYREG_NVIC_PRI_0 +#define USBFS_ep_1__INTC_PRIOR_REG CYREG_NVIC_PRI_1 #define USBFS_ep_1__INTC_SET_EN_REG CYREG_NVIC_SETENA0 #define USBFS_ep_1__INTC_SET_PD_REG CYREG_NVIC_SETPEND0 /* USBFS_ep_2 */ #define USBFS_ep_2__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0 #define USBFS_ep_2__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0 -#define USBFS_ep_2__INTC_MASK 0x02u -#define USBFS_ep_2__INTC_NUMBER 1u +#define USBFS_ep_2__INTC_MASK 0x04u +#define USBFS_ep_2__INTC_NUMBER 2u #define USBFS_ep_2__INTC_PRIOR_NUM 7u -#define USBFS_ep_2__INTC_PRIOR_REG CYREG_NVIC_PRI_1 +#define USBFS_ep_2__INTC_PRIOR_REG CYREG_NVIC_PRI_2 #define USBFS_ep_2__INTC_SET_EN_REG CYREG_NVIC_SETENA0 #define USBFS_ep_2__INTC_SET_PD_REG CYREG_NVIC_SETPEND0 +/* USBFS_ep_3 */ +#define USBFS_ep_3__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0 +#define USBFS_ep_3__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0 +#define USBFS_ep_3__INTC_MASK 0x08u +#define USBFS_ep_3__INTC_NUMBER 3u +#define USBFS_ep_3__INTC_PRIOR_NUM 7u +#define USBFS_ep_3__INTC_PRIOR_REG CYREG_NVIC_PRI_3 +#define USBFS_ep_3__INTC_SET_EN_REG CYREG_NVIC_SETENA0 +#define USBFS_ep_3__INTC_SET_PD_REG CYREG_NVIC_SETPEND0 + +/* USBFS_ep_4 */ +#define USBFS_ep_4__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0 +#define USBFS_ep_4__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0 +#define USBFS_ep_4__INTC_MASK 0x10u +#define USBFS_ep_4__INTC_NUMBER 4u +#define USBFS_ep_4__INTC_PRIOR_NUM 7u +#define USBFS_ep_4__INTC_PRIOR_REG CYREG_NVIC_PRI_4 +#define USBFS_ep_4__INTC_SET_EN_REG CYREG_NVIC_SETENA0 +#define USBFS_ep_4__INTC_SET_PD_REG CYREG_NVIC_SETPEND0 + /* USBFS_USB */ #define USBFS_USB__ARB_CFG CYREG_USB_ARB_CFG #define USBFS_USB__ARB_EP1_CFG CYREG_USB_ARB_EP1_CFG @@ -2735,9 +2850,9 @@ #define CYDEV_DEBUG_ENABLE_REGISTER CYREG_MLOGIC_DEBUG #define CYDEV_DMA_CHANNELS_AVAILABLE 24u #define CYDEV_ECC_ENABLE 0 -#define CYDEV_HEAP_SIZE 0x0256 +#define CYDEV_HEAP_SIZE 0x0400 #define CYDEV_INSTRUCT_CACHE_ENABLED 1 -#define CYDEV_INTR_RISING 0x00000000u +#define CYDEV_INTR_RISING 0x00000001u #define CYDEV_PROJ_TYPE 2 #define CYDEV_PROJ_TYPE_BOOTLOADER 1 #define CYDEV_PROJ_TYPE_LOADABLE 2 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cyfitter_cfg.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cyfitter_cfg.c index 4e6f1da..46963dc 100755 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cyfitter_cfg.c +++ b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cyfitter_cfg.c @@ -121,7 +121,7 @@ static void CyClockStartupError(uint8 errorCode) } #endif -#define CY_CFG_BASE_ADDR_COUNT 33u +#define CY_CFG_BASE_ADDR_COUNT 35u CYPACKED typedef struct { uint8 offset; @@ -191,8 +191,10 @@ static void ClockSetup(void) CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_DCFG0_CFG0 + 0x2u), 0x10u); CY_SET_XTND_REG16((void CYFAR *)(CYREG_CLKDIST_DCFG1_CFG0), 0x0001u); CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_DCFG1_CFG0 + 0x2u), 0x18u); - CY_SET_XTND_REG16((void CYFAR *)(CYREG_CLKDIST_DCFG2_CFG0), 0x001Du); + CY_SET_XTND_REG16((void CYFAR *)(CYREG_CLKDIST_DCFG2_CFG0), 0x0017u); CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_DCFG2_CFG0 + 0x2u), 0x19u); + CY_SET_XTND_REG16((void CYFAR *)(CYREG_CLKDIST_DCFG3_CFG0), 0x001Du); + CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_DCFG3_CFG0 + 0x2u), 0x19u); /* Configure ILO based on settings from Clock DWR */ CY_SET_XTND_REG8((void CYFAR *)(CYREG_SLOWCLK_ILO_CR0), 0x06u); @@ -228,7 +230,7 @@ static void ClockSetup(void) CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_UCFG), 0x00u); CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_LD), 0x02u); - CY_SET_XTND_REG8((void CYFAR *)(CYREG_PM_ACT_CFG2), ((CY_GET_XTND_REG8((void CYFAR *)CYREG_PM_ACT_CFG2) | 0x06u))); + CY_SET_XTND_REG8((void CYFAR *)(CYREG_PM_ACT_CFG2), ((CY_GET_XTND_REG8((void CYFAR *)CYREG_PM_ACT_CFG2) | 0x0Eu))); } @@ -365,939 +367,1093 @@ void cyfitter_cfg(void) { static const uint32 CYCODE cy_cfg_addr_table[] = { 0x40004502u, /* Base address: 0x40004500 Count: 2 */ - 0x4000520Au, /* Base address: 0x40005200 Count: 10 */ - 0x40006402u, /* Base address: 0x40006400 Count: 2 */ - 0x40010048u, /* Base address: 0x40010000 Count: 72 */ - 0x4001012Cu, /* Base address: 0x40010100 Count: 44 */ - 0x40010235u, /* Base address: 0x40010200 Count: 53 */ - 0x4001034Fu, /* Base address: 0x40010300 Count: 79 */ - 0x40010448u, /* Base address: 0x40010400 Count: 72 */ + 0x40004F02u, /* Base address: 0x40004F00 Count: 2 */ + 0x40005209u, /* Base address: 0x40005200 Count: 9 */ + 0x40006401u, /* Base address: 0x40006400 Count: 1 */ + 0x40006501u, /* Base address: 0x40006500 Count: 1 */ + 0x4001004Au, /* Base address: 0x40010000 Count: 74 */ + 0x40010134u, /* Base address: 0x40010100 Count: 52 */ + 0x40010252u, /* Base address: 0x40010200 Count: 82 */ + 0x40010355u, /* Base address: 0x40010300 Count: 85 */ + 0x40010449u, /* Base address: 0x40010400 Count: 73 */ 0x40010555u, /* Base address: 0x40010500 Count: 85 */ - 0x40010606u, /* Base address: 0x40010600 Count: 6 */ + 0x4001060Eu, /* Base address: 0x40010600 Count: 14 */ 0x40010747u, /* Base address: 0x40010700 Count: 71 */ - 0x40010901u, /* Base address: 0x40010900 Count: 1 */ + 0x40010903u, /* Base address: 0x40010900 Count: 3 */ 0x40010B0Cu, /* Base address: 0x40010B00 Count: 12 */ - 0x40010C3Bu, /* Base address: 0x40010C00 Count: 59 */ - 0x40010D39u, /* Base address: 0x40010D00 Count: 57 */ + 0x40010C45u, /* Base address: 0x40010C00 Count: 69 */ + 0x40010D4Du, /* Base address: 0x40010D00 Count: 77 */ 0x40010F04u, /* Base address: 0x40010F00 Count: 4 */ - 0x40011504u, /* Base address: 0x40011500 Count: 4 */ - 0x4001164Du, /* Base address: 0x40011600 Count: 77 */ - 0x4001173Fu, /* Base address: 0x40011700 Count: 63 */ - 0x40011901u, /* Base address: 0x40011900 Count: 1 */ - 0x4001400Cu, /* Base address: 0x40014000 Count: 12 */ - 0x4001410Fu, /* Base address: 0x40014100 Count: 15 */ - 0x4001420Bu, /* Base address: 0x40014200 Count: 11 */ - 0x40014306u, /* Base address: 0x40014300 Count: 6 */ - 0x4001440Eu, /* Base address: 0x40014400 Count: 14 */ - 0x40014513u, /* Base address: 0x40014500 Count: 19 */ - 0x4001460Au, /* Base address: 0x40014600 Count: 10 */ - 0x40014703u, /* Base address: 0x40014700 Count: 3 */ - 0x4001480Du, /* Base address: 0x40014800 Count: 13 */ - 0x40014908u, /* Base address: 0x40014900 Count: 8 */ - 0x40014C02u, /* Base address: 0x40014C00 Count: 2 */ - 0x4001500Au, /* Base address: 0x40015000 Count: 10 */ - 0x40015101u, /* Base address: 0x40015100 Count: 1 */ + 0x40011501u, /* Base address: 0x40011500 Count: 1 */ + 0x40011657u, /* Base address: 0x40011600 Count: 87 */ + 0x40011753u, /* Base address: 0x40011700 Count: 83 */ + 0x40011903u, /* Base address: 0x40011900 Count: 3 */ + 0x40011B02u, /* Base address: 0x40011B00 Count: 2 */ + 0x40014012u, /* Base address: 0x40014000 Count: 18 */ + 0x40014110u, /* Base address: 0x40014100 Count: 16 */ + 0x40014215u, /* Base address: 0x40014200 Count: 21 */ + 0x4001430Bu, /* Base address: 0x40014300 Count: 11 */ + 0x40014410u, /* Base address: 0x40014400 Count: 16 */ + 0x40014517u, /* Base address: 0x40014500 Count: 23 */ + 0x40014607u, /* Base address: 0x40014600 Count: 7 */ + 0x4001470Au, /* Base address: 0x40014700 Count: 10 */ + 0x4001480Cu, /* Base address: 0x40014800 Count: 12 */ + 0x4001490Bu, /* Base address: 0x40014900 Count: 11 */ + 0x4001500Bu, /* Base address: 0x40015000 Count: 11 */ + 0x40015102u, /* Base address: 0x40015100 Count: 2 */ }; static const cy_cfg_addrvalue_t CYCODE cy_cfg_data_table[] = { {0x36u, 0x02u}, {0x7Eu, 0x02u}, - {0x00u, 0x12u}, - {0x01u, 0x01u}, - {0x18u, 0x04u}, - {0x19u, 0x08u}, + {0x01u, 0x20u}, + {0x0Au, 0x36u}, + {0x00u, 0x13u}, + {0x01u, 0x05u}, + {0x19u, 0x04u}, {0x1Cu, 0x61u}, {0x20u, 0xA8u}, - {0x21u, 0xC8u}, - {0x30u, 0x03u}, - {0x31u, 0x06u}, + {0x21u, 0x60u}, + {0x30u, 0x09u}, + {0x31u, 0x0Au}, {0x7Cu, 0x40u}, - {0x33u, 0x01u}, - {0x87u, 0x0Fu}, - {0x03u, 0x08u}, - {0x04u, 0x21u}, - {0x06u, 0x42u}, - {0x07u, 0x40u}, - {0x08u, 0x42u}, - {0x0Au, 0x28u}, - {0x0Bu, 0x48u}, - {0x0Cu, 0x0Du}, - {0x0Fu, 0x06u}, - {0x10u, 0x02u}, - {0x11u, 0x01u}, - {0x12u, 0x0Du}, - {0x14u, 0x22u}, - {0x15u, 0x48u}, - {0x16u, 0x84u}, - {0x17u, 0x12u}, - {0x18u, 0xC0u}, - {0x1Bu, 0x30u}, - {0x1Cu, 0x0Du}, - {0x1Du, 0x01u}, - {0x20u, 0x0Du}, - {0x21u, 0x48u}, - {0x23u, 0x24u}, - {0x24u, 0x0Du}, - {0x25u, 0x01u}, - {0x28u, 0x0Du}, - {0x29u, 0x01u}, - {0x2Cu, 0x10u}, - {0x30u, 0x0Fu}, - {0x33u, 0x01u}, - {0x34u, 0xE0u}, - {0x35u, 0x70u}, - {0x36u, 0x10u}, - {0x37u, 0x0Eu}, - {0x38u, 0x20u}, - {0x39u, 0x08u}, - {0x3Au, 0x02u}, - {0x3Eu, 0x40u}, - {0x3Fu, 0x04u}, - {0x58u, 0x0Bu}, + {0x3Cu, 0x01u}, + {0x86u, 0x0Fu}, + {0x05u, 0x08u}, + {0x06u, 0x40u}, + {0x07u, 0x44u}, + {0x0Au, 0x10u}, + {0x0Cu, 0x55u}, + {0x0Du, 0x04u}, + {0x0Eu, 0xAAu}, + {0x0Fu, 0x09u}, + {0x11u, 0x4Du}, + {0x12u, 0x04u}, + {0x13u, 0xB2u}, + {0x16u, 0x20u}, + {0x1Au, 0x02u}, + {0x1Du, 0x20u}, + {0x1Fu, 0x90u}, + {0x22u, 0x01u}, + {0x2Au, 0x80u}, + {0x2Du, 0x10u}, + {0x2Eu, 0x08u}, + {0x2Fu, 0x22u}, + {0x30u, 0xC0u}, + {0x31u, 0xC0u}, + {0x32u, 0x0Cu}, + {0x33u, 0x03u}, + {0x34u, 0x30u}, + {0x35u, 0x3Cu}, + {0x36u, 0x03u}, + {0x3Eu, 0x55u}, + {0x3Fu, 0x15u}, + {0x58u, 0x04u}, {0x59u, 0x04u}, - {0x5Cu, 0x19u}, + {0x5Bu, 0x04u}, {0x5Fu, 0x01u}, - {0x83u, 0x04u}, - {0x84u, 0x02u}, - {0x87u, 0x10u}, - {0x8Cu, 0x01u}, - {0x8Eu, 0x02u}, - {0x8Fu, 0x08u}, - {0x90u, 0x07u}, - {0x95u, 0x01u}, - {0x97u, 0x04u}, - {0x99u, 0x01u}, - {0x9Bu, 0x02u}, - {0xA0u, 0x02u}, - {0xA1u, 0x06u}, - {0xA3u, 0x01u}, - {0xA4u, 0x06u}, - {0xAAu, 0x05u}, - {0xABu, 0x07u}, - {0xADu, 0x08u}, - {0xAEu, 0x07u}, - {0xAFu, 0x10u}, - {0xB3u, 0x07u}, - {0xB6u, 0x07u}, - {0xB7u, 0x18u}, - {0xBFu, 0x40u}, + {0x80u, 0x03u}, + {0x81u, 0x06u}, + {0x82u, 0x0Cu}, + {0x83u, 0x09u}, + {0x84u, 0x05u}, + {0x86u, 0x0Au}, + {0x87u, 0xFFu}, + {0x89u, 0x30u}, + {0x8Au, 0xFFu}, + {0x8Bu, 0xC0u}, + {0x8Cu, 0x0Fu}, + {0x8Du, 0x60u}, + {0x8Eu, 0xF0u}, + {0x8Fu, 0x90u}, + {0x90u, 0x90u}, + {0x91u, 0x0Fu}, + {0x92u, 0x60u}, + {0x93u, 0xF0u}, + {0x94u, 0xFFu}, + {0x95u, 0x50u}, + {0x97u, 0xA0u}, + {0x98u, 0xFFu}, + {0x99u, 0xFFu}, + {0xA1u, 0x03u}, + {0xA3u, 0x0Cu}, + {0xA4u, 0x50u}, + {0xA6u, 0xA0u}, + {0xA7u, 0xFFu}, + {0xA8u, 0x30u}, + {0xA9u, 0x05u}, + {0xAAu, 0xC0u}, + {0xABu, 0x0Au}, + {0xACu, 0x09u}, + {0xAEu, 0x06u}, + {0xB2u, 0xFFu}, + {0xB5u, 0xFFu}, + {0xBEu, 0x04u}, + {0xBFu, 0x10u}, {0xD8u, 0x04u}, {0xD9u, 0x04u}, - {0xDBu, 0x04u}, - {0xDCu, 0x11u}, {0xDFu, 0x01u}, - {0x00u, 0x20u}, - {0x03u, 0x21u}, - {0x05u, 0x08u}, - {0x06u, 0x01u}, - {0x08u, 0x40u}, - {0x0Au, 0x64u}, - {0x0Fu, 0x80u}, - {0x10u, 0x88u}, - {0x11u, 0x04u}, - {0x12u, 0x02u}, - {0x16u, 0x42u}, + {0x00u, 0x08u}, + {0x01u, 0x10u}, + {0x03u, 0x01u}, + {0x05u, 0x02u}, + {0x06u, 0x28u}, + {0x07u, 0x03u}, + {0x08u, 0x01u}, + {0x0Au, 0x14u}, + {0x0Eu, 0x60u}, + {0x0Fu, 0x04u}, + {0x10u, 0x08u}, + {0x11u, 0x41u}, + {0x14u, 0x01u}, + {0x16u, 0x02u}, {0x17u, 0x24u}, - {0x19u, 0x80u}, - {0x1Au, 0x44u}, - {0x1Fu, 0x80u}, - {0x21u, 0x68u}, - {0x24u, 0x20u}, - {0x26u, 0x44u}, - {0x27u, 0x20u}, - {0x28u, 0x08u}, - {0x2Au, 0x04u}, - {0x2Bu, 0xC0u}, - {0x2Du, 0x40u}, - {0x2Fu, 0x84u}, - {0x30u, 0x02u}, - {0x31u, 0x20u}, - {0x33u, 0x44u}, - {0x37u, 0x24u}, - {0x38u, 0x20u}, - {0x39u, 0x89u}, - {0x3Du, 0x80u}, - {0x3Fu, 0x09u}, - {0x6Du, 0x40u}, - {0x78u, 0x01u}, - {0x81u, 0x2Cu}, - {0x8Eu, 0x05u}, - {0xC0u, 0xA7u}, - {0xC2u, 0x1Fu}, - {0xC4u, 0xFFu}, - {0xCAu, 0xB7u}, - {0xCCu, 0x6Fu}, - {0xCEu, 0xDFu}, - {0xDEu, 0x01u}, - {0xE0u, 0x04u}, - {0x05u, 0x01u}, - {0x37u, 0x01u}, - {0x3Fu, 0x40u}, + {0x19u, 0x18u}, + {0x1Au, 0x80u}, + {0x1Bu, 0x80u}, + {0x1Du, 0x04u}, + {0x20u, 0x80u}, + {0x23u, 0x14u}, + {0x26u, 0x20u}, + {0x29u, 0x40u}, + {0x2Cu, 0x20u}, + {0x2Du, 0x13u}, + {0x2Eu, 0x20u}, + {0x33u, 0x41u}, + {0x34u, 0x10u}, + {0x36u, 0x10u}, + {0x37u, 0x06u}, + {0x39u, 0x88u}, + {0x3Cu, 0x20u}, + {0x3Eu, 0x42u}, + {0x3Fu, 0x04u}, + {0x41u, 0xC0u}, + {0x68u, 0x10u}, + {0x69u, 0x40u}, + {0x6Au, 0x54u}, + {0x6Bu, 0x64u}, + {0x70u, 0x18u}, + {0x71u, 0x41u}, + {0x80u, 0x08u}, + {0x8Bu, 0x80u}, + {0x8Eu, 0x40u}, + {0xC0u, 0xF7u}, + {0xC2u, 0x7Eu}, + {0xC4u, 0xEBu}, + {0xCAu, 0xE8u}, + {0xCCu, 0xE9u}, + {0xCEu, 0xFAu}, + {0xE2u, 0x10u}, + {0xE6u, 0x05u}, + {0x01u, 0x03u}, + {0x03u, 0x0Cu}, + {0x04u, 0x30u}, + {0x06u, 0xC0u}, + {0x07u, 0xFFu}, + {0x0Au, 0xFFu}, + {0x0Bu, 0xFFu}, + {0x0Cu, 0x06u}, + {0x0Du, 0x90u}, + {0x0Eu, 0x09u}, + {0x0Fu, 0x60u}, + {0x10u, 0x60u}, + {0x11u, 0x0Fu}, + {0x12u, 0x90u}, + {0x13u, 0xF0u}, + {0x15u, 0x50u}, + {0x16u, 0xFFu}, + {0x17u, 0xA0u}, + {0x18u, 0xFFu}, + {0x19u, 0x30u}, + {0x1Bu, 0xC0u}, + {0x1Cu, 0x03u}, + {0x1Eu, 0x0Cu}, + {0x20u, 0x0Fu}, + {0x21u, 0x09u}, + {0x22u, 0xF0u}, + {0x23u, 0x06u}, + {0x24u, 0x50u}, + {0x26u, 0xA0u}, + {0x27u, 0xFFu}, + {0x28u, 0x05u}, + {0x29u, 0x05u}, + {0x2Au, 0x0Au}, + {0x2Bu, 0x0Au}, + {0x34u, 0xFFu}, + {0x35u, 0xFFu}, + {0x3Eu, 0x10u}, + {0x3Fu, 0x10u}, + {0x56u, 0x08u}, + {0x58u, 0x04u}, {0x59u, 0x04u}, {0x5Bu, 0x04u}, + {0x5Du, 0x90u}, {0x5Fu, 0x01u}, - {0x80u, 0x01u}, - {0x83u, 0x04u}, - {0x85u, 0x80u}, - {0x88u, 0x04u}, - {0x8Bu, 0x24u}, - {0x8Fu, 0x20u}, - {0x93u, 0x18u}, - {0x95u, 0x24u}, - {0x97u, 0x09u}, - {0x9Fu, 0x03u}, - {0xA1u, 0x24u}, - {0xA3u, 0x12u}, - {0xA9u, 0x40u}, - {0xACu, 0x02u}, - {0xB0u, 0x01u}, - {0xB1u, 0x38u}, - {0xB3u, 0x40u}, - {0xB4u, 0x04u}, - {0xB5u, 0x80u}, - {0xB6u, 0x02u}, - {0xB7u, 0x07u}, - {0xBEu, 0x51u}, - {0xBFu, 0x14u}, - {0xC0u, 0x61u}, - {0xC1u, 0x03u}, - {0xC2u, 0x20u}, - {0xC5u, 0x2Cu}, - {0xC6u, 0x0Du}, - {0xC7u, 0xFEu}, - {0xC8u, 0x37u}, - {0xC9u, 0xFFu}, - {0xCAu, 0xFFu}, - {0xCBu, 0xFFu}, - {0xCFu, 0x2Cu}, - {0xD6u, 0x01u}, - {0xD8u, 0x04u}, + {0x84u, 0x0Du}, + {0x87u, 0x06u}, + {0x88u, 0x0Du}, + {0x8Bu, 0x08u}, + {0x8Cu, 0x0Du}, + {0x92u, 0x10u}, + {0x94u, 0x80u}, + {0x95u, 0x09u}, + {0x97u, 0x52u}, + {0x98u, 0x02u}, + {0x9Au, 0x54u}, + {0x9Cu, 0x02u}, + {0x9Eu, 0x0Du}, + {0x9Fu, 0x30u}, + {0xA0u, 0x0Du}, + {0xA1u, 0x09u}, + {0xA3u, 0x24u}, + {0xA4u, 0x01u}, + {0xA6u, 0x32u}, + {0xA7u, 0x01u}, + {0xA8u, 0x62u}, + {0xAAu, 0x08u}, + {0xABu, 0x49u}, + {0xACu, 0x0Du}, + {0xB0u, 0x70u}, + {0xB3u, 0x07u}, + {0xB4u, 0x80u}, + {0xB5u, 0x40u}, + {0xB6u, 0x0Fu}, + {0xB7u, 0x38u}, + {0xBAu, 0x80u}, + {0xBEu, 0x10u}, + {0xBFu, 0x10u}, + {0xD8u, 0x0Bu}, {0xD9u, 0x04u}, - {0xDAu, 0x04u}, {0xDBu, 0x04u}, - {0xDCu, 0x10u}, - {0xDDu, 0x01u}, + {0xDCu, 0x19u}, {0xDFu, 0x01u}, - {0xE2u, 0xC0u}, - {0xE6u, 0x80u}, - {0xE8u, 0x40u}, - {0xE9u, 0x40u}, - {0xEEu, 0x08u}, - {0x01u, 0x02u}, - {0x03u, 0x08u}, - {0x12u, 0x02u}, - {0x19u, 0x51u}, - {0x21u, 0x09u}, - {0x22u, 0x81u}, - {0x23u, 0x08u}, - {0x27u, 0x02u}, - {0x2Au, 0x20u}, - {0x2Bu, 0x80u}, - {0x32u, 0x81u}, - {0x33u, 0x04u}, - {0x38u, 0x08u}, - {0x39u, 0x40u}, - {0x3Au, 0x02u}, - {0x3Bu, 0x10u}, - {0x3Eu, 0x08u}, - {0x43u, 0x94u}, - {0x49u, 0x08u}, - {0x4Au, 0x04u}, - {0x4Bu, 0x11u}, - {0x51u, 0x02u}, - {0x52u, 0x48u}, - {0x59u, 0x90u}, - {0x5Bu, 0x0Au}, - {0x60u, 0x04u}, - {0x61u, 0x49u}, - {0x69u, 0x59u}, - {0x6Cu, 0x20u}, - {0x6Eu, 0x20u}, - {0x6Fu, 0x02u}, - {0x72u, 0x92u}, - {0x73u, 0x04u}, - {0x81u, 0x0Au}, - {0x82u, 0x28u}, - {0x85u, 0x01u}, - {0x86u, 0x10u}, - {0x88u, 0x20u}, - {0x89u, 0x02u}, - {0x8Au, 0x40u}, - {0x8Eu, 0x08u}, - {0x8Fu, 0x40u}, - {0x91u, 0x80u}, - {0x92u, 0x04u}, - {0x93u, 0x08u}, - {0x95u, 0x0Du}, - {0x96u, 0x20u}, - {0x97u, 0x01u}, - {0x99u, 0x80u}, - {0x9Bu, 0x20u}, - {0x9Cu, 0x49u}, - {0x9Du, 0x0Cu}, - {0x9Eu, 0x40u}, - {0x9Fu, 0x45u}, - {0xA2u, 0x44u}, - {0xA3u, 0x80u}, - {0xA4u, 0x98u}, - {0xA5u, 0x41u}, - {0xA7u, 0x24u}, - {0xA8u, 0x02u}, - {0xA9u, 0x01u}, - {0xAEu, 0x02u}, - {0xAFu, 0x04u}, - {0xB2u, 0x02u}, - {0xC0u, 0x0Au}, - {0xC4u, 0x01u}, - {0xCAu, 0x05u}, - {0xCCu, 0x0Bu}, - {0xCEu, 0x4Fu}, - {0xD0u, 0x0Eu}, - {0xD2u, 0x04u}, - {0xD6u, 0x0Fu}, - {0xD8u, 0x0Fu}, - {0xE0u, 0x01u}, - {0xE2u, 0x04u}, - {0xE4u, 0x06u}, - {0xE6u, 0x21u}, - {0xEAu, 0x04u}, - {0xEEu, 0x08u}, - {0x01u, 0x01u}, - {0x04u, 0x21u}, - {0x05u, 0x01u}, - {0x06u, 0x02u}, - {0x0Au, 0x01u}, - {0x0Bu, 0x08u}, - {0x0Fu, 0x06u}, - {0x13u, 0x01u}, - {0x14u, 0x04u}, - {0x15u, 0x01u}, - {0x16u, 0x43u}, - {0x18u, 0xE0u}, - {0x19u, 0x08u}, - {0x1Bu, 0x02u}, - {0x1Du, 0x01u}, - {0x1Eu, 0xECu}, + {0x03u, 0x19u}, + {0x06u, 0x0Au}, + {0x07u, 0x20u}, + {0x08u, 0x04u}, + {0x09u, 0x20u}, + {0x0Au, 0x81u}, + {0x0Eu, 0x50u}, + {0x0Fu, 0x05u}, + {0x10u, 0x80u}, + {0x11u, 0x40u}, + {0x13u, 0x18u}, + {0x14u, 0x40u}, + {0x15u, 0x10u}, + {0x17u, 0x06u}, + {0x19u, 0x20u}, + {0x1Au, 0x81u}, + {0x1Eu, 0x04u}, + {0x20u, 0x04u}, + {0x21u, 0x84u}, + {0x25u, 0x10u}, + {0x28u, 0x80u}, + {0x2Au, 0x10u}, + {0x2Bu, 0x10u}, + {0x2Cu, 0x20u}, + {0x2Du, 0x10u}, + {0x2Eu, 0x0Au}, + {0x31u, 0x80u}, + {0x32u, 0x04u}, + {0x37u, 0xE6u}, + {0x39u, 0x08u}, + {0x3Au, 0x20u}, + {0x3Du, 0x03u}, + {0x3Eu, 0x50u}, + {0x3Fu, 0x05u}, + {0x58u, 0x10u}, + {0x5Au, 0x10u}, + {0x5Fu, 0x80u}, + {0x61u, 0x01u}, + {0x62u, 0x02u}, + {0x64u, 0x02u}, + {0x6Bu, 0x02u}, + {0x6Cu, 0x02u}, + {0x78u, 0x02u}, + {0x82u, 0x02u}, + {0x83u, 0x10u}, + {0x84u, 0x80u}, + {0x86u, 0xA0u}, + {0x88u, 0x04u}, + {0x89u, 0x10u}, + {0x8Bu, 0x40u}, + {0x8Cu, 0x04u}, + {0x8Du, 0x40u}, + {0x90u, 0x20u}, + {0x92u, 0x40u}, + {0x93u, 0x04u}, + {0x95u, 0x19u}, + {0x98u, 0x08u}, + {0x99u, 0x05u}, + {0x9Bu, 0x24u}, + {0x9Cu, 0x10u}, + {0x9Eu, 0x0Au}, + {0x9Fu, 0x02u}, + {0xA0u, 0x08u}, + {0xA2u, 0x20u}, + {0xA4u, 0x24u}, + {0xA5u, 0x80u}, + {0xACu, 0x40u}, + {0xADu, 0x08u}, + {0xB3u, 0x10u}, + {0xB5u, 0x10u}, + {0xC0u, 0xE7u}, + {0xC2u, 0xFFu}, + {0xC4u, 0x7Fu}, + {0xCAu, 0xE7u}, + {0xCCu, 0xEAu}, + {0xCEu, 0xF6u}, + {0xD6u, 0x10u}, + {0xD8u, 0x10u}, + {0xDEu, 0x01u}, + {0xE2u, 0x0Au}, + {0xE6u, 0x47u}, + {0xE8u, 0x02u}, + {0xEAu, 0x08u}, + {0xECu, 0x08u}, + {0xEEu, 0x80u}, + {0x01u, 0x44u}, + {0x05u, 0xE1u}, + {0x06u, 0x46u}, + {0x07u, 0x12u}, + {0x08u, 0x09u}, + {0x09u, 0x80u}, + {0x0Au, 0x12u}, + {0x0Bu, 0x5Fu}, + {0x0Du, 0x4Cu}, + {0x0Eu, 0x80u}, + {0x11u, 0x4Cu}, + {0x12u, 0x30u}, + {0x16u, 0x08u}, + {0x17u, 0x4Cu}, + {0x19u, 0xB1u}, + {0x1Au, 0x09u}, + {0x1Bu, 0x0Eu}, + {0x1Cu, 0x09u}, + {0x1Du, 0x4Cu}, + {0x1Eu, 0x24u}, + {0x20u, 0x40u}, {0x21u, 0x08u}, - {0x23u, 0x04u}, - {0x27u, 0x01u}, - {0x28u, 0x88u}, - {0x2Au, 0x03u}, - {0x2Bu, 0x08u}, - {0x2Eu, 0x12u}, - {0x30u, 0xE0u}, - {0x33u, 0x01u}, - {0x34u, 0x10u}, - {0x36u, 0x0Fu}, - {0x37u, 0x0Eu}, - {0x3Eu, 0x01u}, - {0x3Fu, 0x04u}, - {0x54u, 0x40u}, - {0x58u, 0x0Bu}, - {0x59u, 0x04u}, + {0x22u, 0x80u}, + {0x23u, 0x20u}, + {0x25u, 0x44u}, + {0x26u, 0x01u}, + {0x27u, 0x08u}, + {0x30u, 0x38u}, + {0x31u, 0x10u}, + {0x33u, 0x61u}, + {0x34u, 0x07u}, + {0x35u, 0x0Fu}, + {0x36u, 0xC0u}, + {0x37u, 0x80u}, + {0x3Bu, 0x0Cu}, + {0x3Eu, 0x40u}, + {0x3Fu, 0x41u}, + {0x54u, 0x09u}, + {0x58u, 0x04u}, + {0x59u, 0x0Bu}, {0x5Bu, 0x0Bu}, - {0x5Cu, 0x19u}, + {0x5Cu, 0x91u}, {0x5Du, 0x90u}, {0x5Fu, 0x01u}, - {0x80u, 0x18u}, - {0x82u, 0x60u}, - {0x83u, 0x30u}, - {0x84u, 0x28u}, - {0x86u, 0x53u}, - {0x87u, 0x40u}, - {0x8Cu, 0x30u}, - {0x8Eu, 0x48u}, - {0x95u, 0x43u}, - {0x96u, 0x04u}, - {0x97u, 0x1Cu}, - {0x9Bu, 0x4Au}, - {0xA0u, 0x04u}, - {0xA1u, 0x44u}, - {0xA2u, 0x02u}, - {0xA3u, 0x2Bu}, - {0xA4u, 0x04u}, - {0xA5u, 0x01u}, - {0xA6u, 0x01u}, - {0xAAu, 0x04u}, - {0xABu, 0x07u}, - {0xB1u, 0x70u}, - {0xB2u, 0x07u}, - {0xB3u, 0x08u}, - {0xB4u, 0x78u}, - {0xB5u, 0x07u}, + {0x82u, 0x38u}, + {0x85u, 0x04u}, + {0x88u, 0x01u}, + {0x89u, 0x04u}, + {0x8Au, 0x14u}, + {0x90u, 0x3Eu}, + {0x94u, 0x22u}, + {0x95u, 0x04u}, + {0x96u, 0x01u}, + {0x99u, 0x04u}, + {0x9Fu, 0x01u}, + {0xA4u, 0x09u}, + {0xA6u, 0x02u}, + {0xABu, 0x02u}, + {0xADu, 0x01u}, + {0xAFu, 0x02u}, + {0xB0u, 0x07u}, + {0xB1u, 0x03u}, + {0xB4u, 0x38u}, + {0xB7u, 0x04u}, + {0xB8u, 0x02u}, + {0xB9u, 0x80u}, {0xBEu, 0x10u}, - {0xBFu, 0x04u}, - {0xD6u, 0x08u}, - {0xD8u, 0x04u}, + {0xBFu, 0x41u}, + {0xD8u, 0x0Bu}, {0xD9u, 0x04u}, {0xDBu, 0x04u}, - {0xDCu, 0x11u}, - {0xDDu, 0x90u}, + {0xDCu, 0x09u}, {0xDFu, 0x01u}, - {0x01u, 0x20u}, + {0x00u, 0x20u}, + {0x02u, 0x02u}, {0x03u, 0x20u}, - {0x04u, 0x80u}, - {0x05u, 0x05u}, - {0x0Au, 0x26u}, - {0x0Eu, 0x10u}, - {0x12u, 0x01u}, - {0x13u, 0x10u}, - {0x15u, 0x01u}, - {0x17u, 0x24u}, + {0x04u, 0x02u}, + {0x05u, 0x10u}, + {0x08u, 0x80u}, + {0x09u, 0x01u}, + {0x0Au, 0xA0u}, + {0x0Bu, 0x04u}, + {0x0Eu, 0x80u}, + {0x0Fu, 0x10u}, + {0x10u, 0x40u}, + {0x11u, 0x08u}, + {0x17u, 0x08u}, {0x19u, 0x20u}, - {0x1Au, 0x42u}, - {0x1Cu, 0x08u}, - {0x1Du, 0x04u}, - {0x21u, 0x40u}, - {0x22u, 0x08u}, - {0x24u, 0x80u}, - {0x25u, 0x01u}, - {0x26u, 0x20u}, - {0x27u, 0x14u}, - {0x29u, 0x10u}, - {0x2Au, 0x04u}, - {0x2Bu, 0x80u}, - {0x2Cu, 0x20u}, - {0x2Du, 0x01u}, - {0x2Fu, 0x84u}, - {0x30u, 0x48u}, - {0x32u, 0x20u}, - {0x33u, 0x41u}, - {0x34u, 0x10u}, - {0x35u, 0x10u}, - {0x37u, 0x24u}, - {0x39u, 0x94u}, - {0x3Au, 0x02u}, - {0x3Du, 0x02u}, - {0x3Fu, 0x04u}, - {0x5Eu, 0x80u}, - {0x61u, 0x20u}, - {0x62u, 0x08u}, - {0x63u, 0x01u}, - {0x64u, 0x01u}, - {0x67u, 0x02u}, - {0x78u, 0x01u}, - {0x81u, 0x40u}, - {0x82u, 0x40u}, + {0x1Au, 0x82u}, + {0x1Bu, 0x20u}, + {0x1Eu, 0x80u}, + {0x1Fu, 0x10u}, + {0x20u, 0x04u}, + {0x21u, 0x84u}, + {0x23u, 0x98u}, + {0x25u, 0x40u}, + {0x27u, 0x40u}, + {0x2Au, 0x0Bu}, + {0x2Cu, 0x02u}, + {0x2Fu, 0x04u}, + {0x30u, 0x80u}, + {0x31u, 0x10u}, + {0x33u, 0x09u}, + {0x35u, 0x04u}, + {0x36u, 0xA0u}, + {0x38u, 0x04u}, + {0x39u, 0x41u}, + {0x3Bu, 0x10u}, + {0x3Du, 0x20u}, + {0x3Eu, 0x04u}, + {0x58u, 0x20u}, + {0x59u, 0x09u}, + {0x5Bu, 0x80u}, + {0x61u, 0x80u}, + {0x65u, 0x08u}, + {0x66u, 0x14u}, + {0x67u, 0x04u}, + {0x6Cu, 0x20u}, + {0x6Fu, 0x06u}, + {0x78u, 0x02u}, + {0x7Cu, 0x02u}, + {0x82u, 0x80u}, {0x85u, 0x40u}, - {0x8Du, 0x10u}, - {0x91u, 0x10u}, - {0x92u, 0x14u}, - {0x93u, 0x0Cu}, - {0x94u, 0x04u}, - {0x95u, 0x04u}, - {0x96u, 0x20u}, + {0x86u, 0x01u}, + {0x87u, 0x02u}, + {0x90u, 0x20u}, + {0x91u, 0x80u}, + {0x92u, 0x24u}, + {0x93u, 0x40u}, + {0x95u, 0x40u}, + {0x96u, 0x18u}, + {0x97u, 0x10u}, + {0x98u, 0xCAu}, + {0x99u, 0x04u}, {0x9Au, 0x80u}, - {0x9Bu, 0x20u}, - {0x9Cu, 0x41u}, - {0x9Du, 0x04u}, - {0x9Fu, 0x15u}, - {0xA0u, 0x20u}, - {0xA2u, 0x40u}, - {0xA3u, 0x80u}, - {0xA4u, 0x98u}, - {0xA5u, 0x41u}, - {0xA7u, 0x24u}, - {0xA9u, 0x40u}, - {0xAAu, 0x80u}, - {0xABu, 0x08u}, - {0xACu, 0x08u}, - {0xAEu, 0x02u}, - {0xAFu, 0x02u}, - {0xB4u, 0x04u}, - {0xC0u, 0xB6u}, - {0xC2u, 0x27u}, - {0xC4u, 0x73u}, - {0xCAu, 0xE7u}, - {0xCCu, 0x6Fu}, - {0xCEu, 0xCFu}, - {0xD6u, 0x10u}, - {0xD8u, 0x1Eu}, - {0xDEu, 0x01u}, - {0xE0u, 0x01u}, - {0xE8u, 0x01u}, - {0xEAu, 0x02u}, - {0xECu, 0x04u}, - {0xEEu, 0x09u}, - {0x17u, 0x01u}, - {0x1Bu, 0x01u}, - {0x35u, 0x01u}, - {0x3Fu, 0x10u}, - {0x59u, 0x04u}, - {0x5Fu, 0x01u}, - {0x01u, 0x02u}, - {0x03u, 0x29u}, - {0x09u, 0x08u}, - {0x0Au, 0x01u}, - {0x0Bu, 0x04u}, - {0x11u, 0x25u}, - {0x12u, 0x01u}, - {0x18u, 0x04u}, - {0x19u, 0x80u}, - {0x1Au, 0x80u}, + {0x9Eu, 0x10u}, + {0x9Fu, 0x59u}, + {0xA0u, 0x0Au}, + {0xA1u, 0x14u}, + {0xA2u, 0x22u}, + {0xA4u, 0xA4u}, + {0xA5u, 0x21u}, + {0xA7u, 0x08u}, + {0xA8u, 0x20u}, + {0xB1u, 0x20u}, + {0xB5u, 0x04u}, + {0xB6u, 0x50u}, + {0xC0u, 0x57u}, + {0xC2u, 0x3Fu}, + {0xC4u, 0x2Cu}, + {0xCAu, 0x33u}, + {0xCCu, 0x7Fu}, + {0xCEu, 0x6Fu}, + {0xD6u, 0x0Fu}, + {0xD8u, 0x08u}, + {0xDEu, 0x81u}, + {0xE2u, 0x01u}, + {0xEAu, 0x10u}, + {0x87u, 0x11u}, + {0x8Bu, 0x06u}, + {0x8Fu, 0x01u}, + {0x95u, 0x19u}, + {0x97u, 0x22u}, + {0x99u, 0x08u}, + {0xA1u, 0x21u}, + {0xA3u, 0x1Cu}, + {0xABu, 0x38u}, + {0xB3u, 0x38u}, + {0xB5u, 0x07u}, + {0xD9u, 0x04u}, + {0xDCu, 0x10u}, + {0xDFu, 0x01u}, + {0x04u, 0x04u}, + {0x05u, 0x10u}, + {0x07u, 0x42u}, + {0x0Eu, 0xA2u}, + {0x0Fu, 0x08u}, + {0x15u, 0x48u}, + {0x16u, 0x08u}, + {0x17u, 0x11u}, + {0x1Eu, 0xA0u}, {0x20u, 0x28u}, - {0x21u, 0x09u}, - {0x22u, 0x11u}, - {0x23u, 0x14u}, - {0x26u, 0x20u}, - {0x2Au, 0x40u}, - {0x2Bu, 0x28u}, - {0x31u, 0x08u}, - {0x32u, 0x10u}, - {0x33u, 0x41u}, - {0x34u, 0x10u}, - {0x37u, 0x04u}, - {0x38u, 0x80u}, - {0x39u, 0x14u}, - {0x41u, 0x09u}, - {0x43u, 0x20u}, - {0x48u, 0x04u}, - {0x49u, 0x08u}, - {0x4Bu, 0x80u}, - {0x50u, 0x01u}, - {0x51u, 0x20u}, - {0x52u, 0x45u}, - {0x61u, 0x10u}, - {0x68u, 0x08u}, - {0x69u, 0x15u}, - {0x6Bu, 0x41u}, - {0x70u, 0xC0u}, - {0x72u, 0x03u}, - {0x78u, 0x01u}, - {0x8Eu, 0x20u}, - {0x93u, 0x02u}, - {0x94u, 0x04u}, - {0x95u, 0x04u}, - {0x96u, 0x20u}, - {0x97u, 0x10u}, - {0x98u, 0x11u}, + {0x21u, 0x10u}, + {0x22u, 0x04u}, + {0x27u, 0x02u}, + {0x28u, 0x88u}, + {0x2Fu, 0x1Au}, + {0x30u, 0x20u}, + {0x32u, 0x04u}, + {0x36u, 0x10u}, + {0x37u, 0x49u}, + {0x39u, 0x20u}, + {0x3Bu, 0x44u}, + {0x3Du, 0x41u}, + {0x3Eu, 0x01u}, + {0x3Fu, 0x18u}, + {0x45u, 0x22u}, + {0x46u, 0x20u}, + {0x47u, 0x08u}, + {0x4Du, 0x80u}, + {0x4Eu, 0x20u}, + {0x4Fu, 0x18u}, + {0x56u, 0x55u}, + {0x57u, 0x40u}, + {0x65u, 0x04u}, + {0x66u, 0x50u}, + {0x7Cu, 0x02u}, + {0x87u, 0x04u}, + {0x90u, 0x24u}, + {0x91u, 0x88u}, + {0x93u, 0x50u}, + {0x94u, 0x02u}, + {0x95u, 0x41u}, + {0x96u, 0x18u}, + {0x97u, 0x0Cu}, + {0x98u, 0xCAu}, + {0x99u, 0x20u}, {0x9Au, 0x80u}, - {0x9Bu, 0x04u}, - {0x9Eu, 0x07u}, - {0x9Fu, 0x41u}, - {0xA1u, 0x10u}, - {0xA3u, 0x80u}, - {0xA4u, 0x98u}, + {0x9Bu, 0x08u}, + {0x9Du, 0x11u}, + {0x9Eu, 0x0Du}, + {0x9Fu, 0x11u}, + {0xA0u, 0x28u}, + {0xA2u, 0x02u}, + {0xA4u, 0x94u}, {0xA5u, 0x20u}, - {0xA7u, 0x24u}, - {0xAAu, 0x04u}, - {0xABu, 0x01u}, - {0xACu, 0x04u}, - {0xB5u, 0x01u}, - {0xC0u, 0x0Fu}, - {0xC2u, 0x07u}, - {0xC4u, 0x0Fu}, - {0xCAu, 0x0Eu}, - {0xCCu, 0x6Fu}, - {0xCEu, 0x0Eu}, - {0xD0u, 0x07u}, - {0xD2u, 0x0Cu}, - {0xD8u, 0x04u}, - {0xDEu, 0x01u}, - {0xE2u, 0x10u}, - {0xECu, 0x42u}, - {0xAFu, 0x08u}, - {0x80u, 0x40u}, - {0x94u, 0x80u}, {0xA7u, 0x08u}, - {0xA8u, 0x28u}, - {0xA9u, 0x18u}, + {0xA8u, 0x20u}, {0xAAu, 0x02u}, - {0xAFu, 0x80u}, - {0xE0u, 0x01u}, - {0xE6u, 0x10u}, - {0xE8u, 0x01u}, - {0xEAu, 0x12u}, - {0xEEu, 0x01u}, - {0x00u, 0x0Fu}, - {0x02u, 0xF0u}, - {0x0Bu, 0xFFu}, - {0x0Cu, 0x33u}, - {0x0Eu, 0xCCu}, - {0x0Fu, 0xFFu}, - {0x11u, 0x33u}, - {0x13u, 0xCCu}, - {0x14u, 0xFFu}, - {0x18u, 0x96u}, - {0x19u, 0x55u}, - {0x1Au, 0x69u}, - {0x1Bu, 0xAAu}, - {0x1Cu, 0x55u}, - {0x1Eu, 0xAAu}, - {0x21u, 0xFFu}, - {0x26u, 0xFFu}, - {0x29u, 0x96u}, - {0x2Au, 0xFFu}, - {0x2Bu, 0x69u}, - {0x2Du, 0x0Fu}, - {0x2Fu, 0xF0u}, - {0x35u, 0xFFu}, - {0x36u, 0xFFu}, - {0x3Eu, 0x40u}, - {0x3Fu, 0x10u}, + {0xAFu, 0x10u}, + {0xB7u, 0x04u}, + {0xC0u, 0xF0u}, + {0xC2u, 0xF0u}, + {0xC4u, 0xF0u}, + {0xCAu, 0x75u}, + {0xCCu, 0xF6u}, + {0xCEu, 0xFEu}, + {0xD0u, 0xE0u}, + {0xD2u, 0x30u}, + {0xD8u, 0x70u}, + {0xDEu, 0x80u}, + {0xEAu, 0x08u}, + {0xEEu, 0x10u}, + {0x9Eu, 0x40u}, + {0x9Fu, 0x08u}, + {0xEAu, 0x08u}, + {0x9Eu, 0x40u}, + {0x9Fu, 0x08u}, + {0xABu, 0x01u}, + {0xAFu, 0x40u}, + {0xB0u, 0x04u}, + {0xB3u, 0x40u}, + {0xB5u, 0x01u}, + {0xB6u, 0x04u}, + {0xE2u, 0x01u}, + {0xE8u, 0x20u}, + {0xEAu, 0x49u}, + {0xEEu, 0x40u}, + {0x00u, 0x12u}, + {0x02u, 0x24u}, + {0x05u, 0x02u}, + {0x06u, 0x12u}, + {0x0Au, 0x0Cu}, + {0x0Eu, 0x02u}, + {0x11u, 0x06u}, + {0x13u, 0x08u}, + {0x16u, 0x60u}, + {0x17u, 0x0Du}, + {0x1Bu, 0x07u}, + {0x1Cu, 0x12u}, + {0x1Du, 0x07u}, + {0x1Eu, 0x48u}, + {0x1Fu, 0x08u}, + {0x20u, 0x01u}, + {0x21u, 0x02u}, + {0x25u, 0x01u}, + {0x26u, 0x10u}, + {0x27u, 0x02u}, + {0x29u, 0x10u}, + {0x30u, 0x01u}, + {0x32u, 0x70u}, + {0x33u, 0x08u}, + {0x34u, 0x0Eu}, + {0x35u, 0x10u}, + {0x37u, 0x07u}, + {0x3Eu, 0x01u}, + {0x3Fu, 0x14u}, + {0x40u, 0x31u}, + {0x41u, 0x04u}, + {0x42u, 0x60u}, + {0x45u, 0xEFu}, + {0x46u, 0x20u}, + {0x47u, 0xDCu}, + {0x48u, 0x3Bu}, + {0x49u, 0xFFu}, + {0x4Au, 0xFFu}, + {0x4Bu, 0xFFu}, + {0x4Fu, 0x2Cu}, + {0x56u, 0x01u}, {0x58u, 0x04u}, {0x59u, 0x04u}, + {0x5Au, 0x04u}, {0x5Bu, 0x04u}, + {0x5Cu, 0x11u}, + {0x5Du, 0x01u}, {0x5Fu, 0x01u}, - {0x84u, 0xFFu}, - {0x88u, 0x69u}, - {0x8Au, 0x96u}, - {0x8Bu, 0xFFu}, - {0x8Cu, 0x33u}, - {0x8Du, 0x33u}, - {0x8Eu, 0xCCu}, - {0x8Fu, 0xCCu}, - {0x91u, 0x0Fu}, - {0x92u, 0xFFu}, - {0x93u, 0xF0u}, - {0x97u, 0xFFu}, - {0x98u, 0xFFu}, - {0x99u, 0x55u}, - {0x9Bu, 0xAAu}, - {0x9Cu, 0x0Fu}, - {0x9Eu, 0xF0u}, - {0xA3u, 0xFFu}, - {0xA4u, 0x55u}, - {0xA6u, 0xAAu}, - {0xA9u, 0x69u}, - {0xABu, 0x96u}, - {0xB0u, 0xFFu}, - {0xB7u, 0xFFu}, - {0xBEu, 0x01u}, - {0xBFu, 0x40u}, + {0x62u, 0xC0u}, + {0x66u, 0x80u}, + {0x68u, 0x40u}, + {0x69u, 0x40u}, + {0x6Eu, 0x08u}, + {0x81u, 0x02u}, + {0x84u, 0x02u}, + {0x89u, 0x01u}, + {0x8Du, 0x04u}, + {0xACu, 0x01u}, + {0xB3u, 0x01u}, + {0xB4u, 0x02u}, + {0xB5u, 0x02u}, + {0xB6u, 0x01u}, + {0xB7u, 0x04u}, + {0xBEu, 0x50u}, + {0xBFu, 0x54u}, {0xD8u, 0x04u}, {0xD9u, 0x04u}, + {0xDBu, 0x04u}, {0xDFu, 0x01u}, {0x01u, 0x08u}, - {0x03u, 0x09u}, - {0x04u, 0x80u}, - {0x05u, 0x01u}, + {0x05u, 0x10u}, + {0x06u, 0x60u}, {0x07u, 0x01u}, - {0x09u, 0x12u}, - {0x0Bu, 0x02u}, - {0x0Cu, 0x08u}, + {0x08u, 0x08u}, + {0x09u, 0x08u}, {0x0Du, 0x80u}, - {0x0Fu, 0x08u}, + {0x0Eu, 0x20u}, {0x10u, 0x10u}, - {0x14u, 0x20u}, - {0x15u, 0x20u}, - {0x1Au, 0x80u}, - {0x1Fu, 0x80u}, + {0x12u, 0x22u}, + {0x14u, 0x80u}, + {0x17u, 0x04u}, + {0x19u, 0xA0u}, + {0x1Cu, 0x40u}, + {0x1Du, 0x10u}, + {0x1Eu, 0x20u}, {0x20u, 0x01u}, - {0x25u, 0x20u}, - {0x2Au, 0x02u}, - {0x2Bu, 0x0Cu}, - {0x2Cu, 0x02u}, + {0x21u, 0x08u}, + {0x23u, 0x04u}, + {0x25u, 0x80u}, + {0x26u, 0xA8u}, + {0x2Cu, 0x04u}, + {0x2Du, 0x02u}, {0x2Eu, 0x02u}, - {0x2Fu, 0x09u}, - {0x30u, 0x1Au}, - {0x31u, 0x01u}, - {0x34u, 0x10u}, - {0x37u, 0x01u}, - {0x38u, 0x80u}, + {0x2Fu, 0x10u}, + {0x34u, 0x20u}, + {0x36u, 0x80u}, + {0x37u, 0x0Au}, {0x39u, 0x20u}, - {0x3Cu, 0x80u}, - {0x3Du, 0x20u}, - {0x5Cu, 0x08u}, - {0x5Du, 0x80u}, - {0x5Eu, 0x11u}, - {0x80u, 0x08u}, - {0x82u, 0x10u}, - {0x84u, 0x10u}, + {0x3Bu, 0x81u}, + {0x3Eu, 0x04u}, + {0x3Fu, 0x08u}, + {0x45u, 0x80u}, + {0x46u, 0x60u}, + {0x47u, 0x0Au}, + {0x4Eu, 0x58u}, + {0x55u, 0x10u}, + {0x56u, 0x02u}, + {0x57u, 0x04u}, + {0x59u, 0x02u}, + {0x5Au, 0xA4u}, + {0x5Cu, 0x49u}, + {0x5Du, 0x20u}, + {0x64u, 0x10u}, + {0x65u, 0x80u}, + {0x67u, 0x44u}, + {0x6Eu, 0x08u}, + {0x6Fu, 0x45u}, + {0x74u, 0xA4u}, + {0x75u, 0x01u}, + {0x81u, 0x10u}, + {0x82u, 0x02u}, + {0x83u, 0x40u}, + {0x84u, 0xA0u}, {0x85u, 0x80u}, - {0x88u, 0x40u}, - {0x89u, 0x12u}, - {0x8Au, 0x01u}, - {0x8Du, 0x80u}, - {0x8Eu, 0x40u}, - {0x94u, 0x01u}, - {0xA0u, 0x02u}, - {0xA5u, 0x20u}, - {0xA9u, 0x20u}, - {0xC0u, 0x97u}, - {0xC2u, 0xEBu}, - {0xC4u, 0x64u}, - {0xCAu, 0xB5u}, - {0xCCu, 0xA7u}, - {0xCEu, 0x3Cu}, - {0xD6u, 0xF0u}, - {0xE2u, 0x94u}, - {0xE4u, 0xE2u}, - {0xE6u, 0x01u}, - {0xEEu, 0x28u}, - {0x80u, 0x02u}, - {0x8Cu, 0x01u}, - {0xE0u, 0x04u}, - {0xE6u, 0x50u}, - {0x8Cu, 0x40u}, - {0x90u, 0x40u}, - {0xABu, 0x21u}, - {0xE2u, 0x40u}, - {0x04u, 0x08u}, - {0x06u, 0x33u}, - {0x08u, 0x20u}, - {0x0Au, 0x18u}, - {0x0Eu, 0x01u}, - {0x14u, 0x2Eu}, - {0x15u, 0x04u}, - {0x16u, 0x10u}, + {0x88u, 0x04u}, + {0x89u, 0x10u}, + {0x8Au, 0x10u}, + {0x8Du, 0x18u}, + {0x93u, 0x20u}, + {0x98u, 0xA0u}, + {0xB0u, 0x80u}, + {0xC0u, 0xF4u}, + {0xC2u, 0xA0u}, + {0xC4u, 0x31u}, + {0xCAu, 0xE0u}, + {0xCCu, 0xF0u}, + {0xCEu, 0x4Du}, + {0xD0u, 0xD0u}, + {0xD2u, 0x20u}, + {0xD6u, 0xFFu}, + {0xD8u, 0xF0u}, + {0xE2u, 0xA1u}, + {0xE6u, 0x90u}, + {0xE8u, 0x42u}, + {0xEAu, 0x08u}, + {0xECu, 0x08u}, + {0x80u, 0x20u}, + {0x87u, 0x10u}, + {0xE0u, 0x80u}, + {0xE6u, 0x07u}, + {0xB4u, 0x04u}, + {0x00u, 0xD6u}, + {0x04u, 0xD2u}, + {0x05u, 0x40u}, + {0x06u, 0x04u}, + {0x07u, 0x30u}, + {0x08u, 0x29u}, + {0x09u, 0x58u}, + {0x0Au, 0x16u}, + {0x0Bu, 0x23u}, + {0x0Cu, 0x04u}, + {0x0Fu, 0x0Cu}, + {0x12u, 0x80u}, + {0x14u, 0x31u}, + {0x16u, 0x0Eu}, {0x17u, 0x01u}, - {0x18u, 0x18u}, - {0x1Au, 0x25u}, - {0x1Bu, 0x03u}, - {0x21u, 0x04u}, - {0x23u, 0x02u}, - {0x27u, 0x04u}, - {0x2Fu, 0x04u}, - {0x30u, 0x07u}, - {0x33u, 0x07u}, - {0x34u, 0x38u}, - {0x3Au, 0x20u}, - {0x58u, 0x08u}, - {0x59u, 0x04u}, - {0x5Cu, 0x19u}, + {0x1Bu, 0x82u}, + {0x1Cu, 0x22u}, + {0x1Eu, 0x10u}, + {0x20u, 0xD6u}, + {0x24u, 0x17u}, + {0x25u, 0x34u}, + {0x26u, 0x28u}, + {0x27u, 0x43u}, + {0x28u, 0xD0u}, + {0x29u, 0x11u}, + {0x2Au, 0x06u}, + {0x2Bu, 0x62u}, + {0x2Cu, 0x06u}, + {0x2Eu, 0xD0u}, + {0x30u, 0x40u}, + {0x32u, 0x80u}, + {0x33u, 0x80u}, + {0x34u, 0x0Fu}, + {0x35u, 0x70u}, + {0x36u, 0x30u}, + {0x37u, 0x0Fu}, + {0x38u, 0x20u}, + {0x39u, 0x02u}, + {0x3Au, 0x80u}, + {0x3Bu, 0x20u}, + {0x3Eu, 0x05u}, + {0x3Fu, 0x01u}, + {0x56u, 0x02u}, + {0x57u, 0x28u}, + {0x58u, 0x0Bu}, + {0x59u, 0x0Bu}, + {0x5Bu, 0x0Bu}, + {0x5Cu, 0x99u}, + {0x5Du, 0x90u}, {0x5Fu, 0x01u}, - {0x80u, 0x2Cu}, - {0x83u, 0x9Fu}, - {0x84u, 0x24u}, - {0x85u, 0xC0u}, - {0x86u, 0x08u}, - {0x87u, 0x04u}, - {0x88u, 0x44u}, - {0x89u, 0xC0u}, - {0x8Au, 0x20u}, - {0x8Bu, 0x08u}, - {0x8Cu, 0x0Cu}, - {0x8Du, 0xC0u}, - {0x8Eu, 0x20u}, - {0x8Fu, 0x01u}, - {0x90u, 0x10u}, - {0x91u, 0x90u}, - {0x93u, 0x40u}, - {0x94u, 0xE0u}, - {0x95u, 0x7Fu}, - {0x96u, 0x0Fu}, - {0x97u, 0x80u}, - {0x98u, 0xA1u}, - {0x9Au, 0x42u}, - {0x9Bu, 0xFFu}, - {0x9Cu, 0x10u}, - {0x9Du, 0xC0u}, - {0x9Fu, 0x02u}, - {0xA0u, 0x08u}, - {0xA3u, 0x60u}, - {0xA4u, 0xC1u}, - {0xA5u, 0x1Fu}, - {0xA6u, 0x2Eu}, - {0xA7u, 0x20u}, - {0xA8u, 0x20u}, - {0xA9u, 0x80u}, - {0xAAu, 0x0Cu}, - {0xACu, 0x2Cu}, - {0xB0u, 0x10u}, - {0xB2u, 0x60u}, - {0xB4u, 0x0Fu}, - {0xB6u, 0x80u}, - {0xB7u, 0xFFu}, - {0xB8u, 0x02u}, - {0xBAu, 0x08u}, - {0xBEu, 0x40u}, - {0xBFu, 0x40u}, - {0xD4u, 0x09u}, - {0xD8u, 0x0Bu}, + {0x84u, 0x05u}, + {0x86u, 0x0Au}, + {0x87u, 0x70u}, + {0x88u, 0x03u}, + {0x8Au, 0x0Cu}, + {0x8Bu, 0x80u}, + {0x8Cu, 0x30u}, + {0x8Eu, 0xC0u}, + {0x8Fu, 0x04u}, + {0x95u, 0x09u}, + {0x97u, 0x14u}, + {0x98u, 0x06u}, + {0x99u, 0x01u}, + {0x9Au, 0x09u}, + {0x9Bu, 0x0Au}, + {0x9Du, 0x40u}, + {0x9Fu, 0x80u}, + {0xA0u, 0x0Fu}, + {0xA1u, 0x0Eu}, + {0xA2u, 0xF0u}, + {0xA3u, 0x21u}, + {0xA4u, 0x60u}, + {0xA6u, 0x90u}, + {0xA8u, 0x50u}, + {0xAAu, 0xA0u}, + {0xABu, 0x07u}, + {0xAFu, 0x08u}, + {0xB1u, 0xC0u}, + {0xB2u, 0xFFu}, + {0xB3u, 0x38u}, + {0xB5u, 0x07u}, + {0xBEu, 0x04u}, + {0xBFu, 0x01u}, + {0xD8u, 0x04u}, {0xD9u, 0x04u}, - {0xDBu, 0x0Bu}, - {0xDCu, 0x09u}, - {0xDDu, 0x90u}, + {0xDCu, 0x10u}, {0xDFu, 0x01u}, - {0x01u, 0x04u}, - {0x03u, 0x49u}, - {0x04u, 0x48u}, + {0x00u, 0x08u}, + {0x01u, 0x20u}, + {0x02u, 0x02u}, {0x05u, 0x10u}, - {0x09u, 0x88u}, - {0x0Au, 0x84u}, - {0x0Du, 0x08u}, - {0x0Fu, 0x04u}, - {0x11u, 0x50u}, - {0x12u, 0x40u}, - {0x13u, 0x05u}, - {0x18u, 0x08u}, - {0x19u, 0x42u}, - {0x1Au, 0x04u}, - {0x1Bu, 0x28u}, - {0x1Cu, 0x40u}, - {0x1Du, 0x10u}, - {0x21u, 0x80u}, - {0x27u, 0x10u}, - {0x29u, 0x02u}, - {0x2Bu, 0x28u}, - {0x2Cu, 0x10u}, - {0x2Eu, 0x80u}, - {0x2Fu, 0x80u}, - {0x31u, 0x08u}, - {0x32u, 0x10u}, - {0x33u, 0x41u}, - {0x37u, 0x14u}, - {0x38u, 0x82u}, - {0x39u, 0x54u}, - {0x59u, 0x88u}, - {0x5Au, 0x02u}, - {0x5Bu, 0x20u}, - {0x61u, 0x40u}, - {0x78u, 0x01u}, - {0x7Fu, 0x01u}, - {0x83u, 0x10u}, - {0x8Fu, 0x04u}, - {0x90u, 0x82u}, - {0x91u, 0x14u}, - {0x92u, 0xA2u}, - {0x93u, 0x06u}, - {0x98u, 0x11u}, - {0x99u, 0x88u}, - {0x9Au, 0xC0u}, - {0x9Bu, 0x45u}, - {0x9Du, 0x12u}, - {0xA1u, 0x08u}, - {0xA3u, 0x80u}, - {0xA7u, 0x2Cu}, - {0xB3u, 0x40u}, - {0xC0u, 0xEFu}, - {0xC2u, 0x6Fu}, - {0xC4u, 0x0Fu}, - {0xCAu, 0xD7u}, - {0xCCu, 0x6Fu}, - {0xCEu, 0x0Fu}, - {0xD6u, 0x0Fu}, - {0xD8u, 0x08u}, - {0xDEu, 0x11u}, - {0xE0u, 0x40u}, + {0x06u, 0x01u}, + {0x07u, 0x50u}, + {0x0Bu, 0x08u}, + {0x0Eu, 0x02u}, + {0x0Fu, 0x90u}, + {0x10u, 0x48u}, + {0x12u, 0x10u}, + {0x15u, 0x50u}, + {0x17u, 0x09u}, + {0x1Au, 0x10u}, + {0x1Du, 0x37u}, + {0x1Eu, 0x03u}, + {0x1Fu, 0x10u}, + {0x20u, 0x04u}, + {0x21u, 0x05u}, + {0x22u, 0x10u}, + {0x23u, 0x04u}, + {0x24u, 0x02u}, + {0x25u, 0x51u}, + {0x26u, 0x08u}, + {0x28u, 0x88u}, + {0x2Au, 0x80u}, + {0x2Eu, 0x20u}, + {0x2Fu, 0x10u}, + {0x30u, 0x40u}, + {0x32u, 0x14u}, + {0x36u, 0x28u}, + {0x38u, 0x20u}, + {0x39u, 0x88u}, + {0x3Au, 0x10u}, + {0x3Bu, 0x08u}, + {0x3Du, 0x80u}, + {0x3Eu, 0x08u}, + {0x3Fu, 0x10u}, + {0x45u, 0x10u}, + {0x46u, 0x08u}, + {0x66u, 0x08u}, + {0x6Cu, 0x80u}, + {0x6Du, 0x50u}, + {0x6Fu, 0x58u}, + {0x77u, 0x01u}, + {0x7Cu, 0x02u}, + {0x83u, 0x12u}, + {0x8Du, 0x01u}, + {0x90u, 0x20u}, + {0x91u, 0x80u}, + {0x92u, 0x08u}, + {0x93u, 0x10u}, + {0x94u, 0x02u}, + {0x95u, 0x42u}, + {0x96u, 0x11u}, + {0x97u, 0x24u}, + {0x98u, 0xCAu}, + {0x99u, 0x20u}, + {0x9Au, 0xA1u}, + {0x9Bu, 0x08u}, + {0x9Du, 0x15u}, + {0x9Fu, 0x51u}, + {0xA0u, 0x0Cu}, + {0xA2u, 0x22u}, + {0xA3u, 0x40u}, + {0xA4u, 0x80u}, + {0xA5u, 0x22u}, + {0xA6u, 0x01u}, + {0xA7u, 0x0Au}, + {0xB0u, 0x10u}, + {0xB1u, 0x01u}, + {0xB5u, 0x80u}, + {0xC0u, 0xF7u}, + {0xC2u, 0xB2u}, + {0xC4u, 0xFEu}, + {0xCAu, 0x6Du}, + {0xCCu, 0x6Eu}, + {0xCEu, 0x7Eu}, + {0xD8u, 0x40u}, + {0xDEu, 0x80u}, + {0xE2u, 0x10u}, + {0xEAu, 0x20u}, + {0xECu, 0x40u}, + {0x9Fu, 0x08u}, + {0xB2u, 0x40u}, {0xECu, 0x80u}, - {0xEEu, 0x0Au}, - {0xEEu, 0x0Au}, - {0x33u, 0x80u}, - {0x36u, 0x40u}, - {0x5Bu, 0x08u}, - {0x5Fu, 0x22u}, - {0x60u, 0x10u}, - {0x64u, 0x20u}, - {0x83u, 0x22u}, - {0xCCu, 0x30u}, - {0xD6u, 0xE0u}, + {0xB7u, 0x08u}, + {0xECu, 0x40u}, + {0x30u, 0x20u}, + {0x33u, 0x02u}, + {0x34u, 0x04u}, + {0x35u, 0x20u}, + {0x38u, 0x80u}, + {0x56u, 0x80u}, + {0x5Bu, 0x02u}, + {0x5Eu, 0x01u}, + {0x63u, 0x40u}, + {0x65u, 0x04u}, + {0x81u, 0x20u}, + {0x8Du, 0x04u}, + {0xCCu, 0xF0u}, + {0xCEu, 0x10u}, + {0xD4u, 0x40u}, + {0xD6u, 0xC0u}, {0xD8u, 0xC0u}, - {0xE2u, 0x80u}, {0xE6u, 0x80u}, - {0x52u, 0x80u}, - {0x57u, 0x10u}, - {0x5Bu, 0x20u}, + {0x51u, 0x02u}, + {0x56u, 0x20u}, {0x5Eu, 0x01u}, + {0x5Fu, 0x20u}, + {0x8Eu, 0x20u}, + {0x94u, 0x80u}, + {0x97u, 0x40u}, + {0x9Cu, 0x04u}, + {0x9Eu, 0x80u}, + {0x9Fu, 0x02u}, + {0xA4u, 0x20u}, + {0xAFu, 0x02u}, + {0xB2u, 0x01u}, + {0xD4u, 0xC0u}, + {0xD6u, 0xA0u}, + {0xEAu, 0x10u}, + {0x10u, 0x20u}, + {0x80u, 0x40u}, + {0x83u, 0x80u}, + {0x86u, 0x81u}, + {0x87u, 0x02u}, + {0x94u, 0x80u}, + {0x96u, 0x01u}, + {0x97u, 0x40u}, + {0x9Bu, 0x40u}, + {0x9Cu, 0x04u}, + {0x9Eu, 0x80u}, + {0x9Fu, 0x02u}, + {0xA4u, 0x20u}, + {0xA5u, 0x02u}, + {0xABu, 0x20u}, + {0xB7u, 0x40u}, + {0xC4u, 0x10u}, + {0xE2u, 0xD0u}, + {0xE4u, 0x20u}, + {0xE6u, 0x40u}, + {0xEAu, 0x80u}, {0x86u, 0x80u}, - {0x8Bu, 0x20u}, - {0x9Cu, 0x20u}, - {0x9Fu, 0x08u}, - {0xA6u, 0x40u}, + {0x97u, 0x40u}, + {0x9Bu, 0x40u}, + {0xA1u, 0x80u}, {0xA7u, 0x80u}, - {0xA8u, 0x10u}, - {0xD4u, 0xE0u}, - {0xD6u, 0x80u}, - {0xE6u, 0x10u}, - {0xEEu, 0x80u}, - {0x80u, 0x02u}, - {0x87u, 0x20u}, - {0x9Fu, 0x08u}, - {0xA6u, 0x40u}, - {0xA7u, 0x90u}, - {0xA8u, 0x20u}, - {0xAEu, 0x01u}, - {0xE0u, 0x40u}, - {0xE2u, 0x20u}, + {0xACu, 0x04u}, + {0xADu, 0x80u}, + {0xB5u, 0x02u}, + {0xE4u, 0x10u}, {0xEAu, 0x10u}, - {0xEEu, 0x20u}, - {0x8Fu, 0x10u}, - {0x9Fu, 0x28u}, - {0xA0u, 0x02u}, - {0xA6u, 0x40u}, - {0xA7u, 0x90u}, - {0xB7u, 0x08u}, - {0x0Bu, 0x08u}, - {0x0Cu, 0x02u}, - {0x12u, 0x10u}, - {0x53u, 0x10u}, - {0x55u, 0x08u}, - {0x5Au, 0x10u}, - {0x5Eu, 0x40u}, - {0x82u, 0x40u}, - {0x8Cu, 0x02u}, + {0xEEu, 0x40u}, + {0x0Bu, 0x02u}, + {0x0Fu, 0x40u}, + {0x10u, 0x10u}, + {0x52u, 0x80u}, + {0x54u, 0x40u}, + {0x58u, 0x20u}, + {0x5Eu, 0x20u}, + {0x80u, 0x02u}, + {0x83u, 0x01u}, + {0x87u, 0x40u}, + {0x88u, 0x20u}, {0xC2u, 0x06u}, {0xC4u, 0x08u}, {0xD4u, 0x07u}, {0xD6u, 0x04u}, - {0xE6u, 0x02u}, - {0x01u, 0x80u}, - {0x04u, 0x80u}, - {0x05u, 0x02u}, - {0x08u, 0x81u}, - {0x0Eu, 0x02u}, - {0x0Fu, 0x20u}, - {0x81u, 0x80u}, - {0x83u, 0x10u}, - {0x87u, 0x10u}, - {0x89u, 0x02u}, - {0x96u, 0x10u}, - {0x97u, 0x20u}, - {0xA5u, 0x08u}, - {0xAFu, 0x04u}, - {0xB2u, 0x10u}, + {0xE0u, 0x01u}, + {0x00u, 0x20u}, + {0x06u, 0x40u}, + {0x07u, 0x04u}, + {0x09u, 0x02u}, + {0x0Bu, 0x04u}, + {0x0Eu, 0x08u}, + {0x0Fu, 0x10u}, + {0x81u, 0x02u}, + {0x8Au, 0x40u}, + {0x8Bu, 0x04u}, + {0x8Eu, 0x04u}, + {0x9Cu, 0x02u}, + {0xA4u, 0x02u}, + {0xACu, 0x42u}, + {0xAEu, 0x10u}, + {0xB0u, 0x10u}, + {0xB6u, 0x80u}, {0xC0u, 0x07u}, {0xC2u, 0x0Fu}, - {0xE2u, 0x01u}, - {0xEEu, 0x04u}, - {0x82u, 0x10u}, - {0x8Cu, 0x40u}, - {0x90u, 0x80u}, - {0x96u, 0x10u}, - {0xA9u, 0x08u}, - {0xAAu, 0x01u}, - {0xACu, 0x01u}, - {0xB4u, 0x80u}, - {0xE6u, 0x08u}, - {0xEAu, 0x08u}, - {0x08u, 0x08u}, - {0x0Fu, 0x40u}, - {0xC2u, 0x0Cu}, + {0xE2u, 0x02u}, + {0xE6u, 0x05u}, + {0xE8u, 0x02u}, + {0xEAu, 0x04u}, + {0x81u, 0x40u}, + {0x9Cu, 0x02u}, + {0xA4u, 0x02u}, + {0xABu, 0x04u}, + {0xAFu, 0x10u}, + {0xB0u, 0x10u}, + {0xEEu, 0x01u}, + {0x08u, 0x02u}, + {0x0Au, 0x01u}, + {0x0Cu, 0x02u}, + {0x0Du, 0x40u}, + {0x95u, 0x80u}, + {0x96u, 0x01u}, + {0x9Cu, 0x02u}, + {0xA4u, 0x02u}, + {0xAEu, 0x01u}, + {0xC2u, 0x0Fu}, {0x26u, 0x80u}, - {0x27u, 0x20u}, - {0x83u, 0x08u}, - {0x8Eu, 0x80u}, - {0x9Eu, 0x40u}, - {0x9Fu, 0x28u}, - {0xA0u, 0x02u}, - {0xAEu, 0x40u}, - {0xAFu, 0x80u}, - {0xB2u, 0x40u}, - {0xC8u, 0xA0u}, - {0xE2u, 0x20u}, - {0xEEu, 0x50u}, - {0x06u, 0x40u}, - {0x50u, 0x02u}, - {0x57u, 0x80u}, - {0x8Fu, 0x80u}, - {0x9Eu, 0x40u}, - {0xA0u, 0x02u}, + {0x65u, 0x04u}, + {0x8Du, 0x04u}, + {0x9Bu, 0x40u}, + {0x9Fu, 0x10u}, + {0xA1u, 0x80u}, + {0xA6u, 0x80u}, + {0xA7u, 0x80u}, + {0xB3u, 0x40u}, + {0xB7u, 0x10u}, + {0xC8u, 0x20u}, + {0xD8u, 0x80u}, + {0x07u, 0x10u}, + {0x1Bu, 0x80u}, + {0x51u, 0x80u}, + {0x5Bu, 0x40u}, + {0x9Bu, 0x40u}, + {0x9Fu, 0x10u}, + {0xA1u, 0x80u}, + {0xA7u, 0x80u}, {0xC0u, 0x20u}, - {0xD4u, 0xC0u}, - {0xACu, 0x08u}, - {0xAFu, 0x40u}, + {0xC6u, 0x40u}, + {0xD4u, 0xA0u}, {0x00u, 0x02u}, {0x01u, 0x01u}, {0x08u, 0x02u}, {0x09u, 0x01u}, {0x0Au, 0x02u}, {0x0Bu, 0x01u}, + {0x0Eu, 0x02u}, {0x10u, 0x02u}, {0x11u, 0x01u}, {0x1Au, 0x02u}, {0x1Bu, 0x01u}, - {0x00u, 0x0Au}, + {0x00u, 0xABu}, + {0x01u, 0x02u}, }; @@ -1316,29 +1472,30 @@ void cyfitter_cfg(void) static const cfg_memset_t CYCODE cfg_memset_list [] = { /* address, size */ + {(void CYFAR *)(CYREG_TMR0_CFG0), 12u}, {(void CYFAR *)(CYREG_PRT1_DR), 16u}, - {(void CYFAR *)(CYDEV_UCFG_B0_P0_U0_BASE), 1664u}, - {(void CYFAR *)(CYDEV_UCFG_B0_P3_ROUTE_BASE), 2304u}, + {(void CYFAR *)(CYDEV_UCFG_B0_P0_U0_BASE), 1536u}, + {(void CYFAR *)(CYDEV_UCFG_B0_P3_U1_BASE), 2432u}, {(void CYFAR *)(CYDEV_UCFG_B1_P2_U0_BASE), 2048u}, {(void CYFAR *)(CYDEV_UCFG_DSI0_BASE), 2560u}, {(void CYFAR *)(CYDEV_UCFG_DSI12_BASE), 512u}, {(void CYFAR *)(CYREG_BCTL0_MDCLK_EN), 32u}, }; - /* UDB_1_2_0_CONFIG Address: CYDEV_UCFG_B0_P3_U1_BASE Size (bytes): 128 */ - static const uint8 CYCODE BS_UDB_1_2_0_CONFIG_VAL[] = { - 0x04u, 0x00u, 0x00u, 0x00u, 0x07u, 0xC2u, 0x18u, 0x04u, 0x01u, 0x80u, 0x00u, 0x46u, 0x01u, 0xC6u, 0x00u, 0x00u, - 0x00u, 0x46u, 0x00u, 0x80u, 0x22u, 0x01u, 0x08u, 0x5Eu, 0x08u, 0x39u, 0x21u, 0x06u, 0x01u, 0xC6u, 0x00u, 0x00u, - 0x01u, 0x00u, 0x00u, 0x00u, 0x01u, 0x77u, 0x00u, 0x08u, 0x40u, 0x42u, 0x00u, 0x00u, 0x10u, 0x04u, 0x00u, 0x20u, - 0x3Fu, 0x80u, 0x00u, 0x70u, 0x40u, 0x0Fu, 0x08u, 0x00u, 0x02u, 0x20u, 0x00u, 0x0Cu, 0x00u, 0x00u, 0x51u, 0x01u, - 0x63u, 0x02u, 0x40u, 0x00u, 0x05u, 0x0Eu, 0xFCu, 0xBDu, 0x3Du, 0xFFu, 0xFFu, 0xFFu, 0x22u, 0x00u, 0xF0u, 0x08u, - 0x04u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x02u, 0x24u, 0x04u, 0x0Bu, 0x0Bu, 0x0Bu, 0x90u, 0x99u, 0x00u, 0x01u, + /* UDB_1_2_1_CONFIG Address: CYDEV_UCFG_B0_P3_U0_BASE Size (bytes): 128 */ + static const uint8 CYCODE BS_UDB_1_2_1_CONFIG_VAL[] = { + 0x01u, 0x80u, 0x00u, 0x00u, 0x07u, 0x00u, 0x18u, 0x9Fu, 0x08u, 0x7Fu, 0x21u, 0x80u, 0x40u, 0x90u, 0x00u, 0x40u, + 0x40u, 0xC0u, 0x00u, 0x01u, 0x04u, 0x1Fu, 0x00u, 0x20u, 0x10u, 0x00u, 0x00u, 0x60u, 0x01u, 0xC0u, 0x00u, 0x02u, + 0x01u, 0x00u, 0x00u, 0x00u, 0x22u, 0x00u, 0x08u, 0xFFu, 0x01u, 0xC0u, 0x00u, 0x08u, 0x01u, 0xC0u, 0x00u, 0x04u, + 0x3Fu, 0x00u, 0x40u, 0x00u, 0x00u, 0x00u, 0x00u, 0xFFu, 0x0Au, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x01u, 0x40u, + 0x26u, 0x03u, 0x40u, 0x00u, 0x05u, 0x0Bu, 0xFDu, 0xCEu, 0x3Du, 0xFFu, 0xFFu, 0xFFu, 0x22u, 0x00u, 0xF0u, 0x08u, + 0x04u, 0x00u, 0x00u, 0x00u, 0x40u, 0x00u, 0x00u, 0x00u, 0x0Bu, 0x04u, 0x0Bu, 0x0Bu, 0x09u, 0x99u, 0x00u, 0x01u, 0x00u, 0x00u, 0xC0u, 0x00u, 0x40u, 0x01u, 0x10u, 0x11u, 0xC0u, 0x01u, 0x00u, 0x11u, 0x40u, 0x01u, 0x40u, 0x01u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u}; static const cfg_memcpy_t CYCODE cfg_memcpy_list [] = { /* dest, src, size */ - {(void CYFAR *)(CYDEV_UCFG_B0_P3_U1_BASE), BS_UDB_1_2_0_CONFIG_VAL, 128u}, + {(void CYFAR *)(CYDEV_UCFG_B0_P3_U0_BASE), BS_UDB_1_2_1_CONFIG_VAL, 128u}, }; uint8 CYDATA i; diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cyfittergnu.inc b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cyfittergnu.inc index da39a11..e2cddad 100755 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cyfittergnu.inc +++ b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cyfittergnu.inc @@ -3,6 +3,34 @@ .include "cydevicegnu.inc" .include "cydevicegnu_trm.inc" +/* Debug_Timer_Interrupt */ +.set Debug_Timer_Interrupt__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0 +.set Debug_Timer_Interrupt__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0 +.set Debug_Timer_Interrupt__INTC_MASK, 0x01 +.set Debug_Timer_Interrupt__INTC_NUMBER, 0 +.set Debug_Timer_Interrupt__INTC_PRIOR_NUM, 7 +.set Debug_Timer_Interrupt__INTC_PRIOR_REG, CYREG_NVIC_PRI_0 +.set Debug_Timer_Interrupt__INTC_SET_EN_REG, CYREG_NVIC_SETENA0 +.set Debug_Timer_Interrupt__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0 + +/* Debug_Timer_TimerHW */ +.set Debug_Timer_TimerHW__CAP0, CYREG_TMR0_CAP0 +.set Debug_Timer_TimerHW__CAP1, CYREG_TMR0_CAP1 +.set Debug_Timer_TimerHW__CFG0, CYREG_TMR0_CFG0 +.set Debug_Timer_TimerHW__CFG1, CYREG_TMR0_CFG1 +.set Debug_Timer_TimerHW__CFG2, CYREG_TMR0_CFG2 +.set Debug_Timer_TimerHW__CNT_CMP0, CYREG_TMR0_CNT_CMP0 +.set Debug_Timer_TimerHW__CNT_CMP1, CYREG_TMR0_CNT_CMP1 +.set Debug_Timer_TimerHW__PER0, CYREG_TMR0_PER0 +.set Debug_Timer_TimerHW__PER1, CYREG_TMR0_PER1 +.set Debug_Timer_TimerHW__PM_ACT_CFG, CYREG_PM_ACT_CFG3 +.set Debug_Timer_TimerHW__PM_ACT_MSK, 0x01 +.set Debug_Timer_TimerHW__PM_STBY_CFG, CYREG_PM_STBY_CFG3 +.set Debug_Timer_TimerHW__PM_STBY_MSK, 0x01 +.set Debug_Timer_TimerHW__RT0, CYREG_TMR0_RT0 +.set Debug_Timer_TimerHW__RT1, CYREG_TMR0_RT1 +.set Debug_Timer_TimerHW__SR0, CYREG_TMR0_SR0 + /* USBFS_bus_reset */ .set USBFS_bus_reset__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0 .set USBFS_bus_reset__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0 @@ -16,28 +44,64 @@ /* SCSI_CTL_PHASE */ .set SCSI_CTL_PHASE_Sync_ctrl_reg__0__MASK, 0x01 .set SCSI_CTL_PHASE_Sync_ctrl_reg__0__POS, 0 -.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG, CYREG_B0_UDB02_03_ACTL -.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG, CYREG_B0_UDB02_03_CTL -.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG, CYREG_B0_UDB02_03_CTL -.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG, CYREG_B0_UDB02_03_CTL -.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG, CYREG_B0_UDB02_03_CTL -.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_MASK_REG, CYREG_B0_UDB02_03_MSK -.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG, CYREG_B0_UDB02_03_MSK -.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG, CYREG_B0_UDB02_03_MSK -.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG, CYREG_B0_UDB02_03_MSK +.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG, CYREG_B0_UDB05_06_ACTL +.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG, CYREG_B0_UDB05_06_CTL +.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG, CYREG_B0_UDB05_06_CTL +.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG, CYREG_B0_UDB05_06_CTL +.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG, CYREG_B0_UDB05_06_CTL +.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_MASK_REG, CYREG_B0_UDB05_06_MSK +.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG, CYREG_B0_UDB05_06_MSK +.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG, CYREG_B0_UDB05_06_MSK +.set SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG, CYREG_B0_UDB05_06_MSK .set SCSI_CTL_PHASE_Sync_ctrl_reg__1__MASK, 0x02 .set SCSI_CTL_PHASE_Sync_ctrl_reg__1__POS, 1 .set SCSI_CTL_PHASE_Sync_ctrl_reg__2__MASK, 0x04 .set SCSI_CTL_PHASE_Sync_ctrl_reg__2__POS, 2 -.set SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_AUX_CTL_REG, CYREG_B0_UDB02_ACTL -.set SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_REG, CYREG_B0_UDB02_CTL -.set SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_ST_REG, CYREG_B0_UDB02_ST_CTL -.set SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_REG, CYREG_B0_UDB02_CTL -.set SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_ST_REG, CYREG_B0_UDB02_ST_CTL +.set SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_AUX_CTL_REG, CYREG_B0_UDB05_ACTL +.set SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_REG, CYREG_B0_UDB05_CTL +.set SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_ST_REG, CYREG_B0_UDB05_ST_CTL +.set SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_REG, CYREG_B0_UDB05_CTL +.set SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_ST_REG, CYREG_B0_UDB05_ST_CTL .set SCSI_CTL_PHASE_Sync_ctrl_reg__MASK, 0x07 -.set SCSI_CTL_PHASE_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG, CYREG_B0_UDB02_MSK_ACTL -.set SCSI_CTL_PHASE_Sync_ctrl_reg__PERIOD_REG, CYREG_B0_UDB02_MSK -.set SCSI_CTL_PHASE_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG, CYREG_B0_UDB02_MSK_ACTL +.set SCSI_CTL_PHASE_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG, CYREG_B0_UDB05_MSK_ACTL +.set SCSI_CTL_PHASE_Sync_ctrl_reg__PERIOD_REG, CYREG_B0_UDB05_MSK +.set SCSI_CTL_PHASE_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG, CYREG_B0_UDB05_MSK_ACTL + +/* SCSI_Out_Bits */ +.set SCSI_Out_Bits_Sync_ctrl_reg__0__MASK, 0x01 +.set SCSI_Out_Bits_Sync_ctrl_reg__0__POS, 0 +.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG, CYREG_B0_UDB00_01_ACTL +.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG, CYREG_B0_UDB00_01_CTL +.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG, CYREG_B0_UDB00_01_CTL +.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG, CYREG_B0_UDB00_01_CTL +.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG, CYREG_B0_UDB00_01_CTL +.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_MASK_REG, CYREG_B0_UDB00_01_MSK +.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG, CYREG_B0_UDB00_01_MSK +.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG, CYREG_B0_UDB00_01_MSK +.set SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG, CYREG_B0_UDB00_01_MSK +.set SCSI_Out_Bits_Sync_ctrl_reg__1__MASK, 0x02 +.set SCSI_Out_Bits_Sync_ctrl_reg__1__POS, 1 +.set SCSI_Out_Bits_Sync_ctrl_reg__2__MASK, 0x04 +.set SCSI_Out_Bits_Sync_ctrl_reg__2__POS, 2 +.set SCSI_Out_Bits_Sync_ctrl_reg__3__MASK, 0x08 +.set SCSI_Out_Bits_Sync_ctrl_reg__3__POS, 3 +.set SCSI_Out_Bits_Sync_ctrl_reg__4__MASK, 0x10 +.set SCSI_Out_Bits_Sync_ctrl_reg__4__POS, 4 +.set SCSI_Out_Bits_Sync_ctrl_reg__5__MASK, 0x20 +.set SCSI_Out_Bits_Sync_ctrl_reg__5__POS, 5 +.set SCSI_Out_Bits_Sync_ctrl_reg__6__MASK, 0x40 +.set SCSI_Out_Bits_Sync_ctrl_reg__6__POS, 6 +.set SCSI_Out_Bits_Sync_ctrl_reg__7__MASK, 0x80 +.set SCSI_Out_Bits_Sync_ctrl_reg__7__POS, 7 +.set SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_AUX_CTL_REG, CYREG_B0_UDB00_ACTL +.set SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_REG, CYREG_B0_UDB00_CTL +.set SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_ST_REG, CYREG_B0_UDB00_ST_CTL +.set SCSI_Out_Bits_Sync_ctrl_reg__COUNT_REG, CYREG_B0_UDB00_CTL +.set SCSI_Out_Bits_Sync_ctrl_reg__COUNT_ST_REG, CYREG_B0_UDB00_ST_CTL +.set SCSI_Out_Bits_Sync_ctrl_reg__MASK, 0xFF +.set SCSI_Out_Bits_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG, CYREG_B0_UDB00_MSK_ACTL +.set SCSI_Out_Bits_Sync_ctrl_reg__PERIOD_REG, CYREG_B0_UDB00_MSK +.set SCSI_Out_Bits_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG, CYREG_B0_UDB00_MSK_ACTL /* USBFS_arb_int */ .set USBFS_arb_int__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0 @@ -59,6 +123,28 @@ .set USBFS_sof_int__INTC_SET_EN_REG, CYREG_NVIC_SETENA0 .set USBFS_sof_int__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0 +/* SCSI_Out_Ctl */ +.set SCSI_Out_Ctl_Sync_ctrl_reg__0__MASK, 0x01 +.set SCSI_Out_Ctl_Sync_ctrl_reg__0__POS, 0 +.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG, CYREG_B0_UDB03_04_ACTL +.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG, CYREG_B0_UDB03_04_CTL +.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG, CYREG_B0_UDB03_04_CTL +.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG, CYREG_B0_UDB03_04_CTL +.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG, CYREG_B0_UDB03_04_CTL +.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG, CYREG_B0_UDB03_04_MSK +.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG, CYREG_B0_UDB03_04_MSK +.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG, CYREG_B0_UDB03_04_MSK +.set SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG, CYREG_B0_UDB03_04_MSK +.set SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG, CYREG_B0_UDB03_ACTL +.set SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_REG, CYREG_B0_UDB03_CTL +.set SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_ST_REG, CYREG_B0_UDB03_ST_CTL +.set SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_REG, CYREG_B0_UDB03_CTL +.set SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_ST_REG, CYREG_B0_UDB03_ST_CTL +.set SCSI_Out_Ctl_Sync_ctrl_reg__MASK, 0x01 +.set SCSI_Out_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG, CYREG_B0_UDB03_MSK_ACTL +.set SCSI_Out_Ctl_Sync_ctrl_reg__PERIOD_REG, CYREG_B0_UDB03_MSK +.set SCSI_Out_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG, CYREG_B0_UDB03_MSK_ACTL + /* SCSI_Out_DBx */ .set SCSI_Out_DBx__0__AG, CYREG_PRT6_AG .set SCSI_Out_DBx__0__AMUX, CYREG_PRT6_AMUX @@ -504,34 +590,34 @@ .set SCSI_RST_ISR__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0 /* SDCard_BSPIM */ -.set SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_AUX_CTL_REG, CYREG_B0_UDB07_08_ACTL -.set SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_REG, CYREG_B0_UDB07_08_ST -.set SDCard_BSPIM_BitCounter_ST__MASK_REG, CYREG_B0_UDB07_MSK -.set SDCard_BSPIM_BitCounter_ST__MASK_ST_AUX_CTL_REG, CYREG_B0_UDB07_MSK_ACTL -.set SDCard_BSPIM_BitCounter_ST__PER_ST_AUX_CTL_REG, CYREG_B0_UDB07_MSK_ACTL -.set SDCard_BSPIM_BitCounter_ST__STATUS_AUX_CTL_REG, CYREG_B0_UDB07_ACTL -.set SDCard_BSPIM_BitCounter_ST__STATUS_CNT_REG, CYREG_B0_UDB07_ST_CTL -.set SDCard_BSPIM_BitCounter_ST__STATUS_CONTROL_REG, CYREG_B0_UDB07_ST_CTL -.set SDCard_BSPIM_BitCounter_ST__STATUS_REG, CYREG_B0_UDB07_ST -.set SDCard_BSPIM_BitCounter__16BIT_CONTROL_AUX_CTL_REG, CYREG_B0_UDB07_08_ACTL -.set SDCard_BSPIM_BitCounter__16BIT_CONTROL_CONTROL_REG, CYREG_B0_UDB07_08_CTL -.set SDCard_BSPIM_BitCounter__16BIT_CONTROL_COUNT_REG, CYREG_B0_UDB07_08_CTL -.set SDCard_BSPIM_BitCounter__16BIT_COUNT_CONTROL_REG, CYREG_B0_UDB07_08_CTL -.set SDCard_BSPIM_BitCounter__16BIT_COUNT_COUNT_REG, CYREG_B0_UDB07_08_CTL -.set SDCard_BSPIM_BitCounter__16BIT_MASK_MASK_REG, CYREG_B0_UDB07_08_MSK -.set SDCard_BSPIM_BitCounter__16BIT_MASK_PERIOD_REG, CYREG_B0_UDB07_08_MSK -.set SDCard_BSPIM_BitCounter__16BIT_PERIOD_MASK_REG, CYREG_B0_UDB07_08_MSK -.set SDCard_BSPIM_BitCounter__16BIT_PERIOD_PERIOD_REG, CYREG_B0_UDB07_08_MSK -.set SDCard_BSPIM_BitCounter__CONTROL_AUX_CTL_REG, CYREG_B0_UDB07_ACTL -.set SDCard_BSPIM_BitCounter__CONTROL_REG, CYREG_B0_UDB07_CTL -.set SDCard_BSPIM_BitCounter__CONTROL_ST_REG, CYREG_B0_UDB07_ST_CTL -.set SDCard_BSPIM_BitCounter__COUNT_REG, CYREG_B0_UDB07_CTL -.set SDCard_BSPIM_BitCounter__COUNT_ST_REG, CYREG_B0_UDB07_ST_CTL -.set SDCard_BSPIM_BitCounter__MASK_CTL_AUX_CTL_REG, CYREG_B0_UDB07_MSK_ACTL -.set SDCard_BSPIM_BitCounter__PERIOD_REG, CYREG_B0_UDB07_MSK -.set SDCard_BSPIM_BitCounter__PER_CTL_AUX_CTL_REG, CYREG_B0_UDB07_MSK_ACTL -.set SDCard_BSPIM_RxStsReg__16BIT_STATUS_AUX_CTL_REG, CYREG_B0_UDB04_05_ACTL -.set SDCard_BSPIM_RxStsReg__16BIT_STATUS_REG, CYREG_B0_UDB04_05_ST +.set SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_AUX_CTL_REG, CYREG_B1_UDB06_07_ACTL +.set SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_REG, CYREG_B1_UDB06_07_ST +.set SDCard_BSPIM_BitCounter_ST__MASK_REG, CYREG_B1_UDB06_MSK +.set SDCard_BSPIM_BitCounter_ST__MASK_ST_AUX_CTL_REG, CYREG_B1_UDB06_MSK_ACTL +.set SDCard_BSPIM_BitCounter_ST__PER_ST_AUX_CTL_REG, CYREG_B1_UDB06_MSK_ACTL +.set SDCard_BSPIM_BitCounter_ST__STATUS_AUX_CTL_REG, CYREG_B1_UDB06_ACTL +.set SDCard_BSPIM_BitCounter_ST__STATUS_CNT_REG, CYREG_B1_UDB06_ST_CTL +.set SDCard_BSPIM_BitCounter_ST__STATUS_CONTROL_REG, CYREG_B1_UDB06_ST_CTL +.set SDCard_BSPIM_BitCounter_ST__STATUS_REG, CYREG_B1_UDB06_ST +.set SDCard_BSPIM_BitCounter__16BIT_CONTROL_AUX_CTL_REG, CYREG_B1_UDB06_07_ACTL +.set SDCard_BSPIM_BitCounter__16BIT_CONTROL_CONTROL_REG, CYREG_B1_UDB06_07_CTL +.set SDCard_BSPIM_BitCounter__16BIT_CONTROL_COUNT_REG, CYREG_B1_UDB06_07_CTL +.set SDCard_BSPIM_BitCounter__16BIT_COUNT_CONTROL_REG, CYREG_B1_UDB06_07_CTL +.set SDCard_BSPIM_BitCounter__16BIT_COUNT_COUNT_REG, CYREG_B1_UDB06_07_CTL +.set SDCard_BSPIM_BitCounter__16BIT_MASK_MASK_REG, CYREG_B1_UDB06_07_MSK +.set SDCard_BSPIM_BitCounter__16BIT_MASK_PERIOD_REG, CYREG_B1_UDB06_07_MSK +.set SDCard_BSPIM_BitCounter__16BIT_PERIOD_MASK_REG, CYREG_B1_UDB06_07_MSK +.set SDCard_BSPIM_BitCounter__16BIT_PERIOD_PERIOD_REG, CYREG_B1_UDB06_07_MSK +.set SDCard_BSPIM_BitCounter__CONTROL_AUX_CTL_REG, CYREG_B1_UDB06_ACTL +.set SDCard_BSPIM_BitCounter__CONTROL_REG, CYREG_B1_UDB06_CTL +.set SDCard_BSPIM_BitCounter__CONTROL_ST_REG, CYREG_B1_UDB06_ST_CTL +.set SDCard_BSPIM_BitCounter__COUNT_REG, CYREG_B1_UDB06_CTL +.set SDCard_BSPIM_BitCounter__COUNT_ST_REG, CYREG_B1_UDB06_ST_CTL +.set SDCard_BSPIM_BitCounter__MASK_CTL_AUX_CTL_REG, CYREG_B1_UDB06_MSK_ACTL +.set SDCard_BSPIM_BitCounter__PERIOD_REG, CYREG_B1_UDB06_MSK +.set SDCard_BSPIM_BitCounter__PER_CTL_AUX_CTL_REG, CYREG_B1_UDB06_MSK_ACTL +.set SDCard_BSPIM_RxStsReg__16BIT_STATUS_AUX_CTL_REG, CYREG_B0_UDB06_07_ACTL +.set SDCard_BSPIM_RxStsReg__16BIT_STATUS_REG, CYREG_B0_UDB06_07_ST .set SDCard_BSPIM_RxStsReg__4__MASK, 0x10 .set SDCard_BSPIM_RxStsReg__4__POS, 4 .set SDCard_BSPIM_RxStsReg__5__MASK, 0x20 @@ -539,13 +625,13 @@ .set SDCard_BSPIM_RxStsReg__6__MASK, 0x40 .set SDCard_BSPIM_RxStsReg__6__POS, 6 .set SDCard_BSPIM_RxStsReg__MASK, 0x70 -.set SDCard_BSPIM_RxStsReg__MASK_REG, CYREG_B0_UDB04_MSK -.set SDCard_BSPIM_RxStsReg__STATUS_AUX_CTL_REG, CYREG_B0_UDB04_ACTL -.set SDCard_BSPIM_RxStsReg__STATUS_REG, CYREG_B0_UDB04_ST +.set SDCard_BSPIM_RxStsReg__MASK_REG, CYREG_B0_UDB06_MSK +.set SDCard_BSPIM_RxStsReg__STATUS_AUX_CTL_REG, CYREG_B0_UDB06_ACTL +.set SDCard_BSPIM_RxStsReg__STATUS_REG, CYREG_B0_UDB06_ST .set SDCard_BSPIM_TxStsReg__0__MASK, 0x01 .set SDCard_BSPIM_TxStsReg__0__POS, 0 -.set SDCard_BSPIM_TxStsReg__16BIT_STATUS_AUX_CTL_REG, CYREG_B1_UDB07_08_ACTL -.set SDCard_BSPIM_TxStsReg__16BIT_STATUS_REG, CYREG_B1_UDB07_08_ST +.set SDCard_BSPIM_TxStsReg__16BIT_STATUS_AUX_CTL_REG, CYREG_B0_UDB04_05_ACTL +.set SDCard_BSPIM_TxStsReg__16BIT_STATUS_REG, CYREG_B0_UDB04_05_ST .set SDCard_BSPIM_TxStsReg__1__MASK, 0x02 .set SDCard_BSPIM_TxStsReg__1__POS, 1 .set SDCard_BSPIM_TxStsReg__2__MASK, 0x04 @@ -555,28 +641,26 @@ .set SDCard_BSPIM_TxStsReg__4__MASK, 0x10 .set SDCard_BSPIM_TxStsReg__4__POS, 4 .set SDCard_BSPIM_TxStsReg__MASK, 0x1F -.set SDCard_BSPIM_TxStsReg__MASK_REG, CYREG_B1_UDB07_MSK -.set SDCard_BSPIM_TxStsReg__STATUS_AUX_CTL_REG, CYREG_B1_UDB07_ACTL -.set SDCard_BSPIM_TxStsReg__STATUS_REG, CYREG_B1_UDB07_ST -.set SDCard_BSPIM_sR8_Dp_u0__16BIT_A0_REG, CYREG_B0_UDB07_08_A0 -.set SDCard_BSPIM_sR8_Dp_u0__16BIT_A1_REG, CYREG_B0_UDB07_08_A1 -.set SDCard_BSPIM_sR8_Dp_u0__16BIT_D0_REG, CYREG_B0_UDB07_08_D0 -.set SDCard_BSPIM_sR8_Dp_u0__16BIT_D1_REG, CYREG_B0_UDB07_08_D1 -.set SDCard_BSPIM_sR8_Dp_u0__16BIT_DP_AUX_CTL_REG, CYREG_B0_UDB07_08_ACTL -.set SDCard_BSPIM_sR8_Dp_u0__16BIT_F0_REG, CYREG_B0_UDB07_08_F0 -.set SDCard_BSPIM_sR8_Dp_u0__16BIT_F1_REG, CYREG_B0_UDB07_08_F1 -.set SDCard_BSPIM_sR8_Dp_u0__A0_A1_REG, CYREG_B0_UDB07_A0_A1 -.set SDCard_BSPIM_sR8_Dp_u0__A0_REG, CYREG_B0_UDB07_A0 -.set SDCard_BSPIM_sR8_Dp_u0__A1_REG, CYREG_B0_UDB07_A1 -.set SDCard_BSPIM_sR8_Dp_u0__D0_D1_REG, CYREG_B0_UDB07_D0_D1 -.set SDCard_BSPIM_sR8_Dp_u0__D0_REG, CYREG_B0_UDB07_D0 -.set SDCard_BSPIM_sR8_Dp_u0__D1_REG, CYREG_B0_UDB07_D1 -.set SDCard_BSPIM_sR8_Dp_u0__DP_AUX_CTL_REG, CYREG_B0_UDB07_ACTL -.set SDCard_BSPIM_sR8_Dp_u0__F0_F1_REG, CYREG_B0_UDB07_F0_F1 -.set SDCard_BSPIM_sR8_Dp_u0__F0_REG, CYREG_B0_UDB07_F0 -.set SDCard_BSPIM_sR8_Dp_u0__F1_REG, CYREG_B0_UDB07_F1 -.set SDCard_BSPIM_sR8_Dp_u0__MSK_DP_AUX_CTL_REG, CYREG_B0_UDB07_MSK_ACTL -.set SDCard_BSPIM_sR8_Dp_u0__PER_DP_AUX_CTL_REG, CYREG_B0_UDB07_MSK_ACTL +.set SDCard_BSPIM_TxStsReg__MASK_REG, CYREG_B0_UDB04_MSK +.set SDCard_BSPIM_TxStsReg__STATUS_AUX_CTL_REG, CYREG_B0_UDB04_ACTL +.set SDCard_BSPIM_TxStsReg__STATUS_REG, CYREG_B0_UDB04_ST +.set SDCard_BSPIM_sR8_Dp_u0__16BIT_A0_REG, CYREG_B0_UDB06_07_A0 +.set SDCard_BSPIM_sR8_Dp_u0__16BIT_A1_REG, CYREG_B0_UDB06_07_A1 +.set SDCard_BSPIM_sR8_Dp_u0__16BIT_D0_REG, CYREG_B0_UDB06_07_D0 +.set SDCard_BSPIM_sR8_Dp_u0__16BIT_D1_REG, CYREG_B0_UDB06_07_D1 +.set SDCard_BSPIM_sR8_Dp_u0__16BIT_DP_AUX_CTL_REG, CYREG_B0_UDB06_07_ACTL +.set SDCard_BSPIM_sR8_Dp_u0__16BIT_F0_REG, CYREG_B0_UDB06_07_F0 +.set SDCard_BSPIM_sR8_Dp_u0__16BIT_F1_REG, CYREG_B0_UDB06_07_F1 +.set SDCard_BSPIM_sR8_Dp_u0__A0_A1_REG, CYREG_B0_UDB06_A0_A1 +.set SDCard_BSPIM_sR8_Dp_u0__A0_REG, CYREG_B0_UDB06_A0 +.set SDCard_BSPIM_sR8_Dp_u0__A1_REG, CYREG_B0_UDB06_A1 +.set SDCard_BSPIM_sR8_Dp_u0__D0_D1_REG, CYREG_B0_UDB06_D0_D1 +.set SDCard_BSPIM_sR8_Dp_u0__D0_REG, CYREG_B0_UDB06_D0 +.set SDCard_BSPIM_sR8_Dp_u0__D1_REG, CYREG_B0_UDB06_D1 +.set SDCard_BSPIM_sR8_Dp_u0__DP_AUX_CTL_REG, CYREG_B0_UDB06_ACTL +.set SDCard_BSPIM_sR8_Dp_u0__F0_F1_REG, CYREG_B0_UDB06_F0_F1 +.set SDCard_BSPIM_sR8_Dp_u0__F0_REG, CYREG_B0_UDB06_F0 +.set SDCard_BSPIM_sR8_Dp_u0__F1_REG, CYREG_B0_UDB06_F1 /* USBFS_dp_int */ .set USBFS_dp_int__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0 @@ -1032,21 +1116,32 @@ .set SD_Data_Clk__PM_STBY_MSK, 0x01 /* SD_Init_Clk */ -.set SD_Init_Clk__CFG0, CYREG_CLKDIST_DCFG2_CFG0 -.set SD_Init_Clk__CFG1, CYREG_CLKDIST_DCFG2_CFG1 -.set SD_Init_Clk__CFG2, CYREG_CLKDIST_DCFG2_CFG2 +.set SD_Init_Clk__CFG0, CYREG_CLKDIST_DCFG3_CFG0 +.set SD_Init_Clk__CFG1, CYREG_CLKDIST_DCFG3_CFG1 +.set SD_Init_Clk__CFG2, CYREG_CLKDIST_DCFG3_CFG2 .set SD_Init_Clk__CFG2_SRC_SEL_MASK, 0x07 -.set SD_Init_Clk__INDEX, 0x02 +.set SD_Init_Clk__INDEX, 0x03 .set SD_Init_Clk__PM_ACT_CFG, CYREG_PM_ACT_CFG2 -.set SD_Init_Clk__PM_ACT_MSK, 0x04 +.set SD_Init_Clk__PM_ACT_MSK, 0x08 .set SD_Init_Clk__PM_STBY_CFG, CYREG_PM_STBY_CFG2 -.set SD_Init_Clk__PM_STBY_MSK, 0x04 +.set SD_Init_Clk__PM_STBY_MSK, 0x08 + +/* timer_clock */ +.set timer_clock__CFG0, CYREG_CLKDIST_DCFG2_CFG0 +.set timer_clock__CFG1, CYREG_CLKDIST_DCFG2_CFG1 +.set timer_clock__CFG2, CYREG_CLKDIST_DCFG2_CFG2 +.set timer_clock__CFG2_SRC_SEL_MASK, 0x07 +.set timer_clock__INDEX, 0x02 +.set timer_clock__PM_ACT_CFG, CYREG_PM_ACT_CFG2 +.set timer_clock__PM_ACT_MSK, 0x04 +.set timer_clock__PM_STBY_CFG, CYREG_PM_STBY_CFG2 +.set timer_clock__PM_STBY_MSK, 0x04 /* scsiTarget */ .set scsiTarget_StatusReg__0__MASK, 0x01 .set scsiTarget_StatusReg__0__POS, 0 -.set scsiTarget_StatusReg__16BIT_STATUS_AUX_CTL_REG, CYREG_B0_UDB12_13_ACTL -.set scsiTarget_StatusReg__16BIT_STATUS_REG, CYREG_B0_UDB12_13_ST +.set scsiTarget_StatusReg__16BIT_STATUS_AUX_CTL_REG, CYREG_B0_UDB13_14_ACTL +.set scsiTarget_StatusReg__16BIT_STATUS_REG, CYREG_B0_UDB13_14_ST .set scsiTarget_StatusReg__1__MASK, 0x02 .set scsiTarget_StatusReg__1__POS, 1 .set scsiTarget_StatusReg__2__MASK, 0x04 @@ -1054,76 +1149,76 @@ .set scsiTarget_StatusReg__3__MASK, 0x08 .set scsiTarget_StatusReg__3__POS, 3 .set scsiTarget_StatusReg__MASK, 0x0F -.set scsiTarget_StatusReg__MASK_REG, CYREG_B0_UDB12_MSK -.set scsiTarget_StatusReg__STATUS_AUX_CTL_REG, CYREG_B0_UDB12_ACTL -.set scsiTarget_StatusReg__STATUS_REG, CYREG_B0_UDB12_ST -.set scsiTarget_datapath_PI__16BIT_STATUS_AUX_CTL_REG, CYREG_B0_UDB03_04_ACTL -.set scsiTarget_datapath_PI__16BIT_STATUS_REG, CYREG_B0_UDB03_04_ST -.set scsiTarget_datapath_PI__MASK_REG, CYREG_B0_UDB03_MSK -.set scsiTarget_datapath_PI__MASK_ST_AUX_CTL_REG, CYREG_B0_UDB03_MSK_ACTL -.set scsiTarget_datapath_PI__PER_ST_AUX_CTL_REG, CYREG_B0_UDB03_MSK_ACTL -.set scsiTarget_datapath_PI__STATUS_AUX_CTL_REG, CYREG_B0_UDB03_ACTL -.set scsiTarget_datapath_PI__STATUS_CNT_REG, CYREG_B0_UDB03_ST_CTL -.set scsiTarget_datapath_PI__STATUS_CONTROL_REG, CYREG_B0_UDB03_ST_CTL -.set scsiTarget_datapath_PI__STATUS_REG, CYREG_B0_UDB03_ST -.set scsiTarget_datapath_PO__16BIT_CONTROL_AUX_CTL_REG, CYREG_B0_UDB03_04_ACTL -.set scsiTarget_datapath_PO__16BIT_CONTROL_CONTROL_REG, CYREG_B0_UDB03_04_CTL -.set scsiTarget_datapath_PO__16BIT_CONTROL_COUNT_REG, CYREG_B0_UDB03_04_CTL -.set scsiTarget_datapath_PO__16BIT_COUNT_CONTROL_REG, CYREG_B0_UDB03_04_CTL -.set scsiTarget_datapath_PO__16BIT_COUNT_COUNT_REG, CYREG_B0_UDB03_04_CTL -.set scsiTarget_datapath_PO__16BIT_MASK_MASK_REG, CYREG_B0_UDB03_04_MSK -.set scsiTarget_datapath_PO__16BIT_MASK_PERIOD_REG, CYREG_B0_UDB03_04_MSK -.set scsiTarget_datapath_PO__16BIT_PERIOD_MASK_REG, CYREG_B0_UDB03_04_MSK -.set scsiTarget_datapath_PO__16BIT_PERIOD_PERIOD_REG, CYREG_B0_UDB03_04_MSK -.set scsiTarget_datapath_PO__CONTROL_AUX_CTL_REG, CYREG_B0_UDB03_ACTL -.set scsiTarget_datapath_PO__CONTROL_REG, CYREG_B0_UDB03_CTL -.set scsiTarget_datapath_PO__CONTROL_ST_REG, CYREG_B0_UDB03_ST_CTL -.set scsiTarget_datapath_PO__COUNT_REG, CYREG_B0_UDB03_CTL -.set scsiTarget_datapath_PO__COUNT_ST_REG, CYREG_B0_UDB03_ST_CTL -.set scsiTarget_datapath_PO__MASK_CTL_AUX_CTL_REG, CYREG_B0_UDB03_MSK_ACTL -.set scsiTarget_datapath_PO__PERIOD_REG, CYREG_B0_UDB03_MSK -.set scsiTarget_datapath_PO__PER_CTL_AUX_CTL_REG, CYREG_B0_UDB03_MSK_ACTL -.set scsiTarget_datapath__16BIT_A0_REG, CYREG_B0_UDB03_04_A0 -.set scsiTarget_datapath__16BIT_A1_REG, CYREG_B0_UDB03_04_A1 -.set scsiTarget_datapath__16BIT_D0_REG, CYREG_B0_UDB03_04_D0 -.set scsiTarget_datapath__16BIT_D1_REG, CYREG_B0_UDB03_04_D1 -.set scsiTarget_datapath__16BIT_DP_AUX_CTL_REG, CYREG_B0_UDB03_04_ACTL -.set scsiTarget_datapath__16BIT_F0_REG, CYREG_B0_UDB03_04_F0 -.set scsiTarget_datapath__16BIT_F1_REG, CYREG_B0_UDB03_04_F1 -.set scsiTarget_datapath__A0_A1_REG, CYREG_B0_UDB03_A0_A1 -.set scsiTarget_datapath__A0_REG, CYREG_B0_UDB03_A0 -.set scsiTarget_datapath__A1_REG, CYREG_B0_UDB03_A1 -.set scsiTarget_datapath__D0_D1_REG, CYREG_B0_UDB03_D0_D1 -.set scsiTarget_datapath__D0_REG, CYREG_B0_UDB03_D0 -.set scsiTarget_datapath__D1_REG, CYREG_B0_UDB03_D1 -.set scsiTarget_datapath__DP_AUX_CTL_REG, CYREG_B0_UDB03_ACTL -.set scsiTarget_datapath__F0_F1_REG, CYREG_B0_UDB03_F0_F1 -.set scsiTarget_datapath__F0_REG, CYREG_B0_UDB03_F0 -.set scsiTarget_datapath__F1_REG, CYREG_B0_UDB03_F1 -.set scsiTarget_datapath__MSK_DP_AUX_CTL_REG, CYREG_B0_UDB03_MSK_ACTL -.set scsiTarget_datapath__PER_DP_AUX_CTL_REG, CYREG_B0_UDB03_MSK_ACTL +.set scsiTarget_StatusReg__MASK_REG, CYREG_B0_UDB13_MSK +.set scsiTarget_StatusReg__STATUS_AUX_CTL_REG, CYREG_B0_UDB13_ACTL +.set scsiTarget_StatusReg__STATUS_REG, CYREG_B0_UDB13_ST +.set scsiTarget_datapath_PI__16BIT_STATUS_AUX_CTL_REG, CYREG_B0_UDB12_13_ACTL +.set scsiTarget_datapath_PI__16BIT_STATUS_REG, CYREG_B0_UDB12_13_ST +.set scsiTarget_datapath_PI__MASK_REG, CYREG_B0_UDB12_MSK +.set scsiTarget_datapath_PI__MASK_ST_AUX_CTL_REG, CYREG_B0_UDB12_MSK_ACTL +.set scsiTarget_datapath_PI__PER_ST_AUX_CTL_REG, CYREG_B0_UDB12_MSK_ACTL +.set scsiTarget_datapath_PI__STATUS_AUX_CTL_REG, CYREG_B0_UDB12_ACTL +.set scsiTarget_datapath_PI__STATUS_CNT_REG, CYREG_B0_UDB12_ST_CTL +.set scsiTarget_datapath_PI__STATUS_CONTROL_REG, CYREG_B0_UDB12_ST_CTL +.set scsiTarget_datapath_PI__STATUS_REG, CYREG_B0_UDB12_ST +.set scsiTarget_datapath_PO__16BIT_CONTROL_AUX_CTL_REG, CYREG_B0_UDB12_13_ACTL +.set scsiTarget_datapath_PO__16BIT_CONTROL_CONTROL_REG, CYREG_B0_UDB12_13_CTL +.set scsiTarget_datapath_PO__16BIT_CONTROL_COUNT_REG, CYREG_B0_UDB12_13_CTL +.set scsiTarget_datapath_PO__16BIT_COUNT_CONTROL_REG, CYREG_B0_UDB12_13_CTL +.set scsiTarget_datapath_PO__16BIT_COUNT_COUNT_REG, CYREG_B0_UDB12_13_CTL +.set scsiTarget_datapath_PO__16BIT_MASK_MASK_REG, CYREG_B0_UDB12_13_MSK +.set scsiTarget_datapath_PO__16BIT_MASK_PERIOD_REG, CYREG_B0_UDB12_13_MSK +.set scsiTarget_datapath_PO__16BIT_PERIOD_MASK_REG, CYREG_B0_UDB12_13_MSK +.set scsiTarget_datapath_PO__16BIT_PERIOD_PERIOD_REG, CYREG_B0_UDB12_13_MSK +.set scsiTarget_datapath_PO__CONTROL_AUX_CTL_REG, CYREG_B0_UDB12_ACTL +.set scsiTarget_datapath_PO__CONTROL_REG, CYREG_B0_UDB12_CTL +.set scsiTarget_datapath_PO__CONTROL_ST_REG, CYREG_B0_UDB12_ST_CTL +.set scsiTarget_datapath_PO__COUNT_REG, CYREG_B0_UDB12_CTL +.set scsiTarget_datapath_PO__COUNT_ST_REG, CYREG_B0_UDB12_ST_CTL +.set scsiTarget_datapath_PO__MASK_CTL_AUX_CTL_REG, CYREG_B0_UDB12_MSK_ACTL +.set scsiTarget_datapath_PO__PERIOD_REG, CYREG_B0_UDB12_MSK +.set scsiTarget_datapath_PO__PER_CTL_AUX_CTL_REG, CYREG_B0_UDB12_MSK_ACTL +.set scsiTarget_datapath__16BIT_A0_REG, CYREG_B0_UDB12_13_A0 +.set scsiTarget_datapath__16BIT_A1_REG, CYREG_B0_UDB12_13_A1 +.set scsiTarget_datapath__16BIT_D0_REG, CYREG_B0_UDB12_13_D0 +.set scsiTarget_datapath__16BIT_D1_REG, CYREG_B0_UDB12_13_D1 +.set scsiTarget_datapath__16BIT_DP_AUX_CTL_REG, CYREG_B0_UDB12_13_ACTL +.set scsiTarget_datapath__16BIT_F0_REG, CYREG_B0_UDB12_13_F0 +.set scsiTarget_datapath__16BIT_F1_REG, CYREG_B0_UDB12_13_F1 +.set scsiTarget_datapath__A0_A1_REG, CYREG_B0_UDB12_A0_A1 +.set scsiTarget_datapath__A0_REG, CYREG_B0_UDB12_A0 +.set scsiTarget_datapath__A1_REG, CYREG_B0_UDB12_A1 +.set scsiTarget_datapath__D0_D1_REG, CYREG_B0_UDB12_D0_D1 +.set scsiTarget_datapath__D0_REG, CYREG_B0_UDB12_D0 +.set scsiTarget_datapath__D1_REG, CYREG_B0_UDB12_D1 +.set scsiTarget_datapath__DP_AUX_CTL_REG, CYREG_B0_UDB12_ACTL +.set scsiTarget_datapath__F0_F1_REG, CYREG_B0_UDB12_F0_F1 +.set scsiTarget_datapath__F0_REG, CYREG_B0_UDB12_F0 +.set scsiTarget_datapath__F1_REG, CYREG_B0_UDB12_F1 +.set scsiTarget_datapath__MSK_DP_AUX_CTL_REG, CYREG_B0_UDB12_MSK_ACTL +.set scsiTarget_datapath__PER_DP_AUX_CTL_REG, CYREG_B0_UDB12_MSK_ACTL /* SD_Clk_Ctl */ .set SD_Clk_Ctl_Sync_ctrl_reg__0__MASK, 0x01 .set SD_Clk_Ctl_Sync_ctrl_reg__0__POS, 0 -.set SD_Clk_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG, CYREG_B0_UDB01_02_ACTL -.set SD_Clk_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG, CYREG_B0_UDB01_02_CTL -.set SD_Clk_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG, CYREG_B0_UDB01_02_CTL -.set SD_Clk_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG, CYREG_B0_UDB01_02_CTL -.set SD_Clk_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG, CYREG_B0_UDB01_02_CTL -.set SD_Clk_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG, CYREG_B0_UDB01_02_MSK -.set SD_Clk_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG, CYREG_B0_UDB01_02_MSK -.set SD_Clk_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG, CYREG_B0_UDB01_02_MSK -.set SD_Clk_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG, CYREG_B0_UDB01_02_MSK -.set SD_Clk_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG, CYREG_B0_UDB01_ACTL -.set SD_Clk_Ctl_Sync_ctrl_reg__CONTROL_REG, CYREG_B0_UDB01_CTL -.set SD_Clk_Ctl_Sync_ctrl_reg__CONTROL_ST_REG, CYREG_B0_UDB01_ST_CTL -.set SD_Clk_Ctl_Sync_ctrl_reg__COUNT_REG, CYREG_B0_UDB01_CTL -.set SD_Clk_Ctl_Sync_ctrl_reg__COUNT_ST_REG, CYREG_B0_UDB01_ST_CTL +.set SD_Clk_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG, CYREG_B0_UDB02_03_ACTL +.set SD_Clk_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG, CYREG_B0_UDB02_03_CTL +.set SD_Clk_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG, CYREG_B0_UDB02_03_CTL +.set SD_Clk_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG, CYREG_B0_UDB02_03_CTL +.set SD_Clk_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG, CYREG_B0_UDB02_03_CTL +.set SD_Clk_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG, CYREG_B0_UDB02_03_MSK +.set SD_Clk_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG, CYREG_B0_UDB02_03_MSK +.set SD_Clk_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG, CYREG_B0_UDB02_03_MSK +.set SD_Clk_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG, CYREG_B0_UDB02_03_MSK +.set SD_Clk_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG, CYREG_B0_UDB02_ACTL +.set SD_Clk_Ctl_Sync_ctrl_reg__CONTROL_REG, CYREG_B0_UDB02_CTL +.set SD_Clk_Ctl_Sync_ctrl_reg__CONTROL_ST_REG, CYREG_B0_UDB02_ST_CTL +.set SD_Clk_Ctl_Sync_ctrl_reg__COUNT_REG, CYREG_B0_UDB02_CTL +.set SD_Clk_Ctl_Sync_ctrl_reg__COUNT_ST_REG, CYREG_B0_UDB02_ST_CTL .set SD_Clk_Ctl_Sync_ctrl_reg__MASK, 0x01 -.set SD_Clk_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG, CYREG_B0_UDB01_MSK_ACTL -.set SD_Clk_Ctl_Sync_ctrl_reg__PERIOD_REG, CYREG_B0_UDB01_MSK -.set SD_Clk_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG, CYREG_B0_UDB01_MSK_ACTL +.set SD_Clk_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG, CYREG_B0_UDB02_MSK_ACTL +.set SD_Clk_Ctl_Sync_ctrl_reg__PERIOD_REG, CYREG_B0_UDB02_MSK +.set SD_Clk_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG, CYREG_B0_UDB02_MSK_ACTL /* USBFS_ep_0 */ .set USBFS_ep_0__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0 @@ -1138,23 +1233,43 @@ /* USBFS_ep_1 */ .set USBFS_ep_1__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0 .set USBFS_ep_1__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0 -.set USBFS_ep_1__INTC_MASK, 0x01 -.set USBFS_ep_1__INTC_NUMBER, 0 +.set USBFS_ep_1__INTC_MASK, 0x02 +.set USBFS_ep_1__INTC_NUMBER, 1 .set USBFS_ep_1__INTC_PRIOR_NUM, 7 -.set USBFS_ep_1__INTC_PRIOR_REG, CYREG_NVIC_PRI_0 +.set USBFS_ep_1__INTC_PRIOR_REG, CYREG_NVIC_PRI_1 .set USBFS_ep_1__INTC_SET_EN_REG, CYREG_NVIC_SETENA0 .set USBFS_ep_1__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0 /* USBFS_ep_2 */ .set USBFS_ep_2__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0 .set USBFS_ep_2__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0 -.set USBFS_ep_2__INTC_MASK, 0x02 -.set USBFS_ep_2__INTC_NUMBER, 1 +.set USBFS_ep_2__INTC_MASK, 0x04 +.set USBFS_ep_2__INTC_NUMBER, 2 .set USBFS_ep_2__INTC_PRIOR_NUM, 7 -.set USBFS_ep_2__INTC_PRIOR_REG, CYREG_NVIC_PRI_1 +.set USBFS_ep_2__INTC_PRIOR_REG, CYREG_NVIC_PRI_2 .set USBFS_ep_2__INTC_SET_EN_REG, CYREG_NVIC_SETENA0 .set USBFS_ep_2__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0 +/* USBFS_ep_3 */ +.set USBFS_ep_3__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0 +.set USBFS_ep_3__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0 +.set USBFS_ep_3__INTC_MASK, 0x08 +.set USBFS_ep_3__INTC_NUMBER, 3 +.set USBFS_ep_3__INTC_PRIOR_NUM, 7 +.set USBFS_ep_3__INTC_PRIOR_REG, CYREG_NVIC_PRI_3 +.set USBFS_ep_3__INTC_SET_EN_REG, CYREG_NVIC_SETENA0 +.set USBFS_ep_3__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0 + +/* USBFS_ep_4 */ +.set USBFS_ep_4__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0 +.set USBFS_ep_4__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0 +.set USBFS_ep_4__INTC_MASK, 0x10 +.set USBFS_ep_4__INTC_NUMBER, 4 +.set USBFS_ep_4__INTC_PRIOR_NUM, 7 +.set USBFS_ep_4__INTC_PRIOR_REG, CYREG_NVIC_PRI_4 +.set USBFS_ep_4__INTC_SET_EN_REG, CYREG_NVIC_SETENA0 +.set USBFS_ep_4__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0 + /* USBFS_USB */ .set USBFS_USB__ARB_CFG, CYREG_USB_ARB_CFG .set USBFS_USB__ARB_EP1_CFG, CYREG_USB_ARB_EP1_CFG @@ -2735,9 +2850,9 @@ .set CYDEV_DEBUG_ENABLE_REGISTER, CYREG_MLOGIC_DEBUG .set CYDEV_DMA_CHANNELS_AVAILABLE, 24 .set CYDEV_ECC_ENABLE, 0 -.set CYDEV_HEAP_SIZE, 0x0256 +.set CYDEV_HEAP_SIZE, 0x0400 .set CYDEV_INSTRUCT_CACHE_ENABLED, 1 -.set CYDEV_INTR_RISING, 0x00000000 +.set CYDEV_INTR_RISING, 0x00000001 .set CYDEV_PROJ_TYPE, 2 .set CYDEV_PROJ_TYPE_BOOTLOADER, 1 .set CYDEV_PROJ_TYPE_LOADABLE, 2 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cyfitteriar.inc b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cyfitteriar.inc index cb21614..93e3430 100755 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cyfitteriar.inc +++ b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cyfitteriar.inc @@ -3,6 +3,34 @@ INCLUDE cydeviceiar.inc INCLUDE cydeviceiar_trm.inc +/* Debug_Timer_Interrupt */ +Debug_Timer_Interrupt__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0 +Debug_Timer_Interrupt__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0 +Debug_Timer_Interrupt__INTC_MASK EQU 0x01 +Debug_Timer_Interrupt__INTC_NUMBER EQU 0 +Debug_Timer_Interrupt__INTC_PRIOR_NUM EQU 7 +Debug_Timer_Interrupt__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_0 +Debug_Timer_Interrupt__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0 +Debug_Timer_Interrupt__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0 + +/* Debug_Timer_TimerHW */ +Debug_Timer_TimerHW__CAP0 EQU CYREG_TMR0_CAP0 +Debug_Timer_TimerHW__CAP1 EQU CYREG_TMR0_CAP1 +Debug_Timer_TimerHW__CFG0 EQU CYREG_TMR0_CFG0 +Debug_Timer_TimerHW__CFG1 EQU CYREG_TMR0_CFG1 +Debug_Timer_TimerHW__CFG2 EQU CYREG_TMR0_CFG2 +Debug_Timer_TimerHW__CNT_CMP0 EQU CYREG_TMR0_CNT_CMP0 +Debug_Timer_TimerHW__CNT_CMP1 EQU CYREG_TMR0_CNT_CMP1 +Debug_Timer_TimerHW__PER0 EQU CYREG_TMR0_PER0 +Debug_Timer_TimerHW__PER1 EQU CYREG_TMR0_PER1 +Debug_Timer_TimerHW__PM_ACT_CFG EQU CYREG_PM_ACT_CFG3 +Debug_Timer_TimerHW__PM_ACT_MSK EQU 0x01 +Debug_Timer_TimerHW__PM_STBY_CFG EQU CYREG_PM_STBY_CFG3 +Debug_Timer_TimerHW__PM_STBY_MSK EQU 0x01 +Debug_Timer_TimerHW__RT0 EQU CYREG_TMR0_RT0 +Debug_Timer_TimerHW__RT1 EQU CYREG_TMR0_RT1 +Debug_Timer_TimerHW__SR0 EQU CYREG_TMR0_SR0 + /* USBFS_bus_reset */ USBFS_bus_reset__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0 USBFS_bus_reset__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0 @@ -16,28 +44,64 @@ USBFS_bus_reset__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0 /* SCSI_CTL_PHASE */ SCSI_CTL_PHASE_Sync_ctrl_reg__0__MASK EQU 0x01 SCSI_CTL_PHASE_Sync_ctrl_reg__0__POS EQU 0 -SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB02_03_ACTL -SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB02_03_CTL -SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB02_03_CTL -SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB02_03_CTL -SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB02_03_CTL -SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB02_03_MSK -SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB02_03_MSK -SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB02_03_MSK -SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB02_03_MSK +SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB05_06_ACTL +SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB05_06_CTL +SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB05_06_CTL +SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB05_06_CTL +SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB05_06_CTL +SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB05_06_MSK +SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB05_06_MSK +SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB05_06_MSK +SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB05_06_MSK SCSI_CTL_PHASE_Sync_ctrl_reg__1__MASK EQU 0x02 SCSI_CTL_PHASE_Sync_ctrl_reg__1__POS EQU 1 SCSI_CTL_PHASE_Sync_ctrl_reg__2__MASK EQU 0x04 SCSI_CTL_PHASE_Sync_ctrl_reg__2__POS EQU 2 -SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB02_ACTL -SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB02_CTL -SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB02_ST_CTL -SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB02_CTL -SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB02_ST_CTL +SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB05_ACTL +SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB05_CTL +SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB05_ST_CTL +SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB05_CTL +SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB05_ST_CTL SCSI_CTL_PHASE_Sync_ctrl_reg__MASK EQU 0x07 -SCSI_CTL_PHASE_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB02_MSK_ACTL -SCSI_CTL_PHASE_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB02_MSK -SCSI_CTL_PHASE_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB02_MSK_ACTL +SCSI_CTL_PHASE_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB05_MSK_ACTL +SCSI_CTL_PHASE_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB05_MSK +SCSI_CTL_PHASE_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB05_MSK_ACTL + +/* SCSI_Out_Bits */ +SCSI_Out_Bits_Sync_ctrl_reg__0__MASK EQU 0x01 +SCSI_Out_Bits_Sync_ctrl_reg__0__POS EQU 0 +SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB00_01_ACTL +SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB00_01_CTL +SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB00_01_CTL +SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB00_01_CTL +SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB00_01_CTL +SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB00_01_MSK +SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB00_01_MSK +SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB00_01_MSK +SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB00_01_MSK +SCSI_Out_Bits_Sync_ctrl_reg__1__MASK EQU 0x02 +SCSI_Out_Bits_Sync_ctrl_reg__1__POS EQU 1 +SCSI_Out_Bits_Sync_ctrl_reg__2__MASK EQU 0x04 +SCSI_Out_Bits_Sync_ctrl_reg__2__POS EQU 2 +SCSI_Out_Bits_Sync_ctrl_reg__3__MASK EQU 0x08 +SCSI_Out_Bits_Sync_ctrl_reg__3__POS EQU 3 +SCSI_Out_Bits_Sync_ctrl_reg__4__MASK EQU 0x10 +SCSI_Out_Bits_Sync_ctrl_reg__4__POS EQU 4 +SCSI_Out_Bits_Sync_ctrl_reg__5__MASK EQU 0x20 +SCSI_Out_Bits_Sync_ctrl_reg__5__POS EQU 5 +SCSI_Out_Bits_Sync_ctrl_reg__6__MASK EQU 0x40 +SCSI_Out_Bits_Sync_ctrl_reg__6__POS EQU 6 +SCSI_Out_Bits_Sync_ctrl_reg__7__MASK EQU 0x80 +SCSI_Out_Bits_Sync_ctrl_reg__7__POS EQU 7 +SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB00_ACTL +SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB00_CTL +SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB00_ST_CTL +SCSI_Out_Bits_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB00_CTL +SCSI_Out_Bits_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB00_ST_CTL +SCSI_Out_Bits_Sync_ctrl_reg__MASK EQU 0xFF +SCSI_Out_Bits_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB00_MSK_ACTL +SCSI_Out_Bits_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB00_MSK +SCSI_Out_Bits_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB00_MSK_ACTL /* USBFS_arb_int */ USBFS_arb_int__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0 @@ -59,6 +123,28 @@ USBFS_sof_int__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_21 USBFS_sof_int__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0 USBFS_sof_int__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0 +/* SCSI_Out_Ctl */ +SCSI_Out_Ctl_Sync_ctrl_reg__0__MASK EQU 0x01 +SCSI_Out_Ctl_Sync_ctrl_reg__0__POS EQU 0 +SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB03_04_ACTL +SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB03_04_CTL +SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB03_04_CTL +SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB03_04_CTL +SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB03_04_CTL +SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB03_04_MSK +SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB03_04_MSK +SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB03_04_MSK +SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB03_04_MSK +SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB03_ACTL +SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB03_CTL +SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB03_ST_CTL +SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB03_CTL +SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB03_ST_CTL +SCSI_Out_Ctl_Sync_ctrl_reg__MASK EQU 0x01 +SCSI_Out_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB03_MSK_ACTL +SCSI_Out_Ctl_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB03_MSK +SCSI_Out_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB03_MSK_ACTL + /* SCSI_Out_DBx */ SCSI_Out_DBx__0__AG EQU CYREG_PRT6_AG SCSI_Out_DBx__0__AMUX EQU CYREG_PRT6_AMUX @@ -504,34 +590,34 @@ SCSI_RST_ISR__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0 SCSI_RST_ISR__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0 /* SDCard_BSPIM */ -SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB07_08_ACTL -SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_REG EQU CYREG_B0_UDB07_08_ST -SDCard_BSPIM_BitCounter_ST__MASK_REG EQU CYREG_B0_UDB07_MSK -SDCard_BSPIM_BitCounter_ST__MASK_ST_AUX_CTL_REG EQU CYREG_B0_UDB07_MSK_ACTL -SDCard_BSPIM_BitCounter_ST__PER_ST_AUX_CTL_REG EQU CYREG_B0_UDB07_MSK_ACTL -SDCard_BSPIM_BitCounter_ST__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB07_ACTL -SDCard_BSPIM_BitCounter_ST__STATUS_CNT_REG EQU CYREG_B0_UDB07_ST_CTL -SDCard_BSPIM_BitCounter_ST__STATUS_CONTROL_REG EQU CYREG_B0_UDB07_ST_CTL -SDCard_BSPIM_BitCounter_ST__STATUS_REG EQU CYREG_B0_UDB07_ST -SDCard_BSPIM_BitCounter__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB07_08_ACTL -SDCard_BSPIM_BitCounter__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB07_08_CTL -SDCard_BSPIM_BitCounter__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB07_08_CTL -SDCard_BSPIM_BitCounter__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB07_08_CTL -SDCard_BSPIM_BitCounter__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB07_08_CTL -SDCard_BSPIM_BitCounter__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB07_08_MSK -SDCard_BSPIM_BitCounter__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB07_08_MSK -SDCard_BSPIM_BitCounter__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB07_08_MSK -SDCard_BSPIM_BitCounter__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB07_08_MSK -SDCard_BSPIM_BitCounter__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB07_ACTL -SDCard_BSPIM_BitCounter__CONTROL_REG EQU CYREG_B0_UDB07_CTL -SDCard_BSPIM_BitCounter__CONTROL_ST_REG EQU CYREG_B0_UDB07_ST_CTL -SDCard_BSPIM_BitCounter__COUNT_REG EQU CYREG_B0_UDB07_CTL -SDCard_BSPIM_BitCounter__COUNT_ST_REG EQU CYREG_B0_UDB07_ST_CTL -SDCard_BSPIM_BitCounter__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB07_MSK_ACTL -SDCard_BSPIM_BitCounter__PERIOD_REG EQU CYREG_B0_UDB07_MSK -SDCard_BSPIM_BitCounter__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB07_MSK_ACTL -SDCard_BSPIM_RxStsReg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB04_05_ACTL -SDCard_BSPIM_RxStsReg__16BIT_STATUS_REG EQU CYREG_B0_UDB04_05_ST +SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B1_UDB06_07_ACTL +SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_REG EQU CYREG_B1_UDB06_07_ST +SDCard_BSPIM_BitCounter_ST__MASK_REG EQU CYREG_B1_UDB06_MSK +SDCard_BSPIM_BitCounter_ST__MASK_ST_AUX_CTL_REG EQU CYREG_B1_UDB06_MSK_ACTL +SDCard_BSPIM_BitCounter_ST__PER_ST_AUX_CTL_REG EQU CYREG_B1_UDB06_MSK_ACTL +SDCard_BSPIM_BitCounter_ST__STATUS_AUX_CTL_REG EQU CYREG_B1_UDB06_ACTL +SDCard_BSPIM_BitCounter_ST__STATUS_CNT_REG EQU CYREG_B1_UDB06_ST_CTL +SDCard_BSPIM_BitCounter_ST__STATUS_CONTROL_REG EQU CYREG_B1_UDB06_ST_CTL +SDCard_BSPIM_BitCounter_ST__STATUS_REG EQU CYREG_B1_UDB06_ST +SDCard_BSPIM_BitCounter__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B1_UDB06_07_ACTL +SDCard_BSPIM_BitCounter__16BIT_CONTROL_CONTROL_REG EQU CYREG_B1_UDB06_07_CTL +SDCard_BSPIM_BitCounter__16BIT_CONTROL_COUNT_REG EQU CYREG_B1_UDB06_07_CTL +SDCard_BSPIM_BitCounter__16BIT_COUNT_CONTROL_REG EQU CYREG_B1_UDB06_07_CTL +SDCard_BSPIM_BitCounter__16BIT_COUNT_COUNT_REG EQU CYREG_B1_UDB06_07_CTL +SDCard_BSPIM_BitCounter__16BIT_MASK_MASK_REG EQU CYREG_B1_UDB06_07_MSK +SDCard_BSPIM_BitCounter__16BIT_MASK_PERIOD_REG EQU CYREG_B1_UDB06_07_MSK +SDCard_BSPIM_BitCounter__16BIT_PERIOD_MASK_REG EQU CYREG_B1_UDB06_07_MSK +SDCard_BSPIM_BitCounter__16BIT_PERIOD_PERIOD_REG EQU CYREG_B1_UDB06_07_MSK +SDCard_BSPIM_BitCounter__CONTROL_AUX_CTL_REG EQU CYREG_B1_UDB06_ACTL +SDCard_BSPIM_BitCounter__CONTROL_REG EQU CYREG_B1_UDB06_CTL +SDCard_BSPIM_BitCounter__CONTROL_ST_REG EQU CYREG_B1_UDB06_ST_CTL +SDCard_BSPIM_BitCounter__COUNT_REG EQU CYREG_B1_UDB06_CTL +SDCard_BSPIM_BitCounter__COUNT_ST_REG EQU CYREG_B1_UDB06_ST_CTL +SDCard_BSPIM_BitCounter__MASK_CTL_AUX_CTL_REG EQU CYREG_B1_UDB06_MSK_ACTL +SDCard_BSPIM_BitCounter__PERIOD_REG EQU CYREG_B1_UDB06_MSK +SDCard_BSPIM_BitCounter__PER_CTL_AUX_CTL_REG EQU CYREG_B1_UDB06_MSK_ACTL +SDCard_BSPIM_RxStsReg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB06_07_ACTL +SDCard_BSPIM_RxStsReg__16BIT_STATUS_REG EQU CYREG_B0_UDB06_07_ST SDCard_BSPIM_RxStsReg__4__MASK EQU 0x10 SDCard_BSPIM_RxStsReg__4__POS EQU 4 SDCard_BSPIM_RxStsReg__5__MASK EQU 0x20 @@ -539,13 +625,13 @@ SDCard_BSPIM_RxStsReg__5__POS EQU 5 SDCard_BSPIM_RxStsReg__6__MASK EQU 0x40 SDCard_BSPIM_RxStsReg__6__POS EQU 6 SDCard_BSPIM_RxStsReg__MASK EQU 0x70 -SDCard_BSPIM_RxStsReg__MASK_REG EQU CYREG_B0_UDB04_MSK -SDCard_BSPIM_RxStsReg__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB04_ACTL -SDCard_BSPIM_RxStsReg__STATUS_REG EQU CYREG_B0_UDB04_ST +SDCard_BSPIM_RxStsReg__MASK_REG EQU CYREG_B0_UDB06_MSK +SDCard_BSPIM_RxStsReg__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB06_ACTL +SDCard_BSPIM_RxStsReg__STATUS_REG EQU CYREG_B0_UDB06_ST SDCard_BSPIM_TxStsReg__0__MASK EQU 0x01 SDCard_BSPIM_TxStsReg__0__POS EQU 0 -SDCard_BSPIM_TxStsReg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B1_UDB07_08_ACTL -SDCard_BSPIM_TxStsReg__16BIT_STATUS_REG EQU CYREG_B1_UDB07_08_ST +SDCard_BSPIM_TxStsReg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB04_05_ACTL +SDCard_BSPIM_TxStsReg__16BIT_STATUS_REG EQU CYREG_B0_UDB04_05_ST SDCard_BSPIM_TxStsReg__1__MASK EQU 0x02 SDCard_BSPIM_TxStsReg__1__POS EQU 1 SDCard_BSPIM_TxStsReg__2__MASK EQU 0x04 @@ -555,28 +641,26 @@ SDCard_BSPIM_TxStsReg__3__POS EQU 3 SDCard_BSPIM_TxStsReg__4__MASK EQU 0x10 SDCard_BSPIM_TxStsReg__4__POS EQU 4 SDCard_BSPIM_TxStsReg__MASK EQU 0x1F -SDCard_BSPIM_TxStsReg__MASK_REG EQU CYREG_B1_UDB07_MSK -SDCard_BSPIM_TxStsReg__STATUS_AUX_CTL_REG EQU CYREG_B1_UDB07_ACTL -SDCard_BSPIM_TxStsReg__STATUS_REG EQU CYREG_B1_UDB07_ST -SDCard_BSPIM_sR8_Dp_u0__16BIT_A0_REG EQU CYREG_B0_UDB07_08_A0 -SDCard_BSPIM_sR8_Dp_u0__16BIT_A1_REG EQU CYREG_B0_UDB07_08_A1 -SDCard_BSPIM_sR8_Dp_u0__16BIT_D0_REG EQU CYREG_B0_UDB07_08_D0 -SDCard_BSPIM_sR8_Dp_u0__16BIT_D1_REG EQU CYREG_B0_UDB07_08_D1 -SDCard_BSPIM_sR8_Dp_u0__16BIT_DP_AUX_CTL_REG EQU CYREG_B0_UDB07_08_ACTL -SDCard_BSPIM_sR8_Dp_u0__16BIT_F0_REG EQU CYREG_B0_UDB07_08_F0 -SDCard_BSPIM_sR8_Dp_u0__16BIT_F1_REG EQU CYREG_B0_UDB07_08_F1 -SDCard_BSPIM_sR8_Dp_u0__A0_A1_REG EQU CYREG_B0_UDB07_A0_A1 -SDCard_BSPIM_sR8_Dp_u0__A0_REG EQU CYREG_B0_UDB07_A0 -SDCard_BSPIM_sR8_Dp_u0__A1_REG EQU CYREG_B0_UDB07_A1 -SDCard_BSPIM_sR8_Dp_u0__D0_D1_REG EQU CYREG_B0_UDB07_D0_D1 -SDCard_BSPIM_sR8_Dp_u0__D0_REG EQU CYREG_B0_UDB07_D0 -SDCard_BSPIM_sR8_Dp_u0__D1_REG EQU CYREG_B0_UDB07_D1 -SDCard_BSPIM_sR8_Dp_u0__DP_AUX_CTL_REG EQU CYREG_B0_UDB07_ACTL -SDCard_BSPIM_sR8_Dp_u0__F0_F1_REG EQU CYREG_B0_UDB07_F0_F1 -SDCard_BSPIM_sR8_Dp_u0__F0_REG EQU CYREG_B0_UDB07_F0 -SDCard_BSPIM_sR8_Dp_u0__F1_REG EQU CYREG_B0_UDB07_F1 -SDCard_BSPIM_sR8_Dp_u0__MSK_DP_AUX_CTL_REG EQU CYREG_B0_UDB07_MSK_ACTL -SDCard_BSPIM_sR8_Dp_u0__PER_DP_AUX_CTL_REG EQU CYREG_B0_UDB07_MSK_ACTL +SDCard_BSPIM_TxStsReg__MASK_REG EQU CYREG_B0_UDB04_MSK +SDCard_BSPIM_TxStsReg__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB04_ACTL +SDCard_BSPIM_TxStsReg__STATUS_REG EQU CYREG_B0_UDB04_ST +SDCard_BSPIM_sR8_Dp_u0__16BIT_A0_REG EQU CYREG_B0_UDB06_07_A0 +SDCard_BSPIM_sR8_Dp_u0__16BIT_A1_REG EQU CYREG_B0_UDB06_07_A1 +SDCard_BSPIM_sR8_Dp_u0__16BIT_D0_REG EQU CYREG_B0_UDB06_07_D0 +SDCard_BSPIM_sR8_Dp_u0__16BIT_D1_REG EQU CYREG_B0_UDB06_07_D1 +SDCard_BSPIM_sR8_Dp_u0__16BIT_DP_AUX_CTL_REG EQU CYREG_B0_UDB06_07_ACTL +SDCard_BSPIM_sR8_Dp_u0__16BIT_F0_REG EQU CYREG_B0_UDB06_07_F0 +SDCard_BSPIM_sR8_Dp_u0__16BIT_F1_REG EQU CYREG_B0_UDB06_07_F1 +SDCard_BSPIM_sR8_Dp_u0__A0_A1_REG EQU CYREG_B0_UDB06_A0_A1 +SDCard_BSPIM_sR8_Dp_u0__A0_REG EQU CYREG_B0_UDB06_A0 +SDCard_BSPIM_sR8_Dp_u0__A1_REG EQU CYREG_B0_UDB06_A1 +SDCard_BSPIM_sR8_Dp_u0__D0_D1_REG EQU CYREG_B0_UDB06_D0_D1 +SDCard_BSPIM_sR8_Dp_u0__D0_REG EQU CYREG_B0_UDB06_D0 +SDCard_BSPIM_sR8_Dp_u0__D1_REG EQU CYREG_B0_UDB06_D1 +SDCard_BSPIM_sR8_Dp_u0__DP_AUX_CTL_REG EQU CYREG_B0_UDB06_ACTL +SDCard_BSPIM_sR8_Dp_u0__F0_F1_REG EQU CYREG_B0_UDB06_F0_F1 +SDCard_BSPIM_sR8_Dp_u0__F0_REG EQU CYREG_B0_UDB06_F0 +SDCard_BSPIM_sR8_Dp_u0__F1_REG EQU CYREG_B0_UDB06_F1 /* USBFS_dp_int */ USBFS_dp_int__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0 @@ -1032,21 +1116,32 @@ SD_Data_Clk__PM_STBY_CFG EQU CYREG_PM_STBY_CFG2 SD_Data_Clk__PM_STBY_MSK EQU 0x01 /* SD_Init_Clk */ -SD_Init_Clk__CFG0 EQU CYREG_CLKDIST_DCFG2_CFG0 -SD_Init_Clk__CFG1 EQU CYREG_CLKDIST_DCFG2_CFG1 -SD_Init_Clk__CFG2 EQU CYREG_CLKDIST_DCFG2_CFG2 +SD_Init_Clk__CFG0 EQU CYREG_CLKDIST_DCFG3_CFG0 +SD_Init_Clk__CFG1 EQU CYREG_CLKDIST_DCFG3_CFG1 +SD_Init_Clk__CFG2 EQU CYREG_CLKDIST_DCFG3_CFG2 SD_Init_Clk__CFG2_SRC_SEL_MASK EQU 0x07 -SD_Init_Clk__INDEX EQU 0x02 +SD_Init_Clk__INDEX EQU 0x03 SD_Init_Clk__PM_ACT_CFG EQU CYREG_PM_ACT_CFG2 -SD_Init_Clk__PM_ACT_MSK EQU 0x04 +SD_Init_Clk__PM_ACT_MSK EQU 0x08 SD_Init_Clk__PM_STBY_CFG EQU CYREG_PM_STBY_CFG2 -SD_Init_Clk__PM_STBY_MSK EQU 0x04 +SD_Init_Clk__PM_STBY_MSK EQU 0x08 + +/* timer_clock */ +timer_clock__CFG0 EQU CYREG_CLKDIST_DCFG2_CFG0 +timer_clock__CFG1 EQU CYREG_CLKDIST_DCFG2_CFG1 +timer_clock__CFG2 EQU CYREG_CLKDIST_DCFG2_CFG2 +timer_clock__CFG2_SRC_SEL_MASK EQU 0x07 +timer_clock__INDEX EQU 0x02 +timer_clock__PM_ACT_CFG EQU CYREG_PM_ACT_CFG2 +timer_clock__PM_ACT_MSK EQU 0x04 +timer_clock__PM_STBY_CFG EQU CYREG_PM_STBY_CFG2 +timer_clock__PM_STBY_MSK EQU 0x04 /* scsiTarget */ scsiTarget_StatusReg__0__MASK EQU 0x01 scsiTarget_StatusReg__0__POS EQU 0 -scsiTarget_StatusReg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB12_13_ACTL -scsiTarget_StatusReg__16BIT_STATUS_REG EQU CYREG_B0_UDB12_13_ST +scsiTarget_StatusReg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB13_14_ACTL +scsiTarget_StatusReg__16BIT_STATUS_REG EQU CYREG_B0_UDB13_14_ST scsiTarget_StatusReg__1__MASK EQU 0x02 scsiTarget_StatusReg__1__POS EQU 1 scsiTarget_StatusReg__2__MASK EQU 0x04 @@ -1054,76 +1149,76 @@ scsiTarget_StatusReg__2__POS EQU 2 scsiTarget_StatusReg__3__MASK EQU 0x08 scsiTarget_StatusReg__3__POS EQU 3 scsiTarget_StatusReg__MASK EQU 0x0F -scsiTarget_StatusReg__MASK_REG EQU CYREG_B0_UDB12_MSK -scsiTarget_StatusReg__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB12_ACTL -scsiTarget_StatusReg__STATUS_REG EQU CYREG_B0_UDB12_ST -scsiTarget_datapath_PI__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB03_04_ACTL -scsiTarget_datapath_PI__16BIT_STATUS_REG EQU CYREG_B0_UDB03_04_ST -scsiTarget_datapath_PI__MASK_REG EQU CYREG_B0_UDB03_MSK -scsiTarget_datapath_PI__MASK_ST_AUX_CTL_REG EQU CYREG_B0_UDB03_MSK_ACTL -scsiTarget_datapath_PI__PER_ST_AUX_CTL_REG EQU CYREG_B0_UDB03_MSK_ACTL -scsiTarget_datapath_PI__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB03_ACTL -scsiTarget_datapath_PI__STATUS_CNT_REG EQU CYREG_B0_UDB03_ST_CTL -scsiTarget_datapath_PI__STATUS_CONTROL_REG EQU CYREG_B0_UDB03_ST_CTL -scsiTarget_datapath_PI__STATUS_REG EQU CYREG_B0_UDB03_ST -scsiTarget_datapath_PO__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB03_04_ACTL -scsiTarget_datapath_PO__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB03_04_CTL -scsiTarget_datapath_PO__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB03_04_CTL -scsiTarget_datapath_PO__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB03_04_CTL -scsiTarget_datapath_PO__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB03_04_CTL -scsiTarget_datapath_PO__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB03_04_MSK -scsiTarget_datapath_PO__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB03_04_MSK -scsiTarget_datapath_PO__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB03_04_MSK -scsiTarget_datapath_PO__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB03_04_MSK -scsiTarget_datapath_PO__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB03_ACTL -scsiTarget_datapath_PO__CONTROL_REG EQU CYREG_B0_UDB03_CTL -scsiTarget_datapath_PO__CONTROL_ST_REG EQU CYREG_B0_UDB03_ST_CTL -scsiTarget_datapath_PO__COUNT_REG EQU CYREG_B0_UDB03_CTL -scsiTarget_datapath_PO__COUNT_ST_REG EQU CYREG_B0_UDB03_ST_CTL -scsiTarget_datapath_PO__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB03_MSK_ACTL -scsiTarget_datapath_PO__PERIOD_REG EQU CYREG_B0_UDB03_MSK -scsiTarget_datapath_PO__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB03_MSK_ACTL -scsiTarget_datapath__16BIT_A0_REG EQU CYREG_B0_UDB03_04_A0 -scsiTarget_datapath__16BIT_A1_REG EQU CYREG_B0_UDB03_04_A1 -scsiTarget_datapath__16BIT_D0_REG EQU CYREG_B0_UDB03_04_D0 -scsiTarget_datapath__16BIT_D1_REG EQU CYREG_B0_UDB03_04_D1 -scsiTarget_datapath__16BIT_DP_AUX_CTL_REG EQU CYREG_B0_UDB03_04_ACTL -scsiTarget_datapath__16BIT_F0_REG EQU CYREG_B0_UDB03_04_F0 -scsiTarget_datapath__16BIT_F1_REG EQU CYREG_B0_UDB03_04_F1 -scsiTarget_datapath__A0_A1_REG EQU CYREG_B0_UDB03_A0_A1 -scsiTarget_datapath__A0_REG EQU CYREG_B0_UDB03_A0 -scsiTarget_datapath__A1_REG EQU CYREG_B0_UDB03_A1 -scsiTarget_datapath__D0_D1_REG EQU CYREG_B0_UDB03_D0_D1 -scsiTarget_datapath__D0_REG EQU CYREG_B0_UDB03_D0 -scsiTarget_datapath__D1_REG EQU CYREG_B0_UDB03_D1 -scsiTarget_datapath__DP_AUX_CTL_REG EQU CYREG_B0_UDB03_ACTL -scsiTarget_datapath__F0_F1_REG EQU CYREG_B0_UDB03_F0_F1 -scsiTarget_datapath__F0_REG EQU CYREG_B0_UDB03_F0 -scsiTarget_datapath__F1_REG EQU CYREG_B0_UDB03_F1 -scsiTarget_datapath__MSK_DP_AUX_CTL_REG EQU CYREG_B0_UDB03_MSK_ACTL -scsiTarget_datapath__PER_DP_AUX_CTL_REG EQU CYREG_B0_UDB03_MSK_ACTL +scsiTarget_StatusReg__MASK_REG EQU CYREG_B0_UDB13_MSK +scsiTarget_StatusReg__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB13_ACTL +scsiTarget_StatusReg__STATUS_REG EQU CYREG_B0_UDB13_ST +scsiTarget_datapath_PI__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB12_13_ACTL +scsiTarget_datapath_PI__16BIT_STATUS_REG EQU CYREG_B0_UDB12_13_ST +scsiTarget_datapath_PI__MASK_REG EQU CYREG_B0_UDB12_MSK +scsiTarget_datapath_PI__MASK_ST_AUX_CTL_REG EQU CYREG_B0_UDB12_MSK_ACTL +scsiTarget_datapath_PI__PER_ST_AUX_CTL_REG EQU CYREG_B0_UDB12_MSK_ACTL +scsiTarget_datapath_PI__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB12_ACTL +scsiTarget_datapath_PI__STATUS_CNT_REG EQU CYREG_B0_UDB12_ST_CTL +scsiTarget_datapath_PI__STATUS_CONTROL_REG EQU CYREG_B0_UDB12_ST_CTL +scsiTarget_datapath_PI__STATUS_REG EQU CYREG_B0_UDB12_ST +scsiTarget_datapath_PO__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB12_13_ACTL +scsiTarget_datapath_PO__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB12_13_CTL +scsiTarget_datapath_PO__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB12_13_CTL +scsiTarget_datapath_PO__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB12_13_CTL +scsiTarget_datapath_PO__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB12_13_CTL +scsiTarget_datapath_PO__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB12_13_MSK +scsiTarget_datapath_PO__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB12_13_MSK +scsiTarget_datapath_PO__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB12_13_MSK +scsiTarget_datapath_PO__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB12_13_MSK +scsiTarget_datapath_PO__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB12_ACTL +scsiTarget_datapath_PO__CONTROL_REG EQU CYREG_B0_UDB12_CTL +scsiTarget_datapath_PO__CONTROL_ST_REG EQU CYREG_B0_UDB12_ST_CTL +scsiTarget_datapath_PO__COUNT_REG EQU CYREG_B0_UDB12_CTL +scsiTarget_datapath_PO__COUNT_ST_REG EQU CYREG_B0_UDB12_ST_CTL +scsiTarget_datapath_PO__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB12_MSK_ACTL +scsiTarget_datapath_PO__PERIOD_REG EQU CYREG_B0_UDB12_MSK +scsiTarget_datapath_PO__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB12_MSK_ACTL +scsiTarget_datapath__16BIT_A0_REG EQU CYREG_B0_UDB12_13_A0 +scsiTarget_datapath__16BIT_A1_REG EQU CYREG_B0_UDB12_13_A1 +scsiTarget_datapath__16BIT_D0_REG EQU CYREG_B0_UDB12_13_D0 +scsiTarget_datapath__16BIT_D1_REG EQU CYREG_B0_UDB12_13_D1 +scsiTarget_datapath__16BIT_DP_AUX_CTL_REG EQU CYREG_B0_UDB12_13_ACTL +scsiTarget_datapath__16BIT_F0_REG EQU CYREG_B0_UDB12_13_F0 +scsiTarget_datapath__16BIT_F1_REG EQU CYREG_B0_UDB12_13_F1 +scsiTarget_datapath__A0_A1_REG EQU CYREG_B0_UDB12_A0_A1 +scsiTarget_datapath__A0_REG EQU CYREG_B0_UDB12_A0 +scsiTarget_datapath__A1_REG EQU CYREG_B0_UDB12_A1 +scsiTarget_datapath__D0_D1_REG EQU CYREG_B0_UDB12_D0_D1 +scsiTarget_datapath__D0_REG EQU CYREG_B0_UDB12_D0 +scsiTarget_datapath__D1_REG EQU CYREG_B0_UDB12_D1 +scsiTarget_datapath__DP_AUX_CTL_REG EQU CYREG_B0_UDB12_ACTL +scsiTarget_datapath__F0_F1_REG EQU CYREG_B0_UDB12_F0_F1 +scsiTarget_datapath__F0_REG EQU CYREG_B0_UDB12_F0 +scsiTarget_datapath__F1_REG EQU CYREG_B0_UDB12_F1 +scsiTarget_datapath__MSK_DP_AUX_CTL_REG EQU CYREG_B0_UDB12_MSK_ACTL +scsiTarget_datapath__PER_DP_AUX_CTL_REG EQU CYREG_B0_UDB12_MSK_ACTL /* SD_Clk_Ctl */ SD_Clk_Ctl_Sync_ctrl_reg__0__MASK EQU 0x01 SD_Clk_Ctl_Sync_ctrl_reg__0__POS EQU 0 -SD_Clk_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB01_02_ACTL -SD_Clk_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB01_02_CTL -SD_Clk_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB01_02_CTL -SD_Clk_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB01_02_CTL -SD_Clk_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB01_02_CTL -SD_Clk_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB01_02_MSK -SD_Clk_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB01_02_MSK -SD_Clk_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB01_02_MSK -SD_Clk_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB01_02_MSK -SD_Clk_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB01_ACTL -SD_Clk_Ctl_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB01_CTL -SD_Clk_Ctl_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB01_ST_CTL -SD_Clk_Ctl_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB01_CTL -SD_Clk_Ctl_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB01_ST_CTL +SD_Clk_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB02_03_ACTL +SD_Clk_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB02_03_CTL +SD_Clk_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB02_03_CTL +SD_Clk_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB02_03_CTL +SD_Clk_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB02_03_CTL +SD_Clk_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB02_03_MSK +SD_Clk_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB02_03_MSK +SD_Clk_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB02_03_MSK +SD_Clk_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB02_03_MSK +SD_Clk_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB02_ACTL +SD_Clk_Ctl_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB02_CTL +SD_Clk_Ctl_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB02_ST_CTL +SD_Clk_Ctl_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB02_CTL +SD_Clk_Ctl_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB02_ST_CTL SD_Clk_Ctl_Sync_ctrl_reg__MASK EQU 0x01 -SD_Clk_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB01_MSK_ACTL -SD_Clk_Ctl_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB01_MSK -SD_Clk_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB01_MSK_ACTL +SD_Clk_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB02_MSK_ACTL +SD_Clk_Ctl_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB02_MSK +SD_Clk_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB02_MSK_ACTL /* USBFS_ep_0 */ USBFS_ep_0__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0 @@ -1138,23 +1233,43 @@ USBFS_ep_0__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0 /* USBFS_ep_1 */ USBFS_ep_1__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0 USBFS_ep_1__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0 -USBFS_ep_1__INTC_MASK EQU 0x01 -USBFS_ep_1__INTC_NUMBER EQU 0 +USBFS_ep_1__INTC_MASK EQU 0x02 +USBFS_ep_1__INTC_NUMBER EQU 1 USBFS_ep_1__INTC_PRIOR_NUM EQU 7 -USBFS_ep_1__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_0 +USBFS_ep_1__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_1 USBFS_ep_1__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0 USBFS_ep_1__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0 /* USBFS_ep_2 */ USBFS_ep_2__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0 USBFS_ep_2__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0 -USBFS_ep_2__INTC_MASK EQU 0x02 -USBFS_ep_2__INTC_NUMBER EQU 1 +USBFS_ep_2__INTC_MASK EQU 0x04 +USBFS_ep_2__INTC_NUMBER EQU 2 USBFS_ep_2__INTC_PRIOR_NUM EQU 7 -USBFS_ep_2__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_1 +USBFS_ep_2__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_2 USBFS_ep_2__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0 USBFS_ep_2__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0 +/* USBFS_ep_3 */ +USBFS_ep_3__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0 +USBFS_ep_3__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0 +USBFS_ep_3__INTC_MASK EQU 0x08 +USBFS_ep_3__INTC_NUMBER EQU 3 +USBFS_ep_3__INTC_PRIOR_NUM EQU 7 +USBFS_ep_3__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_3 +USBFS_ep_3__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0 +USBFS_ep_3__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0 + +/* USBFS_ep_4 */ +USBFS_ep_4__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0 +USBFS_ep_4__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0 +USBFS_ep_4__INTC_MASK EQU 0x10 +USBFS_ep_4__INTC_NUMBER EQU 4 +USBFS_ep_4__INTC_PRIOR_NUM EQU 7 +USBFS_ep_4__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_4 +USBFS_ep_4__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0 +USBFS_ep_4__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0 + /* USBFS_USB */ USBFS_USB__ARB_CFG EQU CYREG_USB_ARB_CFG USBFS_USB__ARB_EP1_CFG EQU CYREG_USB_ARB_EP1_CFG @@ -2735,9 +2850,9 @@ CYDEV_DEBUG_ENABLE_MASK EQU 0x20 CYDEV_DEBUG_ENABLE_REGISTER EQU CYREG_MLOGIC_DEBUG CYDEV_DMA_CHANNELS_AVAILABLE EQU 24 CYDEV_ECC_ENABLE EQU 0 -CYDEV_HEAP_SIZE EQU 0x0256 +CYDEV_HEAP_SIZE EQU 0x0400 CYDEV_INSTRUCT_CACHE_ENABLED EQU 1 -CYDEV_INTR_RISING EQU 0x00000000 +CYDEV_INTR_RISING EQU 0x00000001 CYDEV_PROJ_TYPE EQU 2 CYDEV_PROJ_TYPE_BOOTLOADER EQU 1 CYDEV_PROJ_TYPE_LOADABLE EQU 2 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cyfitterrv.inc b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cyfitterrv.inc index 0e830b1..3768761 100755 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cyfitterrv.inc +++ b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cyfitterrv.inc @@ -3,6 +3,34 @@ INCLUDED_CYFITTERRV_INC EQU 1 GET cydevicerv.inc GET cydevicerv_trm.inc +; Debug_Timer_Interrupt +Debug_Timer_Interrupt__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0 +Debug_Timer_Interrupt__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0 +Debug_Timer_Interrupt__INTC_MASK EQU 0x01 +Debug_Timer_Interrupt__INTC_NUMBER EQU 0 +Debug_Timer_Interrupt__INTC_PRIOR_NUM EQU 7 +Debug_Timer_Interrupt__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_0 +Debug_Timer_Interrupt__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0 +Debug_Timer_Interrupt__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0 + +; Debug_Timer_TimerHW +Debug_Timer_TimerHW__CAP0 EQU CYREG_TMR0_CAP0 +Debug_Timer_TimerHW__CAP1 EQU CYREG_TMR0_CAP1 +Debug_Timer_TimerHW__CFG0 EQU CYREG_TMR0_CFG0 +Debug_Timer_TimerHW__CFG1 EQU CYREG_TMR0_CFG1 +Debug_Timer_TimerHW__CFG2 EQU CYREG_TMR0_CFG2 +Debug_Timer_TimerHW__CNT_CMP0 EQU CYREG_TMR0_CNT_CMP0 +Debug_Timer_TimerHW__CNT_CMP1 EQU CYREG_TMR0_CNT_CMP1 +Debug_Timer_TimerHW__PER0 EQU CYREG_TMR0_PER0 +Debug_Timer_TimerHW__PER1 EQU CYREG_TMR0_PER1 +Debug_Timer_TimerHW__PM_ACT_CFG EQU CYREG_PM_ACT_CFG3 +Debug_Timer_TimerHW__PM_ACT_MSK EQU 0x01 +Debug_Timer_TimerHW__PM_STBY_CFG EQU CYREG_PM_STBY_CFG3 +Debug_Timer_TimerHW__PM_STBY_MSK EQU 0x01 +Debug_Timer_TimerHW__RT0 EQU CYREG_TMR0_RT0 +Debug_Timer_TimerHW__RT1 EQU CYREG_TMR0_RT1 +Debug_Timer_TimerHW__SR0 EQU CYREG_TMR0_SR0 + ; USBFS_bus_reset USBFS_bus_reset__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0 USBFS_bus_reset__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0 @@ -16,28 +44,64 @@ USBFS_bus_reset__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0 ; SCSI_CTL_PHASE SCSI_CTL_PHASE_Sync_ctrl_reg__0__MASK EQU 0x01 SCSI_CTL_PHASE_Sync_ctrl_reg__0__POS EQU 0 -SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB02_03_ACTL -SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB02_03_CTL -SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB02_03_CTL -SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB02_03_CTL -SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB02_03_CTL -SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB02_03_MSK -SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB02_03_MSK -SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB02_03_MSK -SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB02_03_MSK +SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB05_06_ACTL +SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB05_06_CTL +SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB05_06_CTL +SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB05_06_CTL +SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB05_06_CTL +SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB05_06_MSK +SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB05_06_MSK +SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB05_06_MSK +SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB05_06_MSK SCSI_CTL_PHASE_Sync_ctrl_reg__1__MASK EQU 0x02 SCSI_CTL_PHASE_Sync_ctrl_reg__1__POS EQU 1 SCSI_CTL_PHASE_Sync_ctrl_reg__2__MASK EQU 0x04 SCSI_CTL_PHASE_Sync_ctrl_reg__2__POS EQU 2 -SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB02_ACTL -SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB02_CTL -SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB02_ST_CTL -SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB02_CTL -SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB02_ST_CTL +SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB05_ACTL +SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB05_CTL +SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB05_ST_CTL +SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB05_CTL +SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB05_ST_CTL SCSI_CTL_PHASE_Sync_ctrl_reg__MASK EQU 0x07 -SCSI_CTL_PHASE_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB02_MSK_ACTL -SCSI_CTL_PHASE_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB02_MSK -SCSI_CTL_PHASE_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB02_MSK_ACTL +SCSI_CTL_PHASE_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB05_MSK_ACTL +SCSI_CTL_PHASE_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB05_MSK +SCSI_CTL_PHASE_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB05_MSK_ACTL + +; SCSI_Out_Bits +SCSI_Out_Bits_Sync_ctrl_reg__0__MASK EQU 0x01 +SCSI_Out_Bits_Sync_ctrl_reg__0__POS EQU 0 +SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB00_01_ACTL +SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB00_01_CTL +SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB00_01_CTL +SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB00_01_CTL +SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB00_01_CTL +SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB00_01_MSK +SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB00_01_MSK +SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB00_01_MSK +SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB00_01_MSK +SCSI_Out_Bits_Sync_ctrl_reg__1__MASK EQU 0x02 +SCSI_Out_Bits_Sync_ctrl_reg__1__POS EQU 1 +SCSI_Out_Bits_Sync_ctrl_reg__2__MASK EQU 0x04 +SCSI_Out_Bits_Sync_ctrl_reg__2__POS EQU 2 +SCSI_Out_Bits_Sync_ctrl_reg__3__MASK EQU 0x08 +SCSI_Out_Bits_Sync_ctrl_reg__3__POS EQU 3 +SCSI_Out_Bits_Sync_ctrl_reg__4__MASK EQU 0x10 +SCSI_Out_Bits_Sync_ctrl_reg__4__POS EQU 4 +SCSI_Out_Bits_Sync_ctrl_reg__5__MASK EQU 0x20 +SCSI_Out_Bits_Sync_ctrl_reg__5__POS EQU 5 +SCSI_Out_Bits_Sync_ctrl_reg__6__MASK EQU 0x40 +SCSI_Out_Bits_Sync_ctrl_reg__6__POS EQU 6 +SCSI_Out_Bits_Sync_ctrl_reg__7__MASK EQU 0x80 +SCSI_Out_Bits_Sync_ctrl_reg__7__POS EQU 7 +SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB00_ACTL +SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB00_CTL +SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB00_ST_CTL +SCSI_Out_Bits_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB00_CTL +SCSI_Out_Bits_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB00_ST_CTL +SCSI_Out_Bits_Sync_ctrl_reg__MASK EQU 0xFF +SCSI_Out_Bits_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB00_MSK_ACTL +SCSI_Out_Bits_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB00_MSK +SCSI_Out_Bits_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB00_MSK_ACTL ; USBFS_arb_int USBFS_arb_int__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0 @@ -59,6 +123,28 @@ USBFS_sof_int__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_21 USBFS_sof_int__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0 USBFS_sof_int__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0 +; SCSI_Out_Ctl +SCSI_Out_Ctl_Sync_ctrl_reg__0__MASK EQU 0x01 +SCSI_Out_Ctl_Sync_ctrl_reg__0__POS EQU 0 +SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB03_04_ACTL +SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB03_04_CTL +SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB03_04_CTL +SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB03_04_CTL +SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB03_04_CTL +SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB03_04_MSK +SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB03_04_MSK +SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB03_04_MSK +SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB03_04_MSK +SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB03_ACTL +SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB03_CTL +SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB03_ST_CTL +SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB03_CTL +SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB03_ST_CTL +SCSI_Out_Ctl_Sync_ctrl_reg__MASK EQU 0x01 +SCSI_Out_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB03_MSK_ACTL +SCSI_Out_Ctl_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB03_MSK +SCSI_Out_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB03_MSK_ACTL + ; SCSI_Out_DBx SCSI_Out_DBx__0__AG EQU CYREG_PRT6_AG SCSI_Out_DBx__0__AMUX EQU CYREG_PRT6_AMUX @@ -504,34 +590,34 @@ SCSI_RST_ISR__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0 SCSI_RST_ISR__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0 ; SDCard_BSPIM -SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB07_08_ACTL -SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_REG EQU CYREG_B0_UDB07_08_ST -SDCard_BSPIM_BitCounter_ST__MASK_REG EQU CYREG_B0_UDB07_MSK -SDCard_BSPIM_BitCounter_ST__MASK_ST_AUX_CTL_REG EQU CYREG_B0_UDB07_MSK_ACTL -SDCard_BSPIM_BitCounter_ST__PER_ST_AUX_CTL_REG EQU CYREG_B0_UDB07_MSK_ACTL -SDCard_BSPIM_BitCounter_ST__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB07_ACTL -SDCard_BSPIM_BitCounter_ST__STATUS_CNT_REG EQU CYREG_B0_UDB07_ST_CTL -SDCard_BSPIM_BitCounter_ST__STATUS_CONTROL_REG EQU CYREG_B0_UDB07_ST_CTL -SDCard_BSPIM_BitCounter_ST__STATUS_REG EQU CYREG_B0_UDB07_ST -SDCard_BSPIM_BitCounter__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB07_08_ACTL -SDCard_BSPIM_BitCounter__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB07_08_CTL -SDCard_BSPIM_BitCounter__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB07_08_CTL -SDCard_BSPIM_BitCounter__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB07_08_CTL -SDCard_BSPIM_BitCounter__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB07_08_CTL -SDCard_BSPIM_BitCounter__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB07_08_MSK -SDCard_BSPIM_BitCounter__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB07_08_MSK -SDCard_BSPIM_BitCounter__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB07_08_MSK -SDCard_BSPIM_BitCounter__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB07_08_MSK -SDCard_BSPIM_BitCounter__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB07_ACTL -SDCard_BSPIM_BitCounter__CONTROL_REG EQU CYREG_B0_UDB07_CTL -SDCard_BSPIM_BitCounter__CONTROL_ST_REG EQU CYREG_B0_UDB07_ST_CTL -SDCard_BSPIM_BitCounter__COUNT_REG EQU CYREG_B0_UDB07_CTL -SDCard_BSPIM_BitCounter__COUNT_ST_REG EQU CYREG_B0_UDB07_ST_CTL -SDCard_BSPIM_BitCounter__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB07_MSK_ACTL -SDCard_BSPIM_BitCounter__PERIOD_REG EQU CYREG_B0_UDB07_MSK -SDCard_BSPIM_BitCounter__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB07_MSK_ACTL -SDCard_BSPIM_RxStsReg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB04_05_ACTL -SDCard_BSPIM_RxStsReg__16BIT_STATUS_REG EQU CYREG_B0_UDB04_05_ST +SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B1_UDB06_07_ACTL +SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_REG EQU CYREG_B1_UDB06_07_ST +SDCard_BSPIM_BitCounter_ST__MASK_REG EQU CYREG_B1_UDB06_MSK +SDCard_BSPIM_BitCounter_ST__MASK_ST_AUX_CTL_REG EQU CYREG_B1_UDB06_MSK_ACTL +SDCard_BSPIM_BitCounter_ST__PER_ST_AUX_CTL_REG EQU CYREG_B1_UDB06_MSK_ACTL +SDCard_BSPIM_BitCounter_ST__STATUS_AUX_CTL_REG EQU CYREG_B1_UDB06_ACTL +SDCard_BSPIM_BitCounter_ST__STATUS_CNT_REG EQU CYREG_B1_UDB06_ST_CTL +SDCard_BSPIM_BitCounter_ST__STATUS_CONTROL_REG EQU CYREG_B1_UDB06_ST_CTL +SDCard_BSPIM_BitCounter_ST__STATUS_REG EQU CYREG_B1_UDB06_ST +SDCard_BSPIM_BitCounter__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B1_UDB06_07_ACTL +SDCard_BSPIM_BitCounter__16BIT_CONTROL_CONTROL_REG EQU CYREG_B1_UDB06_07_CTL +SDCard_BSPIM_BitCounter__16BIT_CONTROL_COUNT_REG EQU CYREG_B1_UDB06_07_CTL +SDCard_BSPIM_BitCounter__16BIT_COUNT_CONTROL_REG EQU CYREG_B1_UDB06_07_CTL +SDCard_BSPIM_BitCounter__16BIT_COUNT_COUNT_REG EQU CYREG_B1_UDB06_07_CTL +SDCard_BSPIM_BitCounter__16BIT_MASK_MASK_REG EQU CYREG_B1_UDB06_07_MSK +SDCard_BSPIM_BitCounter__16BIT_MASK_PERIOD_REG EQU CYREG_B1_UDB06_07_MSK +SDCard_BSPIM_BitCounter__16BIT_PERIOD_MASK_REG EQU CYREG_B1_UDB06_07_MSK +SDCard_BSPIM_BitCounter__16BIT_PERIOD_PERIOD_REG EQU CYREG_B1_UDB06_07_MSK +SDCard_BSPIM_BitCounter__CONTROL_AUX_CTL_REG EQU CYREG_B1_UDB06_ACTL +SDCard_BSPIM_BitCounter__CONTROL_REG EQU CYREG_B1_UDB06_CTL +SDCard_BSPIM_BitCounter__CONTROL_ST_REG EQU CYREG_B1_UDB06_ST_CTL +SDCard_BSPIM_BitCounter__COUNT_REG EQU CYREG_B1_UDB06_CTL +SDCard_BSPIM_BitCounter__COUNT_ST_REG EQU CYREG_B1_UDB06_ST_CTL +SDCard_BSPIM_BitCounter__MASK_CTL_AUX_CTL_REG EQU CYREG_B1_UDB06_MSK_ACTL +SDCard_BSPIM_BitCounter__PERIOD_REG EQU CYREG_B1_UDB06_MSK +SDCard_BSPIM_BitCounter__PER_CTL_AUX_CTL_REG EQU CYREG_B1_UDB06_MSK_ACTL +SDCard_BSPIM_RxStsReg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB06_07_ACTL +SDCard_BSPIM_RxStsReg__16BIT_STATUS_REG EQU CYREG_B0_UDB06_07_ST SDCard_BSPIM_RxStsReg__4__MASK EQU 0x10 SDCard_BSPIM_RxStsReg__4__POS EQU 4 SDCard_BSPIM_RxStsReg__5__MASK EQU 0x20 @@ -539,13 +625,13 @@ SDCard_BSPIM_RxStsReg__5__POS EQU 5 SDCard_BSPIM_RxStsReg__6__MASK EQU 0x40 SDCard_BSPIM_RxStsReg__6__POS EQU 6 SDCard_BSPIM_RxStsReg__MASK EQU 0x70 -SDCard_BSPIM_RxStsReg__MASK_REG EQU CYREG_B0_UDB04_MSK -SDCard_BSPIM_RxStsReg__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB04_ACTL -SDCard_BSPIM_RxStsReg__STATUS_REG EQU CYREG_B0_UDB04_ST +SDCard_BSPIM_RxStsReg__MASK_REG EQU CYREG_B0_UDB06_MSK +SDCard_BSPIM_RxStsReg__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB06_ACTL +SDCard_BSPIM_RxStsReg__STATUS_REG EQU CYREG_B0_UDB06_ST SDCard_BSPIM_TxStsReg__0__MASK EQU 0x01 SDCard_BSPIM_TxStsReg__0__POS EQU 0 -SDCard_BSPIM_TxStsReg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B1_UDB07_08_ACTL -SDCard_BSPIM_TxStsReg__16BIT_STATUS_REG EQU CYREG_B1_UDB07_08_ST +SDCard_BSPIM_TxStsReg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB04_05_ACTL +SDCard_BSPIM_TxStsReg__16BIT_STATUS_REG EQU CYREG_B0_UDB04_05_ST SDCard_BSPIM_TxStsReg__1__MASK EQU 0x02 SDCard_BSPIM_TxStsReg__1__POS EQU 1 SDCard_BSPIM_TxStsReg__2__MASK EQU 0x04 @@ -555,28 +641,26 @@ SDCard_BSPIM_TxStsReg__3__POS EQU 3 SDCard_BSPIM_TxStsReg__4__MASK EQU 0x10 SDCard_BSPIM_TxStsReg__4__POS EQU 4 SDCard_BSPIM_TxStsReg__MASK EQU 0x1F -SDCard_BSPIM_TxStsReg__MASK_REG EQU CYREG_B1_UDB07_MSK -SDCard_BSPIM_TxStsReg__STATUS_AUX_CTL_REG EQU CYREG_B1_UDB07_ACTL -SDCard_BSPIM_TxStsReg__STATUS_REG EQU CYREG_B1_UDB07_ST -SDCard_BSPIM_sR8_Dp_u0__16BIT_A0_REG EQU CYREG_B0_UDB07_08_A0 -SDCard_BSPIM_sR8_Dp_u0__16BIT_A1_REG EQU CYREG_B0_UDB07_08_A1 -SDCard_BSPIM_sR8_Dp_u0__16BIT_D0_REG EQU CYREG_B0_UDB07_08_D0 -SDCard_BSPIM_sR8_Dp_u0__16BIT_D1_REG EQU CYREG_B0_UDB07_08_D1 -SDCard_BSPIM_sR8_Dp_u0__16BIT_DP_AUX_CTL_REG EQU CYREG_B0_UDB07_08_ACTL -SDCard_BSPIM_sR8_Dp_u0__16BIT_F0_REG EQU CYREG_B0_UDB07_08_F0 -SDCard_BSPIM_sR8_Dp_u0__16BIT_F1_REG EQU CYREG_B0_UDB07_08_F1 -SDCard_BSPIM_sR8_Dp_u0__A0_A1_REG EQU CYREG_B0_UDB07_A0_A1 -SDCard_BSPIM_sR8_Dp_u0__A0_REG EQU CYREG_B0_UDB07_A0 -SDCard_BSPIM_sR8_Dp_u0__A1_REG EQU CYREG_B0_UDB07_A1 -SDCard_BSPIM_sR8_Dp_u0__D0_D1_REG EQU CYREG_B0_UDB07_D0_D1 -SDCard_BSPIM_sR8_Dp_u0__D0_REG EQU CYREG_B0_UDB07_D0 -SDCard_BSPIM_sR8_Dp_u0__D1_REG EQU CYREG_B0_UDB07_D1 -SDCard_BSPIM_sR8_Dp_u0__DP_AUX_CTL_REG EQU CYREG_B0_UDB07_ACTL -SDCard_BSPIM_sR8_Dp_u0__F0_F1_REG EQU CYREG_B0_UDB07_F0_F1 -SDCard_BSPIM_sR8_Dp_u0__F0_REG EQU CYREG_B0_UDB07_F0 -SDCard_BSPIM_sR8_Dp_u0__F1_REG EQU CYREG_B0_UDB07_F1 -SDCard_BSPIM_sR8_Dp_u0__MSK_DP_AUX_CTL_REG EQU CYREG_B0_UDB07_MSK_ACTL -SDCard_BSPIM_sR8_Dp_u0__PER_DP_AUX_CTL_REG EQU CYREG_B0_UDB07_MSK_ACTL +SDCard_BSPIM_TxStsReg__MASK_REG EQU CYREG_B0_UDB04_MSK +SDCard_BSPIM_TxStsReg__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB04_ACTL +SDCard_BSPIM_TxStsReg__STATUS_REG EQU CYREG_B0_UDB04_ST +SDCard_BSPIM_sR8_Dp_u0__16BIT_A0_REG EQU CYREG_B0_UDB06_07_A0 +SDCard_BSPIM_sR8_Dp_u0__16BIT_A1_REG EQU CYREG_B0_UDB06_07_A1 +SDCard_BSPIM_sR8_Dp_u0__16BIT_D0_REG EQU CYREG_B0_UDB06_07_D0 +SDCard_BSPIM_sR8_Dp_u0__16BIT_D1_REG EQU CYREG_B0_UDB06_07_D1 +SDCard_BSPIM_sR8_Dp_u0__16BIT_DP_AUX_CTL_REG EQU CYREG_B0_UDB06_07_ACTL +SDCard_BSPIM_sR8_Dp_u0__16BIT_F0_REG EQU CYREG_B0_UDB06_07_F0 +SDCard_BSPIM_sR8_Dp_u0__16BIT_F1_REG EQU CYREG_B0_UDB06_07_F1 +SDCard_BSPIM_sR8_Dp_u0__A0_A1_REG EQU CYREG_B0_UDB06_A0_A1 +SDCard_BSPIM_sR8_Dp_u0__A0_REG EQU CYREG_B0_UDB06_A0 +SDCard_BSPIM_sR8_Dp_u0__A1_REG EQU CYREG_B0_UDB06_A1 +SDCard_BSPIM_sR8_Dp_u0__D0_D1_REG EQU CYREG_B0_UDB06_D0_D1 +SDCard_BSPIM_sR8_Dp_u0__D0_REG EQU CYREG_B0_UDB06_D0 +SDCard_BSPIM_sR8_Dp_u0__D1_REG EQU CYREG_B0_UDB06_D1 +SDCard_BSPIM_sR8_Dp_u0__DP_AUX_CTL_REG EQU CYREG_B0_UDB06_ACTL +SDCard_BSPIM_sR8_Dp_u0__F0_F1_REG EQU CYREG_B0_UDB06_F0_F1 +SDCard_BSPIM_sR8_Dp_u0__F0_REG EQU CYREG_B0_UDB06_F0 +SDCard_BSPIM_sR8_Dp_u0__F1_REG EQU CYREG_B0_UDB06_F1 ; USBFS_dp_int USBFS_dp_int__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0 @@ -1032,21 +1116,32 @@ SD_Data_Clk__PM_STBY_CFG EQU CYREG_PM_STBY_CFG2 SD_Data_Clk__PM_STBY_MSK EQU 0x01 ; SD_Init_Clk -SD_Init_Clk__CFG0 EQU CYREG_CLKDIST_DCFG2_CFG0 -SD_Init_Clk__CFG1 EQU CYREG_CLKDIST_DCFG2_CFG1 -SD_Init_Clk__CFG2 EQU CYREG_CLKDIST_DCFG2_CFG2 +SD_Init_Clk__CFG0 EQU CYREG_CLKDIST_DCFG3_CFG0 +SD_Init_Clk__CFG1 EQU CYREG_CLKDIST_DCFG3_CFG1 +SD_Init_Clk__CFG2 EQU CYREG_CLKDIST_DCFG3_CFG2 SD_Init_Clk__CFG2_SRC_SEL_MASK EQU 0x07 -SD_Init_Clk__INDEX EQU 0x02 +SD_Init_Clk__INDEX EQU 0x03 SD_Init_Clk__PM_ACT_CFG EQU CYREG_PM_ACT_CFG2 -SD_Init_Clk__PM_ACT_MSK EQU 0x04 +SD_Init_Clk__PM_ACT_MSK EQU 0x08 SD_Init_Clk__PM_STBY_CFG EQU CYREG_PM_STBY_CFG2 -SD_Init_Clk__PM_STBY_MSK EQU 0x04 +SD_Init_Clk__PM_STBY_MSK EQU 0x08 + +; timer_clock +timer_clock__CFG0 EQU CYREG_CLKDIST_DCFG2_CFG0 +timer_clock__CFG1 EQU CYREG_CLKDIST_DCFG2_CFG1 +timer_clock__CFG2 EQU CYREG_CLKDIST_DCFG2_CFG2 +timer_clock__CFG2_SRC_SEL_MASK EQU 0x07 +timer_clock__INDEX EQU 0x02 +timer_clock__PM_ACT_CFG EQU CYREG_PM_ACT_CFG2 +timer_clock__PM_ACT_MSK EQU 0x04 +timer_clock__PM_STBY_CFG EQU CYREG_PM_STBY_CFG2 +timer_clock__PM_STBY_MSK EQU 0x04 ; scsiTarget scsiTarget_StatusReg__0__MASK EQU 0x01 scsiTarget_StatusReg__0__POS EQU 0 -scsiTarget_StatusReg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB12_13_ACTL -scsiTarget_StatusReg__16BIT_STATUS_REG EQU CYREG_B0_UDB12_13_ST +scsiTarget_StatusReg__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB13_14_ACTL +scsiTarget_StatusReg__16BIT_STATUS_REG EQU CYREG_B0_UDB13_14_ST scsiTarget_StatusReg__1__MASK EQU 0x02 scsiTarget_StatusReg__1__POS EQU 1 scsiTarget_StatusReg__2__MASK EQU 0x04 @@ -1054,76 +1149,76 @@ scsiTarget_StatusReg__2__POS EQU 2 scsiTarget_StatusReg__3__MASK EQU 0x08 scsiTarget_StatusReg__3__POS EQU 3 scsiTarget_StatusReg__MASK EQU 0x0F -scsiTarget_StatusReg__MASK_REG EQU CYREG_B0_UDB12_MSK -scsiTarget_StatusReg__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB12_ACTL -scsiTarget_StatusReg__STATUS_REG EQU CYREG_B0_UDB12_ST -scsiTarget_datapath_PI__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB03_04_ACTL -scsiTarget_datapath_PI__16BIT_STATUS_REG EQU CYREG_B0_UDB03_04_ST -scsiTarget_datapath_PI__MASK_REG EQU CYREG_B0_UDB03_MSK -scsiTarget_datapath_PI__MASK_ST_AUX_CTL_REG EQU CYREG_B0_UDB03_MSK_ACTL -scsiTarget_datapath_PI__PER_ST_AUX_CTL_REG EQU CYREG_B0_UDB03_MSK_ACTL -scsiTarget_datapath_PI__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB03_ACTL -scsiTarget_datapath_PI__STATUS_CNT_REG EQU CYREG_B0_UDB03_ST_CTL -scsiTarget_datapath_PI__STATUS_CONTROL_REG EQU CYREG_B0_UDB03_ST_CTL -scsiTarget_datapath_PI__STATUS_REG EQU CYREG_B0_UDB03_ST -scsiTarget_datapath_PO__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB03_04_ACTL -scsiTarget_datapath_PO__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB03_04_CTL -scsiTarget_datapath_PO__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB03_04_CTL -scsiTarget_datapath_PO__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB03_04_CTL -scsiTarget_datapath_PO__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB03_04_CTL -scsiTarget_datapath_PO__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB03_04_MSK -scsiTarget_datapath_PO__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB03_04_MSK -scsiTarget_datapath_PO__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB03_04_MSK -scsiTarget_datapath_PO__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB03_04_MSK -scsiTarget_datapath_PO__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB03_ACTL -scsiTarget_datapath_PO__CONTROL_REG EQU CYREG_B0_UDB03_CTL -scsiTarget_datapath_PO__CONTROL_ST_REG EQU CYREG_B0_UDB03_ST_CTL -scsiTarget_datapath_PO__COUNT_REG EQU CYREG_B0_UDB03_CTL -scsiTarget_datapath_PO__COUNT_ST_REG EQU CYREG_B0_UDB03_ST_CTL -scsiTarget_datapath_PO__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB03_MSK_ACTL -scsiTarget_datapath_PO__PERIOD_REG EQU CYREG_B0_UDB03_MSK -scsiTarget_datapath_PO__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB03_MSK_ACTL -scsiTarget_datapath__16BIT_A0_REG EQU CYREG_B0_UDB03_04_A0 -scsiTarget_datapath__16BIT_A1_REG EQU CYREG_B0_UDB03_04_A1 -scsiTarget_datapath__16BIT_D0_REG EQU CYREG_B0_UDB03_04_D0 -scsiTarget_datapath__16BIT_D1_REG EQU CYREG_B0_UDB03_04_D1 -scsiTarget_datapath__16BIT_DP_AUX_CTL_REG EQU CYREG_B0_UDB03_04_ACTL -scsiTarget_datapath__16BIT_F0_REG EQU CYREG_B0_UDB03_04_F0 -scsiTarget_datapath__16BIT_F1_REG EQU CYREG_B0_UDB03_04_F1 -scsiTarget_datapath__A0_A1_REG EQU CYREG_B0_UDB03_A0_A1 -scsiTarget_datapath__A0_REG EQU CYREG_B0_UDB03_A0 -scsiTarget_datapath__A1_REG EQU CYREG_B0_UDB03_A1 -scsiTarget_datapath__D0_D1_REG EQU CYREG_B0_UDB03_D0_D1 -scsiTarget_datapath__D0_REG EQU CYREG_B0_UDB03_D0 -scsiTarget_datapath__D1_REG EQU CYREG_B0_UDB03_D1 -scsiTarget_datapath__DP_AUX_CTL_REG EQU CYREG_B0_UDB03_ACTL -scsiTarget_datapath__F0_F1_REG EQU CYREG_B0_UDB03_F0_F1 -scsiTarget_datapath__F0_REG EQU CYREG_B0_UDB03_F0 -scsiTarget_datapath__F1_REG EQU CYREG_B0_UDB03_F1 -scsiTarget_datapath__MSK_DP_AUX_CTL_REG EQU CYREG_B0_UDB03_MSK_ACTL -scsiTarget_datapath__PER_DP_AUX_CTL_REG EQU CYREG_B0_UDB03_MSK_ACTL +scsiTarget_StatusReg__MASK_REG EQU CYREG_B0_UDB13_MSK +scsiTarget_StatusReg__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB13_ACTL +scsiTarget_StatusReg__STATUS_REG EQU CYREG_B0_UDB13_ST +scsiTarget_datapath_PI__16BIT_STATUS_AUX_CTL_REG EQU CYREG_B0_UDB12_13_ACTL +scsiTarget_datapath_PI__16BIT_STATUS_REG EQU CYREG_B0_UDB12_13_ST +scsiTarget_datapath_PI__MASK_REG EQU CYREG_B0_UDB12_MSK +scsiTarget_datapath_PI__MASK_ST_AUX_CTL_REG EQU CYREG_B0_UDB12_MSK_ACTL +scsiTarget_datapath_PI__PER_ST_AUX_CTL_REG EQU CYREG_B0_UDB12_MSK_ACTL +scsiTarget_datapath_PI__STATUS_AUX_CTL_REG EQU CYREG_B0_UDB12_ACTL +scsiTarget_datapath_PI__STATUS_CNT_REG EQU CYREG_B0_UDB12_ST_CTL +scsiTarget_datapath_PI__STATUS_CONTROL_REG EQU CYREG_B0_UDB12_ST_CTL +scsiTarget_datapath_PI__STATUS_REG EQU CYREG_B0_UDB12_ST +scsiTarget_datapath_PO__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB12_13_ACTL +scsiTarget_datapath_PO__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB12_13_CTL +scsiTarget_datapath_PO__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB12_13_CTL +scsiTarget_datapath_PO__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB12_13_CTL +scsiTarget_datapath_PO__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB12_13_CTL +scsiTarget_datapath_PO__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB12_13_MSK +scsiTarget_datapath_PO__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB12_13_MSK +scsiTarget_datapath_PO__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB12_13_MSK +scsiTarget_datapath_PO__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB12_13_MSK +scsiTarget_datapath_PO__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB12_ACTL +scsiTarget_datapath_PO__CONTROL_REG EQU CYREG_B0_UDB12_CTL +scsiTarget_datapath_PO__CONTROL_ST_REG EQU CYREG_B0_UDB12_ST_CTL +scsiTarget_datapath_PO__COUNT_REG EQU CYREG_B0_UDB12_CTL +scsiTarget_datapath_PO__COUNT_ST_REG EQU CYREG_B0_UDB12_ST_CTL +scsiTarget_datapath_PO__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB12_MSK_ACTL +scsiTarget_datapath_PO__PERIOD_REG EQU CYREG_B0_UDB12_MSK +scsiTarget_datapath_PO__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB12_MSK_ACTL +scsiTarget_datapath__16BIT_A0_REG EQU CYREG_B0_UDB12_13_A0 +scsiTarget_datapath__16BIT_A1_REG EQU CYREG_B0_UDB12_13_A1 +scsiTarget_datapath__16BIT_D0_REG EQU CYREG_B0_UDB12_13_D0 +scsiTarget_datapath__16BIT_D1_REG EQU CYREG_B0_UDB12_13_D1 +scsiTarget_datapath__16BIT_DP_AUX_CTL_REG EQU CYREG_B0_UDB12_13_ACTL +scsiTarget_datapath__16BIT_F0_REG EQU CYREG_B0_UDB12_13_F0 +scsiTarget_datapath__16BIT_F1_REG EQU CYREG_B0_UDB12_13_F1 +scsiTarget_datapath__A0_A1_REG EQU CYREG_B0_UDB12_A0_A1 +scsiTarget_datapath__A0_REG EQU CYREG_B0_UDB12_A0 +scsiTarget_datapath__A1_REG EQU CYREG_B0_UDB12_A1 +scsiTarget_datapath__D0_D1_REG EQU CYREG_B0_UDB12_D0_D1 +scsiTarget_datapath__D0_REG EQU CYREG_B0_UDB12_D0 +scsiTarget_datapath__D1_REG EQU CYREG_B0_UDB12_D1 +scsiTarget_datapath__DP_AUX_CTL_REG EQU CYREG_B0_UDB12_ACTL +scsiTarget_datapath__F0_F1_REG EQU CYREG_B0_UDB12_F0_F1 +scsiTarget_datapath__F0_REG EQU CYREG_B0_UDB12_F0 +scsiTarget_datapath__F1_REG EQU CYREG_B0_UDB12_F1 +scsiTarget_datapath__MSK_DP_AUX_CTL_REG EQU CYREG_B0_UDB12_MSK_ACTL +scsiTarget_datapath__PER_DP_AUX_CTL_REG EQU CYREG_B0_UDB12_MSK_ACTL ; SD_Clk_Ctl SD_Clk_Ctl_Sync_ctrl_reg__0__MASK EQU 0x01 SD_Clk_Ctl_Sync_ctrl_reg__0__POS EQU 0 -SD_Clk_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB01_02_ACTL -SD_Clk_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB01_02_CTL -SD_Clk_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB01_02_CTL -SD_Clk_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB01_02_CTL -SD_Clk_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB01_02_CTL -SD_Clk_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB01_02_MSK -SD_Clk_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB01_02_MSK -SD_Clk_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB01_02_MSK -SD_Clk_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB01_02_MSK -SD_Clk_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB01_ACTL -SD_Clk_Ctl_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB01_CTL -SD_Clk_Ctl_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB01_ST_CTL -SD_Clk_Ctl_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB01_CTL -SD_Clk_Ctl_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB01_ST_CTL +SD_Clk_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB02_03_ACTL +SD_Clk_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG EQU CYREG_B0_UDB02_03_CTL +SD_Clk_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG EQU CYREG_B0_UDB02_03_CTL +SD_Clk_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG EQU CYREG_B0_UDB02_03_CTL +SD_Clk_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG EQU CYREG_B0_UDB02_03_CTL +SD_Clk_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG EQU CYREG_B0_UDB02_03_MSK +SD_Clk_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG EQU CYREG_B0_UDB02_03_MSK +SD_Clk_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG EQU CYREG_B0_UDB02_03_MSK +SD_Clk_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG EQU CYREG_B0_UDB02_03_MSK +SD_Clk_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG EQU CYREG_B0_UDB02_ACTL +SD_Clk_Ctl_Sync_ctrl_reg__CONTROL_REG EQU CYREG_B0_UDB02_CTL +SD_Clk_Ctl_Sync_ctrl_reg__CONTROL_ST_REG EQU CYREG_B0_UDB02_ST_CTL +SD_Clk_Ctl_Sync_ctrl_reg__COUNT_REG EQU CYREG_B0_UDB02_CTL +SD_Clk_Ctl_Sync_ctrl_reg__COUNT_ST_REG EQU CYREG_B0_UDB02_ST_CTL SD_Clk_Ctl_Sync_ctrl_reg__MASK EQU 0x01 -SD_Clk_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB01_MSK_ACTL -SD_Clk_Ctl_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB01_MSK -SD_Clk_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB01_MSK_ACTL +SD_Clk_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG EQU CYREG_B0_UDB02_MSK_ACTL +SD_Clk_Ctl_Sync_ctrl_reg__PERIOD_REG EQU CYREG_B0_UDB02_MSK +SD_Clk_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG EQU CYREG_B0_UDB02_MSK_ACTL ; USBFS_ep_0 USBFS_ep_0__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0 @@ -1138,23 +1233,43 @@ USBFS_ep_0__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0 ; USBFS_ep_1 USBFS_ep_1__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0 USBFS_ep_1__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0 -USBFS_ep_1__INTC_MASK EQU 0x01 -USBFS_ep_1__INTC_NUMBER EQU 0 +USBFS_ep_1__INTC_MASK EQU 0x02 +USBFS_ep_1__INTC_NUMBER EQU 1 USBFS_ep_1__INTC_PRIOR_NUM EQU 7 -USBFS_ep_1__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_0 +USBFS_ep_1__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_1 USBFS_ep_1__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0 USBFS_ep_1__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0 ; USBFS_ep_2 USBFS_ep_2__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0 USBFS_ep_2__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0 -USBFS_ep_2__INTC_MASK EQU 0x02 -USBFS_ep_2__INTC_NUMBER EQU 1 +USBFS_ep_2__INTC_MASK EQU 0x04 +USBFS_ep_2__INTC_NUMBER EQU 2 USBFS_ep_2__INTC_PRIOR_NUM EQU 7 -USBFS_ep_2__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_1 +USBFS_ep_2__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_2 USBFS_ep_2__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0 USBFS_ep_2__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0 +; USBFS_ep_3 +USBFS_ep_3__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0 +USBFS_ep_3__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0 +USBFS_ep_3__INTC_MASK EQU 0x08 +USBFS_ep_3__INTC_NUMBER EQU 3 +USBFS_ep_3__INTC_PRIOR_NUM EQU 7 +USBFS_ep_3__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_3 +USBFS_ep_3__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0 +USBFS_ep_3__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0 + +; USBFS_ep_4 +USBFS_ep_4__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0 +USBFS_ep_4__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0 +USBFS_ep_4__INTC_MASK EQU 0x10 +USBFS_ep_4__INTC_NUMBER EQU 4 +USBFS_ep_4__INTC_PRIOR_NUM EQU 7 +USBFS_ep_4__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_4 +USBFS_ep_4__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0 +USBFS_ep_4__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0 + ; USBFS_USB USBFS_USB__ARB_CFG EQU CYREG_USB_ARB_CFG USBFS_USB__ARB_EP1_CFG EQU CYREG_USB_ARB_EP1_CFG @@ -2735,9 +2850,9 @@ CYDEV_DEBUG_ENABLE_MASK EQU 0x20 CYDEV_DEBUG_ENABLE_REGISTER EQU CYREG_MLOGIC_DEBUG CYDEV_DMA_CHANNELS_AVAILABLE EQU 24 CYDEV_ECC_ENABLE EQU 0 -CYDEV_HEAP_SIZE EQU 0x0256 +CYDEV_HEAP_SIZE EQU 0x0400 CYDEV_INSTRUCT_CACHE_ENABLED EQU 1 -CYDEV_INTR_RISING EQU 0x00000000 +CYDEV_INTR_RISING EQU 0x00000001 CYDEV_PROJ_TYPE EQU 2 CYDEV_PROJ_TYPE_BOOTLOADER EQU 1 CYDEV_PROJ_TYPE_LOADABLE EQU 2 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cypins.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cypins.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cytypes.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cytypes.h old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cyutils.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cyutils.c old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/project.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/project.h index 25691ab..01afa7d 100755 --- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/project.h +++ b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/project.h @@ -59,6 +59,11 @@ #include #include #include +#include +#include +#include +#include +#include #include #include #include diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/protect.hex b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/protect.hex old mode 100644 new mode 100755 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/timer_clock.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/timer_clock.c new file mode 100755 index 0000000..b4c30ae --- /dev/null +++ b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/timer_clock.c @@ -0,0 +1,521 @@ +/******************************************************************************* +* File Name: timer_clock.c +* Version 2.10 +* +* Description: +* This file provides the source code to the API for the clock component. +* +* Note: +* +******************************************************************************** +* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved. +* You may use this file only in accordance with the license, terms, conditions, +* disclaimers, and limitations in the end user license agreement accompanying +* the software package with which this file was provided. +*******************************************************************************/ + +#include +#include "timer_clock.h" + +/* Clock Distribution registers. */ +#define CLK_DIST_LD (* (reg8 *) CYREG_CLKDIST_LD) +#define CLK_DIST_BCFG2 (* (reg8 *) CYREG_CLKDIST_BCFG2) +#define BCFG2_MASK (0x80u) +#define CLK_DIST_DMASK (* (reg8 *) CYREG_CLKDIST_DMASK) +#define CLK_DIST_AMASK (* (reg8 *) CYREG_CLKDIST_AMASK) + +#define HAS_CLKDIST_LD_DISABLE (CY_PSOC3 || CY_PSOC5LP) + + +/******************************************************************************* +* Function Name: timer_clock_Start +******************************************************************************** +* +* Summary: +* Starts the clock. Note that on startup, clocks may be already running if the +* "Start on Reset" option is enabled in the DWR. +* +* Parameters: +* None +* +* Returns: +* None +* +*******************************************************************************/ +void timer_clock_Start(void) +{ + /* Set the bit to enable the clock. */ + timer_clock_CLKEN |= timer_clock_CLKEN_MASK; + timer_clock_CLKSTBY |= timer_clock_CLKSTBY_MASK; +} + + +/******************************************************************************* +* Function Name: timer_clock_Stop +******************************************************************************** +* +* Summary: +* Stops the clock and returns immediately. This API does not require the +* source clock to be running but may return before the hardware is actually +* disabled. If the settings of the clock are changed after calling this +* function, the clock may glitch when it is started. To avoid the clock +* glitch, use the StopBlock function. +* +* Parameters: +* None +* +* Returns: +* None +* +*******************************************************************************/ +void timer_clock_Stop(void) +{ + /* Clear the bit to disable the clock. */ + timer_clock_CLKEN &= (uint8)(~timer_clock_CLKEN_MASK); + timer_clock_CLKSTBY &= (uint8)(~timer_clock_CLKSTBY_MASK); +} + + +#if(CY_PSOC3 || CY_PSOC5LP) + + +/******************************************************************************* +* Function Name: timer_clock_StopBlock +******************************************************************************** +* +* Summary: +* Stops the clock and waits for the hardware to actually be disabled before +* returning. This ensures that the clock is never truncated (high part of the +* cycle will terminate before the clock is disabled and the API returns). +* Note that the source clock must be running or this API will never return as +* a stopped clock cannot be disabled. +* +* Parameters: +* None +* +* Returns: +* None +* +*******************************************************************************/ +void timer_clock_StopBlock(void) +{ + if ((timer_clock_CLKEN & timer_clock_CLKEN_MASK) != 0u) + { +#if HAS_CLKDIST_LD_DISABLE + uint16 oldDivider; + + CLK_DIST_LD = 0u; + + /* Clear all the mask bits except ours. */ +#if defined(timer_clock__CFG3) + CLK_DIST_AMASK = timer_clock_CLKEN_MASK; + CLK_DIST_DMASK = 0x00u; +#else + CLK_DIST_DMASK = timer_clock_CLKEN_MASK; + CLK_DIST_AMASK = 0x00u; +#endif /* timer_clock__CFG3 */ + + /* Clear mask of bus clock. */ + CLK_DIST_BCFG2 &= (uint8)(~BCFG2_MASK); + + oldDivider = CY_GET_REG16(timer_clock_DIV_PTR); + CY_SET_REG16(CYREG_CLKDIST_WRK0, oldDivider); + CLK_DIST_LD = CYCLK_LD_DISABLE | CYCLK_LD_SYNC_EN | CYCLK_LD_LOAD; + + /* Wait for clock to be disabled */ + while ((CLK_DIST_LD & CYCLK_LD_LOAD) != 0u) { } +#endif /* HAS_CLKDIST_LD_DISABLE */ + + /* Clear the bit to disable the clock. */ + timer_clock_CLKEN &= (uint8)(~timer_clock_CLKEN_MASK); + timer_clock_CLKSTBY &= (uint8)(~timer_clock_CLKSTBY_MASK); + +#if HAS_CLKDIST_LD_DISABLE + /* Clear the disable bit */ + CLK_DIST_LD = 0x00u; + CY_SET_REG16(timer_clock_DIV_PTR, oldDivider); +#endif /* HAS_CLKDIST_LD_DISABLE */ + } +} +#endif /* (CY_PSOC3 || CY_PSOC5LP) */ + + +/******************************************************************************* +* Function Name: timer_clock_StandbyPower +******************************************************************************** +* +* Summary: +* Sets whether the clock is active in standby mode. +* +* Parameters: +* state: 0 to disable clock during standby, nonzero to enable. +* +* Returns: +* None +* +*******************************************************************************/ +void timer_clock_StandbyPower(uint8 state) +{ + if(state == 0u) + { + timer_clock_CLKSTBY &= (uint8)(~timer_clock_CLKSTBY_MASK); + } + else + { + timer_clock_CLKSTBY |= timer_clock_CLKSTBY_MASK; + } +} + + +/******************************************************************************* +* Function Name: timer_clock_SetDividerRegister +******************************************************************************** +* +* Summary: +* Modifies the clock divider and, thus, the frequency. When the clock divider +* register is set to zero or changed from zero, the clock will be temporarily +* disabled in order to change the SSS mode bit. If the clock is enabled when +* SetDividerRegister is called, then the source clock must be running. +* +* Parameters: +* clkDivider: Divider register value (0-65,535). This value is NOT the +* divider; the clock hardware divides by clkDivider plus one. For example, +* to divide the clock by 2, this parameter should be set to 1. +* restart: If nonzero, restarts the clock divider: the current clock cycle +* will be truncated and the new divide value will take effect immediately. If +* zero, the new divide value will take effect at the end of the current clock +* cycle. +* +* Returns: +* None +* +*******************************************************************************/ +void timer_clock_SetDividerRegister(uint16 clkDivider, uint8 restart) + +{ + uint8 enabled; + + uint8 currSrc = timer_clock_GetSourceRegister(); + uint16 oldDivider = timer_clock_GetDividerRegister(); + + if (clkDivider != oldDivider) + { + enabled = timer_clock_CLKEN & timer_clock_CLKEN_MASK; + + if ((currSrc == (uint8)CYCLK_SRC_SEL_CLK_SYNC_D) && ((oldDivider == 0u) || (clkDivider == 0u))) + { + /* Moving to/from SSS requires correct ordering to prevent halting the clock */ + if (oldDivider == 0u) + { + /* Moving away from SSS, set the divider first so when SSS is cleared we */ + /* don't halt the clock. Using the shadow load isn't required as the */ + /* divider is ignored while SSS is set. */ + CY_SET_REG16(timer_clock_DIV_PTR, clkDivider); + timer_clock_MOD_SRC &= (uint8)(~CYCLK_SSS); + } + else + { + /* Moving to SSS, set SSS which then ignores the divider and we can set */ + /* it without bothering with the shadow load. */ + timer_clock_MOD_SRC |= CYCLK_SSS; + CY_SET_REG16(timer_clock_DIV_PTR, clkDivider); + } + } + else + { + + if (enabled != 0u) + { + CLK_DIST_LD = 0x00u; + + /* Clear all the mask bits except ours. */ +#if defined(timer_clock__CFG3) + CLK_DIST_AMASK = timer_clock_CLKEN_MASK; + CLK_DIST_DMASK = 0x00u; +#else + CLK_DIST_DMASK = timer_clock_CLKEN_MASK; + CLK_DIST_AMASK = 0x00u; +#endif /* timer_clock__CFG3 */ + /* Clear mask of bus clock. */ + CLK_DIST_BCFG2 &= (uint8)(~BCFG2_MASK); + + /* If clock is currently enabled, disable it if async or going from N-to-1*/ + if (((timer_clock_MOD_SRC & CYCLK_SYNC) == 0u) || (clkDivider == 0u)) + { +#if HAS_CLKDIST_LD_DISABLE + CY_SET_REG16(CYREG_CLKDIST_WRK0, oldDivider); + CLK_DIST_LD = CYCLK_LD_DISABLE|CYCLK_LD_SYNC_EN|CYCLK_LD_LOAD; + + /* Wait for clock to be disabled */ + while ((CLK_DIST_LD & CYCLK_LD_LOAD) != 0u) { } +#endif /* HAS_CLKDIST_LD_DISABLE */ + + timer_clock_CLKEN &= (uint8)(~timer_clock_CLKEN_MASK); + +#if HAS_CLKDIST_LD_DISABLE + /* Clear the disable bit */ + CLK_DIST_LD = 0x00u; +#endif /* HAS_CLKDIST_LD_DISABLE */ + } + } + + /* Load divide value. */ + if ((timer_clock_CLKEN & timer_clock_CLKEN_MASK) != 0u) + { + /* If the clock is still enabled, use the shadow registers */ + CY_SET_REG16(CYREG_CLKDIST_WRK0, clkDivider); + + CLK_DIST_LD = (CYCLK_LD_LOAD | ((restart != 0u) ? CYCLK_LD_SYNC_EN : 0x00u)); + while ((CLK_DIST_LD & CYCLK_LD_LOAD) != 0u) { } + } + else + { + /* If the clock is disabled, set the divider directly */ + CY_SET_REG16(timer_clock_DIV_PTR, clkDivider); + timer_clock_CLKEN |= enabled; + } + } + } +} + + +/******************************************************************************* +* Function Name: timer_clock_GetDividerRegister +******************************************************************************** +* +* Summary: +* Gets the clock divider register value. +* +* Parameters: +* None +* +* Returns: +* Divide value of the clock minus 1. For example, if the clock is set to +* divide by 2, the return value will be 1. +* +*******************************************************************************/ +uint16 timer_clock_GetDividerRegister(void) +{ + return CY_GET_REG16(timer_clock_DIV_PTR); +} + + +/******************************************************************************* +* Function Name: timer_clock_SetModeRegister +******************************************************************************** +* +* Summary: +* Sets flags that control the operating mode of the clock. This function only +* changes flags from 0 to 1; flags that are already 1 will remain unchanged. +* To clear flags, use the ClearModeRegister function. The clock must be +* disabled before changing the mode. +* +* Parameters: +* clkMode: Bit mask containing the bits to set. For PSoC 3 and PSoC 5, +* clkMode should be a set of the following optional bits or'ed together. +* - CYCLK_EARLY Enable early phase mode. Rising edge of output clock will +* occur when the divider count reaches half of the divide +* value. +* - CYCLK_DUTY Enable 50% duty cycle output. When enabled, the output clock +* is asserted for approximately half of its period. When +* disabled, the output clock is asserted for one period of the +* source clock. +* - CYCLK_SYNC Enable output synchronization to master clock. This should +* be enabled for all synchronous clocks. +* See the Technical Reference Manual for details about setting the mode of +* the clock. Specifically, see the CLKDIST.DCFG.CFG2 register. +* +* Returns: +* None +* +*******************************************************************************/ +void timer_clock_SetModeRegister(uint8 modeBitMask) +{ + timer_clock_MOD_SRC |= modeBitMask & (uint8)timer_clock_MODE_MASK; +} + + +/******************************************************************************* +* Function Name: timer_clock_ClearModeRegister +******************************************************************************** +* +* Summary: +* Clears flags that control the operating mode of the clock. This function +* only changes flags from 1 to 0; flags that are already 0 will remain +* unchanged. To set flags, use the SetModeRegister function. The clock must be +* disabled before changing the mode. +* +* Parameters: +* clkMode: Bit mask containing the bits to clear. For PSoC 3 and PSoC 5, +* clkMode should be a set of the following optional bits or'ed together. +* - CYCLK_EARLY Enable early phase mode. Rising edge of output clock will +* occur when the divider count reaches half of the divide +* value. +* - CYCLK_DUTY Enable 50% duty cycle output. When enabled, the output clock +* is asserted for approximately half of its period. When +* disabled, the output clock is asserted for one period of the +* source clock. +* - CYCLK_SYNC Enable output synchronization to master clock. This should +* be enabled for all synchronous clocks. +* See the Technical Reference Manual for details about setting the mode of +* the clock. Specifically, see the CLKDIST.DCFG.CFG2 register. +* +* Returns: +* None +* +*******************************************************************************/ +void timer_clock_ClearModeRegister(uint8 modeBitMask) +{ + timer_clock_MOD_SRC &= (uint8)(~modeBitMask) | (uint8)(~(uint8)(timer_clock_MODE_MASK)); +} + + +/******************************************************************************* +* Function Name: timer_clock_GetModeRegister +******************************************************************************** +* +* Summary: +* Gets the clock mode register value. +* +* Parameters: +* None +* +* Returns: +* Bit mask representing the enabled mode bits. See the SetModeRegister and +* ClearModeRegister descriptions for details about the mode bits. +* +*******************************************************************************/ +uint8 timer_clock_GetModeRegister(void) +{ + return timer_clock_MOD_SRC & (uint8)(timer_clock_MODE_MASK); +} + + +/******************************************************************************* +* Function Name: timer_clock_SetSourceRegister +******************************************************************************** +* +* Summary: +* Sets the input source of the clock. The clock must be disabled before +* changing the source. The old and new clock sources must be running. +* +* Parameters: +* clkSource: For PSoC 3 and PSoC 5 devices, clkSource should be one of the +* following input sources: +* - CYCLK_SRC_SEL_SYNC_DIG +* - CYCLK_SRC_SEL_IMO +* - CYCLK_SRC_SEL_XTALM +* - CYCLK_SRC_SEL_ILO +* - CYCLK_SRC_SEL_PLL +* - CYCLK_SRC_SEL_XTALK +* - CYCLK_SRC_SEL_DSI_G +* - CYCLK_SRC_SEL_DSI_D/CYCLK_SRC_SEL_DSI_A +* See the Technical Reference Manual for details on clock sources. +* +* Returns: +* None +* +*******************************************************************************/ +void timer_clock_SetSourceRegister(uint8 clkSource) +{ + uint16 currDiv = timer_clock_GetDividerRegister(); + uint8 oldSrc = timer_clock_GetSourceRegister(); + + if (((oldSrc != ((uint8)CYCLK_SRC_SEL_CLK_SYNC_D)) && + (clkSource == ((uint8)CYCLK_SRC_SEL_CLK_SYNC_D))) && (currDiv == 0u)) + { + /* Switching to Master and divider is 1, set SSS, which will output master, */ + /* then set the source so we are consistent. */ + timer_clock_MOD_SRC |= CYCLK_SSS; + timer_clock_MOD_SRC = + (timer_clock_MOD_SRC & (uint8)(~timer_clock_SRC_SEL_MSK)) | clkSource; + } + else if (((oldSrc == ((uint8)CYCLK_SRC_SEL_CLK_SYNC_D)) && + (clkSource != ((uint8)CYCLK_SRC_SEL_CLK_SYNC_D))) && (currDiv == 0u)) + { + /* Switching from Master to not and divider is 1, set source, so we don't */ + /* lock when we clear SSS. */ + timer_clock_MOD_SRC = + (timer_clock_MOD_SRC & (uint8)(~timer_clock_SRC_SEL_MSK)) | clkSource; + timer_clock_MOD_SRC &= (uint8)(~CYCLK_SSS); + } + else + { + timer_clock_MOD_SRC = + (timer_clock_MOD_SRC & (uint8)(~timer_clock_SRC_SEL_MSK)) | clkSource; + } +} + + +/******************************************************************************* +* Function Name: timer_clock_GetSourceRegister +******************************************************************************** +* +* Summary: +* Gets the input source of the clock. +* +* Parameters: +* None +* +* Returns: +* The input source of the clock. See SetSourceRegister for details. +* +*******************************************************************************/ +uint8 timer_clock_GetSourceRegister(void) +{ + return timer_clock_MOD_SRC & timer_clock_SRC_SEL_MSK; +} + + +#if defined(timer_clock__CFG3) + + +/******************************************************************************* +* Function Name: timer_clock_SetPhaseRegister +******************************************************************************** +* +* Summary: +* Sets the phase delay of the analog clock. This function is only available +* for analog clocks. The clock must be disabled before changing the phase +* delay to avoid glitches. +* +* Parameters: +* clkPhase: Amount to delay the phase of the clock, in 1.0ns increments. +* clkPhase must be from 1 to 11 inclusive. Other values, including 0, +* disable the clock. clkPhase = 1 produces a 0ns delay and clkPhase = 11 +* produces a 10ns delay. +* +* Returns: +* None +* +*******************************************************************************/ +void timer_clock_SetPhaseRegister(uint8 clkPhase) +{ + timer_clock_PHASE = clkPhase & timer_clock_PHASE_MASK; +} + + +/******************************************************************************* +* Function Name: timer_clock_GetPhase +******************************************************************************** +* +* Summary: +* Gets the phase delay of the analog clock. This function is only available +* for analog clocks. +* +* Parameters: +* None +* +* Returns: +* Phase of the analog clock. See SetPhaseRegister for details. +* +*******************************************************************************/ +uint8 timer_clock_GetPhaseRegister(void) +{ + return timer_clock_PHASE & timer_clock_PHASE_MASK; +} + +#endif /* timer_clock__CFG3 */ + + +/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/timer_clock.h b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/timer_clock.h new file mode 100755 index 0000000..6690d48 --- /dev/null +++ b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/timer_clock.h @@ -0,0 +1,124 @@ +/******************************************************************************* +* File Name: timer_clock.h +* Version 2.10 +* +* Description: +* Provides the function and constant definitions for the clock component. +* +* Note: +* +******************************************************************************** +* Copyright 2008-2012, Cypress Semiconductor Corporation. All rights reserved. +* You may use this file only in accordance with the license, terms, conditions, +* disclaimers, and limitations in the end user license agreement accompanying +* the software package with which this file was provided. +*******************************************************************************/ + +#if !defined(CY_CLOCK_timer_clock_H) +#define CY_CLOCK_timer_clock_H + +#include +#include + + +/*************************************** +* Conditional Compilation Parameters +***************************************/ + +/* Check to see if required defines such as CY_PSOC5LP are available */ +/* They are defined starting with cy_boot v3.0 */ +#if !defined (CY_PSOC5LP) + #error Component cy_clock_v2_10 requires cy_boot v3.0 or later +#endif /* (CY_PSOC5LP) */ + + +/*************************************** +* Function Prototypes +***************************************/ + +void timer_clock_Start(void) ; +void timer_clock_Stop(void) ; + +#if(CY_PSOC3 || CY_PSOC5LP) +void timer_clock_StopBlock(void) ; +#endif /* (CY_PSOC3 || CY_PSOC5LP) */ + +void timer_clock_StandbyPower(uint8 state) ; +void timer_clock_SetDividerRegister(uint16 clkDivider, uint8 restart) + ; +uint16 timer_clock_GetDividerRegister(void) ; +void timer_clock_SetModeRegister(uint8 modeBitMask) ; +void timer_clock_ClearModeRegister(uint8 modeBitMask) ; +uint8 timer_clock_GetModeRegister(void) ; +void timer_clock_SetSourceRegister(uint8 clkSource) ; +uint8 timer_clock_GetSourceRegister(void) ; +#if defined(timer_clock__CFG3) +void timer_clock_SetPhaseRegister(uint8 clkPhase) ; +uint8 timer_clock_GetPhaseRegister(void) ; +#endif /* defined(timer_clock__CFG3) */ + +#define timer_clock_Enable() timer_clock_Start() +#define timer_clock_Disable() timer_clock_Stop() +#define timer_clock_SetDivider(clkDivider) timer_clock_SetDividerRegister(clkDivider, 1u) +#define timer_clock_SetDividerValue(clkDivider) timer_clock_SetDividerRegister((clkDivider) - 1u, 1u) +#define timer_clock_SetMode(clkMode) timer_clock_SetModeRegister(clkMode) +#define timer_clock_SetSource(clkSource) timer_clock_SetSourceRegister(clkSource) +#if defined(timer_clock__CFG3) +#define timer_clock_SetPhase(clkPhase) timer_clock_SetPhaseRegister(clkPhase) +#define timer_clock_SetPhaseValue(clkPhase) timer_clock_SetPhaseRegister((clkPhase) + 1u) +#endif /* defined(timer_clock__CFG3) */ + + +/*************************************** +* Registers +***************************************/ + +/* Register to enable or disable the clock */ +#define timer_clock_CLKEN (* (reg8 *) timer_clock__PM_ACT_CFG) +#define timer_clock_CLKEN_PTR ((reg8 *) timer_clock__PM_ACT_CFG) + +/* Register to enable or disable the clock */ +#define timer_clock_CLKSTBY (* (reg8 *) timer_clock__PM_STBY_CFG) +#define timer_clock_CLKSTBY_PTR ((reg8 *) timer_clock__PM_STBY_CFG) + +/* Clock LSB divider configuration register. */ +#define timer_clock_DIV_LSB (* (reg8 *) timer_clock__CFG0) +#define timer_clock_DIV_LSB_PTR ((reg8 *) timer_clock__CFG0) +#define timer_clock_DIV_PTR ((reg16 *) timer_clock__CFG0) + +/* Clock MSB divider configuration register. */ +#define timer_clock_DIV_MSB (* (reg8 *) timer_clock__CFG1) +#define timer_clock_DIV_MSB_PTR ((reg8 *) timer_clock__CFG1) + +/* Mode and source configuration register */ +#define timer_clock_MOD_SRC (* (reg8 *) timer_clock__CFG2) +#define timer_clock_MOD_SRC_PTR ((reg8 *) timer_clock__CFG2) + +#if defined(timer_clock__CFG3) +/* Analog clock phase configuration register */ +#define timer_clock_PHASE (* (reg8 *) timer_clock__CFG3) +#define timer_clock_PHASE_PTR ((reg8 *) timer_clock__CFG3) +#endif /* defined(timer_clock__CFG3) */ + + +/************************************** +* Register Constants +**************************************/ + +/* Power manager register masks */ +#define timer_clock_CLKEN_MASK timer_clock__PM_ACT_MSK +#define timer_clock_CLKSTBY_MASK timer_clock__PM_STBY_MSK + +/* CFG2 field masks */ +#define timer_clock_SRC_SEL_MSK timer_clock__CFG2_SRC_SEL_MASK +#define timer_clock_MODE_MASK (~(timer_clock_SRC_SEL_MSK)) + +#if defined(timer_clock__CFG3) +/* CFG3 phase mask */ +#define timer_clock_PHASE_MASK timer_clock__CFG3_PHASE_DLY_MASK +#endif /* defined(timer_clock__CFG3) */ + +#endif /* CY_CLOCK_timer_clock_H */ + + +/* [] END OF FILE */ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/SCSI2SD.cycdx b/software/SCSI2SD/SCSI2SD.cydsn/SCSI2SD.cycdx index 54c6eb9..265ed9e 100755 --- a/software/SCSI2SD/SCSI2SD.cydsn/SCSI2SD.cycdx +++ b/software/SCSI2SD/SCSI2SD.cydsn/SCSI2SD.cycdx @@ -1,24 +1,32 @@ - + + + + + + + + + + - - - - + - + - + - + + + - - + + @@ -86,32 +94,93 @@ - - - - - - + + + + + - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - - - - + + + + + - + - - - - - + + + + + - + + + \ No newline at end of file diff --git a/software/SCSI2SD/SCSI2SD.cydsn/SCSI2SD.cydwr b/software/SCSI2SD/SCSI2SD.cydsn/SCSI2SD.cydwr index 33f3890..96ace51 100755 Binary files a/software/SCSI2SD/SCSI2SD.cydsn/SCSI2SD.cydwr and b/software/SCSI2SD/SCSI2SD.cydsn/SCSI2SD.cydwr differ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/SCSI2SD.cyfit b/software/SCSI2SD/SCSI2SD.cydsn/SCSI2SD.cyfit index 07c3b4b..02f02b0 100755 Binary files a/software/SCSI2SD/SCSI2SD.cydsn/SCSI2SD.cyfit and b/software/SCSI2SD/SCSI2SD.cydsn/SCSI2SD.cyfit differ diff --git a/software/SCSI2SD/SCSI2SD.cydsn/SCSI2SD.cyprj b/software/SCSI2SD/SCSI2SD.cydsn/SCSI2SD.cyprj index f2ce857..b2cb899 100755 --- a/software/SCSI2SD/SCSI2SD.cydsn/SCSI2SD.cyprj +++ b/software/SCSI2SD/SCSI2SD.cydsn/SCSI2SD.cyprj @@ -2447,6 +2447,225 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -3018,7 +3237,7 @@ - + @@ -3048,6 +3267,6 @@ - + \ No newline at end of file diff --git a/software/SCSI2SD/SCSI2SD.cydsn/SCSI2SD.svd b/software/SCSI2SD/SCSI2SD.cydsn/SCSI2SD.svd index d68005c..66a63b4 100755 --- a/software/SCSI2SD/SCSI2SD.cydsn/SCSI2SD.svd +++ b/software/SCSI2SD/SCSI2SD.cydsn/SCSI2SD.svd @@ -490,10 +490,344 @@ + + Debug_Timer + No description available + 0x400043A3 + + 0 + 0xB64 + registers + + + + Debug_Timer_GLOBAL_ENABLE + PM.ACT.CFG + 0x0 + 8 + read-write + 0 + 0 + + + en_timer + Enable timer/counters. + 0 + 3 + read-write + + + + + Debug_Timer_CONTROL + TMRx.CFG0 + 0xB5D + 8 + read-write + 0 + 0 + + + EN + Enables timer/comparator. + 0 + 0 + read-write + + + MODE + Mode. (0 = Timer; 1 = Comparator) + 1 + 1 + read-write + + + Timer + Timer mode. CNT/CMP register holds timer count value. + 0 + + + Comparator + Comparator mode. CNT/CMP register holds comparator threshold value. + 1 + + + + + ONESHOT + Timer stops upon reaching stop condition defined by TMR_CFG bits. Can be restarted by asserting TIMER RESET or disabling and re-enabling block. + 2 + 2 + read-write + + + CMP_BUFF + Buffer compare register. Compare register updates only on timer terminal count. + 3 + 3 + read-write + + + INV + Invert sense of TIMEREN signal + 4 + 4 + read-write + + + DB + Deadband mode--Deadband phases phi1 and phi2 are outputted on CMP and TC output pins respectively. + 5 + 5 + read-write + + + Timer + CMP and TC are output. + 0 + + + Deadband + PHI1 (instead of CMP) and PHI2 (instead of TC) are output. + 1 + + + + + DEADBAND_PERIOD + Deadband Period + 6 + 7 + read-write + + + + + Debug_Timer_CONTROL2 + TMRx.CFG1 + 0xB5E + 8 + read-write + 0 + 0 + + + IRQ_SEL + Irq selection. (0 = raw interrupts; 1 = status register interrupts) + 0 + 0 + read-write + + + FTC + First Terminal Count (FTC). Setting this bit forces a single pulse on the TC pin when first enabled. + 1 + 1 + read-write + + + Disable_FTC + Disable the single cycle pulse, which signifies the timer is starting. + 0 + + + Enable_FTC + Enable the single cycle pulse, which signifies the timer is starting. + 1 + + + + + DCOR + Disable Clear on Read (DCOR) of Status Register SR0. + 2 + 2 + read-write + + + DBMODE + Deadband mode (asynchronous/synchronous). CMP output pin is also affected when not in deadband mode (CFG0.DEADBAND). + 3 + 3 + read-write + + + CLK_BUS_EN_SEL + Digital Global Clock selection. + 4 + 6 + read-write + + + BUS_CLK_SEL + Bus Clock selection. + 7 + 7 + read-write + + + + + Debug_Timer_CONTROL3_ + TMRx.CFG2 + 0xB5F + 8 + read-write + 0 + 0 + + + TMR_CFG + Timer configuration (MODE = 0): 000 = Continuous; 001 = Pulsewidth; 010 = Period; 011 = Stop on IRQ + 0 + 1 + read-write + + + Continuous + Timer runs while EN bit of CFG0 register is set to '1'. + 0 + + + Pulsewidth + Timer runs from positive to negative edge of TIMEREN. + 1 + + + Period + Timer runs from positive to positive edge of TIMEREN. + 2 + + + Irq + Timer runs until IRQ. + 3 + + + + + COD + Clear On Disable (COD). Clears or gates outputs to zero. + 2 + 2 + read-write + + + ROD + Reset On Disable (ROD). Resets internal state of output logic + 3 + 3 + read-write + + + CMP_CFG + Comparator configurations + 4 + 6 + read-write + + + Equal + Compare Equal + 0 + + + Less_than + Compare Less Than + 1 + + + Less_than_or_equal + Compare Less Than or Equal . + 2 + + + Greater + Compare Greater Than . + 3 + + + Greater_than_or_equal + Compare Greater Than or Equal + 4 + + + + + HW_EN + When set Timer Enable controls counting. + 7 + 7 + read-write + + + + + Debug_Timer_PERIOD + TMRx.PER0 - Assigned Period + 0xB61 + 16 + read-write + 0 + 0 + + + Debug_Timer_COUNTER + TMRx.CNT_CMP0 - Current Down Counter Value + 0xB63 + 16 + read-write + 0 + 0 + + + + + SCSI_Out_Ctl + No description available + 0x40006473 + + 0 + 0x1 + registers + + + + SCSI_Out_Ctl_CONTROL_REG + No description available + 0x0 + 8 + read-write + 0 + 0 + + + + + SCSI_Out_Bits + No description available + 0x40006470 + + 0 + 0x1 + registers + + + + SCSI_Out_Bits_CONTROL_REG + No description available + 0x0 + 8 + read-write + 0 + 0 + + + SD_Clk_Ctl No description available - 0x40006471 + 0x40006472 0 0x1 @@ -514,7 +848,7 @@ SCSI_CTL_PHASE No description available - 0x40006472 + 0x40006475 0 0x1 diff --git a/software/SCSI2SD/SCSI2SD.cydsn/TopDesign/TopDesign.cysch b/software/SCSI2SD/SCSI2SD.cydsn/TopDesign/TopDesign.cysch index 39b5ca7..afb8fbd 100755 Binary files a/software/SCSI2SD/SCSI2SD.cydsn/TopDesign/TopDesign.cysch and b/software/SCSI2SD/SCSI2SD.cydsn/TopDesign/TopDesign.cysch differ diff --git a/software/SCSI2SD/src/config.c b/software/SCSI2SD/src/config.c index 63c24ab..fa0693b 100755 --- a/software/SCSI2SD/src/config.c +++ b/software/SCSI2SD/src/config.c @@ -47,7 +47,8 @@ static Config shadow = enum USB_ENDPOINTS { USB_EP_OUT = 1, - USB_EP_IN = 2 + USB_EP_IN = 2, + USB_EP_DEBUG = 4 }; enum USB_STATE { @@ -55,6 +56,8 @@ enum USB_STATE USB_DATA_SENT }; int usbInEpState; +int usbDebugEpState; +uint8_t debugBuffer[64]; int usbReady; @@ -148,7 +151,7 @@ void configInit() // The PSoC must be operating between 4.6V and 5V for the regulator // to work. USBFS_Start(0, USBFS_5V_OPERATION); - usbInEpState = USB_IDLE; + usbInEpState = usbDebugEpState = USB_IDLE; usbReady = 0; // We don't know if host is connected yet. } @@ -169,7 +172,7 @@ void configPoll() if (reset) { USBFS_EnableOutEP(USB_EP_OUT); - usbInEpState = USB_IDLE; + usbInEpState = usbDebugEpState = USB_IDLE; } if(USBFS_GetEPState(USB_EP_OUT) == USBFS_OUT_BUFFER_FULL) @@ -219,24 +222,6 @@ void configPoll() shadow.maxSectors = htonl(shadow.maxSectors); shadow.bytesPerSector = htons(shadow.bytesPerSector); - #ifdef MM_DEBUG - memcpy(&shadow.reserved, &scsiDev.cdb, 12); - shadow.reserved[12] = scsiDev.msgIn; - shadow.reserved[13] = scsiDev.msgOut; - shadow.reserved[14] = scsiDev.lastStatus; - shadow.reserved[15] = scsiDev.lastSense; - shadow.reserved[16] = scsiDev.phase; - shadow.reserved[17] = SCSI_ReadPin(SCSI_In_BSY); - shadow.reserved[18] = SCSI_ReadPin(SCSI_In_SEL); - shadow.reserved[19] = SCSI_ReadPin(SCSI_ATN_INT); - shadow.reserved[20] = SCSI_ReadPin(SCSI_RST_INT); - shadow.reserved[21] = scsiDev.rstCount; - shadow.reserved[22] = scsiDev.selCount; - shadow.reserved[23] = scsiDev.msgCount; - shadow.reserved[24] = scsiDev.cmdCount; - shadow.reserved[25] = scsiDev.watchdogTick; - #endif - USBFS_LoadInEP(USB_EP_IN, (uint8 *)&shadow, sizeof(shadow)); shadow.maxSectors = ntohl(shadow.maxSectors); shadow.bytesPerSector = ntohs(shadow.bytesPerSector); @@ -253,6 +238,67 @@ void configPoll() } } +void debugPoll() +{ + if (!usbReady) + { + return; + } + + switch (usbDebugEpState) + { + case USB_IDLE: + memcpy(&debugBuffer, &scsiDev.cdb, 12); + debugBuffer[12] = scsiDev.msgIn; + debugBuffer[13] = scsiDev.msgOut; + debugBuffer[14] = scsiDev.lastStatus; + debugBuffer[15] = scsiDev.lastSense; + debugBuffer[16] = scsiDev.phase; + debugBuffer[17] = SCSI_ReadPin(SCSI_In_BSY); + debugBuffer[18] = SCSI_ReadPin(SCSI_In_SEL); + debugBuffer[19] = SCSI_ReadPin(SCSI_ATN_INT); + debugBuffer[20] = SCSI_ReadPin(SCSI_RST_INT); + debugBuffer[21] = scsiDev.rstCount; + debugBuffer[22] = scsiDev.selCount; + debugBuffer[23] = scsiDev.msgCount; + debugBuffer[24] = scsiDev.cmdCount; + debugBuffer[25] = scsiDev.watchdogTick; + + USBFS_LoadInEP(USB_EP_DEBUG, (uint8 *)&debugBuffer, sizeof(debugBuffer)); + usbDebugEpState = USB_DATA_SENT; + break; + + case USB_DATA_SENT: + if (USBFS_bGetEPAckState(USB_EP_DEBUG)) + { + // Data accepted. + usbDebugEpState = USB_IDLE; + } + break; + } +} + +CY_ISR(debugTimerISR) +{ + Debug_Timer_ReadStatusRegister(); + Debug_Timer_Interrupt_ClearPending(); + uint8 savedIntrStatus = CyEnterCriticalSection(); + debugPoll(); + CyExitCriticalSection(savedIntrStatus); +} + +void debugInit() +{ +#ifdef MM_DEBUG + Debug_Timer_Interrupt_StartEx(debugTimerISR); + Debug_Timer_Start(); +#else + Debug_Timer_Interrupt_Stop(); + Debug_Timer_Stop(); +#endif + +} + // Public method for storing MODE SELECT results. void configSave() { diff --git a/software/SCSI2SD/src/config.h b/software/SCSI2SD/src/config.h index 8867038..c95474f 100755 --- a/software/SCSI2SD/src/config.h +++ b/software/SCSI2SD/src/config.h @@ -38,6 +38,7 @@ typedef struct extern Config* config; void configInit(void); +void debugInit(void); void configPoll(void); void configSave(void); diff --git a/software/SCSI2SD/src/disk.c b/software/SCSI2SD/src/disk.c index d9961d3..6ae4d85 100755 --- a/software/SCSI2SD/src/disk.c +++ b/software/SCSI2SD/src/disk.c @@ -179,6 +179,8 @@ static void doWrite(uint32 lba, uint32 blocks) // No need for single-block writes atm. Overhead of the // multi-block write is minimal. transfer.multiBlock = 1; + + if (blocks > 1) scsiDev.needReconnect = 1; sdPrepareWrite(); } } @@ -214,6 +216,7 @@ static void doRead(uint32 lba, uint32 blocks) else { transfer.multiBlock = 1; + scsiDev.needReconnect = 1; sdPrepareRead(); } } diff --git a/software/SCSI2SD/src/main.c b/software/SCSI2SD/src/main.c index c738428..d799d3b 100755 --- a/software/SCSI2SD/src/main.c +++ b/software/SCSI2SD/src/main.c @@ -36,6 +36,7 @@ int main() scsiPhyInit(); configInit(); + debugInit(); scsiInit(); scsiDiskInit(); diff --git a/software/SCSI2SD/src/scsi.c b/software/SCSI2SD/src/scsi.c index a687cef..fb91c1d 100755 --- a/software/SCSI2SD/src/scsi.c +++ b/software/SCSI2SD/src/scsi.c @@ -118,8 +118,86 @@ static void enter_Status(uint8 status) #endif } +static void doReselectTest() +{ + scsiDev.needReconnect = 0; + scsiEnterPhase(MESSAGE_IN); + scsiWriteByte(0x02); // save data pointer + + // TODO check if this message was rejected. + + scsiWriteByte(0x04); // disconnect msg. + enter_BusFree(); + + CyDelay(100); + + while (1) + { + int sel = SCSI_ReadPin(SCSI_In_SEL); + int bsy = SCSI_ReadPin(SCSI_In_BSY); + if (!sel && !bsy) + { + // TODO wait bus settle delay + CyDelayUs(1); // TODO bus free delay 800ns + + // Arbitrate. + ledOn(); + SCSI_Out_Bits_Write(scsiDev.scsiIdMask); + SCSI_Out_Ctl_Write(1); // Write bits manually. + SCSI_SetPin(SCSI_Out_BSY); + + CyDelayUs(3); // arbitrate delay. 2.4us. + + uint8_t dbx = scsiReadDBxPins(); + sel = SCSI_ReadPin(SCSI_In_SEL); + if (sel || ((dbx ^ scsiDev.scsiIdMask) > scsiDev.scsiIdMask)) + { + // Lost arbitration. + SCSI_Out_Ctl_Write(0); + SCSI_ClearPin(SCSI_Out_BSY); + ledOff(); + } + else + { + // Won arbitration + SCSI_SetPin(SCSI_Out_SEL); + CyDelayUs(1); // Bus clear + Bus settle. + + // Reselection phase + scsiEnterPhase(__scsiphase_io); // TODO get rid of delay + SCSI_Out_Bits_Write(scsiDev.scsiIdMask | (1 << scsiDev.initiatorId)); + CyDelayCycles(4); // 2 deskew delays + SCSI_ClearPin(SCSI_Out_BSY); + CyDelayUs(1); // Bus Settle Delay + + bsy = SCSI_ReadPin(SCSI_In_BSY); + while (!bsy) { bsy = SCSI_ReadPin(SCSI_In_BSY); } // Wait for initiator. + SCSI_SetPin(SCSI_Out_BSY); + + // Prepare for the initial IDENTIFY message. + scsiEnterPhase(MESSAGE_IN); + + SCSI_Out_Ctl_Write(0); + SCSI_ClearPin(SCSI_Out_SEL); + + // Send identify command + scsiWriteByte(0x80); + break; + } + } + + } + + // Continue with status. + +} + static void process_Status() { + if (scsiDev.status == GOOD && scsiDev.needReconnect && scsiDev.allowDisconnect) + { + // doReselectTest(); + } scsiEnterPhase(STATUS); uint8 message; @@ -425,11 +503,13 @@ static void scsiReset() ledOff(); scsiPhyReset(); + SCSI_Out_Ctl_Write(0); scsiDev.parityError = 0; scsiDev.phase = BUS_FREE; scsiDev.atnFlag = 0; scsiDev.resetFlag = 0; + scsiDev.needReconnect = 0; if (scsiDev.unitAttention != POWER_ON_RESET) { @@ -464,6 +544,8 @@ static void enter_SelectionPhase() scsiDev.dataLen = 0; scsiDev.status = GOOD; scsiDev.phase = SELECTION; + scsiDev.needReconnect = 0; + scsiDev.allowDisconnect = 0; transfer.blocks = 0; transfer.currentBlock = 0; @@ -640,8 +722,12 @@ static void process_MessageOut() (scsiDev.msgOut & 0x7) // We only support LUN 0! ) { + //scsiDev.sense.code = ILLEGAL_REQUEST; + //scsiDev.sense.asc = INVALID_BITS_IN_IDENTIFY_MESSAGE; + //enter_Status(CHECK_CONDITION); messageReject(); } + scsiDev.allowDisconnect = scsiDev.msgOut & 0x40; } else if (scsiDev.msgOut >= 0x20 && scsiDev.msgOut <= 0x2F) { diff --git a/software/SCSI2SD/src/scsi.h b/software/SCSI2SD/src/scsi.h index 4ed618b..5da10f5 100755 --- a/software/SCSI2SD/src/scsi.h +++ b/software/SCSI2SD/src/scsi.h @@ -63,7 +63,7 @@ typedef enum } SCSI_MESSAGE; // Maximum value for bytes-per-sector. -#define MAX_SECTOR_SIZE 2048 +#define MAX_SECTOR_SIZE 8192 #define MIN_SECTOR_SIZE 64 typedef struct @@ -118,6 +118,9 @@ typedef struct uint8 lastStatus; uint8 lastSense; #endif + +uint8 allowDisconnect; +uint8 needReconnect; } ScsiDevice; extern ScsiDevice scsiDev; diff --git a/software/SCSI2SD/src/sd.c b/software/SCSI2SD/src/sd.c index fb07bb9..f11d2e0 100755 --- a/software/SCSI2SD/src/sd.c +++ b/software/SCSI2SD/src/sd.c @@ -191,10 +191,10 @@ static void doReadSector(uint32_t numBytes) CY_SET_REG8(SDCard_TXDATA_PTR, 0xFF); // Put a byte in the FIFO CY_SET_REG8(SDCard_TXDATA_PTR, 0xFF); // Put a byte in the FIFO CY_SET_REG8(SDCard_TXDATA_PTR, 0xFF); // Put a byte in the FIFO - + i = 0; guard = 0; - + // This loop is critically important for performance. // We stream data straight from the SDCard fifos into the SCSI component // FIFO's. If the loop isn't fast enough, the transmit FIFO's will empty, @@ -207,42 +207,44 @@ static void doReadSector(uint32_t numBytes) // Read from the SPIM fifo if there is room to stream the byte to the // SCSI fifos if((sdRxStatus & SDCard_STS_RX_FIFO_NOT_EMPTY) && - (scsiDev.resetFlag || (scsiStatus & 1)) // SCSI TX FIFO NOT FULL + (scsiStatus & 1) // SCSI TX FIFO NOT FULL ) { uint8_t val = CY_GET_REG8(SDCard_RXDATA_PTR); CY_SET_REG8(scsiTarget_datapath__F0_REG, val); guard++; - } + // How many bytes are in a 4-byte FIFO ? 5. 4 FIFO bytes PLUS one byte + // being processed bit-by-bit. Artifically limit the number of bytes in the + // "combined" SPIM TX and RX FIFOS to the individual FIFO size. + // Unlike the SCSI component, SPIM doesn't check if there's room in + // the output FIFO before starting to transmit. + + if (prep < numBytes) + { + CY_SET_REG8(SDCard_TXDATA_PTR, 0xFF); // Put a byte in the FIFO + prep++; + } + + } + // Byte has been sent out the SCSI interface. - if (scsiDev.resetFlag || (scsiStatus & 2)) // SCSI RX FIFO NOT EMPTY + if (scsiStatus & 2) // SCSI RX FIFO NOT EMPTY { CY_GET_REG8(scsiTarget_datapath__F1_REG); ++i; } - - // How many bytes are in a 4-byte FIFO ? 5. 4 FIFO bytes PLUS one byte - // being processed bit-by-bit. Artifically limit the number of bytes in the - // "combined" SPIM TX and RX FIFOS to the individual FIFO size. - // Unlike the SCSI component, SPIM doesn't check if there's room in - // the output FIFO before starting to transmit. - if ((prep - guard < 4) && (prep < numBytes)) - { - CY_SET_REG8(SDCard_TXDATA_PTR, 0xFF); // Put a byte in the FIFO - prep++; - } } - // Read and discard remaining bytes. - while (i < SD_SECTOR_SIZE) + // Read and discard remaining bytes. This applis for non-512 byte sectors, + // or if a SCSI reset was triggered. + while (guard < SD_SECTOR_SIZE) { uint8_t sdRxStatus = CY_GET_REG8(SDCard_RX_STATUS_PTR); if(sdRxStatus & SDCard_STS_RX_FIFO_NOT_EMPTY) { CY_GET_REG8(SDCard_RXDATA_PTR); guard++; - i++; } if ((prep - guard < 4) && (prep < SD_SECTOR_SIZE)) @@ -430,7 +432,7 @@ static int doWriteSector(uint32_t numBytes) { uint8_t sdRxStatus = CY_GET_REG8(SDCard_RX_STATUS_PTR); - if(guard - i < 4) + if((guard - i < 4) && (guard < SD_SECTOR_SIZE)) { CY_SET_REG8(SDCard_TXDATA_PTR, 0x00); guard++; diff --git a/software/scsi2sd-config/main.c b/software/scsi2sd-config/main.c index 99d3904..11e3838 100644 --- a/software/scsi2sd-config/main.c +++ b/software/scsi2sd-config/main.c @@ -163,10 +163,11 @@ static void usage() printf("\t\trequired by the SCSI-2 standard.\n\n"); printf("--no-attention\tDisable Unit Attention responses.\n\n"); printf("--blocks={0-4294967295}\n\t\tSet a limit to the reported device size.\n"); - printf("\t\tEach block is 512 bytes. The maximum possible size is 2TB.\n"); + printf("\t\tThe size of each block/sector is set by the --sector parameter.\n"); printf("\t\tThe reported size will be the lower of this value and the SD\n"); - printf("\t\tcard size. 0 disables the limit.\n\n"); - printf("--sector={64-2048}\n\t\tSet the bytes-per-sector. Normally 512 bytes.\n"); + printf("\t\tcard size. 0 disables the limit.\n"); + printf("\t\tThe maximum possible size is 2TB.\n\n"); + printf("--sector={64-8192}\n\t\tSet the bytes-per-sector. Normally 512 bytes.\n"); printf("\t\tCan also be set with a SCSI MODE SELECT command.\n\n"); printf("--apple\t\tSet the vendor, product ID and revision fields to simulate an \n"); printf("\t\tapple-suppled disk. Provides support for the Apple Drive Setup\n"); @@ -345,7 +346,7 @@ int main(int argc, char* argv[]) { int64_t bytesPerSector = -1; if (sscanf(optarg, "%" PRId64, &bytesPerSector) == 1 && - bytesPerSector >= 64 && bytesPerSector <= 2048) + bytesPerSector >= 64 && bytesPerSector <= 8192) { packet.bytesPerSector = bytesPerSector; } diff --git a/software/scsi2sd-debug/.gitignore b/software/scsi2sd-debug/.gitignore new file mode 100644 index 0000000..567609b --- /dev/null +++ b/software/scsi2sd-debug/.gitignore @@ -0,0 +1 @@ +build/ diff --git a/software/scsi2sd-debug/Makefile b/software/scsi2sd-debug/Makefile new file mode 100644 index 0000000..d286620 --- /dev/null +++ b/software/scsi2sd-debug/Makefile @@ -0,0 +1,24 @@ +all: build/scsi2sd-debug + +CFLAGS += -Wall + +UNAME_S := $(shell uname -s) +ifeq ($(UNAME_S),Linux) + HID_C = ../bootloaderhost/hidapi/linux/hid.c + LDFLAGS += -ludev +endif +ifeq ($(UNAME_S),Darwin) + # Should match OSX + HID_C = ../bootloaderhost/hidapi/mac/hid.c + LDFLAGS += -framework IOKit -framework CoreFoundation + CFLAGS += -mmacosx-version-min=10.5 -arch x86_64 -arch i386 -arch ppc -isysroot /Xcode3.1.4/SDKs/MacOSX10.5.sdk + CC=/Xcode3.1.4/usr/bin/gcc +endif + + +build/scsi2sd-debug: main.c $(HID_C) $(CYAPI) + mkdir -p $(dir $@) + $(CC) $(CFLAGS) -I ../bootloaderhost/hidapi/hidapi $^ $(LDFLAGS) -o $@ + +clean: + rm build/scsi2sd-debug diff --git a/software/scsi2sd-debug/Makefile.mingw b/software/scsi2sd-debug/Makefile.mingw new file mode 100644 index 0000000..4fae0f6 --- /dev/null +++ b/software/scsi2sd-debug/Makefile.mingw @@ -0,0 +1,19 @@ +all: build/windows/32bit/scsi2sd-debug.exe build/windows/64bit/scsi2sd-debug.exe + +CFLAGS += -Wall +LDFLAGS=-mconsole -mwindows -lsetupapi -lws2_32 + +HID_C = ../bootloaderhost/hidapi/windows/hid.c + + +build/windows/32bit/scsi2sd-debug.exe: main.c $(HID_C) + mkdir -p $(dir $@) + i686-w64-mingw32-gcc $(CFLAGS) -I ../bootloaderhost/hidapi/hidapi $^ $(LDFLAGS) -o $@ + +build/windows/64bit/scsi2sd-debug.exe: main.c $(HID_C) + mkdir -p $(dir $@) + x86_64-w64-mingw32-gcc $(CFLAGS) -I ../bootloaderhost/hidapi/hidapi $^ $(LDFLAGS) -o $@ + +clean: + rm -r build/windows + diff --git a/software/scsi2sd-debug/main.c b/software/scsi2sd-debug/main.c new file mode 100644 index 0000000..211b554 --- /dev/null +++ b/software/scsi2sd-debug/main.c @@ -0,0 +1,137 @@ +// Copyright (C) 2014 Michael McMaster +// +// This file is part of SCSI2SD. +// +// SCSI2SD is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// SCSI2SD is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with SCSI2SD. If not, see . + +#include +#include +#include +#include +#include +#include +#include + +// htonl/ntohl includes. +#ifdef WIN32 +#include +#else +#include +#endif + +#include "hidapi.h" + +#define MIN(a,b) (a < b ? a : b) + +FILE* logfile = NULL; + +static void readConfig(hid_device* handle) +{ + // First byte is the report ID (0) + unsigned char buf[65]; + memset(buf, 0, sizeof(buf)); + int result = hid_read(handle, buf, sizeof(buf)); + + if (result < 0) + { + fprintf(stderr, "USB HID Read Failure: %ls\n", hid_error(handle)); + } + int i; + for (i = 0; i < 32; ++i) + { + fprintf(logfile, "%02x ", buf[i]); + } + fprintf(logfile, "\n"); + fflush(logfile); +} + +static void usage() +{ + printf("Usage: scsi2sd-debug outputfile\n"); + printf("\n"); + printf("outputfile\tPath to the output log file.\n\n"); + printf("\n\n"); + exit(1); +} + + +int main(int argc, char* argv[]) +{ + printf("SCSI2SD Debug Utility.\n"); + printf("Copyright (C) 2014 Michael McMaster \n\n"); + + if (argc != 2) + { + usage(); + exit(1); + } + + logfile = fopen(argv[1], "w"); + if (!logfile) + { + fprintf(stderr, "Could not write to file %s.\n", argv[1]); + exit(1); + } + + + uint16_t vendorId = 0x04B4; // Cypress + uint16_t productId = 0x1337; // SCSI2SD + + printf( + "USB device parameters\n\tVendor ID:\t0x%04X\n\tProduct ID:\t0x%04X\n", + vendorId, + productId); + + // Enumerate and print the HID devices on the system + struct hid_device_info *dev = hid_enumerate(vendorId, productId); + + // We need the SECOND interface for debug data + if (!dev) + { + fprintf(stderr, "ERROR: SCSI2SD USB device not found.\n"); + exit(1); + } + else if (!dev->next) + { + fprintf(stderr, "ERROR: SCSI2SD Debug firmware not enabled.\n"); + exit(1); + } + dev = dev->next; + + printf("USB Device Found\n type: %04hx %04hx\n path: %s\n serial_number: %ls", + dev->vendor_id, dev->product_id, dev->path, dev->serial_number); + printf("\n"); + printf(" Manufacturer: %ls\n", dev->manufacturer_string); + printf(" Product: %ls\n", dev->product_string); + printf("\n"); + + hid_device* handle = hid_open_path(dev->path); + if (!handle) + { + fprintf( + stderr, + "ERROR: Could not open device %s. Check permissions.\n", dev->path + ); + exit(1); + } + + + while (1) + { + readConfig(handle); + } + + return 0; +} +