From c31b2eab8e3d8bc36142d64f234f0b7ac7750585 Mon Sep 17 00:00:00 2001 From: Michael McMaster Date: Mon, 15 Feb 2021 11:30:01 +1000 Subject: [PATCH] More fixes, SD over USB HS still not working --- STM32CubeMX/2020c.diff | 211 +++++++++++++++++++++++++++++++++++ STM32CubeMX/2021.diff | 211 +++++++++++++++++++++++++++++++++++ src/firmware/bsp_driver_sd.c | 26 ++--- src/firmware/bsp_driver_sd.h | 8 +- src/firmware/config.c | 8 +- src/firmware/disk.c | 6 +- src/firmware/main.c | 21 ++-- src/firmware/sd.c | 2 +- 8 files changed, 457 insertions(+), 36 deletions(-) create mode 100644 STM32CubeMX/2020c.diff create mode 100644 STM32CubeMX/2021.diff diff --git a/STM32CubeMX/2020c.diff b/STM32CubeMX/2020c.diff new file mode 100644 index 00000000..7028835a --- /dev/null +++ b/STM32CubeMX/2020c.diff @@ -0,0 +1,211 @@ +diff --git a/STM32CubeMX/2020c/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c b/STM32CubeMX/2020c/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c +index 569c8b1..cd27bd7 100644 +--- a/STM32CubeMX/2020c/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c ++++ b/STM32CubeMX/2020c/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c +@@ -430,6 +430,10 @@ HAL_StatusTypeDef HAL_SD_InitCard(SD_HandleTypeDef *hsd) + /* Enable SDIO Clock */ + __HAL_SD_ENABLE(hsd); + ++ /* 1ms: required power up waiting time before starting the SD initialization ++ sequence */ ++ HAL_Delay(1); ++ + /* Identify card operating voltage */ + errorstate = SD_PowerON(hsd); + if(errorstate != HAL_SD_ERROR_NONE) +@@ -1227,22 +1231,22 @@ HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, u + else + { + /* Enable SD DMA transfer */ +- __HAL_SD_DMA_ENABLE(hsd); ++ // MM disabled, as this fails on fast cards. __HAL_SD_DMA_ENABLE(hsd); + + if(hsd->SdCard.CardType != CARD_SDHC_SDXC) + { + add *= 512U; +- } + +- /* Set Block Size for Card */ +- errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE); +- if(errorstate != HAL_SD_ERROR_NONE) +- { +- /* Clear all the static flags */ +- __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS); +- hsd->ErrorCode |= errorstate; +- hsd->State = HAL_SD_STATE_READY; +- return HAL_ERROR; ++ /* Set Block Size for Card */ ++ errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE); ++ if(errorstate != HAL_SD_ERROR_NONE) ++ { ++ /* Clear all the static flags */ ++ __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS); ++ hsd->ErrorCode |= errorstate; ++ hsd->State = HAL_SD_STATE_READY; ++ return HAL_ERROR; ++ } + } + + /* Configure the SD DPSM (Data Path State Machine) */ +@@ -1252,6 +1256,11 @@ HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, u + config.TransferDir = SDIO_TRANSFER_DIR_TO_SDIO; + config.TransferMode = SDIO_TRANSFER_MODE_BLOCK; + config.DPSM = SDIO_DPSM_ENABLE; ++ ++ // We cannot enable DMA too early on UHS-I class 3 SD cards, or else the ++ // data is just discarded before the dpsm is started. ++ __HAL_SD_DMA_ENABLE(hsd); ++ + (void)SDIO_ConfigData(hsd->Instance, &config); + + /* Read Blocks in DMA mode */ +@@ -1343,17 +1352,17 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, + if(hsd->SdCard.CardType != CARD_SDHC_SDXC) + { + add *= 512U; +- } + +- /* Set Block Size for Card */ +- errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE); +- if(errorstate != HAL_SD_ERROR_NONE) +- { +- /* Clear all the static flags */ +- __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS); +- hsd->ErrorCode |= errorstate; +- hsd->State = HAL_SD_STATE_READY; +- return HAL_ERROR; ++ /* Set Block Size for Card */ ++ errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE); ++ if(errorstate != HAL_SD_ERROR_NONE) ++ { ++ /* Clear all the static flags */ ++ __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS); ++ hsd->ErrorCode |= errorstate; ++ hsd->State = HAL_SD_STATE_READY; ++ return HAL_ERROR; ++ } + } + + /* Write Blocks in Polling mode */ +@@ -1361,6 +1370,18 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, + { + hsd->Context = (SD_CONTEXT_WRITE_MULTIPLE_BLOCK | SD_CONTEXT_DMA); + ++ /* MM: Prepare for write */ ++/* TODO ++ SDMMC_CmdAppCommand(hsd->Instance, (uint32_t)(hsd->RCA << 16)); ++ SDIO_CmdInitTypeDef mm_cmdinit; ++ mm_cmdinit.Argument = (uint32_t)NumberOfBlocks; ++ mm_cmdinit.CmdIndex = SDMMC_CMD_SET_BLOCK_COUNT; ++ mm_cmdinit.Response = SDIO_RESPONSE_SHORT; ++ mm_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; ++ mm_cmdinit.CPSM = SDIO_CPSM_ENABLE; ++ (void)SDIO_SendCommand(hsd->Instance, &mm_cmdinit); ++ SDMMC_GetCmdResp1(hsd->Instance, SDMMC_CMD_SET_BLOCK_COUNT, SDIO_CMDTIMEOUT);*/ ++ + /* Write Multi Block command */ + errorstate = SDMMC_CmdWriteMultiBlock(hsd->Instance, add); + } +@@ -1382,7 +1403,7 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, + } + + /* Enable SDIO DMA transfer */ +- __HAL_SD_DMA_ENABLE(hsd); ++ // MM disabled, as this fails on fast cards. __HAL_SD_DMA_ENABLE(hsd); + + /* Enable the DMA Channel */ + if(HAL_DMA_Start_IT(hsd->hdmatx, (uint32_t)pData, (uint32_t)&hsd->Instance->FIFO, (uint32_t)(BLOCKSIZE * NumberOfBlocks)/4U) != HAL_OK) +@@ -1403,6 +1424,11 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, + config.TransferDir = SDIO_TRANSFER_DIR_TO_CARD; + config.TransferMode = SDIO_TRANSFER_MODE_BLOCK; + config.DPSM = SDIO_DPSM_ENABLE; ++ ++ // We cannot enable DMA too early on UHS-I class 3 SD cards, or else the ++ // data is just discarded before the dpsm is started. ++ __HAL_SD_DMA_ENABLE(); ++ + (void)SDIO_ConfigData(hsd->Instance, &config); + + return HAL_OK; +diff --git a/STM32CubeMX/2020c/Src/fsmc.c b/STM32CubeMX/2020c/Src/fsmc.c +index 03a1b12..1b01446 100644 +--- a/STM32CubeMX/2020c/Src/fsmc.c ++++ b/STM32CubeMX/2020c/Src/fsmc.c +@@ -50,12 +50,28 @@ void MX_FSMC_Init(void) + hsram1.Init.AsynchronousWait = FSMC_ASYNCHRONOUS_WAIT_DISABLE; + hsram1.Init.WriteBurst = FSMC_WRITE_BURST_DISABLE; + /* Timing */ ++ ++ // 1 clock to read the address, + 1 for synchroniser skew + Timing.AddressSetupTime = 2; + Timing.AddressHoldTime = 1; ++ ++ // Writes to device: ++ // 1 for synchroniser skew (dbx also delayed) ++ // 1 to skip hold time ++ // 1 to write data. ++ ++ // Reads from device: ++ // 3 for syncroniser ++ // 1 to write back to fsmc bus. + Timing.DataSetupTime = 4; ++ ++ // Allow a clock for us to release signals ++ // Need to avoid both devices acting as outputs ++ // on the multiplexed lines at the same time. + Timing.BusTurnAroundDuration = 1; +- Timing.CLKDivision = 16; +- Timing.DataLatency = 17; ++ ++ Timing.CLKDivision = 16; // Ignored for async ++ Timing.DataLatency = 17; // Ignored for async + Timing.AccessMode = FSMC_ACCESS_MODE_A; + /* ExtTiming */ + +@@ -105,6 +121,10 @@ static void HAL_FSMC_MspInit(void){ + PE0 ------> FSMC_NBL0 + PE1 ------> FSMC_NBL1 + */ ++ ++ // MM: GPIO_SPEED_FREQ_MEDIUM is rated up to 50MHz, which is fine as all the ++ // fsmc timings are > 1 (ie. so clock speed / 2 is around 50MHz). ++ + /* GPIO_InitStruct */ + GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10 + |GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14 +diff --git a/STM32CubeMX/2020c/Src/sdio.c b/STM32CubeMX/2020c/Src/sdio.c +index aeec4fa..01f716a 100644 +--- a/STM32CubeMX/2020c/Src/sdio.c ++++ b/STM32CubeMX/2020c/Src/sdio.c +@@ -40,6 +40,8 @@ void MX_SDIO_SD_Init(void) + hsd.Init.BusWide = SDIO_BUS_WIDE_1B; + hsd.Init.HardwareFlowControl = SDIO_HARDWARE_FLOW_CONTROL_DISABLE; + hsd.Init.ClockDiv = 0; ++ ++ /* + if (HAL_SD_Init(&hsd) != HAL_OK) + { + Error_Handler(); +@@ -47,8 +49,7 @@ void MX_SDIO_SD_Init(void) + if (HAL_SD_ConfigWideBusOperation(&hsd, SDIO_BUS_WIDE_4B) != HAL_OK) + { + Error_Handler(); +- } +- ++ }*/ + } + + void HAL_SD_MspInit(SD_HandleTypeDef* sdHandle) +diff --git a/STM32CubeMX/2020c/Src/spi.c b/STM32CubeMX/2020c/Src/spi.c +index 902bdb2..4935bf0 100644 +--- a/STM32CubeMX/2020c/Src/spi.c ++++ b/STM32CubeMX/2020c/Src/spi.c +@@ -37,6 +37,8 @@ void MX_SPI1_Init(void) + hspi1.Init.CLKPolarity = SPI_POLARITY_HIGH; + hspi1.Init.CLKPhase = SPI_PHASE_2EDGE; + hspi1.Init.NSS = SPI_NSS_SOFT; ++ ++ // 13.5Mbaud FPGA device allows up to 25MHz write + hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4; + hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB; + hspi1.Init.TIMode = SPI_TIMODE_DISABLE; diff --git a/STM32CubeMX/2021.diff b/STM32CubeMX/2021.diff new file mode 100644 index 00000000..47b090f0 --- /dev/null +++ b/STM32CubeMX/2021.diff @@ -0,0 +1,211 @@ +diff --git a/STM32CubeMX/2021/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sd.c b/STM32CubeMX/2021/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sd.c +index d2a88d7..6fffb51 100644 +--- a/STM32CubeMX/2021/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sd.c ++++ b/STM32CubeMX/2021/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sd.c +@@ -430,6 +430,10 @@ HAL_StatusTypeDef HAL_SD_InitCard(SD_HandleTypeDef *hsd) + /* Enable SDIO Clock */ + __HAL_SD_ENABLE(hsd); + ++ /* 1ms: required power up waiting time before starting the SD initialization ++ sequence */ ++ HAL_Delay(1); ++ + /* Identify card operating voltage */ + errorstate = SD_PowerON(hsd); + if(errorstate != HAL_SD_ERROR_NONE) +@@ -1247,22 +1251,22 @@ HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, u + else + { + /* Enable SD DMA transfer */ +- __HAL_SD_DMA_ENABLE(hsd); ++ // MM disabled, as this fails on fast cards. __HAL_SD_DMA_ENABLE(hsd); + + if(hsd->SdCard.CardType != CARD_SDHC_SDXC) + { + add *= 512U; +- } + +- /* Set Block Size for Card */ +- errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE); +- if(errorstate != HAL_SD_ERROR_NONE) +- { +- /* Clear all the static flags */ +- __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS); +- hsd->ErrorCode |= errorstate; +- hsd->State = HAL_SD_STATE_READY; +- return HAL_ERROR; ++ /* Set Block Size for Card */ ++ errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE); ++ if(errorstate != HAL_SD_ERROR_NONE) ++ { ++ /* Clear all the static flags */ ++ __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS); ++ hsd->ErrorCode |= errorstate; ++ hsd->State = HAL_SD_STATE_READY; ++ return HAL_ERROR; ++ } + } + + /* Configure the SD DPSM (Data Path State Machine) */ +@@ -1272,6 +1276,11 @@ HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, u + config.TransferDir = SDIO_TRANSFER_DIR_TO_SDIO; + config.TransferMode = SDIO_TRANSFER_MODE_BLOCK; + config.DPSM = SDIO_DPSM_ENABLE; ++ ++ // We cannot enable DMA too early on UHS-I class 3 SD cards, or else the ++ // data is just discarded before the dpsm is started. ++ __HAL_SD_DMA_ENABLE(); ++ + (void)SDIO_ConfigData(hsd->Instance, &config); + + /* Read Blocks in DMA mode */ +@@ -1367,17 +1376,17 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, + if(hsd->SdCard.CardType != CARD_SDHC_SDXC) + { + add *= 512U; +- } + +- /* Set Block Size for Card */ +- errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE); +- if(errorstate != HAL_SD_ERROR_NONE) +- { +- /* Clear all the static flags */ +- __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS); +- hsd->ErrorCode |= errorstate; +- hsd->State = HAL_SD_STATE_READY; +- return HAL_ERROR; ++ /* Set Block Size for Card */ ++ errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE); ++ if(errorstate != HAL_SD_ERROR_NONE) ++ { ++ /* Clear all the static flags */ ++ __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS); ++ hsd->ErrorCode |= errorstate; ++ hsd->State = HAL_SD_STATE_READY; ++ return HAL_ERROR; ++ } + } + + /* Write Blocks in Polling mode */ +@@ -1385,6 +1394,18 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, + { + hsd->Context = (SD_CONTEXT_WRITE_MULTIPLE_BLOCK | SD_CONTEXT_DMA); + ++ /* MM: Prepare for write */ ++/* TODO ++ SDMMC_CmdAppCommand(hsd->Instance, (uint32_t)(hsd->RCA << 16)); ++ SDIO_CmdInitTypeDef mm_cmdinit; ++ mm_cmdinit.Argument = (uint32_t)NumberOfBlocks; ++ mm_cmdinit.CmdIndex = SDMMC_CMD_SET_BLOCK_COUNT; ++ mm_cmdinit.Response = SDIO_RESPONSE_SHORT; ++ mm_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; ++ mm_cmdinit.CPSM = SDIO_CPSM_ENABLE; ++ (void)SDIO_SendCommand(hsd->Instance, &mm_cmdinit); ++ SDMMC_GetCmdResp1(hsd->Instance, SDMMC_CMD_SET_BLOCK_COUNT, SDIO_CMDTIMEOUT);*/ ++ + /* Write Multi Block command */ + errorstate = SDMMC_CmdWriteMultiBlock(hsd->Instance, add); + } +@@ -1406,7 +1427,7 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, + } + + /* Enable SDIO DMA transfer */ +- __HAL_SD_DMA_ENABLE(hsd); ++ // MM disabled, as this fails on fast cards. __HAL_SD_DMA_ENABLE(hsd); + + /* Enable the DMA Channel */ + if(HAL_DMA_Start_IT(hsd->hdmatx, (uint32_t)pData, (uint32_t)&hsd->Instance->FIFO, (uint32_t)(BLOCKSIZE * NumberOfBlocks)/4U) != HAL_OK) +@@ -1431,6 +1452,11 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, + config.TransferDir = SDIO_TRANSFER_DIR_TO_CARD; + config.TransferMode = SDIO_TRANSFER_MODE_BLOCK; + config.DPSM = SDIO_DPSM_ENABLE; ++ ++ // We cannot enable DMA too early on UHS-I class 3 SD cards, or else the ++ // data is just discarded before the dpsm is started. ++ __HAL_SD_DMA_ENABLE(); ++ + (void)SDIO_ConfigData(hsd->Instance, &config); + + return HAL_OK; +diff --git a/STM32CubeMX/2021/Src/fmc.c b/STM32CubeMX/2021/Src/fmc.c +index dae179a..995fd15 100644 +--- a/STM32CubeMX/2021/Src/fmc.c ++++ b/STM32CubeMX/2021/Src/fmc.c +@@ -52,12 +52,28 @@ void MX_FMC_Init(void) + hsram1.Init.WriteFifo = FMC_WRITE_FIFO_ENABLE; + hsram1.Init.PageSize = FMC_PAGE_SIZE_NONE; + /* Timing */ ++ ++ // 1 clock to read the address, + 1 for synchroniser skew + Timing.AddressSetupTime = 2; + Timing.AddressHoldTime = 1; ++ ++ // Writes to device: ++ // 1 for synchroniser skew (dbx also delayed) ++ // 1 to skip hold time ++ // 1 to write data. ++ ++ // Reads from device: ++ // 3 for syncroniser ++ // 1 to write back to fsmc bus. + Timing.DataSetupTime = 4; ++ ++ // Allow a clock for us to release signals ++ // Need to avoid both devices acting as outputs ++ // on the multiplexed lines at the same time. + Timing.BusTurnAroundDuration = 1; +- Timing.CLKDivision = 16; +- Timing.DataLatency = 17; ++ ++ Timing.CLKDivision = 16; // Ignored for async ++ Timing.DataLatency = 17; // Ignored for async + Timing.AccessMode = FMC_ACCESS_MODE_A; + /* ExtTiming */ + +@@ -107,6 +123,10 @@ static void HAL_FMC_MspInit(void){ + PE0 ------> FMC_NBL0 + PE1 ------> FMC_NBL1 + */ ++ ++ // MM: GPIO_SPEED_FREQ_MEDIUM is rated up to 50MHz, which is fine as all the ++ // fsmc timings are > 1 (ie. so clock speed / 2 is around 50MHz). ++ + /* GPIO_InitStruct */ + GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10 + |GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14 +diff --git a/STM32CubeMX/2021/Src/sdio.c b/STM32CubeMX/2021/Src/sdio.c +index 3c8aff3..f187a45 100644 +--- a/STM32CubeMX/2021/Src/sdio.c ++++ b/STM32CubeMX/2021/Src/sdio.c +@@ -40,6 +40,8 @@ void MX_SDIO_SD_Init(void) + hsd.Init.BusWide = SDIO_BUS_WIDE_1B; + hsd.Init.HardwareFlowControl = SDIO_HARDWARE_FLOW_CONTROL_ENABLE; + hsd.Init.ClockDiv = 0; ++ ++ /* + if (HAL_SD_Init(&hsd) != HAL_OK) + { + Error_Handler(); +@@ -47,8 +49,7 @@ void MX_SDIO_SD_Init(void) + if (HAL_SD_ConfigWideBusOperation(&hsd, SDIO_BUS_WIDE_4B) != HAL_OK) + { + Error_Handler(); +- } +- ++ }*/ + } + + void HAL_SD_MspInit(SD_HandleTypeDef* sdHandle) +diff --git a/STM32CubeMX/2021/Src/spi.c b/STM32CubeMX/2021/Src/spi.c +index 902bdb2..1d8d45e 100644 +--- a/STM32CubeMX/2021/Src/spi.c ++++ b/STM32CubeMX/2021/Src/spi.c +@@ -37,6 +37,8 @@ void MX_SPI1_Init(void) + hspi1.Init.CLKPolarity = SPI_POLARITY_HIGH; + hspi1.Init.CLKPhase = SPI_PHASE_2EDGE; + hspi1.Init.NSS = SPI_NSS_SOFT; ++ ++ // 22.5Mbaud. FPGA device allows up to 25MHz write + hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4; + hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB; + hspi1.Init.TIMode = SPI_TIMODE_DISABLE; diff --git a/src/firmware/bsp_driver_sd.c b/src/firmware/bsp_driver_sd.c index 0647f59e..5f31d24b 100755 --- a/src/firmware/bsp_driver_sd.c +++ b/src/firmware/bsp_driver_sd.c @@ -105,14 +105,13 @@ __weak void BSP_SD_DetectCallback(void) /** * @brief Reads block(s) from a specified address in an SD card, in polling mode. * @param pData: Pointer to the buffer that will contain the data to transmit - * @param ReadAddr: Address from where data is to be read - * @param BlockSize: SD card data block size, that should be 512 + * @param BlockAddr: Address from where data is to be read * @param NumOfBlocks: Number of SD blocks to read * @retval SD status */ -uint8_t BSP_SD_ReadBlocks(uint8_t *pData, uint64_t ReadAddr, uint32_t NumOfBlocks) +uint8_t BSP_SD_ReadBlocks(uint8_t *pData, uint64_t BlockAddr, uint32_t NumOfBlocks) { - if(HAL_SD_ReadBlocks_DMA(&hsd, pData, ReadAddr, NumOfBlocks) != HAL_OK) + if(HAL_SD_ReadBlocks_DMA(&hsd, pData, BlockAddr, NumOfBlocks) != HAL_OK) { return MSD_ERROR; } @@ -122,13 +121,13 @@ uint8_t BSP_SD_ReadBlocks(uint8_t *pData, uint64_t ReadAddr, uint32_t NumOfBlock /** * @brief Writes block(s) to a specified address in an SD card, in polling mode. * @param pData: Pointer to the buffer that will contain the data to transmit - * @param WriteAddr: Address from where data is to be written + * @param BlockAddr: Address from where data is to be written * @param NumOfBlocks: Number of SD blocks to write * @retval SD status */ -uint8_t BSP_SD_WriteBlocks(uint8_t *pData, uint64_t WriteAddr, uint32_t NumOfBlocks) +uint8_t BSP_SD_WriteBlocks(uint8_t *pData, uint64_t BlockAddr, uint32_t NumOfBlocks) { - if(HAL_SD_WriteBlocks_DMA(&hsd, pData, WriteAddr, NumOfBlocks) != HAL_OK) + if(HAL_SD_WriteBlocks_DMA(&hsd, pData, BlockAddr, NumOfBlocks) != HAL_OK) { return MSD_ERROR; } @@ -138,17 +137,16 @@ uint8_t BSP_SD_WriteBlocks(uint8_t *pData, uint64_t WriteAddr, uint32_t NumOfBlo /** * @brief Reads block(s) from a specified address in an SD card, in DMA mode. * @param pData: Pointer to the buffer that will contain the data to transmit - * @param ReadAddr: Address from where data is to be read - * @param BlockSize: SD card data block size, that should be 512 + * @param BlockAddr: Address from where data is to be read * @param NumOfBlocks: Number of SD blocks to read * @retval SD status */ -uint8_t BSP_SD_ReadBlocks_DMA(uint8_t *pData, uint64_t ReadAddr, uint32_t NumOfBlocks) +uint8_t BSP_SD_ReadBlocks_DMA(uint8_t *pData, uint64_t BlockAddr, uint32_t NumOfBlocks) { uint8_t SD_state = MSD_OK; /* Read block(s) in DMA transfer mode */ - if(HAL_SD_ReadBlocks_DMA(&hsd, pData, ReadAddr, NumOfBlocks) != HAL_OK) + if(HAL_SD_ReadBlocks_DMA(&hsd, pData, BlockAddr, NumOfBlocks) != HAL_OK) { SD_state = MSD_ERROR; } @@ -174,16 +172,16 @@ uint8_t BSP_SD_ReadBlocks_DMA(uint8_t *pData, uint64_t ReadAddr, uint32_t NumOfB /** * @brief Writes block(s) to a specified address in an SD card, in DMA mode. * @param pData: Pointer to the buffer that will contain the data to transmit - * @param WriteAddr: Address from where data is to be written + * @param BlockAddr: Address from where data is to be written * @param NumOfBlocks: Number of SD blocks to write * @retval SD status */ -uint8_t BSP_SD_WriteBlocks_DMA(uint8_t *pData, uint64_t WriteAddr, uint32_t NumOfBlocks) +uint8_t BSP_SD_WriteBlocks_DMA(uint8_t *pData, uint64_t BlockAddr, uint32_t NumOfBlocks) { uint8_t SD_state = MSD_OK; /* Write block(s) in DMA transfer mode */ - if(HAL_SD_WriteBlocks_DMA(&hsd, pData, WriteAddr, NumOfBlocks) != HAL_OK) + if(HAL_SD_WriteBlocks_DMA(&hsd, pData, BlockAddr, NumOfBlocks) != HAL_OK) { SD_state = MSD_ERROR; } diff --git a/src/firmware/bsp_driver_sd.h b/src/firmware/bsp_driver_sd.h index a952b833..d4762143 100755 --- a/src/firmware/bsp_driver_sd.h +++ b/src/firmware/bsp_driver_sd.h @@ -88,10 +88,10 @@ uint8_t BSP_SD_Init(void); uint8_t BSP_SD_ITConfig(void); void BSP_SD_DetectIT(void); __weak void BSP_SD_DetectCallback(void); -uint8_t BSP_SD_ReadBlocks(uint8_t *pData, uint64_t ReadAddr, uint32_t NumOfBlocks); -uint8_t BSP_SD_WriteBlocks(uint8_t *pData, uint64_t WriteAddr, uint32_t NumOfBlocks); -uint8_t BSP_SD_ReadBlocks_DMA(uint8_t *pData, uint64_t ReadAddr, uint32_t NumOfBlocks); -uint8_t BSP_SD_WriteBlocks_DMA(uint8_t *pData, uint64_t WriteAddr, uint32_t NumOfBlocks); +uint8_t BSP_SD_ReadBlocks(uint8_t *pData, uint64_t BlockAddr, uint32_t NumOfBlocks); +uint8_t BSP_SD_WriteBlocks(uint8_t *pData, uint64_t BlockAddr, uint32_t NumOfBlocks); +uint8_t BSP_SD_ReadBlocks_DMA(uint8_t *pData, uint64_t BlockAddr, uint32_t NumOfBlocks); +uint8_t BSP_SD_WriteBlocks_DMA(uint8_t *pData, uint64_t BlockAddr, uint32_t NumOfBlocks); //uint8_t BSP_SD_Erase(uint64_t StartAddr, uint64_t EndAddr); //void BSP_SD_IRQHandler(void); //void BSP_SD_DMA_Tx_IRQHandler(void); diff --git a/src/firmware/config.c b/src/firmware/config.c index f4522a65..e0f034ef 100755 --- a/src/firmware/config.c +++ b/src/firmware/config.c @@ -107,7 +107,7 @@ void s2s_configInit(S2S_BoardCfg* config) int cfgSectors = (S2S_CFG_SIZE + 511) / 512; BSP_SD_ReadBlocks_DMA( &s2s_cfg[0], - (sdDev.capacity - cfgSectors) * 512ll, + sdDev.capacity - cfgSectors, cfgSectors); memcpy(config, s2s_cfg, sizeof(S2S_BoardCfg)); @@ -252,7 +252,7 @@ sdWriteCommand(const uint8_t* cmd, size_t cmdSize) ((uint32_t)cmd[4]); memcpy(configDmaBuf, &cmd[5], 512); - BSP_SD_WriteBlocks_DMA(configDmaBuf, lba * 512ll, 1); + BSP_SD_WriteBlocks_DMA(configDmaBuf, lba, 1); uint8_t response[] = { @@ -274,7 +274,7 @@ sdReadCommand(const uint8_t* cmd, size_t cmdSize) (((uint32_t)cmd[3]) << 8) | ((uint32_t)cmd[4]); - BSP_SD_ReadBlocks_DMA(configDmaBuf, lba * 512ll, 1); + BSP_SD_ReadBlocks_DMA(configDmaBuf, lba, 1); hidPacket_send(configDmaBuf, 512); } @@ -448,7 +448,7 @@ void s2s_configSave(int scsiId, uint16_t bytesPerSector) BSP_SD_WriteBlocks_DMA( &s2s_cfg[0], - (sdDev.capacity - S2S_CFG_SIZE) * 512ll, + sdDev.capacity - S2S_CFG_SIZE, (S2S_CFG_SIZE + 511) / 512); } diff --git a/src/firmware/disk.c b/src/firmware/disk.c index f4a74fbb..cdd7c45e 100755 --- a/src/firmware/disk.c +++ b/src/firmware/disk.c @@ -830,7 +830,7 @@ void scsiDiskPoll() } } - HAL_SD_WriteBlocks_DMA(&hsd, (&scsiDev.data[0]), (i + sdLBA) * 512ll, sectors); + HAL_SD_WriteBlocks_DMA(&hsd, (&scsiDev.data[0]), i + sdLBA, sectors); int underrun = 0; if (scsiBytesRead < totalBytes && !scsiDev.resetFlag) @@ -877,7 +877,7 @@ void scsiDiskPoll() if (underrun && (!parityError || !enableParity)) { // Try again. Data is still in memory. - BSP_SD_WriteBlocks_DMA(&scsiDev.data[0], 512ll * (i + sdLBA), sectors); + BSP_SD_WriteBlocks_DMA(&scsiDev.data[0], i + sdLBA, sectors); scsiDev.sdUnderrunCount++; } @@ -908,7 +908,7 @@ void scsiDiskPoll() } if (!parityError || !enableParity) { - BSP_SD_WriteBlocks_DMA(&scsiDev.data[0], 512ll * (i + sdLBA), sectors); + BSP_SD_WriteBlocks_DMA(&scsiDev.data[0], i + sdLBA, sectors); } i += sectors; } diff --git a/src/firmware/main.c b/src/firmware/main.c index 3a282ce6..e42bb183 100755 --- a/src/firmware/main.c +++ b/src/firmware/main.c @@ -43,9 +43,13 @@ uint32_t lastSDPoll; static int isUsbStarted; +// Note that the chip clocking isn't fully configured at this stage. void mainEarlyInit() { - // USB device is initialised before mainInit is called + // Disable the ULPI chip + HAL_GPIO_WritePin(nULPI_RESET_GPIO_Port, nULPI_RESET_Pin, GPIO_PIN_RESET); + + // Sets up function pointers only s2s_initUsbDeviceStorage(); } @@ -54,15 +58,6 @@ void mainInit() s2s_timeInit(); s2s_checkHwVersion(); - #ifdef S2S_USB_HS - // Enable the ULPI chip - HAL_GPIO_WritePin(nULPI_RESET_GPIO_Port, nULPI_RESET_Pin, GPIO_PIN_SET); - s2s_delay_ms(5); - #else - // DISable the ULPI chip - HAL_GPIO_WritePin(nULPI_RESET_GPIO_Port, nULPI_RESET_Pin, GPIO_PIN_RESET); - #endif - s2s_ledInit(); s2s_fpgaInit(); @@ -74,6 +69,12 @@ void mainInit() scsiPhyConfig(); scsiInit(); + #ifdef S2S_USB_HS + // Enable the ULPI chip + HAL_GPIO_WritePin(nULPI_RESET_GPIO_Port, nULPI_RESET_Pin, GPIO_PIN_SET); + s2s_delay_ms(5); + #endif + MX_USB_DEVICE_Init(); // USB lun config now available. isUsbStarted = 1; diff --git a/src/firmware/sd.c b/src/firmware/sd.c index eec9498a..1f2a27bc 100755 --- a/src/firmware/sd.c +++ b/src/firmware/sd.c @@ -68,7 +68,7 @@ sdReadDMAPoll(uint32_t remainingSectors) void sdReadDMA(uint32_t lba, uint32_t sectors, uint8_t* outputBuffer) { - if (HAL_SD_ReadBlocks_DMA(&hsd, outputBuffer, lba * 512ll, sectors) != HAL_OK) + if (HAL_SD_ReadBlocks_DMA(&hsd, outputBuffer, lba, sectors) != HAL_OK) { scsiDiskReset(); -- 2.38.5