0db6988e736bd75741b28a9e027ec19dbea47ec7
[SCSI2SD-V6.git] / software / SCSI2SD / v3 / SCSI2SD.cydsn / Generated_Source / PSoC5 / cyfitter.h
1 #ifndef INCLUDED_CYFITTER_H
2 #define INCLUDED_CYFITTER_H
3 #include <cydevice.h>
4 #include <cydevice_trm.h>
5
6 /* LED1 */
7 #define LED1__0__MASK 0x08u
8 #define LED1__0__PC CYREG_PRT12_PC3
9 #define LED1__0__PORT 12u
10 #define LED1__0__SHIFT 3
11 #define LED1__AG CYREG_PRT12_AG
12 #define LED1__BIE CYREG_PRT12_BIE
13 #define LED1__BIT_MASK CYREG_PRT12_BIT_MASK
14 #define LED1__BYP CYREG_PRT12_BYP
15 #define LED1__DM0 CYREG_PRT12_DM0
16 #define LED1__DM1 CYREG_PRT12_DM1
17 #define LED1__DM2 CYREG_PRT12_DM2
18 #define LED1__DR CYREG_PRT12_DR
19 #define LED1__INP_DIS CYREG_PRT12_INP_DIS
20 #define LED1__MASK 0x08u
21 #define LED1__PORT 12u
22 #define LED1__PRT CYREG_PRT12_PRT
23 #define LED1__PRTDSI__DBL_SYNC_IN CYREG_PRT12_DBL_SYNC_IN
24 #define LED1__PRTDSI__OE_SEL0 CYREG_PRT12_OE_SEL0
25 #define LED1__PRTDSI__OE_SEL1 CYREG_PRT12_OE_SEL1
26 #define LED1__PRTDSI__OUT_SEL0 CYREG_PRT12_OUT_SEL0
27 #define LED1__PRTDSI__OUT_SEL1 CYREG_PRT12_OUT_SEL1
28 #define LED1__PRTDSI__SYNC_OUT CYREG_PRT12_SYNC_OUT
29 #define LED1__PS CYREG_PRT12_PS
30 #define LED1__SHIFT 3
31 #define LED1__SIO_CFG CYREG_PRT12_SIO_CFG
32 #define LED1__SIO_DIFF CYREG_PRT12_SIO_DIFF
33 #define LED1__SIO_HYST_EN CYREG_PRT12_SIO_HYST_EN
34 #define LED1__SIO_REG_HIFREQ CYREG_PRT12_SIO_REG_HIFREQ
35 #define LED1__SLW CYREG_PRT12_SLW
36
37 /* SD_CD */
38 #define SD_CD__0__MASK 0x40u
39 #define SD_CD__0__PC CYREG_PRT3_PC6
40 #define SD_CD__0__PORT 3u
41 #define SD_CD__0__SHIFT 6
42 #define SD_CD__AG CYREG_PRT3_AG
43 #define SD_CD__AMUX CYREG_PRT3_AMUX
44 #define SD_CD__BIE CYREG_PRT3_BIE
45 #define SD_CD__BIT_MASK CYREG_PRT3_BIT_MASK
46 #define SD_CD__BYP CYREG_PRT3_BYP
47 #define SD_CD__CTL CYREG_PRT3_CTL
48 #define SD_CD__DM0 CYREG_PRT3_DM0
49 #define SD_CD__DM1 CYREG_PRT3_DM1
50 #define SD_CD__DM2 CYREG_PRT3_DM2
51 #define SD_CD__DR CYREG_PRT3_DR
52 #define SD_CD__INP_DIS CYREG_PRT3_INP_DIS
53 #define SD_CD__LCD_COM_SEG CYREG_PRT3_LCD_COM_SEG
54 #define SD_CD__LCD_EN CYREG_PRT3_LCD_EN
55 #define SD_CD__MASK 0x40u
56 #define SD_CD__PORT 3u
57 #define SD_CD__PRT CYREG_PRT3_PRT
58 #define SD_CD__PRTDSI__CAPS_SEL CYREG_PRT3_CAPS_SEL
59 #define SD_CD__PRTDSI__DBL_SYNC_IN CYREG_PRT3_DBL_SYNC_IN
60 #define SD_CD__PRTDSI__OE_SEL0 CYREG_PRT3_OE_SEL0
61 #define SD_CD__PRTDSI__OE_SEL1 CYREG_PRT3_OE_SEL1
62 #define SD_CD__PRTDSI__OUT_SEL0 CYREG_PRT3_OUT_SEL0
63 #define SD_CD__PRTDSI__OUT_SEL1 CYREG_PRT3_OUT_SEL1
64 #define SD_CD__PRTDSI__SYNC_OUT CYREG_PRT3_SYNC_OUT
65 #define SD_CD__PS CYREG_PRT3_PS
66 #define SD_CD__SHIFT 6
67 #define SD_CD__SLW CYREG_PRT3_SLW
68
69 /* SD_CS */
70 #define SD_CS__0__MASK 0x10u
71 #define SD_CS__0__PC CYREG_PRT3_PC4
72 #define SD_CS__0__PORT 3u
73 #define SD_CS__0__SHIFT 4
74 #define SD_CS__AG CYREG_PRT3_AG
75 #define SD_CS__AMUX CYREG_PRT3_AMUX
76 #define SD_CS__BIE CYREG_PRT3_BIE
77 #define SD_CS__BIT_MASK CYREG_PRT3_BIT_MASK
78 #define SD_CS__BYP CYREG_PRT3_BYP
79 #define SD_CS__CTL CYREG_PRT3_CTL
80 #define SD_CS__DM0 CYREG_PRT3_DM0
81 #define SD_CS__DM1 CYREG_PRT3_DM1
82 #define SD_CS__DM2 CYREG_PRT3_DM2
83 #define SD_CS__DR CYREG_PRT3_DR
84 #define SD_CS__INP_DIS CYREG_PRT3_INP_DIS
85 #define SD_CS__LCD_COM_SEG CYREG_PRT3_LCD_COM_SEG
86 #define SD_CS__LCD_EN CYREG_PRT3_LCD_EN
87 #define SD_CS__MASK 0x10u
88 #define SD_CS__PORT 3u
89 #define SD_CS__PRT CYREG_PRT3_PRT
90 #define SD_CS__PRTDSI__CAPS_SEL CYREG_PRT3_CAPS_SEL
91 #define SD_CS__PRTDSI__DBL_SYNC_IN CYREG_PRT3_DBL_SYNC_IN
92 #define SD_CS__PRTDSI__OE_SEL0 CYREG_PRT3_OE_SEL0
93 #define SD_CS__PRTDSI__OE_SEL1 CYREG_PRT3_OE_SEL1
94 #define SD_CS__PRTDSI__OUT_SEL0 CYREG_PRT3_OUT_SEL0
95 #define SD_CS__PRTDSI__OUT_SEL1 CYREG_PRT3_OUT_SEL1
96 #define SD_CS__PRTDSI__SYNC_OUT CYREG_PRT3_SYNC_OUT
97 #define SD_CS__PS CYREG_PRT3_PS
98 #define SD_CS__SHIFT 4
99 #define SD_CS__SLW CYREG_PRT3_SLW
100
101 /* USBFS_arb_int */
102 #define USBFS_arb_int__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0
103 #define USBFS_arb_int__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0
104 #define USBFS_arb_int__INTC_MASK 0x400000u
105 #define USBFS_arb_int__INTC_NUMBER 22u
106 #define USBFS_arb_int__INTC_PRIOR_NUM 7u
107 #define USBFS_arb_int__INTC_PRIOR_REG CYREG_NVIC_PRI_22
108 #define USBFS_arb_int__INTC_SET_EN_REG CYREG_NVIC_SETENA0
109 #define USBFS_arb_int__INTC_SET_PD_REG CYREG_NVIC_SETPEND0
110
111 /* USBFS_bus_reset */
112 #define USBFS_bus_reset__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0
113 #define USBFS_bus_reset__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0
114 #define USBFS_bus_reset__INTC_MASK 0x800000u
115 #define USBFS_bus_reset__INTC_NUMBER 23u
116 #define USBFS_bus_reset__INTC_PRIOR_NUM 7u
117 #define USBFS_bus_reset__INTC_PRIOR_REG CYREG_NVIC_PRI_23
118 #define USBFS_bus_reset__INTC_SET_EN_REG CYREG_NVIC_SETENA0
119 #define USBFS_bus_reset__INTC_SET_PD_REG CYREG_NVIC_SETPEND0
120
121 /* USBFS_Dm */
122 #define USBFS_Dm__0__MASK 0x80u
123 #define USBFS_Dm__0__PC CYREG_IO_PC_PRT15_7_6_PC1
124 #define USBFS_Dm__0__PORT 15u
125 #define USBFS_Dm__0__SHIFT 7
126 #define USBFS_Dm__AG CYREG_PRT15_AG
127 #define USBFS_Dm__AMUX CYREG_PRT15_AMUX
128 #define USBFS_Dm__BIE CYREG_PRT15_BIE
129 #define USBFS_Dm__BIT_MASK CYREG_PRT15_BIT_MASK
130 #define USBFS_Dm__BYP CYREG_PRT15_BYP
131 #define USBFS_Dm__CTL CYREG_PRT15_CTL
132 #define USBFS_Dm__DM0 CYREG_PRT15_DM0
133 #define USBFS_Dm__DM1 CYREG_PRT15_DM1
134 #define USBFS_Dm__DM2 CYREG_PRT15_DM2
135 #define USBFS_Dm__DR CYREG_PRT15_DR
136 #define USBFS_Dm__INP_DIS CYREG_PRT15_INP_DIS
137 #define USBFS_Dm__LCD_COM_SEG CYREG_PRT15_LCD_COM_SEG
138 #define USBFS_Dm__LCD_EN CYREG_PRT15_LCD_EN
139 #define USBFS_Dm__MASK 0x80u
140 #define USBFS_Dm__PORT 15u
141 #define USBFS_Dm__PRT CYREG_PRT15_PRT
142 #define USBFS_Dm__PRTDSI__CAPS_SEL CYREG_PRT15_CAPS_SEL
143 #define USBFS_Dm__PRTDSI__DBL_SYNC_IN CYREG_PRT15_DBL_SYNC_IN
144 #define USBFS_Dm__PRTDSI__OE_SEL0 CYREG_PRT15_OE_SEL0
145 #define USBFS_Dm__PRTDSI__OE_SEL1 CYREG_PRT15_OE_SEL1
146 #define USBFS_Dm__PRTDSI__OUT_SEL0 CYREG_PRT15_OUT_SEL0
147 #define USBFS_Dm__PRTDSI__OUT_SEL1 CYREG_PRT15_OUT_SEL1
148 #define USBFS_Dm__PRTDSI__SYNC_OUT CYREG_PRT15_SYNC_OUT
149 #define USBFS_Dm__PS CYREG_PRT15_PS
150 #define USBFS_Dm__SHIFT 7
151 #define USBFS_Dm__SLW CYREG_PRT15_SLW
152
153 /* USBFS_Dp */
154 #define USBFS_Dp__0__MASK 0x40u
155 #define USBFS_Dp__0__PC CYREG_IO_PC_PRT15_7_6_PC0
156 #define USBFS_Dp__0__PORT 15u
157 #define USBFS_Dp__0__SHIFT 6
158 #define USBFS_Dp__AG CYREG_PRT15_AG
159 #define USBFS_Dp__AMUX CYREG_PRT15_AMUX
160 #define USBFS_Dp__BIE CYREG_PRT15_BIE
161 #define USBFS_Dp__BIT_MASK CYREG_PRT15_BIT_MASK
162 #define USBFS_Dp__BYP CYREG_PRT15_BYP
163 #define USBFS_Dp__CTL CYREG_PRT15_CTL
164 #define USBFS_Dp__DM0 CYREG_PRT15_DM0
165 #define USBFS_Dp__DM1 CYREG_PRT15_DM1
166 #define USBFS_Dp__DM2 CYREG_PRT15_DM2
167 #define USBFS_Dp__DR CYREG_PRT15_DR
168 #define USBFS_Dp__INP_DIS CYREG_PRT15_INP_DIS
169 #define USBFS_Dp__INTSTAT CYREG_PICU15_INTSTAT
170 #define USBFS_Dp__LCD_COM_SEG CYREG_PRT15_LCD_COM_SEG
171 #define USBFS_Dp__LCD_EN CYREG_PRT15_LCD_EN
172 #define USBFS_Dp__MASK 0x40u
173 #define USBFS_Dp__PORT 15u
174 #define USBFS_Dp__PRT CYREG_PRT15_PRT
175 #define USBFS_Dp__PRTDSI__CAPS_SEL CYREG_PRT15_CAPS_SEL
176 #define USBFS_Dp__PRTDSI__DBL_SYNC_IN CYREG_PRT15_DBL_SYNC_IN
177 #define USBFS_Dp__PRTDSI__OE_SEL0 CYREG_PRT15_OE_SEL0
178 #define USBFS_Dp__PRTDSI__OE_SEL1 CYREG_PRT15_OE_SEL1
179 #define USBFS_Dp__PRTDSI__OUT_SEL0 CYREG_PRT15_OUT_SEL0
180 #define USBFS_Dp__PRTDSI__OUT_SEL1 CYREG_PRT15_OUT_SEL1
181 #define USBFS_Dp__PRTDSI__SYNC_OUT CYREG_PRT15_SYNC_OUT
182 #define USBFS_Dp__PS CYREG_PRT15_PS
183 #define USBFS_Dp__SHIFT 6
184 #define USBFS_Dp__SLW CYREG_PRT15_SLW
185 #define USBFS_Dp__SNAP CYREG_PICU_15_SNAP_15
186
187 /* USBFS_dp_int */
188 #define USBFS_dp_int__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0
189 #define USBFS_dp_int__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0
190 #define USBFS_dp_int__INTC_MASK 0x1000u
191 #define USBFS_dp_int__INTC_NUMBER 12u
192 #define USBFS_dp_int__INTC_PRIOR_NUM 7u
193 #define USBFS_dp_int__INTC_PRIOR_REG CYREG_NVIC_PRI_12
194 #define USBFS_dp_int__INTC_SET_EN_REG CYREG_NVIC_SETENA0
195 #define USBFS_dp_int__INTC_SET_PD_REG CYREG_NVIC_SETPEND0
196
197 /* USBFS_ep_0 */
198 #define USBFS_ep_0__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0
199 #define USBFS_ep_0__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0
200 #define USBFS_ep_0__INTC_MASK 0x1000000u
201 #define USBFS_ep_0__INTC_NUMBER 24u
202 #define USBFS_ep_0__INTC_PRIOR_NUM 7u
203 #define USBFS_ep_0__INTC_PRIOR_REG CYREG_NVIC_PRI_24
204 #define USBFS_ep_0__INTC_SET_EN_REG CYREG_NVIC_SETENA0
205 #define USBFS_ep_0__INTC_SET_PD_REG CYREG_NVIC_SETPEND0
206
207 /* USBFS_ep_1 */
208 #define USBFS_ep_1__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0
209 #define USBFS_ep_1__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0
210 #define USBFS_ep_1__INTC_MASK 0x40u
211 #define USBFS_ep_1__INTC_NUMBER 6u
212 #define USBFS_ep_1__INTC_PRIOR_NUM 7u
213 #define USBFS_ep_1__INTC_PRIOR_REG CYREG_NVIC_PRI_6
214 #define USBFS_ep_1__INTC_SET_EN_REG CYREG_NVIC_SETENA0
215 #define USBFS_ep_1__INTC_SET_PD_REG CYREG_NVIC_SETPEND0
216
217 /* USBFS_ep_2 */
218 #define USBFS_ep_2__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0
219 #define USBFS_ep_2__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0
220 #define USBFS_ep_2__INTC_MASK 0x80u
221 #define USBFS_ep_2__INTC_NUMBER 7u
222 #define USBFS_ep_2__INTC_PRIOR_NUM 7u
223 #define USBFS_ep_2__INTC_PRIOR_REG CYREG_NVIC_PRI_7
224 #define USBFS_ep_2__INTC_SET_EN_REG CYREG_NVIC_SETENA0
225 #define USBFS_ep_2__INTC_SET_PD_REG CYREG_NVIC_SETPEND0
226
227 /* USBFS_ep_3 */
228 #define USBFS_ep_3__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0
229 #define USBFS_ep_3__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0
230 #define USBFS_ep_3__INTC_MASK 0x100u
231 #define USBFS_ep_3__INTC_NUMBER 8u
232 #define USBFS_ep_3__INTC_PRIOR_NUM 7u
233 #define USBFS_ep_3__INTC_PRIOR_REG CYREG_NVIC_PRI_8
234 #define USBFS_ep_3__INTC_SET_EN_REG CYREG_NVIC_SETENA0
235 #define USBFS_ep_3__INTC_SET_PD_REG CYREG_NVIC_SETPEND0
236
237 /* USBFS_ep_4 */
238 #define USBFS_ep_4__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0
239 #define USBFS_ep_4__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0
240 #define USBFS_ep_4__INTC_MASK 0x200u
241 #define USBFS_ep_4__INTC_NUMBER 9u
242 #define USBFS_ep_4__INTC_PRIOR_NUM 7u
243 #define USBFS_ep_4__INTC_PRIOR_REG CYREG_NVIC_PRI_9
244 #define USBFS_ep_4__INTC_SET_EN_REG CYREG_NVIC_SETENA0
245 #define USBFS_ep_4__INTC_SET_PD_REG CYREG_NVIC_SETPEND0
246
247 /* USBFS_sof_int */
248 #define USBFS_sof_int__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0
249 #define USBFS_sof_int__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0
250 #define USBFS_sof_int__INTC_MASK 0x200000u
251 #define USBFS_sof_int__INTC_NUMBER 21u
252 #define USBFS_sof_int__INTC_PRIOR_NUM 7u
253 #define USBFS_sof_int__INTC_PRIOR_REG CYREG_NVIC_PRI_21
254 #define USBFS_sof_int__INTC_SET_EN_REG CYREG_NVIC_SETENA0
255 #define USBFS_sof_int__INTC_SET_PD_REG CYREG_NVIC_SETPEND0
256
257 /* USBFS_USB */
258 #define USBFS_USB__ARB_CFG CYREG_USB_ARB_CFG
259 #define USBFS_USB__ARB_EP1_CFG CYREG_USB_ARB_EP1_CFG
260 #define USBFS_USB__ARB_EP1_INT_EN CYREG_USB_ARB_EP1_INT_EN
261 #define USBFS_USB__ARB_EP1_SR CYREG_USB_ARB_EP1_SR
262 #define USBFS_USB__ARB_EP2_CFG CYREG_USB_ARB_EP2_CFG
263 #define USBFS_USB__ARB_EP2_INT_EN CYREG_USB_ARB_EP2_INT_EN
264 #define USBFS_USB__ARB_EP2_SR CYREG_USB_ARB_EP2_SR
265 #define USBFS_USB__ARB_EP3_CFG CYREG_USB_ARB_EP3_CFG
266 #define USBFS_USB__ARB_EP3_INT_EN CYREG_USB_ARB_EP3_INT_EN
267 #define USBFS_USB__ARB_EP3_SR CYREG_USB_ARB_EP3_SR
268 #define USBFS_USB__ARB_EP4_CFG CYREG_USB_ARB_EP4_CFG
269 #define USBFS_USB__ARB_EP4_INT_EN CYREG_USB_ARB_EP4_INT_EN
270 #define USBFS_USB__ARB_EP4_SR CYREG_USB_ARB_EP4_SR
271 #define USBFS_USB__ARB_EP5_CFG CYREG_USB_ARB_EP5_CFG
272 #define USBFS_USB__ARB_EP5_INT_EN CYREG_USB_ARB_EP5_INT_EN
273 #define USBFS_USB__ARB_EP5_SR CYREG_USB_ARB_EP5_SR
274 #define USBFS_USB__ARB_EP6_CFG CYREG_USB_ARB_EP6_CFG
275 #define USBFS_USB__ARB_EP6_INT_EN CYREG_USB_ARB_EP6_INT_EN
276 #define USBFS_USB__ARB_EP6_SR CYREG_USB_ARB_EP6_SR
277 #define USBFS_USB__ARB_EP7_CFG CYREG_USB_ARB_EP7_CFG
278 #define USBFS_USB__ARB_EP7_INT_EN CYREG_USB_ARB_EP7_INT_EN
279 #define USBFS_USB__ARB_EP7_SR CYREG_USB_ARB_EP7_SR
280 #define USBFS_USB__ARB_EP8_CFG CYREG_USB_ARB_EP8_CFG
281 #define USBFS_USB__ARB_EP8_INT_EN CYREG_USB_ARB_EP8_INT_EN
282 #define USBFS_USB__ARB_EP8_SR CYREG_USB_ARB_EP8_SR
283 #define USBFS_USB__ARB_INT_EN CYREG_USB_ARB_INT_EN
284 #define USBFS_USB__ARB_INT_SR CYREG_USB_ARB_INT_SR
285 #define USBFS_USB__ARB_RW1_DR CYREG_USB_ARB_RW1_DR
286 #define USBFS_USB__ARB_RW1_RA CYREG_USB_ARB_RW1_RA
287 #define USBFS_USB__ARB_RW1_RA_MSB CYREG_USB_ARB_RW1_RA_MSB
288 #define USBFS_USB__ARB_RW1_WA CYREG_USB_ARB_RW1_WA
289 #define USBFS_USB__ARB_RW1_WA_MSB CYREG_USB_ARB_RW1_WA_MSB
290 #define USBFS_USB__ARB_RW2_DR CYREG_USB_ARB_RW2_DR
291 #define USBFS_USB__ARB_RW2_RA CYREG_USB_ARB_RW2_RA
292 #define USBFS_USB__ARB_RW2_RA_MSB CYREG_USB_ARB_RW2_RA_MSB
293 #define USBFS_USB__ARB_RW2_WA CYREG_USB_ARB_RW2_WA
294 #define USBFS_USB__ARB_RW2_WA_MSB CYREG_USB_ARB_RW2_WA_MSB
295 #define USBFS_USB__ARB_RW3_DR CYREG_USB_ARB_RW3_DR
296 #define USBFS_USB__ARB_RW3_RA CYREG_USB_ARB_RW3_RA
297 #define USBFS_USB__ARB_RW3_RA_MSB CYREG_USB_ARB_RW3_RA_MSB
298 #define USBFS_USB__ARB_RW3_WA CYREG_USB_ARB_RW3_WA
299 #define USBFS_USB__ARB_RW3_WA_MSB CYREG_USB_ARB_RW3_WA_MSB
300 #define USBFS_USB__ARB_RW4_DR CYREG_USB_ARB_RW4_DR
301 #define USBFS_USB__ARB_RW4_RA CYREG_USB_ARB_RW4_RA
302 #define USBFS_USB__ARB_RW4_RA_MSB CYREG_USB_ARB_RW4_RA_MSB
303 #define USBFS_USB__ARB_RW4_WA CYREG_USB_ARB_RW4_WA
304 #define USBFS_USB__ARB_RW4_WA_MSB CYREG_USB_ARB_RW4_WA_MSB
305 #define USBFS_USB__ARB_RW5_DR CYREG_USB_ARB_RW5_DR
306 #define USBFS_USB__ARB_RW5_RA CYREG_USB_ARB_RW5_RA
307 #define USBFS_USB__ARB_RW5_RA_MSB CYREG_USB_ARB_RW5_RA_MSB
308 #define USBFS_USB__ARB_RW5_WA CYREG_USB_ARB_RW5_WA
309 #define USBFS_USB__ARB_RW5_WA_MSB CYREG_USB_ARB_RW5_WA_MSB
310 #define USBFS_USB__ARB_RW6_DR CYREG_USB_ARB_RW6_DR
311 #define USBFS_USB__ARB_RW6_RA CYREG_USB_ARB_RW6_RA
312 #define USBFS_USB__ARB_RW6_RA_MSB CYREG_USB_ARB_RW6_RA_MSB
313 #define USBFS_USB__ARB_RW6_WA CYREG_USB_ARB_RW6_WA
314 #define USBFS_USB__ARB_RW6_WA_MSB CYREG_USB_ARB_RW6_WA_MSB
315 #define USBFS_USB__ARB_RW7_DR CYREG_USB_ARB_RW7_DR
316 #define USBFS_USB__ARB_RW7_RA CYREG_USB_ARB_RW7_RA
317 #define USBFS_USB__ARB_RW7_RA_MSB CYREG_USB_ARB_RW7_RA_MSB
318 #define USBFS_USB__ARB_RW7_WA CYREG_USB_ARB_RW7_WA
319 #define USBFS_USB__ARB_RW7_WA_MSB CYREG_USB_ARB_RW7_WA_MSB
320 #define USBFS_USB__ARB_RW8_DR CYREG_USB_ARB_RW8_DR
321 #define USBFS_USB__ARB_RW8_RA CYREG_USB_ARB_RW8_RA
322 #define USBFS_USB__ARB_RW8_RA_MSB CYREG_USB_ARB_RW8_RA_MSB
323 #define USBFS_USB__ARB_RW8_WA CYREG_USB_ARB_RW8_WA
324 #define USBFS_USB__ARB_RW8_WA_MSB CYREG_USB_ARB_RW8_WA_MSB
325 #define USBFS_USB__BUF_SIZE CYREG_USB_BUF_SIZE
326 #define USBFS_USB__BUS_RST_CNT CYREG_USB_BUS_RST_CNT
327 #define USBFS_USB__CR0 CYREG_USB_CR0
328 #define USBFS_USB__CR1 CYREG_USB_CR1
329 #define USBFS_USB__CWA CYREG_USB_CWA
330 #define USBFS_USB__CWA_MSB CYREG_USB_CWA_MSB
331 #define USBFS_USB__DMA_THRES CYREG_USB_DMA_THRES
332 #define USBFS_USB__DMA_THRES_MSB CYREG_USB_DMA_THRES_MSB
333 #define USBFS_USB__DYN_RECONFIG CYREG_USB_DYN_RECONFIG
334 #define USBFS_USB__EP_ACTIVE CYREG_USB_EP_ACTIVE
335 #define USBFS_USB__EP_TYPE CYREG_USB_EP_TYPE
336 #define USBFS_USB__EP0_CNT CYREG_USB_EP0_CNT
337 #define USBFS_USB__EP0_CR CYREG_USB_EP0_CR
338 #define USBFS_USB__EP0_DR0 CYREG_USB_EP0_DR0
339 #define USBFS_USB__EP0_DR1 CYREG_USB_EP0_DR1
340 #define USBFS_USB__EP0_DR2 CYREG_USB_EP0_DR2
341 #define USBFS_USB__EP0_DR3 CYREG_USB_EP0_DR3
342 #define USBFS_USB__EP0_DR4 CYREG_USB_EP0_DR4
343 #define USBFS_USB__EP0_DR5 CYREG_USB_EP0_DR5
344 #define USBFS_USB__EP0_DR6 CYREG_USB_EP0_DR6
345 #define USBFS_USB__EP0_DR7 CYREG_USB_EP0_DR7
346 #define USBFS_USB__MEM_DATA CYREG_USB_MEM_DATA_MBASE
347 #define USBFS_USB__PM_ACT_CFG CYREG_PM_ACT_CFG5
348 #define USBFS_USB__PM_ACT_MSK 0x01u
349 #define USBFS_USB__PM_STBY_CFG CYREG_PM_STBY_CFG5
350 #define USBFS_USB__PM_STBY_MSK 0x01u
351 #define USBFS_USB__SIE_EP_INT_EN CYREG_USB_SIE_EP_INT_EN
352 #define USBFS_USB__SIE_EP_INT_SR CYREG_USB_SIE_EP_INT_SR
353 #define USBFS_USB__SIE_EP1_CNT0 CYREG_USB_SIE_EP1_CNT0
354 #define USBFS_USB__SIE_EP1_CNT1 CYREG_USB_SIE_EP1_CNT1
355 #define USBFS_USB__SIE_EP1_CR0 CYREG_USB_SIE_EP1_CR0
356 #define USBFS_USB__SIE_EP2_CNT0 CYREG_USB_SIE_EP2_CNT0
357 #define USBFS_USB__SIE_EP2_CNT1 CYREG_USB_SIE_EP2_CNT1
358 #define USBFS_USB__SIE_EP2_CR0 CYREG_USB_SIE_EP2_CR0
359 #define USBFS_USB__SIE_EP3_CNT0 CYREG_USB_SIE_EP3_CNT0
360 #define USBFS_USB__SIE_EP3_CNT1 CYREG_USB_SIE_EP3_CNT1
361 #define USBFS_USB__SIE_EP3_CR0 CYREG_USB_SIE_EP3_CR0
362 #define USBFS_USB__SIE_EP4_CNT0 CYREG_USB_SIE_EP4_CNT0
363 #define USBFS_USB__SIE_EP4_CNT1 CYREG_USB_SIE_EP4_CNT1
364 #define USBFS_USB__SIE_EP4_CR0 CYREG_USB_SIE_EP4_CR0
365 #define USBFS_USB__SIE_EP5_CNT0 CYREG_USB_SIE_EP5_CNT0
366 #define USBFS_USB__SIE_EP5_CNT1 CYREG_USB_SIE_EP5_CNT1
367 #define USBFS_USB__SIE_EP5_CR0 CYREG_USB_SIE_EP5_CR0
368 #define USBFS_USB__SIE_EP6_CNT0 CYREG_USB_SIE_EP6_CNT0
369 #define USBFS_USB__SIE_EP6_CNT1 CYREG_USB_SIE_EP6_CNT1
370 #define USBFS_USB__SIE_EP6_CR0 CYREG_USB_SIE_EP6_CR0
371 #define USBFS_USB__SIE_EP7_CNT0 CYREG_USB_SIE_EP7_CNT0
372 #define USBFS_USB__SIE_EP7_CNT1 CYREG_USB_SIE_EP7_CNT1
373 #define USBFS_USB__SIE_EP7_CR0 CYREG_USB_SIE_EP7_CR0
374 #define USBFS_USB__SIE_EP8_CNT0 CYREG_USB_SIE_EP8_CNT0
375 #define USBFS_USB__SIE_EP8_CNT1 CYREG_USB_SIE_EP8_CNT1
376 #define USBFS_USB__SIE_EP8_CR0 CYREG_USB_SIE_EP8_CR0
377 #define USBFS_USB__SOF0 CYREG_USB_SOF0
378 #define USBFS_USB__SOF1 CYREG_USB_SOF1
379 #define USBFS_USB__USB_CLK_EN CYREG_USB_USB_CLK_EN
380 #define USBFS_USB__USBIO_CR0 CYREG_USB_USBIO_CR0
381 #define USBFS_USB__USBIO_CR1 CYREG_USB_USBIO_CR1
382
383 /* SDCard_BSPIM */
384 #define SDCard_BSPIM_BitCounter__16BIT_CONTROL_AUX_CTL_REG CYREG_B1_UDB06_07_ACTL
385 #define SDCard_BSPIM_BitCounter__16BIT_CONTROL_CONTROL_REG CYREG_B1_UDB06_07_CTL
386 #define SDCard_BSPIM_BitCounter__16BIT_CONTROL_COUNT_REG CYREG_B1_UDB06_07_CTL
387 #define SDCard_BSPIM_BitCounter__16BIT_COUNT_CONTROL_REG CYREG_B1_UDB06_07_CTL
388 #define SDCard_BSPIM_BitCounter__16BIT_COUNT_COUNT_REG CYREG_B1_UDB06_07_CTL
389 #define SDCard_BSPIM_BitCounter__16BIT_MASK_MASK_REG CYREG_B1_UDB06_07_MSK
390 #define SDCard_BSPIM_BitCounter__16BIT_MASK_PERIOD_REG CYREG_B1_UDB06_07_MSK
391 #define SDCard_BSPIM_BitCounter__16BIT_PERIOD_MASK_REG CYREG_B1_UDB06_07_MSK
392 #define SDCard_BSPIM_BitCounter__16BIT_PERIOD_PERIOD_REG CYREG_B1_UDB06_07_MSK
393 #define SDCard_BSPIM_BitCounter__CONTROL_AUX_CTL_REG CYREG_B1_UDB06_ACTL
394 #define SDCard_BSPIM_BitCounter__CONTROL_REG CYREG_B1_UDB06_CTL
395 #define SDCard_BSPIM_BitCounter__CONTROL_ST_REG CYREG_B1_UDB06_ST_CTL
396 #define SDCard_BSPIM_BitCounter__COUNT_REG CYREG_B1_UDB06_CTL
397 #define SDCard_BSPIM_BitCounter__COUNT_ST_REG CYREG_B1_UDB06_ST_CTL
398 #define SDCard_BSPIM_BitCounter__MASK_CTL_AUX_CTL_REG CYREG_B1_UDB06_MSK_ACTL
399 #define SDCard_BSPIM_BitCounter__PER_CTL_AUX_CTL_REG CYREG_B1_UDB06_MSK_ACTL
400 #define SDCard_BSPIM_BitCounter__PERIOD_REG CYREG_B1_UDB06_MSK
401 #define SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_AUX_CTL_REG CYREG_B1_UDB06_07_ACTL
402 #define SDCard_BSPIM_BitCounter_ST__16BIT_STATUS_REG CYREG_B1_UDB06_07_ST
403 #define SDCard_BSPIM_BitCounter_ST__MASK_REG CYREG_B1_UDB06_MSK
404 #define SDCard_BSPIM_BitCounter_ST__MASK_ST_AUX_CTL_REG CYREG_B1_UDB06_MSK_ACTL
405 #define SDCard_BSPIM_BitCounter_ST__PER_ST_AUX_CTL_REG CYREG_B1_UDB06_MSK_ACTL
406 #define SDCard_BSPIM_BitCounter_ST__STATUS_AUX_CTL_REG CYREG_B1_UDB06_ACTL
407 #define SDCard_BSPIM_BitCounter_ST__STATUS_CNT_REG CYREG_B1_UDB06_ST_CTL
408 #define SDCard_BSPIM_BitCounter_ST__STATUS_CONTROL_REG CYREG_B1_UDB06_ST_CTL
409 #define SDCard_BSPIM_BitCounter_ST__STATUS_REG CYREG_B1_UDB06_ST
410 #define SDCard_BSPIM_RxStsReg__16BIT_STATUS_AUX_CTL_REG CYREG_B0_UDB07_08_ACTL
411 #define SDCard_BSPIM_RxStsReg__16BIT_STATUS_REG CYREG_B0_UDB07_08_ST
412 #define SDCard_BSPIM_RxStsReg__4__MASK 0x10u
413 #define SDCard_BSPIM_RxStsReg__4__POS 4
414 #define SDCard_BSPIM_RxStsReg__5__MASK 0x20u
415 #define SDCard_BSPIM_RxStsReg__5__POS 5
416 #define SDCard_BSPIM_RxStsReg__6__MASK 0x40u
417 #define SDCard_BSPIM_RxStsReg__6__POS 6
418 #define SDCard_BSPIM_RxStsReg__MASK 0x70u
419 #define SDCard_BSPIM_RxStsReg__MASK_REG CYREG_B0_UDB07_MSK
420 #define SDCard_BSPIM_RxStsReg__STATUS_AUX_CTL_REG CYREG_B0_UDB07_ACTL
421 #define SDCard_BSPIM_RxStsReg__STATUS_REG CYREG_B0_UDB07_ST
422 #define SDCard_BSPIM_sR8_Dp_u0__16BIT_A0_REG CYREG_B1_UDB04_05_A0
423 #define SDCard_BSPIM_sR8_Dp_u0__16BIT_A1_REG CYREG_B1_UDB04_05_A1
424 #define SDCard_BSPIM_sR8_Dp_u0__16BIT_D0_REG CYREG_B1_UDB04_05_D0
425 #define SDCard_BSPIM_sR8_Dp_u0__16BIT_D1_REG CYREG_B1_UDB04_05_D1
426 #define SDCard_BSPIM_sR8_Dp_u0__16BIT_DP_AUX_CTL_REG CYREG_B1_UDB04_05_ACTL
427 #define SDCard_BSPIM_sR8_Dp_u0__16BIT_F0_REG CYREG_B1_UDB04_05_F0
428 #define SDCard_BSPIM_sR8_Dp_u0__16BIT_F1_REG CYREG_B1_UDB04_05_F1
429 #define SDCard_BSPIM_sR8_Dp_u0__A0_A1_REG CYREG_B1_UDB04_A0_A1
430 #define SDCard_BSPIM_sR8_Dp_u0__A0_REG CYREG_B1_UDB04_A0
431 #define SDCard_BSPIM_sR8_Dp_u0__A1_REG CYREG_B1_UDB04_A1
432 #define SDCard_BSPIM_sR8_Dp_u0__D0_D1_REG CYREG_B1_UDB04_D0_D1
433 #define SDCard_BSPIM_sR8_Dp_u0__D0_REG CYREG_B1_UDB04_D0
434 #define SDCard_BSPIM_sR8_Dp_u0__D1_REG CYREG_B1_UDB04_D1
435 #define SDCard_BSPIM_sR8_Dp_u0__DP_AUX_CTL_REG CYREG_B1_UDB04_ACTL
436 #define SDCard_BSPIM_sR8_Dp_u0__F0_F1_REG CYREG_B1_UDB04_F0_F1
437 #define SDCard_BSPIM_sR8_Dp_u0__F0_REG CYREG_B1_UDB04_F0
438 #define SDCard_BSPIM_sR8_Dp_u0__F1_REG CYREG_B1_UDB04_F1
439 #define SDCard_BSPIM_TxStsReg__0__MASK 0x01u
440 #define SDCard_BSPIM_TxStsReg__0__POS 0
441 #define SDCard_BSPIM_TxStsReg__1__MASK 0x02u
442 #define SDCard_BSPIM_TxStsReg__1__POS 1
443 #define SDCard_BSPIM_TxStsReg__16BIT_STATUS_AUX_CTL_REG CYREG_B1_UDB05_06_ACTL
444 #define SDCard_BSPIM_TxStsReg__16BIT_STATUS_REG CYREG_B1_UDB05_06_ST
445 #define SDCard_BSPIM_TxStsReg__2__MASK 0x04u
446 #define SDCard_BSPIM_TxStsReg__2__POS 2
447 #define SDCard_BSPIM_TxStsReg__3__MASK 0x08u
448 #define SDCard_BSPIM_TxStsReg__3__POS 3
449 #define SDCard_BSPIM_TxStsReg__4__MASK 0x10u
450 #define SDCard_BSPIM_TxStsReg__4__POS 4
451 #define SDCard_BSPIM_TxStsReg__MASK 0x1Fu
452 #define SDCard_BSPIM_TxStsReg__MASK_REG CYREG_B1_UDB05_MSK
453 #define SDCard_BSPIM_TxStsReg__STATUS_AUX_CTL_REG CYREG_B1_UDB05_ACTL
454 #define SDCard_BSPIM_TxStsReg__STATUS_REG CYREG_B1_UDB05_ST
455
456 /* SD_SCK */
457 #define SD_SCK__0__MASK 0x04u
458 #define SD_SCK__0__PC CYREG_PRT3_PC2
459 #define SD_SCK__0__PORT 3u
460 #define SD_SCK__0__SHIFT 2
461 #define SD_SCK__AG CYREG_PRT3_AG
462 #define SD_SCK__AMUX CYREG_PRT3_AMUX
463 #define SD_SCK__BIE CYREG_PRT3_BIE
464 #define SD_SCK__BIT_MASK CYREG_PRT3_BIT_MASK
465 #define SD_SCK__BYP CYREG_PRT3_BYP
466 #define SD_SCK__CTL CYREG_PRT3_CTL
467 #define SD_SCK__DM0 CYREG_PRT3_DM0
468 #define SD_SCK__DM1 CYREG_PRT3_DM1
469 #define SD_SCK__DM2 CYREG_PRT3_DM2
470 #define SD_SCK__DR CYREG_PRT3_DR
471 #define SD_SCK__INP_DIS CYREG_PRT3_INP_DIS
472 #define SD_SCK__LCD_COM_SEG CYREG_PRT3_LCD_COM_SEG
473 #define SD_SCK__LCD_EN CYREG_PRT3_LCD_EN
474 #define SD_SCK__MASK 0x04u
475 #define SD_SCK__PORT 3u
476 #define SD_SCK__PRT CYREG_PRT3_PRT
477 #define SD_SCK__PRTDSI__CAPS_SEL CYREG_PRT3_CAPS_SEL
478 #define SD_SCK__PRTDSI__DBL_SYNC_IN CYREG_PRT3_DBL_SYNC_IN
479 #define SD_SCK__PRTDSI__OE_SEL0 CYREG_PRT3_OE_SEL0
480 #define SD_SCK__PRTDSI__OE_SEL1 CYREG_PRT3_OE_SEL1
481 #define SD_SCK__PRTDSI__OUT_SEL0 CYREG_PRT3_OUT_SEL0
482 #define SD_SCK__PRTDSI__OUT_SEL1 CYREG_PRT3_OUT_SEL1
483 #define SD_SCK__PRTDSI__SYNC_OUT CYREG_PRT3_SYNC_OUT
484 #define SD_SCK__PS CYREG_PRT3_PS
485 #define SD_SCK__SHIFT 2
486 #define SD_SCK__SLW CYREG_PRT3_SLW
487
488 /* SCSI_In */
489 #define SCSI_In__0__AG CYREG_PRT2_AG
490 #define SCSI_In__0__AMUX CYREG_PRT2_AMUX
491 #define SCSI_In__0__BIE CYREG_PRT2_BIE
492 #define SCSI_In__0__BIT_MASK CYREG_PRT2_BIT_MASK
493 #define SCSI_In__0__BYP CYREG_PRT2_BYP
494 #define SCSI_In__0__CTL CYREG_PRT2_CTL
495 #define SCSI_In__0__DM0 CYREG_PRT2_DM0
496 #define SCSI_In__0__DM1 CYREG_PRT2_DM1
497 #define SCSI_In__0__DM2 CYREG_PRT2_DM2
498 #define SCSI_In__0__DR CYREG_PRT2_DR
499 #define SCSI_In__0__INP_DIS CYREG_PRT2_INP_DIS
500 #define SCSI_In__0__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
501 #define SCSI_In__0__LCD_EN CYREG_PRT2_LCD_EN
502 #define SCSI_In__0__MASK 0x01u
503 #define SCSI_In__0__PC CYREG_PRT2_PC0
504 #define SCSI_In__0__PORT 2u
505 #define SCSI_In__0__PRT CYREG_PRT2_PRT
506 #define SCSI_In__0__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
507 #define SCSI_In__0__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
508 #define SCSI_In__0__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
509 #define SCSI_In__0__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
510 #define SCSI_In__0__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
511 #define SCSI_In__0__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
512 #define SCSI_In__0__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
513 #define SCSI_In__0__PS CYREG_PRT2_PS
514 #define SCSI_In__0__SHIFT 0
515 #define SCSI_In__0__SLW CYREG_PRT2_SLW
516 #define SCSI_In__1__AG CYREG_PRT6_AG
517 #define SCSI_In__1__AMUX CYREG_PRT6_AMUX
518 #define SCSI_In__1__BIE CYREG_PRT6_BIE
519 #define SCSI_In__1__BIT_MASK CYREG_PRT6_BIT_MASK
520 #define SCSI_In__1__BYP CYREG_PRT6_BYP
521 #define SCSI_In__1__CTL CYREG_PRT6_CTL
522 #define SCSI_In__1__DM0 CYREG_PRT6_DM0
523 #define SCSI_In__1__DM1 CYREG_PRT6_DM1
524 #define SCSI_In__1__DM2 CYREG_PRT6_DM2
525 #define SCSI_In__1__DR CYREG_PRT6_DR
526 #define SCSI_In__1__INP_DIS CYREG_PRT6_INP_DIS
527 #define SCSI_In__1__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
528 #define SCSI_In__1__LCD_EN CYREG_PRT6_LCD_EN
529 #define SCSI_In__1__MASK 0x80u
530 #define SCSI_In__1__PC CYREG_PRT6_PC7
531 #define SCSI_In__1__PORT 6u
532 #define SCSI_In__1__PRT CYREG_PRT6_PRT
533 #define SCSI_In__1__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
534 #define SCSI_In__1__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
535 #define SCSI_In__1__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
536 #define SCSI_In__1__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
537 #define SCSI_In__1__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
538 #define SCSI_In__1__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
539 #define SCSI_In__1__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
540 #define SCSI_In__1__PS CYREG_PRT6_PS
541 #define SCSI_In__1__SHIFT 7
542 #define SCSI_In__1__SLW CYREG_PRT6_SLW
543 #define SCSI_In__2__AG CYREG_PRT5_AG
544 #define SCSI_In__2__AMUX CYREG_PRT5_AMUX
545 #define SCSI_In__2__BIE CYREG_PRT5_BIE
546 #define SCSI_In__2__BIT_MASK CYREG_PRT5_BIT_MASK
547 #define SCSI_In__2__BYP CYREG_PRT5_BYP
548 #define SCSI_In__2__CTL CYREG_PRT5_CTL
549 #define SCSI_In__2__DM0 CYREG_PRT5_DM0
550 #define SCSI_In__2__DM1 CYREG_PRT5_DM1
551 #define SCSI_In__2__DM2 CYREG_PRT5_DM2
552 #define SCSI_In__2__DR CYREG_PRT5_DR
553 #define SCSI_In__2__INP_DIS CYREG_PRT5_INP_DIS
554 #define SCSI_In__2__LCD_COM_SEG CYREG_PRT5_LCD_COM_SEG
555 #define SCSI_In__2__LCD_EN CYREG_PRT5_LCD_EN
556 #define SCSI_In__2__MASK 0x02u
557 #define SCSI_In__2__PC CYREG_PRT5_PC1
558 #define SCSI_In__2__PORT 5u
559 #define SCSI_In__2__PRT CYREG_PRT5_PRT
560 #define SCSI_In__2__PRTDSI__CAPS_SEL CYREG_PRT5_CAPS_SEL
561 #define SCSI_In__2__PRTDSI__DBL_SYNC_IN CYREG_PRT5_DBL_SYNC_IN
562 #define SCSI_In__2__PRTDSI__OE_SEL0 CYREG_PRT5_OE_SEL0
563 #define SCSI_In__2__PRTDSI__OE_SEL1 CYREG_PRT5_OE_SEL1
564 #define SCSI_In__2__PRTDSI__OUT_SEL0 CYREG_PRT5_OUT_SEL0
565 #define SCSI_In__2__PRTDSI__OUT_SEL1 CYREG_PRT5_OUT_SEL1
566 #define SCSI_In__2__PRTDSI__SYNC_OUT CYREG_PRT5_SYNC_OUT
567 #define SCSI_In__2__PS CYREG_PRT5_PS
568 #define SCSI_In__2__SHIFT 1
569 #define SCSI_In__2__SLW CYREG_PRT5_SLW
570 #define SCSI_In__3__AG CYREG_PRT5_AG
571 #define SCSI_In__3__AMUX CYREG_PRT5_AMUX
572 #define SCSI_In__3__BIE CYREG_PRT5_BIE
573 #define SCSI_In__3__BIT_MASK CYREG_PRT5_BIT_MASK
574 #define SCSI_In__3__BYP CYREG_PRT5_BYP
575 #define SCSI_In__3__CTL CYREG_PRT5_CTL
576 #define SCSI_In__3__DM0 CYREG_PRT5_DM0
577 #define SCSI_In__3__DM1 CYREG_PRT5_DM1
578 #define SCSI_In__3__DM2 CYREG_PRT5_DM2
579 #define SCSI_In__3__DR CYREG_PRT5_DR
580 #define SCSI_In__3__INP_DIS CYREG_PRT5_INP_DIS
581 #define SCSI_In__3__LCD_COM_SEG CYREG_PRT5_LCD_COM_SEG
582 #define SCSI_In__3__LCD_EN CYREG_PRT5_LCD_EN
583 #define SCSI_In__3__MASK 0x04u
584 #define SCSI_In__3__PC CYREG_PRT5_PC2
585 #define SCSI_In__3__PORT 5u
586 #define SCSI_In__3__PRT CYREG_PRT5_PRT
587 #define SCSI_In__3__PRTDSI__CAPS_SEL CYREG_PRT5_CAPS_SEL
588 #define SCSI_In__3__PRTDSI__DBL_SYNC_IN CYREG_PRT5_DBL_SYNC_IN
589 #define SCSI_In__3__PRTDSI__OE_SEL0 CYREG_PRT5_OE_SEL0
590 #define SCSI_In__3__PRTDSI__OE_SEL1 CYREG_PRT5_OE_SEL1
591 #define SCSI_In__3__PRTDSI__OUT_SEL0 CYREG_PRT5_OUT_SEL0
592 #define SCSI_In__3__PRTDSI__OUT_SEL1 CYREG_PRT5_OUT_SEL1
593 #define SCSI_In__3__PRTDSI__SYNC_OUT CYREG_PRT5_SYNC_OUT
594 #define SCSI_In__3__PS CYREG_PRT5_PS
595 #define SCSI_In__3__SHIFT 2
596 #define SCSI_In__3__SLW CYREG_PRT5_SLW
597 #define SCSI_In__4__AG CYREG_PRT5_AG
598 #define SCSI_In__4__AMUX CYREG_PRT5_AMUX
599 #define SCSI_In__4__BIE CYREG_PRT5_BIE
600 #define SCSI_In__4__BIT_MASK CYREG_PRT5_BIT_MASK
601 #define SCSI_In__4__BYP CYREG_PRT5_BYP
602 #define SCSI_In__4__CTL CYREG_PRT5_CTL
603 #define SCSI_In__4__DM0 CYREG_PRT5_DM0
604 #define SCSI_In__4__DM1 CYREG_PRT5_DM1
605 #define SCSI_In__4__DM2 CYREG_PRT5_DM2
606 #define SCSI_In__4__DR CYREG_PRT5_DR
607 #define SCSI_In__4__INP_DIS CYREG_PRT5_INP_DIS
608 #define SCSI_In__4__LCD_COM_SEG CYREG_PRT5_LCD_COM_SEG
609 #define SCSI_In__4__LCD_EN CYREG_PRT5_LCD_EN
610 #define SCSI_In__4__MASK 0x08u
611 #define SCSI_In__4__PC CYREG_PRT5_PC3
612 #define SCSI_In__4__PORT 5u
613 #define SCSI_In__4__PRT CYREG_PRT5_PRT
614 #define SCSI_In__4__PRTDSI__CAPS_SEL CYREG_PRT5_CAPS_SEL
615 #define SCSI_In__4__PRTDSI__DBL_SYNC_IN CYREG_PRT5_DBL_SYNC_IN
616 #define SCSI_In__4__PRTDSI__OE_SEL0 CYREG_PRT5_OE_SEL0
617 #define SCSI_In__4__PRTDSI__OE_SEL1 CYREG_PRT5_OE_SEL1
618 #define SCSI_In__4__PRTDSI__OUT_SEL0 CYREG_PRT5_OUT_SEL0
619 #define SCSI_In__4__PRTDSI__OUT_SEL1 CYREG_PRT5_OUT_SEL1
620 #define SCSI_In__4__PRTDSI__SYNC_OUT CYREG_PRT5_SYNC_OUT
621 #define SCSI_In__4__PS CYREG_PRT5_PS
622 #define SCSI_In__4__SHIFT 3
623 #define SCSI_In__4__SLW CYREG_PRT5_SLW
624 #define SCSI_In__CD__AG CYREG_PRT5_AG
625 #define SCSI_In__CD__AMUX CYREG_PRT5_AMUX
626 #define SCSI_In__CD__BIE CYREG_PRT5_BIE
627 #define SCSI_In__CD__BIT_MASK CYREG_PRT5_BIT_MASK
628 #define SCSI_In__CD__BYP CYREG_PRT5_BYP
629 #define SCSI_In__CD__CTL CYREG_PRT5_CTL
630 #define SCSI_In__CD__DM0 CYREG_PRT5_DM0
631 #define SCSI_In__CD__DM1 CYREG_PRT5_DM1
632 #define SCSI_In__CD__DM2 CYREG_PRT5_DM2
633 #define SCSI_In__CD__DR CYREG_PRT5_DR
634 #define SCSI_In__CD__INP_DIS CYREG_PRT5_INP_DIS
635 #define SCSI_In__CD__LCD_COM_SEG CYREG_PRT5_LCD_COM_SEG
636 #define SCSI_In__CD__LCD_EN CYREG_PRT5_LCD_EN
637 #define SCSI_In__CD__MASK 0x02u
638 #define SCSI_In__CD__PC CYREG_PRT5_PC1
639 #define SCSI_In__CD__PORT 5u
640 #define SCSI_In__CD__PRT CYREG_PRT5_PRT
641 #define SCSI_In__CD__PRTDSI__CAPS_SEL CYREG_PRT5_CAPS_SEL
642 #define SCSI_In__CD__PRTDSI__DBL_SYNC_IN CYREG_PRT5_DBL_SYNC_IN
643 #define SCSI_In__CD__PRTDSI__OE_SEL0 CYREG_PRT5_OE_SEL0
644 #define SCSI_In__CD__PRTDSI__OE_SEL1 CYREG_PRT5_OE_SEL1
645 #define SCSI_In__CD__PRTDSI__OUT_SEL0 CYREG_PRT5_OUT_SEL0
646 #define SCSI_In__CD__PRTDSI__OUT_SEL1 CYREG_PRT5_OUT_SEL1
647 #define SCSI_In__CD__PRTDSI__SYNC_OUT CYREG_PRT5_SYNC_OUT
648 #define SCSI_In__CD__PS CYREG_PRT5_PS
649 #define SCSI_In__CD__SHIFT 1
650 #define SCSI_In__CD__SLW CYREG_PRT5_SLW
651 #define SCSI_In__DBP__AG CYREG_PRT2_AG
652 #define SCSI_In__DBP__AMUX CYREG_PRT2_AMUX
653 #define SCSI_In__DBP__BIE CYREG_PRT2_BIE
654 #define SCSI_In__DBP__BIT_MASK CYREG_PRT2_BIT_MASK
655 #define SCSI_In__DBP__BYP CYREG_PRT2_BYP
656 #define SCSI_In__DBP__CTL CYREG_PRT2_CTL
657 #define SCSI_In__DBP__DM0 CYREG_PRT2_DM0
658 #define SCSI_In__DBP__DM1 CYREG_PRT2_DM1
659 #define SCSI_In__DBP__DM2 CYREG_PRT2_DM2
660 #define SCSI_In__DBP__DR CYREG_PRT2_DR
661 #define SCSI_In__DBP__INP_DIS CYREG_PRT2_INP_DIS
662 #define SCSI_In__DBP__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
663 #define SCSI_In__DBP__LCD_EN CYREG_PRT2_LCD_EN
664 #define SCSI_In__DBP__MASK 0x01u
665 #define SCSI_In__DBP__PC CYREG_PRT2_PC0
666 #define SCSI_In__DBP__PORT 2u
667 #define SCSI_In__DBP__PRT CYREG_PRT2_PRT
668 #define SCSI_In__DBP__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
669 #define SCSI_In__DBP__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
670 #define SCSI_In__DBP__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
671 #define SCSI_In__DBP__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
672 #define SCSI_In__DBP__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
673 #define SCSI_In__DBP__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
674 #define SCSI_In__DBP__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
675 #define SCSI_In__DBP__PS CYREG_PRT2_PS
676 #define SCSI_In__DBP__SHIFT 0
677 #define SCSI_In__DBP__SLW CYREG_PRT2_SLW
678 #define SCSI_In__IO__AG CYREG_PRT5_AG
679 #define SCSI_In__IO__AMUX CYREG_PRT5_AMUX
680 #define SCSI_In__IO__BIE CYREG_PRT5_BIE
681 #define SCSI_In__IO__BIT_MASK CYREG_PRT5_BIT_MASK
682 #define SCSI_In__IO__BYP CYREG_PRT5_BYP
683 #define SCSI_In__IO__CTL CYREG_PRT5_CTL
684 #define SCSI_In__IO__DM0 CYREG_PRT5_DM0
685 #define SCSI_In__IO__DM1 CYREG_PRT5_DM1
686 #define SCSI_In__IO__DM2 CYREG_PRT5_DM2
687 #define SCSI_In__IO__DR CYREG_PRT5_DR
688 #define SCSI_In__IO__INP_DIS CYREG_PRT5_INP_DIS
689 #define SCSI_In__IO__LCD_COM_SEG CYREG_PRT5_LCD_COM_SEG
690 #define SCSI_In__IO__LCD_EN CYREG_PRT5_LCD_EN
691 #define SCSI_In__IO__MASK 0x08u
692 #define SCSI_In__IO__PC CYREG_PRT5_PC3
693 #define SCSI_In__IO__PORT 5u
694 #define SCSI_In__IO__PRT CYREG_PRT5_PRT
695 #define SCSI_In__IO__PRTDSI__CAPS_SEL CYREG_PRT5_CAPS_SEL
696 #define SCSI_In__IO__PRTDSI__DBL_SYNC_IN CYREG_PRT5_DBL_SYNC_IN
697 #define SCSI_In__IO__PRTDSI__OE_SEL0 CYREG_PRT5_OE_SEL0
698 #define SCSI_In__IO__PRTDSI__OE_SEL1 CYREG_PRT5_OE_SEL1
699 #define SCSI_In__IO__PRTDSI__OUT_SEL0 CYREG_PRT5_OUT_SEL0
700 #define SCSI_In__IO__PRTDSI__OUT_SEL1 CYREG_PRT5_OUT_SEL1
701 #define SCSI_In__IO__PRTDSI__SYNC_OUT CYREG_PRT5_SYNC_OUT
702 #define SCSI_In__IO__PS CYREG_PRT5_PS
703 #define SCSI_In__IO__SHIFT 3
704 #define SCSI_In__IO__SLW CYREG_PRT5_SLW
705 #define SCSI_In__MSG__AG CYREG_PRT6_AG
706 #define SCSI_In__MSG__AMUX CYREG_PRT6_AMUX
707 #define SCSI_In__MSG__BIE CYREG_PRT6_BIE
708 #define SCSI_In__MSG__BIT_MASK CYREG_PRT6_BIT_MASK
709 #define SCSI_In__MSG__BYP CYREG_PRT6_BYP
710 #define SCSI_In__MSG__CTL CYREG_PRT6_CTL
711 #define SCSI_In__MSG__DM0 CYREG_PRT6_DM0
712 #define SCSI_In__MSG__DM1 CYREG_PRT6_DM1
713 #define SCSI_In__MSG__DM2 CYREG_PRT6_DM2
714 #define SCSI_In__MSG__DR CYREG_PRT6_DR
715 #define SCSI_In__MSG__INP_DIS CYREG_PRT6_INP_DIS
716 #define SCSI_In__MSG__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
717 #define SCSI_In__MSG__LCD_EN CYREG_PRT6_LCD_EN
718 #define SCSI_In__MSG__MASK 0x80u
719 #define SCSI_In__MSG__PC CYREG_PRT6_PC7
720 #define SCSI_In__MSG__PORT 6u
721 #define SCSI_In__MSG__PRT CYREG_PRT6_PRT
722 #define SCSI_In__MSG__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
723 #define SCSI_In__MSG__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
724 #define SCSI_In__MSG__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
725 #define SCSI_In__MSG__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
726 #define SCSI_In__MSG__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
727 #define SCSI_In__MSG__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
728 #define SCSI_In__MSG__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
729 #define SCSI_In__MSG__PS CYREG_PRT6_PS
730 #define SCSI_In__MSG__SHIFT 7
731 #define SCSI_In__MSG__SLW CYREG_PRT6_SLW
732 #define SCSI_In__REQ__AG CYREG_PRT5_AG
733 #define SCSI_In__REQ__AMUX CYREG_PRT5_AMUX
734 #define SCSI_In__REQ__BIE CYREG_PRT5_BIE
735 #define SCSI_In__REQ__BIT_MASK CYREG_PRT5_BIT_MASK
736 #define SCSI_In__REQ__BYP CYREG_PRT5_BYP
737 #define SCSI_In__REQ__CTL CYREG_PRT5_CTL
738 #define SCSI_In__REQ__DM0 CYREG_PRT5_DM0
739 #define SCSI_In__REQ__DM1 CYREG_PRT5_DM1
740 #define SCSI_In__REQ__DM2 CYREG_PRT5_DM2
741 #define SCSI_In__REQ__DR CYREG_PRT5_DR
742 #define SCSI_In__REQ__INP_DIS CYREG_PRT5_INP_DIS
743 #define SCSI_In__REQ__LCD_COM_SEG CYREG_PRT5_LCD_COM_SEG
744 #define SCSI_In__REQ__LCD_EN CYREG_PRT5_LCD_EN
745 #define SCSI_In__REQ__MASK 0x04u
746 #define SCSI_In__REQ__PC CYREG_PRT5_PC2
747 #define SCSI_In__REQ__PORT 5u
748 #define SCSI_In__REQ__PRT CYREG_PRT5_PRT
749 #define SCSI_In__REQ__PRTDSI__CAPS_SEL CYREG_PRT5_CAPS_SEL
750 #define SCSI_In__REQ__PRTDSI__DBL_SYNC_IN CYREG_PRT5_DBL_SYNC_IN
751 #define SCSI_In__REQ__PRTDSI__OE_SEL0 CYREG_PRT5_OE_SEL0
752 #define SCSI_In__REQ__PRTDSI__OE_SEL1 CYREG_PRT5_OE_SEL1
753 #define SCSI_In__REQ__PRTDSI__OUT_SEL0 CYREG_PRT5_OUT_SEL0
754 #define SCSI_In__REQ__PRTDSI__OUT_SEL1 CYREG_PRT5_OUT_SEL1
755 #define SCSI_In__REQ__PRTDSI__SYNC_OUT CYREG_PRT5_SYNC_OUT
756 #define SCSI_In__REQ__PS CYREG_PRT5_PS
757 #define SCSI_In__REQ__SHIFT 2
758 #define SCSI_In__REQ__SLW CYREG_PRT5_SLW
759
760 /* SCSI_In_DBx */
761 #define SCSI_In_DBx__0__AG CYREG_PRT12_AG
762 #define SCSI_In_DBx__0__BIE CYREG_PRT12_BIE
763 #define SCSI_In_DBx__0__BIT_MASK CYREG_PRT12_BIT_MASK
764 #define SCSI_In_DBx__0__BYP CYREG_PRT12_BYP
765 #define SCSI_In_DBx__0__DM0 CYREG_PRT12_DM0
766 #define SCSI_In_DBx__0__DM1 CYREG_PRT12_DM1
767 #define SCSI_In_DBx__0__DM2 CYREG_PRT12_DM2
768 #define SCSI_In_DBx__0__DR CYREG_PRT12_DR
769 #define SCSI_In_DBx__0__INP_DIS CYREG_PRT12_INP_DIS
770 #define SCSI_In_DBx__0__MASK 0x10u
771 #define SCSI_In_DBx__0__PC CYREG_PRT12_PC4
772 #define SCSI_In_DBx__0__PORT 12u
773 #define SCSI_In_DBx__0__PRT CYREG_PRT12_PRT
774 #define SCSI_In_DBx__0__PRTDSI__DBL_SYNC_IN CYREG_PRT12_DBL_SYNC_IN
775 #define SCSI_In_DBx__0__PRTDSI__OE_SEL0 CYREG_PRT12_OE_SEL0
776 #define SCSI_In_DBx__0__PRTDSI__OE_SEL1 CYREG_PRT12_OE_SEL1
777 #define SCSI_In_DBx__0__PRTDSI__OUT_SEL0 CYREG_PRT12_OUT_SEL0
778 #define SCSI_In_DBx__0__PRTDSI__OUT_SEL1 CYREG_PRT12_OUT_SEL1
779 #define SCSI_In_DBx__0__PRTDSI__SYNC_OUT CYREG_PRT12_SYNC_OUT
780 #define SCSI_In_DBx__0__PS CYREG_PRT12_PS
781 #define SCSI_In_DBx__0__SHIFT 4
782 #define SCSI_In_DBx__0__SIO_CFG CYREG_PRT12_SIO_CFG
783 #define SCSI_In_DBx__0__SIO_DIFF CYREG_PRT12_SIO_DIFF
784 #define SCSI_In_DBx__0__SIO_HYST_EN CYREG_PRT12_SIO_HYST_EN
785 #define SCSI_In_DBx__0__SIO_REG_HIFREQ CYREG_PRT12_SIO_REG_HIFREQ
786 #define SCSI_In_DBx__0__SLW CYREG_PRT12_SLW
787 #define SCSI_In_DBx__1__AG CYREG_PRT2_AG
788 #define SCSI_In_DBx__1__AMUX CYREG_PRT2_AMUX
789 #define SCSI_In_DBx__1__BIE CYREG_PRT2_BIE
790 #define SCSI_In_DBx__1__BIT_MASK CYREG_PRT2_BIT_MASK
791 #define SCSI_In_DBx__1__BYP CYREG_PRT2_BYP
792 #define SCSI_In_DBx__1__CTL CYREG_PRT2_CTL
793 #define SCSI_In_DBx__1__DM0 CYREG_PRT2_DM0
794 #define SCSI_In_DBx__1__DM1 CYREG_PRT2_DM1
795 #define SCSI_In_DBx__1__DM2 CYREG_PRT2_DM2
796 #define SCSI_In_DBx__1__DR CYREG_PRT2_DR
797 #define SCSI_In_DBx__1__INP_DIS CYREG_PRT2_INP_DIS
798 #define SCSI_In_DBx__1__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
799 #define SCSI_In_DBx__1__LCD_EN CYREG_PRT2_LCD_EN
800 #define SCSI_In_DBx__1__MASK 0x80u
801 #define SCSI_In_DBx__1__PC CYREG_PRT2_PC7
802 #define SCSI_In_DBx__1__PORT 2u
803 #define SCSI_In_DBx__1__PRT CYREG_PRT2_PRT
804 #define SCSI_In_DBx__1__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
805 #define SCSI_In_DBx__1__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
806 #define SCSI_In_DBx__1__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
807 #define SCSI_In_DBx__1__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
808 #define SCSI_In_DBx__1__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
809 #define SCSI_In_DBx__1__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
810 #define SCSI_In_DBx__1__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
811 #define SCSI_In_DBx__1__PS CYREG_PRT2_PS
812 #define SCSI_In_DBx__1__SHIFT 7
813 #define SCSI_In_DBx__1__SLW CYREG_PRT2_SLW
814 #define SCSI_In_DBx__2__AG CYREG_PRT2_AG
815 #define SCSI_In_DBx__2__AMUX CYREG_PRT2_AMUX
816 #define SCSI_In_DBx__2__BIE CYREG_PRT2_BIE
817 #define SCSI_In_DBx__2__BIT_MASK CYREG_PRT2_BIT_MASK
818 #define SCSI_In_DBx__2__BYP CYREG_PRT2_BYP
819 #define SCSI_In_DBx__2__CTL CYREG_PRT2_CTL
820 #define SCSI_In_DBx__2__DM0 CYREG_PRT2_DM0
821 #define SCSI_In_DBx__2__DM1 CYREG_PRT2_DM1
822 #define SCSI_In_DBx__2__DM2 CYREG_PRT2_DM2
823 #define SCSI_In_DBx__2__DR CYREG_PRT2_DR
824 #define SCSI_In_DBx__2__INP_DIS CYREG_PRT2_INP_DIS
825 #define SCSI_In_DBx__2__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
826 #define SCSI_In_DBx__2__LCD_EN CYREG_PRT2_LCD_EN
827 #define SCSI_In_DBx__2__MASK 0x40u
828 #define SCSI_In_DBx__2__PC CYREG_PRT2_PC6
829 #define SCSI_In_DBx__2__PORT 2u
830 #define SCSI_In_DBx__2__PRT CYREG_PRT2_PRT
831 #define SCSI_In_DBx__2__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
832 #define SCSI_In_DBx__2__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
833 #define SCSI_In_DBx__2__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
834 #define SCSI_In_DBx__2__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
835 #define SCSI_In_DBx__2__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
836 #define SCSI_In_DBx__2__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
837 #define SCSI_In_DBx__2__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
838 #define SCSI_In_DBx__2__PS CYREG_PRT2_PS
839 #define SCSI_In_DBx__2__SHIFT 6
840 #define SCSI_In_DBx__2__SLW CYREG_PRT2_SLW
841 #define SCSI_In_DBx__3__AG CYREG_PRT2_AG
842 #define SCSI_In_DBx__3__AMUX CYREG_PRT2_AMUX
843 #define SCSI_In_DBx__3__BIE CYREG_PRT2_BIE
844 #define SCSI_In_DBx__3__BIT_MASK CYREG_PRT2_BIT_MASK
845 #define SCSI_In_DBx__3__BYP CYREG_PRT2_BYP
846 #define SCSI_In_DBx__3__CTL CYREG_PRT2_CTL
847 #define SCSI_In_DBx__3__DM0 CYREG_PRT2_DM0
848 #define SCSI_In_DBx__3__DM1 CYREG_PRT2_DM1
849 #define SCSI_In_DBx__3__DM2 CYREG_PRT2_DM2
850 #define SCSI_In_DBx__3__DR CYREG_PRT2_DR
851 #define SCSI_In_DBx__3__INP_DIS CYREG_PRT2_INP_DIS
852 #define SCSI_In_DBx__3__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
853 #define SCSI_In_DBx__3__LCD_EN CYREG_PRT2_LCD_EN
854 #define SCSI_In_DBx__3__MASK 0x20u
855 #define SCSI_In_DBx__3__PC CYREG_PRT2_PC5
856 #define SCSI_In_DBx__3__PORT 2u
857 #define SCSI_In_DBx__3__PRT CYREG_PRT2_PRT
858 #define SCSI_In_DBx__3__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
859 #define SCSI_In_DBx__3__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
860 #define SCSI_In_DBx__3__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
861 #define SCSI_In_DBx__3__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
862 #define SCSI_In_DBx__3__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
863 #define SCSI_In_DBx__3__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
864 #define SCSI_In_DBx__3__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
865 #define SCSI_In_DBx__3__PS CYREG_PRT2_PS
866 #define SCSI_In_DBx__3__SHIFT 5
867 #define SCSI_In_DBx__3__SLW CYREG_PRT2_SLW
868 #define SCSI_In_DBx__4__AG CYREG_PRT2_AG
869 #define SCSI_In_DBx__4__AMUX CYREG_PRT2_AMUX
870 #define SCSI_In_DBx__4__BIE CYREG_PRT2_BIE
871 #define SCSI_In_DBx__4__BIT_MASK CYREG_PRT2_BIT_MASK
872 #define SCSI_In_DBx__4__BYP CYREG_PRT2_BYP
873 #define SCSI_In_DBx__4__CTL CYREG_PRT2_CTL
874 #define SCSI_In_DBx__4__DM0 CYREG_PRT2_DM0
875 #define SCSI_In_DBx__4__DM1 CYREG_PRT2_DM1
876 #define SCSI_In_DBx__4__DM2 CYREG_PRT2_DM2
877 #define SCSI_In_DBx__4__DR CYREG_PRT2_DR
878 #define SCSI_In_DBx__4__INP_DIS CYREG_PRT2_INP_DIS
879 #define SCSI_In_DBx__4__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
880 #define SCSI_In_DBx__4__LCD_EN CYREG_PRT2_LCD_EN
881 #define SCSI_In_DBx__4__MASK 0x10u
882 #define SCSI_In_DBx__4__PC CYREG_PRT2_PC4
883 #define SCSI_In_DBx__4__PORT 2u
884 #define SCSI_In_DBx__4__PRT CYREG_PRT2_PRT
885 #define SCSI_In_DBx__4__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
886 #define SCSI_In_DBx__4__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
887 #define SCSI_In_DBx__4__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
888 #define SCSI_In_DBx__4__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
889 #define SCSI_In_DBx__4__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
890 #define SCSI_In_DBx__4__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
891 #define SCSI_In_DBx__4__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
892 #define SCSI_In_DBx__4__PS CYREG_PRT2_PS
893 #define SCSI_In_DBx__4__SHIFT 4
894 #define SCSI_In_DBx__4__SLW CYREG_PRT2_SLW
895 #define SCSI_In_DBx__5__AG CYREG_PRT2_AG
896 #define SCSI_In_DBx__5__AMUX CYREG_PRT2_AMUX
897 #define SCSI_In_DBx__5__BIE CYREG_PRT2_BIE
898 #define SCSI_In_DBx__5__BIT_MASK CYREG_PRT2_BIT_MASK
899 #define SCSI_In_DBx__5__BYP CYREG_PRT2_BYP
900 #define SCSI_In_DBx__5__CTL CYREG_PRT2_CTL
901 #define SCSI_In_DBx__5__DM0 CYREG_PRT2_DM0
902 #define SCSI_In_DBx__5__DM1 CYREG_PRT2_DM1
903 #define SCSI_In_DBx__5__DM2 CYREG_PRT2_DM2
904 #define SCSI_In_DBx__5__DR CYREG_PRT2_DR
905 #define SCSI_In_DBx__5__INP_DIS CYREG_PRT2_INP_DIS
906 #define SCSI_In_DBx__5__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
907 #define SCSI_In_DBx__5__LCD_EN CYREG_PRT2_LCD_EN
908 #define SCSI_In_DBx__5__MASK 0x08u
909 #define SCSI_In_DBx__5__PC CYREG_PRT2_PC3
910 #define SCSI_In_DBx__5__PORT 2u
911 #define SCSI_In_DBx__5__PRT CYREG_PRT2_PRT
912 #define SCSI_In_DBx__5__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
913 #define SCSI_In_DBx__5__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
914 #define SCSI_In_DBx__5__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
915 #define SCSI_In_DBx__5__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
916 #define SCSI_In_DBx__5__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
917 #define SCSI_In_DBx__5__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
918 #define SCSI_In_DBx__5__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
919 #define SCSI_In_DBx__5__PS CYREG_PRT2_PS
920 #define SCSI_In_DBx__5__SHIFT 3
921 #define SCSI_In_DBx__5__SLW CYREG_PRT2_SLW
922 #define SCSI_In_DBx__6__AG CYREG_PRT2_AG
923 #define SCSI_In_DBx__6__AMUX CYREG_PRT2_AMUX
924 #define SCSI_In_DBx__6__BIE CYREG_PRT2_BIE
925 #define SCSI_In_DBx__6__BIT_MASK CYREG_PRT2_BIT_MASK
926 #define SCSI_In_DBx__6__BYP CYREG_PRT2_BYP
927 #define SCSI_In_DBx__6__CTL CYREG_PRT2_CTL
928 #define SCSI_In_DBx__6__DM0 CYREG_PRT2_DM0
929 #define SCSI_In_DBx__6__DM1 CYREG_PRT2_DM1
930 #define SCSI_In_DBx__6__DM2 CYREG_PRT2_DM2
931 #define SCSI_In_DBx__6__DR CYREG_PRT2_DR
932 #define SCSI_In_DBx__6__INP_DIS CYREG_PRT2_INP_DIS
933 #define SCSI_In_DBx__6__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
934 #define SCSI_In_DBx__6__LCD_EN CYREG_PRT2_LCD_EN
935 #define SCSI_In_DBx__6__MASK 0x04u
936 #define SCSI_In_DBx__6__PC CYREG_PRT2_PC2
937 #define SCSI_In_DBx__6__PORT 2u
938 #define SCSI_In_DBx__6__PRT CYREG_PRT2_PRT
939 #define SCSI_In_DBx__6__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
940 #define SCSI_In_DBx__6__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
941 #define SCSI_In_DBx__6__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
942 #define SCSI_In_DBx__6__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
943 #define SCSI_In_DBx__6__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
944 #define SCSI_In_DBx__6__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
945 #define SCSI_In_DBx__6__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
946 #define SCSI_In_DBx__6__PS CYREG_PRT2_PS
947 #define SCSI_In_DBx__6__SHIFT 2
948 #define SCSI_In_DBx__6__SLW CYREG_PRT2_SLW
949 #define SCSI_In_DBx__7__AG CYREG_PRT2_AG
950 #define SCSI_In_DBx__7__AMUX CYREG_PRT2_AMUX
951 #define SCSI_In_DBx__7__BIE CYREG_PRT2_BIE
952 #define SCSI_In_DBx__7__BIT_MASK CYREG_PRT2_BIT_MASK
953 #define SCSI_In_DBx__7__BYP CYREG_PRT2_BYP
954 #define SCSI_In_DBx__7__CTL CYREG_PRT2_CTL
955 #define SCSI_In_DBx__7__DM0 CYREG_PRT2_DM0
956 #define SCSI_In_DBx__7__DM1 CYREG_PRT2_DM1
957 #define SCSI_In_DBx__7__DM2 CYREG_PRT2_DM2
958 #define SCSI_In_DBx__7__DR CYREG_PRT2_DR
959 #define SCSI_In_DBx__7__INP_DIS CYREG_PRT2_INP_DIS
960 #define SCSI_In_DBx__7__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
961 #define SCSI_In_DBx__7__LCD_EN CYREG_PRT2_LCD_EN
962 #define SCSI_In_DBx__7__MASK 0x02u
963 #define SCSI_In_DBx__7__PC CYREG_PRT2_PC1
964 #define SCSI_In_DBx__7__PORT 2u
965 #define SCSI_In_DBx__7__PRT CYREG_PRT2_PRT
966 #define SCSI_In_DBx__7__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
967 #define SCSI_In_DBx__7__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
968 #define SCSI_In_DBx__7__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
969 #define SCSI_In_DBx__7__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
970 #define SCSI_In_DBx__7__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
971 #define SCSI_In_DBx__7__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
972 #define SCSI_In_DBx__7__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
973 #define SCSI_In_DBx__7__PS CYREG_PRT2_PS
974 #define SCSI_In_DBx__7__SHIFT 1
975 #define SCSI_In_DBx__7__SLW CYREG_PRT2_SLW
976 #define SCSI_In_DBx__DB0__AG CYREG_PRT12_AG
977 #define SCSI_In_DBx__DB0__BIE CYREG_PRT12_BIE
978 #define SCSI_In_DBx__DB0__BIT_MASK CYREG_PRT12_BIT_MASK
979 #define SCSI_In_DBx__DB0__BYP CYREG_PRT12_BYP
980 #define SCSI_In_DBx__DB0__DM0 CYREG_PRT12_DM0
981 #define SCSI_In_DBx__DB0__DM1 CYREG_PRT12_DM1
982 #define SCSI_In_DBx__DB0__DM2 CYREG_PRT12_DM2
983 #define SCSI_In_DBx__DB0__DR CYREG_PRT12_DR
984 #define SCSI_In_DBx__DB0__INP_DIS CYREG_PRT12_INP_DIS
985 #define SCSI_In_DBx__DB0__MASK 0x10u
986 #define SCSI_In_DBx__DB0__PC CYREG_PRT12_PC4
987 #define SCSI_In_DBx__DB0__PORT 12u
988 #define SCSI_In_DBx__DB0__PRT CYREG_PRT12_PRT
989 #define SCSI_In_DBx__DB0__PRTDSI__DBL_SYNC_IN CYREG_PRT12_DBL_SYNC_IN
990 #define SCSI_In_DBx__DB0__PRTDSI__OE_SEL0 CYREG_PRT12_OE_SEL0
991 #define SCSI_In_DBx__DB0__PRTDSI__OE_SEL1 CYREG_PRT12_OE_SEL1
992 #define SCSI_In_DBx__DB0__PRTDSI__OUT_SEL0 CYREG_PRT12_OUT_SEL0
993 #define SCSI_In_DBx__DB0__PRTDSI__OUT_SEL1 CYREG_PRT12_OUT_SEL1
994 #define SCSI_In_DBx__DB0__PRTDSI__SYNC_OUT CYREG_PRT12_SYNC_OUT
995 #define SCSI_In_DBx__DB0__PS CYREG_PRT12_PS
996 #define SCSI_In_DBx__DB0__SHIFT 4
997 #define SCSI_In_DBx__DB0__SIO_CFG CYREG_PRT12_SIO_CFG
998 #define SCSI_In_DBx__DB0__SIO_DIFF CYREG_PRT12_SIO_DIFF
999 #define SCSI_In_DBx__DB0__SIO_HYST_EN CYREG_PRT12_SIO_HYST_EN
1000 #define SCSI_In_DBx__DB0__SIO_REG_HIFREQ CYREG_PRT12_SIO_REG_HIFREQ
1001 #define SCSI_In_DBx__DB0__SLW CYREG_PRT12_SLW
1002 #define SCSI_In_DBx__DB1__AG CYREG_PRT2_AG
1003 #define SCSI_In_DBx__DB1__AMUX CYREG_PRT2_AMUX
1004 #define SCSI_In_DBx__DB1__BIE CYREG_PRT2_BIE
1005 #define SCSI_In_DBx__DB1__BIT_MASK CYREG_PRT2_BIT_MASK
1006 #define SCSI_In_DBx__DB1__BYP CYREG_PRT2_BYP
1007 #define SCSI_In_DBx__DB1__CTL CYREG_PRT2_CTL
1008 #define SCSI_In_DBx__DB1__DM0 CYREG_PRT2_DM0
1009 #define SCSI_In_DBx__DB1__DM1 CYREG_PRT2_DM1
1010 #define SCSI_In_DBx__DB1__DM2 CYREG_PRT2_DM2
1011 #define SCSI_In_DBx__DB1__DR CYREG_PRT2_DR
1012 #define SCSI_In_DBx__DB1__INP_DIS CYREG_PRT2_INP_DIS
1013 #define SCSI_In_DBx__DB1__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
1014 #define SCSI_In_DBx__DB1__LCD_EN CYREG_PRT2_LCD_EN
1015 #define SCSI_In_DBx__DB1__MASK 0x80u
1016 #define SCSI_In_DBx__DB1__PC CYREG_PRT2_PC7
1017 #define SCSI_In_DBx__DB1__PORT 2u
1018 #define SCSI_In_DBx__DB1__PRT CYREG_PRT2_PRT
1019 #define SCSI_In_DBx__DB1__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
1020 #define SCSI_In_DBx__DB1__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
1021 #define SCSI_In_DBx__DB1__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
1022 #define SCSI_In_DBx__DB1__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
1023 #define SCSI_In_DBx__DB1__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
1024 #define SCSI_In_DBx__DB1__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
1025 #define SCSI_In_DBx__DB1__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
1026 #define SCSI_In_DBx__DB1__PS CYREG_PRT2_PS
1027 #define SCSI_In_DBx__DB1__SHIFT 7
1028 #define SCSI_In_DBx__DB1__SLW CYREG_PRT2_SLW
1029 #define SCSI_In_DBx__DB2__AG CYREG_PRT2_AG
1030 #define SCSI_In_DBx__DB2__AMUX CYREG_PRT2_AMUX
1031 #define SCSI_In_DBx__DB2__BIE CYREG_PRT2_BIE
1032 #define SCSI_In_DBx__DB2__BIT_MASK CYREG_PRT2_BIT_MASK
1033 #define SCSI_In_DBx__DB2__BYP CYREG_PRT2_BYP
1034 #define SCSI_In_DBx__DB2__CTL CYREG_PRT2_CTL
1035 #define SCSI_In_DBx__DB2__DM0 CYREG_PRT2_DM0
1036 #define SCSI_In_DBx__DB2__DM1 CYREG_PRT2_DM1
1037 #define SCSI_In_DBx__DB2__DM2 CYREG_PRT2_DM2
1038 #define SCSI_In_DBx__DB2__DR CYREG_PRT2_DR
1039 #define SCSI_In_DBx__DB2__INP_DIS CYREG_PRT2_INP_DIS
1040 #define SCSI_In_DBx__DB2__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
1041 #define SCSI_In_DBx__DB2__LCD_EN CYREG_PRT2_LCD_EN
1042 #define SCSI_In_DBx__DB2__MASK 0x40u
1043 #define SCSI_In_DBx__DB2__PC CYREG_PRT2_PC6
1044 #define SCSI_In_DBx__DB2__PORT 2u
1045 #define SCSI_In_DBx__DB2__PRT CYREG_PRT2_PRT
1046 #define SCSI_In_DBx__DB2__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
1047 #define SCSI_In_DBx__DB2__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
1048 #define SCSI_In_DBx__DB2__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
1049 #define SCSI_In_DBx__DB2__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
1050 #define SCSI_In_DBx__DB2__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
1051 #define SCSI_In_DBx__DB2__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
1052 #define SCSI_In_DBx__DB2__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
1053 #define SCSI_In_DBx__DB2__PS CYREG_PRT2_PS
1054 #define SCSI_In_DBx__DB2__SHIFT 6
1055 #define SCSI_In_DBx__DB2__SLW CYREG_PRT2_SLW
1056 #define SCSI_In_DBx__DB3__AG CYREG_PRT2_AG
1057 #define SCSI_In_DBx__DB3__AMUX CYREG_PRT2_AMUX
1058 #define SCSI_In_DBx__DB3__BIE CYREG_PRT2_BIE
1059 #define SCSI_In_DBx__DB3__BIT_MASK CYREG_PRT2_BIT_MASK
1060 #define SCSI_In_DBx__DB3__BYP CYREG_PRT2_BYP
1061 #define SCSI_In_DBx__DB3__CTL CYREG_PRT2_CTL
1062 #define SCSI_In_DBx__DB3__DM0 CYREG_PRT2_DM0
1063 #define SCSI_In_DBx__DB3__DM1 CYREG_PRT2_DM1
1064 #define SCSI_In_DBx__DB3__DM2 CYREG_PRT2_DM2
1065 #define SCSI_In_DBx__DB3__DR CYREG_PRT2_DR
1066 #define SCSI_In_DBx__DB3__INP_DIS CYREG_PRT2_INP_DIS
1067 #define SCSI_In_DBx__DB3__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
1068 #define SCSI_In_DBx__DB3__LCD_EN CYREG_PRT2_LCD_EN
1069 #define SCSI_In_DBx__DB3__MASK 0x20u
1070 #define SCSI_In_DBx__DB3__PC CYREG_PRT2_PC5
1071 #define SCSI_In_DBx__DB3__PORT 2u
1072 #define SCSI_In_DBx__DB3__PRT CYREG_PRT2_PRT
1073 #define SCSI_In_DBx__DB3__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
1074 #define SCSI_In_DBx__DB3__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
1075 #define SCSI_In_DBx__DB3__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
1076 #define SCSI_In_DBx__DB3__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
1077 #define SCSI_In_DBx__DB3__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
1078 #define SCSI_In_DBx__DB3__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
1079 #define SCSI_In_DBx__DB3__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
1080 #define SCSI_In_DBx__DB3__PS CYREG_PRT2_PS
1081 #define SCSI_In_DBx__DB3__SHIFT 5
1082 #define SCSI_In_DBx__DB3__SLW CYREG_PRT2_SLW
1083 #define SCSI_In_DBx__DB4__AG CYREG_PRT2_AG
1084 #define SCSI_In_DBx__DB4__AMUX CYREG_PRT2_AMUX
1085 #define SCSI_In_DBx__DB4__BIE CYREG_PRT2_BIE
1086 #define SCSI_In_DBx__DB4__BIT_MASK CYREG_PRT2_BIT_MASK
1087 #define SCSI_In_DBx__DB4__BYP CYREG_PRT2_BYP
1088 #define SCSI_In_DBx__DB4__CTL CYREG_PRT2_CTL
1089 #define SCSI_In_DBx__DB4__DM0 CYREG_PRT2_DM0
1090 #define SCSI_In_DBx__DB4__DM1 CYREG_PRT2_DM1
1091 #define SCSI_In_DBx__DB4__DM2 CYREG_PRT2_DM2
1092 #define SCSI_In_DBx__DB4__DR CYREG_PRT2_DR
1093 #define SCSI_In_DBx__DB4__INP_DIS CYREG_PRT2_INP_DIS
1094 #define SCSI_In_DBx__DB4__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
1095 #define SCSI_In_DBx__DB4__LCD_EN CYREG_PRT2_LCD_EN
1096 #define SCSI_In_DBx__DB4__MASK 0x10u
1097 #define SCSI_In_DBx__DB4__PC CYREG_PRT2_PC4
1098 #define SCSI_In_DBx__DB4__PORT 2u
1099 #define SCSI_In_DBx__DB4__PRT CYREG_PRT2_PRT
1100 #define SCSI_In_DBx__DB4__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
1101 #define SCSI_In_DBx__DB4__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
1102 #define SCSI_In_DBx__DB4__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
1103 #define SCSI_In_DBx__DB4__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
1104 #define SCSI_In_DBx__DB4__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
1105 #define SCSI_In_DBx__DB4__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
1106 #define SCSI_In_DBx__DB4__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
1107 #define SCSI_In_DBx__DB4__PS CYREG_PRT2_PS
1108 #define SCSI_In_DBx__DB4__SHIFT 4
1109 #define SCSI_In_DBx__DB4__SLW CYREG_PRT2_SLW
1110 #define SCSI_In_DBx__DB5__AG CYREG_PRT2_AG
1111 #define SCSI_In_DBx__DB5__AMUX CYREG_PRT2_AMUX
1112 #define SCSI_In_DBx__DB5__BIE CYREG_PRT2_BIE
1113 #define SCSI_In_DBx__DB5__BIT_MASK CYREG_PRT2_BIT_MASK
1114 #define SCSI_In_DBx__DB5__BYP CYREG_PRT2_BYP
1115 #define SCSI_In_DBx__DB5__CTL CYREG_PRT2_CTL
1116 #define SCSI_In_DBx__DB5__DM0 CYREG_PRT2_DM0
1117 #define SCSI_In_DBx__DB5__DM1 CYREG_PRT2_DM1
1118 #define SCSI_In_DBx__DB5__DM2 CYREG_PRT2_DM2
1119 #define SCSI_In_DBx__DB5__DR CYREG_PRT2_DR
1120 #define SCSI_In_DBx__DB5__INP_DIS CYREG_PRT2_INP_DIS
1121 #define SCSI_In_DBx__DB5__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
1122 #define SCSI_In_DBx__DB5__LCD_EN CYREG_PRT2_LCD_EN
1123 #define SCSI_In_DBx__DB5__MASK 0x08u
1124 #define SCSI_In_DBx__DB5__PC CYREG_PRT2_PC3
1125 #define SCSI_In_DBx__DB5__PORT 2u
1126 #define SCSI_In_DBx__DB5__PRT CYREG_PRT2_PRT
1127 #define SCSI_In_DBx__DB5__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
1128 #define SCSI_In_DBx__DB5__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
1129 #define SCSI_In_DBx__DB5__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
1130 #define SCSI_In_DBx__DB5__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
1131 #define SCSI_In_DBx__DB5__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
1132 #define SCSI_In_DBx__DB5__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
1133 #define SCSI_In_DBx__DB5__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
1134 #define SCSI_In_DBx__DB5__PS CYREG_PRT2_PS
1135 #define SCSI_In_DBx__DB5__SHIFT 3
1136 #define SCSI_In_DBx__DB5__SLW CYREG_PRT2_SLW
1137 #define SCSI_In_DBx__DB6__AG CYREG_PRT2_AG
1138 #define SCSI_In_DBx__DB6__AMUX CYREG_PRT2_AMUX
1139 #define SCSI_In_DBx__DB6__BIE CYREG_PRT2_BIE
1140 #define SCSI_In_DBx__DB6__BIT_MASK CYREG_PRT2_BIT_MASK
1141 #define SCSI_In_DBx__DB6__BYP CYREG_PRT2_BYP
1142 #define SCSI_In_DBx__DB6__CTL CYREG_PRT2_CTL
1143 #define SCSI_In_DBx__DB6__DM0 CYREG_PRT2_DM0
1144 #define SCSI_In_DBx__DB6__DM1 CYREG_PRT2_DM1
1145 #define SCSI_In_DBx__DB6__DM2 CYREG_PRT2_DM2
1146 #define SCSI_In_DBx__DB6__DR CYREG_PRT2_DR
1147 #define SCSI_In_DBx__DB6__INP_DIS CYREG_PRT2_INP_DIS
1148 #define SCSI_In_DBx__DB6__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
1149 #define SCSI_In_DBx__DB6__LCD_EN CYREG_PRT2_LCD_EN
1150 #define SCSI_In_DBx__DB6__MASK 0x04u
1151 #define SCSI_In_DBx__DB6__PC CYREG_PRT2_PC2
1152 #define SCSI_In_DBx__DB6__PORT 2u
1153 #define SCSI_In_DBx__DB6__PRT CYREG_PRT2_PRT
1154 #define SCSI_In_DBx__DB6__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
1155 #define SCSI_In_DBx__DB6__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
1156 #define SCSI_In_DBx__DB6__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
1157 #define SCSI_In_DBx__DB6__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
1158 #define SCSI_In_DBx__DB6__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
1159 #define SCSI_In_DBx__DB6__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
1160 #define SCSI_In_DBx__DB6__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
1161 #define SCSI_In_DBx__DB6__PS CYREG_PRT2_PS
1162 #define SCSI_In_DBx__DB6__SHIFT 2
1163 #define SCSI_In_DBx__DB6__SLW CYREG_PRT2_SLW
1164 #define SCSI_In_DBx__DB7__AG CYREG_PRT2_AG
1165 #define SCSI_In_DBx__DB7__AMUX CYREG_PRT2_AMUX
1166 #define SCSI_In_DBx__DB7__BIE CYREG_PRT2_BIE
1167 #define SCSI_In_DBx__DB7__BIT_MASK CYREG_PRT2_BIT_MASK
1168 #define SCSI_In_DBx__DB7__BYP CYREG_PRT2_BYP
1169 #define SCSI_In_DBx__DB7__CTL CYREG_PRT2_CTL
1170 #define SCSI_In_DBx__DB7__DM0 CYREG_PRT2_DM0
1171 #define SCSI_In_DBx__DB7__DM1 CYREG_PRT2_DM1
1172 #define SCSI_In_DBx__DB7__DM2 CYREG_PRT2_DM2
1173 #define SCSI_In_DBx__DB7__DR CYREG_PRT2_DR
1174 #define SCSI_In_DBx__DB7__INP_DIS CYREG_PRT2_INP_DIS
1175 #define SCSI_In_DBx__DB7__LCD_COM_SEG CYREG_PRT2_LCD_COM_SEG
1176 #define SCSI_In_DBx__DB7__LCD_EN CYREG_PRT2_LCD_EN
1177 #define SCSI_In_DBx__DB7__MASK 0x02u
1178 #define SCSI_In_DBx__DB7__PC CYREG_PRT2_PC1
1179 #define SCSI_In_DBx__DB7__PORT 2u
1180 #define SCSI_In_DBx__DB7__PRT CYREG_PRT2_PRT
1181 #define SCSI_In_DBx__DB7__PRTDSI__CAPS_SEL CYREG_PRT2_CAPS_SEL
1182 #define SCSI_In_DBx__DB7__PRTDSI__DBL_SYNC_IN CYREG_PRT2_DBL_SYNC_IN
1183 #define SCSI_In_DBx__DB7__PRTDSI__OE_SEL0 CYREG_PRT2_OE_SEL0
1184 #define SCSI_In_DBx__DB7__PRTDSI__OE_SEL1 CYREG_PRT2_OE_SEL1
1185 #define SCSI_In_DBx__DB7__PRTDSI__OUT_SEL0 CYREG_PRT2_OUT_SEL0
1186 #define SCSI_In_DBx__DB7__PRTDSI__OUT_SEL1 CYREG_PRT2_OUT_SEL1
1187 #define SCSI_In_DBx__DB7__PRTDSI__SYNC_OUT CYREG_PRT2_SYNC_OUT
1188 #define SCSI_In_DBx__DB7__PS CYREG_PRT2_PS
1189 #define SCSI_In_DBx__DB7__SHIFT 1
1190 #define SCSI_In_DBx__DB7__SLW CYREG_PRT2_SLW
1191
1192 /* SD_DAT1 */
1193 #define SD_DAT1__0__MASK 0x01u
1194 #define SD_DAT1__0__PC CYREG_PRT3_PC0
1195 #define SD_DAT1__0__PORT 3u
1196 #define SD_DAT1__0__SHIFT 0
1197 #define SD_DAT1__AG CYREG_PRT3_AG
1198 #define SD_DAT1__AMUX CYREG_PRT3_AMUX
1199 #define SD_DAT1__BIE CYREG_PRT3_BIE
1200 #define SD_DAT1__BIT_MASK CYREG_PRT3_BIT_MASK
1201 #define SD_DAT1__BYP CYREG_PRT3_BYP
1202 #define SD_DAT1__CTL CYREG_PRT3_CTL
1203 #define SD_DAT1__DM0 CYREG_PRT3_DM0
1204 #define SD_DAT1__DM1 CYREG_PRT3_DM1
1205 #define SD_DAT1__DM2 CYREG_PRT3_DM2
1206 #define SD_DAT1__DR CYREG_PRT3_DR
1207 #define SD_DAT1__INP_DIS CYREG_PRT3_INP_DIS
1208 #define SD_DAT1__LCD_COM_SEG CYREG_PRT3_LCD_COM_SEG
1209 #define SD_DAT1__LCD_EN CYREG_PRT3_LCD_EN
1210 #define SD_DAT1__MASK 0x01u
1211 #define SD_DAT1__PORT 3u
1212 #define SD_DAT1__PRT CYREG_PRT3_PRT
1213 #define SD_DAT1__PRTDSI__CAPS_SEL CYREG_PRT3_CAPS_SEL
1214 #define SD_DAT1__PRTDSI__DBL_SYNC_IN CYREG_PRT3_DBL_SYNC_IN
1215 #define SD_DAT1__PRTDSI__OE_SEL0 CYREG_PRT3_OE_SEL0
1216 #define SD_DAT1__PRTDSI__OE_SEL1 CYREG_PRT3_OE_SEL1
1217 #define SD_DAT1__PRTDSI__OUT_SEL0 CYREG_PRT3_OUT_SEL0
1218 #define SD_DAT1__PRTDSI__OUT_SEL1 CYREG_PRT3_OUT_SEL1
1219 #define SD_DAT1__PRTDSI__SYNC_OUT CYREG_PRT3_SYNC_OUT
1220 #define SD_DAT1__PS CYREG_PRT3_PS
1221 #define SD_DAT1__SHIFT 0
1222 #define SD_DAT1__SLW CYREG_PRT3_SLW
1223
1224 /* SD_DAT2 */
1225 #define SD_DAT2__0__MASK 0x20u
1226 #define SD_DAT2__0__PC CYREG_PRT3_PC5
1227 #define SD_DAT2__0__PORT 3u
1228 #define SD_DAT2__0__SHIFT 5
1229 #define SD_DAT2__AG CYREG_PRT3_AG
1230 #define SD_DAT2__AMUX CYREG_PRT3_AMUX
1231 #define SD_DAT2__BIE CYREG_PRT3_BIE
1232 #define SD_DAT2__BIT_MASK CYREG_PRT3_BIT_MASK
1233 #define SD_DAT2__BYP CYREG_PRT3_BYP
1234 #define SD_DAT2__CTL CYREG_PRT3_CTL
1235 #define SD_DAT2__DM0 CYREG_PRT3_DM0
1236 #define SD_DAT2__DM1 CYREG_PRT3_DM1
1237 #define SD_DAT2__DM2 CYREG_PRT3_DM2
1238 #define SD_DAT2__DR CYREG_PRT3_DR
1239 #define SD_DAT2__INP_DIS CYREG_PRT3_INP_DIS
1240 #define SD_DAT2__LCD_COM_SEG CYREG_PRT3_LCD_COM_SEG
1241 #define SD_DAT2__LCD_EN CYREG_PRT3_LCD_EN
1242 #define SD_DAT2__MASK 0x20u
1243 #define SD_DAT2__PORT 3u
1244 #define SD_DAT2__PRT CYREG_PRT3_PRT
1245 #define SD_DAT2__PRTDSI__CAPS_SEL CYREG_PRT3_CAPS_SEL
1246 #define SD_DAT2__PRTDSI__DBL_SYNC_IN CYREG_PRT3_DBL_SYNC_IN
1247 #define SD_DAT2__PRTDSI__OE_SEL0 CYREG_PRT3_OE_SEL0
1248 #define SD_DAT2__PRTDSI__OE_SEL1 CYREG_PRT3_OE_SEL1
1249 #define SD_DAT2__PRTDSI__OUT_SEL0 CYREG_PRT3_OUT_SEL0
1250 #define SD_DAT2__PRTDSI__OUT_SEL1 CYREG_PRT3_OUT_SEL1
1251 #define SD_DAT2__PRTDSI__SYNC_OUT CYREG_PRT3_SYNC_OUT
1252 #define SD_DAT2__PS CYREG_PRT3_PS
1253 #define SD_DAT2__SHIFT 5
1254 #define SD_DAT2__SLW CYREG_PRT3_SLW
1255
1256 /* SD_MISO */
1257 #define SD_MISO__0__MASK 0x02u
1258 #define SD_MISO__0__PC CYREG_PRT3_PC1
1259 #define SD_MISO__0__PORT 3u
1260 #define SD_MISO__0__SHIFT 1
1261 #define SD_MISO__AG CYREG_PRT3_AG
1262 #define SD_MISO__AMUX CYREG_PRT3_AMUX
1263 #define SD_MISO__BIE CYREG_PRT3_BIE
1264 #define SD_MISO__BIT_MASK CYREG_PRT3_BIT_MASK
1265 #define SD_MISO__BYP CYREG_PRT3_BYP
1266 #define SD_MISO__CTL CYREG_PRT3_CTL
1267 #define SD_MISO__DM0 CYREG_PRT3_DM0
1268 #define SD_MISO__DM1 CYREG_PRT3_DM1
1269 #define SD_MISO__DM2 CYREG_PRT3_DM2
1270 #define SD_MISO__DR CYREG_PRT3_DR
1271 #define SD_MISO__INP_DIS CYREG_PRT3_INP_DIS
1272 #define SD_MISO__LCD_COM_SEG CYREG_PRT3_LCD_COM_SEG
1273 #define SD_MISO__LCD_EN CYREG_PRT3_LCD_EN
1274 #define SD_MISO__MASK 0x02u
1275 #define SD_MISO__PORT 3u
1276 #define SD_MISO__PRT CYREG_PRT3_PRT
1277 #define SD_MISO__PRTDSI__CAPS_SEL CYREG_PRT3_CAPS_SEL
1278 #define SD_MISO__PRTDSI__DBL_SYNC_IN CYREG_PRT3_DBL_SYNC_IN
1279 #define SD_MISO__PRTDSI__OE_SEL0 CYREG_PRT3_OE_SEL0
1280 #define SD_MISO__PRTDSI__OE_SEL1 CYREG_PRT3_OE_SEL1
1281 #define SD_MISO__PRTDSI__OUT_SEL0 CYREG_PRT3_OUT_SEL0
1282 #define SD_MISO__PRTDSI__OUT_SEL1 CYREG_PRT3_OUT_SEL1
1283 #define SD_MISO__PRTDSI__SYNC_OUT CYREG_PRT3_SYNC_OUT
1284 #define SD_MISO__PS CYREG_PRT3_PS
1285 #define SD_MISO__SHIFT 1
1286 #define SD_MISO__SLW CYREG_PRT3_SLW
1287
1288 /* SD_MOSI */
1289 #define SD_MOSI__0__MASK 0x08u
1290 #define SD_MOSI__0__PC CYREG_PRT3_PC3
1291 #define SD_MOSI__0__PORT 3u
1292 #define SD_MOSI__0__SHIFT 3
1293 #define SD_MOSI__AG CYREG_PRT3_AG
1294 #define SD_MOSI__AMUX CYREG_PRT3_AMUX
1295 #define SD_MOSI__BIE CYREG_PRT3_BIE
1296 #define SD_MOSI__BIT_MASK CYREG_PRT3_BIT_MASK
1297 #define SD_MOSI__BYP CYREG_PRT3_BYP
1298 #define SD_MOSI__CTL CYREG_PRT3_CTL
1299 #define SD_MOSI__DM0 CYREG_PRT3_DM0
1300 #define SD_MOSI__DM1 CYREG_PRT3_DM1
1301 #define SD_MOSI__DM2 CYREG_PRT3_DM2
1302 #define SD_MOSI__DR CYREG_PRT3_DR
1303 #define SD_MOSI__INP_DIS CYREG_PRT3_INP_DIS
1304 #define SD_MOSI__LCD_COM_SEG CYREG_PRT3_LCD_COM_SEG
1305 #define SD_MOSI__LCD_EN CYREG_PRT3_LCD_EN
1306 #define SD_MOSI__MASK 0x08u
1307 #define SD_MOSI__PORT 3u
1308 #define SD_MOSI__PRT CYREG_PRT3_PRT
1309 #define SD_MOSI__PRTDSI__CAPS_SEL CYREG_PRT3_CAPS_SEL
1310 #define SD_MOSI__PRTDSI__DBL_SYNC_IN CYREG_PRT3_DBL_SYNC_IN
1311 #define SD_MOSI__PRTDSI__OE_SEL0 CYREG_PRT3_OE_SEL0
1312 #define SD_MOSI__PRTDSI__OE_SEL1 CYREG_PRT3_OE_SEL1
1313 #define SD_MOSI__PRTDSI__OUT_SEL0 CYREG_PRT3_OUT_SEL0
1314 #define SD_MOSI__PRTDSI__OUT_SEL1 CYREG_PRT3_OUT_SEL1
1315 #define SD_MOSI__PRTDSI__SYNC_OUT CYREG_PRT3_SYNC_OUT
1316 #define SD_MOSI__PS CYREG_PRT3_PS
1317 #define SD_MOSI__SHIFT 3
1318 #define SD_MOSI__SLW CYREG_PRT3_SLW
1319
1320 /* SCSI_CLK */
1321 #define SCSI_CLK__CFG0 CYREG_CLKDIST_DCFG1_CFG0
1322 #define SCSI_CLK__CFG1 CYREG_CLKDIST_DCFG1_CFG1
1323 #define SCSI_CLK__CFG2 CYREG_CLKDIST_DCFG1_CFG2
1324 #define SCSI_CLK__CFG2_SRC_SEL_MASK 0x07u
1325 #define SCSI_CLK__INDEX 0x01u
1326 #define SCSI_CLK__PM_ACT_CFG CYREG_PM_ACT_CFG2
1327 #define SCSI_CLK__PM_ACT_MSK 0x02u
1328 #define SCSI_CLK__PM_STBY_CFG CYREG_PM_STBY_CFG2
1329 #define SCSI_CLK__PM_STBY_MSK 0x02u
1330
1331 /* SCSI_Out */
1332 #define SCSI_Out__0__AG CYREG_PRT4_AG
1333 #define SCSI_Out__0__AMUX CYREG_PRT4_AMUX
1334 #define SCSI_Out__0__BIE CYREG_PRT4_BIE
1335 #define SCSI_Out__0__BIT_MASK CYREG_PRT4_BIT_MASK
1336 #define SCSI_Out__0__BYP CYREG_PRT4_BYP
1337 #define SCSI_Out__0__CTL CYREG_PRT4_CTL
1338 #define SCSI_Out__0__DM0 CYREG_PRT4_DM0
1339 #define SCSI_Out__0__DM1 CYREG_PRT4_DM1
1340 #define SCSI_Out__0__DM2 CYREG_PRT4_DM2
1341 #define SCSI_Out__0__DR CYREG_PRT4_DR
1342 #define SCSI_Out__0__INP_DIS CYREG_PRT4_INP_DIS
1343 #define SCSI_Out__0__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG
1344 #define SCSI_Out__0__LCD_EN CYREG_PRT4_LCD_EN
1345 #define SCSI_Out__0__MASK 0x08u
1346 #define SCSI_Out__0__PC CYREG_PRT4_PC3
1347 #define SCSI_Out__0__PORT 4u
1348 #define SCSI_Out__0__PRT CYREG_PRT4_PRT
1349 #define SCSI_Out__0__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL
1350 #define SCSI_Out__0__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN
1351 #define SCSI_Out__0__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0
1352 #define SCSI_Out__0__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1
1353 #define SCSI_Out__0__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0
1354 #define SCSI_Out__0__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1
1355 #define SCSI_Out__0__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT
1356 #define SCSI_Out__0__PS CYREG_PRT4_PS
1357 #define SCSI_Out__0__SHIFT 3
1358 #define SCSI_Out__0__SLW CYREG_PRT4_SLW
1359 #define SCSI_Out__1__AG CYREG_PRT4_AG
1360 #define SCSI_Out__1__AMUX CYREG_PRT4_AMUX
1361 #define SCSI_Out__1__BIE CYREG_PRT4_BIE
1362 #define SCSI_Out__1__BIT_MASK CYREG_PRT4_BIT_MASK
1363 #define SCSI_Out__1__BYP CYREG_PRT4_BYP
1364 #define SCSI_Out__1__CTL CYREG_PRT4_CTL
1365 #define SCSI_Out__1__DM0 CYREG_PRT4_DM0
1366 #define SCSI_Out__1__DM1 CYREG_PRT4_DM1
1367 #define SCSI_Out__1__DM2 CYREG_PRT4_DM2
1368 #define SCSI_Out__1__DR CYREG_PRT4_DR
1369 #define SCSI_Out__1__INP_DIS CYREG_PRT4_INP_DIS
1370 #define SCSI_Out__1__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG
1371 #define SCSI_Out__1__LCD_EN CYREG_PRT4_LCD_EN
1372 #define SCSI_Out__1__MASK 0x04u
1373 #define SCSI_Out__1__PC CYREG_PRT4_PC2
1374 #define SCSI_Out__1__PORT 4u
1375 #define SCSI_Out__1__PRT CYREG_PRT4_PRT
1376 #define SCSI_Out__1__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL
1377 #define SCSI_Out__1__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN
1378 #define SCSI_Out__1__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0
1379 #define SCSI_Out__1__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1
1380 #define SCSI_Out__1__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0
1381 #define SCSI_Out__1__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1
1382 #define SCSI_Out__1__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT
1383 #define SCSI_Out__1__PS CYREG_PRT4_PS
1384 #define SCSI_Out__1__SHIFT 2
1385 #define SCSI_Out__1__SLW CYREG_PRT4_SLW
1386 #define SCSI_Out__2__AG CYREG_PRT0_AG
1387 #define SCSI_Out__2__AMUX CYREG_PRT0_AMUX
1388 #define SCSI_Out__2__BIE CYREG_PRT0_BIE
1389 #define SCSI_Out__2__BIT_MASK CYREG_PRT0_BIT_MASK
1390 #define SCSI_Out__2__BYP CYREG_PRT0_BYP
1391 #define SCSI_Out__2__CTL CYREG_PRT0_CTL
1392 #define SCSI_Out__2__DM0 CYREG_PRT0_DM0
1393 #define SCSI_Out__2__DM1 CYREG_PRT0_DM1
1394 #define SCSI_Out__2__DM2 CYREG_PRT0_DM2
1395 #define SCSI_Out__2__DR CYREG_PRT0_DR
1396 #define SCSI_Out__2__INP_DIS CYREG_PRT0_INP_DIS
1397 #define SCSI_Out__2__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
1398 #define SCSI_Out__2__LCD_EN CYREG_PRT0_LCD_EN
1399 #define SCSI_Out__2__MASK 0x80u
1400 #define SCSI_Out__2__PC CYREG_PRT0_PC7
1401 #define SCSI_Out__2__PORT 0u
1402 #define SCSI_Out__2__PRT CYREG_PRT0_PRT
1403 #define SCSI_Out__2__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
1404 #define SCSI_Out__2__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
1405 #define SCSI_Out__2__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
1406 #define SCSI_Out__2__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
1407 #define SCSI_Out__2__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
1408 #define SCSI_Out__2__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
1409 #define SCSI_Out__2__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
1410 #define SCSI_Out__2__PS CYREG_PRT0_PS
1411 #define SCSI_Out__2__SHIFT 7
1412 #define SCSI_Out__2__SLW CYREG_PRT0_SLW
1413 #define SCSI_Out__3__AG CYREG_PRT0_AG
1414 #define SCSI_Out__3__AMUX CYREG_PRT0_AMUX
1415 #define SCSI_Out__3__BIE CYREG_PRT0_BIE
1416 #define SCSI_Out__3__BIT_MASK CYREG_PRT0_BIT_MASK
1417 #define SCSI_Out__3__BYP CYREG_PRT0_BYP
1418 #define SCSI_Out__3__CTL CYREG_PRT0_CTL
1419 #define SCSI_Out__3__DM0 CYREG_PRT0_DM0
1420 #define SCSI_Out__3__DM1 CYREG_PRT0_DM1
1421 #define SCSI_Out__3__DM2 CYREG_PRT0_DM2
1422 #define SCSI_Out__3__DR CYREG_PRT0_DR
1423 #define SCSI_Out__3__INP_DIS CYREG_PRT0_INP_DIS
1424 #define SCSI_Out__3__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
1425 #define SCSI_Out__3__LCD_EN CYREG_PRT0_LCD_EN
1426 #define SCSI_Out__3__MASK 0x40u
1427 #define SCSI_Out__3__PC CYREG_PRT0_PC6
1428 #define SCSI_Out__3__PORT 0u
1429 #define SCSI_Out__3__PRT CYREG_PRT0_PRT
1430 #define SCSI_Out__3__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
1431 #define SCSI_Out__3__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
1432 #define SCSI_Out__3__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
1433 #define SCSI_Out__3__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
1434 #define SCSI_Out__3__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
1435 #define SCSI_Out__3__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
1436 #define SCSI_Out__3__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
1437 #define SCSI_Out__3__PS CYREG_PRT0_PS
1438 #define SCSI_Out__3__SHIFT 6
1439 #define SCSI_Out__3__SLW CYREG_PRT0_SLW
1440 #define SCSI_Out__4__AG CYREG_PRT0_AG
1441 #define SCSI_Out__4__AMUX CYREG_PRT0_AMUX
1442 #define SCSI_Out__4__BIE CYREG_PRT0_BIE
1443 #define SCSI_Out__4__BIT_MASK CYREG_PRT0_BIT_MASK
1444 #define SCSI_Out__4__BYP CYREG_PRT0_BYP
1445 #define SCSI_Out__4__CTL CYREG_PRT0_CTL
1446 #define SCSI_Out__4__DM0 CYREG_PRT0_DM0
1447 #define SCSI_Out__4__DM1 CYREG_PRT0_DM1
1448 #define SCSI_Out__4__DM2 CYREG_PRT0_DM2
1449 #define SCSI_Out__4__DR CYREG_PRT0_DR
1450 #define SCSI_Out__4__INP_DIS CYREG_PRT0_INP_DIS
1451 #define SCSI_Out__4__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
1452 #define SCSI_Out__4__LCD_EN CYREG_PRT0_LCD_EN
1453 #define SCSI_Out__4__MASK 0x20u
1454 #define SCSI_Out__4__PC CYREG_PRT0_PC5
1455 #define SCSI_Out__4__PORT 0u
1456 #define SCSI_Out__4__PRT CYREG_PRT0_PRT
1457 #define SCSI_Out__4__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
1458 #define SCSI_Out__4__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
1459 #define SCSI_Out__4__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
1460 #define SCSI_Out__4__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
1461 #define SCSI_Out__4__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
1462 #define SCSI_Out__4__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
1463 #define SCSI_Out__4__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
1464 #define SCSI_Out__4__PS CYREG_PRT0_PS
1465 #define SCSI_Out__4__SHIFT 5
1466 #define SCSI_Out__4__SLW CYREG_PRT0_SLW
1467 #define SCSI_Out__5__AG CYREG_PRT0_AG
1468 #define SCSI_Out__5__AMUX CYREG_PRT0_AMUX
1469 #define SCSI_Out__5__BIE CYREG_PRT0_BIE
1470 #define SCSI_Out__5__BIT_MASK CYREG_PRT0_BIT_MASK
1471 #define SCSI_Out__5__BYP CYREG_PRT0_BYP
1472 #define SCSI_Out__5__CTL CYREG_PRT0_CTL
1473 #define SCSI_Out__5__DM0 CYREG_PRT0_DM0
1474 #define SCSI_Out__5__DM1 CYREG_PRT0_DM1
1475 #define SCSI_Out__5__DM2 CYREG_PRT0_DM2
1476 #define SCSI_Out__5__DR CYREG_PRT0_DR
1477 #define SCSI_Out__5__INP_DIS CYREG_PRT0_INP_DIS
1478 #define SCSI_Out__5__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
1479 #define SCSI_Out__5__LCD_EN CYREG_PRT0_LCD_EN
1480 #define SCSI_Out__5__MASK 0x10u
1481 #define SCSI_Out__5__PC CYREG_PRT0_PC4
1482 #define SCSI_Out__5__PORT 0u
1483 #define SCSI_Out__5__PRT CYREG_PRT0_PRT
1484 #define SCSI_Out__5__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
1485 #define SCSI_Out__5__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
1486 #define SCSI_Out__5__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
1487 #define SCSI_Out__5__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
1488 #define SCSI_Out__5__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
1489 #define SCSI_Out__5__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
1490 #define SCSI_Out__5__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
1491 #define SCSI_Out__5__PS CYREG_PRT0_PS
1492 #define SCSI_Out__5__SHIFT 4
1493 #define SCSI_Out__5__SLW CYREG_PRT0_SLW
1494 #define SCSI_Out__6__AG CYREG_PRT0_AG
1495 #define SCSI_Out__6__AMUX CYREG_PRT0_AMUX
1496 #define SCSI_Out__6__BIE CYREG_PRT0_BIE
1497 #define SCSI_Out__6__BIT_MASK CYREG_PRT0_BIT_MASK
1498 #define SCSI_Out__6__BYP CYREG_PRT0_BYP
1499 #define SCSI_Out__6__CTL CYREG_PRT0_CTL
1500 #define SCSI_Out__6__DM0 CYREG_PRT0_DM0
1501 #define SCSI_Out__6__DM1 CYREG_PRT0_DM1
1502 #define SCSI_Out__6__DM2 CYREG_PRT0_DM2
1503 #define SCSI_Out__6__DR CYREG_PRT0_DR
1504 #define SCSI_Out__6__INP_DIS CYREG_PRT0_INP_DIS
1505 #define SCSI_Out__6__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
1506 #define SCSI_Out__6__LCD_EN CYREG_PRT0_LCD_EN
1507 #define SCSI_Out__6__MASK 0x08u
1508 #define SCSI_Out__6__PC CYREG_PRT0_PC3
1509 #define SCSI_Out__6__PORT 0u
1510 #define SCSI_Out__6__PRT CYREG_PRT0_PRT
1511 #define SCSI_Out__6__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
1512 #define SCSI_Out__6__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
1513 #define SCSI_Out__6__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
1514 #define SCSI_Out__6__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
1515 #define SCSI_Out__6__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
1516 #define SCSI_Out__6__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
1517 #define SCSI_Out__6__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
1518 #define SCSI_Out__6__PS CYREG_PRT0_PS
1519 #define SCSI_Out__6__SHIFT 3
1520 #define SCSI_Out__6__SLW CYREG_PRT0_SLW
1521 #define SCSI_Out__7__AG CYREG_PRT0_AG
1522 #define SCSI_Out__7__AMUX CYREG_PRT0_AMUX
1523 #define SCSI_Out__7__BIE CYREG_PRT0_BIE
1524 #define SCSI_Out__7__BIT_MASK CYREG_PRT0_BIT_MASK
1525 #define SCSI_Out__7__BYP CYREG_PRT0_BYP
1526 #define SCSI_Out__7__CTL CYREG_PRT0_CTL
1527 #define SCSI_Out__7__DM0 CYREG_PRT0_DM0
1528 #define SCSI_Out__7__DM1 CYREG_PRT0_DM1
1529 #define SCSI_Out__7__DM2 CYREG_PRT0_DM2
1530 #define SCSI_Out__7__DR CYREG_PRT0_DR
1531 #define SCSI_Out__7__INP_DIS CYREG_PRT0_INP_DIS
1532 #define SCSI_Out__7__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
1533 #define SCSI_Out__7__LCD_EN CYREG_PRT0_LCD_EN
1534 #define SCSI_Out__7__MASK 0x04u
1535 #define SCSI_Out__7__PC CYREG_PRT0_PC2
1536 #define SCSI_Out__7__PORT 0u
1537 #define SCSI_Out__7__PRT CYREG_PRT0_PRT
1538 #define SCSI_Out__7__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
1539 #define SCSI_Out__7__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
1540 #define SCSI_Out__7__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
1541 #define SCSI_Out__7__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
1542 #define SCSI_Out__7__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
1543 #define SCSI_Out__7__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
1544 #define SCSI_Out__7__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
1545 #define SCSI_Out__7__PS CYREG_PRT0_PS
1546 #define SCSI_Out__7__SHIFT 2
1547 #define SCSI_Out__7__SLW CYREG_PRT0_SLW
1548 #define SCSI_Out__8__AG CYREG_PRT0_AG
1549 #define SCSI_Out__8__AMUX CYREG_PRT0_AMUX
1550 #define SCSI_Out__8__BIE CYREG_PRT0_BIE
1551 #define SCSI_Out__8__BIT_MASK CYREG_PRT0_BIT_MASK
1552 #define SCSI_Out__8__BYP CYREG_PRT0_BYP
1553 #define SCSI_Out__8__CTL CYREG_PRT0_CTL
1554 #define SCSI_Out__8__DM0 CYREG_PRT0_DM0
1555 #define SCSI_Out__8__DM1 CYREG_PRT0_DM1
1556 #define SCSI_Out__8__DM2 CYREG_PRT0_DM2
1557 #define SCSI_Out__8__DR CYREG_PRT0_DR
1558 #define SCSI_Out__8__INP_DIS CYREG_PRT0_INP_DIS
1559 #define SCSI_Out__8__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
1560 #define SCSI_Out__8__LCD_EN CYREG_PRT0_LCD_EN
1561 #define SCSI_Out__8__MASK 0x02u
1562 #define SCSI_Out__8__PC CYREG_PRT0_PC1
1563 #define SCSI_Out__8__PORT 0u
1564 #define SCSI_Out__8__PRT CYREG_PRT0_PRT
1565 #define SCSI_Out__8__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
1566 #define SCSI_Out__8__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
1567 #define SCSI_Out__8__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
1568 #define SCSI_Out__8__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
1569 #define SCSI_Out__8__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
1570 #define SCSI_Out__8__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
1571 #define SCSI_Out__8__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
1572 #define SCSI_Out__8__PS CYREG_PRT0_PS
1573 #define SCSI_Out__8__SHIFT 1
1574 #define SCSI_Out__8__SLW CYREG_PRT0_SLW
1575 #define SCSI_Out__9__AG CYREG_PRT0_AG
1576 #define SCSI_Out__9__AMUX CYREG_PRT0_AMUX
1577 #define SCSI_Out__9__BIE CYREG_PRT0_BIE
1578 #define SCSI_Out__9__BIT_MASK CYREG_PRT0_BIT_MASK
1579 #define SCSI_Out__9__BYP CYREG_PRT0_BYP
1580 #define SCSI_Out__9__CTL CYREG_PRT0_CTL
1581 #define SCSI_Out__9__DM0 CYREG_PRT0_DM0
1582 #define SCSI_Out__9__DM1 CYREG_PRT0_DM1
1583 #define SCSI_Out__9__DM2 CYREG_PRT0_DM2
1584 #define SCSI_Out__9__DR CYREG_PRT0_DR
1585 #define SCSI_Out__9__INP_DIS CYREG_PRT0_INP_DIS
1586 #define SCSI_Out__9__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
1587 #define SCSI_Out__9__LCD_EN CYREG_PRT0_LCD_EN
1588 #define SCSI_Out__9__MASK 0x01u
1589 #define SCSI_Out__9__PC CYREG_PRT0_PC0
1590 #define SCSI_Out__9__PORT 0u
1591 #define SCSI_Out__9__PRT CYREG_PRT0_PRT
1592 #define SCSI_Out__9__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
1593 #define SCSI_Out__9__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
1594 #define SCSI_Out__9__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
1595 #define SCSI_Out__9__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
1596 #define SCSI_Out__9__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
1597 #define SCSI_Out__9__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
1598 #define SCSI_Out__9__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
1599 #define SCSI_Out__9__PS CYREG_PRT0_PS
1600 #define SCSI_Out__9__SHIFT 0
1601 #define SCSI_Out__9__SLW CYREG_PRT0_SLW
1602 #define SCSI_Out__ACK__AG CYREG_PRT0_AG
1603 #define SCSI_Out__ACK__AMUX CYREG_PRT0_AMUX
1604 #define SCSI_Out__ACK__BIE CYREG_PRT0_BIE
1605 #define SCSI_Out__ACK__BIT_MASK CYREG_PRT0_BIT_MASK
1606 #define SCSI_Out__ACK__BYP CYREG_PRT0_BYP
1607 #define SCSI_Out__ACK__CTL CYREG_PRT0_CTL
1608 #define SCSI_Out__ACK__DM0 CYREG_PRT0_DM0
1609 #define SCSI_Out__ACK__DM1 CYREG_PRT0_DM1
1610 #define SCSI_Out__ACK__DM2 CYREG_PRT0_DM2
1611 #define SCSI_Out__ACK__DR CYREG_PRT0_DR
1612 #define SCSI_Out__ACK__INP_DIS CYREG_PRT0_INP_DIS
1613 #define SCSI_Out__ACK__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
1614 #define SCSI_Out__ACK__LCD_EN CYREG_PRT0_LCD_EN
1615 #define SCSI_Out__ACK__MASK 0x40u
1616 #define SCSI_Out__ACK__PC CYREG_PRT0_PC6
1617 #define SCSI_Out__ACK__PORT 0u
1618 #define SCSI_Out__ACK__PRT CYREG_PRT0_PRT
1619 #define SCSI_Out__ACK__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
1620 #define SCSI_Out__ACK__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
1621 #define SCSI_Out__ACK__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
1622 #define SCSI_Out__ACK__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
1623 #define SCSI_Out__ACK__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
1624 #define SCSI_Out__ACK__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
1625 #define SCSI_Out__ACK__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
1626 #define SCSI_Out__ACK__PS CYREG_PRT0_PS
1627 #define SCSI_Out__ACK__SHIFT 6
1628 #define SCSI_Out__ACK__SLW CYREG_PRT0_SLW
1629 #define SCSI_Out__ATN__AG CYREG_PRT4_AG
1630 #define SCSI_Out__ATN__AMUX CYREG_PRT4_AMUX
1631 #define SCSI_Out__ATN__BIE CYREG_PRT4_BIE
1632 #define SCSI_Out__ATN__BIT_MASK CYREG_PRT4_BIT_MASK
1633 #define SCSI_Out__ATN__BYP CYREG_PRT4_BYP
1634 #define SCSI_Out__ATN__CTL CYREG_PRT4_CTL
1635 #define SCSI_Out__ATN__DM0 CYREG_PRT4_DM0
1636 #define SCSI_Out__ATN__DM1 CYREG_PRT4_DM1
1637 #define SCSI_Out__ATN__DM2 CYREG_PRT4_DM2
1638 #define SCSI_Out__ATN__DR CYREG_PRT4_DR
1639 #define SCSI_Out__ATN__INP_DIS CYREG_PRT4_INP_DIS
1640 #define SCSI_Out__ATN__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG
1641 #define SCSI_Out__ATN__LCD_EN CYREG_PRT4_LCD_EN
1642 #define SCSI_Out__ATN__MASK 0x04u
1643 #define SCSI_Out__ATN__PC CYREG_PRT4_PC2
1644 #define SCSI_Out__ATN__PORT 4u
1645 #define SCSI_Out__ATN__PRT CYREG_PRT4_PRT
1646 #define SCSI_Out__ATN__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL
1647 #define SCSI_Out__ATN__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN
1648 #define SCSI_Out__ATN__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0
1649 #define SCSI_Out__ATN__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1
1650 #define SCSI_Out__ATN__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0
1651 #define SCSI_Out__ATN__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1
1652 #define SCSI_Out__ATN__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT
1653 #define SCSI_Out__ATN__PS CYREG_PRT4_PS
1654 #define SCSI_Out__ATN__SHIFT 2
1655 #define SCSI_Out__ATN__SLW CYREG_PRT4_SLW
1656 #define SCSI_Out__BSY__AG CYREG_PRT0_AG
1657 #define SCSI_Out__BSY__AMUX CYREG_PRT0_AMUX
1658 #define SCSI_Out__BSY__BIE CYREG_PRT0_BIE
1659 #define SCSI_Out__BSY__BIT_MASK CYREG_PRT0_BIT_MASK
1660 #define SCSI_Out__BSY__BYP CYREG_PRT0_BYP
1661 #define SCSI_Out__BSY__CTL CYREG_PRT0_CTL
1662 #define SCSI_Out__BSY__DM0 CYREG_PRT0_DM0
1663 #define SCSI_Out__BSY__DM1 CYREG_PRT0_DM1
1664 #define SCSI_Out__BSY__DM2 CYREG_PRT0_DM2
1665 #define SCSI_Out__BSY__DR CYREG_PRT0_DR
1666 #define SCSI_Out__BSY__INP_DIS CYREG_PRT0_INP_DIS
1667 #define SCSI_Out__BSY__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
1668 #define SCSI_Out__BSY__LCD_EN CYREG_PRT0_LCD_EN
1669 #define SCSI_Out__BSY__MASK 0x80u
1670 #define SCSI_Out__BSY__PC CYREG_PRT0_PC7
1671 #define SCSI_Out__BSY__PORT 0u
1672 #define SCSI_Out__BSY__PRT CYREG_PRT0_PRT
1673 #define SCSI_Out__BSY__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
1674 #define SCSI_Out__BSY__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
1675 #define SCSI_Out__BSY__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
1676 #define SCSI_Out__BSY__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
1677 #define SCSI_Out__BSY__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
1678 #define SCSI_Out__BSY__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
1679 #define SCSI_Out__BSY__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
1680 #define SCSI_Out__BSY__PS CYREG_PRT0_PS
1681 #define SCSI_Out__BSY__SHIFT 7
1682 #define SCSI_Out__BSY__SLW CYREG_PRT0_SLW
1683 #define SCSI_Out__CD_raw__AG CYREG_PRT0_AG
1684 #define SCSI_Out__CD_raw__AMUX CYREG_PRT0_AMUX
1685 #define SCSI_Out__CD_raw__BIE CYREG_PRT0_BIE
1686 #define SCSI_Out__CD_raw__BIT_MASK CYREG_PRT0_BIT_MASK
1687 #define SCSI_Out__CD_raw__BYP CYREG_PRT0_BYP
1688 #define SCSI_Out__CD_raw__CTL CYREG_PRT0_CTL
1689 #define SCSI_Out__CD_raw__DM0 CYREG_PRT0_DM0
1690 #define SCSI_Out__CD_raw__DM1 CYREG_PRT0_DM1
1691 #define SCSI_Out__CD_raw__DM2 CYREG_PRT0_DM2
1692 #define SCSI_Out__CD_raw__DR CYREG_PRT0_DR
1693 #define SCSI_Out__CD_raw__INP_DIS CYREG_PRT0_INP_DIS
1694 #define SCSI_Out__CD_raw__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
1695 #define SCSI_Out__CD_raw__LCD_EN CYREG_PRT0_LCD_EN
1696 #define SCSI_Out__CD_raw__MASK 0x04u
1697 #define SCSI_Out__CD_raw__PC CYREG_PRT0_PC2
1698 #define SCSI_Out__CD_raw__PORT 0u
1699 #define SCSI_Out__CD_raw__PRT CYREG_PRT0_PRT
1700 #define SCSI_Out__CD_raw__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
1701 #define SCSI_Out__CD_raw__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
1702 #define SCSI_Out__CD_raw__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
1703 #define SCSI_Out__CD_raw__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
1704 #define SCSI_Out__CD_raw__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
1705 #define SCSI_Out__CD_raw__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
1706 #define SCSI_Out__CD_raw__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
1707 #define SCSI_Out__CD_raw__PS CYREG_PRT0_PS
1708 #define SCSI_Out__CD_raw__SHIFT 2
1709 #define SCSI_Out__CD_raw__SLW CYREG_PRT0_SLW
1710 #define SCSI_Out__DBP_raw__AG CYREG_PRT4_AG
1711 #define SCSI_Out__DBP_raw__AMUX CYREG_PRT4_AMUX
1712 #define SCSI_Out__DBP_raw__BIE CYREG_PRT4_BIE
1713 #define SCSI_Out__DBP_raw__BIT_MASK CYREG_PRT4_BIT_MASK
1714 #define SCSI_Out__DBP_raw__BYP CYREG_PRT4_BYP
1715 #define SCSI_Out__DBP_raw__CTL CYREG_PRT4_CTL
1716 #define SCSI_Out__DBP_raw__DM0 CYREG_PRT4_DM0
1717 #define SCSI_Out__DBP_raw__DM1 CYREG_PRT4_DM1
1718 #define SCSI_Out__DBP_raw__DM2 CYREG_PRT4_DM2
1719 #define SCSI_Out__DBP_raw__DR CYREG_PRT4_DR
1720 #define SCSI_Out__DBP_raw__INP_DIS CYREG_PRT4_INP_DIS
1721 #define SCSI_Out__DBP_raw__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG
1722 #define SCSI_Out__DBP_raw__LCD_EN CYREG_PRT4_LCD_EN
1723 #define SCSI_Out__DBP_raw__MASK 0x08u
1724 #define SCSI_Out__DBP_raw__PC CYREG_PRT4_PC3
1725 #define SCSI_Out__DBP_raw__PORT 4u
1726 #define SCSI_Out__DBP_raw__PRT CYREG_PRT4_PRT
1727 #define SCSI_Out__DBP_raw__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL
1728 #define SCSI_Out__DBP_raw__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN
1729 #define SCSI_Out__DBP_raw__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0
1730 #define SCSI_Out__DBP_raw__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1
1731 #define SCSI_Out__DBP_raw__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0
1732 #define SCSI_Out__DBP_raw__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1
1733 #define SCSI_Out__DBP_raw__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT
1734 #define SCSI_Out__DBP_raw__PS CYREG_PRT4_PS
1735 #define SCSI_Out__DBP_raw__SHIFT 3
1736 #define SCSI_Out__DBP_raw__SLW CYREG_PRT4_SLW
1737 #define SCSI_Out__IO_raw__AG CYREG_PRT0_AG
1738 #define SCSI_Out__IO_raw__AMUX CYREG_PRT0_AMUX
1739 #define SCSI_Out__IO_raw__BIE CYREG_PRT0_BIE
1740 #define SCSI_Out__IO_raw__BIT_MASK CYREG_PRT0_BIT_MASK
1741 #define SCSI_Out__IO_raw__BYP CYREG_PRT0_BYP
1742 #define SCSI_Out__IO_raw__CTL CYREG_PRT0_CTL
1743 #define SCSI_Out__IO_raw__DM0 CYREG_PRT0_DM0
1744 #define SCSI_Out__IO_raw__DM1 CYREG_PRT0_DM1
1745 #define SCSI_Out__IO_raw__DM2 CYREG_PRT0_DM2
1746 #define SCSI_Out__IO_raw__DR CYREG_PRT0_DR
1747 #define SCSI_Out__IO_raw__INP_DIS CYREG_PRT0_INP_DIS
1748 #define SCSI_Out__IO_raw__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
1749 #define SCSI_Out__IO_raw__LCD_EN CYREG_PRT0_LCD_EN
1750 #define SCSI_Out__IO_raw__MASK 0x01u
1751 #define SCSI_Out__IO_raw__PC CYREG_PRT0_PC0
1752 #define SCSI_Out__IO_raw__PORT 0u
1753 #define SCSI_Out__IO_raw__PRT CYREG_PRT0_PRT
1754 #define SCSI_Out__IO_raw__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
1755 #define SCSI_Out__IO_raw__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
1756 #define SCSI_Out__IO_raw__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
1757 #define SCSI_Out__IO_raw__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
1758 #define SCSI_Out__IO_raw__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
1759 #define SCSI_Out__IO_raw__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
1760 #define SCSI_Out__IO_raw__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
1761 #define SCSI_Out__IO_raw__PS CYREG_PRT0_PS
1762 #define SCSI_Out__IO_raw__SHIFT 0
1763 #define SCSI_Out__IO_raw__SLW CYREG_PRT0_SLW
1764 #define SCSI_Out__MSG_raw__AG CYREG_PRT0_AG
1765 #define SCSI_Out__MSG_raw__AMUX CYREG_PRT0_AMUX
1766 #define SCSI_Out__MSG_raw__BIE CYREG_PRT0_BIE
1767 #define SCSI_Out__MSG_raw__BIT_MASK CYREG_PRT0_BIT_MASK
1768 #define SCSI_Out__MSG_raw__BYP CYREG_PRT0_BYP
1769 #define SCSI_Out__MSG_raw__CTL CYREG_PRT0_CTL
1770 #define SCSI_Out__MSG_raw__DM0 CYREG_PRT0_DM0
1771 #define SCSI_Out__MSG_raw__DM1 CYREG_PRT0_DM1
1772 #define SCSI_Out__MSG_raw__DM2 CYREG_PRT0_DM2
1773 #define SCSI_Out__MSG_raw__DR CYREG_PRT0_DR
1774 #define SCSI_Out__MSG_raw__INP_DIS CYREG_PRT0_INP_DIS
1775 #define SCSI_Out__MSG_raw__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
1776 #define SCSI_Out__MSG_raw__LCD_EN CYREG_PRT0_LCD_EN
1777 #define SCSI_Out__MSG_raw__MASK 0x10u
1778 #define SCSI_Out__MSG_raw__PC CYREG_PRT0_PC4
1779 #define SCSI_Out__MSG_raw__PORT 0u
1780 #define SCSI_Out__MSG_raw__PRT CYREG_PRT0_PRT
1781 #define SCSI_Out__MSG_raw__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
1782 #define SCSI_Out__MSG_raw__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
1783 #define SCSI_Out__MSG_raw__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
1784 #define SCSI_Out__MSG_raw__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
1785 #define SCSI_Out__MSG_raw__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
1786 #define SCSI_Out__MSG_raw__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
1787 #define SCSI_Out__MSG_raw__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
1788 #define SCSI_Out__MSG_raw__PS CYREG_PRT0_PS
1789 #define SCSI_Out__MSG_raw__SHIFT 4
1790 #define SCSI_Out__MSG_raw__SLW CYREG_PRT0_SLW
1791 #define SCSI_Out__REQ__AG CYREG_PRT0_AG
1792 #define SCSI_Out__REQ__AMUX CYREG_PRT0_AMUX
1793 #define SCSI_Out__REQ__BIE CYREG_PRT0_BIE
1794 #define SCSI_Out__REQ__BIT_MASK CYREG_PRT0_BIT_MASK
1795 #define SCSI_Out__REQ__BYP CYREG_PRT0_BYP
1796 #define SCSI_Out__REQ__CTL CYREG_PRT0_CTL
1797 #define SCSI_Out__REQ__DM0 CYREG_PRT0_DM0
1798 #define SCSI_Out__REQ__DM1 CYREG_PRT0_DM1
1799 #define SCSI_Out__REQ__DM2 CYREG_PRT0_DM2
1800 #define SCSI_Out__REQ__DR CYREG_PRT0_DR
1801 #define SCSI_Out__REQ__INP_DIS CYREG_PRT0_INP_DIS
1802 #define SCSI_Out__REQ__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
1803 #define SCSI_Out__REQ__LCD_EN CYREG_PRT0_LCD_EN
1804 #define SCSI_Out__REQ__MASK 0x02u
1805 #define SCSI_Out__REQ__PC CYREG_PRT0_PC1
1806 #define SCSI_Out__REQ__PORT 0u
1807 #define SCSI_Out__REQ__PRT CYREG_PRT0_PRT
1808 #define SCSI_Out__REQ__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
1809 #define SCSI_Out__REQ__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
1810 #define SCSI_Out__REQ__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
1811 #define SCSI_Out__REQ__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
1812 #define SCSI_Out__REQ__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
1813 #define SCSI_Out__REQ__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
1814 #define SCSI_Out__REQ__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
1815 #define SCSI_Out__REQ__PS CYREG_PRT0_PS
1816 #define SCSI_Out__REQ__SHIFT 1
1817 #define SCSI_Out__REQ__SLW CYREG_PRT0_SLW
1818 #define SCSI_Out__RST__AG CYREG_PRT0_AG
1819 #define SCSI_Out__RST__AMUX CYREG_PRT0_AMUX
1820 #define SCSI_Out__RST__BIE CYREG_PRT0_BIE
1821 #define SCSI_Out__RST__BIT_MASK CYREG_PRT0_BIT_MASK
1822 #define SCSI_Out__RST__BYP CYREG_PRT0_BYP
1823 #define SCSI_Out__RST__CTL CYREG_PRT0_CTL
1824 #define SCSI_Out__RST__DM0 CYREG_PRT0_DM0
1825 #define SCSI_Out__RST__DM1 CYREG_PRT0_DM1
1826 #define SCSI_Out__RST__DM2 CYREG_PRT0_DM2
1827 #define SCSI_Out__RST__DR CYREG_PRT0_DR
1828 #define SCSI_Out__RST__INP_DIS CYREG_PRT0_INP_DIS
1829 #define SCSI_Out__RST__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
1830 #define SCSI_Out__RST__LCD_EN CYREG_PRT0_LCD_EN
1831 #define SCSI_Out__RST__MASK 0x20u
1832 #define SCSI_Out__RST__PC CYREG_PRT0_PC5
1833 #define SCSI_Out__RST__PORT 0u
1834 #define SCSI_Out__RST__PRT CYREG_PRT0_PRT
1835 #define SCSI_Out__RST__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
1836 #define SCSI_Out__RST__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
1837 #define SCSI_Out__RST__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
1838 #define SCSI_Out__RST__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
1839 #define SCSI_Out__RST__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
1840 #define SCSI_Out__RST__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
1841 #define SCSI_Out__RST__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
1842 #define SCSI_Out__RST__PS CYREG_PRT0_PS
1843 #define SCSI_Out__RST__SHIFT 5
1844 #define SCSI_Out__RST__SLW CYREG_PRT0_SLW
1845 #define SCSI_Out__SEL__AG CYREG_PRT0_AG
1846 #define SCSI_Out__SEL__AMUX CYREG_PRT0_AMUX
1847 #define SCSI_Out__SEL__BIE CYREG_PRT0_BIE
1848 #define SCSI_Out__SEL__BIT_MASK CYREG_PRT0_BIT_MASK
1849 #define SCSI_Out__SEL__BYP CYREG_PRT0_BYP
1850 #define SCSI_Out__SEL__CTL CYREG_PRT0_CTL
1851 #define SCSI_Out__SEL__DM0 CYREG_PRT0_DM0
1852 #define SCSI_Out__SEL__DM1 CYREG_PRT0_DM1
1853 #define SCSI_Out__SEL__DM2 CYREG_PRT0_DM2
1854 #define SCSI_Out__SEL__DR CYREG_PRT0_DR
1855 #define SCSI_Out__SEL__INP_DIS CYREG_PRT0_INP_DIS
1856 #define SCSI_Out__SEL__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG
1857 #define SCSI_Out__SEL__LCD_EN CYREG_PRT0_LCD_EN
1858 #define SCSI_Out__SEL__MASK 0x08u
1859 #define SCSI_Out__SEL__PC CYREG_PRT0_PC3
1860 #define SCSI_Out__SEL__PORT 0u
1861 #define SCSI_Out__SEL__PRT CYREG_PRT0_PRT
1862 #define SCSI_Out__SEL__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL
1863 #define SCSI_Out__SEL__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN
1864 #define SCSI_Out__SEL__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0
1865 #define SCSI_Out__SEL__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1
1866 #define SCSI_Out__SEL__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0
1867 #define SCSI_Out__SEL__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1
1868 #define SCSI_Out__SEL__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT
1869 #define SCSI_Out__SEL__PS CYREG_PRT0_PS
1870 #define SCSI_Out__SEL__SHIFT 3
1871 #define SCSI_Out__SEL__SLW CYREG_PRT0_SLW
1872
1873 /* SCSI_Out_Bits */
1874 #define SCSI_Out_Bits_Sync_ctrl_reg__0__MASK 0x01u
1875 #define SCSI_Out_Bits_Sync_ctrl_reg__0__POS 0
1876 #define SCSI_Out_Bits_Sync_ctrl_reg__1__MASK 0x02u
1877 #define SCSI_Out_Bits_Sync_ctrl_reg__1__POS 1
1878 #define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG CYREG_B0_UDB11_12_ACTL
1879 #define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG CYREG_B0_UDB11_12_CTL
1880 #define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG CYREG_B0_UDB11_12_CTL
1881 #define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG CYREG_B0_UDB11_12_CTL
1882 #define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG CYREG_B0_UDB11_12_CTL
1883 #define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_MASK_REG CYREG_B0_UDB11_12_MSK
1884 #define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG CYREG_B0_UDB11_12_MSK
1885 #define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG CYREG_B0_UDB11_12_MSK
1886 #define SCSI_Out_Bits_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG CYREG_B0_UDB11_12_MSK
1887 #define SCSI_Out_Bits_Sync_ctrl_reg__2__MASK 0x04u
1888 #define SCSI_Out_Bits_Sync_ctrl_reg__2__POS 2
1889 #define SCSI_Out_Bits_Sync_ctrl_reg__3__MASK 0x08u
1890 #define SCSI_Out_Bits_Sync_ctrl_reg__3__POS 3
1891 #define SCSI_Out_Bits_Sync_ctrl_reg__4__MASK 0x10u
1892 #define SCSI_Out_Bits_Sync_ctrl_reg__4__POS 4
1893 #define SCSI_Out_Bits_Sync_ctrl_reg__5__MASK 0x20u
1894 #define SCSI_Out_Bits_Sync_ctrl_reg__5__POS 5
1895 #define SCSI_Out_Bits_Sync_ctrl_reg__6__MASK 0x40u
1896 #define SCSI_Out_Bits_Sync_ctrl_reg__6__POS 6
1897 #define SCSI_Out_Bits_Sync_ctrl_reg__7__MASK 0x80u
1898 #define SCSI_Out_Bits_Sync_ctrl_reg__7__POS 7
1899 #define SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_AUX_CTL_REG CYREG_B0_UDB11_ACTL
1900 #define SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_REG CYREG_B0_UDB11_CTL
1901 #define SCSI_Out_Bits_Sync_ctrl_reg__CONTROL_ST_REG CYREG_B0_UDB11_ST_CTL
1902 #define SCSI_Out_Bits_Sync_ctrl_reg__COUNT_REG CYREG_B0_UDB11_CTL
1903 #define SCSI_Out_Bits_Sync_ctrl_reg__COUNT_ST_REG CYREG_B0_UDB11_ST_CTL
1904 #define SCSI_Out_Bits_Sync_ctrl_reg__MASK 0xFFu
1905 #define SCSI_Out_Bits_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG CYREG_B0_UDB11_MSK_ACTL
1906 #define SCSI_Out_Bits_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG CYREG_B0_UDB11_MSK_ACTL
1907 #define SCSI_Out_Bits_Sync_ctrl_reg__PERIOD_REG CYREG_B0_UDB11_MSK
1908
1909 /* SCSI_Out_Ctl */
1910 #define SCSI_Out_Ctl_Sync_ctrl_reg__0__MASK 0x01u
1911 #define SCSI_Out_Ctl_Sync_ctrl_reg__0__POS 0
1912 #define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG CYREG_B0_UDB08_09_ACTL
1913 #define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG CYREG_B0_UDB08_09_CTL
1914 #define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG CYREG_B0_UDB08_09_CTL
1915 #define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG CYREG_B0_UDB08_09_CTL
1916 #define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG CYREG_B0_UDB08_09_CTL
1917 #define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_MASK_REG CYREG_B0_UDB08_09_MSK
1918 #define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG CYREG_B0_UDB08_09_MSK
1919 #define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG CYREG_B0_UDB08_09_MSK
1920 #define SCSI_Out_Ctl_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG CYREG_B0_UDB08_09_MSK
1921 #define SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_AUX_CTL_REG CYREG_B0_UDB08_ACTL
1922 #define SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_REG CYREG_B0_UDB08_CTL
1923 #define SCSI_Out_Ctl_Sync_ctrl_reg__CONTROL_ST_REG CYREG_B0_UDB08_ST_CTL
1924 #define SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_REG CYREG_B0_UDB08_CTL
1925 #define SCSI_Out_Ctl_Sync_ctrl_reg__COUNT_ST_REG CYREG_B0_UDB08_ST_CTL
1926 #define SCSI_Out_Ctl_Sync_ctrl_reg__MASK 0x01u
1927 #define SCSI_Out_Ctl_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG CYREG_B0_UDB08_MSK_ACTL
1928 #define SCSI_Out_Ctl_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG CYREG_B0_UDB08_MSK_ACTL
1929 #define SCSI_Out_Ctl_Sync_ctrl_reg__PERIOD_REG CYREG_B0_UDB08_MSK
1930
1931 /* SCSI_Out_DBx */
1932 #define SCSI_Out_DBx__0__AG CYREG_PRT6_AG
1933 #define SCSI_Out_DBx__0__AMUX CYREG_PRT6_AMUX
1934 #define SCSI_Out_DBx__0__BIE CYREG_PRT6_BIE
1935 #define SCSI_Out_DBx__0__BIT_MASK CYREG_PRT6_BIT_MASK
1936 #define SCSI_Out_DBx__0__BYP CYREG_PRT6_BYP
1937 #define SCSI_Out_DBx__0__CTL CYREG_PRT6_CTL
1938 #define SCSI_Out_DBx__0__DM0 CYREG_PRT6_DM0
1939 #define SCSI_Out_DBx__0__DM1 CYREG_PRT6_DM1
1940 #define SCSI_Out_DBx__0__DM2 CYREG_PRT6_DM2
1941 #define SCSI_Out_DBx__0__DR CYREG_PRT6_DR
1942 #define SCSI_Out_DBx__0__INP_DIS CYREG_PRT6_INP_DIS
1943 #define SCSI_Out_DBx__0__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
1944 #define SCSI_Out_DBx__0__LCD_EN CYREG_PRT6_LCD_EN
1945 #define SCSI_Out_DBx__0__MASK 0x08u
1946 #define SCSI_Out_DBx__0__PC CYREG_PRT6_PC3
1947 #define SCSI_Out_DBx__0__PORT 6u
1948 #define SCSI_Out_DBx__0__PRT CYREG_PRT6_PRT
1949 #define SCSI_Out_DBx__0__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
1950 #define SCSI_Out_DBx__0__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
1951 #define SCSI_Out_DBx__0__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
1952 #define SCSI_Out_DBx__0__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
1953 #define SCSI_Out_DBx__0__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
1954 #define SCSI_Out_DBx__0__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
1955 #define SCSI_Out_DBx__0__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
1956 #define SCSI_Out_DBx__0__PS CYREG_PRT6_PS
1957 #define SCSI_Out_DBx__0__SHIFT 3
1958 #define SCSI_Out_DBx__0__SLW CYREG_PRT6_SLW
1959 #define SCSI_Out_DBx__1__AG CYREG_PRT6_AG
1960 #define SCSI_Out_DBx__1__AMUX CYREG_PRT6_AMUX
1961 #define SCSI_Out_DBx__1__BIE CYREG_PRT6_BIE
1962 #define SCSI_Out_DBx__1__BIT_MASK CYREG_PRT6_BIT_MASK
1963 #define SCSI_Out_DBx__1__BYP CYREG_PRT6_BYP
1964 #define SCSI_Out_DBx__1__CTL CYREG_PRT6_CTL
1965 #define SCSI_Out_DBx__1__DM0 CYREG_PRT6_DM0
1966 #define SCSI_Out_DBx__1__DM1 CYREG_PRT6_DM1
1967 #define SCSI_Out_DBx__1__DM2 CYREG_PRT6_DM2
1968 #define SCSI_Out_DBx__1__DR CYREG_PRT6_DR
1969 #define SCSI_Out_DBx__1__INP_DIS CYREG_PRT6_INP_DIS
1970 #define SCSI_Out_DBx__1__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
1971 #define SCSI_Out_DBx__1__LCD_EN CYREG_PRT6_LCD_EN
1972 #define SCSI_Out_DBx__1__MASK 0x04u
1973 #define SCSI_Out_DBx__1__PC CYREG_PRT6_PC2
1974 #define SCSI_Out_DBx__1__PORT 6u
1975 #define SCSI_Out_DBx__1__PRT CYREG_PRT6_PRT
1976 #define SCSI_Out_DBx__1__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
1977 #define SCSI_Out_DBx__1__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
1978 #define SCSI_Out_DBx__1__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
1979 #define SCSI_Out_DBx__1__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
1980 #define SCSI_Out_DBx__1__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
1981 #define SCSI_Out_DBx__1__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
1982 #define SCSI_Out_DBx__1__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
1983 #define SCSI_Out_DBx__1__PS CYREG_PRT6_PS
1984 #define SCSI_Out_DBx__1__SHIFT 2
1985 #define SCSI_Out_DBx__1__SLW CYREG_PRT6_SLW
1986 #define SCSI_Out_DBx__2__AG CYREG_PRT6_AG
1987 #define SCSI_Out_DBx__2__AMUX CYREG_PRT6_AMUX
1988 #define SCSI_Out_DBx__2__BIE CYREG_PRT6_BIE
1989 #define SCSI_Out_DBx__2__BIT_MASK CYREG_PRT6_BIT_MASK
1990 #define SCSI_Out_DBx__2__BYP CYREG_PRT6_BYP
1991 #define SCSI_Out_DBx__2__CTL CYREG_PRT6_CTL
1992 #define SCSI_Out_DBx__2__DM0 CYREG_PRT6_DM0
1993 #define SCSI_Out_DBx__2__DM1 CYREG_PRT6_DM1
1994 #define SCSI_Out_DBx__2__DM2 CYREG_PRT6_DM2
1995 #define SCSI_Out_DBx__2__DR CYREG_PRT6_DR
1996 #define SCSI_Out_DBx__2__INP_DIS CYREG_PRT6_INP_DIS
1997 #define SCSI_Out_DBx__2__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
1998 #define SCSI_Out_DBx__2__LCD_EN CYREG_PRT6_LCD_EN
1999 #define SCSI_Out_DBx__2__MASK 0x02u
2000 #define SCSI_Out_DBx__2__PC CYREG_PRT6_PC1
2001 #define SCSI_Out_DBx__2__PORT 6u
2002 #define SCSI_Out_DBx__2__PRT CYREG_PRT6_PRT
2003 #define SCSI_Out_DBx__2__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
2004 #define SCSI_Out_DBx__2__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
2005 #define SCSI_Out_DBx__2__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
2006 #define SCSI_Out_DBx__2__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
2007 #define SCSI_Out_DBx__2__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
2008 #define SCSI_Out_DBx__2__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
2009 #define SCSI_Out_DBx__2__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
2010 #define SCSI_Out_DBx__2__PS CYREG_PRT6_PS
2011 #define SCSI_Out_DBx__2__SHIFT 1
2012 #define SCSI_Out_DBx__2__SLW CYREG_PRT6_SLW
2013 #define SCSI_Out_DBx__3__AG CYREG_PRT6_AG
2014 #define SCSI_Out_DBx__3__AMUX CYREG_PRT6_AMUX
2015 #define SCSI_Out_DBx__3__BIE CYREG_PRT6_BIE
2016 #define SCSI_Out_DBx__3__BIT_MASK CYREG_PRT6_BIT_MASK
2017 #define SCSI_Out_DBx__3__BYP CYREG_PRT6_BYP
2018 #define SCSI_Out_DBx__3__CTL CYREG_PRT6_CTL
2019 #define SCSI_Out_DBx__3__DM0 CYREG_PRT6_DM0
2020 #define SCSI_Out_DBx__3__DM1 CYREG_PRT6_DM1
2021 #define SCSI_Out_DBx__3__DM2 CYREG_PRT6_DM2
2022 #define SCSI_Out_DBx__3__DR CYREG_PRT6_DR
2023 #define SCSI_Out_DBx__3__INP_DIS CYREG_PRT6_INP_DIS
2024 #define SCSI_Out_DBx__3__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
2025 #define SCSI_Out_DBx__3__LCD_EN CYREG_PRT6_LCD_EN
2026 #define SCSI_Out_DBx__3__MASK 0x01u
2027 #define SCSI_Out_DBx__3__PC CYREG_PRT6_PC0
2028 #define SCSI_Out_DBx__3__PORT 6u
2029 #define SCSI_Out_DBx__3__PRT CYREG_PRT6_PRT
2030 #define SCSI_Out_DBx__3__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
2031 #define SCSI_Out_DBx__3__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
2032 #define SCSI_Out_DBx__3__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
2033 #define SCSI_Out_DBx__3__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
2034 #define SCSI_Out_DBx__3__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
2035 #define SCSI_Out_DBx__3__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
2036 #define SCSI_Out_DBx__3__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
2037 #define SCSI_Out_DBx__3__PS CYREG_PRT6_PS
2038 #define SCSI_Out_DBx__3__SHIFT 0
2039 #define SCSI_Out_DBx__3__SLW CYREG_PRT6_SLW
2040 #define SCSI_Out_DBx__4__AG CYREG_PRT4_AG
2041 #define SCSI_Out_DBx__4__AMUX CYREG_PRT4_AMUX
2042 #define SCSI_Out_DBx__4__BIE CYREG_PRT4_BIE
2043 #define SCSI_Out_DBx__4__BIT_MASK CYREG_PRT4_BIT_MASK
2044 #define SCSI_Out_DBx__4__BYP CYREG_PRT4_BYP
2045 #define SCSI_Out_DBx__4__CTL CYREG_PRT4_CTL
2046 #define SCSI_Out_DBx__4__DM0 CYREG_PRT4_DM0
2047 #define SCSI_Out_DBx__4__DM1 CYREG_PRT4_DM1
2048 #define SCSI_Out_DBx__4__DM2 CYREG_PRT4_DM2
2049 #define SCSI_Out_DBx__4__DR CYREG_PRT4_DR
2050 #define SCSI_Out_DBx__4__INP_DIS CYREG_PRT4_INP_DIS
2051 #define SCSI_Out_DBx__4__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG
2052 #define SCSI_Out_DBx__4__LCD_EN CYREG_PRT4_LCD_EN
2053 #define SCSI_Out_DBx__4__MASK 0x80u
2054 #define SCSI_Out_DBx__4__PC CYREG_PRT4_PC7
2055 #define SCSI_Out_DBx__4__PORT 4u
2056 #define SCSI_Out_DBx__4__PRT CYREG_PRT4_PRT
2057 #define SCSI_Out_DBx__4__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL
2058 #define SCSI_Out_DBx__4__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN
2059 #define SCSI_Out_DBx__4__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0
2060 #define SCSI_Out_DBx__4__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1
2061 #define SCSI_Out_DBx__4__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0
2062 #define SCSI_Out_DBx__4__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1
2063 #define SCSI_Out_DBx__4__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT
2064 #define SCSI_Out_DBx__4__PS CYREG_PRT4_PS
2065 #define SCSI_Out_DBx__4__SHIFT 7
2066 #define SCSI_Out_DBx__4__SLW CYREG_PRT4_SLW
2067 #define SCSI_Out_DBx__5__AG CYREG_PRT4_AG
2068 #define SCSI_Out_DBx__5__AMUX CYREG_PRT4_AMUX
2069 #define SCSI_Out_DBx__5__BIE CYREG_PRT4_BIE
2070 #define SCSI_Out_DBx__5__BIT_MASK CYREG_PRT4_BIT_MASK
2071 #define SCSI_Out_DBx__5__BYP CYREG_PRT4_BYP
2072 #define SCSI_Out_DBx__5__CTL CYREG_PRT4_CTL
2073 #define SCSI_Out_DBx__5__DM0 CYREG_PRT4_DM0
2074 #define SCSI_Out_DBx__5__DM1 CYREG_PRT4_DM1
2075 #define SCSI_Out_DBx__5__DM2 CYREG_PRT4_DM2
2076 #define SCSI_Out_DBx__5__DR CYREG_PRT4_DR
2077 #define SCSI_Out_DBx__5__INP_DIS CYREG_PRT4_INP_DIS
2078 #define SCSI_Out_DBx__5__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG
2079 #define SCSI_Out_DBx__5__LCD_EN CYREG_PRT4_LCD_EN
2080 #define SCSI_Out_DBx__5__MASK 0x40u
2081 #define SCSI_Out_DBx__5__PC CYREG_PRT4_PC6
2082 #define SCSI_Out_DBx__5__PORT 4u
2083 #define SCSI_Out_DBx__5__PRT CYREG_PRT4_PRT
2084 #define SCSI_Out_DBx__5__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL
2085 #define SCSI_Out_DBx__5__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN
2086 #define SCSI_Out_DBx__5__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0
2087 #define SCSI_Out_DBx__5__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1
2088 #define SCSI_Out_DBx__5__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0
2089 #define SCSI_Out_DBx__5__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1
2090 #define SCSI_Out_DBx__5__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT
2091 #define SCSI_Out_DBx__5__PS CYREG_PRT4_PS
2092 #define SCSI_Out_DBx__5__SHIFT 6
2093 #define SCSI_Out_DBx__5__SLW CYREG_PRT4_SLW
2094 #define SCSI_Out_DBx__6__AG CYREG_PRT4_AG
2095 #define SCSI_Out_DBx__6__AMUX CYREG_PRT4_AMUX
2096 #define SCSI_Out_DBx__6__BIE CYREG_PRT4_BIE
2097 #define SCSI_Out_DBx__6__BIT_MASK CYREG_PRT4_BIT_MASK
2098 #define SCSI_Out_DBx__6__BYP CYREG_PRT4_BYP
2099 #define SCSI_Out_DBx__6__CTL CYREG_PRT4_CTL
2100 #define SCSI_Out_DBx__6__DM0 CYREG_PRT4_DM0
2101 #define SCSI_Out_DBx__6__DM1 CYREG_PRT4_DM1
2102 #define SCSI_Out_DBx__6__DM2 CYREG_PRT4_DM2
2103 #define SCSI_Out_DBx__6__DR CYREG_PRT4_DR
2104 #define SCSI_Out_DBx__6__INP_DIS CYREG_PRT4_INP_DIS
2105 #define SCSI_Out_DBx__6__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG
2106 #define SCSI_Out_DBx__6__LCD_EN CYREG_PRT4_LCD_EN
2107 #define SCSI_Out_DBx__6__MASK 0x20u
2108 #define SCSI_Out_DBx__6__PC CYREG_PRT4_PC5
2109 #define SCSI_Out_DBx__6__PORT 4u
2110 #define SCSI_Out_DBx__6__PRT CYREG_PRT4_PRT
2111 #define SCSI_Out_DBx__6__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL
2112 #define SCSI_Out_DBx__6__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN
2113 #define SCSI_Out_DBx__6__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0
2114 #define SCSI_Out_DBx__6__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1
2115 #define SCSI_Out_DBx__6__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0
2116 #define SCSI_Out_DBx__6__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1
2117 #define SCSI_Out_DBx__6__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT
2118 #define SCSI_Out_DBx__6__PS CYREG_PRT4_PS
2119 #define SCSI_Out_DBx__6__SHIFT 5
2120 #define SCSI_Out_DBx__6__SLW CYREG_PRT4_SLW
2121 #define SCSI_Out_DBx__7__AG CYREG_PRT4_AG
2122 #define SCSI_Out_DBx__7__AMUX CYREG_PRT4_AMUX
2123 #define SCSI_Out_DBx__7__BIE CYREG_PRT4_BIE
2124 #define SCSI_Out_DBx__7__BIT_MASK CYREG_PRT4_BIT_MASK
2125 #define SCSI_Out_DBx__7__BYP CYREG_PRT4_BYP
2126 #define SCSI_Out_DBx__7__CTL CYREG_PRT4_CTL
2127 #define SCSI_Out_DBx__7__DM0 CYREG_PRT4_DM0
2128 #define SCSI_Out_DBx__7__DM1 CYREG_PRT4_DM1
2129 #define SCSI_Out_DBx__7__DM2 CYREG_PRT4_DM2
2130 #define SCSI_Out_DBx__7__DR CYREG_PRT4_DR
2131 #define SCSI_Out_DBx__7__INP_DIS CYREG_PRT4_INP_DIS
2132 #define SCSI_Out_DBx__7__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG
2133 #define SCSI_Out_DBx__7__LCD_EN CYREG_PRT4_LCD_EN
2134 #define SCSI_Out_DBx__7__MASK 0x10u
2135 #define SCSI_Out_DBx__7__PC CYREG_PRT4_PC4
2136 #define SCSI_Out_DBx__7__PORT 4u
2137 #define SCSI_Out_DBx__7__PRT CYREG_PRT4_PRT
2138 #define SCSI_Out_DBx__7__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL
2139 #define SCSI_Out_DBx__7__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN
2140 #define SCSI_Out_DBx__7__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0
2141 #define SCSI_Out_DBx__7__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1
2142 #define SCSI_Out_DBx__7__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0
2143 #define SCSI_Out_DBx__7__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1
2144 #define SCSI_Out_DBx__7__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT
2145 #define SCSI_Out_DBx__7__PS CYREG_PRT4_PS
2146 #define SCSI_Out_DBx__7__SHIFT 4
2147 #define SCSI_Out_DBx__7__SLW CYREG_PRT4_SLW
2148 #define SCSI_Out_DBx__DB0__AG CYREG_PRT6_AG
2149 #define SCSI_Out_DBx__DB0__AMUX CYREG_PRT6_AMUX
2150 #define SCSI_Out_DBx__DB0__BIE CYREG_PRT6_BIE
2151 #define SCSI_Out_DBx__DB0__BIT_MASK CYREG_PRT6_BIT_MASK
2152 #define SCSI_Out_DBx__DB0__BYP CYREG_PRT6_BYP
2153 #define SCSI_Out_DBx__DB0__CTL CYREG_PRT6_CTL
2154 #define SCSI_Out_DBx__DB0__DM0 CYREG_PRT6_DM0
2155 #define SCSI_Out_DBx__DB0__DM1 CYREG_PRT6_DM1
2156 #define SCSI_Out_DBx__DB0__DM2 CYREG_PRT6_DM2
2157 #define SCSI_Out_DBx__DB0__DR CYREG_PRT6_DR
2158 #define SCSI_Out_DBx__DB0__INP_DIS CYREG_PRT6_INP_DIS
2159 #define SCSI_Out_DBx__DB0__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
2160 #define SCSI_Out_DBx__DB0__LCD_EN CYREG_PRT6_LCD_EN
2161 #define SCSI_Out_DBx__DB0__MASK 0x08u
2162 #define SCSI_Out_DBx__DB0__PC CYREG_PRT6_PC3
2163 #define SCSI_Out_DBx__DB0__PORT 6u
2164 #define SCSI_Out_DBx__DB0__PRT CYREG_PRT6_PRT
2165 #define SCSI_Out_DBx__DB0__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
2166 #define SCSI_Out_DBx__DB0__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
2167 #define SCSI_Out_DBx__DB0__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
2168 #define SCSI_Out_DBx__DB0__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
2169 #define SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
2170 #define SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
2171 #define SCSI_Out_DBx__DB0__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
2172 #define SCSI_Out_DBx__DB0__PS CYREG_PRT6_PS
2173 #define SCSI_Out_DBx__DB0__SHIFT 3
2174 #define SCSI_Out_DBx__DB0__SLW CYREG_PRT6_SLW
2175 #define SCSI_Out_DBx__DB1__AG CYREG_PRT6_AG
2176 #define SCSI_Out_DBx__DB1__AMUX CYREG_PRT6_AMUX
2177 #define SCSI_Out_DBx__DB1__BIE CYREG_PRT6_BIE
2178 #define SCSI_Out_DBx__DB1__BIT_MASK CYREG_PRT6_BIT_MASK
2179 #define SCSI_Out_DBx__DB1__BYP CYREG_PRT6_BYP
2180 #define SCSI_Out_DBx__DB1__CTL CYREG_PRT6_CTL
2181 #define SCSI_Out_DBx__DB1__DM0 CYREG_PRT6_DM0
2182 #define SCSI_Out_DBx__DB1__DM1 CYREG_PRT6_DM1
2183 #define SCSI_Out_DBx__DB1__DM2 CYREG_PRT6_DM2
2184 #define SCSI_Out_DBx__DB1__DR CYREG_PRT6_DR
2185 #define SCSI_Out_DBx__DB1__INP_DIS CYREG_PRT6_INP_DIS
2186 #define SCSI_Out_DBx__DB1__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
2187 #define SCSI_Out_DBx__DB1__LCD_EN CYREG_PRT6_LCD_EN
2188 #define SCSI_Out_DBx__DB1__MASK 0x04u
2189 #define SCSI_Out_DBx__DB1__PC CYREG_PRT6_PC2
2190 #define SCSI_Out_DBx__DB1__PORT 6u
2191 #define SCSI_Out_DBx__DB1__PRT CYREG_PRT6_PRT
2192 #define SCSI_Out_DBx__DB1__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
2193 #define SCSI_Out_DBx__DB1__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
2194 #define SCSI_Out_DBx__DB1__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
2195 #define SCSI_Out_DBx__DB1__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
2196 #define SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
2197 #define SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
2198 #define SCSI_Out_DBx__DB1__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
2199 #define SCSI_Out_DBx__DB1__PS CYREG_PRT6_PS
2200 #define SCSI_Out_DBx__DB1__SHIFT 2
2201 #define SCSI_Out_DBx__DB1__SLW CYREG_PRT6_SLW
2202 #define SCSI_Out_DBx__DB2__AG CYREG_PRT6_AG
2203 #define SCSI_Out_DBx__DB2__AMUX CYREG_PRT6_AMUX
2204 #define SCSI_Out_DBx__DB2__BIE CYREG_PRT6_BIE
2205 #define SCSI_Out_DBx__DB2__BIT_MASK CYREG_PRT6_BIT_MASK
2206 #define SCSI_Out_DBx__DB2__BYP CYREG_PRT6_BYP
2207 #define SCSI_Out_DBx__DB2__CTL CYREG_PRT6_CTL
2208 #define SCSI_Out_DBx__DB2__DM0 CYREG_PRT6_DM0
2209 #define SCSI_Out_DBx__DB2__DM1 CYREG_PRT6_DM1
2210 #define SCSI_Out_DBx__DB2__DM2 CYREG_PRT6_DM2
2211 #define SCSI_Out_DBx__DB2__DR CYREG_PRT6_DR
2212 #define SCSI_Out_DBx__DB2__INP_DIS CYREG_PRT6_INP_DIS
2213 #define SCSI_Out_DBx__DB2__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
2214 #define SCSI_Out_DBx__DB2__LCD_EN CYREG_PRT6_LCD_EN
2215 #define SCSI_Out_DBx__DB2__MASK 0x02u
2216 #define SCSI_Out_DBx__DB2__PC CYREG_PRT6_PC1
2217 #define SCSI_Out_DBx__DB2__PORT 6u
2218 #define SCSI_Out_DBx__DB2__PRT CYREG_PRT6_PRT
2219 #define SCSI_Out_DBx__DB2__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
2220 #define SCSI_Out_DBx__DB2__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
2221 #define SCSI_Out_DBx__DB2__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
2222 #define SCSI_Out_DBx__DB2__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
2223 #define SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
2224 #define SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
2225 #define SCSI_Out_DBx__DB2__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
2226 #define SCSI_Out_DBx__DB2__PS CYREG_PRT6_PS
2227 #define SCSI_Out_DBx__DB2__SHIFT 1
2228 #define SCSI_Out_DBx__DB2__SLW CYREG_PRT6_SLW
2229 #define SCSI_Out_DBx__DB3__AG CYREG_PRT6_AG
2230 #define SCSI_Out_DBx__DB3__AMUX CYREG_PRT6_AMUX
2231 #define SCSI_Out_DBx__DB3__BIE CYREG_PRT6_BIE
2232 #define SCSI_Out_DBx__DB3__BIT_MASK CYREG_PRT6_BIT_MASK
2233 #define SCSI_Out_DBx__DB3__BYP CYREG_PRT6_BYP
2234 #define SCSI_Out_DBx__DB3__CTL CYREG_PRT6_CTL
2235 #define SCSI_Out_DBx__DB3__DM0 CYREG_PRT6_DM0
2236 #define SCSI_Out_DBx__DB3__DM1 CYREG_PRT6_DM1
2237 #define SCSI_Out_DBx__DB3__DM2 CYREG_PRT6_DM2
2238 #define SCSI_Out_DBx__DB3__DR CYREG_PRT6_DR
2239 #define SCSI_Out_DBx__DB3__INP_DIS CYREG_PRT6_INP_DIS
2240 #define SCSI_Out_DBx__DB3__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
2241 #define SCSI_Out_DBx__DB3__LCD_EN CYREG_PRT6_LCD_EN
2242 #define SCSI_Out_DBx__DB3__MASK 0x01u
2243 #define SCSI_Out_DBx__DB3__PC CYREG_PRT6_PC0
2244 #define SCSI_Out_DBx__DB3__PORT 6u
2245 #define SCSI_Out_DBx__DB3__PRT CYREG_PRT6_PRT
2246 #define SCSI_Out_DBx__DB3__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
2247 #define SCSI_Out_DBx__DB3__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
2248 #define SCSI_Out_DBx__DB3__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
2249 #define SCSI_Out_DBx__DB3__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
2250 #define SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
2251 #define SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
2252 #define SCSI_Out_DBx__DB3__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
2253 #define SCSI_Out_DBx__DB3__PS CYREG_PRT6_PS
2254 #define SCSI_Out_DBx__DB3__SHIFT 0
2255 #define SCSI_Out_DBx__DB3__SLW CYREG_PRT6_SLW
2256 #define SCSI_Out_DBx__DB4__AG CYREG_PRT4_AG
2257 #define SCSI_Out_DBx__DB4__AMUX CYREG_PRT4_AMUX
2258 #define SCSI_Out_DBx__DB4__BIE CYREG_PRT4_BIE
2259 #define SCSI_Out_DBx__DB4__BIT_MASK CYREG_PRT4_BIT_MASK
2260 #define SCSI_Out_DBx__DB4__BYP CYREG_PRT4_BYP
2261 #define SCSI_Out_DBx__DB4__CTL CYREG_PRT4_CTL
2262 #define SCSI_Out_DBx__DB4__DM0 CYREG_PRT4_DM0
2263 #define SCSI_Out_DBx__DB4__DM1 CYREG_PRT4_DM1
2264 #define SCSI_Out_DBx__DB4__DM2 CYREG_PRT4_DM2
2265 #define SCSI_Out_DBx__DB4__DR CYREG_PRT4_DR
2266 #define SCSI_Out_DBx__DB4__INP_DIS CYREG_PRT4_INP_DIS
2267 #define SCSI_Out_DBx__DB4__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG
2268 #define SCSI_Out_DBx__DB4__LCD_EN CYREG_PRT4_LCD_EN
2269 #define SCSI_Out_DBx__DB4__MASK 0x80u
2270 #define SCSI_Out_DBx__DB4__PC CYREG_PRT4_PC7
2271 #define SCSI_Out_DBx__DB4__PORT 4u
2272 #define SCSI_Out_DBx__DB4__PRT CYREG_PRT4_PRT
2273 #define SCSI_Out_DBx__DB4__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL
2274 #define SCSI_Out_DBx__DB4__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN
2275 #define SCSI_Out_DBx__DB4__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0
2276 #define SCSI_Out_DBx__DB4__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1
2277 #define SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0
2278 #define SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1
2279 #define SCSI_Out_DBx__DB4__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT
2280 #define SCSI_Out_DBx__DB4__PS CYREG_PRT4_PS
2281 #define SCSI_Out_DBx__DB4__SHIFT 7
2282 #define SCSI_Out_DBx__DB4__SLW CYREG_PRT4_SLW
2283 #define SCSI_Out_DBx__DB5__AG CYREG_PRT4_AG
2284 #define SCSI_Out_DBx__DB5__AMUX CYREG_PRT4_AMUX
2285 #define SCSI_Out_DBx__DB5__BIE CYREG_PRT4_BIE
2286 #define SCSI_Out_DBx__DB5__BIT_MASK CYREG_PRT4_BIT_MASK
2287 #define SCSI_Out_DBx__DB5__BYP CYREG_PRT4_BYP
2288 #define SCSI_Out_DBx__DB5__CTL CYREG_PRT4_CTL
2289 #define SCSI_Out_DBx__DB5__DM0 CYREG_PRT4_DM0
2290 #define SCSI_Out_DBx__DB5__DM1 CYREG_PRT4_DM1
2291 #define SCSI_Out_DBx__DB5__DM2 CYREG_PRT4_DM2
2292 #define SCSI_Out_DBx__DB5__DR CYREG_PRT4_DR
2293 #define SCSI_Out_DBx__DB5__INP_DIS CYREG_PRT4_INP_DIS
2294 #define SCSI_Out_DBx__DB5__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG
2295 #define SCSI_Out_DBx__DB5__LCD_EN CYREG_PRT4_LCD_EN
2296 #define SCSI_Out_DBx__DB5__MASK 0x40u
2297 #define SCSI_Out_DBx__DB5__PC CYREG_PRT4_PC6
2298 #define SCSI_Out_DBx__DB5__PORT 4u
2299 #define SCSI_Out_DBx__DB5__PRT CYREG_PRT4_PRT
2300 #define SCSI_Out_DBx__DB5__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL
2301 #define SCSI_Out_DBx__DB5__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN
2302 #define SCSI_Out_DBx__DB5__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0
2303 #define SCSI_Out_DBx__DB5__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1
2304 #define SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0
2305 #define SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1
2306 #define SCSI_Out_DBx__DB5__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT
2307 #define SCSI_Out_DBx__DB5__PS CYREG_PRT4_PS
2308 #define SCSI_Out_DBx__DB5__SHIFT 6
2309 #define SCSI_Out_DBx__DB5__SLW CYREG_PRT4_SLW
2310 #define SCSI_Out_DBx__DB6__AG CYREG_PRT4_AG
2311 #define SCSI_Out_DBx__DB6__AMUX CYREG_PRT4_AMUX
2312 #define SCSI_Out_DBx__DB6__BIE CYREG_PRT4_BIE
2313 #define SCSI_Out_DBx__DB6__BIT_MASK CYREG_PRT4_BIT_MASK
2314 #define SCSI_Out_DBx__DB6__BYP CYREG_PRT4_BYP
2315 #define SCSI_Out_DBx__DB6__CTL CYREG_PRT4_CTL
2316 #define SCSI_Out_DBx__DB6__DM0 CYREG_PRT4_DM0
2317 #define SCSI_Out_DBx__DB6__DM1 CYREG_PRT4_DM1
2318 #define SCSI_Out_DBx__DB6__DM2 CYREG_PRT4_DM2
2319 #define SCSI_Out_DBx__DB6__DR CYREG_PRT4_DR
2320 #define SCSI_Out_DBx__DB6__INP_DIS CYREG_PRT4_INP_DIS
2321 #define SCSI_Out_DBx__DB6__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG
2322 #define SCSI_Out_DBx__DB6__LCD_EN CYREG_PRT4_LCD_EN
2323 #define SCSI_Out_DBx__DB6__MASK 0x20u
2324 #define SCSI_Out_DBx__DB6__PC CYREG_PRT4_PC5
2325 #define SCSI_Out_DBx__DB6__PORT 4u
2326 #define SCSI_Out_DBx__DB6__PRT CYREG_PRT4_PRT
2327 #define SCSI_Out_DBx__DB6__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL
2328 #define SCSI_Out_DBx__DB6__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN
2329 #define SCSI_Out_DBx__DB6__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0
2330 #define SCSI_Out_DBx__DB6__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1
2331 #define SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0
2332 #define SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1
2333 #define SCSI_Out_DBx__DB6__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT
2334 #define SCSI_Out_DBx__DB6__PS CYREG_PRT4_PS
2335 #define SCSI_Out_DBx__DB6__SHIFT 5
2336 #define SCSI_Out_DBx__DB6__SLW CYREG_PRT4_SLW
2337 #define SCSI_Out_DBx__DB7__AG CYREG_PRT4_AG
2338 #define SCSI_Out_DBx__DB7__AMUX CYREG_PRT4_AMUX
2339 #define SCSI_Out_DBx__DB7__BIE CYREG_PRT4_BIE
2340 #define SCSI_Out_DBx__DB7__BIT_MASK CYREG_PRT4_BIT_MASK
2341 #define SCSI_Out_DBx__DB7__BYP CYREG_PRT4_BYP
2342 #define SCSI_Out_DBx__DB7__CTL CYREG_PRT4_CTL
2343 #define SCSI_Out_DBx__DB7__DM0 CYREG_PRT4_DM0
2344 #define SCSI_Out_DBx__DB7__DM1 CYREG_PRT4_DM1
2345 #define SCSI_Out_DBx__DB7__DM2 CYREG_PRT4_DM2
2346 #define SCSI_Out_DBx__DB7__DR CYREG_PRT4_DR
2347 #define SCSI_Out_DBx__DB7__INP_DIS CYREG_PRT4_INP_DIS
2348 #define SCSI_Out_DBx__DB7__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG
2349 #define SCSI_Out_DBx__DB7__LCD_EN CYREG_PRT4_LCD_EN
2350 #define SCSI_Out_DBx__DB7__MASK 0x10u
2351 #define SCSI_Out_DBx__DB7__PC CYREG_PRT4_PC4
2352 #define SCSI_Out_DBx__DB7__PORT 4u
2353 #define SCSI_Out_DBx__DB7__PRT CYREG_PRT4_PRT
2354 #define SCSI_Out_DBx__DB7__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL
2355 #define SCSI_Out_DBx__DB7__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN
2356 #define SCSI_Out_DBx__DB7__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0
2357 #define SCSI_Out_DBx__DB7__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1
2358 #define SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0
2359 #define SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1
2360 #define SCSI_Out_DBx__DB7__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT
2361 #define SCSI_Out_DBx__DB7__PS CYREG_PRT4_PS
2362 #define SCSI_Out_DBx__DB7__SHIFT 4
2363 #define SCSI_Out_DBx__DB7__SLW CYREG_PRT4_SLW
2364
2365 /* SD_RX_DMA */
2366 #define SD_RX_DMA__DRQ_CTL CYREG_IDMUX_DRQ_CTL0
2367 #define SD_RX_DMA__DRQ_NUMBER 2u
2368 #define SD_RX_DMA__NUMBEROF_TDS 0u
2369 #define SD_RX_DMA__PRIORITY 0u
2370 #define SD_RX_DMA__TERMIN_EN 0u
2371 #define SD_RX_DMA__TERMIN_SEL 0u
2372 #define SD_RX_DMA__TERMOUT0_EN 1u
2373 #define SD_RX_DMA__TERMOUT0_SEL 2u
2374 #define SD_RX_DMA__TERMOUT1_EN 0u
2375 #define SD_RX_DMA__TERMOUT1_SEL 0u
2376
2377 /* SD_RX_DMA_COMPLETE */
2378 #define SD_RX_DMA_COMPLETE__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0
2379 #define SD_RX_DMA_COMPLETE__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0
2380 #define SD_RX_DMA_COMPLETE__INTC_MASK 0x10u
2381 #define SD_RX_DMA_COMPLETE__INTC_NUMBER 4u
2382 #define SD_RX_DMA_COMPLETE__INTC_PRIOR_NUM 7u
2383 #define SD_RX_DMA_COMPLETE__INTC_PRIOR_REG CYREG_NVIC_PRI_4
2384 #define SD_RX_DMA_COMPLETE__INTC_SET_EN_REG CYREG_NVIC_SETENA0
2385 #define SD_RX_DMA_COMPLETE__INTC_SET_PD_REG CYREG_NVIC_SETPEND0
2386
2387 /* SD_TX_DMA */
2388 #define SD_TX_DMA__DRQ_CTL CYREG_IDMUX_DRQ_CTL0
2389 #define SD_TX_DMA__DRQ_NUMBER 3u
2390 #define SD_TX_DMA__NUMBEROF_TDS 0u
2391 #define SD_TX_DMA__PRIORITY 1u
2392 #define SD_TX_DMA__TERMIN_EN 0u
2393 #define SD_TX_DMA__TERMIN_SEL 0u
2394 #define SD_TX_DMA__TERMOUT0_EN 1u
2395 #define SD_TX_DMA__TERMOUT0_SEL 3u
2396 #define SD_TX_DMA__TERMOUT1_EN 0u
2397 #define SD_TX_DMA__TERMOUT1_SEL 0u
2398
2399 /* SD_TX_DMA_COMPLETE */
2400 #define SD_TX_DMA_COMPLETE__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0
2401 #define SD_TX_DMA_COMPLETE__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0
2402 #define SD_TX_DMA_COMPLETE__INTC_MASK 0x20u
2403 #define SD_TX_DMA_COMPLETE__INTC_NUMBER 5u
2404 #define SD_TX_DMA_COMPLETE__INTC_PRIOR_NUM 7u
2405 #define SD_TX_DMA_COMPLETE__INTC_PRIOR_REG CYREG_NVIC_PRI_5
2406 #define SD_TX_DMA_COMPLETE__INTC_SET_EN_REG CYREG_NVIC_SETENA0
2407 #define SD_TX_DMA_COMPLETE__INTC_SET_PD_REG CYREG_NVIC_SETPEND0
2408
2409 /* SCSI_Noise */
2410 #define SCSI_Noise__0__AG CYREG_PRT12_AG
2411 #define SCSI_Noise__0__BIE CYREG_PRT12_BIE
2412 #define SCSI_Noise__0__BIT_MASK CYREG_PRT12_BIT_MASK
2413 #define SCSI_Noise__0__BYP CYREG_PRT12_BYP
2414 #define SCSI_Noise__0__DM0 CYREG_PRT12_DM0
2415 #define SCSI_Noise__0__DM1 CYREG_PRT12_DM1
2416 #define SCSI_Noise__0__DM2 CYREG_PRT12_DM2
2417 #define SCSI_Noise__0__DR CYREG_PRT12_DR
2418 #define SCSI_Noise__0__INP_DIS CYREG_PRT12_INP_DIS
2419 #define SCSI_Noise__0__MASK 0x20u
2420 #define SCSI_Noise__0__PC CYREG_PRT12_PC5
2421 #define SCSI_Noise__0__PORT 12u
2422 #define SCSI_Noise__0__PRT CYREG_PRT12_PRT
2423 #define SCSI_Noise__0__PRTDSI__DBL_SYNC_IN CYREG_PRT12_DBL_SYNC_IN
2424 #define SCSI_Noise__0__PRTDSI__OE_SEL0 CYREG_PRT12_OE_SEL0
2425 #define SCSI_Noise__0__PRTDSI__OE_SEL1 CYREG_PRT12_OE_SEL1
2426 #define SCSI_Noise__0__PRTDSI__OUT_SEL0 CYREG_PRT12_OUT_SEL0
2427 #define SCSI_Noise__0__PRTDSI__OUT_SEL1 CYREG_PRT12_OUT_SEL1
2428 #define SCSI_Noise__0__PRTDSI__SYNC_OUT CYREG_PRT12_SYNC_OUT
2429 #define SCSI_Noise__0__PS CYREG_PRT12_PS
2430 #define SCSI_Noise__0__SHIFT 5
2431 #define SCSI_Noise__0__SIO_CFG CYREG_PRT12_SIO_CFG
2432 #define SCSI_Noise__0__SIO_DIFF CYREG_PRT12_SIO_DIFF
2433 #define SCSI_Noise__0__SIO_HYST_EN CYREG_PRT12_SIO_HYST_EN
2434 #define SCSI_Noise__0__SIO_REG_HIFREQ CYREG_PRT12_SIO_REG_HIFREQ
2435 #define SCSI_Noise__0__SLW CYREG_PRT12_SLW
2436 #define SCSI_Noise__1__AG CYREG_PRT6_AG
2437 #define SCSI_Noise__1__AMUX CYREG_PRT6_AMUX
2438 #define SCSI_Noise__1__BIE CYREG_PRT6_BIE
2439 #define SCSI_Noise__1__BIT_MASK CYREG_PRT6_BIT_MASK
2440 #define SCSI_Noise__1__BYP CYREG_PRT6_BYP
2441 #define SCSI_Noise__1__CTL CYREG_PRT6_CTL
2442 #define SCSI_Noise__1__DM0 CYREG_PRT6_DM0
2443 #define SCSI_Noise__1__DM1 CYREG_PRT6_DM1
2444 #define SCSI_Noise__1__DM2 CYREG_PRT6_DM2
2445 #define SCSI_Noise__1__DR CYREG_PRT6_DR
2446 #define SCSI_Noise__1__INP_DIS CYREG_PRT6_INP_DIS
2447 #define SCSI_Noise__1__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
2448 #define SCSI_Noise__1__LCD_EN CYREG_PRT6_LCD_EN
2449 #define SCSI_Noise__1__MASK 0x10u
2450 #define SCSI_Noise__1__PC CYREG_PRT6_PC4
2451 #define SCSI_Noise__1__PORT 6u
2452 #define SCSI_Noise__1__PRT CYREG_PRT6_PRT
2453 #define SCSI_Noise__1__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
2454 #define SCSI_Noise__1__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
2455 #define SCSI_Noise__1__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
2456 #define SCSI_Noise__1__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
2457 #define SCSI_Noise__1__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
2458 #define SCSI_Noise__1__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
2459 #define SCSI_Noise__1__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
2460 #define SCSI_Noise__1__PS CYREG_PRT6_PS
2461 #define SCSI_Noise__1__SHIFT 4
2462 #define SCSI_Noise__1__SLW CYREG_PRT6_SLW
2463 #define SCSI_Noise__2__AG CYREG_PRT5_AG
2464 #define SCSI_Noise__2__AMUX CYREG_PRT5_AMUX
2465 #define SCSI_Noise__2__BIE CYREG_PRT5_BIE
2466 #define SCSI_Noise__2__BIT_MASK CYREG_PRT5_BIT_MASK
2467 #define SCSI_Noise__2__BYP CYREG_PRT5_BYP
2468 #define SCSI_Noise__2__CTL CYREG_PRT5_CTL
2469 #define SCSI_Noise__2__DM0 CYREG_PRT5_DM0
2470 #define SCSI_Noise__2__DM1 CYREG_PRT5_DM1
2471 #define SCSI_Noise__2__DM2 CYREG_PRT5_DM2
2472 #define SCSI_Noise__2__DR CYREG_PRT5_DR
2473 #define SCSI_Noise__2__INP_DIS CYREG_PRT5_INP_DIS
2474 #define SCSI_Noise__2__LCD_COM_SEG CYREG_PRT5_LCD_COM_SEG
2475 #define SCSI_Noise__2__LCD_EN CYREG_PRT5_LCD_EN
2476 #define SCSI_Noise__2__MASK 0x01u
2477 #define SCSI_Noise__2__PC CYREG_PRT5_PC0
2478 #define SCSI_Noise__2__PORT 5u
2479 #define SCSI_Noise__2__PRT CYREG_PRT5_PRT
2480 #define SCSI_Noise__2__PRTDSI__CAPS_SEL CYREG_PRT5_CAPS_SEL
2481 #define SCSI_Noise__2__PRTDSI__DBL_SYNC_IN CYREG_PRT5_DBL_SYNC_IN
2482 #define SCSI_Noise__2__PRTDSI__OE_SEL0 CYREG_PRT5_OE_SEL0
2483 #define SCSI_Noise__2__PRTDSI__OE_SEL1 CYREG_PRT5_OE_SEL1
2484 #define SCSI_Noise__2__PRTDSI__OUT_SEL0 CYREG_PRT5_OUT_SEL0
2485 #define SCSI_Noise__2__PRTDSI__OUT_SEL1 CYREG_PRT5_OUT_SEL1
2486 #define SCSI_Noise__2__PRTDSI__SYNC_OUT CYREG_PRT5_SYNC_OUT
2487 #define SCSI_Noise__2__PS CYREG_PRT5_PS
2488 #define SCSI_Noise__2__SHIFT 0
2489 #define SCSI_Noise__2__SLW CYREG_PRT5_SLW
2490 #define SCSI_Noise__3__AG CYREG_PRT6_AG
2491 #define SCSI_Noise__3__AMUX CYREG_PRT6_AMUX
2492 #define SCSI_Noise__3__BIE CYREG_PRT6_BIE
2493 #define SCSI_Noise__3__BIT_MASK CYREG_PRT6_BIT_MASK
2494 #define SCSI_Noise__3__BYP CYREG_PRT6_BYP
2495 #define SCSI_Noise__3__CTL CYREG_PRT6_CTL
2496 #define SCSI_Noise__3__DM0 CYREG_PRT6_DM0
2497 #define SCSI_Noise__3__DM1 CYREG_PRT6_DM1
2498 #define SCSI_Noise__3__DM2 CYREG_PRT6_DM2
2499 #define SCSI_Noise__3__DR CYREG_PRT6_DR
2500 #define SCSI_Noise__3__INP_DIS CYREG_PRT6_INP_DIS
2501 #define SCSI_Noise__3__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
2502 #define SCSI_Noise__3__LCD_EN CYREG_PRT6_LCD_EN
2503 #define SCSI_Noise__3__MASK 0x40u
2504 #define SCSI_Noise__3__PC CYREG_PRT6_PC6
2505 #define SCSI_Noise__3__PORT 6u
2506 #define SCSI_Noise__3__PRT CYREG_PRT6_PRT
2507 #define SCSI_Noise__3__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
2508 #define SCSI_Noise__3__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
2509 #define SCSI_Noise__3__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
2510 #define SCSI_Noise__3__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
2511 #define SCSI_Noise__3__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
2512 #define SCSI_Noise__3__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
2513 #define SCSI_Noise__3__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
2514 #define SCSI_Noise__3__PS CYREG_PRT6_PS
2515 #define SCSI_Noise__3__SHIFT 6
2516 #define SCSI_Noise__3__SLW CYREG_PRT6_SLW
2517 #define SCSI_Noise__4__AG CYREG_PRT6_AG
2518 #define SCSI_Noise__4__AMUX CYREG_PRT6_AMUX
2519 #define SCSI_Noise__4__BIE CYREG_PRT6_BIE
2520 #define SCSI_Noise__4__BIT_MASK CYREG_PRT6_BIT_MASK
2521 #define SCSI_Noise__4__BYP CYREG_PRT6_BYP
2522 #define SCSI_Noise__4__CTL CYREG_PRT6_CTL
2523 #define SCSI_Noise__4__DM0 CYREG_PRT6_DM0
2524 #define SCSI_Noise__4__DM1 CYREG_PRT6_DM1
2525 #define SCSI_Noise__4__DM2 CYREG_PRT6_DM2
2526 #define SCSI_Noise__4__DR CYREG_PRT6_DR
2527 #define SCSI_Noise__4__INP_DIS CYREG_PRT6_INP_DIS
2528 #define SCSI_Noise__4__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
2529 #define SCSI_Noise__4__LCD_EN CYREG_PRT6_LCD_EN
2530 #define SCSI_Noise__4__MASK 0x20u
2531 #define SCSI_Noise__4__PC CYREG_PRT6_PC5
2532 #define SCSI_Noise__4__PORT 6u
2533 #define SCSI_Noise__4__PRT CYREG_PRT6_PRT
2534 #define SCSI_Noise__4__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
2535 #define SCSI_Noise__4__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
2536 #define SCSI_Noise__4__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
2537 #define SCSI_Noise__4__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
2538 #define SCSI_Noise__4__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
2539 #define SCSI_Noise__4__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
2540 #define SCSI_Noise__4__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
2541 #define SCSI_Noise__4__PS CYREG_PRT6_PS
2542 #define SCSI_Noise__4__SHIFT 5
2543 #define SCSI_Noise__4__SLW CYREG_PRT6_SLW
2544 #define SCSI_Noise__ACK__AG CYREG_PRT6_AG
2545 #define SCSI_Noise__ACK__AMUX CYREG_PRT6_AMUX
2546 #define SCSI_Noise__ACK__BIE CYREG_PRT6_BIE
2547 #define SCSI_Noise__ACK__BIT_MASK CYREG_PRT6_BIT_MASK
2548 #define SCSI_Noise__ACK__BYP CYREG_PRT6_BYP
2549 #define SCSI_Noise__ACK__CTL CYREG_PRT6_CTL
2550 #define SCSI_Noise__ACK__DM0 CYREG_PRT6_DM0
2551 #define SCSI_Noise__ACK__DM1 CYREG_PRT6_DM1
2552 #define SCSI_Noise__ACK__DM2 CYREG_PRT6_DM2
2553 #define SCSI_Noise__ACK__DR CYREG_PRT6_DR
2554 #define SCSI_Noise__ACK__INP_DIS CYREG_PRT6_INP_DIS
2555 #define SCSI_Noise__ACK__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
2556 #define SCSI_Noise__ACK__LCD_EN CYREG_PRT6_LCD_EN
2557 #define SCSI_Noise__ACK__MASK 0x20u
2558 #define SCSI_Noise__ACK__PC CYREG_PRT6_PC5
2559 #define SCSI_Noise__ACK__PORT 6u
2560 #define SCSI_Noise__ACK__PRT CYREG_PRT6_PRT
2561 #define SCSI_Noise__ACK__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
2562 #define SCSI_Noise__ACK__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
2563 #define SCSI_Noise__ACK__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
2564 #define SCSI_Noise__ACK__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
2565 #define SCSI_Noise__ACK__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
2566 #define SCSI_Noise__ACK__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
2567 #define SCSI_Noise__ACK__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
2568 #define SCSI_Noise__ACK__PS CYREG_PRT6_PS
2569 #define SCSI_Noise__ACK__SHIFT 5
2570 #define SCSI_Noise__ACK__SLW CYREG_PRT6_SLW
2571 #define SCSI_Noise__ATN__AG CYREG_PRT12_AG
2572 #define SCSI_Noise__ATN__BIE CYREG_PRT12_BIE
2573 #define SCSI_Noise__ATN__BIT_MASK CYREG_PRT12_BIT_MASK
2574 #define SCSI_Noise__ATN__BYP CYREG_PRT12_BYP
2575 #define SCSI_Noise__ATN__DM0 CYREG_PRT12_DM0
2576 #define SCSI_Noise__ATN__DM1 CYREG_PRT12_DM1
2577 #define SCSI_Noise__ATN__DM2 CYREG_PRT12_DM2
2578 #define SCSI_Noise__ATN__DR CYREG_PRT12_DR
2579 #define SCSI_Noise__ATN__INP_DIS CYREG_PRT12_INP_DIS
2580 #define SCSI_Noise__ATN__MASK 0x20u
2581 #define SCSI_Noise__ATN__PC CYREG_PRT12_PC5
2582 #define SCSI_Noise__ATN__PORT 12u
2583 #define SCSI_Noise__ATN__PRT CYREG_PRT12_PRT
2584 #define SCSI_Noise__ATN__PRTDSI__DBL_SYNC_IN CYREG_PRT12_DBL_SYNC_IN
2585 #define SCSI_Noise__ATN__PRTDSI__OE_SEL0 CYREG_PRT12_OE_SEL0
2586 #define SCSI_Noise__ATN__PRTDSI__OE_SEL1 CYREG_PRT12_OE_SEL1
2587 #define SCSI_Noise__ATN__PRTDSI__OUT_SEL0 CYREG_PRT12_OUT_SEL0
2588 #define SCSI_Noise__ATN__PRTDSI__OUT_SEL1 CYREG_PRT12_OUT_SEL1
2589 #define SCSI_Noise__ATN__PRTDSI__SYNC_OUT CYREG_PRT12_SYNC_OUT
2590 #define SCSI_Noise__ATN__PS CYREG_PRT12_PS
2591 #define SCSI_Noise__ATN__SHIFT 5
2592 #define SCSI_Noise__ATN__SIO_CFG CYREG_PRT12_SIO_CFG
2593 #define SCSI_Noise__ATN__SIO_DIFF CYREG_PRT12_SIO_DIFF
2594 #define SCSI_Noise__ATN__SIO_HYST_EN CYREG_PRT12_SIO_HYST_EN
2595 #define SCSI_Noise__ATN__SIO_REG_HIFREQ CYREG_PRT12_SIO_REG_HIFREQ
2596 #define SCSI_Noise__ATN__SLW CYREG_PRT12_SLW
2597 #define SCSI_Noise__BSY__AG CYREG_PRT6_AG
2598 #define SCSI_Noise__BSY__AMUX CYREG_PRT6_AMUX
2599 #define SCSI_Noise__BSY__BIE CYREG_PRT6_BIE
2600 #define SCSI_Noise__BSY__BIT_MASK CYREG_PRT6_BIT_MASK
2601 #define SCSI_Noise__BSY__BYP CYREG_PRT6_BYP
2602 #define SCSI_Noise__BSY__CTL CYREG_PRT6_CTL
2603 #define SCSI_Noise__BSY__DM0 CYREG_PRT6_DM0
2604 #define SCSI_Noise__BSY__DM1 CYREG_PRT6_DM1
2605 #define SCSI_Noise__BSY__DM2 CYREG_PRT6_DM2
2606 #define SCSI_Noise__BSY__DR CYREG_PRT6_DR
2607 #define SCSI_Noise__BSY__INP_DIS CYREG_PRT6_INP_DIS
2608 #define SCSI_Noise__BSY__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
2609 #define SCSI_Noise__BSY__LCD_EN CYREG_PRT6_LCD_EN
2610 #define SCSI_Noise__BSY__MASK 0x10u
2611 #define SCSI_Noise__BSY__PC CYREG_PRT6_PC4
2612 #define SCSI_Noise__BSY__PORT 6u
2613 #define SCSI_Noise__BSY__PRT CYREG_PRT6_PRT
2614 #define SCSI_Noise__BSY__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
2615 #define SCSI_Noise__BSY__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
2616 #define SCSI_Noise__BSY__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
2617 #define SCSI_Noise__BSY__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
2618 #define SCSI_Noise__BSY__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
2619 #define SCSI_Noise__BSY__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
2620 #define SCSI_Noise__BSY__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
2621 #define SCSI_Noise__BSY__PS CYREG_PRT6_PS
2622 #define SCSI_Noise__BSY__SHIFT 4
2623 #define SCSI_Noise__BSY__SLW CYREG_PRT6_SLW
2624 #define SCSI_Noise__RST__AG CYREG_PRT6_AG
2625 #define SCSI_Noise__RST__AMUX CYREG_PRT6_AMUX
2626 #define SCSI_Noise__RST__BIE CYREG_PRT6_BIE
2627 #define SCSI_Noise__RST__BIT_MASK CYREG_PRT6_BIT_MASK
2628 #define SCSI_Noise__RST__BYP CYREG_PRT6_BYP
2629 #define SCSI_Noise__RST__CTL CYREG_PRT6_CTL
2630 #define SCSI_Noise__RST__DM0 CYREG_PRT6_DM0
2631 #define SCSI_Noise__RST__DM1 CYREG_PRT6_DM1
2632 #define SCSI_Noise__RST__DM2 CYREG_PRT6_DM2
2633 #define SCSI_Noise__RST__DR CYREG_PRT6_DR
2634 #define SCSI_Noise__RST__INP_DIS CYREG_PRT6_INP_DIS
2635 #define SCSI_Noise__RST__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG
2636 #define SCSI_Noise__RST__LCD_EN CYREG_PRT6_LCD_EN
2637 #define SCSI_Noise__RST__MASK 0x40u
2638 #define SCSI_Noise__RST__PC CYREG_PRT6_PC6
2639 #define SCSI_Noise__RST__PORT 6u
2640 #define SCSI_Noise__RST__PRT CYREG_PRT6_PRT
2641 #define SCSI_Noise__RST__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL
2642 #define SCSI_Noise__RST__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN
2643 #define SCSI_Noise__RST__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0
2644 #define SCSI_Noise__RST__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1
2645 #define SCSI_Noise__RST__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0
2646 #define SCSI_Noise__RST__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1
2647 #define SCSI_Noise__RST__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT
2648 #define SCSI_Noise__RST__PS CYREG_PRT6_PS
2649 #define SCSI_Noise__RST__SHIFT 6
2650 #define SCSI_Noise__RST__SLW CYREG_PRT6_SLW
2651 #define SCSI_Noise__SEL__AG CYREG_PRT5_AG
2652 #define SCSI_Noise__SEL__AMUX CYREG_PRT5_AMUX
2653 #define SCSI_Noise__SEL__BIE CYREG_PRT5_BIE
2654 #define SCSI_Noise__SEL__BIT_MASK CYREG_PRT5_BIT_MASK
2655 #define SCSI_Noise__SEL__BYP CYREG_PRT5_BYP
2656 #define SCSI_Noise__SEL__CTL CYREG_PRT5_CTL
2657 #define SCSI_Noise__SEL__DM0 CYREG_PRT5_DM0
2658 #define SCSI_Noise__SEL__DM1 CYREG_PRT5_DM1
2659 #define SCSI_Noise__SEL__DM2 CYREG_PRT5_DM2
2660 #define SCSI_Noise__SEL__DR CYREG_PRT5_DR
2661 #define SCSI_Noise__SEL__INP_DIS CYREG_PRT5_INP_DIS
2662 #define SCSI_Noise__SEL__LCD_COM_SEG CYREG_PRT5_LCD_COM_SEG
2663 #define SCSI_Noise__SEL__LCD_EN CYREG_PRT5_LCD_EN
2664 #define SCSI_Noise__SEL__MASK 0x01u
2665 #define SCSI_Noise__SEL__PC CYREG_PRT5_PC0
2666 #define SCSI_Noise__SEL__PORT 5u
2667 #define SCSI_Noise__SEL__PRT CYREG_PRT5_PRT
2668 #define SCSI_Noise__SEL__PRTDSI__CAPS_SEL CYREG_PRT5_CAPS_SEL
2669 #define SCSI_Noise__SEL__PRTDSI__DBL_SYNC_IN CYREG_PRT5_DBL_SYNC_IN
2670 #define SCSI_Noise__SEL__PRTDSI__OE_SEL0 CYREG_PRT5_OE_SEL0
2671 #define SCSI_Noise__SEL__PRTDSI__OE_SEL1 CYREG_PRT5_OE_SEL1
2672 #define SCSI_Noise__SEL__PRTDSI__OUT_SEL0 CYREG_PRT5_OUT_SEL0
2673 #define SCSI_Noise__SEL__PRTDSI__OUT_SEL1 CYREG_PRT5_OUT_SEL1
2674 #define SCSI_Noise__SEL__PRTDSI__SYNC_OUT CYREG_PRT5_SYNC_OUT
2675 #define SCSI_Noise__SEL__PS CYREG_PRT5_PS
2676 #define SCSI_Noise__SEL__SHIFT 0
2677 #define SCSI_Noise__SEL__SLW CYREG_PRT5_SLW
2678
2679 /* scsiTarget */
2680 #define scsiTarget_datapath__16BIT_A0_REG CYREG_B0_UDB00_01_A0
2681 #define scsiTarget_datapath__16BIT_A1_REG CYREG_B0_UDB00_01_A1
2682 #define scsiTarget_datapath__16BIT_D0_REG CYREG_B0_UDB00_01_D0
2683 #define scsiTarget_datapath__16BIT_D1_REG CYREG_B0_UDB00_01_D1
2684 #define scsiTarget_datapath__16BIT_DP_AUX_CTL_REG CYREG_B0_UDB00_01_ACTL
2685 #define scsiTarget_datapath__16BIT_F0_REG CYREG_B0_UDB00_01_F0
2686 #define scsiTarget_datapath__16BIT_F1_REG CYREG_B0_UDB00_01_F1
2687 #define scsiTarget_datapath__A0_A1_REG CYREG_B0_UDB00_A0_A1
2688 #define scsiTarget_datapath__A0_REG CYREG_B0_UDB00_A0
2689 #define scsiTarget_datapath__A1_REG CYREG_B0_UDB00_A1
2690 #define scsiTarget_datapath__D0_D1_REG CYREG_B0_UDB00_D0_D1
2691 #define scsiTarget_datapath__D0_REG CYREG_B0_UDB00_D0
2692 #define scsiTarget_datapath__D1_REG CYREG_B0_UDB00_D1
2693 #define scsiTarget_datapath__DP_AUX_CTL_REG CYREG_B0_UDB00_ACTL
2694 #define scsiTarget_datapath__F0_F1_REG CYREG_B0_UDB00_F0_F1
2695 #define scsiTarget_datapath__F0_REG CYREG_B0_UDB00_F0
2696 #define scsiTarget_datapath__F1_REG CYREG_B0_UDB00_F1
2697 #define scsiTarget_datapath__MSK_DP_AUX_CTL_REG CYREG_B0_UDB00_MSK_ACTL
2698 #define scsiTarget_datapath__PER_DP_AUX_CTL_REG CYREG_B0_UDB00_MSK_ACTL
2699 #define scsiTarget_datapath_PI__16BIT_STATUS_AUX_CTL_REG CYREG_B0_UDB00_01_ACTL
2700 #define scsiTarget_datapath_PI__16BIT_STATUS_REG CYREG_B0_UDB00_01_ST
2701 #define scsiTarget_datapath_PI__MASK_REG CYREG_B0_UDB00_MSK
2702 #define scsiTarget_datapath_PI__MASK_ST_AUX_CTL_REG CYREG_B0_UDB00_MSK_ACTL
2703 #define scsiTarget_datapath_PI__PER_ST_AUX_CTL_REG CYREG_B0_UDB00_MSK_ACTL
2704 #define scsiTarget_datapath_PI__STATUS_AUX_CTL_REG CYREG_B0_UDB00_ACTL
2705 #define scsiTarget_datapath_PI__STATUS_CNT_REG CYREG_B0_UDB00_ST_CTL
2706 #define scsiTarget_datapath_PI__STATUS_CONTROL_REG CYREG_B0_UDB00_ST_CTL
2707 #define scsiTarget_datapath_PI__STATUS_REG CYREG_B0_UDB00_ST
2708 #define scsiTarget_datapath_PO__16BIT_CONTROL_AUX_CTL_REG CYREG_B0_UDB00_01_ACTL
2709 #define scsiTarget_datapath_PO__16BIT_CONTROL_CONTROL_REG CYREG_B0_UDB00_01_CTL
2710 #define scsiTarget_datapath_PO__16BIT_CONTROL_COUNT_REG CYREG_B0_UDB00_01_CTL
2711 #define scsiTarget_datapath_PO__16BIT_COUNT_CONTROL_REG CYREG_B0_UDB00_01_CTL
2712 #define scsiTarget_datapath_PO__16BIT_COUNT_COUNT_REG CYREG_B0_UDB00_01_CTL
2713 #define scsiTarget_datapath_PO__16BIT_MASK_MASK_REG CYREG_B0_UDB00_01_MSK
2714 #define scsiTarget_datapath_PO__16BIT_MASK_PERIOD_REG CYREG_B0_UDB00_01_MSK
2715 #define scsiTarget_datapath_PO__16BIT_PERIOD_MASK_REG CYREG_B0_UDB00_01_MSK
2716 #define scsiTarget_datapath_PO__16BIT_PERIOD_PERIOD_REG CYREG_B0_UDB00_01_MSK
2717 #define scsiTarget_datapath_PO__CONTROL_AUX_CTL_REG CYREG_B0_UDB00_ACTL
2718 #define scsiTarget_datapath_PO__CONTROL_REG CYREG_B0_UDB00_CTL
2719 #define scsiTarget_datapath_PO__CONTROL_ST_REG CYREG_B0_UDB00_ST_CTL
2720 #define scsiTarget_datapath_PO__COUNT_REG CYREG_B0_UDB00_CTL
2721 #define scsiTarget_datapath_PO__COUNT_ST_REG CYREG_B0_UDB00_ST_CTL
2722 #define scsiTarget_datapath_PO__MASK_CTL_AUX_CTL_REG CYREG_B0_UDB00_MSK_ACTL
2723 #define scsiTarget_datapath_PO__PER_CTL_AUX_CTL_REG CYREG_B0_UDB00_MSK_ACTL
2724 #define scsiTarget_datapath_PO__PERIOD_REG CYREG_B0_UDB00_MSK
2725 #define scsiTarget_StatusReg__0__MASK 0x01u
2726 #define scsiTarget_StatusReg__0__POS 0
2727 #define scsiTarget_StatusReg__1__MASK 0x02u
2728 #define scsiTarget_StatusReg__1__POS 1
2729 #define scsiTarget_StatusReg__16BIT_STATUS_AUX_CTL_REG CYREG_B0_UDB12_13_ACTL
2730 #define scsiTarget_StatusReg__16BIT_STATUS_REG CYREG_B0_UDB12_13_ST
2731 #define scsiTarget_StatusReg__2__MASK 0x04u
2732 #define scsiTarget_StatusReg__2__POS 2
2733 #define scsiTarget_StatusReg__3__MASK 0x08u
2734 #define scsiTarget_StatusReg__3__POS 3
2735 #define scsiTarget_StatusReg__4__MASK 0x10u
2736 #define scsiTarget_StatusReg__4__POS 4
2737 #define scsiTarget_StatusReg__MASK 0x1Fu
2738 #define scsiTarget_StatusReg__MASK_REG CYREG_B0_UDB12_MSK
2739 #define scsiTarget_StatusReg__STATUS_AUX_CTL_REG CYREG_B0_UDB12_ACTL
2740 #define scsiTarget_StatusReg__STATUS_REG CYREG_B0_UDB12_ST
2741
2742 /* Debug_Timer_Interrupt */
2743 #define Debug_Timer_Interrupt__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0
2744 #define Debug_Timer_Interrupt__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0
2745 #define Debug_Timer_Interrupt__INTC_MASK 0x02u
2746 #define Debug_Timer_Interrupt__INTC_NUMBER 1u
2747 #define Debug_Timer_Interrupt__INTC_PRIOR_NUM 7u
2748 #define Debug_Timer_Interrupt__INTC_PRIOR_REG CYREG_NVIC_PRI_1
2749 #define Debug_Timer_Interrupt__INTC_SET_EN_REG CYREG_NVIC_SETENA0
2750 #define Debug_Timer_Interrupt__INTC_SET_PD_REG CYREG_NVIC_SETPEND0
2751
2752 /* Debug_Timer_TimerHW */
2753 #define Debug_Timer_TimerHW__CAP0 CYREG_TMR0_CAP0
2754 #define Debug_Timer_TimerHW__CAP1 CYREG_TMR0_CAP1
2755 #define Debug_Timer_TimerHW__CFG0 CYREG_TMR0_CFG0
2756 #define Debug_Timer_TimerHW__CFG1 CYREG_TMR0_CFG1
2757 #define Debug_Timer_TimerHW__CFG2 CYREG_TMR0_CFG2
2758 #define Debug_Timer_TimerHW__CNT_CMP0 CYREG_TMR0_CNT_CMP0
2759 #define Debug_Timer_TimerHW__CNT_CMP1 CYREG_TMR0_CNT_CMP1
2760 #define Debug_Timer_TimerHW__PER0 CYREG_TMR0_PER0
2761 #define Debug_Timer_TimerHW__PER1 CYREG_TMR0_PER1
2762 #define Debug_Timer_TimerHW__PM_ACT_CFG CYREG_PM_ACT_CFG3
2763 #define Debug_Timer_TimerHW__PM_ACT_MSK 0x01u
2764 #define Debug_Timer_TimerHW__PM_STBY_CFG CYREG_PM_STBY_CFG3
2765 #define Debug_Timer_TimerHW__PM_STBY_MSK 0x01u
2766 #define Debug_Timer_TimerHW__RT0 CYREG_TMR0_RT0
2767 #define Debug_Timer_TimerHW__RT1 CYREG_TMR0_RT1
2768 #define Debug_Timer_TimerHW__SR0 CYREG_TMR0_SR0
2769
2770 /* SCSI_RX_DMA */
2771 #define SCSI_RX_DMA__DRQ_CTL CYREG_IDMUX_DRQ_CTL0
2772 #define SCSI_RX_DMA__DRQ_NUMBER 0u
2773 #define SCSI_RX_DMA__NUMBEROF_TDS 0u
2774 #define SCSI_RX_DMA__PRIORITY 2u
2775 #define SCSI_RX_DMA__TERMIN_EN 0u
2776 #define SCSI_RX_DMA__TERMIN_SEL 0u
2777 #define SCSI_RX_DMA__TERMOUT0_EN 1u
2778 #define SCSI_RX_DMA__TERMOUT0_SEL 0u
2779 #define SCSI_RX_DMA__TERMOUT1_EN 0u
2780 #define SCSI_RX_DMA__TERMOUT1_SEL 0u
2781
2782 /* SCSI_RX_DMA_COMPLETE */
2783 #define SCSI_RX_DMA_COMPLETE__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0
2784 #define SCSI_RX_DMA_COMPLETE__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0
2785 #define SCSI_RX_DMA_COMPLETE__INTC_MASK 0x01u
2786 #define SCSI_RX_DMA_COMPLETE__INTC_NUMBER 0u
2787 #define SCSI_RX_DMA_COMPLETE__INTC_PRIOR_NUM 7u
2788 #define SCSI_RX_DMA_COMPLETE__INTC_PRIOR_REG CYREG_NVIC_PRI_0
2789 #define SCSI_RX_DMA_COMPLETE__INTC_SET_EN_REG CYREG_NVIC_SETENA0
2790 #define SCSI_RX_DMA_COMPLETE__INTC_SET_PD_REG CYREG_NVIC_SETPEND0
2791
2792 /* SCSI_TX_DMA */
2793 #define SCSI_TX_DMA__DRQ_CTL CYREG_IDMUX_DRQ_CTL0
2794 #define SCSI_TX_DMA__DRQ_NUMBER 1u
2795 #define SCSI_TX_DMA__NUMBEROF_TDS 0u
2796 #define SCSI_TX_DMA__PRIORITY 2u
2797 #define SCSI_TX_DMA__TERMIN_EN 0u
2798 #define SCSI_TX_DMA__TERMIN_SEL 0u
2799 #define SCSI_TX_DMA__TERMOUT0_EN 1u
2800 #define SCSI_TX_DMA__TERMOUT0_SEL 1u
2801 #define SCSI_TX_DMA__TERMOUT1_EN 0u
2802 #define SCSI_TX_DMA__TERMOUT1_SEL 0u
2803
2804 /* SCSI_TX_DMA_COMPLETE */
2805 #define SCSI_TX_DMA_COMPLETE__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0
2806 #define SCSI_TX_DMA_COMPLETE__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0
2807 #define SCSI_TX_DMA_COMPLETE__INTC_MASK 0x08u
2808 #define SCSI_TX_DMA_COMPLETE__INTC_NUMBER 3u
2809 #define SCSI_TX_DMA_COMPLETE__INTC_PRIOR_NUM 7u
2810 #define SCSI_TX_DMA_COMPLETE__INTC_PRIOR_REG CYREG_NVIC_PRI_3
2811 #define SCSI_TX_DMA_COMPLETE__INTC_SET_EN_REG CYREG_NVIC_SETENA0
2812 #define SCSI_TX_DMA_COMPLETE__INTC_SET_PD_REG CYREG_NVIC_SETPEND0
2813
2814 /* SD_Data_Clk */
2815 #define SD_Data_Clk__CFG0 CYREG_CLKDIST_DCFG0_CFG0
2816 #define SD_Data_Clk__CFG1 CYREG_CLKDIST_DCFG0_CFG1
2817 #define SD_Data_Clk__CFG2 CYREG_CLKDIST_DCFG0_CFG2
2818 #define SD_Data_Clk__CFG2_SRC_SEL_MASK 0x07u
2819 #define SD_Data_Clk__INDEX 0x00u
2820 #define SD_Data_Clk__PM_ACT_CFG CYREG_PM_ACT_CFG2
2821 #define SD_Data_Clk__PM_ACT_MSK 0x01u
2822 #define SD_Data_Clk__PM_STBY_CFG CYREG_PM_STBY_CFG2
2823 #define SD_Data_Clk__PM_STBY_MSK 0x01u
2824
2825 /* timer_clock */
2826 #define timer_clock__CFG0 CYREG_CLKDIST_DCFG2_CFG0
2827 #define timer_clock__CFG1 CYREG_CLKDIST_DCFG2_CFG1
2828 #define timer_clock__CFG2 CYREG_CLKDIST_DCFG2_CFG2
2829 #define timer_clock__CFG2_SRC_SEL_MASK 0x07u
2830 #define timer_clock__INDEX 0x02u
2831 #define timer_clock__PM_ACT_CFG CYREG_PM_ACT_CFG2
2832 #define timer_clock__PM_ACT_MSK 0x04u
2833 #define timer_clock__PM_STBY_CFG CYREG_PM_STBY_CFG2
2834 #define timer_clock__PM_STBY_MSK 0x04u
2835
2836 /* SCSI_RST_ISR */
2837 #define SCSI_RST_ISR__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0
2838 #define SCSI_RST_ISR__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0
2839 #define SCSI_RST_ISR__INTC_MASK 0x04u
2840 #define SCSI_RST_ISR__INTC_NUMBER 2u
2841 #define SCSI_RST_ISR__INTC_PRIOR_NUM 7u
2842 #define SCSI_RST_ISR__INTC_PRIOR_REG CYREG_NVIC_PRI_2
2843 #define SCSI_RST_ISR__INTC_SET_EN_REG CYREG_NVIC_SETENA0
2844 #define SCSI_RST_ISR__INTC_SET_PD_REG CYREG_NVIC_SETPEND0
2845
2846 /* SCSI_Filtered */
2847 #define SCSI_Filtered_sts_sts_reg__0__MASK 0x01u
2848 #define SCSI_Filtered_sts_sts_reg__0__POS 0
2849 #define SCSI_Filtered_sts_sts_reg__1__MASK 0x02u
2850 #define SCSI_Filtered_sts_sts_reg__1__POS 1
2851 #define SCSI_Filtered_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG CYREG_B0_UDB13_14_ACTL
2852 #define SCSI_Filtered_sts_sts_reg__16BIT_STATUS_REG CYREG_B0_UDB13_14_ST
2853 #define SCSI_Filtered_sts_sts_reg__2__MASK 0x04u
2854 #define SCSI_Filtered_sts_sts_reg__2__POS 2
2855 #define SCSI_Filtered_sts_sts_reg__3__MASK 0x08u
2856 #define SCSI_Filtered_sts_sts_reg__3__POS 3
2857 #define SCSI_Filtered_sts_sts_reg__4__MASK 0x10u
2858 #define SCSI_Filtered_sts_sts_reg__4__POS 4
2859 #define SCSI_Filtered_sts_sts_reg__MASK 0x1Fu
2860 #define SCSI_Filtered_sts_sts_reg__MASK_REG CYREG_B0_UDB13_MSK
2861 #define SCSI_Filtered_sts_sts_reg__STATUS_AUX_CTL_REG CYREG_B0_UDB13_ACTL
2862 #define SCSI_Filtered_sts_sts_reg__STATUS_REG CYREG_B0_UDB13_ST
2863
2864 /* SCSI_CTL_PHASE */
2865 #define SCSI_CTL_PHASE_Sync_ctrl_reg__0__MASK 0x01u
2866 #define SCSI_CTL_PHASE_Sync_ctrl_reg__0__POS 0
2867 #define SCSI_CTL_PHASE_Sync_ctrl_reg__1__MASK 0x02u
2868 #define SCSI_CTL_PHASE_Sync_ctrl_reg__1__POS 1
2869 #define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_AUX_CTL_REG CYREG_B0_UDB02_03_ACTL
2870 #define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_CONTROL_REG CYREG_B0_UDB02_03_CTL
2871 #define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_CONTROL_COUNT_REG CYREG_B0_UDB02_03_CTL
2872 #define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_CONTROL_REG CYREG_B0_UDB02_03_CTL
2873 #define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_COUNT_COUNT_REG CYREG_B0_UDB02_03_CTL
2874 #define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_MASK_REG CYREG_B0_UDB02_03_MSK
2875 #define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_MASK_PERIOD_REG CYREG_B0_UDB02_03_MSK
2876 #define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_MASK_REG CYREG_B0_UDB02_03_MSK
2877 #define SCSI_CTL_PHASE_Sync_ctrl_reg__16BIT_PERIOD_PERIOD_REG CYREG_B0_UDB02_03_MSK
2878 #define SCSI_CTL_PHASE_Sync_ctrl_reg__2__MASK 0x04u
2879 #define SCSI_CTL_PHASE_Sync_ctrl_reg__2__POS 2
2880 #define SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_AUX_CTL_REG CYREG_B0_UDB02_ACTL
2881 #define SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_REG CYREG_B0_UDB02_CTL
2882 #define SCSI_CTL_PHASE_Sync_ctrl_reg__CONTROL_ST_REG CYREG_B0_UDB02_ST_CTL
2883 #define SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_REG CYREG_B0_UDB02_CTL
2884 #define SCSI_CTL_PHASE_Sync_ctrl_reg__COUNT_ST_REG CYREG_B0_UDB02_ST_CTL
2885 #define SCSI_CTL_PHASE_Sync_ctrl_reg__MASK 0x07u
2886 #define SCSI_CTL_PHASE_Sync_ctrl_reg__MASK_CTL_AUX_CTL_REG CYREG_B0_UDB02_MSK_ACTL
2887 #define SCSI_CTL_PHASE_Sync_ctrl_reg__PER_CTL_AUX_CTL_REG CYREG_B0_UDB02_MSK_ACTL
2888 #define SCSI_CTL_PHASE_Sync_ctrl_reg__PERIOD_REG CYREG_B0_UDB02_MSK
2889
2890 /* SCSI_Parity_Error */
2891 #define SCSI_Parity_Error_sts_sts_reg__0__MASK 0x01u
2892 #define SCSI_Parity_Error_sts_sts_reg__0__POS 0
2893 #define SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_AUX_CTL_REG CYREG_B0_UDB05_06_ACTL
2894 #define SCSI_Parity_Error_sts_sts_reg__16BIT_STATUS_REG CYREG_B0_UDB05_06_ST
2895 #define SCSI_Parity_Error_sts_sts_reg__MASK 0x01u
2896 #define SCSI_Parity_Error_sts_sts_reg__MASK_REG CYREG_B0_UDB05_MSK
2897 #define SCSI_Parity_Error_sts_sts_reg__STATUS_AUX_CTL_REG CYREG_B0_UDB05_ACTL
2898 #define SCSI_Parity_Error_sts_sts_reg__STATUS_REG CYREG_B0_UDB05_ST
2899
2900 /* Miscellaneous */
2901 #define BCLK__BUS_CLK__HZ 50000000U
2902 #define BCLK__BUS_CLK__KHZ 50000U
2903 #define BCLK__BUS_CLK__MHZ 50U
2904 #define CY_VERSION "PSoC Creator 3.1"
2905 #define CYDEV_CHIP_DIE_LEOPARD 1u
2906 #define CYDEV_CHIP_DIE_PANTHER 6u
2907 #define CYDEV_CHIP_DIE_PSOC4A 3u
2908 #define CYDEV_CHIP_DIE_PSOC5LP 5u
2909 #define CYDEV_CHIP_DIE_UNKNOWN 0u
2910 #define CYDEV_CHIP_FAMILY_PSOC3 1u
2911 #define CYDEV_CHIP_FAMILY_PSOC4 2u
2912 #define CYDEV_CHIP_FAMILY_PSOC5 3u
2913 #define CYDEV_CHIP_FAMILY_UNKNOWN 0u
2914 #define CYDEV_CHIP_FAMILY_USED CYDEV_CHIP_FAMILY_PSOC5
2915 #define CYDEV_CHIP_JTAG_ID 0x2E133069u
2916 #define CYDEV_CHIP_MEMBER_3A 1u
2917 #define CYDEV_CHIP_MEMBER_4A 3u
2918 #define CYDEV_CHIP_MEMBER_4D 2u
2919 #define CYDEV_CHIP_MEMBER_4F 4u
2920 #define CYDEV_CHIP_MEMBER_5A 6u
2921 #define CYDEV_CHIP_MEMBER_5B 5u
2922 #define CYDEV_CHIP_MEMBER_UNKNOWN 0u
2923 #define CYDEV_CHIP_MEMBER_USED CYDEV_CHIP_MEMBER_5B
2924 #define CYDEV_CHIP_DIE_EXPECT CYDEV_CHIP_MEMBER_USED
2925 #define CYDEV_CHIP_DIE_ACTUAL CYDEV_CHIP_DIE_EXPECT
2926 #define CYDEV_CHIP_REV_LEOPARD_ES1 0u
2927 #define CYDEV_CHIP_REV_LEOPARD_ES2 1u
2928 #define CYDEV_CHIP_REV_LEOPARD_ES3 3u
2929 #define CYDEV_CHIP_REV_LEOPARD_PRODUCTION 3u
2930 #define CYDEV_CHIP_REV_PANTHER_ES0 0u
2931 #define CYDEV_CHIP_REV_PANTHER_ES1 1u
2932 #define CYDEV_CHIP_REV_PANTHER_PRODUCTION 1u
2933 #define CYDEV_CHIP_REV_PSOC4A_ES0 17u
2934 #define CYDEV_CHIP_REV_PSOC4A_PRODUCTION 17u
2935 #define CYDEV_CHIP_REV_PSOC5LP_ES0 0u
2936 #define CYDEV_CHIP_REV_PSOC5LP_PRODUCTION 0u
2937 #define CYDEV_CHIP_REVISION_3A_ES1 0u
2938 #define CYDEV_CHIP_REVISION_3A_ES2 1u
2939 #define CYDEV_CHIP_REVISION_3A_ES3 3u
2940 #define CYDEV_CHIP_REVISION_3A_PRODUCTION 3u
2941 #define CYDEV_CHIP_REVISION_4A_ES0 17u
2942 #define CYDEV_CHIP_REVISION_4A_PRODUCTION 17u
2943 #define CYDEV_CHIP_REVISION_4D_PRODUCTION 0u
2944 #define CYDEV_CHIP_REVISION_4F_PRODUCTION 0u
2945 #define CYDEV_CHIP_REVISION_5A_ES0 0u
2946 #define CYDEV_CHIP_REVISION_5A_ES1 1u
2947 #define CYDEV_CHIP_REVISION_5A_PRODUCTION 1u
2948 #define CYDEV_CHIP_REVISION_5B_ES0 0u
2949 #define CYDEV_CHIP_REVISION_5B_PRODUCTION 0u
2950 #define CYDEV_CHIP_REVISION_USED CYDEV_CHIP_REVISION_5B_PRODUCTION
2951 #define CYDEV_CHIP_REV_EXPECT CYDEV_CHIP_REVISION_USED
2952 #define CYDEV_CONFIG_FASTBOOT_ENABLED 1
2953 #define CYDEV_CONFIG_UNUSED_IO_AllowButWarn 0
2954 #define CYDEV_CONFIG_UNUSED_IO CYDEV_CONFIG_UNUSED_IO_AllowButWarn
2955 #define CYDEV_CONFIG_UNUSED_IO_AllowWithInfo 1
2956 #define CYDEV_CONFIG_UNUSED_IO_Disallowed 2
2957 #define CYDEV_CONFIGURATION_COMPRESSED 1
2958 #define CYDEV_CONFIGURATION_DMA 0
2959 #define CYDEV_CONFIGURATION_ECC 0
2960 #define CYDEV_CONFIGURATION_IMOENABLED CYDEV_CONFIG_FASTBOOT_ENABLED
2961 #define CYDEV_CONFIGURATION_MODE_COMPRESSED 0
2962 #define CYDEV_CONFIGURATION_MODE CYDEV_CONFIGURATION_MODE_COMPRESSED
2963 #define CYDEV_CONFIGURATION_MODE_DMA 2
2964 #define CYDEV_CONFIGURATION_MODE_UNCOMPRESSED 1
2965 #define CYDEV_DEBUG_ENABLE_MASK 0x20u
2966 #define CYDEV_DEBUG_ENABLE_REGISTER CYREG_MLOGIC_DEBUG
2967 #define CYDEV_DEBUGGING_DPS_Disable 3
2968 #define CYDEV_DEBUGGING_DPS_JTAG_4 1
2969 #define CYDEV_DEBUGGING_DPS_JTAG_5 0
2970 #define CYDEV_DEBUGGING_DPS_SWD 2
2971 #define CYDEV_DEBUGGING_DPS_SWD_SWV 6
2972 #define CYDEV_DEBUGGING_DPS CYDEV_DEBUGGING_DPS_SWD_SWV
2973 #define CYDEV_DEBUGGING_ENABLE 1
2974 #define CYDEV_DEBUGGING_XRES 0
2975 #define CYDEV_DMA_CHANNELS_AVAILABLE 24u
2976 #define CYDEV_ECC_ENABLE 0
2977 #define CYDEV_HEAP_SIZE 0x0400
2978 #define CYDEV_INSTRUCT_CACHE_ENABLED 1
2979 #define CYDEV_INTR_RISING 0x0000003Eu
2980 #define CYDEV_PROJ_TYPE 2
2981 #define CYDEV_PROJ_TYPE_BOOTLOADER 1
2982 #define CYDEV_PROJ_TYPE_LOADABLE 2
2983 #define CYDEV_PROJ_TYPE_MULTIAPPBOOTLOADER 3
2984 #define CYDEV_PROJ_TYPE_STANDARD 0
2985 #define CYDEV_PROTECTION_ENABLE 0
2986 #define CYDEV_STACK_SIZE 0x1000
2987 #define CYDEV_USB_CLK_OSC_LOCKING_ENABLED_AT_PWR_UP
2988 #define CYDEV_USE_BUNDLED_CMSIS 1
2989 #define CYDEV_VARIABLE_VDDA 0
2990 #define CYDEV_VDDA 5.0
2991 #define CYDEV_VDDA_MV 5000
2992 #define CYDEV_VDDD 5.0
2993 #define CYDEV_VDDD_MV 5000
2994 #define CYDEV_VDDIO0 5.0
2995 #define CYDEV_VDDIO0_MV 5000
2996 #define CYDEV_VDDIO1 5.0
2997 #define CYDEV_VDDIO1_MV 5000
2998 #define CYDEV_VDDIO2 5.0
2999 #define CYDEV_VDDIO2_MV 5000
3000 #define CYDEV_VDDIO3 3.3
3001 #define CYDEV_VDDIO3_MV 3300
3002 #define CYDEV_VIO0 5.0
3003 #define CYDEV_VIO0_MV 5000
3004 #define CYDEV_VIO1 5.0
3005 #define CYDEV_VIO1_MV 5000
3006 #define CYDEV_VIO2 5.0
3007 #define CYDEV_VIO2_MV 5000
3008 #define CYDEV_VIO3 3.3
3009 #define CYDEV_VIO3_MV 3300
3010 #define CYIPBLOCK_ARM_CM3_VERSION 0
3011 #define CYIPBLOCK_P3_ANAIF_VERSION 0
3012 #define CYIPBLOCK_P3_CAPSENSE_VERSION 0
3013 #define CYIPBLOCK_P3_COMP_VERSION 0
3014 #define CYIPBLOCK_P3_DMA_VERSION 0
3015 #define CYIPBLOCK_P3_DRQ_VERSION 0
3016 #define CYIPBLOCK_P3_EMIF_VERSION 0
3017 #define CYIPBLOCK_P3_I2C_VERSION 0
3018 #define CYIPBLOCK_P3_LCD_VERSION 0
3019 #define CYIPBLOCK_P3_LPF_VERSION 0
3020 #define CYIPBLOCK_P3_PM_VERSION 0
3021 #define CYIPBLOCK_P3_TIMER_VERSION 0
3022 #define CYIPBLOCK_P3_USB_VERSION 0
3023 #define CYIPBLOCK_P3_VIDAC_VERSION 0
3024 #define CYIPBLOCK_P3_VREF_VERSION 0
3025 #define CYIPBLOCK_S8_GPIO_VERSION 0
3026 #define CYIPBLOCK_S8_IRQ_VERSION 0
3027 #define CYIPBLOCK_S8_SAR_VERSION 0
3028 #define CYIPBLOCK_S8_SIO_VERSION 0
3029 #define CYIPBLOCK_S8_UDB_VERSION 0
3030 #define DMA_CHANNELS_USED__MASK0 0x0000000Fu
3031 #define CYDEV_BOOTLOADER_ENABLE 0
3032
3033 #endif /* INCLUDED_CYFITTER_H */