2 ******************************************************************************
4 * Description : This file provides code for the configuration
5 * of the FSMC peripheral.
6 ******************************************************************************
8 * COPYRIGHT(c) 2016 STMicroelectronics
10 * Redistribution and use in source and binary forms, with or without modification,
11 * are permitted provided that the following conditions are met:
12 * 1. Redistributions of source code must retain the above copyright notice,
13 * this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright notice,
15 * this list of conditions and the following disclaimer in the documentation
16 * and/or other materials provided with the distribution.
17 * 3. Neither the name of STMicroelectronics nor the names of its contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
24 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
27 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
28 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 ******************************************************************************
34 /* Includes ------------------------------------------------------------------*/
39 /* USER CODE BEGIN 0 */
43 SRAM_HandleTypeDef hsram1
;
45 /* FSMC initialization function */
46 void MX_FSMC_Init(void)
48 FSMC_NORSRAM_TimingTypeDef Timing
;
50 /** Perform the SRAM1 memory initialization sequence
52 hsram1
.Instance
= FSMC_NORSRAM_DEVICE
;
53 hsram1
.Extended
= FSMC_NORSRAM_EXTENDED_DEVICE
;
55 hsram1
.Init
.NSBank
= FSMC_NORSRAM_BANK1
;
56 hsram1
.Init
.DataAddressMux
= FSMC_DATA_ADDRESS_MUX_ENABLE
;
57 hsram1
.Init
.MemoryType
= FSMC_MEMORY_TYPE_PSRAM
;
58 hsram1
.Init
.MemoryDataWidth
= FSMC_NORSRAM_MEM_BUS_WIDTH_16
;
59 hsram1
.Init
.BurstAccessMode
= FSMC_BURST_ACCESS_MODE_DISABLE
;
60 hsram1
.Init
.WaitSignalPolarity
= FSMC_WAIT_SIGNAL_POLARITY_LOW
;
61 hsram1
.Init
.WrapMode
= FSMC_WRAP_MODE_DISABLE
;
62 hsram1
.Init
.WaitSignalActive
= FSMC_WAIT_TIMING_BEFORE_WS
;
63 hsram1
.Init
.WriteOperation
= FSMC_WRITE_OPERATION_ENABLE
;
64 hsram1
.Init
.WaitSignal
= FSMC_WAIT_SIGNAL_DISABLE
;
65 hsram1
.Init
.ExtendedMode
= FSMC_EXTENDED_MODE_DISABLE
;
66 hsram1
.Init
.AsynchronousWait
= FSMC_ASYNCHRONOUS_WAIT_DISABLE
;
67 hsram1
.Init
.WriteBurst
= FSMC_WRITE_BURST_DISABLE
;
70 // 1 clock to read the address, + 3 for the synchroniser
71 Timing
.AddressSetupTime
= 4;
72 Timing
.AddressHoldTime
= 1;
74 // 3 for synchroniser, 1 to skip hold time, 1 to process read, 1 to output
75 Timing
.DataSetupTime
= 6;
77 // Allow a clock for us to release signals, plus 3 for the synchroniser to
78 // realise the cycle has ended. Need to avoid both devices acting as outputs
79 // on the multiplexed lines at the same time.
80 Timing
.BusTurnAroundDuration
= 4;
82 Timing
.CLKDivision
= 16; // Ignored for async
83 Timing
.DataLatency
= 17; // Ignored for async
84 Timing
.AccessMode
= FSMC_ACCESS_MODE_A
;
87 HAL_SRAM_Init(&hsram1
, &Timing
, NULL
);
91 static int FSMC_Initialized
= 0;
93 static void HAL_FSMC_MspInit(void){
94 /* USER CODE BEGIN FSMC_MspInit 0 */
96 /* USER CODE END FSMC_MspInit 0 */
97 GPIO_InitTypeDef GPIO_InitStruct
;
98 if (FSMC_Initialized
) {
101 FSMC_Initialized
= 1;
102 /* Peripheral clock enable */
105 /** FSMC GPIO Configuration
109 PE10 ------> FSMC_DA7
110 PE11 ------> FSMC_DA8
111 PE12 ------> FSMC_DA9
112 PE13 ------> FSMC_DA10
113 PE14 ------> FSMC_DA11
114 PE15 ------> FSMC_DA12
115 PD14 ------> FSMC_DA0
116 PD15 ------> FSMC_DA1
122 PD8 ------> FSMC_DA13
123 PD9 ------> FSMC_DA14
124 PD10 ------> FSMC_DA15
126 PE0 ------> FSMC_NBL0
127 PE1 ------> FSMC_NBL1
129 /* GPIO_InitStruct */
130 GPIO_InitStruct
.Pin
= GPIO_PIN_0
|GPIO_PIN_1
|GPIO_PIN_7
|GPIO_PIN_8
|GPIO_PIN_9
|GPIO_PIN_10
|GPIO_PIN_11
|GPIO_PIN_12
|GPIO_PIN_13
|GPIO_PIN_14
|GPIO_PIN_15
;
131 GPIO_InitStruct
.Mode
= GPIO_MODE_AF_PP
;
132 GPIO_InitStruct
.Pull
= GPIO_NOPULL
;
133 GPIO_InitStruct
.Speed
= GPIO_SPEED_HIGH
;
134 GPIO_InitStruct
.Alternate
= GPIO_AF12_FSMC
;
136 HAL_GPIO_Init(GPIOE
, &GPIO_InitStruct
);
138 /* GPIO_InitStruct */
139 GPIO_InitStruct
.Pin
= GPIO_PIN_14
|GPIO_PIN_15
|GPIO_PIN_0
|GPIO_PIN_1
140 |GPIO_PIN_4
|GPIO_PIN_5
|GPIO_PIN_7
|GPIO_PIN_8
|GPIO_PIN_9
|GPIO_PIN_10
;
141 GPIO_InitStruct
.Mode
= GPIO_MODE_AF_PP
;
142 GPIO_InitStruct
.Pull
= GPIO_NOPULL
;
143 GPIO_InitStruct
.Speed
= GPIO_SPEED_HIGH
;
144 GPIO_InitStruct
.Alternate
= GPIO_AF12_FSMC
;
146 HAL_GPIO_Init(GPIOD
, &GPIO_InitStruct
);
148 /* GPIO_InitStruct */
149 GPIO_InitStruct
.Pin
= GPIO_PIN_7
;
150 GPIO_InitStruct
.Mode
= GPIO_MODE_AF_PP
;
151 GPIO_InitStruct
.Pull
= GPIO_NOPULL
;
152 GPIO_InitStruct
.Speed
= GPIO_SPEED_HIGH
;
153 GPIO_InitStruct
.Alternate
= GPIO_AF12_FSMC
;
155 HAL_GPIO_Init(GPIOB
, &GPIO_InitStruct
);
157 /* USER CODE BEGIN FSMC_MspInit 1 */
159 /* USER CODE END FSMC_MspInit 1 */
162 void HAL_SRAM_MspInit(SRAM_HandleTypeDef
* hsram
){
163 /* USER CODE BEGIN SRAM_MspInit 0 */
165 /* USER CODE END SRAM_MspInit 0 */
167 /* USER CODE BEGIN SRAM_MspInit 1 */
169 /* USER CODE END SRAM_MspInit 1 */
172 static int FSMC_DeInitialized
= 0;
174 static void HAL_FSMC_MspDeInit(void){
175 /* USER CODE BEGIN FSMC_MspDeInit 0 */
177 /* USER CODE END FSMC_MspDeInit 0 */
178 if (FSMC_DeInitialized
) {
181 FSMC_DeInitialized
= 1;
182 /* Peripheral clock enable */
183 __FSMC_CLK_DISABLE();
185 /** FSMC GPIO Configuration
189 PE10 ------> FSMC_DA7
190 PE11 ------> FSMC_DA8
191 PE12 ------> FSMC_DA9
192 PE13 ------> FSMC_DA10
193 PE14 ------> FSMC_DA11
194 PE15 ------> FSMC_DA12
195 PD14 ------> FSMC_DA0
196 PD15 ------> FSMC_DA1
202 PD8 ------> FSMC_DA13
203 PD9 ------> FSMC_DA14
204 PD10 ------> FSMC_DA15
206 PE0 ------> FSMC_NBL0
207 PE1 ------> FSMC_NBL1
210 HAL_GPIO_DeInit(GPIOE
, GPIO_PIN_0
|GPIO_PIN_1
|GPIO_PIN_7
|GPIO_PIN_8
|GPIO_PIN_9
|GPIO_PIN_10
|GPIO_PIN_11
|GPIO_PIN_12
|GPIO_PIN_13
|GPIO_PIN_14
|GPIO_PIN_15
);
212 HAL_GPIO_DeInit(GPIOD
, GPIO_PIN_14
|GPIO_PIN_15
|GPIO_PIN_0
|GPIO_PIN_1
213 |GPIO_PIN_4
|GPIO_PIN_5
|GPIO_PIN_7
|GPIO_PIN_8
|GPIO_PIN_9
|GPIO_PIN_10
);
215 HAL_GPIO_DeInit(GPIOB
, GPIO_PIN_7
);
217 /* USER CODE BEGIN FSMC_MspDeInit 1 */
219 /* USER CODE END FSMC_MspDeInit 1 */
222 void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef
* hsram
){
223 /* USER CODE BEGIN SRAM_MspDeInit 0 */
225 /* USER CODE END SRAM_MspDeInit 0 */
226 HAL_FSMC_MspDeInit();
227 /* USER CODE BEGIN SRAM_MspDeInit 1 */
229 /* USER CODE END SRAM_MspDeInit 1 */
239 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/