STM32CubeMX/revF.diff

   1 diff --git a/STM32CubeMX/revF/Src/sdio.c b/STM32CubeMX/revF/Src/sdio.c
   2 index f2a0b7c..a00c6a8 100644
   3 --- a/STM32CubeMX/revF/Src/sdio.c
   4 +++ b/STM32CubeMX/revF/Src/sdio.c
   5 @@ -40,6 +40,8 @@ void MX_SDIO_SD_Init(void)
   6    hsd.Init.BusWide = SDIO_BUS_WIDE_1B;
   7    hsd.Init.HardwareFlowControl = SDIO_HARDWARE_FLOW_CONTROL_DISABLE;
   8    hsd.Init.ClockDiv = 0;
   9 +
  10 +  /*
  11    if (HAL_SD_Init(&hsd) != HAL_OK)
  12    {
  13      Error_Handler();
  14 @@ -47,8 +49,7 @@ void MX_SDIO_SD_Init(void)
  15    if (HAL_SD_ConfigWideBusOperation(&hsd, SDIO_BUS_WIDE_4B) != HAL_OK)
  16    {
  17      Error_Handler();
  18 -  }
  19 -
  20 +  }*/
  21  }
  22
  23  void HAL_SD_MspInit(SD_HandleTypeDef* sdHandle)
  24 diff --git a/STM32CubeMX/revF/Src/spi.c b/STM32CubeMX/revF/Src/spi.c
  25 index 8a452c4..8e4082b 100644
  26 --- a/STM32CubeMX/revF/Src/spi.c
  27 +++ b/STM32CubeMX/revF/Src/spi.c
  28 @@ -37,6 +37,8 @@ void MX_SPI1_Init(void)
  29    hspi1.Init.CLKPolarity = SPI_POLARITY_HIGH;
  30    hspi1.Init.CLKPhase = SPI_PHASE_2EDGE;
  31    hspi1.Init.NSS = SPI_NSS_SOFT;
  32 +
  33 +  // 13.5Mbaud FPGA device allows up to 25MHz write
  34    hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4;
  35    hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
  36    hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
  37 diff --git a/STM32CubeMX/revF/Src/usbd_conf.c b/STM32CubeMX/revF/Src/usbd_conf.c
  38 index 65f6102..8e03767 100644
  39 --- a/STM32CubeMX/revF/Src/usbd_conf.c
  40 +++ b/STM32CubeMX/revF/Src/usbd_conf.c
  41 @@ -357,9 +357,11 @@ USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
  42    HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_OTG_FS, PCD_ISOOUTIncompleteCallback);
  43    HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_OTG_FS, PCD_ISOINIncompleteCallback);
  44  #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  45 +  // Combined RX + TX fifo of 0x140 4-byte words (1280 bytes)
  46    HAL_PCDEx_SetRxFiFo(&hpcd_USB_OTG_FS, 0x80);
  47    HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 0, 0x40);
  48 -  HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 1, 0x80);
  49 +  HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 1, 0x40);
  50 +  HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 2, 0x40);
  51    }
  52    return USBD_OK;
  53  }
  54 diff --git a/STM32CubeMX/revF/Src/fsmc.c b/STM32CubeMX/revF/Src/fsmc.c
  55 index 03a1b12..1b01446 100644
  56 --- a/STM32CubeMX/revF/Src/fsmc.c
  57 +++ b/STM32CubeMX/revF/Src/fsmc.c
  58 @@ -50,12 +50,28 @@ void MX_FSMC_Init(void)
  59    hsram1.Init.AsynchronousWait = FSMC_ASYNCHRONOUS_WAIT_DISABLE;
  60    hsram1.Init.WriteBurst = FSMC_WRITE_BURST_DISABLE;
  61    /* Timing */
  62 +
  63 +  // 1 clock to read the address, + 1 for synchroniser skew
  64    Timing.AddressSetupTime = 2;
  65    Timing.AddressHoldTime = 1;
  66 +
  67 +  // Writes to device:
  68 +  //   1 for synchroniser skew (dbx also delayed)
  69 +  //   1 to skip hold time
  70 +  //   1 to write data.
  71 +
  72 +  // Reads from device:
  73 +  //   3 for syncroniser
  74 +  //   1 to write back to fsmc bus.
  75    Timing.DataSetupTime = 4;
  76 +
  77 +  // Allow a clock for us to release signals
  78 +  // Need to avoid both devices acting as outputs
  79 +  // on the multiplexed lines at the same time.
  80    Timing.BusTurnAroundDuration = 1;
  81 -  Timing.CLKDivision = 16;
  82 -  Timing.DataLatency = 17;
  83 +
  84 +  Timing.CLKDivision = 16; // Ignored for async
  85 +  Timing.DataLatency = 17; // Ignored for async
  86    Timing.AccessMode = FSMC_ACCESS_MODE_A;
  87    /* ExtTiming */
  88
  89 @@ -105,6 +121,10 @@ static void HAL_FSMC_MspInit(void){
  90    PE0   ------> FSMC_NBL0
  91    PE1   ------> FSMC_NBL1
  92    */
  93 +
  94 +  // MM: GPIO_SPEED_FREQ_MEDIUM is rated up to 50MHz, which is fine as all the
  95 +  // fsmc timings are > 1 (ie. so clock speed / 2 is around 50MHz).
  96 +
  97    /* GPIO_InitStruct */
  98    GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10
  99                            |GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14
 100
 101 diff --git a/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_ll_sdmmc.h b/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_ll_sdmmc.h
 102 index c966c906..9d709100 100644
 103 --- a/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_ll_sdmmc.h
 104 +++ b/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_ll_sdmmc.h
 105 @@ -1074,6 +1074,7 @@ uint32_t SDMMC_CmdReadSingleBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd);
 106  uint32_t SDMMC_CmdReadMultiBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd);
 107  uint32_t SDMMC_CmdWriteSingleBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd);
 108  uint32_t SDMMC_CmdWriteMultiBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd);
 109 +uint32_t SDMMC_CmdSetBlockCount(SDIO_TypeDef *SDIOx, uint32_t appCmdArg, uint32_t blockCount);
 110  uint32_t SDMMC_CmdEraseStartAdd(SDIO_TypeDef *SDIOx, uint32_t StartAdd);
 111  uint32_t SDMMC_CmdSDEraseStartAdd(SDIO_TypeDef *SDIOx, uint32_t StartAdd);
 112  uint32_t SDMMC_CmdEraseEndAdd(SDIO_TypeDef *SDIOx, uint32_t EndAdd);
 113 diff --git a/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_sdmmc.c b/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_sdmmc.c
 114 index 4f23a455..614b6dce 100644
 115 --- a/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_sdmmc.c
 116 +++ b/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_ll_sdmmc.c
 117 @@ -606,6 +606,31 @@ uint32_t SDMMC_CmdWriteSingleBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd)
 118    return errorstate;
 119  }
 120
 121 +/**
 122 +  * @brief  Set the count of a multi-block write command
 123 +  * @param  SDIOx: Pointer to SDIO register base
 124 +  * @retval HAL status
 125 +  */
 126 +uint32_t SDMMC_CmdSetBlockCount(SDIO_TypeDef *SDIOx, uint32_t appCmdArg, uint32_t blockCount)
 127 +{
 128 +  SDIO_CmdInitTypeDef  sdmmc_cmdinit;
 129 +  uint32_t errorstate;
 130 +
 131 +  errorstate = SDMMC_CmdAppCommand(SDIOx, appCmdArg);
 132 +  if(errorstate == HAL_SD_ERROR_NONE)
 133 +  {
 134 +    sdmmc_cmdinit.Argument         = blockCount;
 135 +    sdmmc_cmdinit.CmdIndex         = SDMMC_CMD_SET_BLOCK_COUNT;
 136 +    sdmmc_cmdinit.Response         = SDIO_RESPONSE_SHORT;
 137 +    sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
 138 +    sdmmc_cmdinit.CPSM             = SDIO_CPSM_ENABLE;
 139 +    (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
 140 +    errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SET_BLOCK_COUNT, SDIO_CMDTIMEOUT);
 141 +  }
 142 +
 143 +  return errorstate;
 144 +}
 145 +
 146  /**
 147    * @brief  Send the Write Multi Block command and check the response
 148    * @param  SDIOx: Pointer to SDIO register base
 149 diff --git a/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c b/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c
 150 index d2a88d75..1a09028f 100644
 151 --- a/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c
 152 +++ b/STM32CubeMX/revF/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_sd.c
 153 @@ -430,6 +430,10 @@ HAL_StatusTypeDef HAL_SD_InitCard(SD_HandleTypeDef *hsd)
 154    /* Enable SDIO Clock */
 155    __HAL_SD_ENABLE(hsd);
 156
 157 +  /* 1ms: required power up waiting time before starting the SD initialization
 158 +     sequence */
 159 +  HAL_Delay(1);
 160 +
 161    /* Identify card operating voltage */
 162    errorstate = SD_PowerON(hsd);
 163    if(errorstate != HAL_SD_ERROR_NONE)
 164 @@ -1247,22 +1251,22 @@ HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, u
 165      else
 166      {
 167        /* Enable SD DMA transfer */
 168 -      __HAL_SD_DMA_ENABLE(hsd);
 169 +      // MM disabled, as this fails on fast cards. __HAL_SD_DMA_ENABLE(hsd);
 170
 171        if(hsd->SdCard.CardType != CARD_SDHC_SDXC)
 172        {
 173          add *= 512U;
 174 -      }
 175
 176 -      /* Set Block Size for Card */
 177 -      errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE);
 178 -      if(errorstate != HAL_SD_ERROR_NONE)
 179 -      {
 180 -        /* Clear all the static flags */
 181 -        __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
 182 -        hsd->ErrorCode |= errorstate;
 183 -        hsd->State = HAL_SD_STATE_READY;
 184 -        return HAL_ERROR;
 185 +        /* Set Block Size for Card */
 186 +        errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE);
 187 +        if(errorstate != HAL_SD_ERROR_NONE)
 188 +        {
 189 +          /* Clear all the static flags */
 190 +          __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
 191 +          hsd->ErrorCode |= errorstate;
 192 +          hsd->State = HAL_SD_STATE_READY;
 193 +          return HAL_ERROR;
 194 +        }
 195        }
 196
 197        /* Configure the SD DPSM (Data Path State Machine) */
 198 @@ -1272,6 +1276,11 @@ HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, u
 199        config.TransferDir   = SDIO_TRANSFER_DIR_TO_SDIO;
 200        config.TransferMode  = SDIO_TRANSFER_MODE_BLOCK;
 201        config.DPSM          = SDIO_DPSM_ENABLE;
 202 +
 203 +      // We cannot enable DMA too early on UHS-I class 3 SD cards, or else the
 204 +      // data is just discarded before the dpsm is started.
 205 +      __HAL_SD_DMA_ENABLE();
 206 +
 207        (void)SDIO_ConfigData(hsd->Instance, &config);
 208
 209        /* Read Blocks in DMA mode */
 210 @@ -1343,6 +1352,19 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
 211        return HAL_ERROR;
 212      }
 213
 214 +    if(NumberOfBlocks > 1U && hsd->SdCard.CardType == CARD_SDHC_SDXC)
 215 +    {
 216 +      /* MM: Prepare for write */
 217 +      errorstate = SDMMC_CmdSetBlockCount(hsd->Instance, (uint32_t)(hsd->SdCard.RelCardAdd) << 16, NumberOfBlocks);
 218 +      if(errorstate != HAL_SD_ERROR_NONE)
 219 +      {
 220 +        __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
 221 +        hsd->ErrorCode |= errorstate;
 222 +        hsd->State = HAL_SD_STATE_READY;
 223 +        return HAL_ERROR;
 224 +      }
 225 +    }
 226 +
 227      hsd->State = HAL_SD_STATE_BUSY;
 228
 229      /* Initialize data control register */
 230 @@ -1367,17 +1389,17 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
 231      if(hsd->SdCard.CardType != CARD_SDHC_SDXC)
 232      {
 233        add *= 512U;
 234 -    }
 235
 236 -    /* Set Block Size for Card */
 237 -    errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE);
 238 -    if(errorstate != HAL_SD_ERROR_NONE)
 239 -    {
 240 -      /* Clear all the static flags */
 241 -      __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
 242 -      hsd->ErrorCode |= errorstate;
 243 -      hsd->State = HAL_SD_STATE_READY;
 244 -      return HAL_ERROR;
 245 +      /* Set Block Size for Card */
 246 +      errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE);
 247 +      if(errorstate != HAL_SD_ERROR_NONE)
 248 +      {
 249 +        /* Clear all the static flags */
 250 +        __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_FLAGS);
 251 +        hsd->ErrorCode |= errorstate;
 252 +        hsd->State = HAL_SD_STATE_READY;
 253 +        return HAL_ERROR;
 254 +      }
 255      }
 256
 257      /* Write Blocks in Polling mode */
 258 @@ -1406,7 +1428,7 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
 259      }
 260
 261      /* Enable SDIO DMA transfer */
 262 -    __HAL_SD_DMA_ENABLE(hsd);
 263 +    // MM disabled, as this fails on fast cards. __HAL_SD_DMA_ENABLE(hsd);
 264
 265      /* Enable the DMA Channel */
 266      if(HAL_DMA_Start_IT(hsd->hdmatx, (uint32_t)pData, (uint32_t)&hsd->Instance->FIFO, (uint32_t)(BLOCKSIZE * NumberOfBlocks)/4U) != HAL_OK)
 267 @@ -1431,6 +1453,11 @@ HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData,
 268        config.TransferDir   = SDIO_TRANSFER_DIR_TO_CARD;
 269        config.TransferMode  = SDIO_TRANSFER_MODE_BLOCK;
 270        config.DPSM          = SDIO_DPSM_ENABLE;
 271 +
 272 +      // We cannot enable DMA too early on UHS-I class 3 SD cards, or else the
 273 +      // data is just discarded before the dpsm is started.
 274 +      __HAL_SD_DMA_ENABLE();
 275 +
 276        (void)SDIO_ConfigData(hsd->Instance, &config);
 277
 278        return HAL_OK;
 279 @@ -1632,6 +1659,10 @@ void HAL_SD_IRQHandler(SD_HandleTypeDef *hsd)
 280            HAL_SD_ErrorCallback(hsd);
 281  #endif /* USE_HAL_SD_REGISTER_CALLBACKS */
 282          }
 283 +        __HAL_SD_CLEAR_FLAG(hsd, SDIO_STATIC_DATA_FLAGS);
 284 +
 285 +        hsd->State = HAL_SD_STATE_READY;
 286 +        hsd->Context = SD_CONTEXT_NONE;
 287        }
 288        if(((context & SD_CONTEXT_READ_SINGLE_BLOCK) == 0U) && ((context & SD_CONTEXT_READ_MULTIPLE_BLOCK) == 0U))
 289        {