Fixed fsmc timing some more so it's stable
[SCSI2SD-V6.git] / src / firmware / scsiPhy.h
1 // Copyright (C) 2013 Michael McMaster <michael@codesrc.com>
2 //
3 // This file is part of SCSI2SD.
4 //
5 // SCSI2SD is free software: you can redistribute it and/or modify
6 // it under the terms of the GNU General Public License as published by
7 // the Free Software Foundation, either version 3 of the License, or
8 // (at your option) any later version.
9 //
10 // SCSI2SD is distributed in the hope that it will be useful,
11 // but WITHOUT ANY WARRANTY; without even the implied warranty of
12 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 // GNU General Public License for more details.
14 //
15 // You should have received a copy of the GNU General Public License
16 // along with SCSI2SD. If not, see <http://www.gnu.org/licenses/>.
17 #ifndef SCSIPHY_H
18 #define SCSIPHY_H
19
20 #define SCSI_CTRL_IDMASK ((volatile uint8_t*)0x60000000)
21 #define SCSI_CTRL_PHASE ((volatile uint8_t*)0x60000002)
22 #define SCSI_CTRL_BSY ((volatile uint8_t*)0x60000004)
23 #define SCSI_FIFO_SEL ((volatile uint8_t*)0x60000006)
24 #define SCSI_DATA_CNT_HI ((volatile uint8_t*)0x60000008)
25 #define SCSI_DATA_CNT_LO ((volatile uint8_t*)0x6000000A)
26 #define SCSI_DATA_CNT_SET ((volatile uint8_t*)0x6000000C)
27 #define SCSI_CTRL_DBX ((volatile uint8_t*)0x6000000E)
28 #define SCSI_CTRL_SYNC_OFFSET ((volatile uint8_t*)0x60000010)
29 #define SCSI_CTRL_TIMING ((volatile uint8_t*)0x60000012)
30 #define SCSI_CTRL_TIMING2 ((volatile uint8_t*)0x60000014)
31
32 #define SCSI_STS_FIFO ((volatile uint8_t*)0x60000020)
33 #define SCSI_STS_ALTFIFO ((volatile uint8_t*)0x60000022)
34 #define SCSI_STS_FIFO_COMPLETE ((volatile uint8_t*)0x60000024)
35 #define SCSI_STS_SELECTED ((volatile uint8_t*)0x60000026)
36 #define SCSI_STS_SCSI ((volatile uint8_t*)0x60000028)
37 #define SCSI_STS_DBX ((volatile uint8_t*)0x6000002A)
38
39 #define SCSI_FIFO_DATA ((volatile uint16_t*)0x60000040)
40 #define SCSI_FIFO_DEPTH 512
41
42
43 #define scsiPhyFifoFull() ((*SCSI_STS_FIFO & 0x01) == 0x01)
44 #define scsiPhyFifoEmpty() ((*SCSI_STS_FIFO & 0x02) == 0x02)
45 #define scsiPhyFifoAltEmpty() ((*SCSI_STS_ALTFIFO & 0x02) == 0x02)
46
47 #define scsiPhyFifoFlip() \
48 {\
49 scsiPhyFifoSel ^= 1; \
50 *SCSI_FIFO_SEL = scsiPhyFifoSel; \
51 }
52
53 #define scsiPhyTx(val) *SCSI_FIFO_DATA = (val)
54 #define scsiPhyRx() *SCSI_FIFO_DATA
55 #define scsiPhyComplete() ((*SCSI_STS_FIFO_COMPLETE & 0x01) == 0x01)
56
57 #define scsiStatusATN() ((*SCSI_STS_SCSI & 0x01) == 0x01)
58 #define scsiStatusBSY() ((*SCSI_STS_SCSI & 0x02) == 0x02)
59 #define scsiStatusRST() ((*SCSI_STS_SCSI & 0x04) == 0x04)
60 #define scsiStatusSEL() ((*SCSI_STS_SCSI & 0x08) == 0x08)
61 #define scsiStatusACK() ((*SCSI_STS_SCSI & 0x10) == 0x10)
62
63 // Disable DMA due to errate with the STM32F205 DMA2 controller when
64 // concurrently transferring FSMC (with FIFO) and APB (ie. sdio)
65 // peripherals.
66 #undef SCSI_FSMC_DMA
67
68 extern uint8_t scsiPhyFifoSel;
69
70 void scsiPhyInit(void);
71 void scsiPhyConfig(void);
72 void scsiPhyReset(void);
73
74 void scsiEnterPhase(int phase);
75 void scsiEnterBusFree(void);
76
77 void scsiSetDataCount(uint32_t count);
78
79 void scsiWrite(const uint8_t* data, uint32_t count);
80 void scsiRead(uint8_t* data, uint32_t count);
81 void scsiWriteByte(uint8_t value);
82 uint8_t scsiReadByte(void);
83
84
85 void sdTmpRead(uint8_t* data, uint32_t lba, int sectors);
86 void sdTmpWrite(uint8_t* data, uint32_t lba, int sectors);
87
88 extern volatile uint8_t scsiRxDMAComplete;
89 extern volatile uint8_t scsiTxDMAComplete;
90 #define scsiDMABusy() (!(scsiRxDMAComplete && scsiTxDMAComplete))
91
92 void scsiReadDMA(uint8_t* data, uint32_t count);
93 int scsiReadDMAPoll();
94
95 void scsiWriteDMA(const uint8_t* data, uint32_t count);
96 int scsiWriteDMAPoll();
97
98 int scsiSelfTest(void);
99
100 #endif