Halve FMC timings for clk/2 MCO1 freq

[SCSI2SD-V6.git] / STM32CubeMX / 2021 / 2021.ioc

diff --git a/STM32CubeMX/2021/2021.ioc b/STM32CubeMX/2021/2021.ioc
index fb8897f8b39ba09d7f917e34d73859d8a549c261..40380273e455be8a82a69d1f5712afd67e8cc2ac 100644 (file)
--- a/STM32CubeMX/2021/2021.ioc
+++ b/STM32CubeMX/2021/2021.ioc
@@ -50,10 +50,10 @@ Dma.SDIO_TX.0.PeriphDataAlignment=DMA_PDATAALIGN_WORD
 Dma.SDIO_TX.0.PeriphInc=DMA_PINC_DISABLE
 Dma.SDIO_TX.0.Priority=DMA_PRIORITY_VERY_HIGH
 Dma.SDIO_TX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,FIFOThreshold,MemBurst,PeriphBurst
-FMC.AddressHoldTime1=1
-FMC.AddressSetupTime1=2
-FMC.BusTurnAroundDuration1=1
-FMC.DataSetupTime1=4
+FMC.AddressHoldTime1=2
+FMC.AddressSetupTime1=4
+FMC.BusTurnAroundDuration1=2
+FMC.DataSetupTime1=8
 FMC.IPParameters=AddressSetupTime1,AddressHoldTime1,DataSetupTime1,BusTurnAroundDuration1,NSMemoryDataWidth1-NorPsramChipSelect1_1,WriteOperation1-NorPsramChipSelect1_1
 FMC.NSMemoryDataWidth1-NorPsramChipSelect1_1=FMC_NORSRAM_MEM_BUS_WIDTH_16
 FMC.WriteOperation1-NorPsramChipSelect1_1=FMC_WRITE_OPERATION_ENABLE
@@ -509,7 +509,7 @@ ProjectManager.FreePins=true
 ProjectManager.HalAssertFull=false
 ProjectManager.HeapSize=0x200
 ProjectManager.KeepUserCode=true
-ProjectManager.LastFirmware=false
+ProjectManager.LastFirmware=true
 ProjectManager.LibraryCopy=0
 ProjectManager.MainLocation=Src
 ProjectManager.NoMain=false