+20181011 6.2.1
+ - Fix bug in USB disk interface with disks over 4GB
+
20180926 6.2.0
- Fix bug with non-512 byte sectors.
- Fix bug when writing with multiple SCSI devices on the chain
src/firmware/spinlock.c \
src/firmware/tape.c \
src/firmware/time.c \
- src/firmware/trace.c \
src/firmware/vendor.c \
${USBCOMPOSITE_SRC}
#include "scsiPhy.h"\r
#include "sd.h"\r
#include "disk.h"\r
-#include "trace.h"\r
#include "bootloader.h"\r
#include "bsp.h"\r
#include "spinlock.h"\r
\r
#include <string.h>\r
\r
-static const uint16_t FIRMWARE_VERSION = 0x0620;\r
+static const uint16_t FIRMWARE_VERSION = 0x0621;\r
\r
// 1 flash row\r
static const uint8_t DEFAULT_CONFIG[128] =\r
\r
void s2s_configInit(S2S_BoardCfg* config)\r
{\r
-\r
usbInEpState = USB_IDLE;\r
\r
-\r
if ((blockDev.state & DISK_PRESENT) && sdDev.capacity)\r
{\r
int cfgSectors = (S2S_CFG_SIZE + 511) / 512;\r
response[27] = scsiDev.lastSenseASC >> 8;\r
response[28] = scsiDev.lastSenseASC;\r
response[29] = *SCSI_STS_DBX & 0xff; // What we've read\r
- response[30] = LastTrace;\r
+ response[30] = 0; // obsolete\r
response[31] = *SCSI_STS_DBX >> 8; // What we're writing\r
hidPacket_send(response, sizeof(response));\r
}\r
#include "scsi.h"\r
#include "scsiPhy.h"\r
#include "time.h"\r
-#include "trace.h"\r
#include "sdio.h"\r
#include "usb_device/usb_device.h"\r
#include "usb_device/usbd_composite.h"\r
\r
void mainInit()\r
{\r
- traceInit();\r
s2s_timeInit();\r
s2s_ledInit();\r
s2s_fpgaInit();\r
0x00, 0x00, // Maximum pre-fetch ceiling\r
};\r
\r
+// Old CCS SCSI-1 cache page\r
+static const uint8_t CCSCachingPage[] =\r
+{\r
+0x38, // Page Code\r
+0x0E, // Page length\r
+0x00, // Read cache disable\r
+0x00, // Prefetch threshold\r
+0x00, 0x00, // Max threshold / multiplier\r
+0x00, 0x00, // Min threshold / multiplier\r
+0x00, 0x00, // Reserved\r
+0x00, 0x00,\r
+0x00, 0x00,\r
+0x00, 0x00,\r
+};\r
+\r
static const uint8_t ControlModePage[] =\r
{\r
0x0A, // Page code\r
idx += sizeof(AppleVendorPage);\r
}\r
\r
+ if (pageCode == 0x38) // Don't send unless requested\r
+ {\r
+ pageFound = 1;\r
+ pageIn(pc, idx, CCSCachingPage, sizeof(CCSCachingPage));\r
+ idx += sizeof(CCSCachingPage);\r
+ }\r
+\r
if (!pageFound)\r
{\r
// Unknown Page Code\r
\r
#include "scsi.h"\r
#include "scsiPhy.h"\r
-#include "trace.h"\r
#include "time.h"\r
#include "fpga.h"\r
#include "led.h"\r
// vector table.\r
void EXTI4_IRQHandler()\r
{\r
- traceIrq(trace_scsiResetISR);\r
-\r
// Make sure that interrupt flag is set\r
if (__HAL_GPIO_EXTI_GET_IT(GPIO_PIN_4) != RESET) {\r
\r
#endif\r
scsiSetDataCount(1);\r
\r
- trace(trace_spinPhyRxFifo);\r
while (!scsiPhyComplete() && likely(!scsiDev.resetFlag))\r
{\r
__WFE(); // Wait for event\r
{\r
// Prepare DMA transfer\r
dmaInProgress = 1;\r
- trace(trace_doRxSingleDMA);\r
\r
scsiTxDMAComplete = 1; // TODO not used much\r
scsiRxDMAComplete = 0; // TODO not used much\r
{\r
scsiReadDMA(data + i, chunk);\r
\r
- trace(trace_spinReadDMAPoll);\r
-\r
while (!scsiReadDMAPoll() && likely(!scsiDev.resetFlag))\r
{\r
};\r
assertFail();\r
}\r
#endif\r
- trace(trace_spinPhyTxFifo);\r
scsiPhyTx(value);\r
scsiPhyFifoFlip();\r
\r
scsiSetDataCount(1);\r
\r
- trace(trace_spinTxComplete);\r
while (!scsiPhyComplete() && likely(!scsiDev.resetFlag))\r
{\r
__WFE(); // Wait for event\r
{\r
// Prepare DMA transfer\r
dmaInProgress = 1;\r
- trace(trace_doTxSingleDMA);\r
\r
scsiTxDMAComplete = 0;\r
scsiRxDMAComplete = 1;\r
chunk = chunk & 0xFFFFFFF8;\r
scsiWriteDMA(data + i, chunk);\r
\r
- trace(trace_spinReadDMAPoll);\r
-\r
while (!scsiWriteDMAPoll() && likely(!scsiDev.resetFlag))\r
{\r
}\r
\r
void scsiPhyReset()\r
{\r
- trace(trace_scsiPhyReset);\r
if (dmaInProgress)\r
{\r
- trace(trace_spinDMAReset);\r
HAL_DMA_Abort(&memToFSMC);\r
HAL_DMA_Abort(&fsmcToMem);\r
\r
#include "sd.h"\r
#include "led.h"\r
#include "time.h"\r
-#include "trace.h"\r
\r
#include "scsiPhy.h"\r
\r
+++ /dev/null
-// Copyright (C) 2015 James Laird-Wah <james@laird-wah.net>
-//
-// This file is part of SCSI2SD.
-//
-// SCSI2SD is free software: you can redistribute it and/or modify
-// it under the terms of the GNU General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// SCSI2SD is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-// GNU General Public License for more details.
-//
-// You should have received a copy of the GNU General Public License
-// along with SCSI2SD. If not, see <http://www.gnu.org/licenses/>.
-
-#include <stm32f2xx.h>
-#include <stdint.h>
-#include "trace.h"
-
-// configure desired baud rate on the SWV pin.
-// up to the lower of CPU_clk/2 or 33MHz
-#define BAUD_RATE 921600
-
-// Cortex-M3 Trace Port Interface Unit (TPIU)
-#define TPIU_BASE 0xe0040000
-#define MMIO32(addr) *((volatile uint32_t*)(addr))
-#define TPIU_SSPSR MMIO32(TPIU_BASE + 0x000)
-#define TPIU_CSPSR MMIO32(TPIU_BASE + 0x004)
-#define TPIU_ACPR MMIO32(TPIU_BASE + 0x010)
-#define TPIU_SPPR MMIO32(TPIU_BASE + 0x0F0)
-#define TPIU_FFSR MMIO32(TPIU_BASE + 0x300)
-#define TPIU_FFCR MMIO32(TPIU_BASE + 0x304)
-
-#define TPIU_CSPSR_BYTE (1 << 0)
-#define TPIU_CSPSR_HALFWORD (1 << 1)
-#define TPIU_CSPSR_WORD (1 << 3)
-
-#define TPIU_SPPR_SYNC (0x0)
-#define TPIU_SPPR_ASYNC_MANCHESTER (0x1)
-#define TPIU_SPPR_ASYNC_NRZ (0x2)
-
-#define TPIU_FFCR_ENFCONT (1 << 1)
-
-uint8_t LastTrace;
-
-#ifndef TRACE
-
-void traceInit(void) { }
-#else
-
-void traceInit(void) {
- // enable the trace module clocks
- CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
-
- // set SWV clock = CPU clock / 2, and enable
- CY_SET_REG8(CYDEV_MFGCFG_MLOGIC_DEBUG, 0xc); // swv_clk_sel = CPU_clk / 2, swv_clk enable
-
- // unlock the ETM/TPIU registers
- *((volatile uint32_t*)0xE0000FB0) = 0xC5ACCE55;
-
- // NRZ is "UART mode"
- TPIU_SPPR = TPIU_SPPR_ASYNC_NRZ;
- // prescaler, 0 = divide by 1
- TPIU_ACPR = (BCLK__BUS_CLK__HZ/2/BAUD_RATE) - 1;
- // can write 1, 2 or 4 byte ports
- TPIU_CSPSR = TPIU_CSPSR_BYTE;
-
- // bypass formatter (puts sync & stuff in otherwise)
- TPIU_FFCR &= ~TPIU_FFCR_ENFCONT;
- // enable ITM, enable the first 2 stimulus ports
- ITM->TCR = ITM_TCR_ITMENA_Msk;
- ITM->TER = 0x3;
-
- trace(trace_begin);
-}
-#endif
+++ /dev/null
-// Copyright (C) 2015 James Laird-Wah <james@laird-wah.net>
-//
-// This file is part of SCSI2SD.
-//
-// SCSI2SD is free software: you can redistribute it and/or modify
-// it under the terms of the GNU General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// SCSI2SD is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-// GNU General Public License for more details.
-//
-// You should have received a copy of the GNU General Public License
-// along with SCSI2SD. If not, see <http://www.gnu.org/licenses/>.
-
-extern uint8_t LastTrace;
-
-// Trace event IDs to be output. 1 and 9 are generated as headers on ports 0
-// and 1 respectively, and should not be used.
-enum trace_event {
- trace_begin = 0,
-
- // function entries - SCSI
- trace_scsiRxCompleteISR = 0x50,
- trace_scsiTxCompleteISR,
- trace_scsiResetISR,
- trace_doRxSingleDMA,
- trace_doTxSingleDMA,
- trace_scsiPhyReset,
-
- // spin loops - SCSI
- trace_spinTxComplete = 0x20,
- trace_spinReadDMAPoll,
- trace_spinWriteDMAPoll,
- trace_spinPhyTxFifo,
- trace_spinPhyRxFifo,
- trace_spinDMAReset,
-
- // SD
- trace_spinSpiByte = 0x30,
- trace_spinSDRxFIFO,
- trace_spinSDBusy,
- trace_spinSDDMA,
- trace_spinSDCompleteWrite,
- trace_spinSDCompleteRead,
-
- // completion
- trace_sdSpiByte = 0x40,
-};
-
-void traceInit(void);
-
-#ifdef TRACE
-// normally the code spins waiting for the trace FIFO to be ready for each event
-// if you are debugging a timing-sensitive problem, define TRACE_IMPATIENT and
-// expect some dropped packets
-#ifdef TRACE_IMPATIENT
- #define wait_fifo(port) ;
-#else
- #define wait_fifo(port) while (!(ITM->PORT[port].u32));
-#endif
-
- #include <core_cm3_psoc5.h>
- static inline void trace(enum trace_event ch) {
- wait_fifo(0);
- ITM->PORT[0].u8 = ch;
- }
- // use a different stimulus port for ISRs to avoid a race
- static inline void traceIrq(enum trace_event ch) {
- wait_fifo(1);
- ITM->PORT[1].u8 = ch;
- }
-#else
- #define trace(ev) LastTrace = ev
- #define traceIrq(ev) LastTrace = ev
-#endif
uint16_t scsi_blk_size;
uint32_t scsi_blk_nbr;
- uint32_t scsi_blk_addr;
- uint32_t scsi_blk_len;
+// uint32_t scsi_blk_addr;
+// uint32_t scsi_blk_len;
+// michael@codesrc.com: Need to support > 4gb drives
+ uint64_t scsi_blk_addr;
+ uint64_t scsi_blk_len;
+
}
USBD_MSC_BOT_HandleTypeDef;
projects / SCSI2SD-V6.git / commitdiff